Re: [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG

2011-01-04 Thread ABRAHAM, KISHON VIJAY
On Tue, Jan 4, 2011 at 1:05 PM, Peter Ujfalusi peter.ujfal...@nokia.com wrote:

 Hi,

 On 12/21/10 09:40, ext Kishon Vijay Abraham I wrote:
  McBSP2/3 in OMAP3 has sidetone feature which requires autoidle
  to be disabled before starting the sidetone. Also SYSCONFIG
  register has to be set with smart idle or no idle depending on the
  dma op mode (threshold or element sync). For doing these operations
  dynamically at runtime, omap_device APIs are used to modify SYSCONFIG 
  register.
 
  Signed-off-by: Kishon Vijay Abraham I kis...@ti.com


   static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
   {
  +     struct omap_device *od;
  +
  +     od = find_omap_device_by_dev(mcbsp-dev);
        /*
         * Enable wakup behavior, smart idle and all wakeups
         * REVISIT: some wakeups may be unnecessary
         */
        if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
  -             u16 syscon;
  -
  -             syscon = MCBSP_READ(mcbsp, SYSCON);
  -             syscon = ~(ENAWAKEUP | SIDLEMODE(0x03) | 
  CLOCKACTIVITY(0x03));
  -
  -             if (mcbsp-dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
  -                     syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
  -                                     CLOCKACTIVITY(0x02));
  -                     MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
  -             } else {
  -                     syscon |= SIDLEMODE(0x01);
  -             }
  -
  -             MCBSP_WRITE(mcbsp, SYSCON, syscon);
  +             if (mcbsp-dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)
  +                     omap_device_noidle(od);

 Should you configure McBSP to SMART_IDLE, when the THRESHOLD mode is
 selected?
 While we are here:
 1. How we select the WAKE events from McBSP?
   We need XRDYEN, and RRDYEN bits for wake (in WAKEUPEN register),

 Ahh.. Ok. This setting still need to be present. Will add it in
my next patch version.
 Thanks.

and
   also we need to enable the WAKEUP in SYSCON register.

 Setting of WAKEUPEN will be taken care by pm_runtime_get_sync()

 2. How we are configuring the CLOCKACTIVITY field in SYSCON register?

   It's been set in the hwmod database. In [1], there is a field
.clockact in
   omap_hwmod_class_sysconfig where we set the clock activity to 2. Whenever
   we do a get_sync, CLOCKACTIVITY field in SYSCON register will be set
   to the value present in .clockact field.

  [1] https://patchwork.kernel.org/patch/423731/


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Re: [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG

2011-01-04 Thread Peter Ujfalusi
On 01/04/11 11:26, ext ABRAHAM, KISHON VIJAY wrote:
 1. How we select the WAKE events from McBSP?
   We need XRDYEN, and RRDYEN bits for wake (in WAKEUPEN register),
 
  Ahh.. Ok. This setting still need to be present. Will add it in my
 next patch version.
  Thanks.

Thanks.

 and
   also we need to enable the WAKEUP in SYSCON register.
 
   Setting of WAKEUPEN will be taken care by pm_runtime_get_sync()

I need to get more familiar with the hwmod things ;)

 2. How we are configuring the CLOCKACTIVITY field in SYSCON register?
 
 
It's been set in the hwmod database. In [1], there is a field
 .clockact in
omap_hwmod_class_sysconfig where we set the clock activity to 2.
 Whenever
we do a get_sync, CLOCKACTIVITY field in SYSCON register will be set
to the value present in .clockact field.
 
   [1] https://patchwork.kernel.org/patch/423731/

I see. Is there a way to change the CLOCKACTIVITY field in certain cases?
What I mean is:
the 0x2 means that ICLK can be switched off, PRCM FCLK must kept on
I have a setup, where I can switch off the FCLK for a period of time (so
PER domain can hit retention). For this I'll need to have 0x0 in
CLOCKACTIVITY.
I'm not sure what are the side effects if we always use 0x0, but IMHO
that shall be fine as well.

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Re: [PATCH v1 09/10] OMAP: McBSP: use omap_device APIs to modify SYSCONFIG

2011-01-03 Thread Peter Ujfalusi
Hi,

On 12/21/10 09:40, ext Kishon Vijay Abraham I wrote:
 McBSP2/3 in OMAP3 has sidetone feature which requires autoidle
 to be disabled before starting the sidetone. Also SYSCONFIG
 register has to be set with smart idle or no idle depending on the
 dma op mode (threshold or element sync). For doing these operations
 dynamically at runtime, omap_device APIs are used to modify SYSCONFIG 
 register.
 
 Signed-off-by: Kishon Vijay Abraham I kis...@ti.com


  static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
  {
 + struct omap_device *od;
 +
 + od = find_omap_device_by_dev(mcbsp-dev);
   /*
* Enable wakup behavior, smart idle and all wakeups
* REVISIT: some wakeups may be unnecessary
*/
   if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
 - u16 syscon;
 -
 - syscon = MCBSP_READ(mcbsp, SYSCON);
 - syscon = ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
 -
 - if (mcbsp-dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
 - syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
 - CLOCKACTIVITY(0x02));
 - MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
 - } else {
 - syscon |= SIDLEMODE(0x01);
 - }
 -
 - MCBSP_WRITE(mcbsp, SYSCON, syscon);
 + if (mcbsp-dma_op_mode != MCBSP_DMA_MODE_THRESHOLD)
 + omap_device_noidle(od);

Should you configure McBSP to SMART_IDLE, when the THRESHOLD mode is
selected?
While we are here:
1. How we select the WAKE events from McBSP?
   We need XRDYEN, and RRDYEN bits for wake (in WAKEUPEN register), and
   also we need to enable the WAKEUP in SYSCON register.
2. How we are configuring the CLOCKACTIVITY field in SYSCON register?

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