[PATCH v2 11/11] ARM: dts: sk-rzg1e: add Ether support

[Sergei Shtylyov]

Define the SK-RZG1E board dependent part of the Ether device node.
Enable DHCP and NFS root  for the kernel booting.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag.

 arch/arm/boot/dts/r8a7745-sk-rzg1e.dts |   15 ++-
 1 file changed, 14 insertions(+), 1 deletion(-)

Index: renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
===
--- renesas.orig/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
+++ renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
@@ -20,7 +20,7 @@
};
 
chosen {
-   bootargs = "ignore_loglevel";
+   bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
 
@@ -37,3 +37,16 @@
  {
status = "okay";
 };
+
+ {
+   phy-handle = <>;
+   renesas,ether-link-active-low;
+   status = "okay";
+
+   phy1: ethernet-phy@1 {
+   reg = <1>;
+   interrupt-parent = <>;
+   interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
+   micrel,led-mode = <1>;
+   };
+};

[PATCH v2 10/11] ARM: dts: sk-rzg1e: initial device tree

[Sergei Shtylyov]

Add the initial  device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1  debug  serial  port (SCIF2); include support for it,
so that the serial console can  work.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag.

 arch/arm/boot/dts/Makefile |1 
 arch/arm/boot/dts/r8a7745-sk-rzg1e.dts |   39 +
 2 files changed, 40 insertions(+)

Index: renesas/arch/arm/boot/dts/Makefile
===
--- renesas.orig/arch/arm/boot/dts/Makefile
+++ renesas/arch/arm/boot/dts/Makefile
@@ -678,6 +678,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
r8a7743-sk-rzg1m.dtb \
+   r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
r8a7790-lager.dtb \
Index: renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
===
--- /dev/null
+++ renesas/arch/arm/boot/dts/r8a7745-sk-rzg1e.dts
@@ -0,0 +1,39 @@
+/*
+ * Device Tree Source for the SK-RZG1E board
+ *
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/dts-v1/;
+#include "r8a7745.dtsi"
+
+/ {
+   model = "SK-RZG1E";
+   compatible = "renesas,sk-rzg1e", "renesas,r8a7745";
+
+   aliases {
+   serial0 = 
+   };
+
+   chosen {
+   bootargs = "ignore_loglevel";
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@4000 {
+   device_type = "memory";
+   reg = <0 0x4000 0 0x4000>;
+   };
+};
+
+_clk {
+   clock-frequency = <2000>;
+};
+
+ {
+   status = "okay";
+};

[PATCH v2 09/11] ARM: shmobile: document SK-RZG1E board

[Sergei Shtylyov]

Document the SK-RZG1E device tree bindings, listing it as a supported board.

This allows to use checkpatch.pl to validate .dts files referring to the
SK-RZG1E board.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- fixed the subject;
- added Geert's tag.

 Documentation/devicetree/bindings/arm/shmobile.txt |2 ++
 1 file changed, 2 insertions(+)

Index: renesas/Documentation/devicetree/bindings/arm/shmobile.txt
===
--- renesas.orig/Documentation/devicetree/bindings/arm/shmobile.txt
+++ renesas/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -77,6 +77,8 @@ Boards:
 compatible = "renesas,salvator-x", "renesas,r8a7796";
   - SILK (RTP0RC7794LCB00011S)
 compatible = "renesas,silk", "renesas,r8a7794"
+  - SK-RZG1E (YR8A77450S000BE)
+compatible = "renesas,sk-rzg1e", "renesas,r8a7745"
   - SK-RZG1M (YR8A77430S000BE)
 compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
   - Wheat

[PATCH v2 08/11] ARM: dts: r8a7745: add IRQC support

[Sergei Shtylyov]

Describe the IRQC interrupt controller in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag;
- refreshed the patch.

 arch/arm/boot/dts/r8a7745.dtsi |   19 +++
 1 file changed, 19 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7745.dtsi
===
--- renesas.orig/arch/arm/boot/dts/r8a7745.dtsi
+++ renesas/arch/arm/boot/dts/r8a7745.dtsi
@@ -62,6 +62,25 @@
 IRQ_TYPE_LEVEL_HIGH)>;
};
 
+   irqc: interrupt-controller@e61c {
+   compatible = "renesas,irqc-r8a7745", "renesas,irqc";
+   #interrupt-cells = <2>;
+   interrupt-controller;
+   reg = <0 0xe61c 0 0x200>;
+   interrupts = ,
+,
+,
+,
+,
+,
+,
+,
+,
+;
+   clocks = < CPG_MOD 407>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   };
+
timer {
compatible = "arm,armv7-timer";
interrupts = 

[PATCH v2 07/11] ARM: dts: r8a7745: add Ether support

[Sergei Shtylyov]

Define the generic R8A7745 part of the Ether device node.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag.

 arch/arm/boot/dts/r8a7745.dtsi |   12 
 1 file changed, 12 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7745.dtsi
===
--- renesas.orig/arch/arm/boot/dts/r8a7745.dtsi
+++ renesas/arch/arm/boot/dts/r8a7745.dtsi
@@ -418,6 +418,18 @@
power-domains = < R8A7745_PD_ALWAYS_ON>;
status = "disabled";
};
+
+   ether: ethernet@ee70 {
+   compatible = "renesas,ether-r8a7745";
+   reg = <0 0xee70 0 0x400>;
+   interrupts = ;
+   clocks = < CPG_MOD 813>;
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   phy-mode = "rmii";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
};
 
/* External root clock */

[PATCH v2 05/11] ARM: dts: r8a7745: add SYS-DMAC support

[Sergei Shtylyov]

Describe SYS-DMAC0/1 in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag;
- refreshed the patch.

 arch/arm/boot/dts/r8a7745.dtsi |   64 +
 1 file changed, 64 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7745.dtsi
===
--- renesas.orig/arch/arm/boot/dts/r8a7745.dtsi
+++ renesas/arch/arm/boot/dts/r8a7745.dtsi
@@ -93,6 +93,70 @@
compatible = "renesas,r8a7745-rst";
reg = <0 0xe616 0 0x0200>;
};
+
+   dmac0: dma-controller@e670 {
+   compatible = "renesas,dmac-r8a7745",
+"renesas,rcar-dmac";
+   reg = <0 0xe670 0 0x2>;
+   interrupts = ;
+   interrupt-names = "error",
+   "ch0", "ch1", "ch2", "ch3",
+   "ch4", "ch5", "ch6", "ch7",
+   "ch8", "ch9", "ch10", "ch11",
+   "ch12", "ch13", "ch14";
+   clocks = < CPG_MOD 219>;
+   clock-names = "fck";
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   #dma-cells = <1>;
+   dma-channels = <15>;
+   };
+
+   dmac1: dma-controller@e672 {
+   compatible = "renesas,dmac-r8a7745",
+"renesas,rcar-dmac";
+   reg = <0 0xe672 0 0x2>;
+   interrupts = ;
+   interrupt-names = "error",
+   "ch0", "ch1", "ch2", "ch3",
+   "ch4", "ch5", "ch6", "ch7",
+   "ch8", "ch9", "ch10", "ch11",
+   "ch12", "ch13", "ch14";
+   clocks = < CPG_MOD 218>;
+   clock-names = "fck";
+   power-domains = < R8A7745_PD_ALWAYS_ON>;
+   #dma-cells = <1>;
+   dma-channels = <15>;
+   };
};
 
/* External root clock */

[PATCH v2 04/11] ARM: dts: r8a7745: initial SoC device tree

[Sergei Shtylyov]

The  initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- reformatted the "interrupts" props of the GIC/timer device nodes;
- added Geert's tag.

 arch/arm/boot/dts/r8a7745.dtsi |  120 +
 1 file changed, 120 insertions(+)

Index: renesas/arch/arm/boot/dts/r8a7745.dtsi
===
--- /dev/null
+++ renesas/arch/arm/boot/dts/r8a7745.dtsi
@@ -0,0 +1,120 @@
+/*
+ * Device Tree Source for the r8a7745 SoC
+ *
+ * Copyright (C) 2016 Cogent Embedded Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "renesas,r8a7745";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0>;
+   clock-frequency = <10>;
+   clocks = < CPG_CORE R8A7745_CLK_Z2>;
+   power-domains = < R8A7745_PD_CA7_CPU0>;
+   next-level-cache = <_CA7>;
+   };
+
+   L2_CA7: cache-controller@0 {
+   compatible = "cache";
+   reg = <0>;
+   cache-unified;
+   cache-level = <2>;
+   power-domains = < R8A7745_PD_CA7_SCU>;
+   };
+   };
+
+   soc {
+   compatible = "simple-bus";
+   interrupt-parent = <>;
+
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   gic: interrupt-controller@f1001000 {
+   compatible = "arm,gic-400";
+   #interrupt-cells = <3>;
+   #address-cells = <0>;
+   interrupt-controller;
+   reg = <0 0xf1001000 0 0x1000>,
+ <0 0xf1002000 0 0x1000>,
+ <0 0xf1004000 0 0x2000>,
+ <0 0xf1006000 0 0x2000>;
+   interrupts = ;
+   };
+
+   timer {
+   compatible = "arm,armv7-timer";
+   interrupts = ,
+,
+,
+;
+   };
+
+   cpg: clock-controller@e615 {
+   compatible = "renesas,r8a7745-cpg-mssr";
+   reg = <0 0xe615 0 0x1000>;
+   clocks = <_clk>, <_extal_clk>;
+   clock-names = "extal", "usb_extal";
+   #clock-cells = <2>;
+   #power-domain-cells = <0>;
+   };
+
+   sysc: system-controller@e618 {
+   compatible = "renesas,r8a7745-sysc";
+   reg = <0 0xe618 0 0x200>;
+   #power-domain-cells = <1>;
+   };
+
+   rst: reset-controller@e616 {
+   compatible = "renesas,r8a7745-rst";
+   reg = <0 0xe616 0 0x100>;
+   };
+   };
+
+   /* External root clock */
+   extal_clk: extal {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   /* This value must be overridden by the board. */
+   clock-frequency = <0>;
+   };
+
+   /* External USB clock - can be overridden by the board */
+   usb_extal_clk: usb_extal {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <4800>;
+   };
+
+   /* External SCIF clock */
+   scif_clk: scif {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   /* This value must be overridden by the board. */
+   clock-frequency = <0>;
+   };
+};

[PATCH v2 03/11] ARM: shmobile: r8a7745: basic SoC support

[Sergei Shtylyov]

Add minimal support for the RZ/G1E (R8A7745) SoC.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag;
- refreshed the patch.

 Documentation/devicetree/bindings/arm/shmobile.txt |2 ++
 arch/arm/mach-shmobile/Kconfig |4 
 arch/arm/mach-shmobile/setup-rcar-gen2.c   |1 +
 3 files changed, 7 insertions(+)

Index: renesas/Documentation/devicetree/bindings/arm/shmobile.txt
===
--- renesas.orig/Documentation/devicetree/bindings/arm/shmobile.txt
+++ renesas/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -15,6 +15,8 @@ SoCs:
 compatible = "renesas,r8a7740"
   - RZ/G1M (R8A77430)
 compatible = "renesas,r8a7743"
+  - RZ/G1E (R8A77450)
+compatible = "renesas,r8a7745"
   - R-Car M1A (R8A77781)
 compatible = "renesas,r8a7778"
   - R-Car H1 (R8A77790)
Index: renesas/arch/arm/mach-shmobile/Kconfig
===
--- renesas.orig/arch/arm/mach-shmobile/Kconfig
+++ renesas/arch/arm/mach-shmobile/Kconfig
@@ -73,6 +73,10 @@ config ARCH_R8A7743
select ARCH_RCAR_GEN2
select ARM_ERRATA_798181 if SMP
 
+config ARCH_R8A7745
+   bool "RZ/G1E (R8A77450)"
+   select ARCH_RCAR_GEN2
+
 config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
select ARCH_RCAR_GEN1
Index: renesas/arch/arm/mach-shmobile/setup-rcar-gen2.c
===
--- renesas.orig/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ renesas/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -227,6 +227,7 @@ MACHINE_END
 
 static const char * const rz_g1_boards_compat_dt[] __initconst = {
"renesas,r8a7743",
+   "renesas,r8a7745",
NULL,
 };
 

[PATCH v2 02/11] soc: renesas: rcar-sysc: add R8A7745 support

[Sergei Shtylyov]

Add support for RZ/G1E (R8A7745) SoC power areas to the R-Car SYSC driver.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag.

 Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt |1 
 drivers/soc/renesas/Makefile  |1 
 drivers/soc/renesas/r8a7745-sysc.c|   32 ++
 drivers/soc/renesas/rcar-sysc.c   |3 
 drivers/soc/renesas/rcar-sysc.h   |1 
 5 files changed, 38 insertions(+)

Index: renesas/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
===
--- renesas.orig/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
+++ renesas/Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt
@@ -8,6 +8,7 @@ and various coprocessors.
 Required properties:
   - compatible: Must contain exactly one of the following:
   - "renesas,r8a7743-sysc" (RZ/G1M)
+  - "renesas,r8a7745-sysc" (RZ/G1E)
   - "renesas,r8a7779-sysc" (R-Car H1)
   - "renesas,r8a7790-sysc" (R-Car H2)
   - "renesas,r8a7791-sysc" (R-Car M2-W)
Index: renesas/drivers/soc/renesas/Makefile
===
--- renesas.orig/drivers/soc/renesas/Makefile
+++ renesas/drivers/soc/renesas/Makefile
@@ -4,6 +4,7 @@ obj-$(CONFIG_ARCH_R8A7795)  += rcar-rst.o
 obj-$(CONFIG_ARCH_R8A7796) += rcar-rst.o
 
 obj-$(CONFIG_ARCH_R8A7743) += rcar-sysc.o r8a7743-sysc.o
+obj-$(CONFIG_ARCH_R8A7745) += rcar-sysc.o r8a7745-sysc.o
 obj-$(CONFIG_ARCH_R8A7779) += rcar-sysc.o r8a7779-sysc.o
 obj-$(CONFIG_ARCH_R8A7790) += rcar-sysc.o r8a7790-sysc.o
 obj-$(CONFIG_ARCH_R8A7791) += rcar-sysc.o r8a7791-sysc.o
Index: renesas/drivers/soc/renesas/r8a7745-sysc.c
===
--- /dev/null
+++ renesas/drivers/soc/renesas/r8a7745-sysc.c
@@ -0,0 +1,32 @@
+/*
+ * Renesas RZ/G1E System Controller
+ *
+ * Copyright (C) 2016 Cogent Embedded Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation; of the License.
+ */
+
+#include 
+#include 
+
+#include 
+
+#include "rcar-sysc.h"
+
+static const struct rcar_sysc_area r8a7745_areas[] __initconst = {
+   { "always-on",  0, 0, R8A7745_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
+   { "ca7-scu",0x100, 0, R8A7745_PD_CA7_SCU,   R8A7745_PD_ALWAYS_ON,
+ PD_SCU },
+   { "ca7-cpu0",   0x1c0, 0, R8A7745_PD_CA7_CPU0,  R8A7745_PD_CA7_SCU,
+ PD_CPU_NOCR },
+   { "ca7-cpu1",   0x1c0, 1, R8A7745_PD_CA7_CPU1,  R8A7745_PD_CA7_SCU,
+ PD_CPU_NOCR },
+   { "sgx", 0xc0, 0, R8A7745_PD_SGX,   R8A7745_PD_ALWAYS_ON },
+};
+
+const struct rcar_sysc_info r8a7745_sysc_info __initconst = {
+   .areas = r8a7745_areas,
+   .num_areas = ARRAY_SIZE(r8a7745_areas),
+};
Index: renesas/drivers/soc/renesas/rcar-sysc.c
===
--- renesas.orig/drivers/soc/renesas/rcar-sysc.c
+++ renesas/drivers/soc/renesas/rcar-sysc.c
@@ -278,6 +278,9 @@ static const struct of_device_id rcar_sy
 #ifdef CONFIG_ARCH_R8A7743
{ .compatible = "renesas,r8a7743-sysc", .data = _sysc_info },
 #endif
+#ifdef CONFIG_ARCH_R8A7745
+   { .compatible = "renesas,r8a7745-sysc", .data = _sysc_info },
+#endif
 #ifdef CONFIG_ARCH_R8A7779
{ .compatible = "renesas,r8a7779-sysc", .data = _sysc_info },
 #endif
Index: renesas/drivers/soc/renesas/rcar-sysc.h
===
--- renesas.orig/drivers/soc/renesas/rcar-sysc.h
+++ renesas/drivers/soc/renesas/rcar-sysc.h
@@ -51,6 +51,7 @@ struct rcar_sysc_info {
 };
 
 extern const struct rcar_sysc_info r8a7743_sysc_info;
+extern const struct rcar_sysc_info r8a7745_sysc_info;
 extern const struct rcar_sysc_info r8a7779_sysc_info;
 extern const struct rcar_sysc_info r8a7790_sysc_info;
 extern const struct rcar_sysc_info r8a7791_sysc_info;

[PATCH v2 01/11] ARM: shmobile: r8a7745: add power domain index macros

[Sergei Shtylyov]

Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 

---
Changes in version 2:
- added Geert's tag.

 include/dt-bindings/power/r8a7745-sysc.h |   25 +
 1 file changed, 25 insertions(+)

Index: renesas/include/dt-bindings/power/r8a7745-sysc.h
===
--- /dev/null
+++ renesas/include/dt-bindings/power/r8a7745-sysc.h
@@ -0,0 +1,25 @@
+/*
+ * Copyright (C) 2016 Cogent Embedded Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A7745_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A7745_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A7745_PD_CA7_CPU0 5
+#define R8A7745_PD_CA7_CPU1 6
+#define R8A7745_PD_SGX 20
+#define R8A7745_PD_CA7_SCU 21
+
+/* Always-on power area */
+#define R8A7745_PD_ALWAYS_ON   32
+
+#endif /* __DT_BINDINGS_POWER_R8A7745_SYSC_H__ */

[PATCH v2 0/11] Add R8A7745/SK-RZG1E board support

[Sergei Shtylyov]

Hello.

   Here's the set of 11 patches against Simon Horman's 'renesas.git' repo's
'renesas-devel-201611104-v4.9-rc3' tag plus the R8A7743/SK-RZG1M patch series
posted earlier. I'm adding the device tree support for the R8A7745-based
SK-RZG1E board. The SoC is close to R8A7794 and the board seems identical to the
R8A7794/SILK board. The device tree patches depend on the R8A7745 CPG/MSSR
driver series in order to compile and work.

[01/11] ARM: shmobile: r8a7745: add power domain index macros
[02/11] soc: renesas: rcar-sysc: add R8A7745 support
[03/11] ARM: shmobile: r8a7745: basic SoC support
[04/11] ARM: dts: r8a7745: initial SoC device tree
[05/11] ARM: dts: r8a7745: add SYS-DMAC support
[06/11] ARM: dts: r8a7745: add [H]SCIF{|A|B} support
[07/11] ARM: dts: r8a7745: add Ether support
[08/11] ARM: dts: r8a7745: add IRQC support
[09/11] ARM: shmobile: document SK-RZG1E board
[10/11] ARM: dts: sk-rzg1e: initial device tree
[11/11] ARM: dts: sk-rzg1e: add Ether support

WBR, Sergei

Re: [PATCH v4 00/23] soc: renesas: Add R-Car RST driver for obtaining mode pin state

[Stephen Boyd]

On 11/02, Geert Uytterhoeven wrote:
> On Tue, Nov 1, 2016 at 12:25 AM, Stephen Boyd  wrote:
> >
> > Would the pull requests for clk also have dts changes at the base
> > of the tree? Perhaps clk side can just ack the clk patches and
> 
> Yes they would: this is moving functionality from platform code to DT.
> Without the DT updates, it will break bisection (except for R-Car Gen2,
> where we have fallback code to handle old DTBs).
> 
> > then have it all routed through arm-soc? The only worry I have is
> > if we need to make some sort of change in clk side that conflicts
> > with these changes. I don't usually like taking dts changes
> > through clk tree, so I'd like to avoid that if possible.
> 
> Everything could go through arm-soc only with your Acked-by.
> However, there are new clock drivers pending on this series.
> Either they have to go through arm-soc, too, or this series would
> be pulled into the clk tree with these new clock drivers.
> 
> > Part E could happen anytime after everything else happens, so
> > that doesn't seem like a concern.
> 
> Part E can indeed by postponed.
> But if parts A-D are applied together, there's no reason to postpone part E.
> 
> > Part C could also be made to
> > only call into the new reset drivers if the reset dts nodes are
> > present? If that's done then we could merge clk patches anytime
> > and remove the dead code and the node search at some later time
> > when everything has settled?
> 
> That would require adding more backwards compatibility code for
> old DTBs, even for platform where we're not interested in maintaining
> that. In addition, Part C depends on the header file for the reset driver
> to compile the clock driver, even if you would add some DT detection,
> and on the reset driver to link. So I'm afraid this is not feasible.
> 

TL;DR: Sounds fine, I'll be on the lookout for the PR.

Longer version: Let me step back a bit and actually think about
this longer than 2 minutes. From what I see
rcar_rst_read_mode_pins() already returns -ENODEV if the nodes
aren't present. Great.

So clk tree could be given a pull for the clk patches, part C, on
top of part A, the reset driver. If the rcar_rst_read_mode_pins()
returns failure because the node is missing, we fall back to the
old style of doing things. Some drivers already do that anyway,
so this looks to be replacing things like 

if (rcar_rst_read_mode_pins())
return;

with

if (rcar_rst_read_mode_pins() != -ENODEV)
return;


Then in arm-soc tree, the dts patches are merged. That causes us
to do some duplicate work reading the pins twice in mach-shmobile
and in the new reset driver. That's duplicate/wasteful, but it
works. Finally, everything is merged together into a tagged
release. The mach-shmobile changes can happen anytime after that
(part D). Again we're left with dead code in the clk driver (part
E) until the dependency merges, but that's ok. Once part D merges
we can get rid of the dead code in part E and any backwards
compatibility we don't want to maintain.

In summary, it's all feasible to do this and most people wouldn't
have had to know about the dependency chain but it's not fast by
any means. Instead we merge everything in one shot and get it
over with now.

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 3/4] v4l: vsp1: Calculate partition sizes at stream start.

[Kieran Bingham]

Previously the active window and partition sizes for each partition is
calculated for each partition every frame. This data is constant and
only needs to be calculated once at the start of the stream.

Extend the vsp1_pipe object to store the maximum number of partitions
possible and pre-calculate the partition sizes into this table.

Signed-off-by: Kieran Bingham 
---
 drivers/media/platform/vsp1/vsp1_pipe.h  | 6 ++
 drivers/media/platform/vsp1/vsp1_video.c | 8 ++--
 2 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1_pipe.h 
b/drivers/media/platform/vsp1/vsp1_pipe.h
index f181949824c9..3af96c4ea244 100644
--- a/drivers/media/platform/vsp1/vsp1_pipe.h
+++ b/drivers/media/platform/vsp1/vsp1_pipe.h
@@ -20,6 +20,9 @@
 
 #include 
 
+/* Max Video Width / Min Partition Size = 8190/128 */
+#define VSP1_PIPE_MAX_PARTITIONS 64
+
 struct vsp1_dl_list;
 struct vsp1_rwpf;
 
@@ -81,7 +84,9 @@ enum vsp1_pipeline_state {
  * @dl: display list associated with the pipeline
  * @div_size: The maximum allowed partition size for the pipeline
  * @partitions: The number of partitions used to process one frame
+ * @partition: The current partition for configuration to process
  * @current_partition: The partition number currently being configured
+ * @part_table: The pre-calculated partitions used by the pipeline
  */
 struct vsp1_pipeline {
struct media_pipeline pipe;
@@ -116,6 +121,7 @@ struct vsp1_pipeline {
unsigned int partitions;
struct v4l2_rect partition;
unsigned int current_partition;
+   struct v4l2_rect part_table[VSP1_PIPE_MAX_PARTITIONS];
 };
 
 void vsp1_pipeline_reset(struct vsp1_pipeline *pipe);
diff --git a/drivers/media/platform/vsp1/vsp1_video.c 
b/drivers/media/platform/vsp1/vsp1_video.c
index 6d43c02bbc56..c4a8c30df108 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -255,6 +255,7 @@ static void vsp1_video_pipeline_setup_partitions(struct 
vsp1_pipeline *pipe)
const struct v4l2_mbus_framefmt *format;
struct vsp1_entity *entity;
unsigned int div_size;
+   int i;
 
/*
 * Partitions are computed on the size before rotation, use the format
@@ -269,6 +270,7 @@ static void vsp1_video_pipeline_setup_partitions(struct 
vsp1_pipeline *pipe)
if (vsp1->info->gen == 2) {
pipe->div_size = div_size;
pipe->partitions = 1;
+   pipe->part_table[0] = vsp1_video_partition(pipe, div_size, 0);
return;
}
 
@@ -284,6 +286,9 @@ static void vsp1_video_pipeline_setup_partitions(struct 
vsp1_pipeline *pipe)
 
pipe->div_size = div_size;
pipe->partitions = DIV_ROUND_UP(format->width, div_size);
+
+   for (i = 0; i < pipe->partitions; i++)
+   pipe->part_table[i] = vsp1_video_partition(pipe, div_size, i);
 }
 
 /* 
-
@@ -355,8 +360,7 @@ static void vsp1_video_pipeline_run_partition(struct 
vsp1_pipeline *pipe,
 {
struct vsp1_entity *entity;
 
-   pipe->partition = vsp1_video_partition(pipe, pipe->div_size,
-  pipe->current_partition);
+   pipe->partition = pipe->part_table[pipe->current_partition];
 
list_for_each_entry(entity, >entities, list_pipe) {
if (entity->ops->configure)
-- 
2.7.4

[PATCH 0/4] vsp1 partition algorithm improvements

[Kieran Bingham]

Some updates and initial improvements for the VSP1 partition algorithm that
remove redundant processing and variables, reducing the processing done in
interrupt context slightly.

Patch 1 brings in some protection against invalid pipeline configurations that
are not supported by the partition algorithm on Gen3 hardware.

Patches 2,3 and 4 clean up the calculation of the partition sizes such that they
are only calculated once at streamon - and the partition windows are stored in
the vsp1_pipeline object.

Kieran Bingham (4):
  v4l: vsp1: Implement partition algorithm restrictions
  v4l: vsp1: Move vsp1_video_pipeline_setup_partitions() function
  v4l: vsp1: Calculate partition sizes at stream start.
  v4l: vsp1: Remove redundant context variables

 drivers/media/platform/vsp1/vsp1_pipe.h  |  10 ++-
 drivers/media/platform/vsp1/vsp1_sru.c   |   7 +-
 drivers/media/platform/vsp1/vsp1_sru.h   |   1 +
 drivers/media/platform/vsp1/vsp1_video.c | 124 +++
 4 files changed, 89 insertions(+), 53 deletions(-)

-- 
2.7.4

[PATCH 4/4] v4l: vsp1: Remove redundant context variables

[Kieran Bingham]

The vsp1_pipe object context variables for div_size and
current_partition allowed state to be maintained through processing the
partitions during processing.

Now that the partition tables are calculated during stream on, there is
no requirement to store these variables in the pipe object.

Utilise local variables for the processing as required.

Signed-off-by: Kieran Bingham 
---
 drivers/media/platform/vsp1/vsp1_pipe.h  |  4 
 drivers/media/platform/vsp1/vsp1_video.c | 19 +--
 2 files changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1_pipe.h 
b/drivers/media/platform/vsp1/vsp1_pipe.h
index 3af96c4ea244..9e108ddcceb6 100644
--- a/drivers/media/platform/vsp1/vsp1_pipe.h
+++ b/drivers/media/platform/vsp1/vsp1_pipe.h
@@ -82,10 +82,8 @@ enum vsp1_pipeline_state {
  * @uds_input: entity at the input of the UDS, if the UDS is present
  * @entities: list of entities in the pipeline
  * @dl: display list associated with the pipeline
- * @div_size: The maximum allowed partition size for the pipeline
  * @partitions: The number of partitions used to process one frame
  * @partition: The current partition for configuration to process
- * @current_partition: The partition number currently being configured
  * @part_table: The pre-calculated partitions used by the pipeline
  */
 struct vsp1_pipeline {
@@ -117,10 +115,8 @@ struct vsp1_pipeline {
 
struct vsp1_dl_list *dl;
 
-   unsigned int div_size;
unsigned int partitions;
struct v4l2_rect partition;
-   unsigned int current_partition;
struct v4l2_rect part_table[VSP1_PIPE_MAX_PARTITIONS];
 };
 
diff --git a/drivers/media/platform/vsp1/vsp1_video.c 
b/drivers/media/platform/vsp1/vsp1_video.c
index c4a8c30df108..9efaab2cc982 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -268,7 +268,6 @@ static void vsp1_video_pipeline_setup_partitions(struct 
vsp1_pipeline *pipe)
 
/* Gen2 hardware doesn't require image partitioning. */
if (vsp1->info->gen == 2) {
-   pipe->div_size = div_size;
pipe->partitions = 1;
pipe->part_table[0] = vsp1_video_partition(pipe, div_size, 0);
return;
@@ -284,7 +283,6 @@ static void vsp1_video_pipeline_setup_partitions(struct 
vsp1_pipeline *pipe)
}
}
 
-   pipe->div_size = div_size;
pipe->partitions = DIV_ROUND_UP(format->width, div_size);
 
for (i = 0; i < pipe->partitions; i++)
@@ -356,11 +354,12 @@ static void vsp1_video_frame_end(struct vsp1_pipeline 
*pipe,
 }
 
 static void vsp1_video_pipeline_run_partition(struct vsp1_pipeline *pipe,
- struct vsp1_dl_list *dl)
+ struct vsp1_dl_list *dl,
+ unsigned int partition_number)
 {
struct vsp1_entity *entity;
 
-   pipe->partition = pipe->part_table[pipe->current_partition];
+   pipe->partition = pipe->part_table[partition_number];
 
list_for_each_entry(entity, >entities, list_pipe) {
if (entity->ops->configure)
@@ -373,6 +372,7 @@ static void vsp1_video_pipeline_run(struct vsp1_pipeline 
*pipe)
 {
struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
struct vsp1_entity *entity;
+   unsigned int current_partition = 0;
 
if (!pipe->dl)
pipe->dl = vsp1_dl_list_get(pipe->output->dlm);
@@ -389,13 +389,12 @@ static void vsp1_video_pipeline_run(struct vsp1_pipeline 
*pipe)
}
 
/* Run the first partition */
-   pipe->current_partition = 0;
-   vsp1_video_pipeline_run_partition(pipe, pipe->dl);
+   vsp1_video_pipeline_run_partition(pipe, pipe->dl, current_partition);
 
/* Process consecutive partitions as necessary */
-   for (pipe->current_partition = 1;
-pipe->current_partition < pipe->partitions;
-pipe->current_partition++) {
+   for (current_partition = 1;
+current_partition < pipe->partitions;
+current_partition++) {
struct vsp1_dl_list *dl;
 
/*
@@ -415,7 +414,7 @@ static void vsp1_video_pipeline_run(struct vsp1_pipeline 
*pipe)
break;
}
 
-   vsp1_video_pipeline_run_partition(pipe, dl);
+   vsp1_video_pipeline_run_partition(pipe, dl, current_partition);
vsp1_dl_list_add_chain(pipe->dl, dl);
}
 
-- 
2.7.4

[PATCH 1/4] v4l: vsp1: Implement partition algorithm restrictions

[Kieran Bingham]

The partition algorithm introduced to support scaling, and rotation on
Gen3 hardware has some restrictions on pipeline configuration.

The UDS must not be connected after the SRU in a pipeline, and whilst an
SRU can be connected before the UDS, it can only do so in identity mode.

On Gen3 hardware, the use of an SRU will always engage the partition
algorithm, therefore we must always ensure the restrictions are met on
Gen3 hardware utilising an SRU in the pipeline.

A pipeline with an SRU connected after the UDS will disable any scaling
features of the SRU.

Signed-off-by: Kieran Bingham 
---
 drivers/media/platform/vsp1/vsp1_sru.c   |  7 +--
 drivers/media/platform/vsp1/vsp1_sru.h   |  1 +
 drivers/media/platform/vsp1/vsp1_video.c | 29 -
 3 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1_sru.c 
b/drivers/media/platform/vsp1/vsp1_sru.c
index b4e568a3b4ed..42a3ed6d9461 100644
--- a/drivers/media/platform/vsp1/vsp1_sru.c
+++ b/drivers/media/platform/vsp1/vsp1_sru.c
@@ -152,7 +152,8 @@ static int sru_enum_frame_size(struct v4l2_subdev *subdev,
fse->min_width = format->width;
fse->min_height = format->height;
if (format->width <= SRU_MAX_SIZE / 2 &&
-   format->height <= SRU_MAX_SIZE / 2) {
+   format->height <= SRU_MAX_SIZE / 2 &&
+   sru->force_identity_mode == false) {
fse->max_width = format->width * 2;
fse->max_height = format->height * 2;
} else {
@@ -203,7 +204,8 @@ static void sru_try_format(struct vsp1_sru *sru,
 
if (fmt->width <= SRU_MAX_SIZE / 2 &&
fmt->height <= SRU_MAX_SIZE / 2 &&
-   output_area > input_area * 9 / 4) {
+   output_area > input_area * 9 / 4 &&
+   sru->force_identity_mode == false) {
fmt->width = format->width * 2;
fmt->height = format->height * 2;
} else {
@@ -355,6 +357,7 @@ struct vsp1_sru *vsp1_sru_create(struct vsp1_device *vsp1)
v4l2_ctrl_new_custom(>ctrls, _intensity_control, NULL);
 
sru->intensity = 1;
+   sru->force_identity_mode = false;
 
sru->entity.subdev.ctrl_handler = >ctrls;
 
diff --git a/drivers/media/platform/vsp1/vsp1_sru.h 
b/drivers/media/platform/vsp1/vsp1_sru.h
index 85e241457af2..f8652c04268e 100644
--- a/drivers/media/platform/vsp1/vsp1_sru.h
+++ b/drivers/media/platform/vsp1/vsp1_sru.h
@@ -30,6 +30,7 @@ struct vsp1_sru {
struct v4l2_ctrl_handler ctrls;
 
unsigned int intensity;
+   bool force_identity_mode;
 };
 
 static inline struct vsp1_sru *to_sru(struct v4l2_subdev *subdev)
diff --git a/drivers/media/platform/vsp1/vsp1_video.c 
b/drivers/media/platform/vsp1/vsp1_video.c
index f19d879ce5ee..d1d3413c6fdf 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -35,6 +35,7 @@
 #include "vsp1_hgt.h"
 #include "vsp1_pipe.h"
 #include "vsp1_rwpf.h"
+#include "vsp1_sru.h"
 #include "vsp1_uds.h"
 #include "vsp1_video.h"
 
@@ -458,10 +459,12 @@ static int vsp1_video_pipeline_build_branch(struct 
vsp1_pipeline *pipe,
struct vsp1_rwpf *input,
struct vsp1_rwpf *output)
 {
+   struct vsp1_device *vsp1 = output->entity.vsp1;
struct media_entity_enum ent_enum;
struct vsp1_entity *entity;
struct media_pad *pad;
bool bru_found = false;
+   bool sru_found = false;
int ret;
 
ret = media_entity_enum_init(_enum, >entity.vsp1->media_dev);
@@ -512,13 +515,37 @@ static int vsp1_video_pipeline_build_branch(struct 
vsp1_pipeline *pipe,
goto out;
}
 
-   /* UDS can't be chained. */
+   if (entity->type == VSP1_ENTITY_SRU) {
+   struct vsp1_sru *sru = to_sru(>subdev);
+
+   /*
+* Gen3 partition algorithm restricts SRU double-scaled
+* resolution if it is connected after a UDS entity
+*/
+   if (vsp1->info->gen == 3 && pipe->uds)
+   sru->force_identity_mode = true;
+
+   sru_found = true;
+   }
+
if (entity->type == VSP1_ENTITY_UDS) {
+   /* UDS can't be chained. */
if (pipe->uds) {
ret = -EPIPE;
goto out;
}
 
+   /*
+* On Gen3 hardware using the partition algorithm, the
+* UDS must not be connected after the SRU. Using the
+* SRU on 

[PATCH 2/4] v4l: vsp1: Move vsp1_video_pipeline_setup_partitions() function

[Kieran Bingham]

Separate the code change from the function move so that code changes can
be clearly identified. This commit has no functional change.

The partition algorithm functions will be changed, and
vsp1_video_partition() will call vsp1_video_pipeline_setup_partitions().
To prepare for that, move the function without any code change.

Signed-off-by: Kieran Bingham 
---
 drivers/media/platform/vsp1/vsp1_video.c | 74 
 1 file changed, 37 insertions(+), 37 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1_video.c 
b/drivers/media/platform/vsp1/vsp1_video.c
index d1d3413c6fdf..6d43c02bbc56 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -175,43 +175,6 @@ static int __vsp1_video_try_format(struct vsp1_video 
*video,
  * VSP1 Partition Algorithm support
  */
 
-static void vsp1_video_pipeline_setup_partitions(struct vsp1_pipeline *pipe)
-{
-   struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
-   const struct v4l2_mbus_framefmt *format;
-   struct vsp1_entity *entity;
-   unsigned int div_size;
-
-   /*
-* Partitions are computed on the size before rotation, use the format
-* at the WPF sink.
-*/
-   format = vsp1_entity_get_pad_format(>output->entity,
-   pipe->output->entity.config,
-   RWPF_PAD_SINK);
-   div_size = format->width;
-
-   /* Gen2 hardware doesn't require image partitioning. */
-   if (vsp1->info->gen == 2) {
-   pipe->div_size = div_size;
-   pipe->partitions = 1;
-   return;
-   }
-
-   list_for_each_entry(entity, >entities, list_pipe) {
-   unsigned int entity_max = VSP1_VIDEO_MAX_WIDTH;
-
-   if (entity->ops->max_width) {
-   entity_max = entity->ops->max_width(entity, pipe);
-   if (entity_max)
-   div_size = min(div_size, entity_max);
-   }
-   }
-
-   pipe->div_size = div_size;
-   pipe->partitions = DIV_ROUND_UP(format->width, div_size);
-}
-
 /**
  * vsp1_video_partition - Calculate the active partition output window
  *
@@ -286,6 +249,43 @@ static struct v4l2_rect vsp1_video_partition(struct 
vsp1_pipeline *pipe,
return partition;
 }
 
+static void vsp1_video_pipeline_setup_partitions(struct vsp1_pipeline *pipe)
+{
+   struct vsp1_device *vsp1 = pipe->output->entity.vsp1;
+   const struct v4l2_mbus_framefmt *format;
+   struct vsp1_entity *entity;
+   unsigned int div_size;
+
+   /*
+* Partitions are computed on the size before rotation, use the format
+* at the WPF sink.
+*/
+   format = vsp1_entity_get_pad_format(>output->entity,
+   pipe->output->entity.config,
+   RWPF_PAD_SINK);
+   div_size = format->width;
+
+   /* Gen2 hardware doesn't require image partitioning. */
+   if (vsp1->info->gen == 2) {
+   pipe->div_size = div_size;
+   pipe->partitions = 1;
+   return;
+   }
+
+   list_for_each_entry(entity, >entities, list_pipe) {
+   unsigned int entity_max = VSP1_VIDEO_MAX_WIDTH;
+
+   if (entity->ops->max_width) {
+   entity_max = entity->ops->max_width(entity, pipe);
+   if (entity_max)
+   div_size = min(div_size, entity_max);
+   }
+   }
+
+   pipe->div_size = div_size;
+   pipe->partitions = DIV_ROUND_UP(format->width, div_size);
+}
+
 /* 
-
  * Pipeline Management
  */
-- 
2.7.4

[PATCHv2 2/2] v4l: vsp1: Provide a writeback video device

[Kieran Bingham]

When the VSP1 is used in an active display pipeline, the output of the
WPF can supply the LIF entity directly and simultaneously write to
memory.

Support this functionality in the VSP1 driver, by extending the WPF
source pads, and establishing a V4L2 video device node connected to the
new source.

The source will be able to perform pixel format conversion, but not
rescaling, and as such the output from the memory node will always be
of the same dimensions as the display output.

Signed-off-by: Kieran Bingham 

---
Changes since RFC
 - Fix checkpatch.pl warnings
 - Adapt to use a single source pad for the Writeback and LIF
 - Use WPF properties to determine when to create links instead of VSP
 - Remove incorrect vsp1_video_verify_format() changes
 - Spelling and grammar fixes
---
 drivers/media/platform/vsp1/vsp1.h   |   1 +
 drivers/media/platform/vsp1/vsp1_drm.c   |  19 
 drivers/media/platform/vsp1/vsp1_drv.c   |   5 +-
 drivers/media/platform/vsp1/vsp1_rwpf.h  |   1 +
 drivers/media/platform/vsp1/vsp1_video.c | 150 ++-
 drivers/media/platform/vsp1/vsp1_video.h |   5 ++
 drivers/media/platform/vsp1/vsp1_wpf.c   |  19 +++-
 7 files changed, 193 insertions(+), 7 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1.h 
b/drivers/media/platform/vsp1/vsp1.h
index 85387a64179a..a2d462264312 100644
--- a/drivers/media/platform/vsp1/vsp1.h
+++ b/drivers/media/platform/vsp1/vsp1.h
@@ -54,6 +54,7 @@ struct vsp1_uds;
 #define VSP1_HAS_WPF_HFLIP (1 << 6)
 #define VSP1_HAS_HGO   (1 << 7)
 #define VSP1_HAS_HGT   (1 << 8)
+#define VSP1_HAS_WPF_WRITEBACK (1 << 9)
 
 struct vsp1_device_info {
u32 version;
diff --git a/drivers/media/platform/vsp1/vsp1_drm.c 
b/drivers/media/platform/vsp1/vsp1_drm.c
index 0daf5f2c06e2..9bb7c1a04157 100644
--- a/drivers/media/platform/vsp1/vsp1_drm.c
+++ b/drivers/media/platform/vsp1/vsp1_drm.c
@@ -27,6 +27,7 @@
 #include "vsp1_lif.h"
 #include "vsp1_pipe.h"
 #include "vsp1_rwpf.h"
+#include "vsp1_video.h"
 
 
 /* 
-
@@ -479,6 +480,13 @@ void vsp1_du_atomic_flush(struct device *dev)
__func__, rpf->entity.index);
}
 
+   /*
+* If we have a writeback node attached, we use this opportunity to
+* update the video buffers.
+*/
+   if (pipe->output->video && pipe->output->video->frame_end)
+   pipe->output->video->frame_end(pipe);
+
/* Configure all entities in the pipeline. */
list_for_each_entry(entity, >entities, list_pipe) {
/* Disconnect unused RPFs from the pipeline. */
@@ -590,6 +598,16 @@ int vsp1_drm_create_links(struct vsp1_device *vsp1)
if (ret < 0)
return ret;
 
+   if (vsp1->wpf[0]->has_writeback) {
+   /* Connect the video device to the WPF for Writeback support */
+   ret = media_create_pad_link(>wpf[0]->entity.subdev.entity,
+   RWPF_PAD_SOURCE,
+   >wpf[0]->video->video.entity,
+   0, flags);
+   if (ret < 0)
+   return ret;
+   }
+
return 0;
 }
 
@@ -620,6 +638,7 @@ int vsp1_drm_init(struct vsp1_device *vsp1)
pipe->bru = >bru->entity;
pipe->lif = >lif->entity;
pipe->output = vsp1->wpf[0];
+   pipe->output->pipe = pipe;
 
return 0;
 }
diff --git a/drivers/media/platform/vsp1/vsp1_drv.c 
b/drivers/media/platform/vsp1/vsp1_drv.c
index 3b084976094b..42fa822b38d3 100644
--- a/drivers/media/platform/vsp1/vsp1_drv.c
+++ b/drivers/media/platform/vsp1/vsp1_drv.c
@@ -408,7 +408,7 @@ static int vsp1_create_entities(struct vsp1_device *vsp1)
vsp1->wpf[i] = wpf;
list_add_tail(>entity.list_dev, >entities);
 
-   if (vsp1->info->uapi) {
+   if (vsp1->info->uapi || wpf->has_writeback) {
struct vsp1_video *video = vsp1_video_create(vsp1, wpf);
 
if (IS_ERR(video)) {
@@ -705,7 +705,8 @@ static const struct vsp1_device_info vsp1_device_infos[] = {
.version = VI6_IP_VERSION_MODEL_VSPD_GEN3,
.model = "VSP2-D",
.gen = 3,
-   .features = VSP1_HAS_BRU | VSP1_HAS_LIF | VSP1_HAS_WPF_VFLIP,
+   .features = VSP1_HAS_BRU | VSP1_HAS_LIF | VSP1_HAS_WPF_VFLIP
+ | VSP1_HAS_WPF_WRITEBACK,
.rpf_count = 5,
.wpf_count = 2,
.num_bru_inputs = 5,
diff --git a/drivers/media/platform/vsp1/vsp1_rwpf.h 
b/drivers/media/platform/vsp1/vsp1_rwpf.h
index b4ffc38f48af..7502b467294a 100644
--- a/drivers/media/platform/vsp1/vsp1_rwpf.h
+++ b/drivers/media/platform/vsp1/vsp1_rwpf.h
@@ -53,6 +53,7 @@ struct vsp1_rwpf {
 
u32 mult_alpha;
u32 outfmt;

[PATCHv2 1/2] Revert "[media] v4l: vsp1: Supply frames to the DU continuously"

[Kieran Bingham]

This reverts commit 3299ba5c0b21 ("[media] v4l: vsp1: Supply frames to
the DU continuously")

The DU output mode does not rely on frames being supplied on the WPF as
its pipeline is supplied from DRM. For the upcoming WPF writeback
functionality, we will choose to enable writeback mode if there is an
output buffer, or disable it (leaving the existing display pipeline
unharmed) otherwise.

Signed-off-by: Kieran Bingham 
---
 drivers/media/platform/vsp1/vsp1_video.c | 11 ---
 1 file changed, 11 deletions(-)

diff --git a/drivers/media/platform/vsp1/vsp1_video.c 
b/drivers/media/platform/vsp1/vsp1_video.c
index 94b428596c4f..f10401065cd3 100644
--- a/drivers/media/platform/vsp1/vsp1_video.c
+++ b/drivers/media/platform/vsp1/vsp1_video.c
@@ -296,11 +296,6 @@ static struct v4l2_rect vsp1_video_partition(struct 
vsp1_pipeline *pipe,
  * This function completes the current buffer by filling its sequence number,
  * time stamp and payload size, and hands it back to the videobuf core.
  *
- * When operating in DU output mode (deep pipeline to the DU through the LIF),
- * the VSP1 needs to constantly supply frames to the display. In that case, if
- * no other buffer is queued, reuse the one that has just been processed 
instead
- * of handing it back to the videobuf core.
- *
  * Return the next queued buffer or NULL if the queue is empty.
  */
 static struct vsp1_vb2_buffer *
@@ -322,12 +317,6 @@ vsp1_video_complete_buffer(struct vsp1_video *video)
done = list_first_entry(>irqqueue,
struct vsp1_vb2_buffer, queue);
 
-   /* In DU output mode reuse the buffer if the list is singular. */
-   if (pipe->lif && list_is_singular(>irqqueue)) {
-   spin_unlock_irqrestore(>irqlock, flags);
-   return done;
-   }
-
list_del(>queue);
 
if (!list_empty(>irqqueue))
-- 
2.7.4

[PATCHv2 0/2] vsp1 writeback prototype

[Kieran Bingham]

Resending this patch series to bring in dri-devel, and interested parties.
Apologies for the resend to linux-media and linux-renesas-soc.

This short series extends the VSP1 on the RCar platforms to allow creating a
V4L2 video node on display pipelines where the hardware allows writing to
memory simultaneously.

In this instance, the hardware restricts the output to match the display size
(no rescaling) but does allow pixel format conversion.

A current limitation (that the DRI devs might have ideas about) is that the vb2
buffers are swapped on the atomic_flush() calls rather than on vsync events.

Ideally swapping buffers would occur on every vsync such that the output rate
of the video node would match the display rate, however the timing here proves
more difficult to synchronise the updates from a vysnc and flush without adding
latency to the flush.

Is there anything I can do to synchronise the v4l2 buffers with the DRM/KMS
interfaces currently? Or does anyone have any suggestions for extending as
such?

And of course ideas on anything that could be done generically to support other
targets as well would be worth considering - though currently this
implementation is very RCar/VSP1 specific.


Kieran Bingham (2):
  Revert "[media] v4l: vsp1: Supply frames to the DU continuously"
  v4l: vsp1: Provide a writeback video device

 drivers/media/platform/vsp1/vsp1.h   |   1 +
 drivers/media/platform/vsp1/vsp1_drm.c   |  19 
 drivers/media/platform/vsp1/vsp1_drv.c   |   5 +-
 drivers/media/platform/vsp1/vsp1_rwpf.h  |   1 +
 drivers/media/platform/vsp1/vsp1_video.c | 161 ---
 drivers/media/platform/vsp1/vsp1_video.h |   5 +
 drivers/media/platform/vsp1/vsp1_wpf.c   |  19 +++-
 7 files changed, 193 insertions(+), 18 deletions(-)

-- 
2.7.4

Applied "spi: rspi: supports 32bytes buffer for DUAL and QUAD" to the spi tree

[Mark Brown]

The patch

   spi: rspi: supports 32bytes buffer for DUAL and QUAD

has been applied to the spi tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 3be09bec42a800d4f8ead8119c462f3eb4fad435 Mon Sep 17 00:00:00 2001
From: Hiep Cao Minh 
Date: Fri, 4 Nov 2016 17:38:54 +0900
Subject: [PATCH] spi: rspi: supports 32bytes buffer for DUAL and QUAD

This patch supports 32bytes of buffer for DUAL and QUAD in QSPI by
Using Transmit/Receive Buffer Data Triggering Number.
In order to improve the DUAL and QUAD's performance of SPI
while transferring data in PIO mode, it sends/receives each 32bytes
data instead of each byte data as current situation.

Signed-off-by: Hiep Cao Minh 
Signed-off-by: Mark Brown 
---
 drivers/spi/spi-rspi.c | 52 +++---
 1 file changed, 49 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index a816f07e168e..3bab75ab1b25 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -413,7 +413,7 @@ static unsigned int qspi_set_send_trigger(struct rspi_data 
*rspi,
return n;
 }
 
-static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
+static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
 {
unsigned int n;
 
@@ -428,6 +428,7 @@ static void qspi_set_receive_trigger(struct rspi_data 
*rspi, unsigned int len)
qspi_update(rspi, SPBFCR_RXTRG_MASK,
 SPBFCR_RXTRG_1B, QSPI_SPBFCR);
}
+   return n;
 }
 
 #define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
@@ -514,6 +515,51 @@ static int rspi_pio_transfer(struct rspi_data *rspi, const 
u8 *tx, u8 *rx,
return 0;
 }
 
+static int rspi_pio_transfer_in_or_our(struct rspi_data *rspi, const u8 *tx,
+  u8 *rx, unsigned int n)
+{
+   unsigned int i, len;
+   int ret;
+
+   while (n > 0) {
+   if (tx) {
+   len = qspi_set_send_trigger(rspi, n);
+   if (len == QSPI_BUFFER_SIZE) {
+   ret = rspi_wait_for_tx_empty(rspi);
+   if (ret < 0) {
+   dev_err(>master->dev, "transmit 
timeout\n");
+   return ret;
+   }
+   for (i = 0; i < len; i++)
+   rspi_write_data(rspi, *tx++);
+   } else {
+   ret = rspi_pio_transfer(rspi, tx, NULL, n);
+   if (ret < 0)
+   return ret;
+   }
+   }
+   if (rx) {
+   len = qspi_set_receive_trigger(rspi, n);
+   if (len == QSPI_BUFFER_SIZE) {
+   ret = rspi_wait_for_rx_full(rspi);
+   if (ret < 0) {
+   dev_err(>master->dev, "receive 
timeout\n");
+   return ret;
+   }
+   for (i = 0; i < len; i++)
+   *rx++ = rspi_read_data(rspi);
+   } else {
+   ret = rspi_pio_transfer(rspi, NULL, rx, n);
+   if (ret < 0)
+   return ret;
+   *rx++ = ret;
+   }
+   }
+   n -= len;
+   }
+   return 0;
+}
+
 static void rspi_dma_complete(void *arg)
 {
struct rspi_data *rspi = arg;
@@ -793,7 +839,7 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct 
spi_transfer *xfer)
return ret;
}
 
-   ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len);
+   ret = rspi_pio_transfer_in_or_our(rspi, xfer->tx_buf, NULL, xfer->len);
if (ret < 0)
return ret;
 
@@ -811,7 +857,7 @@ static int 

Re: [PATCH 1/1] ARM: spi supports 32bytes buffer for DUAL and QUAD

[Mark Brown]

On Fri, Nov 04, 2016 at 05:38:54PM +0900, Cao Minh Hiep wrote:
> From: Hiep Cao Minh 
> 
> This patch supports 32bytes of buffer for DUAL and QUAD in QSPI by
> Using Transmit/Receive Buffer Data Triggering Number.

Please use subject lines matching the style for the subsystem.  This
makes it easier for people to identify relevant patches.


signature.asc
Description: PGP signature

Re: [PATCH 0/1] ARM: spi supports 32bytes buffer for DUAL and QUAD

[Mark Brown]

On Fri, Nov 04, 2016 at 05:38:53PM +0900, Cao Minh Hiep wrote:
> From: Hiep Cao Minh 
> 
> Hi,
> 
> This patch will improve the DUAL and QUAD's performance of SPI,
> that supported for GEN2 r8a7790 SOC in PIO mode. 
> It sends/receives each 32bytes of data instead of each byte data 
> as current situation.

Please don't send cover letters for single patches, if there is anything
that needs saying put it in the changelog of the patch or after the ---
if it's administrative stuff.  This reduces mail volume and ensures that 
any important information is recorded in the changelog rather than being
lost. 


signature.asc
Description: PGP signature

[PATCH] clk: renesas: r8a7795: Fix HDMI parent clock

[Simon Horman]

From: Takeshi Kihara 

Correct HDMI parent clock so that the rate of the
HDMI clock is 1/4 rather than 1/2 of the rate of PLL1
as per the v0.52 (Jun, 15) manual.

Signed-off-by: Takeshi Kihara 
Signed-off-by: Simon Horman 
---
 drivers/clk/renesas/r8a7795-cpg-mssr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c 
b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index f255e451e8ca..eec42c249e3a 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -97,7 +97,7 @@ static const struct cpg_core_clk r8a7795_core_clks[] 
__initconst = {
DEF_FIXED("cp", R8A7795_CLK_CP,CLK_EXTAL,  2, 1),
 
DEF_DIV6P1("mso",   R8A7795_CLK_MSO,   CLK_PLL1_DIV4, 0x014),
-   DEF_DIV6P1("hdmi",  R8A7795_CLK_HDMI,  CLK_PLL1_DIV2, 0x250),
+   DEF_DIV6P1("hdmi",  R8A7795_CLK_HDMI,  CLK_PLL1_DIV4, 0x250),
DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
DEF_DIV6P1("csi0",  R8A7795_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),
 
-- 
2.7.0.rc3.207.g0ac5344

Re: [PATCH v2] ARM: DTS: r8a7794: alt: Fix PFC names for DU

[Sergei Shtylyov]

Hello.

On 11/3/2016 10:34 PM, Jacopo Mondi wrote:


Update the PFC pin groups and function names of DU interface for
r8a7794 ALT board.

The currently specified pin groups and function names prevented PFC and
DU interfaces from being correctly configured:

sh-pfc e606.pin-controller: function 'du' not supported
sh-pfc e606.pin-controller: invalid function du in map table
sh-pfc e606.pin-controller: function 'du' not supported
sh-pfc e606.pin-controller: invalid function du in map table
sh-pfc e606.pin-controller: function 'du' not supported
sh-pfc e606.pin-controller: invalid function du in map table
sh-pfc e606.pin-controller: function 'du' not supported
sh-pfc e606.pin-controller: invalid function du in map table
rcar-du: probe of feb0.display failed with error -22

Signed-off-by: Jacopo Mondi 


Acked-by: Sergei Shtylyov 

MBR, Sergei

[PATCH 22/29] ARM: dts: r8a7779: Fix DU reg property

[Simon Horman]

From: Laurent Pinchart 

The system uses one address cell and one size cell, not two. Fix the DU
DT node.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7779.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index b9bbcce69dfb..9d5b8fa3da8b 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -420,7 +420,7 @@
 
du: display@fff8 {
compatible = "renesas,du-r8a7779";
-   reg = <0 0xfff8 0 0x4>;
+   reg = <0xfff8 0x4>;
interrupts = ;
clocks = <_clks R8A7779_CLK_DU>;
power-domains = < R8A7779_PD_ALWAYS_ON>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 28/29] ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clock

[Simon Horman]

From: Laurent Pinchart 

DU0 uses an externally provided clock, but the corresponding pin isn't
correctly muxed. Fix it.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7779-marzen.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/r8a7779-marzen.dts 
b/arch/arm/boot/dts/r8a7779-marzen.dts
index 541678df90a9..676151b70185 100644
--- a/arch/arm/boot/dts/r8a7779-marzen.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen.dts
@@ -170,7 +170,7 @@
 
du_pins: du {
du0 {
-   groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0";
+   groups = "du0_rgb888", "du0_sync_1", "du0_clk_out_0", 
"du0_clk_in";
function = "du0";
};
du1 {
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 24/29] ARM: dts: r8a7778: Remove skeleton.dtsi inclusion

[Simon Horman]

From: Geert Uytterhoeven 

As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated"), including skeleton.dtsi is deprecated.

This fixes the following warning with W=1:

Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, 
but no unit name

Signed-off-by: Geert Uytterhoeven 
Acked-by: Mark Rutland 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7778.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index e571d66ea0fe..f3ffe1d31544 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -14,8 +14,6 @@
  * kind, whether express or implied.
  */
 
-/include/ "skeleton.dtsi"
-
 #include 
 #include 
 #include 
@@ -23,6 +21,8 @@
 / {
compatible = "renesas,r8a7778";
interrupt-parent = <>;
+   #address-cells = <1>;
+   #size-cells = <1>;
 
cpus {
#address-cells = <1>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 8/9] ARM: shmobile: select errata 798181 for SoCs with CA15 cores

[Simon Horman]

Select ARM errata 798181 on SoCs cores affected CA15 cores.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm/mach-shmobile/Kconfig | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index c48be1d332ed..6fbd9b7d2d67 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -60,6 +60,7 @@ config ARCH_R7S72100
 config ARCH_R8A73A4
bool "R-Mobile APE6 (R8A73A40)"
select ARCH_RMOBILE
+   select ARM_ERRATA_798181 if SMP
select RENESAS_IRQC
 
 config ARCH_R8A7740
@@ -70,6 +71,7 @@ config ARCH_R8A7740
 config ARCH_R8A7743
bool "RZ/G1M (R8A77430)"
select ARCH_RCAR_GEN2
+   select ARM_ERRATA_798181 if SMP
 
 config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
@@ -82,20 +84,24 @@ config ARCH_R8A7779
 config ARCH_R8A7790
bool "R-Car H2 (R8A77900)"
select ARCH_RCAR_GEN2
+   select ARM_ERRATA_798181 if SMP
select I2C
 
 config ARCH_R8A7791
bool "R-Car M2-W (R8A77910)"
select ARCH_RCAR_GEN2
+   select ARM_ERRATA_798181 if SMP
select I2C
 
 config ARCH_R8A7792
bool "R-Car V2H (R8A77920)"
select ARCH_RCAR_GEN2
+   select ARM_ERRATA_798181 if SMP
 
 config ARCH_R8A7793
bool "R-Car M2-N (R8A7793)"
select ARCH_RCAR_GEN2
+   select ARM_ERRATA_798181 if SMP
select I2C
 
 config ARCH_R8A7794
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 7/9] ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions

[Simon Horman]

From: Laurent Pinchart 

The four SoCs use identical machine operations, consolidate them into
two machine definitions in a single file.

Signed-off-by: Laurent Pinchart 
Tested-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/mach-shmobile/Makefile  |  4 
 arch/arm/mach-shmobile/setup-r8a7743.c   | 34 ---
 arch/arm/mach-shmobile/setup-r8a7792.c   | 35 
 arch/arm/mach-shmobile/setup-r8a7793.c   | 33 --
 arch/arm/mach-shmobile/setup-r8a7794.c   | 33 --
 arch/arm/mach-shmobile/setup-rcar-gen2.c | 33 ++
 6 files changed, 33 insertions(+), 139 deletions(-)
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7792.c
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7793.c
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7794.c

diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 332b84f8261f..64611a1b4276 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -9,14 +9,10 @@ obj-y := timer.o
 obj-$(CONFIG_ARCH_SH73A0)  += setup-sh73a0.o
 obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
 obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
-obj-$(CONFIG_ARCH_R8A7743) += setup-r8a7743.o
 obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
 obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
 obj-$(CONFIG_ARCH_R8A7791) += setup-r8a7791.o
-obj-$(CONFIG_ARCH_R8A7792) += setup-r8a7792.o
-obj-$(CONFIG_ARCH_R8A7793) += setup-r8a7793.o
-obj-$(CONFIG_ARCH_R8A7794) += setup-r8a7794.o
 obj-$(CONFIG_ARCH_EMEV2)   += setup-emev2.o
 obj-$(CONFIG_ARCH_R7S72100)+= setup-r7s72100.o
 
diff --git a/arch/arm/mach-shmobile/setup-r8a7743.c 
b/arch/arm/mach-shmobile/setup-r8a7743.c
deleted file mode 100644
index a7ecb82d219f..
--- a/arch/arm/mach-shmobile/setup-r8a7743.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * r8a7743 processor support
- *
- * Copyright (C) 2016 Cogent Embedded, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- *  published by the Free Software Foundation; of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include 
-
-#include 
-
-#include "common.h"
-#include "rcar-gen2.h"
-
-static const char * const r8a7743_boards_compat_dt[] __initconst = {
-   "renesas,r8a7743",
-   NULL,
-};
-
-DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)")
-   .init_early = shmobile_init_delay,
-   .init_time  = rcar_gen2_timer_init,
-   .init_late  = shmobile_init_late,
-   .reserve= rcar_gen2_reserve,
-   .dt_compat  = r8a7743_boards_compat_dt,
-MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-r8a7792.c 
b/arch/arm/mach-shmobile/setup-r8a7792.c
deleted file mode 100644
index a0910395da09..
--- a/arch/arm/mach-shmobile/setup-r8a7792.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * r8a7792 processor support
- *
- * Copyright (C) 2014 Renesas Electronics Corporation
- * Copyright (C) 2016 Cogent  Embedded, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include 
-
-#include 
-
-#include "common.h"
-#include "rcar-gen2.h"
-
-static const char * const r8a7792_boards_compat_dt[] __initconst = {
-   "renesas,r8a7792",
-   NULL,
-};
-
-DT_MACHINE_START(R8A7792_DT, "Generic R8A7792 (Flattened Device Tree)")
-   .init_early = shmobile_init_delay,
-   .init_late  = shmobile_init_late,
-   .init_time  = rcar_gen2_timer_init,
-   .reserve= rcar_gen2_reserve,
-   .dt_compat  = r8a7792_boards_compat_dt,
-MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-r8a7793.c 
b/arch/arm/mach-shmobile/setup-r8a7793.c
deleted file mode 100644
index 5fce87f7f254..
--- a/arch/arm/mach-shmobile/setup-r8a7793.c
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * r8a7793 processor 

[PATCH 20/29] ARM: dts: koelsch: add HDMI input

[Simon Horman]

From: Hans Verkuil 

Add support in the dts for the HDMI input. Based on the Lager dts
patch from Ulrich Hecht.

Signed-off-by: Hans Verkuil 
[uli: removed "renesas," prefixes from pfc nodes]
Signed-off-by: Ulrich Hecht 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 68 +--
 1 file changed, 66 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts 
b/arch/arm/boot/dts/r8a7791-koelsch.dts
index f17bfa000f73..c457b43deb7d 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -265,12 +265,23 @@
};
};
 
+   hdmi-in {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con_in: endpoint {
+   remote-endpoint = <_in>;
+   };
+   };
+   };
+
hdmi-out {
compatible = "hdmi-connector";
type = "a";
 
port {
-   hdmi_con: endpoint {
+   hdmi_con_out: endpoint {
remote-endpoint = <_out>;
};
};
@@ -414,6 +425,11 @@
function = "usb1";
};
 
+   vin0_pins: vin0 {
+   groups = "vin0_data24", "vin0_sync", "vin0_clkenb", "vin0_clk";
+   function = "vin0";
+   };
+
vin1_pins: vin1 {
groups = "vin1_data8", "vin1_clk";
function = "vin1";
@@ -617,7 +633,34 @@
port@1 {
reg = <1>;
adv7511_out: endpoint {
-   remote-endpoint = <_con>;
+   remote-endpoint = <_con_out>;
+   };
+   };
+   };
+   };
+
+   hdmi-in@4c {
+   compatible = "adi,adv7612";
+   reg = <0x4c>;
+   interrupt-parent = <>;
+   interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+   default-input = <0>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   adv7612_in: endpoint {
+   remote-endpoint = <_con_in>;
+   };
+   };
+
+   port@2 {
+   reg = <2>;
+   adv7612_out: endpoint {
+   remote-endpoint = <>;
};
};
};
@@ -699,6 +742,27 @@
cpu0-supply = <_dvfs>;
 };
 
+/* HDMI video input */
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   port {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   vin0ep2: endpoint {
+   remote-endpoint = <_out>;
+   bus-width = <24>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+   pclk-sample = <1>;
+   data-active = <1>;
+   };
+   };
+};
+
 /* composite video input */
  {
status = "okay";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 25/29] ARM: dts: r8a7779: Remove skeleton.dtsi inclusion

[Simon Horman]

From: Geert Uytterhoeven 

As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated"), including skeleton.dtsi is deprecated.

This fixes the following warning with W=1:

Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, 
but no unit name

Signed-off-by: Geert Uytterhoeven 
Acked-by: Mark Rutland 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7779.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 9d5b8fa3da8b..3005308a1807 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -9,8 +9,6 @@
  * kind, whether express or implied.
  */
 
-/include/ "skeleton.dtsi"
-
 #include 
 #include 
 #include 
@@ -19,6 +17,8 @@
 / {
compatible = "renesas,r8a7779";
interrupt-parent = <>;
+   #address-cells = <1>;
+   #size-cells = <1>;
 
cpus {
#address-cells = <1>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 1/9] ARM: shmobile: Sort Kconfig selections

[Simon Horman]

From: Geert Uytterhoeven 

Sort alphabetically all symbols selected by ARCH_RENESAS

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/mach-shmobile/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 09817bae4558..84fd4e959147 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -32,15 +32,15 @@ config ARCH_RMOBILE
 menuconfig ARCH_RENESAS
bool "Renesas ARM SoCs"
depends on ARCH_MULTI_V7 && MMU
+   select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_SHMOBILE
select ARCH_SHMOBILE_MULTI
+   select ARM_GIC
+   select GPIOLIB
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP
-   select ARM_GIC
-   select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select NO_IOPORT_MAP
select PINCTRL
-   select GPIOLIB
select ZONE_DMA if ARM_LPAE
 
 if ARCH_RENESAS
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 2/9] ARM: shmobile: only call rcar_gen2_clocks_init() if present

[Simon Horman]

From: Simon Horman 

The RZ/G1M (r8a7743) uses the R-Car Gen2 core, but not the R-Car Gen2 clock
driver. This is a harbinger of a transition for R-Car Gen2 SoCs. As the
process to get all the required pieces in place is somewhat complex it
seems useful to try to disentangle dependencies where possible.

The approach here is to temporarily disable calling rcar_gen2_clocks_init()
if no R-Car Gen2 SoC are configured and thus the symbol will not be
present.

Signed-off-by: Simon Horman 
Acked-by: Geert Uytterhoeven 
---
 arch/arm/mach-shmobile/setup-rcar-gen2.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c 
b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index afb9fdcd3d90..154e8051825a 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -130,7 +131,15 @@ void __init rcar_gen2_timer_init(void)
iounmap(base);
 #endif /* CONFIG_ARM_ARCH_TIMER */
 
-   rcar_gen2_clocks_init(mode);
+   if (IS_ENABLED(CONFIG_ARCH_R8A7790) ||
+   IS_ENABLED(CONFIG_ARCH_R8A7791) ||
+   IS_ENABLED(CONFIG_ARCH_R8A7792) ||
+   IS_ENABLED(CONFIG_ARCH_R8A7793) ||
+   IS_ENABLED(CONFIG_ARCH_R8A7794))
+   rcar_gen2_clocks_init(mode);
+   else
+   of_clk_init(NULL);
+
clocksource_probe();
 }
 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 18/29] ARM: dts: rskrza1: add sdhi1 DT support

[Simon Horman]

From: Chris Brandt 

Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100-rskrza1.dts | 5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100-rskrza1.dts 
b/arch/arm/boot/dts/r7s72100-rskrza1.dts
index e5dea5bb4032..dd4418195ca6 100644
--- a/arch/arm/boot/dts/r7s72100-rskrza1.dts
+++ b/arch/arm/boot/dts/r7s72100-rskrza1.dts
@@ -56,6 +56,11 @@
};
 };
 
+ {
+   bus-width = <4>;
+   status = "okay";
+};
+
  {
status = "okay";
 };
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 29/29] ARM: dts: r8a7794: remove Z clock

[Simon Horman]

From: Sergei Shtylyov 

R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock...

Fixes: 0dce5454d5c2 ("ARM: shmobile: Initial r8a7794 SoC device tree")
Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi| 3 +--
 include/dt-bindings/clock/r8a7794-clock.h | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 44ce62938417..01816ac775a8 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -1028,8 +1028,7 @@
clocks = <_clk _extal_clk>;
#clock-cells = <1>;
clock-output-names = "main", "pll0", "pll1", "pll3",
-"lb", "qspi", "sdh", "sd0", "z",
-"rcan";
+"lb", "qspi", "sdh", "sd0", "rcan";
#power-domain-cells = <0>;
};
/* Variable factor clocks */
diff --git a/include/dt-bindings/clock/r8a7794-clock.h 
b/include/dt-bindings/clock/r8a7794-clock.h
index 9d02f5317c7c..88e64846cf37 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -20,8 +20,7 @@
 #define R8A7794_CLK_QSPI   5
 #define R8A7794_CLK_SDH6
 #define R8A7794_CLK_SD07
-#define R8A7794_CLK_Z  8
-#define R8A7794_CLK_RCAN   9
+#define R8A7794_CLK_RCAN   8
 
 /* MSTP0 */
 #define R8A7794_CLK_MSIOF0 0
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 26/29] ARM: dts: r8a7740: Remove skeleton.dtsi inclusion

[Simon Horman]

From: Geert Uytterhoeven 

As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated"), including skeleton.dtsi is deprecated.

This fixes the following warning with W=1:

Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, 
but no unit name

Signed-off-by: Geert Uytterhoeven 
Acked-by: Mark Rutland 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7740.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 159e04eb1b9e..34159a8349de 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -8,8 +8,6 @@
  * kind, whether express or implied.
  */
 
-/include/ "skeleton.dtsi"
-
 #include 
 #include 
 #include 
@@ -17,6 +15,8 @@
 / {
compatible = "renesas,r8a7740";
interrupt-parent = <>;
+   #address-cells = <1>;
+   #size-cells = <1>;
 
cpus {
#address-cells = <1>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 3/9] ARM: shmobile: r8a7743: basic SoC support

[Simon Horman]

From: Sergei Shtylyov 

Add minimal support for the RZ/G1M (R8A7743) SoC.

Based on the original (and large) patch by Dmitry Shifrin
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt |  2 ++
 arch/arm/mach-shmobile/Kconfig |  4 +++
 arch/arm/mach-shmobile/Makefile|  1 +
 arch/arm/mach-shmobile/setup-r8a7743.c | 34 ++
 4 files changed, 41 insertions(+)
 create mode 100644 arch/arm/mach-shmobile/setup-r8a7743.c

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 2f0b7169f132..058be8180bc4 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -13,6 +13,8 @@ SoCs:
 compatible = "renesas,r8a73a4"
   - R-Mobile A1 (R8A77400)
 compatible = "renesas,r8a7740"
+  - RZ/G1M (R8A77430)
+compatible = "renesas,r8a7743"
   - R-Car M1A (R8A77781)
 compatible = "renesas,r8a7778"
   - R-Car H1 (R8A77790)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 84fd4e959147..c48be1d332ed 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -67,6 +67,10 @@ config ARCH_R8A7740
select ARCH_RMOBILE
select RENESAS_INTC_IRQPIN
 
+config ARCH_R8A7743
+   bool "RZ/G1M (R8A77430)"
+   select ARCH_RCAR_GEN2
+
 config ARCH_R8A7778
bool "R-Car M1A (R8A77781)"
select ARCH_RCAR_GEN1
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 3fc48b02eb4f..332b84f8261f 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -9,6 +9,7 @@ obj-y   := timer.o
 obj-$(CONFIG_ARCH_SH73A0)  += setup-sh73a0.o
 obj-$(CONFIG_ARCH_R8A73A4) += setup-r8a73a4.o
 obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7743) += setup-r8a7743.o
 obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o pm-r8a7779.o
 obj-$(CONFIG_ARCH_R8A7790) += setup-r8a7790.o
diff --git a/arch/arm/mach-shmobile/setup-r8a7743.c 
b/arch/arm/mach-shmobile/setup-r8a7743.c
new file mode 100644
index ..a7ecb82d219f
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-r8a7743.c
@@ -0,0 +1,34 @@
+/*
+ * r8a7743 processor support
+ *
+ * Copyright (C) 2016 Cogent Embedded, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ *  published by the Free Software Foundation; of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+
+#include 
+
+#include "common.h"
+#include "rcar-gen2.h"
+
+static const char * const r8a7743_boards_compat_dt[] __initconst = {
+   "renesas,r8a7743",
+   NULL,
+};
+
+DT_MACHINE_START(R8A7743_DT, "Generic R8A7743 (Flattened Device Tree)")
+   .init_early = shmobile_init_delay,
+   .init_time  = rcar_gen2_timer_init,
+   .init_late  = shmobile_init_late,
+   .reserve= rcar_gen2_reserve,
+   .dt_compat  = r8a7743_boards_compat_dt,
+MACHINE_END
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 5/9] ARM: shmobile: r8a7794/alt: Add board part number to DT bindings

[Simon Horman]

From: Geert Uytterhoeven 

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 785d1f847acb..106b542c27c9 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -37,7 +37,7 @@ SoCs:
 
 Boards:
 
-  - Alt
+  - Alt (RTP0RC7794SEB00010S)
 compatible = "renesas,alt", "renesas,r8a7794"
   - APE6-EVM
 compatible = "renesas,ape6evm", "renesas,r8a73a4"
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 6/9] ARM: shmobile: r8a7793/gose: Add board part number to DT bindings

[Simon Horman]

From: Geert Uytterhoeven 

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 106b542c27c9..15669642b532 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -49,7 +49,7 @@ Boards:
 compatible = "renesas,bockw", "renesas,r8a7778"
   - Genmai (RTK772100BC0BR)
 compatible = "renesas,genmai", "renesas,r7s72100"
-  - Gose
+  - Gose (RTP0RC7793SEB00010S)
 compatible = "renesas,gose", "renesas,r8a7793"
   - H3ULCB (RTP0RC7795SKB00010S)
 compatible = "renesas,h3ulcb", "renesas,r8a7795";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 21/29] ARM: dts: r8a7793: Enable VIN0-VIN2

[Simon Horman]

From: Ulrich Hecht 

Signed-off-by: Ulrich Hecht 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7793.dtsi | 27 +++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index a7d11b9f3555..629d3d60d1cd 100644
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -852,6 +852,33 @@
status = "disabled";
};
 
+   vin0: video@e6ef {
+   compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef 0 0x1000>;
+   interrupts = ;
+   clocks = <_clks R8A7793_CLK_VIN0>;
+   power-domains = < R8A7793_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
+
+   vin1: video@e6ef1000 {
+   compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef1000 0 0x1000>;
+   interrupts = ;
+   clocks = <_clks R8A7793_CLK_VIN1>;
+   power-domains = < R8A7793_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
+
+   vin2: video@e6ef2000 {
+   compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin";
+   reg = <0 0xe6ef2000 0 0x1000>;
+   interrupts = ;
+   clocks = <_clks R8A7793_CLK_VIN2>;
+   power-domains = < R8A7793_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
+
qspi: spi@e6b1 {
compatible = "renesas,qspi-r8a7793", "renesas,qspi";
reg = <0 0xe6b1 0 0x2c>;
-- 
2.7.0.rc3.207.g0ac5344

[GIT PULL] Renesas ARM Based SoC Updates for v4.10

[Simon Horman]

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM based SoC updates for v4.10.


The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:

  Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git 
tags/renesas-soc-for-v4.10

for you to fetch changes up to 9652623f8f019edc93a7a934a10b7d0b90421d5a:

  ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings 
(2016-11-04 10:25:45 +0100)


Renesas ARM Based SoC Updates for v4.10

Enhancements:
* Basic support for r8a7743 SoC; only SoC code so far
* Select errata 798181 for SoCs with CA15 cores

Clean-up:
* Consolidate R8A7743 and R8A779[234] machine definitions

Documentation:
* Add Marzen, Gose and Alt board part numbers to DT bindings
* Document SK-RZG1M board


Geert Uytterhoeven (4):
  ARM: shmobile: Sort Kconfig selections
  ARM: shmobile: r8a7794/alt: Add board part number to DT bindings
  ARM: shmobile: r8a7793/gose: Add board part number to DT bindings
  ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings

Laurent Pinchart (1):
  ARM: shmobile: Consolidate R8A7743 and R8A779[234] machine definitions

Sergei Shtylyov (2):
  ARM: shmobile: r8a7743: basic SoC support
  ARM: shmobile: document SK-RZG1M board

Simon Horman (2):
  ARM: shmobile: only call rcar_gen2_clocks_init() if present
  ARM: shmobile: select errata 798181 for SoCs with CA15 cores

 Documentation/devicetree/bindings/arm/shmobile.txt | 10 +++--
 arch/arm/mach-shmobile/Kconfig | 16 ++--
 arch/arm/mach-shmobile/Makefile|  3 --
 arch/arm/mach-shmobile/setup-r8a7792.c | 35 -
 arch/arm/mach-shmobile/setup-r8a7793.c | 33 
 arch/arm/mach-shmobile/setup-r8a7794.c | 33 
 arch/arm/mach-shmobile/setup-rcar-gen2.c   | 44 +-
 7 files changed, 63 insertions(+), 111 deletions(-)
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7792.c
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7793.c
 delete mode 100644 arch/arm/mach-shmobile/setup-r8a7794.c

[PATCH 9/9] ARM: shmobile: r8a7779/marzen: Add board part number to DT bindings

[Simon Horman]

From: Geert Uytterhoeven 

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 15669642b532..9a60cb38cf56 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -63,7 +63,7 @@ Boards:
 compatible = "renesas,kzm9g", "renesas,sh73a0"
   - Lager (RTP0RC7790SEB00010S)
 compatible = "renesas,lager", "renesas,r8a7790"
-  - Marzen
+  - Marzen (R0P7779A00010S)
 compatible = "renesas,marzen", "renesas,r8a7779"
   - Porter (M2-LCDP)
 compatible = "renesas,porter", "renesas,r8a7791"
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 23/29] ARM: dts: emev2: Remove skeleton.dtsi inclusion

[Simon Horman]

From: Geert Uytterhoeven 

As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated"), including skeleton.dtsi is deprecated.

This fixes the following warning with W=1:

Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, 
but no unit name

Signed-off-by: Geert Uytterhoeven 
Acked-by: Mark Rutland 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/emev2.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/emev2.dtsi b/arch/arm/boot/dts/emev2.dtsi
index cd119400f440..0124faf175c8 100644
--- a/arch/arm/boot/dts/emev2.dtsi
+++ b/arch/arm/boot/dts/emev2.dtsi
@@ -8,13 +8,14 @@
  * kind, whether express or implied.
  */
 
-#include "skeleton.dtsi"
 #include 
 #include 
 
 / {
compatible = "renesas,emev2";
interrupt-parent = <>;
+   #address-cells = <1>;
+   #size-cells = <1>;
 
aliases {
gpio0 = 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 4/9] ARM: shmobile: document SK-RZG1M board

[Simon Horman]

From: Sergei Shtylyov 

Document the SK-RZG1M device tree bindings, listing it as a supported board.

This allows to use checkpatch.pl to validate .dts files referring to the
SK-RZG1M board.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/arm/shmobile.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt 
b/Documentation/devicetree/bindings/arm/shmobile.txt
index 058be8180bc4..785d1f847acb 100644
--- a/Documentation/devicetree/bindings/arm/shmobile.txt
+++ b/Documentation/devicetree/bindings/arm/shmobile.txt
@@ -75,5 +75,7 @@ Boards:
 compatible = "renesas,salvator-x", "renesas,r8a7796";
   - SILK (RTP0RC7794LCB00011S)
 compatible = "renesas,silk", "renesas,r8a7794"
+  - SK-RZG1M (YR8A77430S000BE)
+compatible = "renesas,sk-rzg1m", "renesas,r8a7743"
   - Wheat
 compatible = "renesas,wheat", "renesas,r8a7792"
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 11/29] ARM: dts: r8a7792: add MSIOF clocks

[Simon Horman]

From: Sergei Shtylyov 

Describe the MSIOF0/1 clocks and their parent, MP clock in the R8A7792
device  tree.

Based  on the original (and large) patch by Vladimir Barinov
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7792.dtsi | 21 +++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 713141d38b3e..839cd70c4c75 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -763,6 +763,13 @@
clock-div = <48>;
clock-mult = <1>;
};
+   mp_clk: mp {
+   compatible = "fixed-factor-clock";
+   clocks = <_div2_clk>;
+   #clock-cells = <0>;
+   clock-div = <15>;
+   clock-mult = <1>;
+   };
m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <_clocks R8A7792_CLK_PLL1>;
@@ -793,6 +800,15 @@
};
 
/* Gate clocks */
+   mstp0_clks: mstp0_clks@e6150130 {
+   compatible = "renesas,r8a7792-mstp-clocks",
+"renesas,cpg-mstp-clocks";
+   reg = <0 0xe6150130 0 4>, <0 0xe6150030 0 4>;
+   clocks = <_clk>;
+   #clock-cells = <1>;
+   clock-indices = ;
+   clock-output-names = "msiof0";
+   };
mstp1_clks: mstp1_clks@e6150134 {
compatible = "renesas,r8a7792-mstp-clocks",
 "renesas,cpg-mstp-clocks";
@@ -811,12 +827,13 @@
compatible = "renesas,r8a7792-mstp-clocks",
 "renesas,cpg-mstp-clocks";
reg = <0 0xe6150138 0 4>, <0 0xe6150040 0 4>;
-   clocks = <_clk>, <_clk>;
+   clocks = <_clk>, <_clk>, <_clk>;
#clock-cells = <1>;
clock-indices = <
+   R8A7792_CLK_MSIOF1
R8A7792_CLK_SYS_DMAC1 R8A7792_CLK_SYS_DMAC0
>;
-   clock-output-names = "sys-dmac1", "sys-dmac0";
+   clock-output-names = "msiof1", "sys-dmac1", "sys-dmac0";
};
mstp3_clks: mstp3_clks@e615013c {
compatible = "renesas,r8a7792-mstp-clocks",
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 07/29] ARM: dts: r8a7791: Correct SCIFB reg properties to cover all registers

[Simon Horman]

From: Geert Uytterhoeven 

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index b07c799f72f2..091d7fb6ee7d 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -702,7 +702,7 @@
scifb0: serial@e6c2 {
compatible = "renesas,scifb-r8a7791",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6c2 0 64>;
+   reg = <0 0xe6c2 0 0x100>;
interrupts = ;
clocks = <_clks R8A7791_CLK_SCIFB0>;
clock-names = "fck";
@@ -716,7 +716,7 @@
scifb1: serial@e6c3 {
compatible = "renesas,scifb-r8a7791",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6c3 0 64>;
+   reg = <0 0xe6c3 0 0x100>;
interrupts = ;
clocks = <_clks R8A7791_CLK_SCIFB1>;
clock-names = "fck";
@@ -730,7 +730,7 @@
scifb2: serial@e6ce {
compatible = "renesas,scifb-r8a7791",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6ce 0 64>;
+   reg = <0 0xe6ce 0 0x100>;
interrupts = ;
clocks = <_clks R8A7791_CLK_SCIFB2>;
clock-names = "fck";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 09/29] ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registers

[Simon Horman]

From: Geert Uytterhoeven 

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 57e0d27cb82e..8cfc1385f58a 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -411,7 +411,7 @@
scifb0: serial@e6c2 {
compatible = "renesas,scifb-r8a7794",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6c2 0 64>;
+   reg = <0 0xe6c2 0 0x100>;
interrupts = ;
clocks = <_clks R8A7794_CLK_SCIFB0>;
clock-names = "fck";
@@ -425,7 +425,7 @@
scifb1: serial@e6c3 {
compatible = "renesas,scifb-r8a7794",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6c3 0 64>;
+   reg = <0 0xe6c3 0 0x100>;
interrupts = ;
clocks = <_clks R8A7794_CLK_SCIFB1>;
clock-names = "fck";
@@ -439,7 +439,7 @@
scifb2: serial@e6ce {
compatible = "renesas,scifb-r8a7794",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6ce 0 64>;
+   reg = <0 0xe6ce 0 0x100>;
interrupts = ;
clocks = <_clks R8A7794_CLK_SCIFB2>;
clock-names = "fck";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 17/29] ARM: dts: r7s72100: add sdhi to device tree

[Simon Horman]

From: Chris Brandt 

Signed-off-by: Chris Brandt 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index eab06701ef11..3dd427d68c83 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -470,4 +470,30 @@
bus-width = <8>;
status = "disabled";
};
+
+   sdhi0: sd@e804e000 {
+   compatible = "renesas,sdhi-r7s72100";
+   reg = <0xe804e000 0x100>;
+   interrupts = ;
+
+   clocks = <_clks R7S72100_CLK_SDHI0>;
+   cap-sd-highspeed;
+   cap-sdio-irq;
+   status = "disabled";
+   };
+
+   sdhi1: sd@e804e800 {
+   compatible = "renesas,sdhi-r7s72100";
+   reg = <0xe804e800 0x100>;
+   interrupts = ;
+
+   clocks = <_clks R7S72100_CLK_SDHI1>;
+   cap-sd-highspeed;
+   cap-sdio-irq;
+   status = "disabled";
+   };
 };
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 15/29] ARM: dts: gose: use generic pinctrl properties in SDHI nodes

[Simon Horman]

Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and
groups properties") renesas pfc drivers accept generic "function", "pins"
and "groups" properties.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7793-gose.dts | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7793-gose.dts 
b/arch/arm/boot/dts/r8a7793-gose.dts
index 90af18600124..dc311eba 100644
--- a/arch/arm/boot/dts/r8a7793-gose.dts
+++ b/arch/arm/boot/dts/r8a7793-gose.dts
@@ -346,18 +346,18 @@
};
 
sdhi0_pins: sd0 {
-   renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
-   renesas,function = "sdhi0";
+   groups = "sdhi0_data4", "sdhi0_ctrl";
+   function = "sdhi0";
};
 
sdhi1_pins: sd1 {
-   renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
-   renesas,function = "sdhi1";
+   groups = "sdhi1_data4", "sdhi1_ctrl";
+   function = "sdhi1";
};
 
sdhi2_pins: sd2 {
-   renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
-   renesas,function = "sdhi2";
+   groups = "sdhi2_data4", "sdhi2_ctrl";
+   function = "sdhi2";
};
 
qspi_pins: qspi {
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 05/29] ARM: dts: alt: enable UHS for SDHI 0 & 1

[Simon Horman]

Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1}.

Signed-off-by: Simon Horman 
Reviewed-by: Wolfram Sang 
---
 arch/arm/boot/dts/r8a7794-alt.dts | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794-alt.dts 
b/arch/arm/boot/dts/r8a7794-alt.dts
index 8d1b35afaf82..325d3f972c57 100644
--- a/arch/arm/boot/dts/r8a7794-alt.dts
+++ b/arch/arm/boot/dts/r8a7794-alt.dts
@@ -207,11 +207,25 @@
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
+   power-source = <3300>;
+   };
+
+   sdhi0_pins_uhs: sd0_uhs {
+   groups = "sdhi0_data4", "sdhi0_ctrl";
+   function = "sdhi0";
+   power-source = <1800>;
};
 
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
+   power-source = <3300>;
+   };
+
+   sdhi1_pins_uhs: sd1_uhs {
+   groups = "sdhi1_data4", "sdhi1_ctrl";
+   function = "sdhi1";
+   power-source = <1800>;
};
 };
 
@@ -255,23 +269,27 @@
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi0>;
vqmmc-supply = <_sdhi0>;
cd-gpios = < 6 GPIO_ACTIVE_LOW>;
wp-gpios = < 7 GPIO_ACTIVE_LOW>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi1>;
vqmmc-supply = <_sdhi1>;
cd-gpios = < 14 GPIO_ACTIVE_LOW>;
wp-gpios = < 15 GPIO_ACTIVE_LOW>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 14/29] ARM: dts: r7s72100: add sdhi clock to device tree

[Simon Horman]

From: Chris Brandt 

Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi| 8 
 include/dt-bindings/clock/r7s72100-clock.h | 4 
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 50f9f3bc109d..eab06701ef11 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -149,6 +149,14 @@
>;
clock-output-names = "spi0", "spi1", "spi2", "spi3", 
"spi4";
};
+   mstp12_clks: mstp12_clks@fcfe0444 {
+   #clock-cells = <1>;
+   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
+   reg = <0xfcfe0444 4>;
+   clocks = <_clk>, <_clk>;
+   clock-indices = ;
+   clock-output-names = "sdhi1", "sdhi0";
+   };
};
 
cpus {
diff --git a/include/dt-bindings/clock/r7s72100-clock.h 
b/include/dt-bindings/clock/r7s72100-clock.h
index 5eaf0fb469c2..29e01ed10e74 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -44,4 +44,8 @@
 #define R7S72100_CLK_SPI3  4
 #define R7S72100_CLK_SPI4  3
 
+/* MSTP12 */
+#define R7S72100_CLK_SDHI0 3
+#define R7S72100_CLK_SDHI1 2
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 13/29] ARM: dts: r7s72100: add mmcif to device tree

[Simon Horman]

From: Chris Brandt 

Signed-off-by: Chris Brandt 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi | 12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index e18d4e645d6e..50f9f3bc109d 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -450,4 +450,16 @@
#size-cells = <0>;
status = "disabled";
};
+
+   mmcif: mmc@e804c800 {
+   compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
+   reg = <0xe804c800 0x80>;
+   interrupts = ;
+   clocks = <_clks R7S72100_CLK_MMCIF>;
+   reg-io-width = <4>;
+   bus-width = <8>;
+   status = "disabled";
+   };
 };
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 02/29] ARM: dts: r8a7791: set maximum frequency for SDHI clocks

[Simon Horman]

Define the upper limit otherwise the driver cannot utilize max speeds.

Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7791.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi
index 162b55c665a3..b07c799f72f2 100644
--- a/arch/arm/boot/dts/r8a7791.dtsi
+++ b/arch/arm/boot/dts/r8a7791.dtsi
@@ -584,6 +584,7 @@
dmas = < 0xcd>, < 0xce>,
   < 0xcd>, < 0xce>;
dma-names = "tx", "rx", "tx", "rx";
+   max-frequency = <19500>;
power-domains = < R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -596,6 +597,7 @@
dmas = < 0xc1>, < 0xc2>,
   < 0xc1>, < 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
+   max-frequency = <9750>;
power-domains = < R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -608,6 +610,7 @@
dmas = < 0xd3>, < 0xd4>,
   < 0xd3>, < 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
+   max-frequency = <9750>;
power-domains = < R8A7791_PD_ALWAYS_ON>;
status = "disabled";
};
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 10/29] ARM: dts: wheat: add DU support

[Simon Horman]

From: Sergei Shtylyov 

Define  the  Wheat board dependent  part of the DU device node.
Add the device nodes for the Analog Devices ADV7513 HDMI transmitters
connected to DU0/1.  Add the necessary subnodes to interconnect DU with
HDMI transmitters/connectors.

Signed-off-by: Sergei Shtylyov 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7792-wheat.dts | 126 
 1 file changed, 126 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7792-wheat.dts 
b/arch/arm/boot/dts/r8a7792-wheat.dts
index 6dbb94114a93..c24f26fdab1f 100644
--- a/arch/arm/boot/dts/r8a7792-wheat.dts
+++ b/arch/arm/boot/dts/r8a7792-wheat.dts
@@ -86,6 +86,34 @@
gpio = < 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+   hdmi-out0 {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con0: endpoint {
+   remote-endpoint = <_0_out>;
+   };
+   };
+   };
+
+   hdmi-out1 {
+   compatible = "hdmi-connector";
+   type = "a";
+
+   port {
+   hdmi_con1: endpoint {
+   remote-endpoint = <_1_out>;
+   };
+   };
+   };
+
+   osc2_clk: osc2 {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <7425>;
+   };
 };
 
 _clk {
@@ -128,6 +156,16 @@
groups = "qspi_ctrl", "qspi_data4";
function = "qspi";
};
+
+   du0_pins: du0 {
+   groups = "du0_rgb888", "du0_sync", "du0_disp";
+   function = "du0";
+   };
+
+   du1_pins: du1 {
+   groups = "du1_rgb666", "du1_sync", "du1_disp";
+   function = "du1";
+   };
 };
 
  {
@@ -197,3 +235,91 @@
};
};
 };
+
+ {
+   status = "okay";
+   clock-frequency = <40>;
+
+   hdmi@3d {
+   compatible = "adi,adv7513";
+   reg = <0x3d>;
+
+   adi,input-depth = <8>;
+   adi,input-colorspace = "rgb";
+   adi,input-clock = "1x";
+   adi,input-style = <1>;
+   adi,input-justification = "evenly";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   adv7513_0_in: endpoint {
+   remote-endpoint = <_out_rgb0>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   adv7513_0_out: endpoint {
+   remote-endpoint = <_con0>;
+   };
+   };
+   };
+   };
+
+   hdmi@39 {
+   compatible = "adi,adv7513";
+   reg = <0x39>;
+
+   adi,input-depth = <8>;
+   adi,input-colorspace = "rgb";
+   adi,input-clock = "1x";
+   adi,input-style = <1>;
+   adi,input-justification = "evenly";
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   port@0 {
+   reg = <0>;
+   adv7513_1_in: endpoint {
+   remote-endpoint = <_out_rgb1>;
+   };
+   };
+
+   port@1 {
+   reg = <1>;
+   adv7513_1_out: endpoint {
+   remote-endpoint = <_con1>;
+   };
+   };
+   };
+   };
+};
+
+ {
+   pinctrl-0 = <_pins _pins>;
+   pinctrl-names = "default";
+
+   clocks = <_clks R8A7792_CLK_DU0>, <_clks R8A7792_CLK_DU1>,
+<_clk>;
+   clock-names = "du.0", "du.1", "dclkin.0";
+   status = "okay";
+
+   ports {
+   port@0 {
+   endpoint {
+   remote-endpoint = <_0_in>;
+   };
+   };
+   port@1 {
+   endpoint {
+   remote-endpoint = <_1_in>;
+   };
+   };
+   };
+};
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 16/29] ARM: dts: r8a7794: Fix W=1 dtc warnings

[Simon Horman]

From: Geert Uytterhoeven 

Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,dvc/dvc@0 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,dvc/dvc@1 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,mix/mix@0 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,mix/mix@1 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@0 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@1 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@2 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@3 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@4 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@5 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@6 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ctu/ctu@7 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@0 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@1 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@2 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@3 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@4 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@5 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,src/src@6 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@0 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@1 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@2 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@3 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@4 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@5 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@6 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@7 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@8 has a 
unit name, but no reg property
Warning (unit_address_vs_reg): Node /sound@ec50/rcar_sound,ssi/ssi@9 has a 
unit name, but no reg property

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7794.dtsi | 58 +-
 1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 8cfc1385f58a..44ce62938417 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -1491,62 +1491,62 @@
status = "disabled";
 
rcar_sound,dvc {
-   dvc0: dvc@0 {
+   dvc0: dvc-0 {
dmas = < 0xbc>;
dma-names = "tx";
};
-   dvc1: dvc@1 {
+   dvc1: dvc-1 {
dmas = < 0xbe>;
dma-names = "tx";
};
};
 
rcar_sound,mix {
-   mix0: mix@0 { };
-   mix1: mix@1 { };
+   mix0: mix-0 { };
+   mix1: mix-1 { };
};
 
rcar_sound,ctu {
-   ctu00: ctu@0 { };
-   ctu01: ctu@1 { };
-   ctu02: ctu@2 { };
-   ctu03: ctu@3 { };
-   ctu10: ctu@4 { };
-   ctu11: ctu@5 { };
-   ctu12: ctu@6 { };
-   ctu13: ctu@7 { };
+   ctu00: ctu-0 { };
+   ctu01: ctu-1 { };
+   ctu02: ctu-2 { };
+   ctu03: ctu-3 { };
+

[PATCH 12/29] ARM: dts: r8a7792: add MSIOF support

[Simon Horman]

From: Sergei Shtylyov 

Define the generic R8A7792 parts of the MSIOF0/1 device nodes.

Based  on the original (and large) patch by Vladimir Barinov
.

Signed-off-by: Sergei Shtylyov 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7792.dtsi | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7792.dtsi b/arch/arm/boot/dts/r8a7792.dtsi
index 839cd70c4c75..a75e0cd312c5 100644
--- a/arch/arm/boot/dts/r8a7792.dtsi
+++ b/arch/arm/boot/dts/r8a7792.dtsi
@@ -26,6 +26,8 @@
i2c4 = 
i2c5 = 
spi0 = 
+   spi1 = 
+   spi2 = 
vin0 = 
vin1 = 
vin2 = 
@@ -572,6 +574,34 @@
status = "disabled";
};
 
+   msiof0: spi@e6e2 {
+   compatible = "renesas,msiof-r8a7792";
+   reg = <0 0xe6e2 0 0x0064>;
+   interrupts = ;
+   clocks = <_clks R8A7792_CLK_MSIOF0>;
+   dmas = < 0x51>, < 0x52>,
+  < 0x51>, < 0x52>;
+   dma-names = "tx", "rx", "tx", "rx";
+   power-domains = < R8A7792_PD_ALWAYS_ON>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
+   msiof1: spi@e6e1 {
+   compatible = "renesas,msiof-r8a7792";
+   reg = <0 0xe6e1 0 0x0064>;
+   interrupts = ;
+   clocks = <_clks R8A7792_CLK_MSIOF1>;
+   dmas = < 0x55>, < 0x56>,
+  < 0x55>, < 0x56>;
+   dma-names = "tx", "rx", "tx", "rx";
+   power-domains = < R8A7792_PD_ALWAYS_ON>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
du: display@feb0 {
compatible = "renesas,du-r8a7792";
reg = <0 0xfeb0 0 0x4>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 03/12] arm64: dts: r8a7795: salvator-x: Add DU LVDS output endpoint

[Simon Horman]

From: Laurent Pinchart 

Declaring the endpoint makes LVDS enablement easier by just including
the corresponding panel's dtsi file.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index ff4e4fe843ed..c8f6023c4667 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -191,6 +191,10 @@
remote-endpoint = <_in>;
};
};
+   port@3 {
+   lvds_connector: endpoint {
+   };
+   };
};
 };
 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 06/12] arm64: dts: r8a7796: add SDHI nodes

[Simon Horman]

Add SDHI nodes to the DT of the r8a7796 SoC.

Based on the DT of the r8a7795 SoC.

Signed-off-by: Simon Horman 
Reviewed-by: Wolfram Sang 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 40 
 1 file changed, 40 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 9217da983525..6ec988c78ff8 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -251,5 +251,45 @@
power-domains = < R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
+
+   sdhi0: sd@ee10 {
+   compatible = "renesas,sdhi-r8a7796";
+   reg = <0 0xee10 0 0x2000>;
+   interrupts = ;
+   clocks = < CPG_MOD 314>;
+   max-frequency = <2>;
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
+
+   sdhi1: sd@ee12 {
+   compatible = "renesas,sdhi-r8a7796";
+   reg = <0 0xee12 0 0x2000>;
+   interrupts = ;
+   clocks = < CPG_MOD 313>;
+   max-frequency = <2>;
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
+
+   sdhi2: sd@ee14 {
+   compatible = "renesas,sdhi-r8a7796";
+   reg = <0 0xee14 0 0x2000>;
+   interrupts = ;
+   clocks = < CPG_MOD 312>;
+   max-frequency = <2>;
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
+
+   sdhi3: sd@ee16 {
+   compatible = "renesas,sdhi-r8a7796";
+   reg = <0 0xee16 0 0x2000>;
+   interrupts = ;
+   clocks = < CPG_MOD 311>;
+   max-frequency = <2>;
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   status = "disabled";
+   };
};
 };
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 02/12] arm64: dts: r8a7796: salvator-x: Populate EXTALR

[Simon Horman]

From: Geert Uytterhoeven 

It can be used for the watchdog.

Based on similar work for r8a7795/salvator-x by Wolfram Sang.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 13db7d61c26c..90e9a76c8b30 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -49,6 +49,10 @@
clock-frequency = <1666>;
 };
 
+_clk {
+   clock-frequency = <32768>;
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 08/12] arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3

[Simon Horman]

Based on work for the r8a7796 by Wolfram Sang.

Signed-off-by: Simon Horman 
Reviewed-by: Wolfram Sang 
---
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index c946569accb1..08c335afd970 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -97,11 +97,25 @@
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
+   power-source = <3300>;
+   };
+
+   sdhi0_pins_uhs: sd0_uhs {
+   groups = "sdhi0_data4", "sdhi0_ctrl";
+   function = "sdhi0";
+   power-source = <1800>;
};
 
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
+   power-source = <3300>;
+   };
+
+   sdhi3_pins_uhs: sd3_uhs {
+   groups = "sdhi3_data4", "sdhi3_ctrl";
+   function = "sdhi3";
+   power-source = <1800>;
};
 };
 
@@ -115,25 +129,29 @@
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi0>;
vqmmc-supply = <_sdhi0>;
cd-gpios = < 12 GPIO_ACTIVE_LOW>;
wp-gpios = < 13 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi3>;
vqmmc-supply = <_sdhi3>;
cd-gpios = < 15 GPIO_ACTIVE_LOW>;
wp-gpios = < 16 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 04/12] dt-bindings: media: renesas-fcp: Remove SoC-specific compatible strings

[Simon Horman]

From: Laurent Pinchart 

The FCP IP cores include a version register that identifies which SoC
model the IP is integrated in. SoC-specific compatible strings are not
needed.

Signed-off-by: Laurent Pinchart 
Acked-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 Documentation/devicetree/bindings/media/renesas,fcp.txt | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.txt 
b/Documentation/devicetree/bindings/media/renesas,fcp.txt
index 27f9b8e459ac..3ec91803ba58 100644
--- a/Documentation/devicetree/bindings/media/renesas,fcp.txt
+++ b/Documentation/devicetree/bindings/media/renesas,fcp.txt
@@ -11,15 +11,9 @@ are paired with. These DT bindings currently support the 
FCPV and FCPF.
 
  - compatible: Must be one or more of the following
 
-   - "renesas,r8a7795-fcpv" for R8A7795 (R-Car H3) compatible 'FCP for VSP'
-   - "renesas,r8a7795-fcpf" for R8A7795 (R-Car H3) compatible 'FCP for FDP'
- "renesas,fcpv" for generic compatible 'FCP for VSP'
- "renesas,fcpf" for generic compatible 'FCP for FDP'
 
-   When compatible with the generic version, nodes must list the
-   SoC-specific version corresponding to the platform first, followed by the
-   family-specific and/or generic versions.
-
  - reg: the register base and size for the device registers
  - clocks: Reference to the functional clock
 
@@ -32,7 +26,7 @@ Device node example
 ---
 
fcpvd1: fcp@fea2f000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>;
clocks = < CPG_MOD 602>;
power-domains = < R8A7795_PD_A3VP>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 03/29] ARM: dts: koelsch: enable UHS for SDHI 0, 1 & 3

[Simon Horman]

Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}.

Signed-off-by: Simon Horman 
Acked-by: Wolfram Sang 
---
 arch/arm/boot/dts/r8a7791-koelsch.dts | 33 ++---
 1 file changed, 30 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts 
b/arch/arm/boot/dts/r8a7791-koelsch.dts
index f8a7d090fd01..f17bfa000f73 100644
--- a/arch/arm/boot/dts/r8a7791-koelsch.dts
+++ b/arch/arm/boot/dts/r8a7791-koelsch.dts
@@ -360,16 +360,37 @@
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
+   power-source = <3300>;
+   };
+
+   sdhi0_pins_uhs: sd0_uhs {
+   groups = "sdhi0_data4", "sdhi0_ctrl";
+   function = "sdhi0";
+   power-source = <1800>;
};
 
sdhi1_pins: sd1 {
groups = "sdhi1_data4", "sdhi1_ctrl";
function = "sdhi1";
+   power-source = <3300>;
+   };
+
+   sdhi1_pins_uhs: sd1_uhs {
+   groups = "sdhi1_data4", "sdhi1_ctrl";
+   function = "sdhi1";
+   power-source = <1800>;
};
 
sdhi2_pins: sd2 {
groups = "sdhi2_data4", "sdhi2_ctrl";
function = "sdhi2";
+   power-source = <3300>;
+   };
+
+   sdhi2_pins_uhs: sd2_uhs {
+   groups = "sdhi2_data4", "sdhi2_ctrl";
+   function = "sdhi2";
+   power-source = <1800>;
};
 
qspi_pins: qspi {
@@ -454,33 +475,39 @@
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi0>;
vqmmc-supply = <_sdhi0>;
cd-gpios = < 6 GPIO_ACTIVE_LOW>;
wp-gpios = < 7 GPIO_ACTIVE_HIGH>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi1>;
vqmmc-supply = <_sdhi1>;
cd-gpios = < 14 GPIO_ACTIVE_LOW>;
wp-gpios = < 15 GPIO_ACTIVE_HIGH>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi2>;
vqmmc-supply = <_sdhi2>;
cd-gpios = < 22 GPIO_ACTIVE_LOW>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 06/29] ARM: dts: r8a7790: Correct SCIFB reg properties to cover all registers

[Simon Horman]

From: Geert Uytterhoeven 

Several SCIFB registers reside outside the reported register ranges.
Fortunately this works (on Linux), due to the PAGE_SIZE granularity of
ioremap().

Extend the sizes from 64 to 0x100 bytes to fix this, like is done on
SH/R-Mobile SoCs.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r8a7790.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 351fcc2f87df..a946474be9cf 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -711,7 +711,7 @@
scifb0: serial@e6c2 {
compatible = "renesas,scifb-r8a7790",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6c2 0 64>;
+   reg = <0 0xe6c2 0 0x100>;
interrupts = ;
clocks = <_clks R8A7790_CLK_SCIFB0>;
clock-names = "fck";
@@ -725,7 +725,7 @@
scifb1: serial@e6c3 {
compatible = "renesas,scifb-r8a7790",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6c3 0 64>;
+   reg = <0 0xe6c3 0 0x100>;
interrupts = ;
clocks = <_clks R8A7790_CLK_SCIFB1>;
clock-names = "fck";
@@ -739,7 +739,7 @@
scifb2: serial@e6ce {
compatible = "renesas,scifb-r8a7790",
 "renesas,rcar-gen2-scifb", "renesas,scifb";
-   reg = <0 0xe6ce 0 64>;
+   reg = <0 0xe6ce 0 0x100>;
interrupts = ;
clocks = <_clks R8A7790_CLK_SCIFB2>;
clock-names = "fck";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 07/12] arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3

[Simon Horman]

Enable the exposed SD card slots in the DT of the r8a7796/salvator-x.

Based on work for the r8a7795/salvator-x by Ai Kyuse.

Signed-off-by: Simon Horman 
Reviewed-by: Geert Uytterhoeven 
---
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 84 ++
 1 file changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 90e9a76c8b30..c946569accb1 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -10,6 +10,7 @@
 
 /dts-v1/;
 #include "r8a7796.dtsi"
+#include 
 
 / {
model = "Renesas Salvator-X board based on r8a7796";
@@ -29,6 +30,55 @@
/* first 128MB is reserved for secure area. */
reg = <0x0 0x4800 0x0 0x7800>;
};
+
+   vcc_sdhi0: regulator-vcc-sdhi0 {
+   compatible = "regulator-fixed";
+
+   regulator-name = "SDHI0 Vcc";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+
+   gpio = < 2 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   vccq_sdhi0: regulator-vccq-sdhi0 {
+   compatible = "regulator-gpio";
+
+   regulator-name = "SDHI0 VccQ";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <330>;
+
+   gpios = < 1 GPIO_ACTIVE_HIGH>;
+   gpios-states = <1>;
+   states = <330 1
+ 180 0>;
+   };
+
+   vcc_sdhi3: regulator-vcc-sdhi3 {
+   compatible = "regulator-fixed";
+
+   regulator-name = "SDHI3 Vcc";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+
+   gpio = < 15 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   };
+
+   vccq_sdhi3: regulator-vccq-sdhi3 {
+   compatible = "regulator-gpio";
+
+   regulator-name = "SDHI3 VccQ";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <330>;
+
+   gpios = < 14 GPIO_ACTIVE_HIGH>;
+   gpios-states = <1>;
+   states = <330 1
+ 180 0>;
+   };
+
 };
 
  {
@@ -43,6 +93,16 @@
groups = "scif_clk_a";
function = "scif_clk";
};
+
+   sdhi0_pins: sd0 {
+   groups = "sdhi0_data4", "sdhi0_ctrl";
+   function = "sdhi0";
+   };
+
+   sdhi3_pins: sd3 {
+   groups = "sdhi3_data4", "sdhi3_ctrl";
+   function = "sdhi3";
+   };
 };
 
 _clk {
@@ -53,6 +113,30 @@
clock-frequency = <32768>;
 };
 
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   vmmc-supply = <_sdhi0>;
+   vqmmc-supply = <_sdhi0>;
+   cd-gpios = < 12 GPIO_ACTIVE_LOW>;
+   wp-gpios = < 13 GPIO_ACTIVE_HIGH>;
+   bus-width = <4>;
+   status = "okay";
+};
+
+ {
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
+
+   vmmc-supply = <_sdhi3>;
+   vqmmc-supply = <_sdhi3>;
+   cd-gpios = < 15 GPIO_ACTIVE_LOW>;
+   wp-gpios = < 16 GPIO_ACTIVE_HIGH>;
+   bus-width = <4>;
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-names = "default";
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 12/12] arm64: renesas: r8a7796: add SYS-DMAC controller nodes

[Simon Horman]

From: Ulrich Hecht 

Signed-off-by: Ulrich Hecht 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 99 
 1 file changed, 99 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 6ec988c78ff8..f9cb7796ad49 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -252,6 +252,105 @@
status = "disabled";
};
 
+   dmac0: dma-controller@e670 {
+   compatible = "renesas,dmac-r8a7796",
+"renesas,rcar-dmac";
+   reg = <0 0xe670 0 0x1>;
+   interrupts = ;
+   interrupt-names = "error",
+   "ch0", "ch1", "ch2", "ch3",
+   "ch4", "ch5", "ch6", "ch7",
+   "ch8", "ch9", "ch10", "ch11",
+   "ch12", "ch13", "ch14", "ch15";
+   clocks = < CPG_MOD 219>;
+   clock-names = "fck";
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   #dma-cells = <1>;
+   dma-channels = <16>;
+   };
+
+   dmac1: dma-controller@e730 {
+   compatible = "renesas,dmac-r8a7796",
+"renesas,rcar-dmac";
+   reg = <0 0xe730 0 0x1>;
+   interrupts = ;
+   interrupt-names = "error",
+   "ch0", "ch1", "ch2", "ch3",
+   "ch4", "ch5", "ch6", "ch7",
+   "ch8", "ch9", "ch10", "ch11",
+   "ch12", "ch13", "ch14", "ch15";
+   clocks = < CPG_MOD 218>;
+   clock-names = "fck";
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   #dma-cells = <1>;
+   dma-channels = <16>;
+   };
+
+   dmac2: dma-controller@e731 {
+   compatible = "renesas,dmac-r8a7796",
+"renesas,rcar-dmac";
+   reg = <0 0xe731 0 0x1>;
+   interrupts = ;
+   interrupt-names = "error",
+   "ch0", "ch1", "ch2", "ch3",
+   "ch4", "ch5", "ch6", "ch7",
+   "ch8", "ch9", "ch10", "ch11",
+   "ch12", "ch13", "ch14", "ch15";
+   clocks = < CPG_MOD 217>;
+   clock-names = "fck";
+   power-domains = < R8A7796_PD_ALWAYS_ON>;
+   #dma-cells = <1>;
+   dma-channels = <16>;
+   };
+
sdhi0: sd@ee10 {
compatible = "renesas,sdhi-r8a7796";
reg = <0 0xee10 0 0x2000>;
-- 
2.7.0.rc3.207.g0ac5344

[GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.10

[Simon Horman]

Hi Olof, Hi Kevin, Hi Arnd,

Please consider these Renesas ARM64 based SoC DT updates for v4.10.


The following changes since commit 1001354ca34179f3db924eb66672442a173147dc:

  Linux 4.9-rc1 (2016-10-15 12:17:50 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git 
tags/renesas-arm64-dt-for-v4.10

for you to fetch changes up to 935085209343a0c507e3d9a3e01883b25c8f743e:

  arm64: renesas: r8a7796: add SYS-DMAC controller nodes (2016-11-04 10:18:07 
+0100)


Renesas ARM64 Based SoC DT Updates for v4.10

Enablement:
* Enable On-board eMMC
* Enable SDHI 0 & 3 with UHS
* Add SYS-DMAC controller nodes to r8a7796 SoC
* Populate EXTALR on r8a7796/salvator-x board; used by watchdog
* Add DU LVDS output endpoint on r8a7795/salvator-x board
* Add bias setting for USB1 pins on r8a7795/salvator-x board

Clean-Up:
* Remove FCP SoC-specific compatible strings


Geert Uytterhoeven (1):
  arm64: dts: r8a7796: salvator-x: Populate EXTALR

Laurent Pinchart (3):
  arm64: dts: r8a7795: salvator-x: Add DU LVDS output endpoint
  dt-bindings: media: renesas-fcp: Remove SoC-specific compatible strings
  arm64: dts: r8a7795: Remove FCP SoC-specific compatible strings

Simon Horman (3):
  arm64: dts: r8a7796: add SDHI nodes
  arm64: dts: r8a7796: salvator-x: enable SDHI0 & 3
  arm64: dts: r8a7796: salvator-x: enable UHS for SDHI 0 & 3

Ulrich Hecht (1):
  arm64: renesas: r8a7796: add SYS-DMAC controller nodes

Wolfram Sang (3):
  arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3
  arm64: dts: r8a7795: salvator: enable on-board eMMC
  arm64: dts: r8a7796: salvator: enable on board eMMC

Yoshihiro Shimoda (1):
  arm64: dts: r8a7795: salvator-x: add bias setting for usb1_pins

 .../devicetree/bindings/media/renesas,fcp.txt  |   8 +-
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |  85 +++-
 arch/arm64/boot/dts/renesas/r8a7795.dtsi   |  24 ++--
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 148 +
 arch/arm64/boot/dts/renesas/r8a7796.dtsi   | 139 +++
 5 files changed, 381 insertions(+), 23 deletions(-)

[PATCH 10/12] arm64: dts: r8a7796: salvator: enable on board eMMC

[Simon Horman]

From: Wolfram Sang 

Signed-off-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 44 +-
 1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 08c335afd970..a9c296b1e1b7 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -31,6 +31,24 @@
reg = <0x0 0x4800 0x0 0x7800>;
};
 
+   reg_1p8v: regulator0 {
+   compatible = "regulator-fixed";
+   regulator-name = "fixed-1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   reg_3p3v: regulator1 {
+   compatible = "regulator-fixed";
+   regulator-name = "fixed-3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
 
@@ -78,7 +96,6 @@
states = <330 1
  180 0>;
};
-
 };
 
  {
@@ -106,6 +123,18 @@
power-source = <1800>;
};
 
+   sdhi2_pins: sd2 {
+   groups = "sdhi2_data8", "sdhi2_ctrl";
+   function = "sdhi2";
+   power-source = <3300>;
+   };
+
+   sdhi2_pins_uhs: sd2_uhs {
+   groups = "sdhi2_data8", "sdhi2_ctrl";
+   function = "sdhi2";
+   power-source = <1800>;
+   };
+
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
@@ -141,6 +170,19 @@
status = "okay";
 };
 
+ {
+   /* used for on-board 8bit eMMC */
+   pinctrl-0 = <_pins>;
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
+
+   vmmc-supply = <_3p3v>;
+   vqmmc-supply = <_1p8v>;
+   bus-width = <8>;
+   non-removable;
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_uhs>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 09/12] arm64: dts: r8a7795: salvator: enable on-board eMMC

[Simon Horman]

From: Wolfram Sang 

Signed-off-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 43 ++
 1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index c8f6023c4667..da3e996ba121 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -62,6 +62,24 @@
clock-frequency = <24576000>;
};
 
+   reg_1p8v: regulator0 {
+   compatible = "regulator-fixed";
+   regulator-name = "fixed-1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   reg_3p3v: regulator1 {
+   compatible = "regulator-fixed";
+   regulator-name = "fixed-3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
 
@@ -250,6 +268,18 @@
power-source = <1800>;
};
 
+   sdhi2_pins: sd2 {
+   groups = "sdhi2_data8", "sdhi2_ctrl";
+   function = "sdhi2";
+   power-source = <3300>;
+   };
+
+   sdhi2_pins_uhs: sd2_uhs {
+   groups = "sdhi2_data8", "sdhi2_ctrl";
+   function = "sdhi2";
+   power-source = <1800>;
+   };
+
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
@@ -401,6 +431,19 @@
status = "okay";
 };
 
+ {
+   /* used for on-board 8bit eMMC */
+   pinctrl-0 = <_pins>;
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
+
+   vmmc-supply = <_3p3v>;
+   vqmmc-supply = <_1p8v>;
+   bus-width = <8>;
+   non-removable;
+   status = "okay";
+};
+
  {
pinctrl-0 = <_pins>;
pinctrl-1 = <_pins_uhs>;
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 01/29] ARM: dts: r7s72100: add mmcif clock to device tree

[Simon Horman]

From: Chris Brandt 

Signed-off-by: Chris Brandt 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm/boot/dts/r7s72100.dtsi| 9 +
 include/dt-bindings/clock/r7s72100-clock.h | 3 +++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index fb9ef9ca120e..e18d4e645d6e 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -117,6 +117,15 @@
clock-output-names = "ether";
};
 
+   mstp8_clks: mstp8_clks@fcfe0434 {
+   #clock-cells = <1>;
+   compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
+   reg = <0xfcfe0434 4>;
+   clocks = <_clk>;
+   clock-indices = ;
+   clock-output-names = "mmcif";
+   };
+
mstp9_clks: mstp9_clks@fcfe0438 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", 
"renesas,cpg-mstp-clocks";
diff --git a/include/dt-bindings/clock/r7s72100-clock.h 
b/include/dt-bindings/clock/r7s72100-clock.h
index 3cd813896d08..5eaf0fb469c2 100644
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -28,6 +28,9 @@
 /* MSTP7 */
 #define R7S72100_CLK_ETHER 4
 
+/* MSTP8 */
+#define R7S72100_CLK_MMCIF 4
+
 /* MSTP9 */
 #define R7S72100_CLK_I2C0  7
 #define R7S72100_CLK_I2C1  6
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 04/29] ARM: dts: r8a7794: set maximum frequency for SDHI clocks

[Simon Horman]

Define the upper limit otherwise the driver cannot utilize max speeds.

Signed-off-by: Simon Horman 
Reviewed-by: Wolfram Sang 
---
 arch/arm/boot/dts/r8a7794.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 9365580a194f..57e0d27cb82e 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -731,6 +731,7 @@
dmas = < 0xcd>, < 0xce>,
   < 0xcd>, < 0xce>;
dma-names = "tx", "rx", "tx", "rx";
+   max-frequency = <19500>;
power-domains = < R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -743,6 +744,7 @@
dmas = < 0xc1>, < 0xc2>,
   < 0xc1>, < 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
+   max-frequency = <9750>;
power-domains = < R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -755,6 +757,7 @@
dmas = < 0xd3>, < 0xd4>,
   < 0xd3>, < 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
+   max-frequency = <9750>;
power-domains = < R8A7794_PD_ALWAYS_ON>;
status = "disabled";
};
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 11/12] arm64: dts: r8a7795: salvator-x: add bias setting for usb1_pins

[Simon Horman]

From: Yoshihiro Shimoda 

Since this board doesn't mount pull-up/down registers for
USB1_{OVC,PWEN} pins, we should enable bias setting to pull these
pins up/down.

Signed-off-by: Yoshihiro Shimoda 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index da3e996ba121..bcaf4008d32d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -309,8 +309,20 @@
};
 
usb1_pins: usb1 {
-   groups = "usb1";
-   function = "usb1";
+   mux {
+   groups = "usb1";
+   function = "usb1";
+   };
+
+   ovc {
+   pins = "GP_6_27";
+   bias-pull-up;
+   };
+
+   pwen {
+   pins = "GP_6_26";
+   bias-pull-down;
+   };
};
 
usb2_pins: usb2 {
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 01/12] arm64: dts: r8a7795: salvator-x: enable UHS for SDHI 0 & 3

[Simon Horman]

From: Wolfram Sang 

Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Wolfram Sang 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts 
b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index b1eab6876f8c..ff4e4fe843ed 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -237,11 +237,25 @@
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
+   power-source = <3300>;
+   };
+
+   sdhi0_pins_uhs: sd0_uhs {
+   groups = "sdhi0_data4", "sdhi0_ctrl";
+   function = "sdhi0";
+   power-source = <1800>;
};
 
sdhi3_pins: sd3 {
groups = "sdhi3_data4", "sdhi3_ctrl";
function = "sdhi3";
+   power-source = <3300>;
+   };
+
+   sdhi3_pins_uhs: sd3_uhs {
+   groups = "sdhi3_data4", "sdhi3_ctrl";
+   function = "sdhi3";
+   power-source = <1800>;
};
 
sound_pins: sound {
@@ -371,25 +385,29 @@
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi0>;
vqmmc-supply = <_sdhi0>;
cd-gpios = < 12 GPIO_ACTIVE_LOW>;
wp-gpios = < 13 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
  {
pinctrl-0 = <_pins>;
-   pinctrl-names = "default";
+   pinctrl-1 = <_pins_uhs>;
+   pinctrl-names = "default", "state_uhs";
 
vmmc-supply = <_sdhi3>;
vqmmc-supply = <_sdhi3>;
cd-gpios = < 15 GPIO_ACTIVE_LOW>;
wp-gpios = < 16 GPIO_ACTIVE_HIGH>;
bus-width = <4>;
+   sd-uhs-sdr50;
status = "okay";
 };
 
-- 
2.7.0.rc3.207.g0ac5344

[PATCH 05/12] arm64: dts: r8a7795: Remove FCP SoC-specific compatible strings

[Simon Horman]

From: Laurent Pinchart 

The SoC-specific compatible strings have been removed from the FCP DT
bindings, removed them from the device tree.

Signed-off-by: Laurent Pinchart 
Reviewed-by: Geert Uytterhoeven 
Signed-off-by: Simon Horman 
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 8c15040f2540..681f54422375 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1306,28 +1306,28 @@
};
 
fcpvb1: fcp@fe92f000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfe92f000 0 0x200>;
clocks = < CPG_MOD 606>;
power-domains = < R8A7795_PD_A3VP>;
};
 
fcpf0: fcp@fe95 {
-   compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+   compatible = "renesas,fcpf";
reg = <0 0xfe95 0 0x200>;
clocks = < CPG_MOD 615>;
power-domains = < R8A7795_PD_A3VP>;
};
 
fcpf1: fcp@fe951000 {
-   compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+   compatible = "renesas,fcpf";
reg = <0 0xfe951000 0 0x200>;
clocks = < CPG_MOD 614>;
power-domains = < R8A7795_PD_A3VP>;
};
 
fcpf2: fcp@fe952000 {
-   compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
+   compatible = "renesas,fcpf";
reg = <0 0xfe952000 0 0x200>;
clocks = < CPG_MOD 613>;
power-domains = < R8A7795_PD_A3VP>;
@@ -1344,7 +1344,7 @@
};
 
fcpvb0: fcp@fe96f000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>;
clocks = < CPG_MOD 607>;
power-domains = < R8A7795_PD_A3VP>;
@@ -1361,7 +1361,7 @@
};
 
fcpvi0: fcp@fe9af000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfe9af000 0 0x200>;
clocks = < CPG_MOD 611>;
power-domains = < R8A7795_PD_A3VP>;
@@ -1378,7 +1378,7 @@
};
 
fcpvi1: fcp@fe9bf000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfe9bf000 0 0x200>;
clocks = < CPG_MOD 610>;
power-domains = < R8A7795_PD_A3VP>;
@@ -1395,7 +1395,7 @@
};
 
fcpvi2: fcp@fe9cf000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfe9cf000 0 0x200>;
clocks = < CPG_MOD 609>;
power-domains = < R8A7795_PD_A3VP>;
@@ -1412,7 +1412,7 @@
};
 
fcpvd0: fcp@fea27000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfea27000 0 0x200>;
clocks = < CPG_MOD 603>;
power-domains = < R8A7795_PD_ALWAYS_ON>;
@@ -1429,7 +1429,7 @@
};
 
fcpvd1: fcp@fea2f000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>;
clocks = < CPG_MOD 602>;
power-domains = < R8A7795_PD_ALWAYS_ON>;
@@ -1446,7 +1446,7 @@
};
 
fcpvd2: fcp@fea37000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   compatible = "renesas,fcpv";
reg = <0 0xfea37000 0 0x200>;
clocks = < CPG_MOD 601>;
power-domains = < R8A7795_PD_ALWAYS_ON>;
@@ -1463,7 +1463,7 @@
};
 
fcpvd3: fcp@fea3f000 {
-   compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+   

[PATCH 1/1] ARM: spi supports 32bytes buffer for DUAL and QUAD

[Cao Minh Hiep]

From: Hiep Cao Minh 

This patch supports 32bytes of buffer for DUAL and QUAD in QSPI by
Using Transmit/Receive Buffer Data Triggering Number.
In order to improve the DUAL and QUAD's performance of SPI 
while transferring data in PIO mode, it sends/receives each 32bytes 
data instead of each byte data as current situation.

Signed-off-by: Hiep Cao Minh 
---
 drivers/spi/spi-rspi.c | 52 +++---
 1 file changed, 49 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c
index a816f07..fb12bc5 100644
--- a/drivers/spi/spi-rspi.c
+++ b/drivers/spi/spi-rspi.c
@@ -413,7 +413,7 @@ static unsigned int qspi_set_send_trigger(struct rspi_data 
*rspi,
return n;
 }
 
-static void qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
+static int qspi_set_receive_trigger(struct rspi_data *rspi, unsigned int len)
 {
unsigned int n;
 
@@ -428,6 +428,7 @@ static void qspi_set_receive_trigger(struct rspi_data 
*rspi, unsigned int len)
qspi_update(rspi, SPBFCR_RXTRG_MASK,
 SPBFCR_RXTRG_1B, QSPI_SPBFCR);
}
+   return n;
 }
 
 #define set_config_register(spi, n) spi->ops->set_config_register(spi, n)
@@ -514,6 +515,51 @@ static int rspi_pio_transfer(struct rspi_data *rspi, const 
u8 *tx, u8 *rx,
return 0;
 }
 
+static int rspi_pio_transfer_in_or_our(struct rspi_data *rspi, const u8 *tx,
+  u8 *rx, unsigned int n)
+{
+   unsigned int i, len;
+   int ret;
+
+   while (n > 0) {
+   if (tx) {
+   len = qspi_set_send_trigger(rspi, n);
+   if (len == QSPI_BUFFER_SIZE) {
+   ret = rspi_wait_for_tx_empty(rspi);
+   if (ret < 0) {
+   dev_err(>master->dev, "transmit 
timeout\n");
+   return ret;
+   }
+   for (i = 0; i < len; i++)
+   rspi_write_data(rspi, *tx++);
+   } else {
+   ret = rspi_pio_transfer(rspi, tx, NULL, n);
+   if (ret < 0)
+   return ret;
+   }
+   }
+   if (rx) {
+   len = qspi_set_receive_trigger(rspi, n);
+   if (len == QSPI_BUFFER_SIZE) {
+   ret = rspi_wait_for_rx_full(rspi);
+   if (ret < 0) {
+   dev_err(>master->dev, "receive 
timeout\n");
+   return ret;
+   }
+   for (i = 0; i < len; i++)
+   *rx++ = rspi_read_data(rspi);
+   } else {
+   ret = rspi_pio_transfer(rspi, NULL, rx, n);
+   if (ret < 0)
+   return ret;
+   *rx++ = ret;
+   }
+   }
+   n -= len;
+   }
+   return 0;
+}
+
 static void rspi_dma_complete(void *arg)
 {
struct rspi_data *rspi = arg;
@@ -793,7 +839,7 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct 
spi_transfer *xfer)
return ret;
}
 
-   ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len);
+   ret = rspi_pio_transfer_in_or_our(rspi, xfer->tx_buf, NULL, xfer->len);
if (ret < 0)
return ret;
 
@@ -811,7 +857,7 @@ static int qspi_transfer_in(struct rspi_data *rspi, struct 
spi_transfer *xfer)
return ret;
}
 
-   return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len);
+   return rspi_pio_transfer_in_or_our(rspi, NULL, xfer->rx_buf, xfer->len);
 }
 
 static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
-- 
1.9.1

[PATCH 0/1] ARM: spi supports 32bytes buffer for DUAL and QUAD

[Cao Minh Hiep]

From: Hiep Cao Minh 

Hi,

This patch will improve the DUAL and QUAD's performance of SPI,
that supported for GEN2 r8a7790 SOC in PIO mode. 
It sends/receives each 32bytes of data instead of each byte data 
as current situation.

This patch was developed based on the Mainline v4.9-rc3 and have 
tested on the Lager board.

Please consider the following patches for the r8a7790 Soc.

Thank you!

Cao Minh Hiep

Hiep Cao Minh (1):
  ARM:spi supports 32bytes buffer for DUAL and QUAD

 drivers/spi/spi-rspi.c | 52 +++---
 1 file changed, 49 insertions(+), 3 deletions(-)

-- 
1.9.1

RE: [RFC 5/5] doc_rst: media: New SDR formats SC16, SC18 & SC20

[Ramesh Shanmugasundaram]

Hi Antti,

Thanks for the response.

> Subject: Re: [RFC 5/5] doc_rst: media: New SDR formats SC16, SC18 & SC20
> 
> Hello
> 
> On 11/02/2016 10:58 PM, Laurent Pinchart wrote:
> > Hi Ramesh,
> >
> > On Wednesday 02 Nov 2016 09:00:00 Ramesh Shanmugasundaram wrote:
> >> Hi Laurent,
> >>
> >> Any further thoughts on the SDR format please (especially the comment
> >> below). I would appreciate your feedback.
> >>
>  On Wednesday 12 Oct 2016 15:10:29 Ramesh Shanmugasundaram wrote:
> > This patch adds documentation for the three new SDR formats
> >
> > V4L2_SDR_FMT_SCU16BE
> > V4L2_SDR_FMT_SCU18BE
> > V4L2_SDR_FMT_SCU20BE
> >>
> >> [snip]
> >>
> > +
> > +   -  start + 0:
> > +
> > +   -  I'\ :sub:`0[D13:D6]`
> > +
> > +   -  I'\ :sub:`0[D5:D0]`
> > +
> > +-  .. row 2
> > +
> > +   -  start + buffer_size/2:
> > +
> > +   -  Q'\ :sub:`0[D13:D6]`
> > +
> > +   -  Q'\ :sub:`0[D5:D0]`
> 
>  The format looks planar, does it use one V4L2 plane (as does NV12)
>  or two V4L2 planes (as does NV12M) ? Same question for the other
> formats.
> >>>
> >>> Thank you for bringing up this topic. This is one of the key design
> >>> dilemma.
> >>>
> >>> The I & Q data for these three SDR formats comes from two different
> >>> DMA channels and hence two separate pointers -> we could say it is
> >>> v4l2 multi- planar. Right now, I am making it look like a single
> >>> plane by presenting the data in one single buffer ptr.
> >>>
> >>> For e.g. multi-planar SC16 format would look something like this
> >>>
> >>> <32bits-->
> >>> <--I(14 bit data) + 2bit status--16bit padded zeros--> : start0 + 0
> >>> <--I(14 bit data) + 2bit status--16bit padded zeros--> : start0 + 4
> ...
> >>> <--Q(14 bit data) + 2bit status--16bit padded zeros--> : start1 + 0
> >>> <--Q(14 bit data) + 2bit status--16bit padded zeros--> : start1 + 4
> >>>
> >>> My concerns are
> >>>
> >>> 1) These formats are not a standard as the video "Image Formats".
> >>> These formats are possible when we use DRIF + MAX2175 combination.
> >>> If we interface with a different tuner vendor, the above format(s)
> >>> MAY/MAY NOT be re-usable. We do not know at this point. This is the
> >>> main open item for discussion in the cover letter.
> >
> > If the formats are really device-specific then they should be
> > documented accordingly and not made generic.
> >
> >>> 2) MPLANE support within V4L2 seems specific to video. Please
> >>> correct me if this is wrong interpretation.
> >>>
> >>> - struct v4l2_format contains v4l2_sdr_format and
> >>> v4l2_pix_format_mplane as members of union. Should I create a new
> >>> v4l2_sdr_format_mplane? If I have to use v4l2_pix_format_mplane most
> >>> of the video specific members would be unused (it would be similar
> >>> to using v4l2_pix_format itself instead of v4l2_sdr_format)?
> >
> > I have no answer to that question as I'm not familiar with SDR. Antti,
> > you've added v4l2_sdr_format to the API, what's your opinion ? Hans,
> > as you've acked the patch, your input would be appreciated as well.
> 
> If I understood correctly this hardware provides I and Q samples via
> different channels and driver now combines those channels as a sequential
> IQ sample pairs. 

The driver combines the two buffer ptrs and present as one single buffer. For a 
buffer of size 200

ptr + 0   : I I I I ... I
ptr + 100 : Q Q Q Q ... Q

>I have never seen any other than hw which provides IQ IQ
> IQ IQ ... IQ.

There are some modes where this h/w combo can also do IQ IQ IQ pattern. Those 
modes are not added in the RFC patchset.

> This is
> I I I I ... I
> Q Q Q Q ... Q
> I am not very familiar with planars, but it sounds like it is correct
> approach. So I think should be added rather than emulate packet sequential
> format.

My understanding of V4L2 MPLANE constructs is limited to a quick code read 
only. At this point MPLANE support seems specific to video. SDR is defined as 
separate format like v4l2_pix_format. Questions would be - should we define new 
SDR_MPLANE? or merge SDR format with pix format & reuse existing MPLANE with 
some SDR extensions (if possible)? These seem big design decisions. Any 
suggestions please?

For my use case, MPLANE support does not seem to add significant benefit except 
it may be syntactically correct. I am doing cyclic DMA with a small set of h/w 
buffers and copying each stage to one mmapped vmalloc vb2_buffer at two 
offsets. If we add MPLANE support, it can be two non-contiguous buffer 
pointers. 

> 
> >
> >>> - The above decision (accomodate SDR & MPLANE) needs to be
> >>> propagated across the framework. Is this the preferred approach?
> >>>
> >>> It goes back to point (1). As of today, the change set for this
> >>> combo
> >>> (DRIF+MAX2175) introduces new SDR formats only. Should it add
> >>> further
> >>> SDR+MPLANE support to the framework as well?
> 

Re: [PATCH v2] ARM: DTS: r8a7794: alt: Fix PFC names for DU

[Simon Horman]

Hi,

On Thu, Nov 03, 2016 at 08:34:46PM +0100, Jacopo Mondi wrote:
> Update the PFC pin groups and function names of DU interface for
> r8a7794 ALT board.
> 
> The currently specified pin groups and function names prevented PFC and
> DU interfaces from being correctly configured:
> 
> sh-pfc e606.pin-controller: function 'du' not supported
> sh-pfc e606.pin-controller: invalid function du in map table
> sh-pfc e606.pin-controller: function 'du' not supported
> sh-pfc e606.pin-controller: invalid function du in map table
> sh-pfc e606.pin-controller: function 'du' not supported
> sh-pfc e606.pin-controller: invalid function du in map table
> sh-pfc e606.pin-controller: function 'du' not supported
> sh-pfc e606.pin-controller: invalid function du in map table
> rcar-du: probe of feb0.display failed with error -22
> 
> Signed-off-by: Jacopo Mondi 
> ---
> 
> v1->v2:
> - s/PCF/PFC/ in commit message according to Sergei Shtylyov's comment
> 
> Patch applied against Simon Horman's renesas/master branch.
> The PCF pin groups and function renaming was introduced by commit 56ed4bb9 and
> DTS for ALT board has never been update accordingly.
> Tested displaying frames on VGA interface: the rcar-du driver loads correctly.

Thanks for noticing this.

There is no need to repost to update the subject, but for reference I would
prefer the prefix to be "ARM: dts: alt:". Assuming there are no other
changes I can fix that up when queuing up this change.

I am wondering if this should be queued up as a fix for v4.9 and in turn
v4.8-stable. Or if it should just be queued up for v4.10.

In the case of the former I'd advocate adding the following tag
(again no need to repost just to update this):

Fixes: 56ed4bb984ac ("pinctrl: sh-pfc: r8a7794: Add DU pin groups")

>  arch/arm/boot/dts/r8a7794-alt.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/r8a7794-alt.dts 
> b/arch/arm/boot/dts/r8a7794-alt.dts
> index 8d1b35a..9d65fb3 100644
> --- a/arch/arm/boot/dts/r8a7794-alt.dts
> +++ b/arch/arm/boot/dts/r8a7794-alt.dts
> @@ -165,8 +165,8 @@
>   pinctrl-names = "default";
>  
>   du_pins: du {
> - groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_dotclkout0";
> - function = "du";
> + groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
> + function = "du1";
>   };
>  
>   scif2_pins: scif2 {
> -- 
> 2.7.4
> 
> 
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>