[PATCH] ARM: EXYNOS4: Add header file protection macros

2011-09-19 Thread Sachin Kamat
This patch adds header file protection macros to prevent duplication.

Signed-off-by: Sachin Kamat 
---
 arch/arm/mach-exynos4/include/mach/pm-core.h |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos4/include/mach/pm-core.h 
b/arch/arm/mach-exynos4/include/mach/pm-core.h
index 1df3b81..4c3406b 100644
--- a/arch/arm/mach-exynos4/include/mach/pm-core.h
+++ b/arch/arm/mach-exynos4/include/mach/pm-core.h
@@ -14,6 +14,10 @@
  * it under the terms of the GNU General Public License version 2 as
  * published by the Free Software Foundation.
 */
+
+#ifndef __ASM_ARCH_PM_CORE_H
+#define __ASM_ARCH_PM_CORE_H __FILE__
+
 #include 
 
 static inline void s3c_pm_debug_init_uart(void)
@@ -57,3 +61,5 @@ static inline void s3c_pm_saved_gpios(void)
 {
/* nothing here yet */
 }
+
+#endif /* __ASM_ARCH_PM_CORE_H */
-- 
1.7.4.1

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Re: Temporary change the URL of s5p tree for linux-next

2011-09-19 Thread Stephen Rothwell
Hi,

On Mon, 19 Sep 2011 19:24:29 +0900 Kukjin Kim  wrote:
>
> As you know, git.kernel.org has been down :(
> 
> So please change the URL of s5p tree for linux-next.
> git://github.com/kgene/linux-samsung.git for-next.

I will switch from today.

> As a note, I'd like to restore to use git.kernel.org after available of
> git.kernel.org.

Understood.

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/


pgpCOnVhGZhSB.pgp
Description: PGP signature


[PATCH v3 3/4] ARM: EXYNOS4: Rename sclk_cam clocks for FIMC driver

2011-09-19 Thread Sylwester Nawrocki
The sclk_cam clocks are now controlled by the top level FIMC media
device driver bound to "s5p-fimc-md" platform device.
Rename sclk_cam clocks so they accessible by the corresponding
driver.

Signed-off-by: Sylwester Nawrocki 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-exynos4/clock.c |6 ++
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index da9567a..a25c818 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -1084,8 +1084,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 28, .size = 4 },
}, {
.clk= {
-   .name   = "sclk_cam",
-   .devname= "exynos4-fimc.0",
+   .name   = "sclk_cam0",
.enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit= (1 << 16),
},
@@ -1094,8 +1093,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLKDIV_CAM, .shift = 16, .size = 4 },
}, {
.clk= {
-   .name   = "sclk_cam",
-   .devname= "exynos4-fimc.1",
+   .name   = "sclk_cam1",
.enable = exynos4_clksrc_mask_cam_ctrl,
.ctrlbit= (1 << 20),
},
-- 
1.7.6.3

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[PATCH v3 4/4] ARM: S5PV210: UNIVERSAL_C210: Add support for M-5MOLS image sensor

2011-09-19 Thread Sylwester Nawrocki
Add voltage regulator definitions for M-5MOLS camera, platform data
definition for the sensor and MIPI-CSI receiver drivers.
Add CAM power domain dependencies for FIMC and CSIS devices.
Define required I2C0 bus timings. Setup camera port A GPIO.

Signed-off-by: Sylwester Nawrocki 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-exynos4/Kconfig   |3 +
 arch/arm/mach-exynos4/mach-universal_c210.c |  206 +-
 2 files changed, 201 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 3b594fe..f1fd20e 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -171,6 +171,7 @@ config MACH_UNIVERSAL_C210
select S5P_DEV_FIMC1
select S5P_DEV_FIMC2
select S5P_DEV_FIMC3
+   select S5P_DEV_CSIS0
select S5P_DEV_FIMD0
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC2
@@ -188,6 +189,8 @@ config MACH_UNIVERSAL_C210
select EXYNOS4_SETUP_I2C3
select EXYNOS4_SETUP_I2C5
select EXYNOS4_SETUP_SDHCI
+   select EXYNOS4_SETUP_FIMC
+   select S5P_SETUP_MIPIPHY
help
  Machine support for Samsung Mobile Universal S5PC210 Reference
  Board.
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c 
b/arch/arm/mach-exynos4/mach-universal_c210.c
index 315c503..18cf5c7 100644
--- a/arch/arm/mach-exynos4/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -37,9 +37,16 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include 
 
+#include 
+#include 
+#include 
+
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL |\
 S3C2410_UCON_RXILEVEL |\
@@ -192,6 +199,7 @@ static struct regulator_init_data lp3974_ldo2_data = {
 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
+   REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
 };
 
 static struct regulator_init_data lp3974_ldo3_data = {
@@ -254,6 +262,10 @@ static struct regulator_init_data lp3974_ldo6_data = {
},
 };
 
+static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
+   REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
+};
+
 static struct regulator_init_data lp3974_ldo7_data = {
.constraints= {
.name   = "VLCD+VMIPI_1.8V",
@@ -265,6 +277,8 @@ static struct regulator_init_data lp3974_ldo7_data = {
.disabled   = 1,
},
},
+   .num_consumer_supplies  = ARRAY_SIZE(lp3974_ldo7_consumer),
+   .consumer_supplies  = lp3974_ldo7_consumer,
 };
 
 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
@@ -313,6 +327,9 @@ static struct regulator_init_data lp3974_ldo10_data = {
},
 };
 
+static struct regulator_consumer_supply lp3974_ldo11_consumer =
+   REGULATOR_SUPPLY("dig_28", "0-001f");
+
 static struct regulator_init_data lp3974_ldo11_data = {
.constraints= {
.name   = "CAM_AF_3.3V",
@@ -324,6 +341,8 @@ static struct regulator_init_data lp3974_ldo11_data = {
.disabled   = 1,
},
},
+   .num_consumer_supplies  = 1,
+   .consumer_supplies  = &lp3974_ldo11_consumer,
 };
 
 static struct regulator_init_data lp3974_ldo12_data = {
@@ -352,6 +371,9 @@ static struct regulator_init_data lp3974_ldo13_data = {
},
 };
 
+static struct regulator_consumer_supply lp3974_ldo14_consumer =
+   REGULATOR_SUPPLY("dig_18", "0-001f");
+
 static struct regulator_init_data lp3974_ldo14_data = {
.constraints= {
.name   = "CAM_I_HOST_1.8V",
@@ -363,8 +385,14 @@ static struct regulator_init_data lp3974_ldo14_data = {
.disabled   = 1,
},
},
+   .num_consumer_supplies  = 1,
+   .consumer_supplies  = &lp3974_ldo14_consumer,
 };
 
+
+static struct regulator_consumer_supply lp3974_ldo15_consumer =
+   REGULATOR_SUPPLY("dig_12", "0-001f");
+
 static struct regulator_init_data lp3974_ldo15_data = {
.constraints= {
.name   = "CAM_S_DIG+FM33_CORE_1.2V",
@@ -376,6 +404,12 @@ static struct regulator_init_data lp3974_ldo15_data = {
.disabled   = 1,
},
},
+   .num_consumer_supplies  = 1,
+   .consumer_supplies  = &lp3974_ldo15_consumer,
+};
+
+static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
+   REGULATOR_SUPPLY("a_sensor", "0-001f"),
 };
 
 static struct regulator_init_data lp3974_ldo16_data = {
@@ -389,6 +423,8 @@ static struct regulator_init_data lp3974_ldo16_data = {
.disabled   = 1,
},
},
+   .num

[PATCH v3 2/4] ARM: S5PV210: Add support for NOON010PC30 sensor on GONI board

2011-09-19 Thread Sylwester Nawrocki
Add platform data for CIF camera sensor and FIMC platform data
entries for it. Add platform device for s5p-fimc media device
driver and the camera port A I/O pins initialization.

Signed-off-by: Sylwester Nawrocki 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-s5pv210/Kconfig |1 +
 arch/arm/mach-s5pv210/mach-goni.c |   53 +
 2 files changed, 54 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index ccef034..f22c683 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -99,6 +99,7 @@ config MACH_GONI
select S5PV210_SETUP_I2C2
select S5PV210_SETUP_KEYPAD
select S5PV210_SETUP_SDHCI
+   select S5PV210_SETUP_FIMC
help
  Machine support for Samsung GONI board
  S5PC110(MCP) is one of package option of S5PV210
diff --git a/arch/arm/mach-s5pv210/mach-goni.c 
b/arch/arm/mach-s5pv210/mach-goni.c
index 14578f5..01e4867 100644
--- a/arch/arm/mach-s5pv210/mach-goni.c
+++ b/arch/arm/mach-s5pv210/mach-goni.c
@@ -48,6 +48,11 @@
 #include 
 #include 
 #include 
+#include 
+
+#include 
+#include 
+#include 
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
 #define GONI_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |\
@@ -272,6 +277,14 @@ static void __init goni_tsp_init(void)
i2c2_devs[0].irq = gpio_to_irq(gpio);
 }
 
+static void goni_camera_init(void)
+{
+   s5pv210_fimc_setup_gpio(S5P_CAMPORT_A);
+
+   /* Set max driver strength on CAM_A_CLKOUT pin. */
+   s5p_gpio_set_drvstr(S5PV210_GPE1(3), S5P_GPIO_DRVSTR_LV4);
+}
+
 /* MAX8998 regulators */
 #if defined(CONFIG_REGULATOR_MAX8998) || 
defined(CONFIG_REGULATOR_MAX8998_MODULE)
 
@@ -808,6 +821,39 @@ static void goni_setup_sdhci(void)
s3c_sdhci2_set_platdata(&goni_hsmmc2_data);
 };
 
+static struct noon010pc30_platform_data noon010pc30_pldata = {
+   .clk_rate   = 1600UL,
+   .gpio_nreset= S5PV210_GPB(2), /* CAM_CIF_NRST */
+   .gpio_nstby = S5PV210_GPB(0), /* CAM_CIF_NSTBY */
+};
+
+static struct i2c_board_info noon010pc30_board_info = {
+   I2C_BOARD_INFO("NOON010PC30", 0x60 >> 1),
+   .platform_data = &noon010pc30_pldata,
+};
+
+static struct s5p_fimc_isp_info goni_camera_sensors[] = {
+   {
+   .mux_id = 0,
+   .flags  = V4L2_MBUS_PCLK_SAMPLE_FALLING |
+ V4L2_MBUS_VSYNC_ACTIVE_LOW,
+   .bus_type   = FIMC_ITU_601,
+   .board_info = &noon010pc30_board_info,
+   .i2c_bus_num= 0,
+   .clk_frequency  = 1600UL,
+   },
+};
+
+struct s5p_platform_fimc goni_fimc_md_platdata __initdata = {
+   .isp_info   = goni_camera_sensors,
+   .num_clients= ARRAY_SIZE(goni_camera_sensors),
+};
+
+struct platform_device s5p_device_fimc_md = {
+   .name   = "s5p-fimc-md",
+   .id = -1,
+};
+
 static struct platform_device *goni_devices[] __initdata = {
&s3c_device_fb,
&s5p_device_onenand,
@@ -825,6 +871,7 @@ static struct platform_device *goni_devices[] __initdata = {
&s5p_device_fimc0,
&s5p_device_fimc1,
&s5p_device_fimc2,
+   &s5p_device_fimc_md,
&s3c_device_hsmmc0,
&s3c_device_hsmmc1,
&s3c_device_hsmmc2,
@@ -893,6 +940,12 @@ static void __init goni_machine_init(void)
/* FB */
s3c_fb_set_platdata(&goni_lcd_pdata);
 
+   /* FIMC */
+   s3c_set_platdata(&goni_fimc_md_platdata, sizeof(goni_fimc_md_platdata),
+&s5p_device_fimc_md);
+
+   goni_camera_init();
+
/* SPI */
spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
 
-- 
1.7.6.3

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[PATCH v3 1/4] ARM: S5PV210: Rename sclk_cam clocks for FIMC media driver

2011-09-19 Thread Sylwester Nawrocki
The sclk_cam clocks are now controlled by the top level FIMC media
device driver bound to "s5p-fimc-md" platform device.
Rename sclk_cam clocks so they accessible by the corresponding
driver.

Signed-off-by: Sylwester Nawrocki 
Signed-off-by: Kyungmin Park 
---
 arch/arm/mach-s5pv210/clock.c |6 ++
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index ad553ee..4c5ac7a 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -879,8 +879,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 },
}, {
.clk= {
-   .name   = "sclk_cam",
-   .devname= "s5pv210-fimc.0",
+   .name   = "sclk_cam0",
.enable = s5pv210_clk_mask0_ctrl,
.ctrlbit= (1 << 3),
},
@@ -889,8 +888,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
}, {
.clk= {
-   .name   = "sclk_cam",
-   .devname= "s5pv210-fimc.1",
+   .name   = "sclk_cam1",
.enable = s5pv210_clk_mask0_ctrl,
.ctrlbit= (1 << 4),
},
-- 
1.7.6.3

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[PATCH v3 0/4] ARM: Samsung: Add board setup for M-5MOLS and NOON010PC30 camera sensors

2011-09-19 Thread Sylwester Nawrocki
Hello,

the following change set adds board setup code for NOOON01PC30 sensor on GONI 
and M-5MOLS on UNIVERSAL_C210 board.
Some clocks are modified in line with latest FIMC driver modifications for v3.2.

Changes since previous version:
 - improved error handling, switched to gpio_request_array()
 - created against git://github.com/kgene/linux-samsung.git for-next

Sylwester Nawrocki (4):
  ARM: S5PV210: Rename sclk_cam clocks for FIMC media driver
  ARM: S5PV210: Add support for NOON010PC30 sensor on GONI board
  ARM: EXYNOS4: Rename sclk_cam clocks for FIMC driver
  ARM: S5PV210: UNIVERSAL_C210: Add support for M-5MOLS image sensor

 arch/arm/mach-exynos4/Kconfig   |3 +
 arch/arm/mach-exynos4/clock.c   |6 +-
 arch/arm/mach-exynos4/mach-universal_c210.c |  206 +-
 arch/arm/mach-s5pv210/Kconfig   |1 +
 arch/arm/mach-s5pv210/clock.c   |6 +-
 arch/arm/mach-s5pv210/mach-goni.c   |   53 +++
 6 files changed, 259 insertions(+), 16 deletions(-)
-- 
1.7.6.3

The patches can be pulled from 
git://git.infradead.org/users/kmpark/linux-2.6-samsung, 
branch samsung-board-camera.

Thanks,
--
Sylwester Nawrocki
Samsung Poland R&D Center
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[PATCH 3/3] ARM: EXYNOS4: Support suspend/resume for EXYNOS4212

2011-09-19 Thread Jongpill Lee
This patch adds suspend and resume function for EXYNOS4212.

Signed-off-by: Jongpill Lee 
---
 arch/arm/mach-exynos4/pm.c  |7 +++
 arch/arm/mach-exynos4/pmu.c |  118 ++-
 2 files changed, 124 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
index 62e4f43..509a435 100644
--- a/arch/arm/mach-exynos4/pm.c
+++ b/arch/arm/mach-exynos4/pm.c
@@ -339,6 +339,13 @@ static int exynos4_pm_suspend(void)
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 
+   if (soc_is_exynos4212()) {
+   tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION);
+   tmp &= ~(S5P_USE_STANDBYWFI_ISP_ARM |
+S5P_USE_STANDBYWFE_ISP_ARM);
+   __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+   }
+
/* Save Power control register */
asm ("mrc p15, 0, %0, c15, c0, 0"
 : "=r" (tmp) : : "cc");
diff --git a/arch/arm/mach-exynos4/pmu.c b/arch/arm/mach-exynos4/pmu.c
index 02bfa0d..bba48f5 100644
--- a/arch/arm/mach-exynos4/pmu.c
+++ b/arch/arm/mach-exynos4/pmu.c
@@ -94,6 +94,114 @@ static struct exynos4_pmu_conf exynos4210_pmu_config[] = {
{ PMU_TABLE_END,},
 };
 
+static struct exynos4_pmu_conf exynos4212_pmu_config[] = {
+   { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE0,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE1,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } },
+   { S5P_ISP_ARM_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR, { 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR,   { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_COMMON_LOWPWR,{ 0x0, 0x0, 0x2 } },
+   { S5P_L2_0_LOWPWR,  { 0x0, 0x0, 0x3 } },
+   /* XXX_OPTION register should be set other field */
+   { S5P_ARM_L2_0_OPTION,  { 0x10, 0x10, 0x0 } },
+   { S5P_L2_1_LOWPWR,  { 0x0, 0x0, 0x3 } },
+   { S5P_ARM_L2_1_OPTION,  { 0x10, 0x10, 0x0 } },
+   { S5P_CMU_ACLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_SCLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_DRAM_FREQ_DOWN_LOWPWR,{ 0x1, 0x1, 0x1 } },
+   { S5P_DDRPHY_DLLOFF_LOWPWR, { 0x1, 0x1, 0x1 } },
+   { S5P_LPDDR_PHY_DLL_LOCK_LOWPWR,{ 0x1, 0x1, 0x1 } },
+   { S5P_CMU_ACLKSTOP_COREBLK_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_SCLKSTOP_COREBLK_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_COREBLK_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_APLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_MPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_VPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_EPLL_SYSCLK_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_MPLLUSER_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_GPSALIVE_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_CAM_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_TV_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_MFC_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_G3D_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_LCD0_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_ISP_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_TV_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_LCD0_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_ISP_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_MAUDIO_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_TOP_BUS_LOWPWR,   { 0x3, 0x0, 0x0 } },
+   { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } },
+   { S5P_TOP_PWR_LOWPWR,   { 0x3, 0x0, 0x3 } },
+   { S5P_TOP_BUS_COREBLK_LOWPWR,   { 0x3, 0x0, 0x0 } },
+   { S5P_TOP_RETENTION_COREBLK_LOWPWR, { 0x1, 0x0, 0x1 } },
+   { S5P_TOP_PWR_COREBLK_LOWPWR,   { 0x3, 0x0, 0x3 } },
+   { S5P_LOGIC_RES

[PATCH V2 3/3] ARM: EXYNOS4: Support suspend/resume for EXYNOS4212

2011-09-19 Thread Jongpill Lee
This patch adds suspend and resume function for EXYNOS4212.

Signed-off-by: Jongpill Lee 
---
 arch/arm/mach-exynos4/pm.c  |7 +++
 arch/arm/mach-exynos4/pmu.c |  118 ++-
 2 files changed, 124 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c
index 62e4f43..509a435 100644
--- a/arch/arm/mach-exynos4/pm.c
+++ b/arch/arm/mach-exynos4/pm.c
@@ -339,6 +339,13 @@ static int exynos4_pm_suspend(void)
tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 
+   if (soc_is_exynos4212()) {
+   tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION);
+   tmp &= ~(S5P_USE_STANDBYWFI_ISP_ARM |
+S5P_USE_STANDBYWFE_ISP_ARM);
+   __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
+   }
+
/* Save Power control register */
asm ("mrc p15, 0, %0, c15, c0, 0"
 : "=r" (tmp) : : "cc");
diff --git a/arch/arm/mach-exynos4/pmu.c b/arch/arm/mach-exynos4/pmu.c
index 02bfa0d..bba48f5 100644
--- a/arch/arm/mach-exynos4/pmu.c
+++ b/arch/arm/mach-exynos4/pmu.c
@@ -94,6 +94,114 @@ static struct exynos4_pmu_conf exynos4210_pmu_config[] = {
{ PMU_TABLE_END,},
 };
 
+static struct exynos4_pmu_conf exynos4212_pmu_config[] = {
+   { S5P_ARM_CORE0_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE0,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL0, { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_CORE1_LOWPWR, { 0x0, 0x0, 0x2 } },
+   { S5P_DIS_IRQ_CORE1,{ 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_CENTRAL1, { 0x0, 0x0, 0x0 } },
+   { S5P_ISP_ARM_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR, { 0x0, 0x0, 0x0 } },
+   { S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR,   { 0x0, 0x0, 0x0 } },
+   { S5P_ARM_COMMON_LOWPWR,{ 0x0, 0x0, 0x2 } },
+   { S5P_L2_0_LOWPWR,  { 0x0, 0x0, 0x3 } },
+   /* XXX_OPTION register should be set other field */
+   { S5P_ARM_L2_0_OPTION,  { 0x10, 0x10, 0x0 } },
+   { S5P_L2_1_LOWPWR,  { 0x0, 0x0, 0x3 } },
+   { S5P_ARM_L2_1_OPTION,  { 0x10, 0x10, 0x0 } },
+   { S5P_CMU_ACLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_SCLKSTOP_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_DRAM_FREQ_DOWN_LOWPWR,{ 0x1, 0x1, 0x1 } },
+   { S5P_DDRPHY_DLLOFF_LOWPWR, { 0x1, 0x1, 0x1 } },
+   { S5P_LPDDR_PHY_DLL_LOCK_LOWPWR,{ 0x1, 0x1, 0x1 } },
+   { S5P_CMU_ACLKSTOP_COREBLK_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_SCLKSTOP_COREBLK_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_COREBLK_LOWPWR, { 0x1, 0x1, 0x0 } },
+   { S5P_APLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_MPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_VPLL_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_EPLL_SYSCLK_LOWPWR,   { 0x1, 0x1, 0x0 } },
+   { S5P_MPLLUSER_SYSCLK_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_GPSALIVE_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_CAM_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_TV_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_MFC_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_G3D_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_LCD0_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_ISP_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_CLKSTOP_GPS_LOWPWR,   { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_CAM_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_TV_LOWPWR,  { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_MFC_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_G3D_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_LCD0_LOWPWR,{ 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_ISP_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_CMU_RESET_MAUDIO_LOWPWR,  { 0x1, 0x1, 0x0 } },
+   { S5P_CMU_RESET_GPS_LOWPWR, { 0x1, 0x0, 0x0 } },
+   { S5P_TOP_BUS_LOWPWR,   { 0x3, 0x0, 0x0 } },
+   { S5P_TOP_RETENTION_LOWPWR, { 0x1, 0x0, 0x1 } },
+   { S5P_TOP_PWR_LOWPWR,   { 0x3, 0x0, 0x3 } },
+   { S5P_TOP_BUS_COREBLK_LOWPWR,   { 0x3, 0x0, 0x0 } },
+   { S5P_TOP_RETENTION_COREBLK_LOWPWR, { 0x1, 0x0, 0x1 } },
+   { S5P_TOP_PWR_COREBLK_LOWPWR,   { 0x3, 0x0, 0x3 } },
+   { S5P_LOGIC_RES

[PATCH 2/3] ARM: EXYNOS4: Add PMU register definition for EXYNOS4212

2011-09-19 Thread Jongpill Lee
This patch adds PMU register definition for Exynos4212

Signed-off-by: Jongpill Lee 
---
 arch/arm/mach-exynos4/include/mach/regs-pmu.h |   69 +
 1 files changed, 58 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h 
b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 7fa44b9..6fab38e 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -25,8 +25,10 @@
 
 #define S5P_USE_STANDBY_WFI0   (1 << 16)
 #define S5P_USE_STANDBY_WFI1   (1 << 17)
+#define S5P_USE_STANDBYWFI_ISP_ARM (1 << 18)
 #define S5P_USE_STANDBY_WFE0   (1 << 24)
 #define S5P_USE_STANDBY_WFE1   (1 << 25)
+#define S5P_USE_STANDBYWFE_ISP_ARM (1 << 26)
 
 #define S5P_SWRESETS5P_PMUREG(0x0400)
 
@@ -34,15 +36,11 @@
 #define S5P_EINT_WAKEUP_MASK   S5P_PMUREG(0x0604)
 #define S5P_WAKEUP_MASKS5P_PMUREG(0x0608)
 
-#define S5P_USBHOST_PHY_CONTROLS5P_PMUREG(0x0708)
-#define S5P_USBHOST_PHY_ENABLE (1 << 0)
-
 #define S5P_MIPI_DPHY_CONTROL(n)   S5P_PMUREG(0x0710 + (n) * 4)
 #define S5P_MIPI_DPHY_ENABLE   (1 << 0)
 #define S5P_MIPI_DPHY_SRESETN  (1 << 1)
 #define S5P_MIPI_DPHY_MRESETN  (1 << 2)
 
-#define S5P_PMU_SATA_PHY_CONTROL   S5P_PMUREG(0x0720)
 #define S5P_INFORM0S5P_PMUREG(0x0800)
 #define S5P_INFORM1S5P_PMUREG(0x0804)
 #define S5P_INFORM2S5P_PMUREG(0x0808)
@@ -75,7 +73,6 @@
 #define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148)
 #define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C)
 #define S5P_CMU_CLKSTOP_LCD0_LOWPWRS5P_PMUREG(0x1150)
-#define S5P_CMU_CLKSTOP_LCD1_LOWPWRS5P_PMUREG(0x1154)
 #define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR  S5P_PMUREG(0x1158)
 #define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C)
 #define S5P_CMU_RESET_CAM_LOWPWR   S5P_PMUREG(0x1160)
@@ -83,7 +80,6 @@
 #define S5P_CMU_RESET_MFC_LOWPWR   S5P_PMUREG(0x1168)
 #define S5P_CMU_RESET_G3D_LOWPWR   S5P_PMUREG(0x116C)
 #define S5P_CMU_RESET_LCD0_LOWPWR  S5P_PMUREG(0x1170)
-#define S5P_CMU_RESET_LCD1_LOWPWR  S5P_PMUREG(0x1174)
 #define S5P_CMU_RESET_MAUDIO_LOWPWRS5P_PMUREG(0x1178)
 #define S5P_CMU_RESET_GPS_LOWPWR   S5P_PMUREG(0x117C)
 #define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180)
@@ -91,14 +87,11 @@
 #define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188)
 #define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0)
 #define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0)
-#define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4)
 #define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8)
 #define S5P_USBOTG_MEM_LOWPWR  S5P_PMUREG(0x11CC)
 #define S5P_HSMMC_MEM_LOWPWR   S5P_PMUREG(0x11D0)
 #define S5P_CSSYS_MEM_LOWPWR   S5P_PMUREG(0x11D4)
 #define S5P_SECSS_MEM_LOWPWR   S5P_PMUREG(0x11D8)
-#define S5P_PCIE_MEM_LOWPWRS5P_PMUREG(0x11E0)
-#define S5P_SATA_MEM_LOWPWRS5P_PMUREG(0x11E4)
 #define S5P_PAD_RETENTION_DRAM_LOWPWR  S5P_PMUREG(0x1200)
 #define S5P_PAD_RETENTION_MAUDIO_LOWPWRS5P_PMUREG(0x1204)
 #define S5P_PAD_RETENTION_GPIO_LOWPWR  S5P_PMUREG(0x1220)
@@ -119,7 +112,6 @@
 #define S5P_MFC_LOWPWR S5P_PMUREG(0x1388)
 #define S5P_G3D_LOWPWR S5P_PMUREG(0x138C)
 #define S5P_LCD0_LOWPWRS5P_PMUREG(0x1390)
-#define S5P_LCD1_LOWPWRS5P_PMUREG(0x1394)
 #define S5P_MAUDIO_LOWPWR  S5P_PMUREG(0x1398)
 #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C)
 #define S5P_GPS_ALIVE_LOWPWR   S5P_PMUREG(0x13A0)
@@ -155,7 +147,6 @@
 #define S5P_PMU_MFC_CONF   S5P_PMUREG(0x3C40)
 #define S5P_PMU_G3D_CONF   S5P_PMUREG(0x3C60)
 #define S5P_PMU_LCD0_CONF  S5P_PMUREG(0x3C80)
-#define S5P_PMU_LCD1_CONF  S5P_PMUREG(0x3CA0)
 #define S5P_PMU_GPS_CONF   S5P_PMUREG(0x3CE0)
 
 #define S5P_PMU_SATA_PHY_CONTROL_EN0x1
@@ -164,4 +155,60 @@
 
 #define S5P_CHECK_SLEEP0x0BAD
 
+/* Only for EXYNOS4210 */
+#define S5P_USBHOST_PHY_CONTROLS5P_PMUREG(0x0708)
+#define S5P_USBHOST_PHY_ENABLE (1 << 0)
+
+#define S5P_PMU_SATA_PHY_CONTROL   S5P_PMUREG(0x0720)
+
+#define S5P_CMU_CLKSTOP_LCD1_LOWPWRS5P_PMUREG(0x1154)
+#define S5P_CMU_RESET_LCD1_LOWPWR  S5P_PMUREG(0x1174)
+#define 

[PATCH V2 1/3] ARM: EXYNOS4: Modify PMU register setting function

2011-09-19 Thread Jongpill Lee
This patch modifies PMU register setting function to support the other Exynos4 
series.

Signed-off-by: Jongpill Lee 
---
 arch/arm/mach-exynos4/include/mach/pmu.h  |7 +
 arch/arm/mach-exynos4/include/mach/regs-pmu.h |1 -
 arch/arm/mach-exynos4/pmu.c   |  239 +
 3 files changed, 96 insertions(+), 151 deletions(-)

diff --git a/arch/arm/mach-exynos4/include/mach/pmu.h 
b/arch/arm/mach-exynos4/include/mach/pmu.h
index a952904..632dd56 100644
--- a/arch/arm/mach-exynos4/include/mach/pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/pmu.h
@@ -13,6 +13,8 @@
 #ifndef __ASM_ARCH_PMU_H
 #define __ASM_ARCH_PMU_H __FILE__
 
+#define PMU_TABLE_END  NULL
+
 enum sys_powerdown {
SYS_AFTR,
SYS_LPA,
@@ -20,6 +22,11 @@ enum sys_powerdown {
NUM_SYS_POWERDOWN,
 };
 
+struct exynos4_pmu_conf {
+   void __iomem *reg;
+   unsigned int val[NUM_SYS_POWERDOWN];
+};
+
 extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode);
 
 #endif /* __ASM_ARCH_PMU_H */
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h 
b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index cdf9b47..7fa44b9 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -27,7 +27,6 @@
 #define S5P_USE_STANDBY_WFI1   (1 << 17)
 #define S5P_USE_STANDBY_WFE0   (1 << 24)
 #define S5P_USE_STANDBY_WFE1   (1 << 25)
-#define S5P_USE_MASK   ((0x3 << 16) | (0x3 << 24))
 
 #define S5P_SWRESETS5P_PMUREG(0x0400)
 
diff --git a/arch/arm/mach-exynos4/pmu.c b/arch/arm/mach-exynos4/pmu.c
index 7ea9eb2..02bfa0d 100644
--- a/arch/arm/mach-exynos4/pmu.c
+++ b/arch/arm/mach-exynos4/pmu.c
@@ -16,160 +16,99 @@
 #include 
 #include 
 
-static void __iomem *sys_powerdown_reg[] = {
-   S5P_ARM_CORE0_LOWPWR,
-   S5P_DIS_IRQ_CORE0,
-   S5P_DIS_IRQ_CENTRAL0,
-   S5P_ARM_CORE1_LOWPWR,
-   S5P_DIS_IRQ_CORE1,
-   S5P_DIS_IRQ_CENTRAL1,
-   S5P_ARM_COMMON_LOWPWR,
-   S5P_L2_0_LOWPWR,
-   S5P_L2_1_LOWPWR,
-   S5P_CMU_ACLKSTOP_LOWPWR,
-   S5P_CMU_SCLKSTOP_LOWPWR,
-   S5P_CMU_RESET_LOWPWR,
-   S5P_APLL_SYSCLK_LOWPWR,
-   S5P_MPLL_SYSCLK_LOWPWR,
-   S5P_VPLL_SYSCLK_LOWPWR,
-   S5P_EPLL_SYSCLK_LOWPWR,
-   S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR,
-   S5P_CMU_RESET_GPSALIVE_LOWPWR,
-   S5P_CMU_CLKSTOP_CAM_LOWPWR,
-   S5P_CMU_CLKSTOP_TV_LOWPWR,
-   S5P_CMU_CLKSTOP_MFC_LOWPWR,
-   S5P_CMU_CLKSTOP_G3D_LOWPWR,
-   S5P_CMU_CLKSTOP_LCD0_LOWPWR,
-   S5P_CMU_CLKSTOP_LCD1_LOWPWR,
-   S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,
-   S5P_CMU_CLKSTOP_GPS_LOWPWR,
-   S5P_CMU_RESET_CAM_LOWPWR,
-   S5P_CMU_RESET_TV_LOWPWR,
-   S5P_CMU_RESET_MFC_LOWPWR,
-   S5P_CMU_RESET_G3D_LOWPWR,
-   S5P_CMU_RESET_LCD0_LOWPWR,
-   S5P_CMU_RESET_LCD1_LOWPWR,
-   S5P_CMU_RESET_MAUDIO_LOWPWR,
-   S5P_CMU_RESET_GPS_LOWPWR,
-   S5P_TOP_BUS_LOWPWR,
-   S5P_TOP_RETENTION_LOWPWR,
-   S5P_TOP_PWR_LOWPWR,
-   S5P_LOGIC_RESET_LOWPWR,
-   S5P_ONENAND_MEM_LOWPWR,
-   S5P_MODIMIF_MEM_LOWPWR,
-   S5P_G2D_ACP_MEM_LOWPWR,
-   S5P_USBOTG_MEM_LOWPWR,
-   S5P_HSMMC_MEM_LOWPWR,
-   S5P_CSSYS_MEM_LOWPWR,
-   S5P_SECSS_MEM_LOWPWR,
-   S5P_PCIE_MEM_LOWPWR,
-   S5P_SATA_MEM_LOWPWR,
-   S5P_PAD_RETENTION_DRAM_LOWPWR,
-   S5P_PAD_RETENTION_MAUDIO_LOWPWR,
-   S5P_PAD_RETENTION_GPIO_LOWPWR,
-   S5P_PAD_RETENTION_UART_LOWPWR,
-   S5P_PAD_RETENTION_MMCA_LOWPWR,
-   S5P_PAD_RETENTION_MMCB_LOWPWR,
-   S5P_PAD_RETENTION_EBIA_LOWPWR,
-   S5P_PAD_RETENTION_EBIB_LOWPWR,
-   S5P_PAD_RETENTION_ISOLATION_LOWPWR,
-   S5P_PAD_RETENTION_ALV_SEL_LOWPWR,
-   S5P_XUSBXTI_LOWPWR,
-   S5P_XXTI_LOWPWR,
-   S5P_EXT_REGULATOR_LOWPWR,
-   S5P_GPIO_MODE_LOWPWR,
-   S5P_GPIO_MODE_MAUDIO_LOWPWR,
-   S5P_CAM_LOWPWR,
-   S5P_TV_LOWPWR,
-   S5P_MFC_LOWPWR,
-   S5P_G3D_LOWPWR,
-   S5P_LCD0_LOWPWR,
-   S5P_LCD1_LOWPWR,
-   S5P_MAUDIO_LOWPWR,
-   S5P_GPS_LOWPWR,
-   S5P_GPS_ALIVE_LOWPWR,
-};
+static struct exynos4_pmu_conf *exynos4_pmu_config;
 
-static const unsigned int sys_powerdown_val[][NUM_SYS_POWERDOWN] = {
-   /* { AFTR, LPA, SLEEP }*/
-   { 0, 0, 2 },/* ARM_CORE0 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CORE0 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CENTRAL0 */
-   { 0, 0, 2 },/* ARM_CORE1 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CORE1 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CENTRAL1 */
-   { 0, 0, 2 },/* ARM_COMMON */
-   { 2, 2, 3 },/* ARM_CPU_L2_0 */
-   { 2, 2, 3 },/* ARM_CPU_L2_1 */
-   { 1, 0, 0 },/* CMU_ACLKSTOP */
-   { 1, 0, 0 },/* CMU_SCLKSTOP */
-   { 1, 1, 0 },/* CMU_RESET */
-   { 1, 0, 0 },/* APLL_SYSCLK */
-   { 1, 0, 0 },/* MPLL_SYSCLK */
-   { 1, 0, 0 },/* VPLL_SYSCLK 

[PATCH 1/3] ARM: EXYNOS4: Modify PMU register setting function

2011-09-19 Thread Jongpill Lee
This patch modifies PMU register setting function to support the other Exynos4 
series.

Signed-off-by: Jongpill Lee 
---
 arch/arm/mach-exynos4/include/mach/pmu.h  |7 +
 arch/arm/mach-exynos4/include/mach/regs-pmu.h |1 -
 arch/arm/mach-exynos4/pmu.c   |  239 +
 3 files changed, 96 insertions(+), 151 deletions(-)

diff --git a/arch/arm/mach-exynos4/include/mach/pmu.h 
b/arch/arm/mach-exynos4/include/mach/pmu.h
index a952904..632dd56 100644
--- a/arch/arm/mach-exynos4/include/mach/pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/pmu.h
@@ -13,6 +13,8 @@
 #ifndef __ASM_ARCH_PMU_H
 #define __ASM_ARCH_PMU_H __FILE__
 
+#define PMU_TABLE_END  NULL
+
 enum sys_powerdown {
SYS_AFTR,
SYS_LPA,
@@ -20,6 +22,11 @@ enum sys_powerdown {
NUM_SYS_POWERDOWN,
 };
 
+struct exynos4_pmu_conf {
+   void __iomem *reg;
+   unsigned int val[NUM_SYS_POWERDOWN];
+};
+
 extern void exynos4_sys_powerdown_conf(enum sys_powerdown mode);
 
 #endif /* __ASM_ARCH_PMU_H */
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h 
b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index cdf9b47..7fa44b9 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -27,7 +27,6 @@
 #define S5P_USE_STANDBY_WFI1   (1 << 17)
 #define S5P_USE_STANDBY_WFE0   (1 << 24)
 #define S5P_USE_STANDBY_WFE1   (1 << 25)
-#define S5P_USE_MASK   ((0x3 << 16) | (0x3 << 24))
 
 #define S5P_SWRESETS5P_PMUREG(0x0400)
 
diff --git a/arch/arm/mach-exynos4/pmu.c b/arch/arm/mach-exynos4/pmu.c
index 7ea9eb2..02bfa0d 100644
--- a/arch/arm/mach-exynos4/pmu.c
+++ b/arch/arm/mach-exynos4/pmu.c
@@ -16,160 +16,99 @@
 #include 
 #include 
 
-static void __iomem *sys_powerdown_reg[] = {
-   S5P_ARM_CORE0_LOWPWR,
-   S5P_DIS_IRQ_CORE0,
-   S5P_DIS_IRQ_CENTRAL0,
-   S5P_ARM_CORE1_LOWPWR,
-   S5P_DIS_IRQ_CORE1,
-   S5P_DIS_IRQ_CENTRAL1,
-   S5P_ARM_COMMON_LOWPWR,
-   S5P_L2_0_LOWPWR,
-   S5P_L2_1_LOWPWR,
-   S5P_CMU_ACLKSTOP_LOWPWR,
-   S5P_CMU_SCLKSTOP_LOWPWR,
-   S5P_CMU_RESET_LOWPWR,
-   S5P_APLL_SYSCLK_LOWPWR,
-   S5P_MPLL_SYSCLK_LOWPWR,
-   S5P_VPLL_SYSCLK_LOWPWR,
-   S5P_EPLL_SYSCLK_LOWPWR,
-   S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR,
-   S5P_CMU_RESET_GPSALIVE_LOWPWR,
-   S5P_CMU_CLKSTOP_CAM_LOWPWR,
-   S5P_CMU_CLKSTOP_TV_LOWPWR,
-   S5P_CMU_CLKSTOP_MFC_LOWPWR,
-   S5P_CMU_CLKSTOP_G3D_LOWPWR,
-   S5P_CMU_CLKSTOP_LCD0_LOWPWR,
-   S5P_CMU_CLKSTOP_LCD1_LOWPWR,
-   S5P_CMU_CLKSTOP_MAUDIO_LOWPWR,
-   S5P_CMU_CLKSTOP_GPS_LOWPWR,
-   S5P_CMU_RESET_CAM_LOWPWR,
-   S5P_CMU_RESET_TV_LOWPWR,
-   S5P_CMU_RESET_MFC_LOWPWR,
-   S5P_CMU_RESET_G3D_LOWPWR,
-   S5P_CMU_RESET_LCD0_LOWPWR,
-   S5P_CMU_RESET_LCD1_LOWPWR,
-   S5P_CMU_RESET_MAUDIO_LOWPWR,
-   S5P_CMU_RESET_GPS_LOWPWR,
-   S5P_TOP_BUS_LOWPWR,
-   S5P_TOP_RETENTION_LOWPWR,
-   S5P_TOP_PWR_LOWPWR,
-   S5P_LOGIC_RESET_LOWPWR,
-   S5P_ONENAND_MEM_LOWPWR,
-   S5P_MODIMIF_MEM_LOWPWR,
-   S5P_G2D_ACP_MEM_LOWPWR,
-   S5P_USBOTG_MEM_LOWPWR,
-   S5P_HSMMC_MEM_LOWPWR,
-   S5P_CSSYS_MEM_LOWPWR,
-   S5P_SECSS_MEM_LOWPWR,
-   S5P_PCIE_MEM_LOWPWR,
-   S5P_SATA_MEM_LOWPWR,
-   S5P_PAD_RETENTION_DRAM_LOWPWR,
-   S5P_PAD_RETENTION_MAUDIO_LOWPWR,
-   S5P_PAD_RETENTION_GPIO_LOWPWR,
-   S5P_PAD_RETENTION_UART_LOWPWR,
-   S5P_PAD_RETENTION_MMCA_LOWPWR,
-   S5P_PAD_RETENTION_MMCB_LOWPWR,
-   S5P_PAD_RETENTION_EBIA_LOWPWR,
-   S5P_PAD_RETENTION_EBIB_LOWPWR,
-   S5P_PAD_RETENTION_ISOLATION_LOWPWR,
-   S5P_PAD_RETENTION_ALV_SEL_LOWPWR,
-   S5P_XUSBXTI_LOWPWR,
-   S5P_XXTI_LOWPWR,
-   S5P_EXT_REGULATOR_LOWPWR,
-   S5P_GPIO_MODE_LOWPWR,
-   S5P_GPIO_MODE_MAUDIO_LOWPWR,
-   S5P_CAM_LOWPWR,
-   S5P_TV_LOWPWR,
-   S5P_MFC_LOWPWR,
-   S5P_G3D_LOWPWR,
-   S5P_LCD0_LOWPWR,
-   S5P_LCD1_LOWPWR,
-   S5P_MAUDIO_LOWPWR,
-   S5P_GPS_LOWPWR,
-   S5P_GPS_ALIVE_LOWPWR,
-};
+static struct exynos4_pmu_conf *exynos4_pmu_config;
 
-static const unsigned int sys_powerdown_val[][NUM_SYS_POWERDOWN] = {
-   /* { AFTR, LPA, SLEEP }*/
-   { 0, 0, 2 },/* ARM_CORE0 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CORE0 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CENTRAL0 */
-   { 0, 0, 2 },/* ARM_CORE1 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CORE1 */
-   { 0, 0, 0 },/* ARM_DIS_IRQ_CENTRAL1 */
-   { 0, 0, 2 },/* ARM_COMMON */
-   { 2, 2, 3 },/* ARM_CPU_L2_0 */
-   { 2, 2, 3 },/* ARM_CPU_L2_1 */
-   { 1, 0, 0 },/* CMU_ACLKSTOP */
-   { 1, 0, 0 },/* CMU_SCLKSTOP */
-   { 1, 1, 0 },/* CMU_RESET */
-   { 1, 0, 0 },/* APLL_SYSCLK */
-   { 1, 0, 0 },/* MPLL_SYSCLK */
-   { 1, 0, 0 },/* VPLL_SYSCLK 

[PATCH V2 2/3] ARM: EXYNOS4: Add PMU register definition for EXYNOS4212

2011-09-19 Thread Jongpill Lee
This patch adds PMU register definition for Exynos4212

Signed-off-by: Jongpill Lee 
---
 arch/arm/mach-exynos4/include/mach/regs-pmu.h |   69 +
 1 files changed, 58 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h 
b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index 7fa44b9..6fab38e 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -25,8 +25,10 @@
 
 #define S5P_USE_STANDBY_WFI0   (1 << 16)
 #define S5P_USE_STANDBY_WFI1   (1 << 17)
+#define S5P_USE_STANDBYWFI_ISP_ARM (1 << 18)
 #define S5P_USE_STANDBY_WFE0   (1 << 24)
 #define S5P_USE_STANDBY_WFE1   (1 << 25)
+#define S5P_USE_STANDBYWFE_ISP_ARM (1 << 26)
 
 #define S5P_SWRESETS5P_PMUREG(0x0400)
 
@@ -34,15 +36,11 @@
 #define S5P_EINT_WAKEUP_MASK   S5P_PMUREG(0x0604)
 #define S5P_WAKEUP_MASKS5P_PMUREG(0x0608)
 
-#define S5P_USBHOST_PHY_CONTROLS5P_PMUREG(0x0708)
-#define S5P_USBHOST_PHY_ENABLE (1 << 0)
-
 #define S5P_MIPI_DPHY_CONTROL(n)   S5P_PMUREG(0x0710 + (n) * 4)
 #define S5P_MIPI_DPHY_ENABLE   (1 << 0)
 #define S5P_MIPI_DPHY_SRESETN  (1 << 1)
 #define S5P_MIPI_DPHY_MRESETN  (1 << 2)
 
-#define S5P_PMU_SATA_PHY_CONTROL   S5P_PMUREG(0x0720)
 #define S5P_INFORM0S5P_PMUREG(0x0800)
 #define S5P_INFORM1S5P_PMUREG(0x0804)
 #define S5P_INFORM2S5P_PMUREG(0x0808)
@@ -75,7 +73,6 @@
 #define S5P_CMU_CLKSTOP_MFC_LOWPWR S5P_PMUREG(0x1148)
 #define S5P_CMU_CLKSTOP_G3D_LOWPWR S5P_PMUREG(0x114C)
 #define S5P_CMU_CLKSTOP_LCD0_LOWPWRS5P_PMUREG(0x1150)
-#define S5P_CMU_CLKSTOP_LCD1_LOWPWRS5P_PMUREG(0x1154)
 #define S5P_CMU_CLKSTOP_MAUDIO_LOWPWR  S5P_PMUREG(0x1158)
 #define S5P_CMU_CLKSTOP_GPS_LOWPWR S5P_PMUREG(0x115C)
 #define S5P_CMU_RESET_CAM_LOWPWR   S5P_PMUREG(0x1160)
@@ -83,7 +80,6 @@
 #define S5P_CMU_RESET_MFC_LOWPWR   S5P_PMUREG(0x1168)
 #define S5P_CMU_RESET_G3D_LOWPWR   S5P_PMUREG(0x116C)
 #define S5P_CMU_RESET_LCD0_LOWPWR  S5P_PMUREG(0x1170)
-#define S5P_CMU_RESET_LCD1_LOWPWR  S5P_PMUREG(0x1174)
 #define S5P_CMU_RESET_MAUDIO_LOWPWRS5P_PMUREG(0x1178)
 #define S5P_CMU_RESET_GPS_LOWPWR   S5P_PMUREG(0x117C)
 #define S5P_TOP_BUS_LOWPWR S5P_PMUREG(0x1180)
@@ -91,14 +87,11 @@
 #define S5P_TOP_PWR_LOWPWR S5P_PMUREG(0x1188)
 #define S5P_LOGIC_RESET_LOWPWR S5P_PMUREG(0x11A0)
 #define S5P_ONENAND_MEM_LOWPWR S5P_PMUREG(0x11C0)
-#define S5P_MODIMIF_MEM_LOWPWR S5P_PMUREG(0x11C4)
 #define S5P_G2D_ACP_MEM_LOWPWR S5P_PMUREG(0x11C8)
 #define S5P_USBOTG_MEM_LOWPWR  S5P_PMUREG(0x11CC)
 #define S5P_HSMMC_MEM_LOWPWR   S5P_PMUREG(0x11D0)
 #define S5P_CSSYS_MEM_LOWPWR   S5P_PMUREG(0x11D4)
 #define S5P_SECSS_MEM_LOWPWR   S5P_PMUREG(0x11D8)
-#define S5P_PCIE_MEM_LOWPWRS5P_PMUREG(0x11E0)
-#define S5P_SATA_MEM_LOWPWRS5P_PMUREG(0x11E4)
 #define S5P_PAD_RETENTION_DRAM_LOWPWR  S5P_PMUREG(0x1200)
 #define S5P_PAD_RETENTION_MAUDIO_LOWPWRS5P_PMUREG(0x1204)
 #define S5P_PAD_RETENTION_GPIO_LOWPWR  S5P_PMUREG(0x1220)
@@ -119,7 +112,6 @@
 #define S5P_MFC_LOWPWR S5P_PMUREG(0x1388)
 #define S5P_G3D_LOWPWR S5P_PMUREG(0x138C)
 #define S5P_LCD0_LOWPWRS5P_PMUREG(0x1390)
-#define S5P_LCD1_LOWPWRS5P_PMUREG(0x1394)
 #define S5P_MAUDIO_LOWPWR  S5P_PMUREG(0x1398)
 #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C)
 #define S5P_GPS_ALIVE_LOWPWR   S5P_PMUREG(0x13A0)
@@ -155,7 +147,6 @@
 #define S5P_PMU_MFC_CONF   S5P_PMUREG(0x3C40)
 #define S5P_PMU_G3D_CONF   S5P_PMUREG(0x3C60)
 #define S5P_PMU_LCD0_CONF  S5P_PMUREG(0x3C80)
-#define S5P_PMU_LCD1_CONF  S5P_PMUREG(0x3CA0)
 #define S5P_PMU_GPS_CONF   S5P_PMUREG(0x3CE0)
 
 #define S5P_PMU_SATA_PHY_CONTROL_EN0x1
@@ -164,4 +155,60 @@
 
 #define S5P_CHECK_SLEEP0x0BAD
 
+/* Only for EXYNOS4210 */
+#define S5P_USBHOST_PHY_CONTROLS5P_PMUREG(0x0708)
+#define S5P_USBHOST_PHY_ENABLE (1 << 0)
+
+#define S5P_PMU_SATA_PHY_CONTROL   S5P_PMUREG(0x0720)
+
+#define S5P_CMU_CLKSTOP_LCD1_LOWPWRS5P_PMUREG(0x1154)
+#define S5P_CMU_RESET_LCD1_LOWPWR  S5P_PMUREG(0x1174)
+#define 

[PATCH V2 0/3] ARM: EXYNOS4: Support suspend/resume for EXYNOS4212

2011-09-19 Thread Jongpill Lee
[PATCH V2 1/3] ARM: EXYNOS4: Modify PMU register setting function
[PATCH V2 2/3] ARM: EXYNOS4: Add PMU register definition for EXYNOS4212
[PATCH V2 3/3] ARM: EXYNOS4: Support suspend/resume for EXYNOS4212
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[PATCH V5 5/6] ARM: S5P6440: Add LCD-LTE480 and enable Framebuffer support

2011-09-19 Thread Ajay Kumar
This patch:
-- Adds platform device support for LCD-LTE480.
-- Adds platform data for FB with win_mode and default_bpp.
-- Enables FB device support and platform-lcd support.
-- Adds SPCON settings for LCD.

Signed-off-by: Ajay Kumar 
---
 arch/arm/mach-s5p64x0/Kconfig  |2 +
 arch/arm/mach-s5p64x0/include/mach/regs-gpio.h |4 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c  |   74 
 3 files changed, 80 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 7bec400..3adc4b8 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -37,6 +37,7 @@ config S5P64X0_SETUP_I2C1
 config MACH_SMDK6440
bool "SMDK6440"
select CPU_S5P6440
+   select S3C_DEV_FB
select S3C_DEV_I2C1
select S3C_DEV_RTC
select S3C_DEV_WDT
@@ -45,6 +46,7 @@ config MACH_SMDK6440
select SAMSUNG_DEV_BACKLIGHT
select SAMSUNG_DEV_PWM
select SAMSUNG_DEV_TS
+   select S5P64X0_SETUP_FB_24BPP
select S5P64X0_SETUP_I2C1
help
  Machine support for the Samsung SMDK6440
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h 
b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 6ce2547..88269ec 100644
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -34,6 +34,10 @@
 #define S5P6450_GPQ_BASE   (S5P_VA_GPIO + 0x0180)
 #define S5P6450_GPS_BASE   (S5P_VA_GPIO + 0x0300)
 
+#define S5P64X0_SPCON0 (S5P_VA_GPIO + 0x1A0)
+#define S5P64X0_SPCON0_LCD_SEL_MASK(0x3 << 0)
+#define S5P64X0_SPCON0_LCD_SEL_RGB (0x1 << 0)
+
 /* External interrupt control registers for group0 */
 
 #define EINT0CON0_OFFSET   (0x900)
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c 
b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 340f30f..b0465d4 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -23,6 +23,9 @@
 #include 
 #include 
 #include 
+#include 
+
+#include 
 
 #include 
 #include 
@@ -47,6 +50,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define SMDK6440_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |\
S3C2410_UCON_RXILEVEL | \
@@ -92,6 +97,59 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata 
= {
},
 };
 
+/* Frame Buffer */
+static struct s3c_fb_pd_win smdk6440_fb_win0 = {
+   .win_mode = {
+   .left_margin= 8,
+   .right_margin   = 13,
+   .upper_margin   = 7,
+   .lower_margin   = 5,
+   .hsync_len  = 3,
+   .vsync_len  = 1,
+   .xres   = 800,
+   .yres   = 480,
+   },
+   .max_bpp= 32,
+   .default_bpp= 24,
+};
+
+static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = {
+   .win[0] = &smdk6440_fb_win0,
+   .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+   .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+   .setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
+};
+
+/* LCD power controller */
+static void smdk6440_lte480_reset_power(struct plat_lcd_data *pd,
+unsigned int power)
+{
+   int err;
+
+   if (power) {
+   err = gpio_request(S5P6440_GPN(5), "GPN");
+   if (err) {
+   printk(KERN_ERR "failed to request GPN for lcd 
reset\n");
+   return;
+   }
+
+   gpio_direction_output(S5P6440_GPN(5), 1);
+   gpio_set_value(S5P6440_GPN(5), 0);
+   gpio_set_value(S5P6440_GPN(5), 1);
+   gpio_free(S5P6440_GPN(5));
+   }
+}
+
+static struct plat_lcd_data smdk6440_lcd_power_data = {
+   .set_power  = smdk6440_lte480_reset_power,
+};
+
+static struct platform_device smdk6440_lcd_lte480wv = {
+   .name   = "platform-lcd",
+   .dev.parent = &s3c_device_fb.dev,
+   .dev.platform_data  = &smdk6440_lcd_power_data,
+};
+
 static struct platform_device *smdk6440_devices[] __initdata = {
&s3c_device_adc,
&s3c_device_rtc,
@@ -101,6 +159,8 @@ static struct platform_device *smdk6440_devices[] 
__initdata = {
&s3c_device_wdt,
&samsung_asoc_dma,
&s5p6440_device_iis,
+   &s3c_device_fb,
+   &smdk6440_lcd_lte480wv,
 };
 
 static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
@@ -147,6 +207,17 @@ static void __init smdk6440_map_io(void)
s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
 }
 
+static void s5p6440_set_lcd_interface(void)
+{
+   unsigned int cfg;
+
+   /* select TFT LCD type (RGB I/F) */
+   cfg = __raw_readl(S5P64X0_SPCON0);
+   cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
+   cfg |= S5P64X0_SPCON0

[PATCH RESEND V5 4/6] ARM: S5P64X0: Add GPIO setup for LCD

2011-09-19 Thread Ajay Kumar
This patch adds GPIO lines settings(HSYNC, VSYNC, VCLK and VD) for LCD.

Signed-off-by: Ajay Kumar 
---
 arch/arm/mach-s5p64x0/Kconfig   |6 ++
 arch/arm/mach-s5p64x0/Makefile  |1 +
 arch/arm/mach-s5p64x0/setup-fb-24bpp.c  |   29 +
 arch/arm/plat-samsung/include/plat/fb.h |7 +++
 4 files changed, 43 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s5p64x0/setup-fb-24bpp.c

diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 65c7518..7bec400 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -21,6 +21,12 @@ config CPU_S5P6450
help
  Enable S5P6450 CPU support
 
+config S5P64X0_SETUP_FB_24BPP
+   bool
+   help
+ Common setup code for S5P64X0 based boards with a LCD display
+ through RGB interface.
+
 config S5P64X0_SETUP_I2C1
bool
help
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index 5f6afdf..1bf54b2 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -28,3 +28,4 @@ obj-y += dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)  += dev-spi.o
 
 obj-$(CONFIG_S5P64X0_SETUP_I2C1)   += setup-i2c1.o
+obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP)   += setup-fb-24bpp.o
diff --git a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c 
b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
new file mode 100644
index 000..f346ee4
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
@@ -0,0 +1,29 @@
+/* linux/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
+ *
+ * Copyright (c) 2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * Base S5P64X0 GPIO setup information for LCD framebuffer
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+void s5p64x0_fb_gpio_setup_24bpp(void)
+{
+   if (soc_is_s5p6440()) {
+   s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16, S3C_GPIO_SFN(2));
+   s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12, S3C_GPIO_SFN(2));
+   } else if (soc_is_s5p6450()) {
+   s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16, S3C_GPIO_SFN(2));
+   s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12, S3C_GPIO_SFN(2));
+   }
+}
diff --git a/arch/arm/plat-samsung/include/plat/fb.h 
b/arch/arm/plat-samsung/include/plat/fb.h
index 01f10e4..0fedf47 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -109,4 +109,11 @@ extern void s5pv210_fb_gpio_setup_24bpp(void);
  */
 extern void exynos4_fimd0_gpio_setup_24bpp(void);
 
+/**
+ * s5p64x0_fb_gpio_setup_24bpp() - S5P6440/S5P6450 setup function for 24bpp LCD
+ *
+ * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
+ */
+extern void s5p64x0_fb_gpio_setup_24bpp(void);
+
 #endif /* __PLAT_S3C_FB_H */
-- 
1.7.0.4

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[PATCH RESEND V5 3/6] ARM: S5P64X0: Set s3c_device_fb name

2011-09-19 Thread Ajay Kumar
Set s3c_device_fb name as "s5p64x0-fb" for S5P6440 and S5P6450.

Signed-off-by: Ajay Kumar 
---
 arch/arm/mach-s5p64x0/cpu.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
index a5c0095..617da3b 100644
--- a/arch/arm/mach-s5p64x0/cpu.c
+++ b/arch/arm/mach-s5p64x0/cpu.c
@@ -38,6 +38,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* Initial IO mappings */
 
@@ -108,6 +109,7 @@ void __init s5p6440_map_io(void)
 {
/* initialize any device information early */
s3c_adc_setname("s3c64xx-adc");
+   s3c_fb_setname("s5p64x0-fb");
 
iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
@@ -117,6 +119,7 @@ void __init s5p6450_map_io(void)
 {
/* initialize any device information early */
s3c_adc_setname("s3c64xx-adc");
+   s3c_fb_setname("s5p64x0-fb");
 
iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-- 
1.7.0.4

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[PATCH RESEND V5 2/6] ARM: S5P64X0: Add register base and IRQ for Framebuffer

2011-09-19 Thread Ajay Kumar
This patch adds:
-- Framebuffer related register mappings and bit fields.
-- IRQ number being used.

Signed-off-by: Ajay Kumar 
---
 arch/arm/mach-s5p64x0/include/mach/irqs.h |4 
 arch/arm/mach-s5p64x0/include/mach/map.h  |3 +++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h 
b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 5837a36..53982db 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -87,6 +87,10 @@
 
 #define IRQ_I2S0   IRQ_I2SV40
 
+#define IRQ_LCD_FIFO   IRQ_DISPCON0
+#define IRQ_LCD_VSYNC  IRQ_DISPCON1
+#define IRQ_LCD_SYSTEM IRQ_DISPCON2
+
 /* S5P6450 EINT feature will be added */
 
 /*
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h 
b/arch/arm/mach-s5p64x0/include/mach/map.h
index 95c9125..c5ef50c 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -47,6 +47,8 @@
 
 #define S5P64X0_PA_HSMMC(x)(0xED80 + ((x) * 0x10))
 
+#define S5P64X0_PA_FB  0xEE00
+
 #define S5P64X0_PA_I2S 0xF200
 #define S5P6450_PA_I2S10xF280
 #define S5P6450_PA_I2S20xF290
@@ -64,6 +66,7 @@
 #define S3C_PA_IIC1S5P6440_PA_IIC1
 #define S3C_PA_RTC S5P64X0_PA_RTC
 #define S3C_PA_WDT S5P64X0_PA_WDT
+#define S3C_PA_FB  S5P64X0_PA_FB
 
 #define S5P_PA_CHIPID  S5P64X0_PA_CHIPID
 #define S5P_PA_SROMC   S5P64X0_PA_SROMC
-- 
1.7.0.4

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[PATCH V5 0/6] ARM: S5P64X0: Add Framebuffer support

2011-09-19 Thread Ajay Kumar
 The patches are created against "for-next" branch of Kukjin Kim's tree at:
 git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git

 Changes since V1:
- Remove mach/regs-fb.h, instead use plat/regs-fb.h.
- Add common pdata for FB and LCD in SMDK6440 and SMDK6450.
- Modify names(s5p-->smdk), max_bpp and refresh rate.
- Modify variable name(cfg-->chipid).
- Use __raw_readl, __raw_writel instead of readl and writel.

 Changes since V2:
-Change name of the config-COMMON_FB to SMDK64X0_COMMON_FB.
-Change filename common-fb.h to smdk64x0-common-fb.h.
-Change filename common-fb.c to smdk64x0-common-fb.c.

 Changes since V3:
-Add FB and LCD plat-data in corresponding machine files
 instead of creating common file smdk64x0-common-fb.c.
-Modify name S5P64X0_SETUP_FB to S5P64X0_SETUP_FB_24BPP.
-Modify file name setup-fb.c to setup-fb-24bpp.c.
-Move SPCON settings to machine file.
-Use soc_is_s5p6440()/soc_is_s5p6450() to check CPU ID.

 Changes since V4:
-Removed refresh rate from plat data(s3c_fb_pd_win)
-Fixed complation warning:"function declaration isn't a prototype"
 for s5p6440_set_lcd_interface() and s5p6450_set_lcd_interface().


  These patches have dependency on the patch:
  "ARM: S5P64X0: Fix mask value for S5P64X0 CPU IDs",
  at http://www.spinics.net/lists/arm-kernel/msg138990.html

o To Kukjin,
  [PATCH RESEND V5 1/6] video: s3c-fb: Add S5P64X0 specific s3c_fb_driverdata
  [PATCH RESEND V5 2/6] ARM: S5P64X0: Add register base and IRQ for Framebuffer
  [PATCH RESEND V5 3/6] ARM: S5P64X0: Set s3c_device_fb name
  [PATCH RESEND V5 4/6] ARM: S5P64X0: Add GPIO setup for LCD
  [PATCH V5 5/6]ARM: S5P6440: Add LCD-LTE480 and enable Framebuffer support
  [PATCH V5 6/6]ARM: S5P6450: Add LCD-LTE480 and enable Framebuffer support

 arch/arm/mach-s5p64x0/Kconfig  |   10 +++
 arch/arm/mach-s5p64x0/Makefile |1 +
 arch/arm/mach-s5p64x0/cpu.c|3 +
 arch/arm/mach-s5p64x0/include/mach/irqs.h  |4 +
 arch/arm/mach-s5p64x0/include/mach/map.h   |3 +
 arch/arm/mach-s5p64x0/include/mach/regs-gpio.h |4 +
 arch/arm/mach-s5p64x0/mach-smdk6440.c  |   74 +++
 arch/arm/mach-s5p64x0/mach-smdk6450.c  |   75 
 arch/arm/mach-s5p64x0/setup-fb-24bpp.c |   29 +
 arch/arm/plat-samsung/include/plat/fb.h|7 ++
 drivers/video/s3c-fb.c |   27 +
 11 files changed, 237 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-s5p64x0/setup-fb-24bpp.c

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[PATCH RESEND V5 1/6] video: s3c-fb: Add S5P64X0 specific s3c_fb_driverdata

2011-09-19 Thread Ajay Kumar
This patch:
-- Adds s3c_fb_driverdata for S5P64X0, which supports 3 windows.
-- Also, register "s5p64x0-fb" type driver_data.

Signed-off-by: Ajay Kumar 
Acked-by: Jingoo Han 
Acked-by: Kukjin Kim 
---
 drivers/video/s3c-fb.c |   27 +++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index 4aecf21..0fda252 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -1859,6 +1859,30 @@ static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
},
 };
 
+static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
+   .variant = {
+   .nr_windows = 3,
+   .vidtcon= VIDTCON0,
+   .wincon = WINCON(0),
+   .winmap = WINxMAP(0),
+   .keycon = WKEYCON,
+   .osd= VIDOSD_BASE,
+   .osd_stride = 16,
+   .buf_start  = VIDW_BUF_START(0),
+   .buf_size   = VIDW_BUF_SIZE(0),
+   .buf_end= VIDW_BUF_END(0),
+
+   .palette = {
+   [0] = 0x2400,
+   [1] = 0x2800,
+   [2] = 0x2c00,
+   },
+   },
+   .win[0] = &s3c_fb_data_s5p_wins[0],
+   .win[1] = &s3c_fb_data_s5p_wins[1],
+   .win[2] = &s3c_fb_data_s5p_wins[2],
+};
+
 static struct platform_device_id s3c_fb_driver_ids[] = {
{
.name   = "s3c-fb",
@@ -1872,6 +1896,9 @@ static struct platform_device_id s3c_fb_driver_ids[] = {
}, {
.name   = "s3c2443-fb",
.driver_data= (unsigned long)&s3c_fb_data_s3c2443,
+   }, {
+   .name   = "s5p64x0-fb",
+   .driver_data= (unsigned long)&s3c_fb_data_s5p64x0,
},
{},
 };
-- 
1.7.0.4

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[PATCH V5 6/6] ARM: S5P6450: Add LCD-LTE480 and enable Framebuffer support

2011-09-19 Thread Ajay Kumar
This patch:
-- Adds platform device support for LCD-LTE480.
-- Adds platform data for FB with win_mode and default_bpp.
-- Enables FB device support and platform-lcd support.
-- Adds SPCON settings for LCD.

Signed-off-by: Ajay Kumar 
---
 arch/arm/mach-s5p64x0/Kconfig |2 +
 arch/arm/mach-s5p64x0/mach-smdk6450.c |   75 +
 2 files changed, 77 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 3adc4b8..ecb4e44 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -54,6 +54,7 @@ config MACH_SMDK6440
 config MACH_SMDK6450
bool "SMDK6450"
select CPU_S5P6450
+   select S3C_DEV_FB
select S3C_DEV_I2C1
select S3C_DEV_RTC
select S3C_DEV_WDT
@@ -62,6 +63,7 @@ config MACH_SMDK6450
select SAMSUNG_DEV_BACKLIGHT
select SAMSUNG_DEV_PWM
select SAMSUNG_DEV_TS
+   select S5P64X0_SETUP_FB_24BPP
select S5P64X0_SETUP_I2C1
help
  Machine support for the Samsung SMDK6450
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c 
b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index ee0da14..2a69caa 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -23,6 +23,9 @@
 #include 
 #include 
 #include 
+#include 
+
+#include 
 
 #include 
 #include 
@@ -47,6 +50,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define SMDK6450_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |\
S3C2410_UCON_RXILEVEL | \
@@ -110,6 +115,59 @@ static struct s3c2410_uartcfg smdk6450_uartcfgs[] 
__initdata = {
 #endif
 };
 
+/* Frame Buffer */
+static struct s3c_fb_pd_win smdk6450_fb_win0 = {
+   .win_mode   = {
+   .left_margin= 8,
+   .right_margin   = 13,
+   .upper_margin   = 7,
+   .lower_margin   = 5,
+   .hsync_len  = 3,
+   .vsync_len  = 1,
+   .xres   = 800,
+   .yres   = 480,
+   },
+   .max_bpp= 32,
+   .default_bpp= 24,
+};
+
+static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {
+   .win[0] = &smdk6450_fb_win0,
+   .vidcon0= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+   .vidcon1= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
+   .setup_gpio = s5p64x0_fb_gpio_setup_24bpp,
+};
+
+/* LCD power controller */
+static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd,
+unsigned int power)
+{
+   int err;
+
+   if (power) {
+   err = gpio_request(S5P6450_GPN(5), "GPN");
+   if (err) {
+   printk(KERN_ERR "failed to request GPN for lcd 
reset\n");
+   return;
+   }
+
+   gpio_direction_output(S5P6450_GPN(5), 1);
+   gpio_set_value(S5P6450_GPN(5), 0);
+   gpio_set_value(S5P6450_GPN(5), 1);
+   gpio_free(S5P6450_GPN(5));
+   }
+}
+
+static struct plat_lcd_data smdk6450_lcd_power_data = {
+   .set_power  = smdk6450_lte480_reset_power,
+};
+
+static struct platform_device smdk6450_lcd_lte480wv = {
+   .name   = "platform-lcd",
+   .dev.parent = &s3c_device_fb.dev,
+   .dev.platform_data  = &smdk6450_lcd_power_data,
+};
+
 static struct platform_device *smdk6450_devices[] __initdata = {
&s3c_device_adc,
&s3c_device_rtc,
@@ -119,6 +177,9 @@ static struct platform_device *smdk6450_devices[] 
__initdata = {
&s3c_device_wdt,
&samsung_asoc_dma,
&s5p6450_device_iis0,
+   &s3c_device_fb,
+   &smdk6450_lcd_lte480wv,
+
/* s5p6450_device_spi0 will be added */
 };
 
@@ -166,6 +227,17 @@ static void __init smdk6450_map_io(void)
s5p_set_timer_source(S5P_PWM3, S5P_PWM4);
 }
 
+static void s5p6450_set_lcd_interface(void)
+{
+   unsigned int cfg;
+
+   /* select TFT LCD type (RGB I/F) */
+   cfg = __raw_readl(S5P64X0_SPCON0);
+   cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
+   cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
+   __raw_writel(cfg, S5P64X0_SPCON0);
+}
+
 static void __init smdk6450_machine_init(void)
 {
s3c24xx_ts_set_platdata(NULL);
@@ -179,6 +251,9 @@ static void __init smdk6450_machine_init(void)
 
samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
 
+   s5p6450_set_lcd_interface();
+   s3c_fb_set_platdata(&smdk6450_lcd_pdata);
+
platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
 }
 
-- 
1.7.0.4

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[PATCH] ARM: SAMSUNG: Cleanup plat/pll.h

2011-09-19 Thread Kukjin Kim
Removed
- arch/arm/plat-s3c24xx/include/plat/pll.h
- arch/arm/mach-s3c64xx/include/mach/pll.h
- arch/arm/plat-s5p/include/plat/pll.h
- arch/arm/plat-samsung/include/plat/pll6553x.h

And created
- arch/arm/plat-samsung/include/plat/pll.h

Cc: Ben Dooks 
Signed-off-by: Kukjin Kim 
---
 arch/arm/mach-s3c2410/mach-h1940.c|6 +-
 arch/arm/mach-s3c2416/clock.c |1 -
 arch/arm/mach-s3c64xx/clock.c |5 +-
 arch/arm/mach-s3c64xx/include/mach/pll.h  |   45 -
 arch/arm/plat-s3c24xx/include/plat/pll.h  |   62 --
 arch/arm/plat-s5p/include/plat/pll.h  |  153 --
 arch/arm/plat-samsung/include/plat/pll.h  |  262
+
 arch/arm/plat-samsung/include/plat/pll6553x.h |   51 -
 8 files changed, 268 insertions(+), 317 deletions(-)
 delete mode 100644 arch/arm/mach-s3c64xx/include/mach/pll.h
 delete mode 100644 arch/arm/plat-s3c24xx/include/plat/pll.h
 delete mode 100644 arch/arm/plat-s5p/include/plat/pll.h
 create mode 100644 arch/arm/plat-samsung/include/plat/pll.h
 delete mode 100644 arch/arm/plat-samsung/include/plat/pll6553x.h

diff --git a/arch/arm/mach-s3c2410/mach-h1940.c
b/arch/arm/mach-s3c2410/mach-h1940.c
index 2a2fa06..a9201ea 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -696,9 +696,9 @@ static void __init h1940_init(void)
  S3C2410_MISCCR_USBSUSPND0 |
  S3C2410_MISCCR_USBSUSPND1, 0x0);
 
-   tmp =   (0x78 << S3C24XX_PLLCON_MDIVSHIFT)
- | (0x02 << S3C24XX_PLLCON_PDIVSHIFT)
- | (0x03 << S3C24XX_PLLCON_SDIVSHIFT);
+   tmp =   (0x78 << S3C24XX_PLL_MDIV_SHIFT)
+ | (0x02 << S3C24XX_PLL_PDIV_SHIFT)
+ | (0x03 << S3C24XX_PLL_SDIV_SHIFT);
writel(tmp, S3C2410_UPLLCON);
 
gpio_request(S3C2410_GPC(0), "LCD power");
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 21a5e81..c7b91d0 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -21,7 +21,6 @@
 #include 
 
 #include 
-#include 
 #include 
 
 #include 
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 8cf39e3..4adc51c 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -25,13 +25,13 @@
 
 #include 
 #include 
-#include 
 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 /* fin_apll, fin_mpll and fin_epll are all the same clock, which we call
  * ext_xtal_mux for want of an actual name from the manual.
@@ -735,7 +735,8 @@ void __init_or_cpufreq s3c6400_setup_clocks(void)
/* For now assume the mux always selects the crystal */
clk_ext_xtal_mux.parent = xtal_clk;
 
-   epll = s3c6400_get_epll(xtal);
+   epll = s3c_get_pll6553x(xtal, __raw_readl(S3C_EPLL_CON0),
+   __raw_readl(S3C_EPLL_CON1));
mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
 
diff --git a/arch/arm/mach-s3c64xx/include/mach/pll.h
b/arch/arm/mach-s3c64xx/include/mach/pll.h
deleted file mode 100644
index 5ef0bb6..000
--- a/arch/arm/mach-s3c64xx/include/mach/pll.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/* arch/arm/plat-s3c64xx/include/plat/pll.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks 
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX PLL code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#define S3C6400_PLL_MDIV_MASK  ((1 << (25-16+1)) - 1)
-#define S3C6400_PLL_PDIV_MASK  ((1 << (13-8+1)) - 1)
-#define S3C6400_PLL_SDIV_MASK  ((1 << (2-0+1)) - 1)
-#define S3C6400_PLL_MDIV_SHIFT (16)
-#define S3C6400_PLL_PDIV_SHIFT (8)
-#define S3C6400_PLL_SDIV_SHIFT (0)
-
-#include 
-#include 
-
-static inline unsigned long s3c6400_get_pll(unsigned long baseclk,
-   u32 pllcon)
-{
-   u32 mdiv, pdiv, sdiv;
-   u64 fvco = baseclk;
-
-   mdiv = (pllcon >> S3C6400_PLL_MDIV_SHIFT) & S3C6400_PLL_MDIV_MASK;
-   pdiv = (pllcon >> S3C6400_PLL_PDIV_SHIFT) & S3C6400_PLL_PDIV_MASK;
-   sdiv = (pllcon >> S3C6400_PLL_SDIV_SHIFT) & S3C6400_PLL_SDIV_MASK;
-
-   fvco *= mdiv;
-   do_div(fvco, (pdiv << sdiv));
-
-   return (unsigned long)fvco;
-}
-
-static inline unsigned long s3c6400_get_epll(unsigned long baseclk)
-{
-   return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0),
-   __raw_readl(S3C_EPLL_CON1));
-}
diff --git a/arch/arm/plat-s3c24xx/include/plat/pll.h
b/arch/arm/plat-s3c24xx/include/plat/pll.h
deleted file mode 100644
index 005729a..000
--- a/arch/arm/plat-s3c24xx/include/plat/pll.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/include/plat/pll

[PATCH] ARM: SAMSUNG: plat-samsung/include/plat/pwm-clock.h

2011-09-19 Thread Kukjin Kim
Removed
 - arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
 - arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
 - arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
 - arch/arm/mach-s5pc100/include/mach/pwm-clock.h
 - arch/arm/mach-s5pv210/include/mach/pwm-clock.h
 - arch/arm/mach-exynos4/include/mach/pwm-clock.h

And created
 - arch/arm/plat-samsung/include/plat/pwm-clock.h

Cc: Ben Dooks 
Signed-off-by: Kukjin Kim 
---
 arch/arm/mach-s3c64xx/include/mach/pwm-clock.h |   56 
 arch/arm/mach-s5p64x0/include/mach/pwm-clock.h |   68
---
 arch/arm/mach-s5pc100/include/mach/pwm-clock.h |   56 
 arch/arm/mach-s5pv210/include/mach/pwm-clock.h |   70

 arch/arm/plat-s3c24xx/include/mach/pwm-clock.h |   55 ---
 .../mach => plat-samsung/include/plat}/pwm-clock.h |   39 +++
 arch/arm/plat-samsung/pwm-clock.c  |   13 +++-
 7 files changed, 36 insertions(+), 321 deletions(-)
 delete mode 100644 arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
 delete mode 100644 arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
 delete mode 100644 arch/arm/mach-s5pc100/include/mach/pwm-clock.h
 delete mode 100644 arch/arm/mach-s5pv210/include/mach/pwm-clock.h
 delete mode 100644 arch/arm/plat-s3c24xx/include/mach/pwm-clock.h
 rename arch/arm/{mach-exynos4/include/mach =>
plat-samsung/include/plat}/pwm-clock.h (68%)

diff --git a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
b/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
deleted file mode 100644
index b25bede..000
--- a/arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *  Ben Dooks 
- *  http://armlinux.simtec.co.uk/
- *
- * S3C64xx - pwm clock and timer support
- */
-
-/**
- * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
- * @tcfg: The timer TCFG1 register bits shifted down to 0.
- *
- * Return true if the given configuration from TCFG1 is a TCLK instead
- * any of the TDIV clocks.
- */
-static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
-{
-   return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
-}
-
-/**
- * tcfg_to_divisor() - convert tcfg1 setting to a divisor
- * @tcfg1: The tcfg1 setting, shifted down.
- *
- * Get the divisor value for the given tcfg1 setting. We assume the
- * caller has already checked to see if this is not a TCLK source.
- */
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
-   return 1 << tcfg1;
-}
-
-/**
- * pwm_tdiv_has_div1() - does the tdiv setting have a /1
- *
- * Return true if we have a /1 in the tdiv setting.
- */
-static inline unsigned int pwm_tdiv_has_div1(void)
-{
-   return 1;
-}
-
-/**
- * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
- * @div: The divisor to calculate the bit information for.
- *
- * Turn a divisor into the necessary bit field for TCFG1.
- */
-static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
-{
-   return ilog2(div);
-}
-
-#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK
diff --git a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
deleted file mode 100644
index 19fff8b..000
--- a/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- *  Ben Dooks 
- *  http://armlinux.simtec.co.uk/
- *
- * S5P64X0 - pwm clock and timer support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_PWMCLK_H
-#define __ASM_ARCH_PWMCLK_H __FILE__
-
-/**
- * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
- * @tcfg: The timer TCFG1 register bits shifted down to 0.
- *
- * Return true if the given configuration from TCFG1 is a TCLK instead
- * any of the TDIV clocks.
- */
-static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
-{
-   return 0;
-}
-
-/**
- * tcfg_to_divisor() - convert tcfg1 setting to a divisor
- * @tcfg1: The tcfg1 setting, shifted down.
- *
- * Get the divisor value for the given tcfg1 setting. We assume the
- * caller has already checked to see if this is not a TCLK source.
- */
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
-   return 1 << tcfg1;
-}
-
-/**
- * pwm_tdiv_has_div1() - does the tdiv setting have a /1
- *
- * Return true if we have a /1 in the tdiv setting.
- */
-static inline unsigned int pwm_tdiv_has_div1(void)
-{
-   return 1;
-}
-
-/**
- * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
- * @div: The divisor to cal

[PATCH] ARM: SAMSUNG: Cleanup mach/clkdev.h

2011-09-19 Thread Kukjin Kim
According to commit a3831cf ("ARM: Consolidate the
clkdev header files"), current mach/clkdev.h is no
needed in Samsung stuff.

Cc: Ben Dooks 
Signed-off-by: Kukjin Kim 
---
 arch/arm/mach-exynos4/include/mach/clkdev.h |7 ---
 arch/arm/mach-s3c64xx/include/mach/clkdev.h |7 ---
 arch/arm/mach-s5p64x0/include/mach/clkdev.h |7 ---
 arch/arm/mach-s5pc100/include/mach/clkdev.h |7 ---
 arch/arm/mach-s5pv210/include/mach/clkdev.h |7 ---
 arch/arm/plat-s3c24xx/include/mach/clkdev.h |7 ---
 6 files changed, 0 insertions(+), 42 deletions(-)
 delete mode 100644 arch/arm/mach-exynos4/include/mach/clkdev.h
 delete mode 100644 arch/arm/mach-s3c64xx/include/mach/clkdev.h
 delete mode 100644 arch/arm/mach-s5p64x0/include/mach/clkdev.h
 delete mode 100644 arch/arm/mach-s5pc100/include/mach/clkdev.h
 delete mode 100644 arch/arm/mach-s5pv210/include/mach/clkdev.h
 delete mode 100644 arch/arm/plat-s3c24xx/include/mach/clkdev.h

diff --git a/arch/arm/mach-exynos4/include/mach/clkdev.h
b/arch/arm/mach-exynos4/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83..000
--- a/arch/arm/mach-exynos4/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do {} while (0)
-
-#endif
diff --git a/arch/arm/mach-s3c64xx/include/mach/clkdev.h
b/arch/arm/mach-s3c64xx/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83..000
--- a/arch/arm/mach-s3c64xx/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do {} while (0)
-
-#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/clkdev.h
b/arch/arm/mach-s5p64x0/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83..000
--- a/arch/arm/mach-s5p64x0/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do {} while (0)
-
-#endif
diff --git a/arch/arm/mach-s5pc100/include/mach/clkdev.h
b/arch/arm/mach-s5pc100/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83..000
--- a/arch/arm/mach-s5pc100/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do {} while (0)
-
-#endif
diff --git a/arch/arm/mach-s5pv210/include/mach/clkdev.h
b/arch/arm/mach-s5pv210/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83..000
--- a/arch/arm/mach-s5pv210/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do {} while (0)
-
-#endif
diff --git a/arch/arm/plat-s3c24xx/include/mach/clkdev.h
b/arch/arm/plat-s3c24xx/include/mach/clkdev.h
deleted file mode 100644
index 7dffa83..000
--- a/arch/arm/plat-s3c24xx/include/mach/clkdev.h
+++ /dev/null
@@ -1,7 +0,0 @@
-#ifndef __MACH_CLKDEV_H__
-#define __MACH_CLKDEV_H__
-
-#define __clk_get(clk) ({ 1; })
-#define __clk_put(clk) do {} while (0)
-
-#endif
-- 
1.7.1

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RE: [PATCH 1/7 (RE-SEND)] gpio/s3c24xx: move gpio driver into drivers/gpio/

2011-09-19 Thread Kukjin Kim
Kukjin Kim wrote:
>

(snip)...

Hi Grant,

I didn't get any comments on this series, gpio-samsung patches for
consolidation of Samsung gpiolib. Please let me know whether this is ok to
you or not. And I think, if you're ok, this should be sent to upstream via
both gpio tree and arm(samsung) tree to avoid conflicts...

As a note, following is its status...

Kukjin Kim (9):
  ARM: SAMSUNG: Move map header file into plat-samsung
  gpio/s3c24xx: move gpio driver into drivers/gpio/
  gpio/s3c64xx: move gpio driver into drivers/gpio/
  gpio/s5p64x0: move gpio driver into drivers/gpio/
  gpio/samsung: Remove useless old Samsung related GPIO drivers
  gpio/samsung: Added gpio-samsung.c to support Samsung GPIOs
  ARM: SAMSUNG: Update the name of regarding Samsung GPIO
  ARM: SAMSUNG: Remove useless Samsung GPIO related CONFIGs
  Merge branch 'next/topic-plat-samsung-1' into next/topic-gpio-samsung

 arch/arm/Kconfig   |3 -
 arch/arm/mach-exynos4/include/mach/pm-core.h   |2 +-
 arch/arm/mach-s3c2410/Kconfig  |7 -
 arch/arm/mach-s3c2410/Makefile |1 -
 arch/arm/mach-s3c2410/include/mach/gpio-fns.h  |   99 +-
 arch/arm/mach-s3c2410/include/mach/gpio-track.h|6 +-
 arch/arm/mach-s3c2410/include/mach/map.h   |   52 +-
 arch/arm/mach-s3c2410/include/mach/pm-core.h   |2 +-
 arch/arm/mach-s3c2410/s3c2410.c|4 +-
 arch/arm/mach-s3c2412/Kconfig  |1 -
 arch/arm/mach-s3c2412/Makefile |1 -
 arch/arm/mach-s3c2412/gpio.c   |2 +-
 arch/arm/mach-s3c2416/Kconfig  |1 -
 arch/arm/mach-s3c2416/s3c2416.c|4 +-
 arch/arm/mach-s3c2440/Kconfig  |4 -
 arch/arm/mach-s3c2440/s3c2440.c|4 +-
 arch/arm/mach-s3c2440/s3c2442.c|4 +-
 arch/arm/mach-s3c2443/Kconfig  |1 -
 arch/arm/mach-s3c2443/s3c2443.c|4 +-
 arch/arm/mach-s3c64xx/Makefile |1 -
 arch/arm/mach-s3c64xx/gpiolib.c|  290 ---
 arch/arm/mach-s3c64xx/include/mach/map.h   |9 +-
 arch/arm/mach-s3c64xx/include/mach/pm-core.h   |2 +-
 arch/arm/mach-s5p64x0/Makefile |2 +-
 arch/arm/mach-s5p64x0/gpiolib.c|  511 
 arch/arm/mach-s5pv210/include/mach/pm-core.h   |2 +-
 arch/arm/plat-s3c24xx/Kconfig  |1 -
 arch/arm/plat-s3c24xx/Makefile |2 -
 arch/arm/plat-s3c24xx/gpio.c   |   96 -
 arch/arm/plat-s3c24xx/gpiolib.c|  229 --
 arch/arm/plat-s3c24xx/include/plat/map.h   |  100 -
 arch/arm/plat-s5p/Kconfig  |3 -
 arch/arm/plat-s5p/irq-gpioint.c|   10 +-
 arch/arm/plat-samsung/Kconfig  |   27 -
 arch/arm/plat-samsung/Makefile |2 -
 arch/arm/plat-samsung/gpio-config.c|  431 
 arch/arm/plat-samsung/gpio.c   |  167 --
 .../plat-samsung/include/plat/gpio-cfg-helpers.h   |  172 +-
 arch/arm/plat-samsung/include/plat/gpio-cfg.h  |   34 +-
 arch/arm/plat-samsung/include/plat/gpio-core.h |   97 +-
 arch/arm/plat-samsung/include/plat/gpio-fns.h  |   98 +
 arch/arm/plat-samsung/include/plat/map-s3c.h   |   84 +
 .../include/plat/map-s5p.h |6 +-
 arch/arm/plat-samsung/include/plat/pm.h|   10 +-
 arch/arm/plat-samsung/pm-gpio.c|   72 +-
 arch/arm/plat-samsung/pm.c |6 +-
 drivers/gpio/Kconfig   |   16 -
 drivers/gpio/Makefile  |7 +-
 drivers/gpio/gpio-exynos4.c|  385 ---
 drivers/gpio/gpio-plat-samsung.c   |  205 --
 drivers/gpio/gpio-s5pc100.c|  354 ---
 drivers/gpio/gpio-s5pv210.c|  287 ---
 drivers/gpio/gpio-samsung.c| 2686

 53 files changed, 3072 insertions(+), 3534 deletions(-)
 delete mode 100644 arch/arm/mach-s3c64xx/gpiolib.c
 delete mode 100644 arch/arm/mach-s5p64x0/gpiolib.c
 delete mode 100644 arch/arm/plat-s3c24xx/gpio.c
 delete mode 100644 arch/arm/plat-s3c24xx/gpiolib.c
 delete mode 100644 arch/arm/plat-s3c24xx/include/plat/map.h
 delete mode 100644 arch/arm/plat-samsung/gpio-config.c
 delete mode 100644 arch/arm/plat-samsung/gpio.c
 create mode 100644 arch/arm/plat-samsung/include/plat/gpio-fns.h
 create mode 100644 arch/arm/plat-samsung/include/plat/map-s3c.h
 rename arch/arm/{plat-s5p => plat-samsung}/include/plat/map-s5p.h (94%)
 delete mode 100644 drivers/gpio/gpio-exynos4.c
 delete mode 100644 drivers/gpio/gpio-plat-samsung.c
 delete mode 100644 drivers/gpio/g

moved linux-samsung.git to github

2011-09-19 Thread Kukjin Kim
Hi all,

As you know, git.kernel.org has been down now.

So I temporary moved linux-samsung.git to following.
  git://github.com/kgene/linux-samsung.git

Please use it for Samsung stuff before working of git.kernel.org.

As a note, I will finish review/apply regarding Samsung patches in this week
so that it can be applied for v3.2.

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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[GIT PULL] Samsung boards for v3.2

2011-09-19 Thread Kukjin Kim
Hi Arnd,

This is for Samsung boards for v3.2.

Please pull from:
  git://github.com/kgene/linux-samsung.git next-samsung-board

As you see, the next-samsung-board includes new board, SMDK4212. Of course
to support new SoC, EXYNOS4212 is required for it but current
arch/arm/mach-exynos4 (ARCH_EXYNOS4) can support it so I merged it into
next-samsung-board not next-samsung-soc and to support handling of cupid and
rev. in Samsung stuff for it. As I remember, you said -soc branch of arm-soc
is for adding new architecture like arch/arm/mach-.

As a note, this includes samsung-fixes-2 which has been already pulled in
your tree too.

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

The following changes since commit b6fd41e29dea9c6753b1843a77e50433e6123bcb:

  Linux 3.1-rc6 (2011-09-12 14:02:02 -0700)

are available in the git repository at:
  git://github.com/kgene/linux-samsung.git next-samsung-board

Ajay Kumar (1):
  ARM: SAMSUNG: Fix mask value for S5P64X0 CPU IDs

Banajit Goswami (1):
  ARM: S3C64XX: Remove un-used code backlight code on SMDK6410

Changhwan Youn (1):
  ARM: EXYNOS4: restart clocksource while system resumes

JeongHyeon Kim (1):
  ARM: EXYNOS4: Add support for ORIGEN board

Jonghwan Choi (2):
  ARM: EXYNOS4: Fix wrong pll type for vpll
  ARM: EXYNOS4: Add support PM for EXYNOS4212

Kukjin Kim (14):
  ARM: EXYNOS4: Turn the mach-smdkc210.c into mach-smdv310.c
  ARM: SAMSUNG: Add support for detecting CPU at runtime
  ARM: S5P64X0: Use soc_is_s5p64x0() to distinguish cpu at runtime
  ARM: SAMSUNG: Add support for handling of cpu revision
  ARM: EXYNOS4: Use samsung_rev() to distinguish silicon revision
  ARM: EXYNOS4: Fix return type of local_timer_setup()
  ARM: EXYNOS4: Fix routing timer interrupt to offline CPU
  ARM: SAMSUNG: fix to prevent declaring duplicated
  Merge branch 'next/topic-cpuid-rev' into next/topic-add-exynos4212
  Merge branch 'next/topic-cleanup-smdkv310' into
next/topic-add-exynos4212
  ARM: EXYNOS4: Add support new EXYNOS4212 SoC
  ARM: EXYNOS4: Add support clock for EXYNOS4212
  ARM: EXYNOS4: Add support SMDK4212 Board
  Merge branch 'next-samsung-board-v3.1' into next-samsung-board

Marek Szyprowski (1):
  ARM: SAMSUNG: fix watchdog reset issue with clk_get()

Mark Brown (1):
  ARM: SAMSUNG: Fix mask for S3C64xx CPU IDs

Thomas Abraham (1):
  ARM: EXYNOS4: fix incorrect pad configuration for keypad row lines

 arch/arm/configs/exynos4_defconfig |1 +
 arch/arm/mach-exynos4/Kconfig  |   57 +++-
 arch/arm/mach-exynos4/Makefile |   11 +-
 arch/arm/mach-exynos4/clock-exynos4210.c   |  139 +
 arch/arm/mach-exynos4/clock-exynos4212.c   |  118 
 arch/arm/mach-exynos4/clock.c  |  218 +-
 arch/arm/mach-exynos4/cpu.c|   40 +++-
 arch/arm/mach-exynos4/include/mach/exynos4-clock.h |   43 +++
 arch/arm/mach-exynos4/include/mach/map.h   |3 +-
 arch/arm/mach-exynos4/include/mach/regs-clock.h|   54 +++--
 arch/arm/mach-exynos4/mach-origen.c|  108 +++
 arch/arm/mach-exynos4/mach-smdk4212.c  |  292
++
 arch/arm/mach-exynos4/mach-smdkc210.c  |  309

 arch/arm/mach-exynos4/mach-smdkv310.c  |   78 +
 arch/arm/mach-exynos4/mct.c|   10 +-
 arch/arm/mach-exynos4/platsmp.c|   10 +-
 arch/arm/mach-exynos4/pm.c |   79 +-
 arch/arm/mach-exynos4/setup-keypad.c   |   11 +-
 arch/arm/mach-s3c64xx/cpu.c|   22 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |   39 ---
 arch/arm/mach-s5p64x0/dev-spi.c|8 +-
 arch/arm/mach-s5p64x0/dma.c|7 +-
 arch/arm/mach-s5p64x0/gpiolib.c|7 +-
 arch/arm/mach-s5p64x0/irq-eint.c   |3 +-
 arch/arm/plat-s3c24xx/cpu.c|9 +-
 arch/arm/plat-s5p/cpu.c|   37 ++-
 arch/arm/plat-s5p/include/plat/exynos4.h   |5 +-
 arch/arm/plat-s5p/include/plat/pll.h   |   55 -
 arch/arm/plat-samsung/Makefile |2 +-
 arch/arm/plat-samsung/clock.c  |   11 +
 arch/arm/plat-samsung/cpu.c|   58 
 arch/arm/plat-samsung/include/plat/clock.h |8 +
 arch/arm/plat-samsung/include/plat/cpu.h   |  105 +++-
 .../arm/plat-samsung/include/plat/watchdog-reset.h |   10 +-
 34 files changed, 1360 insertions(+), 607 deletions(-)
 create mode 100644 arch/arm/mach-exynos4/clock-exynos4210.c
 create mode 100644 arch/arm/mach-exynos4/clock-exynos4212.c
 create mode 100644 arch/a

[GIT PULL] Samsung cleanup for v3.2

2011-09-19 Thread Kukjin Kim
Hi Arnd,

This is Samsung cleanup for v3.2.

Please pull from:
  git://github.com/kgene/linux-samsung.git next-samsung-cleanup

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.


The following changes since commit b6fd41e29dea9c6753b1843a77e50433e6123bcb:

  Linux 3.1-rc6 (2011-09-12 14:02:02 -0700)

are available in the git repository at:
  git://github.com/kgene/linux-samsung.git next-samsung-cleanup

Abhilash Kesavan (1):
  ARM: S5PV210: Remove unnecessary symbol for PM

Banajit Goswami (1):
  ARM: SAMSUNG: Consolidate common function to set SDHCI plat data

Heiko Stuebner (2):
  ARM: S3C24XX: Remove hw_addr from s3c24xx dma channel declarations
  ARM: S3C24XX: Remove s3c24xx_dma_addr definition

Jonghwan Choi (1):
  ARM: S5P: Remove duplicate kdiv calculation

Kukjin Kim (6):
  ARM: EXYNOS4: Turn the mach-smdkc210.c into mach-smdv310.c
  Merge branch 'next/topic-cleanup-dma' into next-samsung-cleanup
  ARM: S3C24XX: remove unused gpio codes
  Merge branch 'next/topic-cleanup-smdkv310' into next-samsung-cleanup
  ARM: SAMSUNG: Move map header file into plat-samsung
  Merge branch 'next/topic-plat-samsung-1' into next-samsung-cleanup

Mark Brown (1):
  ARM: S3C64XX: Remove unused CPU devices for Cragganmore

Naveen Krishna Chatradhi (1):
  ARM: SAMSUNG: Remove unnecessary duplication of plat_data on TSADC

 arch/arm/mach-exynos4/Kconfig  |   17 +-
 arch/arm/mach-exynos4/Makefile |2 +-
 arch/arm/mach-exynos4/mach-smdkc210.c  |  309

 arch/arm/mach-exynos4/mach-smdkv310.c  |   78 +
 arch/arm/mach-s3c2410/Kconfig  |6 -
 arch/arm/mach-s3c2410/Makefile |1 -
 arch/arm/mach-s3c2410/dma.c|   14 -
 arch/arm/mach-s3c2410/gpio.c   |   72 -
 arch/arm/mach-s3c2410/include/mach/map.h   |   52 +++-
 arch/arm/mach-s3c2412/Kconfig  |1 -
 arch/arm/mach-s3c2412/Makefile |1 -
 arch/arm/mach-s3c2412/dma.c|   18 --
 arch/arm/mach-s3c2412/gpio.c   |   62 
 arch/arm/mach-s3c2440/Kconfig  |2 -
 arch/arm/mach-s3c2440/dma.c|   17 -
 arch/arm/mach-s3c2443/dma.c|   27 --
 arch/arm/mach-s3c64xx/include/mach/map.h   |9 +-
 arch/arm/mach-s3c64xx/mach-crag6410.c  |3 -
 arch/arm/mach-s3c64xx/mach-mini6410.c  |8 +-
 arch/arm/mach-s3c64xx/mach-real6410.c  |8 +-
 arch/arm/mach-s3c64xx/mach-smdk6410.c  |8 +-
 arch/arm/mach-s5p64x0/mach-smdk6440.c  |8 +-
 arch/arm/mach-s5p64x0/mach-smdk6450.c  |8 +-
 arch/arm/mach-s5pc100/mach-smdkc100.c  |8 +-
 arch/arm/mach-s5pv210/Kconfig  |6 -
 arch/arm/mach-s5pv210/Makefile |2 +-
 arch/arm/mach-s5pv210/mach-smdkv210.c  |8 +-
 arch/arm/plat-s3c24xx/include/plat/map.h   |  100 ---
 arch/arm/plat-s5p/include/plat/pll.h   |1 -
 arch/arm/plat-samsung/dev-hsmmc.c  |   19 +--
 arch/arm/plat-samsung/dev-hsmmc1.c |   19 +--
 arch/arm/plat-samsung/dev-hsmmc2.c |   19 +--
 arch/arm/plat-samsung/dev-hsmmc3.c |   19 +--
 arch/arm/plat-samsung/dev-ts.c |9 +
 arch/arm/plat-samsung/include/plat/dma-s3c24xx.h   |6 -
 arch/arm/plat-samsung/include/plat/map-s3c.h   |   84 ++
 .../include/plat/map-s5p.h |6 +-
 arch/arm/plat-samsung/include/plat/sdhci.h |7 +
 arch/arm/plat-samsung/platformdata.c   |   22 ++
 39 files changed, 264 insertions(+), 802 deletions(-)
 delete mode 100644 arch/arm/mach-exynos4/mach-smdkc210.c
 delete mode 100644 arch/arm/mach-s3c2410/gpio.c
 delete mode 100644 arch/arm/mach-s3c2412/gpio.c
 delete mode 100644 arch/arm/plat-s3c24xx/include/plat/map.h
 create mode 100644 arch/arm/plat-samsung/include/plat/map-s3c.h
 rename arch/arm/{plat-s5p => plat-samsung}/include/plat/map-s5p.h (94%)

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Re: [PATCH v8 00/16] To use DMA generic APIs for Samsung DMA

2011-09-19 Thread Jassi Brar
On Mon, Sep 19, 2011 at 8:29 AM, Vinod Koul  wrote:
>> >> The changelog for [PATCH v8 04/16] is misleading - we don't need any
>> >> modification for the reason mentioned in changelog. But the modification
>> >> has positive side-effect of preventing callbacks during terminate_all 
>> >> which
>> >> is no way understood from the changelog. So I would like to changelog
>> >> corrected.
>> > I thought change log was correct in depicting what patch does and Boojin
>> > had replied I will check again...
>>
>> I didn't reply because I ran out of ways to explain the same thing in
>> different words.
> I checked again the patch, change log and your comments.
> I agree with current change log, and also your observation is right but
> that is just a side effect,
It is not "just a side effect", it is "the only tangible effect".
If it were not for this 'side-effect', the patch would be _purely_ cosmetic
rearrangement.
The _only_ difference seen would be by clients who would no longer
have callbacks when they issue terminate_all.
And I don't think that is expected at all reading the changelog in current form.

> So no changes to this and I a ready to merge it to my next in a day or
> two...
I guess the world isn't gonna come to grinding halt with this changelog.
Please feel free to do what you think is the best.
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RE: [PATCH v2 6/6] ARM: EXYNOS4: Limit usage of pl330 device instance to non-dt build

2011-09-19 Thread Kukjin Kim
Thomas Abraham wrote:
> 
> Dear Mr. Kim,
> 
> On 5 September 2011 10:47, Kukjin Kim  wrote:
> >> Subject: [PATCH v2 6/6] ARM: EXYNOS4: Limit usage of pl330 device
instance
> > to
> >> non-dt build
> >>
> >> The pl330 device instances and associated platform data is required
only
> >> for non-device-tree builds. With device tree, all of this information
is
> >> obtained from the device tree.
> >>
> >> Signed-off-by: Thomas Abraham 
> >> ---
> >>  arch/arm/mach-exynos4/Kconfig  |    7 +++
> >>  arch/arm/mach-exynos4/Makefile |    3 ++-
> >>  2 files changed, 9 insertions(+), 1 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-exynos4/Kconfig
b/arch/arm/mach-exynos4/Kconfig
> >> index d4d401c..3edbf37 100644
> >> --- a/arch/arm/mach-exynos4/Kconfig
> >> +++ b/arch/arm/mach-exynos4/Kconfig
> >> @@ -21,6 +21,13 @@ config EXYNOS4_MCT
> >>       help
> >>         Use MCT (Multi Core Timer) as kernel timers
> >>
> >> +config EXYNOS4_DEV_DMA
> >> +     bool
> >> +     default y if !OF
> >> +     help
> >> +       Compile in amba device definitions for DMA controller if OF
> >> +       is not enabled.
> >> +
> >>  config EXYNOS4_DEV_AHCI
> >>       bool
> >>       help
> >> diff --git a/arch/arm/mach-exynos4/Makefile
> > b/arch/arm/mach-exynos4/Makefile
> >> index d2bf5bf..a2f33dc 100644
> >> --- a/arch/arm/mach-exynos4/Makefile
> >> +++ b/arch/arm/mach-exynos4/Makefile
> >> @@ -13,7 +13,8 @@ obj-                                :=
> >>  # Core support for EXYNOS4 system
> >>
> >>  obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o
> >> -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o
> >> pmu.o
> >> +obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o
> >> +obj-$(CONFIG_EXYNOS4_DEV_DMA)        += dma.o
> >
> > Do we need _really_ EXYNOS4_DEV_DMA here?
> > How about to use like following?
> >
> > +obj-$(!CONFIG_OF)              += dma.o
> >
> > If any problems, let me know.
> 
> While trying out your suggestion, I found a issue with this patch
> related to compiling a kernel with both dt and non-dt board files
> included in the build.
> 
> When compiling a single kernel image with mach-smdkv310.c file and
> exynos4 device tree enabled machine file, since CONFIG_OF is enabled,
> dma platform data does not get compiled which is required for
> mach-smdkv310. So, I would like to resubmit this patch and the updated
> diff is listed below. Could you please review the following diff.
> 

Hi Thomas,

Oops, you're right...so following is ok to me but you need to rebase this
based on latest my tree.

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

> 
> diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
> index d4d401c..953ead7 100644
> --- a/arch/arm/mach-exynos4/Kconfig
> +++ b/arch/arm/mach-exynos4/Kconfig
> @@ -21,6 +21,11 @@ config EXYNOS4_MCT
>   help
> Use MCT (Multi Core Timer) as kernel timers
> 
> +config EXYNOS4_DEV_DMA
> + bool
> + help
> +   Compile in amba device definitions for DMA controller
> +
>  config EXYNOS4_DEV_AHCI
>   bool
>   help
> @@ -129,6 +134,7 @@ config MACH_SMDKC210
>   select EXYNOS4_SETUP_FIMD0
>   select EXYNOS4_SETUP_I2C1
>   select EXYNOS4_SETUP_SDHCI
> + select EXYNOS4_DEV_DMA
>   help
> Machine support for Samsung SMDKC210
> 
> @@ -153,6 +159,7 @@ config MACH_SMDKV310
>   select EXYNOS4_SETUP_I2C1
>   select EXYNOS4_SETUP_KEYPAD
>   select EXYNOS4_SETUP_SDHCI
> + select EXYNOS4_DEV_DMA
>   help
> Machine support for Samsung SMDKV310
> 
> @@ -191,6 +198,7 @@ config MACH_UNIVERSAL_C210
>   select EXYNOS4_SETUP_I2C3
>   select EXYNOS4_SETUP_I2C5
>   select EXYNOS4_SETUP_SDHCI
> + select EXYNOS4_DEV_DMA
>   help
> Machine support for Samsung Mobile Universal S5PC210 Reference
> Board.
> @@ -215,6 +223,7 @@ config MACH_NURI
>   select EXYNOS4_SETUP_USB_PHY
>   select SAMSUNG_DEV_PWM
>   select SAMSUNG_DEV_ADC
> + select EXYNOS4_DEV_DMA
>   help
> Machine support for Samsung Mobile NURI Board.
> 
> diff --git a/arch/arm/mach-exynos4/Makefile
b/arch/arm/mach-exynos4/Makefile
> index 929262a..a2f33dc 100644
> --- a/arch/arm/mach-exynos4/Makefile
> +++ b/arch/arm/mach-exynos4/Makefile
> @@ -14,7 +14,8 @@ obj-:=
> 
>  obj-$(CONFIG_CPU_EXYNOS4210) += cpu.o init.o clock.o irq-combiner.o
> -obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o dma.o
> pmu.o
> +obj-$(CONFIG_CPU_EXYNOS4210) += setup-i2c0.o irq-eint.o pmu.o
> +obj-$(CONFIG_EXYNOS4_DEV_DMA)+= dma.o
>  obj-$(CONFIG_PM) += pm.o sleep.o
>  obj-$(CONFIG_CPU_IDLE)   += cpuidle.o
> 
> 
> 
> Thanks,
> Thomas.

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More majord

Temporary change the URL of s5p tree for linux-next

2011-09-19 Thread Kukjin Kim
Hi Stephen,

As you know, git.kernel.org has been down :(

So please change the URL of s5p tree for linux-next.
git://github.com/kgene/linux-samsung.git for-next.

As a note, I'd like to restore to use git.kernel.org after available of
git.kernel.org.

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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RE: [PATCH v8 00/16] To use DMA generic APIs for Samsung DMA

2011-09-19 Thread Kukjin Kim
Vinod Koul wrote:
> 
> On Wed, 2011-09-14 at 17:03 +0530, Jassi Brar wrote:
> > On 14 September 2011 16:47, Vinod Koul  wrote:
> >
> > >> The changelog for [PATCH v8 04/16] is misleading - we don't need any
> > >> modification for the reason mentioned in changelog. But the modification
> > >> has positive side-effect of preventing callbacks during terminate_all 
> > >> which
> > >> is no way understood from the changelog. So I would like to changelog
> > >> corrected.
> > > I thought change log was correct in depicting what patch does and Boojin
> > > had replied I will check again...
> >
> > I didn't reply because I ran out of ways to explain the same thing in
> > different words.
> I checked again the patch, change log and your comments.
> I agree with current change log, and also your observation is right but
> that is just a side effect, which IMO should be best left to developer
> to choose or not, in this case she ignored it
> 
> So no changes to this and I a ready to merge it to my next in a day or
> two...
> 
So as a note, pulled git://git.infradead.org/users/vkoul/slave-dma.git 
samsung_dma for other regarding dma patches in arch/arm/ samsung stuff.

If any problems, please let me know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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[PATCH v3 2/2] input: samsung-keypad: Add device tree support

2011-09-19 Thread Thomas Abraham
Add device tree based discovery support for Samsung's keypad controller.

Cc: Joonyoung Shim 
Cc: Donghwa Lee 
Signed-off-by: Thomas Abraham 
---
 .../devicetree/bindings/input/samsung-keypad.txt   |   88 ++
 drivers/input/keyboard/samsung-keypad.c|  179 ++--
 2 files changed, 255 insertions(+), 12 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/input/samsung-keypad.txt

diff --git a/Documentation/devicetree/bindings/input/samsung-keypad.txt 
b/Documentation/devicetree/bindings/input/samsung-keypad.txt
new file mode 100644
index 000..ce3e394
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/samsung-keypad.txt
@@ -0,0 +1,88 @@
+* Samsung's Keypad Controller device tree bindings
+
+Samsung's Keypad controller is used to interface a SoC with a matrix-type
+keypad device. The keypad controller supports multiple row and column lines.
+A key can be placed at each intersection of a unique row and a unique column.
+The keypad controller can sense a key-press and key-release and report the
+event using a interrupt to the cpu.
+
+Required SoC Specific Properties:
+- compatible: should be one of the following
+  - "samsung,s3c6410-keypad": For controllers compatible with s3c6410 keypad
+controller.
+  - "samsung,s5pv210-keypad": For controllers compatible with s5pv210 keypad
+controller.
+
+- reg: physical base address of the controller and length of memory mapped
+  region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+- samsung,keypad-num-rows: Number of row lines connected to the keypad
+  controller.
+
+- samsung,keypad-num-columns: Number of column lines connected to the
+  keypad controller.
+
+- row-gpios: List of gpios used as row lines. The gpio specifier for
+  this property depends on the gpio controller to which these row lines
+  are connected.
+
+- col-gpios: List of gpios used as column lines. The gpio specifier for
+  this property depends on the gpio controller to which these column
+  lines are connected.
+
+- Keys represented as child nodes: Each key connected to the keypad
+  controller is represented as a child node to the keypad controller
+  device node and should include the following properties.
+  - keypad,row: the row number to which the key is connected.
+  - keypad,column: the column number to which the key is connected.
+  - linux,code: the key-code to be reported when the key is pressed
+and released.
+
+Optional Properties specific to linux:
+- linux,keypad-no-autorepeat: do no enable autorepeat feature.
+- linux,keypad-wakeup: use any event on keypad as wakeup event.
+
+
+Example:
+   keypad@100A {
+   compatible = "samsung,s5pv210-keypad";
+   reg = <0x100A 0x100>;
+   interrupts = <173>;
+   samsung,keypad-num-rows = <2>;
+   samsung,keypad-num-columns = <8>;
+   linux,input-no-autorepeat;
+   linux,input-wakeup;
+
+   row-gpios = <&gpx2 0 3 3 0
+&gpx2 1 3 3 0>;
+
+   col-gpios = <&gpx1 0 3 0 0
+&gpx1 1 3 0 0
+&gpx1 2 3 0 0
+&gpx1 3 3 0 0
+&gpx1 4 3 0 0
+&gpx1 5 3 0 0
+&gpx1 6 3 0 0
+&gpx1 7 3 0 0>;
+
+   key_1 {
+   keypad,row = <0>;
+   keypad,column = <3>;
+   linux,code = <2>;
+   };
+
+   key_2 {
+   keypad,row = <0>;
+   keypad,column = <4>;
+   linux,code = <3>;
+   };
+
+   key_3 {
+   keypad,row = <0>;
+   keypad,column = <5>;
+   linux,code = <4>;
+   };
+   };
diff --git a/drivers/input/keyboard/samsung-keypad.c 
b/drivers/input/keyboard/samsung-keypad.c
index f689f49..2a477bc 100644
--- a/drivers/input/keyboard/samsung-keypad.c
+++ b/drivers/input/keyboard/samsung-keypad.c
@@ -21,6 +21,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -68,31 +70,26 @@ struct samsung_keypad {
wait_queue_head_t wait;
bool stopped;
int irq;
+   enum samsung_keypad_type type;
unsigned int row_shift;
unsigned int rows;
unsigned int cols;
unsigned int row_state[SAMSUNG_MAX_COLS];
+#ifdef CONFIG_OF
+   int row_gpios[SAMSUNG_MAX_ROWS];
+   int col_gpios[SAMSUNG_MAX_COLS];
+#endif
unsigned short keycodes[];
 };
 
-static int samsung_keypad_is_s5pv210(struct device *dev)
-{
-   struct platform_device *pdev = to_platform_device(dev);
-   enum samsung_keypad_type type =
-   platform_get_device_id(pdev)->driver_data;
-
-   return type == KEYPAD_TYPE_S5PV2

[PATCH v3 1/2] input: samsung-keypad: Add HAVE_SAMSUNG_KEYPAD config option

2011-09-19 Thread Thomas Abraham
For platforms using device tree, the static keypad device instances
are not required and SAMSUNG_DEV_KEYPAD is not selected. Since,
samsung keypad driver has dependency on SAMSUNG_DEV_KEYPAD config
option, the driver is left out of the compilation for dt enabled
platforms.

An additional config option 'HAVE_SAMSUNG_KEYPAD' is added
which the device tree based platforms can select. This config
option is added as an alternative dependency for keypad driver.

Signed-off-by: Thomas Abraham 
---
 drivers/input/keyboard/Kconfig |9 -
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index b4dee9d..7c322a3 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -423,9 +423,16 @@ config KEYBOARD_PMIC8XXX
  To compile this driver as a module, choose M here: the module will
  be called pmic8xxx-keypad.
 
+config HAVE_SAMSUNG_KEYPAD
+   bool
+   help
+ This will include Samsung Keypad controller driver support. If you
+ want to include Samsung Keypad support for any machine, kindly
+ select this in the respective mach-/Kconfig file.
+
 config KEYBOARD_SAMSUNG
tristate "Samsung keypad support"
-   depends on SAMSUNG_DEV_KEYPAD
+   depends on SAMSUNG_DEV_KEYPAD || HAVE_SAMSUNG_KEYPAD
help
  Say Y here if you want to use the Samsung keypad.
 
-- 
1.6.6.rc2

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[PATCH v3 0/2] Add device tree support for Samsung's keypad controller driver

2011-09-19 Thread Thomas Abraham
Changes since v2:
- Addressed comments from Grant Likely.
  - Renamed 'keypad,key-code' property name to 'linux,code'.
  - Fixed incorrect data types for all instances of of_property+read_u32.
  - linux,input-type binding was not added as suggested since the driver
supports only EV_KEY event type.

Changes since v1:
- Addressed comments from Dmitry Torokhov.
  - Type of controller is cached in driver's private data and the function
that determines the type of the controller for each keypad scan is
removed.
  - pdata allocated during probe is explicitly freed after probe completes
without any error. In case of exit from probe due a error, no explicit
deallocation of pdata memory is performed and it is left to devres to
handle that.
  - The generic code to translate KEY(x,y,code) is retained in the driver
itself. I am unsure of a right common place for it.
  - Driver continues with the probe even if one or more gpio configuration
fails.
  - Patch 1 that adds a new config option is still retained in this patchset.


This patchset adds device tree support for samsung's keypad controller driver.
First patch adds a new config option to be used by device tree enabled platforms
for selecting the samsung's keypad controller driver. The second patch adds 
device
tree support for the keypad driver.

Thomas Abraham (2):
  input: samsung-keypad: Add HAVE_SAMSUNG_KEYPAD config option
  input: samsung-keypad: Add device tree support

 .../devicetree/bindings/input/samsung-keypad.txt   |   88 ++
 drivers/input/keyboard/Kconfig |9 +-
 drivers/input/keyboard/samsung-keypad.c|  179 ++--
 3 files changed, 263 insertions(+), 13 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/input/samsung-keypad.txt

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Re: [PATCH 1/2] ARM: EXYNOS4: Add TVOUT support for SMDKV310

2011-09-19 Thread Tomasz Stanislawski

Hi Hatim Ali,

On 08/26/2011 08:39 AM, Hatim Ali wrote:

Add support for TVOUT on SMDKV310 board.

Signed-off-by: Hatim Ali
---
  arch/arm/mach-exynos4/Kconfig |2 ++
  arch/arm/mach-exynos4/mach-smdkv310.c |5 +
  2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index e6925de..4c399c0 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -139,6 +139,7 @@ config MACH_SMDKV310
select S3C_DEV_RTC
select S3C_DEV_WDT
select S3C_DEV_I2C1
+   select S5P_DEV_I2C_HDMIPHY
select S5P_DEV_MFC
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC1
@@ -148,6 +149,7 @@ config MACH_SMDKV310
select EXYNOS4_DEV_AHCI
select SAMSUNG_DEV_KEYPAD
select EXYNOS4_DEV_PD
+   select S5P_DEV_TV
select SAMSUNG_DEV_PWM
select EXYNOS4_DEV_SYSMMU
select EXYNOS4_SETUP_FIMD0
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c 
b/arch/arm/mach-exynos4/mach-smdkv310.c
index 5f62b2b..8fdba16 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -173,6 +173,7 @@ static struct platform_device *smdkv310_devices[] 
__initdata = {
&s3c_device_hsmmc2,
&s3c_device_hsmmc3,
&s3c_device_i2c1,
+   &s5p_device_i2c_hdmiphy,
&s3c_device_rtc,
&s3c_device_wdt,
&exynos4_device_ac97,
@@ -194,6 +195,8 @@ static struct platform_device *smdkv310_devices[] 
__initdata = {
&samsung_asoc_idma,
&smdkv310_smsc911x,
&exynos4_device_ahci,
+   &s5p_device_hdmi,
+   &s5p_device_mixer,

I should add TV power domain device exynos4_device_pd[PD_TV]  here.

  };

  static void __init smdkv310_smsc911x_init(void)
@@ -254,6 +257,8 @@ static void __init smdkv310_machine_init(void)
s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);

+   s5p_i2c_hdmiphy_set_platdata(NULL);
+
You should set mixer's and hdmi's parents here to device for TV power 
domain.
You should also configure gpio for hot-plug detection. Please refer to 
function s5p_tv_setup

in arch/arm/mach-exynos4/mach-universal_c210.c:1012.

samsung_keypad_set_platdata(&smdkv310_keypad_data);

samsung_bl_set(&smdkv310_bl_gpio_info,&smdkv310_bl_data);

I hope you find this information useful.

Best regards,
Tomasz Stanislawski
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