RE: [PATCHv2 resend] Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.

2011-12-21 Thread Kukjin Kim
Denis Kuzmenko wrote:
> 
> On 12/22/2011 12:04 AM, Kukjin Kim wrote:
> > Denis Kuzmenko wrote:
> >>
> >> On 12/21/2011 09:04 AM, Kukjin Kim wrote:
> >>> Denis Kuzmenko wrote:
> 
>  Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.
> 
>  Signed-off-by: Denis Kuzmenko 
>  ---
> 
>  Patch is against 3.2-rc4.
>  CONFIG_S3C2410_IOTIMING is not selected for MACH_MINI2440. Because of
> >> this
>  the
>  file s3c2410-iotiming.c is not ever compiled and enabling
>  CONFIG_CPU_FREQ_S3C24XX_DEBUGFS option caused undefined reference to
>  function
>  s3c2410_iotiming_debugfs defined in that file.
> s3c2410_iotiming_debugfs
>  defined
>  as NULL for this case.
> 
> >>> Hi Denis,
> >>>
> >>> Well, there is no error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected
> in
> >> my
> >>> case and s3c2410-iotiming.c is built...when is it happened? I just
> >> selected
> >>> every regarding configuration in kernel menuconfig...
> >>
> >> Please, try attached config (it's still failing in v3.2-rc6).
> >>
> > Hi Denis,
> >
> > Yes, when s3c2410 stuff is not selected, it happened.
> > Look at me soon and thanks.
> Hi, Kukjin,
> 
> Sorry, can you please explain as I can't understand. Especially second
> sentence.
> 
Oops, mis-typing. Let me look at that with your patch :)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCHv2 resend] Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.

2011-12-21 Thread Denis Kuzmenko
On 12/22/2011 12:04 AM, Kukjin Kim wrote:
> Denis Kuzmenko wrote:
>>
>> On 12/21/2011 09:04 AM, Kukjin Kim wrote:
>>> Denis Kuzmenko wrote:

 Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.

 Signed-off-by: Denis Kuzmenko 
 ---

 Patch is against 3.2-rc4.
 CONFIG_S3C2410_IOTIMING is not selected for MACH_MINI2440. Because of
>> this
 the
 file s3c2410-iotiming.c is not ever compiled and enabling
 CONFIG_CPU_FREQ_S3C24XX_DEBUGFS option caused undefined reference to
 function
 s3c2410_iotiming_debugfs defined in that file. s3c2410_iotiming_debugfs
 defined
 as NULL for this case.

>>> Hi Denis,
>>>
>>> Well, there is no error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected in
>> my
>>> case and s3c2410-iotiming.c is built...when is it happened? I just
>> selected
>>> every regarding configuration in kernel menuconfig...
>>
>> Please, try attached config (it's still failing in v3.2-rc6).
>>
> Hi Denis,
> 
> Yes, when s3c2410 stuff is not selected, it happened.
> Look at me soon and thanks.
Hi, Kukjin,

Sorry, can you please explain as I can't understand. Especially second
sentence.

-- 
Best regards, Denis Kuzmenko.
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RE: [PATCHv2 resend] Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.

2011-12-21 Thread Kukjin Kim
Denis Kuzmenko wrote:
> 
> On 12/21/2011 09:04 AM, Kukjin Kim wrote:
> > Denis Kuzmenko wrote:
> >>
> >> Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.
> >>
> >> Signed-off-by: Denis Kuzmenko 
> >> ---
> >>
> >> Patch is against 3.2-rc4.
> >> CONFIG_S3C2410_IOTIMING is not selected for MACH_MINI2440. Because of
> this
> >> the
> >> file s3c2410-iotiming.c is not ever compiled and enabling
> >> CONFIG_CPU_FREQ_S3C24XX_DEBUGFS option caused undefined reference to
> >> function
> >> s3c2410_iotiming_debugfs defined in that file. s3c2410_iotiming_debugfs
> >> defined
> >> as NULL for this case.
> >>
> > Hi Denis,
> >
> > Well, there is no error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected in
> my
> > case and s3c2410-iotiming.c is built...when is it happened? I just
> selected
> > every regarding configuration in kernel menuconfig...
> 
> Please, try attached config (it's still failing in v3.2-rc6).
> 
Hi Denis,

Yes, when s3c2410 stuff is not selected, it happened.
Look at me soon and thanks.

Best regards,
Kgene.
--
Kukjin Kim , Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

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Re: [PATCHv2 resend] Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.

2011-12-21 Thread Denis Kuzmenko
On 12/21/2011 09:04 AM, Kukjin Kim wrote:
> Denis Kuzmenko wrote:
>>
>> Fix compilation error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected.
>>
>> Signed-off-by: Denis Kuzmenko 
>> ---
>>
>> Patch is against 3.2-rc4.
>> CONFIG_S3C2410_IOTIMING is not selected for MACH_MINI2440. Because of this
>> the
>> file s3c2410-iotiming.c is not ever compiled and enabling
>> CONFIG_CPU_FREQ_S3C24XX_DEBUGFS option caused undefined reference to
>> function
>> s3c2410_iotiming_debugfs defined in that file. s3c2410_iotiming_debugfs
>> defined
>> as NULL for this case.
>>
> Hi Denis,
> 
> Well, there is no error when CONFIG_CPU_FREQ_S3C24XX_DEBUGFS selected in my
> case and s3c2410-iotiming.c is built...when is it happened? I just selected
> every regarding configuration in kernel menuconfig...

Please, try attached config (it's still failing in v3.2-rc6).

-- 
Best regards, Denis Kuzmenko.
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 3.2.0-rc6 Kernel Configuration
#
CONFIG_ARM=y
CONFIG_HAVE_PWM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
CONFIG_ARCH_USES_GETTIMEOFFSET=y
CONFIG_KTIME_SCALAR=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_NO_IOPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_ARCH_HAS_CPUFREQ=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_VECTORS_BASE=0x
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_GENERIC_BUG=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_HAVE_IRQ_WORK=y

#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE="arm-unknown-linux-uclibcgnueabi-"
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_LZO is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_FHANDLE is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
CONFIG_HAVE_GENERIC_HARDIRQS=y

#
# IRQ subsystem
#
CONFIG_GENERIC_HARDIRQS=y
CONFIG_HAVE_SPARSE_IRQ=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_CHIP=y
# CONFIG_SPARSE_IRQ is not set

#
# RCU Subsystem
#
CONFIG_TINY_RCU=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_RCU_TRACE is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=17
# CONFIG_CGROUPS is not set
CONFIG_NAMESPACES=y
CONFIG_UTS_NS=y
CONFIG_IPC_NS=y
CONFIG_USER_NS=y
CONFIG_PID_NS=y
CONFIG_NET_NS=y
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
CONFIG_RD_BZIP2=y
CONFIG_RD_LZMA=y
CONFIG_RD_XZ=y
CONFIG_RD_LZO=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
# CONFIG_EXPERT is not set
CONFIG_UID16=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y

#
# Kernel Performance Events And Counters
#
# CONFIG_PERF_EVENTS is not set
# CONFIG_PERF_COUNTERS is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_SLUB_DEBUG=y
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_PROFILING is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y

#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
CONFIG_LBDAF=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_BSGLIB is not set
CONFIG_BLK_DEV_INTEGRITY=y

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
# CONFIG_INLINE_SPIN_TRYLOCK is not set
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK is not set
# CONFIG_INLINE_SPIN_LOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
CONFIG_INLINE_SPIN_UNLOCK=y
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
# CONFIG_INLINE_SPIN_UNLOCK

Re: Re: [PATCH 0/3] Support Samsung S5P OHCI device and driver

2011-12-21 Thread Greg KH
On Wed, Dec 21, 2011 at 01:38:24PM +0900, Kukjin Kim wrote:
> 
> 
> > -Original Message-
> > From: Greg KH [mailto:g...@kroah.com]
> > Sent: Saturday, December 10, 2011 8:58 AM
> > To: Kukjin Kim
> > Cc: 'Jingoo Han'; linux-arm-ker...@lists.infradead.org; linux-
> > u...@vger.kernel.org; linux-samsung-soc@vger.kernel.org; gre...@suse.de;
> > st...@rowland.harvard.edu; 'Yulgon Kim'; 'Shim Joonyoung'
> > Subject: Re: Re: [PATCH 0/3] Support Samsung S5P OHCI device and driver
> > 
> > On Thu, Dec 01, 2011 at 07:10:17PM +0900, Kukjin Kim wrote:
> > > Greg KH wrote:
> > > >
> > > > On Mon, Nov 21, 2011 at 11:57:16AM +, Jingoo Han wrote:
> > > > > > -Original Message-
> > > > > > From: Greg KH [mailto:g...@kroah.com]
> > > > > > Sent: Friday, November 18, 2011 4:12 AM
> > > > > > To: Jingoo Han
> > > > > > Cc: linux-arm-ker...@lists.infradead.org; linux-
> > u...@vger.kernel.org;
> > > > > > linux-samsung-soc@vger.kernel.org; gre...@suse.de;
> > > > > > st...@rowland.harvard.edu; kgene@samsung.com;
> > > > yulgon@samsung.com;
> > > > > > jy0922.s...@samsung.com
> > > > > > Subject: Re: [PATCH 0/3] Support Samsung S5P OHCI device and
> > driver
> > > > > >
> > > > > > On Tue, Nov 15, 2011 at 06:49:58AM +, Jingoo Han wrote:
> > > > > > > Hello.
> > > > > > >
> > > > > > > This patch series adds USB OHCI device and initial driver for
> > > > Samsung
> > > > > > > S5P SoCs and is based from Linux 3.2-rc1. I have tested on
> > SMDKV310
> > > > > > board
> > > > > > > using EXYNOS4.
> > > > > >
> > > > > > This is to be sent through some arm tree, not the usb tree, right?
> > > > > Right, 1st and 2nd patch are sent throught arm tree.
> > > > > However, 3rd patch is sent through the usb tree.
> > > > > Thanks.
> > > > > [PATCH 1/3] ARM: SAMSUNG: Add USB OHCI device
> > > > > [PATCH 2/3]  ARM: EXYNOS: Add USB OHCI support to SMDKV310 board
> > > > > [PATCH 3/3] USB: Add S5P OHCI diver
> > > >
> > > Hi Greg,
> > >
> > > Sorry for late response. I came back today from family vacation...
> > >
> > > Anyway,
> > >
> > > > So the third patch does not depend on the first two?  If it does, that
> > > > means I will get build errors in the USB tree when I apply that patch,
> > > > right?
> > > >
> > > > If so, then all three should go through a single tree.
> > > >
> > > Yes, right. This series would be handled in same tree so that we can
> > avoid
> > > useless conflicts.
> > >
> > > I commented small thing on 3rd patch. So I think, if you're ok on his
> > > updated patch, it can be sent to upstream via Samsung tree. Or your tree
> > > with my ack?
> > 
> > The samsung tree is fine to take these, thanks.
> > 
> Hi Greg,
> 
> OK, let me pick this up in my tree...so, when I apply, may I can have a ack
> from you on 3rd patch?

Yes, feel free to add:
Acked-by: Greg Kroah-Hartman 

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[RFC PATCH 2/3] thermal: exynos4: Register the tmu sensor with the thermal interface layer

2011-12-21 Thread Amit Daniel Kachhap
Export and register information from the hwmon tmu sensor to the samsung
exynos kernel thermal framework where different cooling devices and thermal
zone are binded. The exported information is based according to the data
structure thermal_sensor_conf present in exynos_thermal.h. HWMON sysfs
functions are currently left although all of them are present in generic
linux thermal layer.
Also the platform data structure is modified to pass frequency cooling
in percentages for each thermal level.

Signed-off-by: Amit Daniel Kachhap 
---
 drivers/hwmon/exynos4_tmu.c   |   34 ++--
 include/linux/platform_data/exynos4_tmu.h |7 ++
 2 files changed, 38 insertions(+), 3 deletions(-)

diff --git a/drivers/hwmon/exynos4_tmu.c b/drivers/hwmon/exynos4_tmu.c
index f2359a0..6912a7f 100644
--- a/drivers/hwmon/exynos4_tmu.c
+++ b/drivers/hwmon/exynos4_tmu.c
@@ -37,6 +37,9 @@
 #include 
 
 #include 
+#ifdef CONFIG_SAMSUNG_THERMAL_INTERFACE
+#include 
+#endif
 
 #define EXYNOS4_TMU_REG_TRIMINFO   0x0
 #define EXYNOS4_TMU_REG_CONTROL0x20
@@ -248,10 +251,13 @@ static void exynos4_tmu_work(struct work_struct *work)
 
kobject_uevent(&data->hwmon_dev->kobj, KOBJ_CHANGE);
 
-   enable_irq(data->irq);
 
clk_disable(data->clk);
mutex_unlock(&data->lock);
+#ifdef CONFIG_SAMSUNG_THERMAL_INTERFACE
+   exynos4_report_trigger();
+#endif
+   enable_irq(data->irq);
 }
 
 static irqreturn_t exynos4_tmu_irq(int irq, void *id)
@@ -345,6 +351,14 @@ static const struct attribute_group exynos4_tmu_attr_group 
= {
.attrs = exynos4_tmu_attributes,
 };
 
+#ifdef CONFIG_SAMSUNG_THERMAL_INTERFACE
+static struct thermal_sensor_conf exynos4_sensor_conf = {
+   .name   = "exynos4-therm",
+   .read_temperature   = (int (*)(void *))exynos4_tmu_read,
+};
+#endif
+/*CONFIG_SAMSUNG_THERMAL_INTERFACE*/
+
 static int __devinit exynos4_tmu_probe(struct platform_device *pdev)
 {
struct exynos4_tmu_data *data;
@@ -432,9 +446,20 @@ static int __devinit exynos4_tmu_probe(struct 
platform_device *pdev)
}
 
exynos4_tmu_control(pdev, true);
-
+#ifdef CONFIG_SAMSUNG_THERMAL_INTERFACE
+   (&exynos4_sensor_conf)->private_data = data;
+   (&exynos4_sensor_conf)->sensor_data = pdata;
+   ret = exynos4_register_thermal(&exynos4_sensor_conf);
+   if (ret) {
+   dev_err(&pdev->dev, "Failed to register thermal interface\n");
+   goto err_hwmon_device;
+   }
+#endif
return 0;
-
+#ifdef CONFIG_SAMSUNG_THERMAL_INTERFACE
+err_hwmon_device:
+   hwmon_device_unregister(data->hwmon_dev);
+#endif
 err_create_group:
sysfs_remove_group(&pdev->dev.kobj, &exynos4_tmu_attr_group);
 err_clk:
@@ -458,6 +483,9 @@ static int __devexit exynos4_tmu_remove(struct 
platform_device *pdev)
 
exynos4_tmu_control(pdev, false);
 
+#ifdef CONFIG_SAMSUNG_THERMAL_INTERFACE
+   exynos4_unregister_thermal();
+#endif
hwmon_device_unregister(data->hwmon_dev);
sysfs_remove_group(&pdev->dev.kobj, &exynos4_tmu_attr_group);
 
diff --git a/include/linux/platform_data/exynos4_tmu.h 
b/include/linux/platform_data/exynos4_tmu.h
index 39e038c..642c508 100644
--- a/include/linux/platform_data/exynos4_tmu.h
+++ b/include/linux/platform_data/exynos4_tmu.h
@@ -21,6 +21,7 @@
 
 #ifndef _LINUX_EXYNOS4_TMU_H
 #define _LINUX_EXYNOS4_TMU_H
+#include 
 
 enum calibration_type {
TYPE_ONE_POINT_TRIMMING,
@@ -64,6 +65,9 @@ enum calibration_type {
  * in the positive-TC generator block
  * 0 <= reference_voltage <= 31
  * @cal_type: calibration type for temperature
+ * @freq_pctg_table: Table representing frequency reduction percentage.
+ * @freq_tab_count: Count of the above table as frequency reduction may
+ * applicable to only some of the trigger levels.
  *
  * This structure is required for configuration of exynos4_tmu driver.
  */
@@ -79,5 +83,8 @@ struct exynos4_tmu_platform_data {
u8 reference_voltage;
 
enum calibration_type cal_type;
+
+   struct freq_pctg_table freq_tab[4];
+   unsigned int freq_tab_count;
 };
 #endif /* _LINUX_EXYNOS4_TMU_H */
-- 
1.7.1

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[RFC PATCH 3/3] ARM: exynos4: Add thermal sensor driver platform device support

2011-12-21 Thread Amit Daniel Kachhap
This patch adds necessary source definations needed for TMU driver and
the platform device support.

Signed-off-by: Amit Daniel Kachhap 
---
 arch/arm/mach-exynos/Kconfig  |   12 +
 arch/arm/mach-exynos/Makefile |1 +
 arch/arm/mach-exynos/clock.c  |4 ++
 arch/arm/mach-exynos/dev-tmu.c|   64 +
 arch/arm/mach-exynos/include/mach/irqs.h  |2 +
 arch/arm/mach-exynos/include/mach/map.h   |1 +
 arch/arm/mach-exynos/mach-origen.c|1 +
 arch/arm/plat-samsung/include/plat/devs.h |1 +
 8 files changed, 86 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/mach-exynos/dev-tmu.c

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 724ec0f..cfc6119 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -82,6 +82,17 @@ config EXYNOS4_DEV_DWMCI
help
  Compile in platform device definitions for DWMCI
 
+config EXYNOS4_DEV_TMU
+   bool "Exynos4 tmu device support"
+   default n
+   depends on ARCH_EXYNOS4
+   ---help---
+ Compile in platform device definitions for TMU. This macro also
+ enables compilation hwmon base TMU driver and also allows compilation
+ of the platform device files. The platform data in this case is trip
+ temperature and some tmu h/w configurations related parameter.
+
+
 config EXYNOS4_SETUP_I2C1
bool
help
@@ -288,6 +299,7 @@ config MACH_ORIGEN
select SAMSUNG_DEV_BACKLIGHT
select SAMSUNG_DEV_PWM
select EXYNOS4_DEV_PD
+   select EXYNOS4_DEV_TMU
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 59069a3..d2493e8 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI)+= dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_PD)   += dev-pd.o
 obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)   += dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)+= dev-dwmci.o
+obj-$(CONFIG_EXYNOS4_DEV_TMU)   += dev-tmu.o
 
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)   += setup-fimc.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)  += setup-fimd0.o
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 2894f0a..edecc5e 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -567,6 +567,10 @@ static struct clk init_clocks_off[] = {
.enable = exynos4_clk_ip_peril_ctrl,
.ctrlbit= (1 << 15),
}, {
+   .name   = "tmu_apbif",
+   .enable = exynos4_clk_ip_perir_ctrl,
+   .ctrlbit= (1 << 17),
+   }, {
.name   = "keypad",
.enable = exynos4_clk_ip_perir_ctrl,
.ctrlbit= (1 << 16),
diff --git a/arch/arm/mach-exynos/dev-tmu.c b/arch/arm/mach-exynos/dev-tmu.c
new file mode 100644
index 000..2e98912
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-tmu.c
@@ -0,0 +1,64 @@
+/* linux/arch/arm/mach-exynos4/dev-tmu.c
+ *
+ * Copyright 2011 by SAMSUNG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+static struct resource exynos4_tmu_resource[] = {
+   [0] = {
+   .start  = EXYNOS4_PA_TMU,
+   .end= EXYNOS4_PA_TMU + 0x - 1,
+   .flags  = IORESOURCE_MEM,
+   },
+   [1] = {
+   .start  = IRQ_TMU_TRIG0,
+   .end= IRQ_TMU_TRIG0,
+   .flags  = IORESOURCE_IRQ,
+   },
+};
+
+static struct exynos4_tmu_platform_data default_tmu_data = {
+   .threshold = 80,
+   .trigger_levels[0] = 2,
+   .trigger_levels[1] = 5,
+   .trigger_levels[2] = 20,
+   .trigger_levels[3] = 30,
+   .trigger_level0_en = 1,
+   .trigger_level1_en = 1,
+   .trigger_level2_en = 1,
+   .trigger_level3_en = 1,
+   .gain = 15,
+   .reference_voltage = 7,
+   .cal_type = TYPE_ONE_POINT_TRIMMING,
+   .freq_tab[0] = {
+   .freq_clip_pctg[0] = 30,
+   },
+   .freq_tab[1] = {
+   .freq_clip_pctg[0] = 99,
+   },
+   .freq_tab_count = 2,
+};
+
+struct platform_device exynos4_device_tmu = {
+   .name   = "exynos4-tmu",
+   .id = -1,
+   .num_resources  = ARRAY_SIZE(exynos4_tmu_resource),
+   .resource   = exynos4_tmu_resource,
+   .dev= {
+   .platform_data  = &default_tmu_data,
+   },
+};
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h 
b/arch/arm/mach-exy

[RFC PATCH 1/3] thermal: exynos: Add thermal interface support for linux thermal layer

2011-12-21 Thread Amit Daniel Kachhap
This codes uses the generic linux thermal layer and creates a bridge
between temperature sensors, linux thermal framework and cooling devices
for samsung exynos platform. This layer recieves or monitor the
temperature from the sensor and informs the generic thermal layer to take
the necessary cooling action.

Signed-off-by: Amit Daniel Kachhap 
---
 drivers/thermal/Kconfig  |8 ++
 drivers/thermal/Makefile |1 +
 drivers/thermal/exynos_thermal.c |  255 ++
 include/linux/exynos_thermal.h   |   59 +
 4 files changed, 323 insertions(+), 0 deletions(-)
 create mode 100644 drivers/thermal/exynos_thermal.c
 create mode 100644 include/linux/exynos_thermal.h

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 298c1cd..4e8df56 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -29,3 +29,11 @@ config CPU_THERMAL
  This will be useful for platforms using the generic thermal interface
  and not the ACPI interface.
  If you want this support, you should say Y or M here.
+
+config SAMSUNG_THERMAL_INTERFACE
+   bool "Samsung Thermal interface support"
+   depends on THERMAL && CPU_THERMAL
+   help
+ This is a samsung thermal interface which will be used as
+ a link between sensors and cooling devices with linux thermal
+ framework.
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 655cbc4..c67b6b2 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_THERMAL)  += thermal_sys.o
 obj-$(CONFIG_CPU_THERMAL)  += cpu_cooling.o
+obj-$(CONFIG_SAMSUNG_THERMAL_INTERFACE)+= exynos_thermal.o
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c
new file mode 100644
index 000..7c916db
--- /dev/null
+++ b/drivers/thermal/exynos_thermal.c
@@ -0,0 +1,255 @@
+/* linux/drivers/thermal/exynos_thermal.c
+ *
+ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct exynos4_thermal_zone {
+   unsigned int idle_interval;
+   unsigned int active_interval;
+   struct thermal_zone_device *therm_dev;
+   struct thermal_cooling_device *cool_dev;
+   struct platform_device *exynos4_dev;
+   struct thermal_sensor_conf *sensor_conf;
+   struct exynos4_tmu_platform_data *sensor_data;
+};
+
+static struct exynos4_thermal_zone *th_zone;
+
+static int exynos4_get_mode(struct thermal_zone_device *thermal,
+   enum thermal_device_mode *mode)
+{
+   if (th_zone->sensor_conf) {
+   pr_info("Temperature sensor not initialised\n");
+   *mode = THERMAL_DEVICE_DISABLED;
+   } else
+   *mode = THERMAL_DEVICE_ENABLED;
+   return 0;
+}
+
+static int exynos4_set_mode(struct thermal_zone_device *thermal,
+   enum thermal_device_mode mode)
+{
+   if (!th_zone->therm_dev) {
+   pr_notice("thermal zone not registered\n");
+   return 0;
+   }
+   if (mode == THERMAL_DEVICE_ENABLED)
+   th_zone->therm_dev->polling_delay =
+   th_zone->active_interval*1000;
+   else
+   th_zone->therm_dev->polling_delay =
+   th_zone->idle_interval*1000;
+
+   thermal_zone_device_update(th_zone->therm_dev);
+   pr_info("thermal polling set for duration=%d sec\n",
+   th_zone->therm_dev->polling_delay/1000);
+   return 0;
+}
+
+/*This may be called from interrupt based temperature sensor*/
+void exynos4_report_trigger(void)
+{
+   unsigned int th_temp = th_zone->sensor_data->threshold;
+   unsigned int monitor_temp = th_temp +
+   th_zone->sensor_data->trigger_levels[1];
+
+   thermal_zone_device_update(th_zone->therm_dev);
+
+   if (th_zone->therm_dev->last_temperature > monitor_temp)
+   th_zone->therm_dev->polling_delay =
+   th_zone->active_interval*1000;
+   else
+   th_zone->therm_dev->polling_delay =
+   th_zone->idle_interval*1000;
+}
+
+static int exynos4_get_trip_type(struct thermal_zone_device *thermal, int trip,
+enum thermal_trip_type *type)
+{
+   if (trip == 0 || trip == 1)
+   *type = THERMAL_TRIP_STATE_ACTIVE;
+   else if (trip == 2)
+   *type = THERMAL_TRIP_CRITICAL;
+   else
+   return -EINVAL;
+
+   return 0;
+}
+
+static int exynos4_get_trip_temp(s

[RFC PATCH 0/3] thermal: exynos: Add kernel thermal support for exynos platform

2011-12-21 Thread Amit Daniel Kachhap
All the patchset based on Kernel version 3.2-rc6 and uses the cpufreq
cooling registration api's implemented in earlier patchset 
http://www.spinics.net/lists/linux-pm/msg26500.html

The code added in this patchset adds a thermal interface layer for samsung
exynos platforms. This layer is registered from the hwmon based temperature
sensor and recieves/monitor the temperature from the sensor and informs the
generic thermal layer to take the necessary cooling action. Currently this
layer can be used to create only one thermal zone and hence only one
temperature sensor can register.

Some modifications are done in the temperature sensor driver to export the
information needed for the thermal interface to register with the core linux
thermal framework and with the cpu frequency based cooling devices.

A simple data/control flow diagrams to illustrate this,

Core Linux thermal <--->  Exynos thermal  < Temperature Sensor
  | |
 \|/|
  Cpufreq cooling device <-

Amit Daniel Kachhap (3):
  thermal: exynos: Add thermal interface support for linux thermal
layer
  thermal: exynos4: Register the tmu sensor with the thermal interface
layer
  ARM: exynos4: Add thermal sensor driver platform device support

 arch/arm/mach-exynos/Kconfig  |   12 ++
 arch/arm/mach-exynos/Makefile |1 +
 arch/arm/mach-exynos/clock.c  |4 +
 arch/arm/mach-exynos/dev-tmu.c|   64 +++
 arch/arm/mach-exynos/include/mach/irqs.h  |2 +
 arch/arm/mach-exynos/include/mach/map.h   |1 +
 arch/arm/mach-exynos/mach-origen.c|1 +
 arch/arm/plat-samsung/include/plat/devs.h |1 +
 drivers/hwmon/exynos4_tmu.c   |   34 -
 drivers/thermal/Kconfig   |8 +
 drivers/thermal/Makefile  |1 +
 drivers/thermal/exynos_thermal.c  |  255 +
 include/linux/exynos_thermal.h|   59 +++
 include/linux/platform_data/exynos4_tmu.h |7 +
 14 files changed, 447 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/mach-exynos/dev-tmu.c
 create mode 100644 drivers/thermal/exynos_thermal.c
 create mode 100644 include/linux/exynos_thermal.h

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Re: [PATCH 1/8] s3c-hsudc: move platform_data struct to global header

2011-12-21 Thread Felipe Balbi
On Wed, Dec 21, 2011 at 01:06:14PM +0900, Kukjin Kim wrote:
> Heiko Stübner wrote:
> > 
> > Am Dienstag, 20. Dezember 2011, 12:25:00 schrieb Felipe Balbi:
> > > Hi,
> > >
> > > On Mon, Dec 19, 2011 at 07:39:15PM +0100, Heiko Stübner wrote:
> > > > Gadget drivers should be compilable on all architectures.
> > > > This patch removes one dependency on architecture-specific code.
> > > >
> > > > Signed-off-by: Heiko Stuebner 
> > > > ---
> > > >
> > > >  arch/arm/mach-s3c2416/mach-smdk2416.c|1 +
> > > >  arch/arm/plat-samsung/devs.c |1 +
> > > >  arch/arm/plat-samsung/include/plat/udc.h |   15 +
> > >
> > > I would like to have ack from Ben and/or Kukjin before applying this
> > > one. Ben are you ok with this patch ?
> > I think Kukjin does more acking if this stuff currently, so hopefully he 
> > will
> > see this mail.
> > 
> 
> Hi Felipe,
> 
> Looks ok to me, you can go ahead with my ack.
> Acked-by: Kukjin Kim 

Thanks.

-- 
balbi


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Re: [RESEND PATCH V7 1/2] mmc: core: HS200 mode support for eMMC 4.5

2011-12-21 Thread Girish K S
On 21 December 2011 15:18, Subhash Jadavani  wrote:
>  On 12/21/2011 3:10 PM, Girish K S wrote:
>>
>> This patch adds the support of the HS200 bus speed for eMMC 4.5 devices.
>> The eMMC 4.5 devices have support for 200MHz bus speed. The function
>> prototype of the tuning function is modified to handle the tuning command
>> number which is different in sd and mmc case.
>>
>> cc: Chris Ball
>> Signed-off-by: Girish K S
>> ---
>>  drivers/mmc/core/bus.c     |    3 +-
>>  drivers/mmc/core/debugfs.c |    3 +
>>  drivers/mmc/core/mmc.c     |  148
>> +---
>>  drivers/mmc/core/sd.c      |    3 +-
>>  drivers/mmc/core/sdio.c    |    4 +-
>>  include/linux/mmc/card.h   |    3 +
>>  include/linux/mmc/host.h   |   11 +++-
>>  include/linux/mmc/mmc.h    |   66 +++-
>>  8 files changed, 227 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
>> index f8a228a..5d011a3 100644
>> --- a/drivers/mmc/core/bus.c
>> +++ b/drivers/mmc/core/bus.c
>> @@ -303,10 +303,11 @@ int mmc_add_card(struct mmc_card *card)
>>                        mmc_card_ddr_mode(card) ? "DDR " : "",
>>                        type);
>>        } else {
>> -               printk(KERN_INFO "%s: new %s%s%s card at address %04x\n",
>> +               pr_info("%s: new %s%s%s%s card at address %04x\n",
>>                        mmc_hostname(card->host),
>>                        mmc_card_uhs(card) ? "ultra high speed " :
>>                        (mmc_card_highspeed(card) ? "high speed " : ""),
>> +                       (mmc_card_hs200(card) ? "HS200 " : ""),
>>                        mmc_card_ddr_mode(card) ? "DDR " : "",
>>                        type, card->rca);
>>        }
>> diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
>> index 027615d..9ab5b17 100644
>> --- a/drivers/mmc/core/debugfs.c
>> +++ b/drivers/mmc/core/debugfs.c
>> @@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void
>> *data)
>>        case MMC_TIMING_UHS_DDR50:
>>                str = "sd uhs DDR50";
>>                break;
>> +       case MMC_TIMING_MMC_HS200:
>> +               str = "mmc high-speed SDR200";
>> +               break;
>>        default:
>>                str = "invalid";
>>                break;
>> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
>> index f0a9f1f..acb0865 100644
>> --- a/drivers/mmc/core/mmc.c
>> +++ b/drivers/mmc/core/mmc.c
>> @@ -286,6 +286,27 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8
>> *ext_csd)
>>        }
>>        card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
>>        switch (ext_csd[EXT_CSD_CARD_TYPE]&  EXT_CSD_CARD_TYPE_MASK) {
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL:
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:
>> +               card->ext_csd.hs_max_dtr = 2;
>> +               card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;
>> +               break;
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:
>> +               card->ext_csd.hs_max_dtr = 2;
>> +               card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;
>> +               break;
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:
>> +               card->ext_csd.hs_max_dtr = 2;
>> +               card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;
>> +               break;
>>        case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
>>             EXT_CSD_CARD_TYPE_26:
>>                card->ext_csd.hs_max_dtr = 5200;
>> @@ -700,6 +721,64 @@ static int mmc_select_powerclass(struct mmc_card
>> *card,
>>  }
>>
>>  /*
>> + * Selects the desired buswidth and switch to the HS200 mode
>> + * if bus width set without error
>> + */
>> +static int mmc_select_hs200(struct mmc_card *card)
>> +{
>> +       int err = 0;
>> +       struct mmc_host *host;
>> +       u32 bus_width = MMC_BUS_WIDTH_4;
>> +
>> +       BUG_ON(!card);
>> +
>> +       host = card->host;
>> +
>> +       if ((card->ext_csd.card_type&  EXT_CSD_CARD_TYPE_SDR_1_2V)
>> +               &&  (host->caps2&  MMC_CAP2_HS200_1_2V_SDR))
>>
>> +               if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120,
>> 0))
>> +                       err = mmc_set_signal_voltage(host,
>> +
>>  MMC_SIGNAL_VOLTAGE_180,0);
>> +
>> +       /* If fails try again during next card power cycle */
>> +       if (err)
>> +               goto err;
>> +
>> +       /*
>> +        * Host is capable of 8bit transfer, then switch
>> +        * the device to work in 8bit transfer mode. If the
>> +        * mmc switch command

Re: [RESEND PATCH V7 1/2] mmc: core: HS200 mode support for eMMC 4.5

2011-12-21 Thread Subhash Jadavani

 On 12/21/2011 3:10 PM, Girish K S wrote:

This patch adds the support of the HS200 bus speed for eMMC 4.5 devices.
The eMMC 4.5 devices have support for 200MHz bus speed. The function
prototype of the tuning function is modified to handle the tuning command
number which is different in sd and mmc case.

cc: Chris Ball
Signed-off-by: Girish K S
---
  drivers/mmc/core/bus.c |3 +-
  drivers/mmc/core/debugfs.c |3 +
  drivers/mmc/core/mmc.c |  148 +---
  drivers/mmc/core/sd.c  |3 +-
  drivers/mmc/core/sdio.c|4 +-
  include/linux/mmc/card.h   |3 +
  include/linux/mmc/host.h   |   11 +++-
  include/linux/mmc/mmc.h|   66 +++-
  8 files changed, 227 insertions(+), 14 deletions(-)

diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index f8a228a..5d011a3 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -303,10 +303,11 @@ int mmc_add_card(struct mmc_card *card)
mmc_card_ddr_mode(card) ? "DDR " : "",
type);
} else {
-   printk(KERN_INFO "%s: new %s%s%s card at address %04x\n",
+   pr_info("%s: new %s%s%s%s card at address %04x\n",
mmc_hostname(card->host),
mmc_card_uhs(card) ? "ultra high speed " :
(mmc_card_highspeed(card) ? "high speed " : ""),
+   (mmc_card_hs200(card) ? "HS200 " : ""),
mmc_card_ddr_mode(card) ? "DDR " : "",
type, card->rca);
}
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 027615d..9ab5b17 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
case MMC_TIMING_UHS_DDR50:
str = "sd uhs DDR50";
break;
+   case MMC_TIMING_MMC_HS200:
+   str = "mmc high-speed SDR200";
+   break;
default:
str = "invalid";
break;
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index f0a9f1f..acb0865 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -286,6 +286,27 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 
*ext_csd)
}
card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
switch (ext_csd[EXT_CSD_CARD_TYPE]&  EXT_CSD_CARD_TYPE_MASK) {
+   case EXT_CSD_CARD_TYPE_SDR_ALL:
+   case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:
+   case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:
+   case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:
+   card->ext_csd.hs_max_dtr = 2;
+   card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;
+   break;
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:
+   card->ext_csd.hs_max_dtr = 2;
+   card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;
+   break;
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:
+   card->ext_csd.hs_max_dtr = 2;
+   card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;
+   break;
case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
 EXT_CSD_CARD_TYPE_26:
card->ext_csd.hs_max_dtr = 5200;
@@ -700,6 +721,64 @@ static int mmc_select_powerclass(struct mmc_card *card,
  }

  /*
+ * Selects the desired buswidth and switch to the HS200 mode
+ * if bus width set without error
+ */
+static int mmc_select_hs200(struct mmc_card *card)
+{
+   int err = 0;
+   struct mmc_host *host;
+   u32 bus_width = MMC_BUS_WIDTH_4;
+
+   BUG_ON(!card);
+
+   host = card->host;
+
+   if ((card->ext_csd.card_type&  EXT_CSD_CARD_TYPE_SDR_1_2V)
+   &&  (host->caps2&  MMC_CAP2_HS200_1_2V_SDR))
+   if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0))
+   err = mmc_set_signal_voltage(host,
+MMC_SIGNAL_VOLTAGE_180,0);
+
+   /* If fails try again during next card power cycle */
+   if (err)
+   goto err;
+
+   /*
+* Host is capable of 8bit transfer, then switch
+* the device to work in 8bit transfer mode. If the
+* mmc switch command returns error then switch to
+* 4bit transfer mode. On success set the corresponding
+* bus width on the host.
+*/
+   if (host->caps&  MMC_CAP_8_BIT_DATA) {
+   err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+EXT_CSD_BUS_WIDTH,
+   

[RESEND PATCH V7 2/2] mmc: host: Adds support for eMMC 4.5 HS200 mode

2011-12-21 Thread Girish K S
This patch adds support for the HS200 mode on the host side.
Also enables the tuning feature required when the HS200 mode
is selected.

cc: Chris Ball 
Signed-off-by: Girish K S 
---
 drivers/mmc/host/sdhci.c  |   45 ++---
 drivers/mmc/host/sdhci.h  |1 +
 include/linux/mmc/sdhci.h |1 +
 3 files changed, 36 insertions(+), 11 deletions(-)

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index ab6018f..fb17e95 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -49,7 +49,7 @@ static void sdhci_finish_data(struct sdhci_host *);
 
 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
 static void sdhci_finish_command(struct sdhci_host *);
-static int sdhci_execute_tuning(struct mmc_host *mmc);
+static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode);
 static void sdhci_tuning_timer(unsigned long data);
 
 #ifdef CONFIG_PM_RUNTIME
@@ -1016,7 +1016,8 @@ static void sdhci_send_command(struct sdhci_host *host, 
struct mmc_command *cmd)
flags |= SDHCI_CMD_INDEX;
 
/* CMD19 is special in that the Data Present Select should be set */
-   if (cmd->data || (cmd->opcode == MMC_SEND_TUNING_BLOCK))
+   if (cmd->data || (cmd->opcode == MMC_SEND_TUNING_BLOCK) ||
+   (cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200))
flags |= SDHCI_CMD_DATA;
 
sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
@@ -1287,7 +1288,7 @@ static void sdhci_request(struct mmc_host *mmc, struct 
mmc_request *mrq)
if ((host->flags & SDHCI_NEEDS_RETUNING) &&
!(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) {
spin_unlock_irqrestore(&host->lock, flags);
-   sdhci_execute_tuning(mmc);
+   sdhci_execute_tuning(mmc, mrq->cmd->opcode);
spin_lock_irqsave(&host->lock, flags);
 
/* Restore original mmc_request structure */
@@ -1371,7 +1372,8 @@ static void sdhci_do_set_ios(struct sdhci_host *host, 
struct mmc_ios *ios)
unsigned int clock;
 
/* In case of UHS-I modes, set High Speed Enable */
-   if ((ios->timing == MMC_TIMING_UHS_SDR50) ||
+   if ((ios->timing == MMC_TIMING_MMC_HS200) ||
+   (ios->timing == MMC_TIMING_UHS_SDR50) ||
(ios->timing == MMC_TIMING_UHS_SDR104) ||
(ios->timing == MMC_TIMING_UHS_DDR50) ||
(ios->timing == MMC_TIMING_UHS_SDR25) ||
@@ -1425,7 +1427,9 @@ static void sdhci_do_set_ios(struct sdhci_host *host, 
struct mmc_ios *ios)
ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
/* Select Bus Speed Mode for host */
ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
-   if (ios->timing == MMC_TIMING_UHS_SDR12)
+   if (ios->timing == MMC_TIMING_MMC_HS200)
+   ctrl_2 |= SDHCI_CTRL_HS_SDR200;
+   else if (ios->timing == MMC_TIMING_UHS_SDR12)
ctrl_2 |= SDHCI_CTRL_UHS_SDR12;
else if (ios->timing == MMC_TIMING_UHS_SDR25)
ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
@@ -1673,7 +1677,7 @@ static int sdhci_start_signal_voltage_switch(struct 
mmc_host *mmc,
return err;
 }
 
-static int sdhci_execute_tuning(struct mmc_host *mmc)
+static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
 {
struct sdhci_host *host;
u16 ctrl;
@@ -1694,10 +1698,13 @@ static int sdhci_execute_tuning(struct mmc_host *mmc)
 * Host Controller needs tuning only in case of SDR104 mode
 * and for SDR50 mode when Use Tuning for SDR50 is set in
 * Capabilities register.
+* If the Host Controller supports the HS200 mode then tuning
+* function has to be executed.
 */
if (((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR104) ||
(((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR50) &&
-   (host->flags & SDHCI_SDR50_NEEDS_TUNING)))
+   (host->flags & SDHCI_SDR50_NEEDS_TUNING)) ||
+   (host->flags & SDHCI_HS200_NEEDS_TUNING))
ctrl |= SDHCI_CTRL_EXEC_TUNING;
else {
spin_unlock(&host->lock);
@@ -1733,7 +1740,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc)
if (!tuning_loop_counter && !timeout)
break;
 
-   cmd.opcode = MMC_SEND_TUNING_BLOCK;
+   cmd.opcode = opcode;
cmd.arg = 0;
cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
cmd.retries = 0;
@@ -1748,7 +1755,17 @@ static int sdhci_execute_tuning(struct mmc_host *mmc)
 * block to the Host Controller. So we set the block size
 * to 64 here.
 

[RESEND PATCH V7 1/2] mmc: core: HS200 mode support for eMMC 4.5

2011-12-21 Thread Girish K S
This patch adds the support of the HS200 bus speed for eMMC 4.5 devices.
The eMMC 4.5 devices have support for 200MHz bus speed. The function
prototype of the tuning function is modified to handle the tuning command
number which is different in sd and mmc case.

cc: Chris Ball 
Signed-off-by: Girish K S 
---
 drivers/mmc/core/bus.c |3 +-
 drivers/mmc/core/debugfs.c |3 +
 drivers/mmc/core/mmc.c |  148 +---
 drivers/mmc/core/sd.c  |3 +-
 drivers/mmc/core/sdio.c|4 +-
 include/linux/mmc/card.h   |3 +
 include/linux/mmc/host.h   |   11 +++-
 include/linux/mmc/mmc.h|   66 +++-
 8 files changed, 227 insertions(+), 14 deletions(-)

diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
index f8a228a..5d011a3 100644
--- a/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
@@ -303,10 +303,11 @@ int mmc_add_card(struct mmc_card *card)
mmc_card_ddr_mode(card) ? "DDR " : "",
type);
} else {
-   printk(KERN_INFO "%s: new %s%s%s card at address %04x\n",
+   pr_info("%s: new %s%s%s%s card at address %04x\n",
mmc_hostname(card->host),
mmc_card_uhs(card) ? "ultra high speed " :
(mmc_card_highspeed(card) ? "high speed " : ""),
+   (mmc_card_hs200(card) ? "HS200 " : ""),
mmc_card_ddr_mode(card) ? "DDR " : "",
type, card->rca);
}
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 027615d..9ab5b17 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
case MMC_TIMING_UHS_DDR50:
str = "sd uhs DDR50";
break;
+   case MMC_TIMING_MMC_HS200:
+   str = "mmc high-speed SDR200";
+   break;
default:
str = "invalid";
break;
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index f0a9f1f..acb0865 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -286,6 +286,27 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 
*ext_csd)
}
card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) {
+   case EXT_CSD_CARD_TYPE_SDR_ALL:
+   case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:
+   case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:
+   case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:
+   card->ext_csd.hs_max_dtr = 2;
+   card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;
+   break;
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:
+   case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:
+   card->ext_csd.hs_max_dtr = 2;
+   card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;
+   break;
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:
+   case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:
+   card->ext_csd.hs_max_dtr = 2;
+   card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;
+   break;
case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
 EXT_CSD_CARD_TYPE_26:
card->ext_csd.hs_max_dtr = 5200;
@@ -700,6 +721,64 @@ static int mmc_select_powerclass(struct mmc_card *card,
 }
 
 /*
+ * Selects the desired buswidth and switch to the HS200 mode
+ * if bus width set without error
+ */
+static int mmc_select_hs200(struct mmc_card *card)
+{
+   int err = 0;
+   struct mmc_host *host;
+   u32 bus_width = MMC_BUS_WIDTH_4;
+
+   BUG_ON(!card);
+
+   host = card->host;
+
+   if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_SDR_1_2V)
+   && (host->caps2 & MMC_CAP2_HS200_1_2V_SDR))
+   if (mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 0))
+   err = mmc_set_signal_voltage(host,
+MMC_SIGNAL_VOLTAGE_180,0);
+
+   /* If fails try again during next card power cycle */
+   if (err)
+   goto err;
+
+   /*
+* Host is capable of 8bit transfer, then switch
+* the device to work in 8bit transfer mode. If the
+* mmc switch command returns error then switch to
+* 4bit transfer mode. On success set the corresponding
+* bus width on the host.
+*/
+   if (host->caps & MMC_CAP_8_BIT_DATA) {
+   err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
+EXT_CSD_BUS_WIDTH,
+EXT_CSD_BUS_WIDTH_8,
+  

[RESEND PATCH V7 0/2] HS200 Mode support for device and host

2011-12-21 Thread Girish K S
changes in v7:
Updated with review comments for minor changes in host conditional
handling. added the handling for 4 bit bus width. 
Changes in v6:
   split the patch into 2 and classified them as a patch for device
   and host. Modified to include the review comments.
Changes in v5:
   Reduced the case statements for better code readability. Removed
   unused macro definitions. Modified the tuning function prototype
   and definition to support tuning for both SD and eMMC cards.
Changes in v4:
   Rebased onto chris-mmc/mmc-next branch. This patch is successfully
   applied on commit with id de022ed3fdc14808299b2fa66dbb1ed5ab921912.
Changes in v3:
   In the previous commits of chris-mmc/mmc-next branch, the patch with
   commit id (c0f22a2c92e357e7cb3988b0b13034d70b7461f9) defines caps2 for
   more capabilities. This patch version deletes the member ext_caps(created
   in my earlier patch) from struct mmc_host and reuses already accepted
   caps2 member.
Changes in v2:
   Rebased to latest chris-mmc/mmc-next branch. Resolved indentation
   problems identified in review. This patch has to be applied before
   the patch released for modifying the printk messages.
Changes in v1:
   Case statements in switch that produce same result have
   been combined to reduce repeated assignments.
   patch recreated after rebase to chris balls mmc-next branch.

Girish K S (2):
  mmc: core: HS200 mode support for eMMC 4.5
  mmc: host: Adds support for eMMC 4.5 HS200 mode

 drivers/mmc/core/bus.c |3 +-
 drivers/mmc/core/debugfs.c |3 +
 drivers/mmc/core/mmc.c |  148 +---
 drivers/mmc/core/sd.c  |3 +-
 drivers/mmc/core/sdio.c|4 +-
 drivers/mmc/host/sdhci.c   |   45 ++---
 drivers/mmc/host/sdhci.h   |1 +
 include/linux/mmc/card.h   |3 +
 include/linux/mmc/host.h   |   11 +++-
 include/linux/mmc/mmc.h|   66 +++-
 include/linux/mmc/sdhci.h  |1 +
 11 files changed, 263 insertions(+), 25 deletions(-)

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[PATCH 4/4] ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

2011-12-21 Thread Heiko Stübner
As the S3C24xx SoCs use the same rtc device a renaming capability like in
the adc driver is necessary.

This patch adds a s3c_rtc_setname function and names the rtc devices for
S3C2443 and S3C2416 accordingly.

Signed-off-by: Heiko Stuebner 
---
 arch/arm/mach-s3c2416/s3c2416.c   |2 +
 arch/arm/mach-s3c2443/s3c2443.c   |2 +
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +
 3 files changed, 31 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index ee214bc..604cf98 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -61,6 +61,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static struct map_desc s3c2416_iodesc[] __initdata = {
IODESC_ENT(WATCHDOG),
@@ -99,6 +100,7 @@ int __init s3c2416_init(void)
s3c_fb_setname("s3c2443-fb");
 
s3c_adc_setname("s3c2416-adc");
+   s3c_rtc_setname("s3c2416-rtc");
 
 #ifdef CONFIG_PM
register_syscore_ops(&s3c2416_pm_syscore_ops);
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c
index a22b771..9e6be20 100644
--- a/arch/arm/mach-s3c2443/s3c2443.c
+++ b/arch/arm/mach-s3c2443/s3c2443.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static struct map_desc s3c2443_iodesc[] __initdata = {
IODESC_ENT(WATCHDOG),
@@ -72,6 +73,7 @@ int __init s3c2443_init(void)
s3c_fb_setname("s3c2443-fb");
 
s3c_adc_setname("s3c2443-adc");
+   s3c_rtc_setname("s3c2443-rtc");
 
/* change WDT IRQ number */
s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h 
b/arch/arm/plat-samsung/include/plat/rtc-core.h
new file mode 100644
index 000..21d8594
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/rtc-core.h
@@ -0,0 +1,27 @@
+/* linux/arch/arm/plat-samsung/include/plat/rtc-core.h
+ *
+ * Copyright (c) 2011 Heiko Stuebner 
+ *
+ * Samsung RTC Controller core functions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_PLAT_RTC_CORE_H
+#define __ASM_PLAT_RTC_CORE_H __FILE__
+
+/* These functions are only for use with the core support code, such as
+ * the cpu specific initialisation code
+ */
+
+/* re-define device name depending on support. */
+static inline void s3c_rtc_setname(char *name)
+{
+#if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX)
+   s3c_device_rtc.name = name;
+#endif
+}
+
+#endif /* __ASM_PLAT_RTC_CORE_H */
-- 
1.7.5.4

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[PATCH 3/4] rtc-s3c: add variants for S3C2443 and S3C2416

2011-12-21 Thread Heiko Stübner
Especially the TICNT registers are different from the two rtc types
that currently exists.

Signed-off-by: Heiko Stuebner 
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   17 ++
 drivers/rtc/rtc-s3c.c |   43 ++--
 2 files changed, 56 insertions(+), 4 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h 
b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index a7d944f..0f8263e 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -22,11 +22,28 @@
 #define S3C2410_RTCCON_RTCEN   (1 << 0)
 #define S3C2410_RTCCON_CNTSEL  (1 << 2)
 #define S3C2410_RTCCON_CLKRST  (1 << 3)
+#define S3C2443_RTCCON_TICSEL  (1 << 4)
 #define S3C64XX_RTCCON_TICEN   (1 << 8)
 
 #define S3C2410_TICNT  S3C2410_RTCREG(0x44)
 #define S3C2410_TICNT_ENABLE   (1 << 7)
 
+/* S3C2443: tick count is 15 bit wide
+ * TICNT[6:0] contains upper 7 bits
+ * TICNT1[7:0] contains lower 8 bits
+ */
+#define S3C2443_TICNT_PART(x)  ((x & 0x7f00) >> 8)
+#define S3C2443_TICNT1 S3C2410_RTCREG(0x4C)
+#define S3C2443_TICNT1_PART(x) (x & 0xff)
+
+/* S3C2416: tick count is 32 bit wide
+ * TICNT[6:0] contains bits [14:8]
+ * TICNT1[7:0] contains lower 8 bits
+ * TICNT2[16:0] contains upper 17 bits
+ */
+#define S3C2416_TICNT2 S3C2410_RTCREG(0x48)
+#define S3C2416_TICNT2_PART(x) ((x & 0x8000) >> 15)
+
 #define S3C2410_RTCALM S3C2410_RTCREG(0x50)
 #define S3C2410_RTCALM_ALMEN   (1 << 6)
 #define S3C2410_RTCALM_YEAREN  (1 << 5)
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 2885b25..4498053 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -35,6 +35,8 @@
 
 enum s3c_cpu_type {
TYPE_S3C2410,
+   TYPE_S3C2443,
+   TYPE_S3C2416,
TYPE_S3C64XX,
 };
 
@@ -132,6 +134,7 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
struct platform_device *pdev = to_platform_device(dev);
struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
unsigned int tmp = 0;
+   int val;
 
if (!is_power_of_2(freq))
return -EINVAL;
@@ -139,12 +142,24 @@ static int s3c_rtc_setfreq(struct device *dev, int freq)
clk_enable(rtc_clk);
spin_lock_irq(&s3c_rtc_pie_lock);
 
-   if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+   if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
tmp = readb(s3c_rtc_base + S3C2410_TICNT);
tmp &= S3C2410_TICNT_ENABLE;
}
 
-   tmp |= (rtc_dev->max_user_freq / freq)-1;
+   val = (rtc_dev->max_user_freq / freq) - 1;
+
+   if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+   s3c_rtc_cpu_type == TYPE_S3C2416) {
+   tmp |= S3C2443_TICNT_PART(val);
+   writel(S3C2443_TICNT1_PART(val),
+  s3c_rtc_base + S3C2443_TICNT1);
+   if (s3c_rtc_cpu_type == TYPE_S3C2416)
+   writel(S3C2416_TICNT2_PART(val),
+  s3c_rtc_base + S3C2416_TICNT2);
+   } else {
+   tmp |= val;
+   }
 
writel(tmp, s3c_rtc_base + S3C2410_TICNT);
spin_unlock_irq(&s3c_rtc_pie_lock);
@@ -371,7 +386,7 @@ static void s3c_rtc_enable(struct platform_device *pdev, 
int en)
tmp &= ~S3C2410_RTCCON_RTCEN;
writew(tmp, base + S3C2410_RTCCON);
 
-   if (s3c_rtc_cpu_type == TYPE_S3C2410) {
+   if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
tmp = readb(base + S3C2410_TICNT);
tmp &= ~S3C2410_TICNT_ENABLE;
writeb(tmp, base + S3C2410_TICNT);
@@ -448,6 +463,7 @@ static int __devinit s3c_rtc_probe(struct platform_device 
*pdev)
struct rtc_time rtc_tm;
struct resource *res;
int ret;
+   int tmp;
 
pr_debug("%s: probe=%p\n", __func__, pdev);
 
@@ -541,11 +557,18 @@ static int __devinit s3c_rtc_probe(struct platform_device 
*pdev)
dev_warn(&pdev->dev, "warning: invalid RTC value so 
initializing it\n");
}
 
-   if (s3c_rtc_cpu_type == TYPE_S3C64XX)
+   if (s3c_rtc_cpu_type != TYPE_S3C2410)
rtc->max_user_freq = 32768;
else
rtc->max_user_freq = 128;
 
+   if (s3c_rtc_cpu_type == TYPE_S3C2443 ||
+s3c_rtc_cpu_type == TYPE_S3C2416) {
+   tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
+   tmp |= S3C2443_RTCCON_TICSEL;
+   writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
+   }
+
platform_set_drvdata(pdev, rtc);
 
s3c_rtc_setfreq(&pdev->dev, 1);
@@ -650,6 +673,12 @@ static const struct of_device_id s3c_rtc_dt_match[] = {
.compatible = "samsung,s3c2410-rtc"
.data = TYPE_S3C2410,
}, {
+   .compatible = "samsung,s3c2443-rtc"
+   .data = TYPE_S3C2443,
+   }, {
+   .compatible = "samsung,s3c2416-rtc"
+  

[PATCH 2/4] rtc-s3c: make room for more variants in devicetree block

2011-12-21 Thread Heiko Stübner
Use the data field of of_device_id to hold the type for
s3c_cpu_type.

Signed-off-by: Heiko Stuebner 
Reviewed-by: Thomas Abraham 
---
 drivers/rtc/rtc-s3c.c |   31 ++-
 1 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 175067a..2885b25 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -428,6 +428,20 @@ static int __devexit s3c_rtc_remove(struct platform_device 
*dev)
return 0;
 }
 
+static const struct of_device_id s3c_rtc_dt_match[];
+
+static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
+{
+#ifdef CONFIG_OF
+   if (pdev->dev.of_node) {
+   const struct of_device_id *match;
+   match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
+   return match->data;
+   }
+#endif
+   return platform_get_device_id(pdev)->driver_data;
+}
+
 static int __devinit s3c_rtc_probe(struct platform_device *pdev)
 {
struct rtc_device *rtc;
@@ -508,13 +522,7 @@ static int __devinit s3c_rtc_probe(struct platform_device 
*pdev)
goto err_nortc;
}
 
-#ifdef CONFIG_OF
-   if (pdev->dev.of_node)
-   s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
-   "samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
-   else
-#endif
-   s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
+   s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
 
/* Check RTC Time */
 
@@ -638,8 +646,13 @@ static int s3c_rtc_resume(struct platform_device *pdev)
 
 #ifdef CONFIG_OF
 static const struct of_device_id s3c_rtc_dt_match[] = {
-   { .compatible = "samsung,s3c2410-rtc" },
-   { .compatible = "samsung,s3c6410-rtc" },
+   {
+   .compatible = "samsung,s3c2410-rtc"
+   .data = TYPE_S3C2410,
+   }, {
+   .compatible = "samsung,s3c6410-rtc"
+   .data = TYPE_S3C64XX,
+   },
{},
 };
 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
-- 
1.7.5.4

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RE: [PATCH] ARM: EXYNOS: Add USB OHCI support to ORIGEN board

2011-12-21 Thread Jingoo Han
Hi, Tushar.

Tushar Behera wrote:
> -Original Message-
> Subject: [PATCH] ARM: EXYNOS: Add USB OHCI support to ORIGEN board
> 
> Signed-off-by: Tushar Behera 
> Signed-off-by: Angus Ainslie 

Acked-by: Jingoo Han 

Thanks.

Best regards,
Jingoo Han
> ---
> 
> This patch are based Kukjin's for-next branch and OHCI related
> patches from Jingoo Han.
> [PATCH v2 0/3] Support Samsung Exynos OHCI device and driver
> 
>  arch/arm/mach-exynos/Kconfig   |1 +
>  arch/arm/mach-exynos/mach-origen.c |   13 +
>  2 files changed, 14 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
> index bd1bb9f1..0da2ced 100644
> --- a/arch/arm/mach-exynos/Kconfig
> +++ b/arch/arm/mach-exynos/Kconfig
> @@ -304,6 +304,7 @@ config MACH_ORIGEN
>   select SAMSUNG_DEV_PWM
>   select EXYNOS4_DEV_DMA
>   select EXYNOS4_DEV_PD
> + select EXYNOS4_DEV_USB_OHCI
>   select EXYNOS4_SETUP_FIMD0
>   select EXYNOS4_SETUP_SDHCI
>   select EXYNOS4_SETUP_USB_PHY
> diff --git a/arch/arm/mach-exynos/mach-origen.c 
> b/arch/arm/mach-exynos/mach-origen.c
> index f56d027..a0116036 100644
> --- a/arch/arm/mach-exynos/mach-origen.c
> +++ b/arch/arm/mach-exynos/mach-origen.c
> @@ -42,6 +42,7 @@
>  #include 
>  #include 
> 
> +#include 
>  #include 
> 
>  /* Following are default values for UCON, ULCON and UFCON UART registers */
> @@ -487,6 +488,16 @@ static void __init origen_ehci_init(void)
>   s5p_ehci_set_platdata(pdata);
>  }
> 
> +/* USB OHCI */
> +static struct exynos4_ohci_platdata origen_ohci_pdata;
> +
> +static void __init origen_ohci_init(void)
> +{
> + struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
> +
> + exynos4_ohci_set_platdata(pdata);
> +}
> +
>  static struct gpio_keys_button origen_gpio_keys_table[] = {
>   {
>   .code   = KEY_MENU,
> @@ -627,6 +638,7 @@ static struct platform_device *origen_devices[] 
> __initdata = {
>   &s5p_device_mfc_l,
>   &s5p_device_mfc_r,
>   &s5p_device_mixer,
> + &exynos4_device_ohci,
>   &exynos4_device_pd[PD_LCD0],
>   &exynos4_device_pd[PD_TV],
>   &exynos4_device_pd[PD_G3D],
> @@ -702,6 +714,7 @@ static void __init origen_machine_init(void)
>   s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
> 
>   origen_ehci_init();
> + origen_ohci_init();
>   clk_xusbxti.rate = 2400;
> 
>   s5p_tv_setup();
> --
> 1.7.4.1

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[PATCH 1/4] ARM: SAMSUNG: cleanup of rtc register definitions

2011-12-21 Thread Heiko Stübner
regs-rtc.h uses a mixture of tabs and spaces and also (x<
---
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   78 ++---
 1 files changed, 32 insertions(+), 46 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h 
b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index 30b7cc1..a7d944f 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -18,51 +18,37 @@
 #define S3C2410_INTP_ALM   (1 << 1)
 #define S3C2410_INTP_TIC   (1 << 0)
 
-#define S3C2410_RTCCON   S3C2410_RTCREG(0x40)
-#define S3C2410_RTCCON_RTCEN  (1<<0)
-#define S3C2410_RTCCON_CLKSEL (1<<1)
-#define S3C2410_RTCCON_CNTSEL (1<<2)
-#define S3C2410_RTCCON_CLKRST (1<<3)
-#define S3C64XX_RTCCON_TICEN  (1<<8)
-
-#define S3C64XX_RTCCON_TICMSK (0xF<<7)
-#define S3C64XX_RTCCON_TICSHT (7)
-
-#define S3C2410_TICNTS3C2410_RTCREG(0x44)
-#define S3C2410_TICNT_ENABLE  (1<<7)
-
-#define S3C2410_RTCALM   S3C2410_RTCREG(0x50)
-#define S3C2410_RTCALM_ALMEN  (1<<6)
-#define S3C2410_RTCALM_YEAREN (1<<5)
-#define S3C2410_RTCALM_MONEN  (1<<4)
-#define S3C2410_RTCALM_DAYEN  (1<<3)
-#define S3C2410_RTCALM_HOUREN (1<<2)
-#define S3C2410_RTCALM_MINEN  (1<<1)
-#define S3C2410_RTCALM_SECEN  (1<<0)
-
-#define S3C2410_RTCALM_ALL \
-  S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\
-  S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\
-  S3C2410_RTCALM_SECEN
-
-
-#define S3C2410_ALMSEC   S3C2410_RTCREG(0x54)
-#define S3C2410_ALMMIN   S3C2410_RTCREG(0x58)
-#define S3C2410_ALMHOUR  S3C2410_RTCREG(0x5c)
-
-#define S3C2410_ALMDATE  S3C2410_RTCREG(0x60)
-#define S3C2410_ALMMON   S3C2410_RTCREG(0x64)
-#define S3C2410_ALMYEAR  S3C2410_RTCREG(0x68)
-
-#define S3C2410_RTCRST   S3C2410_RTCREG(0x6c)
-
-#define S3C2410_RTCSEC   S3C2410_RTCREG(0x70)
-#define S3C2410_RTCMIN   S3C2410_RTCREG(0x74)
-#define S3C2410_RTCHOUR  S3C2410_RTCREG(0x78)
-#define S3C2410_RTCDATE  S3C2410_RTCREG(0x7c)
-#define S3C2410_RTCDAY   S3C2410_RTCREG(0x80)
-#define S3C2410_RTCMON   S3C2410_RTCREG(0x84)
-#define S3C2410_RTCYEAR  S3C2410_RTCREG(0x88)
-
+#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
+#define S3C2410_RTCCON_RTCEN   (1 << 0)
+#define S3C2410_RTCCON_CNTSEL  (1 << 2)
+#define S3C2410_RTCCON_CLKRST  (1 << 3)
+#define S3C64XX_RTCCON_TICEN   (1 << 8)
+
+#define S3C2410_TICNT  S3C2410_RTCREG(0x44)
+#define S3C2410_TICNT_ENABLE   (1 << 7)
+
+#define S3C2410_RTCALM S3C2410_RTCREG(0x50)
+#define S3C2410_RTCALM_ALMEN   (1 << 6)
+#define S3C2410_RTCALM_YEAREN  (1 << 5)
+#define S3C2410_RTCALM_MONEN   (1 << 4)
+#define S3C2410_RTCALM_DAYEN   (1 << 3)
+#define S3C2410_RTCALM_HOUREN  (1 << 2)
+#define S3C2410_RTCALM_MINEN   (1 << 1)
+#define S3C2410_RTCALM_SECEN   (1 << 0)
+
+#define S3C2410_ALMSEC S3C2410_RTCREG(0x54)
+#define S3C2410_ALMMIN S3C2410_RTCREG(0x58)
+#define S3C2410_ALMHOURS3C2410_RTCREG(0x5c)
+
+#define S3C2410_ALMDATES3C2410_RTCREG(0x60)
+#define S3C2410_ALMMON S3C2410_RTCREG(0x64)
+#define S3C2410_ALMYEARS3C2410_RTCREG(0x68)
+
+#define S3C2410_RTCSEC S3C2410_RTCREG(0x70)
+#define S3C2410_RTCMIN S3C2410_RTCREG(0x74)
+#define S3C2410_RTCHOURS3C2410_RTCREG(0x78)
+#define S3C2410_RTCDATES3C2410_RTCREG(0x7c)
+#define S3C2410_RTCMON S3C2410_RTCREG(0x84)
+#define S3C2410_RTCYEARS3C2410_RTCREG(0x88)
 
 #endif /* __ASM_ARCH_REGS_RTC_H */
-- 
1.7.5.4

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[PATCH v3 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

2011-12-21 Thread Heiko Stübner
Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
variances when compared to the existing types.

This series adds support for those SoCs.

As with the ADC patches, these changes where tested on S3C2416 hardware.
The S3C2443 quirks are a subset of those and are done according to the
datasheet, but not tested on real hardware (as I do not own a S3C2443 device).

changes since v2:
remove obsolete constants in register cleanup

changes since v1:
address comments from Thomas Abraham, reducing number of ifdefs and
duplicate code

Heiko Stuebner (2):
  ARM: SAMSUNG: cleanup of rtc register definitions
  rtc-s3c: make room for more variants in devicetree block
  rtc-s3c: add variants for S3C2443 and S3C2416
  ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices

 arch/arm/mach-s3c2416/s3c2416.c   |2 +
 arch/arm/mach-s3c2443/s3c2443.c   |2 +
 arch/arm/plat-samsung/include/plat/regs-rtc.h |   81 +
 arch/arm/plat-samsung/include/plat/rtc-core.h |   27 
 drivers/rtc/rtc-s3c.c |   74 +++
 5 files changed, 134 insertions(+), 52 deletions(-)
 create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h

-- 
1.7.5.4

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Re: [PATCH V7 1/2] mmc: core: HS200 mode support for eMMC 4.5

2011-12-21 Thread Girish K S
On 21 December 2011 12:04, Subhash Jadavani  wrote:
>
>
>> -Original Message-
>> From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
>> ow...@vger.kernel.org] On Behalf Of Girish K S
>> Sent: Wednesday, December 21, 2011 9:43 AM
>> To: linux-...@vger.kernel.org
>> Cc: patc...@linaro.org; linux-samsung-soc@vger.kernel.org; Girish K S;
>> Chris Ball
>> Subject: [PATCH V7 1/2] mmc: core: HS200 mode support for eMMC 4.5
>>
>> This patch adds the support of the HS200 bus speed for eMMC 4.5
>> devices.
>> The eMMC 4.5 devices have support for 200MHz bus speed. The function
>> prototype of the tuning function is modified to handle the tuning
>> command
>> number which is different in sd and mmc case.
>>
>> cc: Chris Ball 
>> Signed-off-by: Girish K S 
>> ---
>>  drivers/mmc/core/bus.c     |    3 +-
>>  drivers/mmc/core/debugfs.c |    3 +
>>  drivers/mmc/core/mmc.c     |  142
>> +---
>>  drivers/mmc/core/sd.c      |    3 +-
>>  drivers/mmc/core/sdio.c    |    4 +-
>>  include/linux/mmc/card.h   |    3 +
>>  include/linux/mmc/mmc.h    |   66 -
>
> Looks like you have missed to add change in "include/linux/mmc/host.h" in
> this patch.
yes
>
>
>
>>  7 files changed, 211 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
>> index f8a228a..5d011a3 100644
>> --- a/drivers/mmc/core/bus.c
>> +++ b/drivers/mmc/core/bus.c
>> @@ -303,10 +303,11 @@ int mmc_add_card(struct mmc_card *card)
>>                       mmc_card_ddr_mode(card) ? "DDR " : "",
>>                       type);
>>       } else {
>> -             printk(KERN_INFO "%s: new %s%s%s card at address %04x\n",
>> +             pr_info("%s: new %s%s%s%s card at address %04x\n",
>>                       mmc_hostname(card->host),
>>                       mmc_card_uhs(card) ? "ultra high speed " :
>>                       (mmc_card_highspeed(card) ? "high speed " : ""),
>> +                     (mmc_card_hs200(card) ? "HS200 " : ""),
>>                       mmc_card_ddr_mode(card) ? "DDR " : "",
>>                       type, card->rca);
>>       }
>> diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
>> index 027615d..9ab5b17 100644
>> --- a/drivers/mmc/core/debugfs.c
>> +++ b/drivers/mmc/core/debugfs.c
>> @@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void
>> *data)
>>       case MMC_TIMING_UHS_DDR50:
>>               str = "sd uhs DDR50";
>>               break;
>> +     case MMC_TIMING_MMC_HS200:
>> +             str = "mmc high-speed SDR200";
>> +             break;
>>       default:
>>               str = "invalid";
>>               break;
>> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
>> index f0a9f1f..4de3416 100644
>> --- a/drivers/mmc/core/mmc.c
>> +++ b/drivers/mmc/core/mmc.c
>> @@ -286,6 +286,27 @@ static int mmc_read_ext_csd(struct mmc_card *card,
>> u8 *ext_csd)
>>       }
>>       card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
>>       switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) {
>> +     case EXT_CSD_CARD_TYPE_SDR_ALL:
>> +     case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:
>> +     case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:
>> +     case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:
>> +             card->ext_csd.hs_max_dtr = 2;
>> +             card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;
>> +             break;
>> +     case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:
>> +     case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:
>> +     case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:
>> +     case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:
>> +             card->ext_csd.hs_max_dtr = 2;
>> +             card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;
>> +             break;
>> +     case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:
>> +     case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:
>> +     case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:
>> +     case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:
>> +             card->ext_csd.hs_max_dtr = 2;
>> +             card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;
>> +             break;
>>       case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
>>            EXT_CSD_CARD_TYPE_26:
>>               card->ext_csd.hs_max_dtr = 5200;
>> @@ -700,6 +721,58 @@ static int mmc_select_powerclass(struct mmc_card
>> *card,
>>  }
>>
>>  /*
>> + * Selects the desired buswidth and switch to the HS200 mode
>> + * if bus width set without error
>> + */
>> +static int mmc_select_hs200(struct mmc_card *card)
>> +{
>> +     int err = 0;
>> +     struct mmc_host *host;
>> +     u32 bus_width = MMC_BUS_WIDTH_4;
>> +
>> +     BUG_ON(!card);
>> +
>> +     host = card->host;
>> +
>> +     if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_SDR_1_2V)
>> +             && (host->caps2 & MMC_CAP2_HS200_1_2V_SDR))
>> +             err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120,
>> 0);
>> +
>> +     /*
>> +      * Host is capable of 8bit transfer, then switch
>> +

[PATCH] ARM: EXYNOS: Add USB OHCI support to ORIGEN board

2011-12-21 Thread Tushar Behera
Signed-off-by: Tushar Behera 
Signed-off-by: Angus Ainslie 
---

This patch are based Kukjin's for-next branch and OHCI related
patches from Jingoo Han.
[PATCH v2 0/3] Support Samsung Exynos OHCI device and driver

 arch/arm/mach-exynos/Kconfig   |1 +
 arch/arm/mach-exynos/mach-origen.c |   13 +
 2 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index bd1bb9f1..0da2ced 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -304,6 +304,7 @@ config MACH_ORIGEN
select SAMSUNG_DEV_PWM
select EXYNOS4_DEV_DMA
select EXYNOS4_DEV_PD
+   select EXYNOS4_DEV_USB_OHCI
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
diff --git a/arch/arm/mach-exynos/mach-origen.c 
b/arch/arm/mach-exynos/mach-origen.c
index f56d027..a0116036 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 
+#include 
 #include 
 
 /* Following are default values for UCON, ULCON and UFCON UART registers */
@@ -487,6 +488,16 @@ static void __init origen_ehci_init(void)
s5p_ehci_set_platdata(pdata);
 }
 
+/* USB OHCI */
+static struct exynos4_ohci_platdata origen_ohci_pdata;
+
+static void __init origen_ohci_init(void)
+{
+   struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
+
+   exynos4_ohci_set_platdata(pdata);
+}
+
 static struct gpio_keys_button origen_gpio_keys_table[] = {
{
.code   = KEY_MENU,
@@ -627,6 +638,7 @@ static struct platform_device *origen_devices[] __initdata 
= {
&s5p_device_mfc_l,
&s5p_device_mfc_r,
&s5p_device_mixer,
+   &exynos4_device_ohci,
&exynos4_device_pd[PD_LCD0],
&exynos4_device_pd[PD_TV],
&exynos4_device_pd[PD_G3D],
@@ -702,6 +714,7 @@ static void __init origen_machine_init(void)
s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
 
origen_ehci_init();
+   origen_ohci_init();
clk_xusbxti.rate = 2400;
 
s5p_tv_setup();
-- 
1.7.4.1

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Re: [PATCH V7 1/2] mmc: core: HS200 mode support for eMMC 4.5

2011-12-21 Thread Girish K S
On 21 December 2011 10:29, Philip Rakity  wrote:
>
> On Dec 20, 2011, at 8:12 PM, Girish K S wrote:
>
>> This patch adds the support of the HS200 bus speed for eMMC 4.5 devices.
>> The eMMC 4.5 devices have support for 200MHz bus speed. The function
>> prototype of the tuning function is modified to handle the tuning command
>> number which is different in sd and mmc case.
>>
>> cc: Chris Ball 
>> Signed-off-by: Girish K S 
>> ---
>> drivers/mmc/core/bus.c     |    3 +-
>> drivers/mmc/core/debugfs.c |    3 +
>> drivers/mmc/core/mmc.c     |  142 
>> +---
>> drivers/mmc/core/sd.c      |    3 +-
>> drivers/mmc/core/sdio.c    |    4 +-
>> include/linux/mmc/card.h   |    3 +
>> include/linux/mmc/mmc.h    |   66 -
>> 7 files changed, 211 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c
>> index f8a228a..5d011a3 100644
>> --- a/drivers/mmc/core/bus.c
>> +++ b/drivers/mmc/core/bus.c
>> @@ -303,10 +303,11 @@ int mmc_add_card(struct mmc_card *card)
>>                        mmc_card_ddr_mode(card) ? "DDR " : "",
>>                        type);
>>        } else {
>> -               printk(KERN_INFO "%s: new %s%s%s card at address %04x\n",
>> +               pr_info("%s: new %s%s%s%s card at address %04x\n",
>>                        mmc_hostname(card->host),
>>                        mmc_card_uhs(card) ? "ultra high speed " :
>>                        (mmc_card_highspeed(card) ? "high speed " : ""),
>> +                       (mmc_card_hs200(card) ? "HS200 " : ""),
>>                        mmc_card_ddr_mode(card) ? "DDR " : "",
>>                        type, card->rca);
>>        }
>> diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
>> index 027615d..9ab5b17 100644
>> --- a/drivers/mmc/core/debugfs.c
>> +++ b/drivers/mmc/core/debugfs.c
>> @@ -135,6 +135,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
>>        case MMC_TIMING_UHS_DDR50:
>>                str = "sd uhs DDR50";
>>                break;
>> +       case MMC_TIMING_MMC_HS200:
>> +               str = "mmc high-speed SDR200";
>> +               break;
>>        default:
>>                str = "invalid";
>>                break;
>> diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
>> index f0a9f1f..4de3416 100644
>> --- a/drivers/mmc/core/mmc.c
>> +++ b/drivers/mmc/core/mmc.c
>> @@ -286,6 +286,27 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 
>> *ext_csd)
>>        }
>>        card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
>>        switch (ext_csd[EXT_CSD_CARD_TYPE] & EXT_CSD_CARD_TYPE_MASK) {
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL:
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_8V:
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_1_2V:
>> +       case EXT_CSD_CARD_TYPE_SDR_ALL_DDR_52:
>> +               card->ext_csd.hs_max_dtr = 2;
>> +               card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_200;
>> +               break;
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_ALL:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_8V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_1_2V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_2V_DDR_52:
>> +               card->ext_csd.hs_max_dtr = 2;
>> +               card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_2V;
>> +               break;
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_ALL:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_8V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_1_2V:
>> +       case EXT_CSD_CARD_TYPE_SDR_1_8V_DDR_52:
>> +               card->ext_csd.hs_max_dtr = 2;
>> +               card->ext_csd.card_type = EXT_CSD_CARD_TYPE_SDR_1_8V;
>> +               break;
>>        case EXT_CSD_CARD_TYPE_DDR_52 | EXT_CSD_CARD_TYPE_52 |
>>             EXT_CSD_CARD_TYPE_26:
>>                card->ext_csd.hs_max_dtr = 5200;
>> @@ -700,6 +721,58 @@ static int mmc_select_powerclass(struct mmc_card *card,
>> }
>>
>> /*
>> + * Selects the desired buswidth and switch to the HS200 mode
>> + * if bus width set without error
>> + */
>> +static int mmc_select_hs200(struct mmc_card *card)
>> +{
>> +       int err = 0;
>> +       struct mmc_host *host;
>> +       u32 bus_width = MMC_BUS_WIDTH_4;
>> +
>> +       BUG_ON(!card);
>> +
>> +       host = card->host;
>> +
>> +       if ((card->ext_csd.card_type & EXT_CSD_CARD_TYPE_SDR_1_2V)
>> +               && (host->caps2 & MMC_CAP2_HS200_1_2V_SDR))
>> +               err = mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120, 
>> 0);
>
> if 1.2 volt is not supported should one try 1.8v signaling ?
>
>> +
>> +       /*
>> +        * Host is capable of 8bit transfer, then switch
>> +        * the device to work in 8bit transfer mode. If the
>> +        * mmc switch command returns error then switch to
>> +        * 4bit transfer mode. On success set the corresponding
>> +        * bus width on the host.
>> +        */
>> +       if (!err && host->caps & MMC_CAP_8_BIT_DAT

Re: [PATCH v2 0/4] Implement RTC support for S3C2443/S3C2416/S3C2450

2011-12-21 Thread Heiko Stübner
Am Mittwoch, 21. Dezember 2011, 08:25:53 schrieb Kukjin Kim:
> Heiko Stübner wrote:
> > Similar to the ADC the RTC of S3C2443 and S3C2416/2450 has some slight
> > variances when compared to the existing types.
> > 
> > This series adds support for those SoCs.
> > 
> > As with the ADC patches, these changes where tested on S3C2416 hardware.
> > The S3C2443 quirks are a subset of those and are done according to the
> > datasheet, but not tested on real hardware (as I do not own a S3C2443
> > device).
> > 
> > changes since v1:
> > address comments from Thomas Abraham, reducing number of ifdefs and
> > duplicate code
> > 
> > Heiko Stuebner (4):
> >   ARM: SAMSUNG: cleanup of rtc register definitions
> >   rtc-s3c: make room for more variants in devicetree block
> >   rtc-s3c: add variants for S3C2443 and S3C2416
> >   ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices
> >  
> >  arch/arm/mach-s3c2416/s3c2416.c   |2 +
> >  arch/arm/mach-s3c2443/s3c2443.c   |2 +
> >  arch/arm/plat-samsung/include/plat/regs-rtc.h |   92
> 
> +++--
> 
> > ---
> > 
> >  arch/arm/plat-samsung/include/plat/rtc-core.h |   27 +++
> >  drivers/rtc/rtc-s3c.c |   74
> >   5 files changed, 149 insertions(+), 48
> >  deletions(-)
> >  create mode 100644 arch/arm/plat-samsung/include/plat/rtc-core.h
> > 
> > --
> > 1.7.5.4
> 
> Hi Heiko,
> 
> There were small comments on 1st patch and others looks ok to me.
> If you're ok on my comments, please re-send it so that I can request to
> pull this series to Alessandro or Andrew with my ack.

I'm on it now. 

Who is Andrew and should I include him in the recipients? I only found 
Alessandro Zummo in the MAINTAINERS file for rtc stuff and am lacking any 
comment from the rtc-side until now.

Heiko
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