Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . + of_pci_range_to_resource(range, np, pp-cfg); + pp-config.cfg0_size = resource_size(pp-cfg)/2; + pp-config.cfg1_size = resource_size(pp-cfg)/2; + } + } + + pp-dbi_base = devm_ioremap(pp-dev, pp-cfg.start, + resource_size(pp-cfg)); Why is configuraion space divided into two? Sorry, I don't know the exact reason. :( Pratyush Anand may know about this. Pratyush Anand, could you answer the question? Also, if you find some problems, please let me know. One more query.. Where is inbound translation configuration done in your driver? how should it be done? Hi Kishon, Sorry, I cannot understand your question exactly. However, the following thread would be helpful. http://www.spinics.net/lists/arm-kernel/msg252078.html https://lkml.org/lkml/2013/6/17/890 Best regards. Jingoo Han -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] ARM: dts: Fix a typo on Exynos5440 DTS files
This patch removes '_' from early_prink on Exynos5440 DTS files
in according to kernel-parameters document.
Signed-off-by: Youngmin Nam youngmin@samsung.com
---
arch/arm/boot/dts/exynos5440-sd5v1.dts|2 +-
arch/arm/boot/dts/exynos5440-ssdk5440.dts |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts
b/arch/arm/boot/dts/exynos5440-sd5v1.dts
index 5b22508..777fb1c 100644
--- a/arch/arm/boot/dts/exynos5440-sd5v1.dts
+++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts
@@ -17,7 +17,7 @@
compatible = samsung,sd5v1, samsung,exynos5440;
chosen {
- bootargs = root=/dev/sda2 rw rootwait ignore_loglevel
early_printk no_console_suspend mem=2048M@0x8000 mem=6144M@0x1
console=ttySAC0,115200;
+ bootargs = root=/dev/sda2 rw rootwait ignore_loglevel
earlyprintk no_console_suspend mem=2048M@0x8000 mem=6144M@0x1
console=ttySAC0,115200;
};
fixed-rate-clocks {
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index ede7727..a7cb848 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -17,7 +17,7 @@
compatible = samsung,ssdk5440, samsung,exynos5440;
chosen {
- bootargs = root=/dev/sda2 rw rootwait ignore_loglevel
early_printk no_console_suspend mem=2048M@0x8000 mem=6144M@0x1
console=ttySAC0,115200;
+ bootargs = root=/dev/sda2 rw rootwait ignore_loglevel
earlyprintk no_console_suspend mem=2048M@0x8000 mem=6144M@0x1
console=ttySAC0,115200;
};
spi_0: spi@D {
--
1.7.10.4
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Re: [PATCH] ARM: dts: Fix a typo on Exynos5440 DTS files
On 12 September 2013 13:37, Youngmin Nam youngmin@samsung.com wrote: This patch removes '_' from early_prink on Exynos5440 DTS files in according to kernel-parameters document. Signed-off-by: Youngmin Nam youngmin@samsung.com Good catch. Reviewed-by: Sachin Kamat sachin.ka...@linaro.org -- With warm regards, Sachin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: dts: Fix a typo on Exynos5440 DTS files
On Thursday, September 12, 2013 5:15 PM, Sachin Kamat sachin.ka...@linaro.org wrote: On 12 September 2013 13:37, Youngmin Nam youngmin@samsung.com wrote: This patch removes '_' from early_prink on Exynos5440 DTS files in according to kernel-parameters document. Signed-off-by: Youngmin Nam youngmin@samsung.com Good catch. Reviewed-by: Sachin Kamat sachin.ka...@linaro.org I've tested it on Exynos5440. It works fine. Tested-by: Jungseok Lee jays@samsung.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
Hi, On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: Hi Jingoo, On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote: On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . + of_pci_range_to_resource(range, np, pp-cfg); + pp-config.cfg0_size = resource_size(pp-cfg)/2; + pp-config.cfg1_size = resource_size(pp-cfg)/2; + } + } + + pp-dbi_base = devm_ioremap(pp-dev, pp-cfg.start, + resource_size(pp-cfg)); Why is configuraion space divided into two? Sorry, I don't know the exact reason. :( Pratyush Anand may know about this. Pratyush Anand, could you answer the question? Also, if you find some problems, please let me know. One more query.. Where is inbound translation configuration done in your driver? how should it be done? Yes, Kishon is right. Inbound translation configuration is missing in your code and I think it should be implemented. Hi Kishon, Sorry, I cannot understand your question exactly. However, the following thread would be helpful. http://www.spinics.net/lists/arm-kernel/msg252078.html https://lkml.org/lkml/2013/6/17/890 From this conversation, It seems that you have tested this driver and it works fine without inbound translation function. I am sure that you would have tested a PCIe card with DMA capability such as PCIe2USB or PCIe2Ethernet. Since it worked, it means that by default your controller is supporting one to one mapping in case of inbound transaction even when address translation is enabled. btw, I'm testing Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller. when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
Hi Jingoo,
On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote:
On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote:
.
.
+ of_pci_range_to_resource(range, np, pp-cfg);
+ pp-config.cfg0_size =
resource_size(pp-cfg)/2;
+ pp-config.cfg1_size =
resource_size(pp-cfg)/2;
+ }
+ }
+
+ pp-dbi_base = devm_ioremap(pp-dev, pp-cfg.start,
+ resource_size(pp-cfg));
Why is configuraion space divided into two?
Sorry, I don't know the exact reason. :(
Pratyush Anand may know about this.
Pratyush Anand, could you answer the question?
Also, if you find some problems, please let me know.
One more query..
Where is inbound translation configuration done in your driver? how should
it
be done?
Yes, Kishon is right. Inbound translation configuration is missing in
your code and I think it should be implemented.
Hi Kishon,
Sorry, I cannot understand your question exactly.
However, the following thread would be helpful.
http://www.spinics.net/lists/arm-kernel/msg252078.html
https://lkml.org/lkml/2013/6/17/890
From this conversation, It seems that you
have tested this driver and it works fine without inbound translation
function. I am sure that you would have tested a PCIe card with DMA
capability such as PCIe2USB or PCIe2Ethernet. Since it worked, it
means that by default your controller is supporting one to one mapping
in case of inbound transaction even when address translation is enabled.
In my opinion you should call a function like as follows from
dw_pcie_host_init in pcie-designware.c. It will insure one to one
mapping for any inbound request in memory range 0 to (in_mem_size -
1) for all dw implementation.
static void dw_pcie_prog_viewport_mem_inbound(struct pcie_port *pp)
{
u32 val;
void __iomem *dbi_base = pp-dbi_base;
/* Program viewport 0 : INBOUND : MEMORY*/
val = PCIE_ATU_REGION_INBOUND | (0 0xF);
dw_pcie_writel_rc(pp, val, dbi_base + PCIE_ATU_VIEWPORT));
dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, dbi_base + PCIE_ATU_CR1));
val = PCIE_ATU_ENABLE | PCIE_ATU_BAR_MODE_ENABLE;
dw_pcie_writel_rc(pp, val, dbi_base + PCIE_ATU_CR2));
dw_pcie_writel_rc(pp, 0, dbi_base + PCIE_ATU_LOWER_BASE));
dw_pcie_writel_rc(pp, 0, dbi_base + PCIE_ATU_UPPER_BASE));
/* in_mem_size must be in power of 2 */
dw_pcie_writel_rc(pp, pp-config.in_mem_size - 1, dbi_base +
PCIE_ATU_LIMIT));
dw_pcie_writel_rc(pp, 0, dbi_base + PCIE_ATU_LOWER_TARGET));
dw_pcie_writel_rc(pp, 0, dbi_base + PCIE_ATU_UPPER_TARGET));
}
Regards
Pratyush
Best regards.
Jingoo Han
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Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
Hi Kishon, On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: Hi Jingoo, On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote: On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . +of_pci_range_to_resource(range, np, pp-cfg); +pp-config.cfg0_size = resource_size(pp-cfg)/2; +pp-config.cfg1_size = resource_size(pp-cfg)/2; +} +} + +pp-dbi_base = devm_ioremap(pp-dev, pp-cfg.start, +resource_size(pp-cfg)); Why is configuraion space divided into two? Sorry, I don't know the exact reason. :( Pratyush Anand may know about this. Pratyush Anand, could you answer the question? Also, if you find some problems, please let me know. One more query.. Where is inbound translation configuration done in your driver? how should it be done? Yes, Kishon is right. Inbound translation configuration is missing in your code and I think it should be implemented. Hi Kishon, Sorry, I cannot understand your question exactly. However, the following thread would be helpful. http://www.spinics.net/lists/arm-kernel/msg252078.html https://lkml.org/lkml/2013/6/17/890 From this conversation, It seems that you have tested this driver and it works fine without inbound translation function. I am sure that you would have tested a PCIe card with DMA capability such as PCIe2USB or PCIe2Ethernet. Since it worked, it means that by default your controller is supporting one to one mapping in case of inbound transaction even when address translation is enabled. btw, I'm testing Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller. when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? A PCIe analyser log would tell a definite cause. Most likely either inbound translation is not working or INTx/MSI is not working. Regards Pratyush Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
Hi, On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote: Hi Kishon, On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: Hi Jingoo, On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote: On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . +of_pci_range_to_resource(range, np, pp-cfg); +pp-config.cfg0_size = resource_size(pp-cfg)/2; +pp-config.cfg1_size = resource_size(pp-cfg)/2; +} +} + +pp-dbi_base = devm_ioremap(pp-dev, pp-cfg.start, +resource_size(pp-cfg)); Why is configuraion space divided into two? Sorry, I don't know the exact reason. :( Pratyush Anand may know about this. Pratyush Anand, could you answer the question? Also, if you find some problems, please let me know. One more query.. Where is inbound translation configuration done in your driver? how should it be done? Yes, Kishon is right. Inbound translation configuration is missing in your code and I think it should be implemented. Hi Kishon, Sorry, I cannot understand your question exactly. However, the following thread would be helpful. http://www.spinics.net/lists/arm-kernel/msg252078.html https://lkml.org/lkml/2013/6/17/890 From this conversation, It seems that you have tested this driver and it works fine without inbound translation function. I am sure that you would have tested a PCIe card with DMA capability such as PCIe2USB or PCIe2Ethernet. Since it worked, it means that by default your controller is supporting one to one mapping in case of inbound transaction even when address translation is enabled. btw, I'm testing Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller. when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? A PCIe analyser log would tell a definite cause. Most likely either inbound translation is not working or INTx/MSI is not working. I have enabled only legacy interrupts. Whenever I connect or disconnect ethernet cable I get link up/link down message and also the interrupt count for eth0 increases. So I'm not doubting INTx interrupts as such. btw configuring inbound translation once in dw_pcie_host_init enough is it? I mean we use the same registers for configuring outbound translation also no? So doesn't the inbound configuration gets lost? Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote: Hi Kishon, On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: Hi Jingoo, On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote: On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . [...] when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? A PCIe analyser log would tell a definite cause. Most likely either inbound translation is not working or INTx/MSI is not working. I have enabled only legacy interrupts. Whenever I connect or disconnect ethernet cable I get link up/link down message and also the interrupt count for eth0 increases. So I'm not doubting INTx interrupts as such. btw configuring inbound translation once in dw_pcie_host_init enough is it? I mean we use the same registers for configuring outbound translation also no? So doesn't the inbound configuration gets lost? No, you write at the same register, but you program direction as inbound. There are different resources for each viewport in inbound and outbound direction. Regards Pratyush Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: dts: Fix a typo on Exynos5440 DTS files
Jungseok Lee wrote: On Thursday, September 12, 2013 5:15 PM, Sachin Kamat sachin.ka...@linaro.org wrote: On 12 September 2013 13:37, Youngmin Nam youngmin@samsung.com wrote: This patch removes '_' from early_prink on Exynos5440 DTS files in according to kernel-parameters document. Signed-off-by: Youngmin Nam youngmin@samsung.com Good catch. Reviewed-by: Sachin Kamat sachin.ka...@linaro.org I've tested it on Exynos5440. It works fine. Tested-by: Jungseok Lee jays@samsung.com Thanks, you guys. Will apply. - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] ARM: dts: Correct typo in use of samsung,pin-drv for exynos5250
Jingoo Han wrote:
On Saturday, September 07, 2013 5:10 AM, Al Stone wrote:
From: Al Stone a...@redhat.com
Corrects an obvious typo in the Arndale pinctrl descriptions in DT.
The samsung-pinctrl driver uses the correct name.
Signed-off-by: Al Stone al.st...@linaro.org
CC'ed Kukjin Kim (Samsung-SoC Maintainer)
Thanks, Jingoo.
It looks good.
Reviewed-by: Jingoo Han jg1@samsung.com
Best regards,
Jingoo Han
Sigh, maybe we missed the typo :(
Will apply, but I'm not sure we need to send this to the stable. Let me
check.
Thanks,
Kukjin
---
arch/arm/boot/dts/exynos5250-pinctrl.dtsi | 44 +++-
---
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
index 656e381..031e198 100644
--- a/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos5250-pinctrl.dtsi
@@ -210,21 +210,21 @@
samsung,pins = gpa0-2, gpa0-3;
samsung,pin-function = 2;
samsung,pin-pud = 0;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
i2c2_bus: i2c2-bus {
samsung,pins = gpa0-6, gpa0-7;
samsung,pin-function = 3;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
i2c2_hs_bus: i2c2-hs-bus {
samsung,pins = gpa0-6, gpa0-7;
samsung,pin-function = 4;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
uart2_data: uart2-data {
@@ -238,21 +238,21 @@
samsung,pins = gpa1-2, gpa1-3;
samsung,pin-function = 2;
samsung,pin-pud = 0;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
i2c3_bus: i2c3-bus {
samsung,pins = gpa1-2, gpa1-3;
samsung,pin-function = 3;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
i2c3_hs_bus: i2c3-hs-bus {
samsung,pins = gpa1-2, gpa1-3;
samsung,pin-function = 4;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
uart3_data: uart3-data {
@@ -273,14 +273,14 @@
samsung,pins = gpa2-0, gpa2-1;
samsung,pin-function = 3;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
i2c5_bus: i2c5-bus {
samsung,pins = gpa2-2, gpa2-3;
samsung,pin-function = 3;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
spi1_bus: spi1-bus {
@@ -376,14 +376,14 @@
samsung,pins = gpb3-0, gpb3-1;
samsung,pin-function = 4;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
i2c1_hs_bus: i2c1-hs-bus {
samsung,pins = gpb3-2, gpb3-3;
samsung,pin-function = 4;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
sd0_clk: sd0-clk {
@@ -551,14 +551,14 @@
samsung,pins = gpd0-2, gpd0-3;
samsung,pin-function = 2;
samsung,pin-pud = 0;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
dp_hpd: dp_hpd {
samsung,pins = gpx0-7;
samsung,pin-function = 3;
samsung,pin-pud = 0;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
};
@@ -650,42 +650,42 @@
gpf1-0, gpf1-1, gpf1-2,
gpf1-3;
samsung,pin-function = 3;
samsung,pin-pud = 0;
- samaung,pin-drv = 0;
+ samsung,pin-drv = 0;
};
cam_i2c2_bus: cam-i2c2-bus {
samsung,pins = gpe0-6, gpe1-0;
samsung,pin-function = 4;
samsung,pin-pud = 3;
- samaung,pin-drv = 0;
+
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
On Thursday, September 12, 2013 6:44 PM, Kishon Vijay Abraham I wrote: On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: From this conversation, It seems that you have tested this driver and it works fine without inbound translation function. I am sure that you would have tested a PCIe card with DMA capability such as PCIe2USB or PCIe2Ethernet. Since it worked, it means that by default your controller is supporting one to one mapping in case of inbound transaction even when address translation is enabled. btw, I'm testing Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller. when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? Hi Kishon, I have tested Ethernet controller: Intel Corporation 82574L PCI Express Gigabit Ethernet controller. Without inbound translation, it works properly with both legacy interrupt mode and MSI mode. Best regards, Jingoo Han -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 5/7] ARM: dts: Update DP controller DT Node for Exynos5 based SoCs
Vikas Sajjan wrote:
Hi Mr. Jingoo Han,
On 26 August 2013 08:27, Jingoo Han jg1@samsung.com wrote:
On Tuesday, July 30, 2013 8:20 PM, Vikas Sajjan wrote:
Moves the properties of DP controller to exynos5.dtsi which are common
across exynos5 SoCs like Exynos5250 and Exynos5420.
The PHY DP Node is based on Jingoo Han's jg1@samsung.com patch at
https://patchwork.linuxtv.org/patch/19189/
Signed-off-by: Vikas Sajjan vikas.saj...@linaro.org
---
arch/arm/boot/dts/exynos5.dtsi| 11 +++
arch/arm/boot/dts/exynos5250-arndale.dts |3 ++-
arch/arm/boot/dts/exynos5250-smdk5250.dts |3 ++-
arch/arm/boot/dts/exynos5250.dtsi | 21 +
4 files changed, 24 insertions(+), 14 deletions(-)
[]
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 238bdb2..1c017dc 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -614,20 +614,17 @@
interrupts = 0 94 0;
};
- dp-controller {
- compatible = samsung,exynos5-dp;
- reg = 0x145b 0x1000;
- interrupts = 10 3;
- interrupt-parent = combiner;
+ dp_phy: video-phy@10040720 {
+ compatible = samsung,exynos5250-dp-video-phy;
+ reg = 0x10040720 4;
+ #phy-cells = 0;
+ };
Oops!!!
This patch should be reverted.
Or, fix patch should be re-sent.
'dp phy' driver is not yet merged to mainline kernel.
As you suggest, since the DP-PHY driver is NOT yet in mainline, we may
have to keep this patch reverted till your patch series gets merged to
have DP working on exynos5 .
OK, got it. Please send patch fixing this issue for v3.12. Of course, we
need this from v3.13 which will be including the DP-PHY driver.
Thanks,
Kukjin
+
+ dp-controller@145b {
clocks = clock 342;
clock-names = dp;
- #address-cells = 1;
- #size-cells = 0;
-
- dptx-phy {
- reg = 0x10040720;
- samsung,enable-mask = 1;
- };
+ phys = dp_phy;
+ phy-names = dp;
};
Thus, 'dptx-phy' node should be used until dp phy driver is merged.
Vikas Sajjan,
Please test your patch on real boards when you send your patch.
I tested the patch before sending on Exynos5250-SMDK5250 using Kishon
Vijay Abraham's series at http://lwn.net/Articles/559487/
which contains DP-PHY driver posted by you
1. phy: Add driver for Exynos DP PHY
2. video: exynos_dp: remove non-DT support for Exynos Display Port
3. video: exynos_dp: Use the generic PHY driver
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[PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
From: Mark Brown broo...@linaro.org
Ensure that unused I2C controllers are not activated, causing problems due
to inappropriate pinmuxing or similar, by marking the controllers as
disabled by default and requiring boards to explicitly enable those that
are in use.
Signed-off-by: Mark Brown broo...@linaro.org
---
arch/arm/boot/dts/exynos5250-arndale.dts | 31 ++-
arch/arm/boot/dts/exynos5250-smdk5250.dts | 25 +
arch/arm/boot/dts/exynos5250-snow.dts | 4
arch/arm/boot/dts/exynos5250.dtsi | 10 ++
4 files changed, 21 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index 4687fa0..4c10901 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -31,6 +31,7 @@
};
i2c@12C6 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
samsung,i2c-slave-addr = 0x66;
@@ -319,16 +320,8 @@
};
};
- i2c@12C7 {
- status = disabled;
- };
-
- i2c@12C8 {
- status = disabled;
- };
-
i2c@12C9 {
- wm1811a@1a {
+ status = okay;
compatible = wlf,wm1811;
reg = 0x1a;
@@ -346,26 +339,6 @@
};
};
- i2c@12CA {
- status = disabled;
- };
-
- i2c@12CB {
- status = disabled;
- };
-
- i2c@12CC {
- status = disabled;
- };
-
- i2c@12CD {
- status = disabled;
- };
-
- i2c@121D {
- status = disabled;
- };
-
dwmmc_0: dwmmc0@1220 {
num-slots = 1;
supports-highspeed;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 67d3c43..90127e3 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -28,6 +28,7 @@
};
i2c@12C6 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
@@ -62,6 +63,7 @@
};
i2c@12C7 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
@@ -86,6 +88,7 @@
};
i2c@121D {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 4;
samsung,i2c-slave-addr = 0x38;
@@ -101,6 +104,7 @@
};
i2c@12C8 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 66000;
@@ -110,27 +114,8 @@
};
};
- i2c@12C9 {
- status = disabled;
- };
-
- i2c@12CA {
- status = disabled;
- };
-
- i2c@12CB {
- status = disabled;
- };
-
- i2c@12CC {
- status = disabled;
- };
-
- i2c@12CD {
- status = disabled;
- };
-
i2c@12CE {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 66000;
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts
index fd711e2..b7674d5 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -48,6 +48,10 @@
};
};
+ i2c@12CA {
+ status = okay;
+ };
+
i2c-arbitrator {
compatible = i2c-arb-gpio-challenge;
#address-cells = 1;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index a886ee4..4d6312e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -229,6 +229,7 @@
i2c_0: i2c@12C6 {
compatible = samsung,s3c2440-i2c;
+ status = disabled;
reg = 0x12C6 0x100;
interrupts = 0 56 0;
#address-cells = 1;
@@ -241,6 +242,7 @@
i2c_1: i2c@12C7 {
compatible = samsung,s3c2440-i2c;
+ status = disabled;
reg = 0x12C7 0x100;
interrupts = 0 57 0;
#address-cells = 1;
@@ -253,6 +255,7 @@
i2c_2: i2c@12C8 {
compatible = samsung,s3c2440-i2c;
+ status = disabled;
reg = 0x12C8 0x100;
interrupts = 0 58 0;
#address-cells = 1;
@@ -265,6 +268,7 @@
i2c_3: i2c@12C9 {
compatible =
[PATCH 1/3] ARM: dts: Disable Exynos5250 I2S controllers by default
From: Mark Brown broo...@linaro.org
Rather than requiring each board to explicitly disable the I2S controllers
it is not using instead require boards to enable those that they are using.
This is required for audio operation on Arndale, one of the unused I2S
controllers is pinmuxed with the LDO enable GPIOs for the WM1811A.
Signed-off-by: Mark Brown broo...@linaro.org
Acked-by: Mark Rutland mark.rutl...@arm.com
---
arch/arm/boot/dts/exynos5250-arndale.dts | 4
arch/arm/boot/dts/exynos5250-smdk5250.dts | 8
arch/arm/boot/dts/exynos5250.dtsi | 3 +++
3 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts
index cee55fa..4687fa0 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -412,6 +412,10 @@
status = disabled;
};
+ i2s0: i2s@0383 {
+ status = okay;
+ };
+
spi_0: spi@12d2 {
status = disabled;
};
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 2538b32..f86d567 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -231,14 +231,6 @@
status = okay;
};
- i2s1: i2s@12D6 {
- status = disabled;
- };
-
- i2s2: i2s@12D7 {
- status = disabled;
- };
-
sound {
compatible = samsung,smdk-wm8994;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index 7d7cc77..c863113 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -417,6 +417,7 @@
i2s0: i2s@0383 {
compatible = samsung,s5pv210-i2s;
+ status = disabled;
reg = 0x0383 0x100;
dmas = pdma0 10
pdma0 9
@@ -433,6 +434,7 @@
i2s1: i2s@12D6 {
compatible = samsung,s3c6410-i2s;
+ status = disabled;
reg = 0x12D6 0x100;
dmas = pdma1 12
pdma1 11;
@@ -445,6 +447,7 @@
i2s2: i2s@12D7 {
compatible = samsung,s3c6410-i2s;
+ status = disabled;
reg = 0x12D7 0x100;
dmas = pdma0 12
pdma0 11;
--
1.8.4.rc3
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[PATCH 2/3] ARM: dts: Leave Exynos5250 SPI controller disabled by default
From: Mark Brown broo...@linaro.org
Rather than requiring each board to explicitly disable the SPI controllers
it is not using instead require boards to enable those that they are using.
This is less work overall since normally at most one of the controllers is
in use and avoids issues caused by inappropriate pinmuxing.
Signed-off-by: Mark Brown broo...@linaro.org
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 10 ++
arch/arm/boot/dts/exynos5250.dtsi | 3 +++
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index f86d567..67d3c43 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -184,11 +184,9 @@
status = disabled;
};
- spi_0: spi@12d2 {
- status = disabled;
- };
-
spi_1: spi@12d3 {
+ status = okay;
+
w25q80bw@0 {
#address-cells = 1;
#size-cells = 1;
@@ -214,10 +212,6 @@
};
};
- spi_2: spi@12d4 {
- status = disabled;
- };
-
hdmi {
hpd-gpio = gpx3 7 0;
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi
index c863113..a886ee4 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -344,6 +344,7 @@
spi_0: spi@12d2 {
compatible = samsung,exynos4210-spi;
+ status = disabled;
reg = 0x12d2 0x100;
interrupts = 0 66 0;
dmas = pdma0 5
@@ -359,6 +360,7 @@
spi_1: spi@12d3 {
compatible = samsung,exynos4210-spi;
+ status = disabled;
reg = 0x12d3 0x100;
interrupts = 0 67 0;
dmas = pdma1 5
@@ -374,6 +376,7 @@
spi_2: spi@12d4 {
compatible = samsung,exynos4210-spi;
+ status = disabled;
reg = 0x12d4 0x100;
interrupts = 0 68 0;
dmas = pdma0 7
--
1.8.4.rc3
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RE: [PATCH] ARM: dts: Disable Exynos5250 I2S controllers by default
Mark Brown wrote: On Tue, Sep 10, 2013 at 06:35:48PM +0100, Mark Rutland wrote: It seems far more sensible to me to mark devices disabled by default in shared dtsi files and then okay them as needed in particular dts files. I'd be happy with more of this. Yeah, me too - though only for devices that have an external impact, for things that are internal only (eg, a crypto engine) it makes sense to enable them by default since they should normally be usable regardless of the system configuration. (+ DT ML) Makes sense but I need to get the opinions from DT guys... - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
On Thu, Sep 12, 2013 at 03:48:03PM +0530, Pratyush Anand wrote: On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote: Hi Kishon, On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: Hi Jingoo, On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote: On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . [...] when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? A PCIe analyser log would tell a definite cause. Most likely either inbound translation is not working or INTx/MSI is not working. I have enabled only legacy interrupts. Whenever I connect or disconnect ethernet cable I get link up/link down message and also the interrupt count for eth0 increases. So I'm not doubting INTx interrupts as such. Just a question, what is the MRRS of your RC? if it is 128, can you try with passing pci=pcie_bus_peer2peer in your bootargs. Again, analyser will help a lot in diagnosing such issues. Regards Pratyush btw configuring inbound translation once in dw_pcie_host_init enough is it? I mean we use the same registers for configuring outbound translation also no? So doesn't the inbound configuration gets lost? No, you write at the same register, but you program direction as inbound. There are different resources for each viewport in inbound and outbound direction. Regards Pratyush Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v2 00/12] clk/exynos convert clock IDs to macros
Tomasz Figa wrote: Hi Andrzej, On Friday 06 of September 2013 12:12:29 Andrzej Hajda wrote: Hi, This patch set adds headers with defines of exynos clocks. Then it converts dts files and drivers to use macros instead of magic numbers/enums to describe clock bindings. The patch set is based on the latest mturquette/clk-next branch. The patches are generated by script. I have verified random clocks by hand. I have also tested it on exynos4 based board. This is the 2nd version of the patchset. Changes: - corrected devicetree mailing list, - added comments to include/dt-bindings/clock/exynos4.h for clocks present only in particular chip, - added tab alignement in headers, - added comment to CLK_NR_CLKS, - added copyright headers, - split long lines in dts, - corrected example in bindings/clock/exynos5250-clock.txt, to point appropriate clocks. Regards Andrzej Andrzej Hajda (12): ARM: exynos4: create a DT header defining CLK IDs ARM: dts: exynos4: convert magic numbers to macros in clock bindings clk: exynos4: replace clock ID private enums with IDs from DT header ARM: exynos5250: create a DT header defining CLK IDs ARM: dts: exynos5250: convert magic numbers to macros in clock bindings clk: exynos5250: replace clock ID private enums with IDs from DT header ARM: exynos5420: create a DT header defining CLK IDs ARM: dts: exynos5420: convert magic numbers to macros in clock bindings clk: exynos5420: replace clock ID private enums with IDs from DT header ARM: exynos5440: create a DT header defining CLK IDs ARM: dts: exynos5440: convert magic numbers to macros in clock bindings clk: exynos5440: replace clock ID private enums with IDs from DT header .../devicetree/bindings/clock/exynos4-clock.txt| 259 +-- .../devicetree/bindings/clock/exynos5250-clock.txt | 160 +--- .../devicetree/bindings/clock/exynos5420-clock.txt | 184 + .../devicetree/bindings/clock/exynos5440-clock.txt | 45 +- arch/arm/boot/dts/exynos4.dtsi | 55 +- arch/arm/boot/dts/exynos4210.dtsi | 6 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos4x12.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 92 +-- arch/arm/boot/dts/exynos5420.dtsi | 13 +- arch/arm/boot/dts/exynos5440.dtsi | 27 +- drivers/clk/samsung/clk-exynos4.c | 857 ++--- drivers/clk/samsung/clk-exynos5250.c | 501 ++-- drivers/clk/samsung/clk-exynos5420.c | 648 drivers/clk/samsung/clk-exynos5440.c | 81 +- include/dt-bindings/clock/exynos4.h| 244 ++ include/dt-bindings/clock/exynos5250.h | 157 include/dt-bindings/clock/exynos5420.h | 188 + include/dt-bindings/clock/exynos5440.h | 42 + 19 files changed, 1734 insertions(+), 1829 deletions(-) create mode 100644 include/dt-bindings/clock/exynos4.h create mode 100644 include/dt-bindings/clock/exynos5250.h create mode 100644 include/dt-bindings/clock/exynos5420.h create mode 100644 include/dt-bindings/clock/exynos5440.h I believe this series should be rebased on top of my series (and possibly remaining patches touching clock numbers queued on the list): [PATCH v2 00/16] Exynos clock clean-up for 3.12 http://thread.gmane.org/gmane.linux.kernel.samsung-soc/22514 Otherwise, it's really nice to finally see this being cleaned up, so: Acked-by: Tomasz Figa t.f...@samsung.com Well...I'm not sure changing to use macro is better or not at this moment... - Kukjin -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 5/7] ARM: dts: Update DP controller DT Node for Exynos5 based SoCs
On Thursday, September 12, 2013 7:37 PM, Kukjin Kim wrote: Vikas Sajjan wrote: Hi Mr. Jingoo Han, On 26 August 2013 08:27, Jingoo Han jg1@samsung.com wrote: [.] Oops!!! This patch should be reverted. Or, fix patch should be re-sent. 'dp phy' driver is not yet merged to mainline kernel. As you suggest, since the DP-PHY driver is NOT yet in mainline, we may have to keep this patch reverted till your patch series gets merged to have DP working on exynos5 . OK, got it. Please send patch fixing this issue for v3.12. Of course, we need this from v3.13 which will be including the DP-PHY driver. I already sent the patch fixing this. ([PATCH V2] ARM: dts: Remove DP PHY node from exynos5250.dtsi) Please refer to the following. :-) http://www.spinics.net/lists/linux-samsung-soc/msg22023.html Best regards, Jingoo Han -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH v4 2/4] dmaengine: add driver for Samsung s3c24xx SoCs
Heiko Stübner wrote: This adds a new driver to support the s3c24xx dma using the dmaengine and makes the old one in mach-s3c24xx obsolete in the long run. Conceptually the s3c24xx-dma feels like a distant relative of the pl08x with numerous virtual channels being mapped to a lot less physical ones. The driver therefore borrows a lot from the amba-pl08x driver in this regard. Functionality-wise the driver gains a memcpy ability in addition to the slave_sg one. The driver supports both the method for requesting the peripheral used by SoCs before the S3C2443 and the different method for S3C2443 and later. On earlier SoCs the hardware channels usable for specific peripherals is constrainted while on later SoCs all channels can be used for any peripheral. Tested on a s3c2416-based board, memcpy using the dmatest module and slave_sg partially using the spi-s3c64xx driver. Signed-off-by: Heiko Stuebner he...@sntech.de Acked-by: Linus Walleij linus.wall...@linaro.org Vinod, can we get your feedback on this? If you're OK, I'd like to apply this whole series into Samsung tree. Thanks, Kukjin --- changes since v3: - address comments from Tomasz Figa: - fixed a lot of nitpics - and added a rudimentary mechanism to select higher bus-widths for memcpy - address more comments from Vinod Koul - reorder dma_control contents changes since v2: - add missing channel validation in s3c24xx_dma_phy_free when repurposing a physical channel for another virtual channel - address comments from Vinod Koul: - fix naming of constants to prevent conflicts - better handle the unlikely case of an interrupt happening on an unused channel changes since v1: - address comments from Linus Walleij - support sg-lists with more than 1 element - add support for earlier s3c24xx SoCs - redo the channeldata definitions: - no need for static ids for the virtual channels - provide a way to encode constraints for earlier variants - better base for later dt bindings drivers/dma/Kconfig | 12 + drivers/dma/Makefile |1 + drivers/dma/s3c24xx-dma.c | 1340 + include/linux/platform_data/dma-s3c24xx.h | 43 + 4 files changed, 1396 insertions(+) create mode 100644 drivers/dma/s3c24xx-dma.c create mode 100644 include/linux/platform_data/dma-s3c24xx.h diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 526ec77..d639115 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -154,6 +154,18 @@ config TEGRA20_APB_DMA This DMA controller transfers data from memory to peripheral fifo or vice versa. It does not support memory to memory data transfer. +config S3C24XX_DMAC + tristate Samsung S3C24XX DMA support + depends on ARCH_S3C24XX !S3C24XX_DMA + select DMA_ENGINE + select DMA_VIRTUAL_CHANNELS + help + Support for the Samsung S3C24XX DMA controller driver. The + DMA controller is having multiple DMA channels which can be + configured for different peripherals like audio, UART, SPI. + The DMA controller can transfer data from memory to peripheral, + periphal to memory, periphal to periphal and memory to memory. + source drivers/dma/sh/Kconfig config COH901318 diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index cb5a77a..afd1b14 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_SIRF_DMA) += sirf-dma.o obj-$(CONFIG_TI_EDMA) += edma.o obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o obj-$(CONFIG_TEGRA20_APB_DMA) += tegra20-apb-dma.o +obj-$(CONFIG_S3C24XX_DMAC) += s3c24xx-dma.o obj-$(CONFIG_PL330_DMA) += pl330.o obj-$(CONFIG_PCH_DMA) += pch_dma.o obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o diff --git a/drivers/dma/s3c24xx-dma.c b/drivers/dma/s3c24xx-dma.c new file mode 100644 index 000..d56a5ef --- /dev/null +++ b/drivers/dma/s3c24xx-dma.c @@ -0,0 +1,1340 @@ +/* + * S3C24XX DMA handling + * + * Copyright (c) 2013 Heiko Stuebner he...@sntech.de + * + * based on amba-pl08x.c + * + * Copyright (c) 2006 ARM Ltd. + * Copyright (c) 2010 ST-Ericsson SA + * + * Author: Peter Pearse peter.pea...@arm.com + * Author: Linus Walleij linus.wall...@stericsson.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 2 of the License, or (at your option) + * any later version. + * + * The DMA controllers in S3C24XX SoCs have a varying number of DMA signals + * that can be routed to any of the 4 to 8 hardware-channels. + * + * Therefore on these DMA controllers the number of channels + * and the number of incoming DMA signals are two totally different things. + * It is usually not possible to theoretically handle all physical signals, + * so
[PATCH] MAINTAINERS: Add DTS files to patterns for Samsung platform
From: Mark Brown broo...@linaro.org Help ensure that updates to the Samsung device trees get sent to the Samsung maintainers for review by adding file patterns to MAINTAINERS. Signed-off-by: Mark Brown broo...@linaro.org --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6d0dabe..8a0c044 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1154,6 +1154,8 @@ L:linux-arm-ker...@lists.infradead.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) W: http://www.fluff.org/ben/linux/ S: Maintained +F: arch/arm/boot/s3c* +F: arch/arm/boot/exynos* F: arch/arm/plat-samsung/ F: arch/arm/mach-s3c24*/ F: arch/arm/mach-s3c64xx/ -- 1.8.4.rc3 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 00/12] clk/exynos convert clock IDs to macros
Hi Kukjin, On Thursday 12 of September 2013 19:50:01 Kukjin Kim wrote: Tomasz Figa wrote: Hi Andrzej, On Friday 06 of September 2013 12:12:29 Andrzej Hajda wrote: Hi, This patch set adds headers with defines of exynos clocks. Then it converts dts files and drivers to use macros instead of magic numbers/enums to describe clock bindings. The patch set is based on the latest mturquette/clk-next branch. The patches are generated by script. I have verified random clocks by hand. I have also tested it on exynos4 based board. This is the 2nd version of the patchset. Changes: - corrected devicetree mailing list, - added comments to include/dt-bindings/clock/exynos4.h for clocks present only in particular chip, - added tab alignement in headers, - added comment to CLK_NR_CLKS, - added copyright headers, - split long lines in dts, - corrected example in bindings/clock/exynos5250-clock.txt, to point appropriate clocks. Regards Andrzej Andrzej Hajda (12): ARM: exynos4: create a DT header defining CLK IDs ARM: dts: exynos4: convert magic numbers to macros in clock bindings clk: exynos4: replace clock ID private enums with IDs from DT header ARM: exynos5250: create a DT header defining CLK IDs ARM: dts: exynos5250: convert magic numbers to macros in clock bindings clk: exynos5250: replace clock ID private enums with IDs from DT header ARM: exynos5420: create a DT header defining CLK IDs ARM: dts: exynos5420: convert magic numbers to macros in clock bindings clk: exynos5420: replace clock ID private enums with IDs from DT header ARM: exynos5440: create a DT header defining CLK IDs ARM: dts: exynos5440: convert magic numbers to macros in clock bindings clk: exynos5440: replace clock ID private enums with IDs from DT header .../devicetree/bindings/clock/exynos4-clock.txt| 259 +-- .../devicetree/bindings/clock/exynos5250-clock.txt | 160 +--- .../devicetree/bindings/clock/exynos5420-clock.txt | 184 + .../devicetree/bindings/clock/exynos5440-clock.txt | 45 +- arch/arm/boot/dts/exynos4.dtsi | 55 +- arch/arm/boot/dts/exynos4210.dtsi | 6 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos4x12.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 92 +-- arch/arm/boot/dts/exynos5420.dtsi | 13 +- arch/arm/boot/dts/exynos5440.dtsi | 27 +- drivers/clk/samsung/clk-exynos4.c | 857 ++--- drivers/clk/samsung/clk-exynos5250.c | 501 ++-- drivers/clk/samsung/clk-exynos5420.c | | 648 drivers/clk/samsung/clk-exynos5440.c | 81 +- include/dt-bindings/clock/exynos4.h| 244 ++ include/dt-bindings/clock/exynos5250.h | 157 include/dt-bindings/clock/exynos5420.h | 188 + include/dt-bindings/clock/exynos5440.h | 42 + 19 files changed, 1734 insertions(+), 1829 deletions(-) create mode 100644 include/dt-bindings/clock/exynos4.h create mode 100644 include/dt-bindings/clock/exynos5250.h create mode 100644 include/dt-bindings/clock/exynos5420.h create mode 100644 include/dt-bindings/clock/exynos5440.h I believe this series should be rebased on top of my series (and possibly remaining patches touching clock numbers queued on the list): [PATCH v2 00/16] Exynos clock clean-up for 3.12 http://thread.gmane.org/gmane.linux.kernel.samsung-soc/22514 Otherwise, it's really nice to finally see this being cleaned up, so: Acked-by: Tomasz Figa t.f...@samsung.com Well...I'm not sure changing to use macro is better or not at this moment... It was supposed to work like this from the beginning, but the preprocessing was not available at the time our common clock framework support was merged, so a temporary solution was to use the indices directly, which is far from being easy to use and scalable. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH V3] pci: exynos: split into two parts such as Synopsys part and Exynos part
On Thursday 12 September 2013 04:16 PM, Pratyush Anand wrote: On Thu, Sep 12, 2013 at 03:48:03PM +0530, Pratyush Anand wrote: On Thu, Sep 12, 2013 at 06:07:23PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:22 PM, Pratyush Anand wrote: Hi Kishon, On Thu, Sep 12, 2013 at 05:43:40PM +0800, Kishon Vijay Abraham I wrote: Hi, On Thursday 12 September 2013 03:00 PM, Pratyush Anand wrote: Hi Jingoo, On Thu, Sep 12, 2013 at 03:15:04PM +0800, Jingoo Han wrote: On Tuesday 23 July 2013 12:30 PM, Kishon Vijay Abraham I wrote: . . [...] when I do ifconfig eth0 up, I get *r8169 :01:00.0 eth0: link up.* But I dont receive any packets and ping also fails and the tx and rx packet count is also 0. Could it be related to inbound translation? A PCIe analyser log would tell a definite cause. Most likely either inbound translation is not working or INTx/MSI is not working. I have enabled only legacy interrupts. Whenever I connect or disconnect ethernet cable I get link up/link down message and also the interrupt count for eth0 increases. So I'm not doubting INTx interrupts as such. Just a question, what is the MRRS of your RC? if it is 128, can you it's 512. try with passing pci=pcie_bus_peer2peer in your bootargs. Again, analyser will help a lot in diagnosing such issues. dont have a analyser here :-( Thanks Kishon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Disable Exynos5250 I2S controllers by default
Hi Kukjin, On Thursday 12 of September 2013 19:42:57 Kukjin Kim wrote: Mark Brown wrote: On Tue, Sep 10, 2013 at 06:35:48PM +0100, Mark Rutland wrote: It seems far more sensible to me to mark devices disabled by default in shared dtsi files and then okay them as needed in particular dts files. I'd be happy with more of this. Yeah, me too - though only for devices that have an external impact, for things that are internal only (eg, a crypto engine) it makes sense to enable them by default since they should normally be usable regardless of the system configuration. (+ DT ML) Makes sense but I need to get the opinions from DT guys... Yes, this patch should have been posted to the DT ML indeed, but it has been already acked by Mark Rutland, one of DT binding maintainers. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ARM: dts: Correct typo in use of samsung,pin-drv for exynos5250
On Monday 09 of September 2013 09:11:11 Al Stone wrote: On 09/09/2013 03:00 AM, Tomasz Figa wrote: Hi Al, On Friday 06 of September 2013 14:09:52 al.st...@linaro.org wrote: From: Al Stone a...@redhat.com Corrects an obvious typo in the Arndale pinctrl descriptions in DT. The samsung-pinctrl driver uses the correct name. Thanks for spotting this. The patch looks good to me, but is it tested on some Exynos 5250 based board? Only with a simple boot test on an Arndale, and making sure that dtc could actually build the dtb. I did not test the driver code. I did read through the code and it appeared to be doing the right things, based on the content of the DT, but I did not do an active test of that. OK. I'm able to do exactly the same testing as you did, so let's say I'm fine with this patch. Acked-by: Tomasz Figa t.f...@samsung.com Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/3] ARM: dts: Disable Exynos5250 I2S controllers by default
Hi Mark, On Thursday 12 of September 2013 11:40:25 Mark Brown wrote: From: Mark Brown broo...@linaro.org Rather than requiring each board to explicitly disable the I2S controllers it is not using instead require boards to enable those that they are using. This is required for audio operation on Arndale, one of the unused I2S controllers is pinmuxed with the LDO enable GPIOs for the WM1811A. Signed-off-by: Mark Brown broo...@linaro.org Acked-by: Mark Rutland mark.rutl...@arm.com --- arch/arm/boot/dts/exynos5250-arndale.dts | 4 arch/arm/boot/dts/exynos5250-smdk5250.dts | 8 arch/arm/boot/dts/exynos5250.dtsi | 3 +++ 3 files changed, 7 insertions(+), 8 deletions(-) Looks reasonably. Acked-by: Tomasz Figa t.f...@samsung.com Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH] MAINTAINERS: add maintainer entry for Samsung Exynos PCIe driver
Add myself as maintainer for Samsung Exynos PCIe driver. Signed-off-by: Jingoo Han jg1@samsung.com --- MAINTAINERS |6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 6d0dabe..f00c469 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6346,6 +6346,12 @@ S: Supported F: Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt F: drivers/pci/host/pci-tegra.c +PCI DRIVER FOR SAMSUNG EXYNOS +M: Jingoo Han jg1@samsung.com +L: linux-...@vger.kernel.org +S: Maintained +F: drivers/pci/host/pci-exynos.c + PCMCIA SUBSYSTEM P: Linux PCMCIA Team L: linux-pcm...@lists.infradead.org -- 1.7.10.4 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH 1/3] dmaengine: pl330: Set residue in tx_status callback.
Hi Padmavathi,
-Original Message-
From: linux-arm-kernel [mailto:linux-arm-kernel-
boun...@lists.infradead.org] On Behalf Of Padmavathi Venna
Sent: Wednesday, September 11, 2013 3:08 PM
To: linux-samsung-soc@vger.kernel.org; linux-arm-
ker...@lists.infradead.org; padm...@samsung.com; padma@gmail.com
Cc: kgene@samsung.com; a...@arndb.de; sbki...@samsung.com;
vinod.k...@intel.com; broo...@kernel.org; dgr...@chromium.org;
ol...@chromium.org
Subject: [PATCH 1/3] dmaengine: pl330: Set residue in tx_status callback.
From: Dylan Reid dgr...@chromium.org
Fill txstate.residue with the amount of bytes remaining in the current
transfer if the transfer is not complete. This will be of particular use
to i2s DMA transfers, providing more accurate hw_ptr values to ASoC.
Signed-off-by: Dylan Reid dgr...@chromium.org
Reviewed-by: Olof Johansson ol...@chromium.org
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
drivers/dma/pl330.c | 55
++-
1 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index
593827b..7ab9136 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -2476,11 +2476,64 @@ static void pl330_free_chan_resources(struct
dma_chan *chan)
spin_unlock_irqrestore(pch-lock, flags); }
+static inline int
+pl330_src_addr_in_desc(struct dma_pl330_desc *desc, unsigned int sar) {
+ return ((desc-px.src_addr = sar)
+ (sar = (desc-px.src_addr + desc-px.bytes))); }
+
+static inline int
+pl330_dst_addr_in_desc(struct dma_pl330_desc *desc, unsigned int dar) {
+ return ((desc-px.dst_addr = dar)
+ (dar = (desc-px.dst_addr + desc-px.bytes))); }
+
+static unsigned int pl330_tx_residue(struct dma_chan *chan) {
+ struct dma_pl330_chan *pch = to_pchan(chan);
+ void __iomem *regs = pch-dmac-pif.base;
+ struct pl330_thread *thrd = pch-pl330_chid;
+ struct dma_pl330_desc *desc;
+ unsigned int sar, dar;
+ unsigned int residue = 0;
+ unsigned long flags;
+
+ sar = readl(regs + SA(thrd-id));
+ dar = readl(regs + DA(thrd-id));
+
+ spin_lock_irqsave(pch-lock, flags);
+
+ /* Find the desc related to the current buffer. */
+ list_for_each_entry(desc, pch-work_list, node) {
+ if (desc-rqcfg.src_inc pl330_src_addr_in_desc(desc,
sar)) {
+ residue = desc-px.bytes - (sar -
desc-px.src_addr);
+ goto found_unlock;
+ }
+ if (desc-rqcfg.dst_inc pl330_dst_addr_in_desc(desc,
dar)) {
+ residue = desc-px.bytes - (dar -
desc-px.dst_addr);
+ goto found_unlock;
+ }
+ }
+
+found_unlock:
+ spin_unlock_irqrestore(pch-lock, flags);
+
+ return residue;
+}
+
static enum dma_status
pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
- return dma_cookie_status(chan, cookie, txstate);
+ enum dma_status ret;
+
+ ret = dma_cookie_status(chan, cookie, txstate);
+ if (ret != DMA_SUCCESS) /* Not complete, check amount left. */
+ dma_set_residue(txstate, pl330_tx_residue(chan));
+
+ return ret;
Why didn't you use a cookie value to track the request?
The cookie is assigned when each transfer is submitted.
If you save the value in the desc, we can find the request easily.
Thanks,
Best Regards,
Chanho Park
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Re: [PATCH 2/3] ARM: dts: Leave Exynos5250 SPI controller disabled by default
Hi Mark, On Thursday 12 of September 2013 11:40:26 Mark Brown wrote: From: Mark Brown broo...@linaro.org Rather than requiring each board to explicitly disable the SPI controllers it is not using instead require boards to enable those that they are using. This is less work overall since normally at most one of the controllers is in use and avoids issues caused by inappropriate pinmuxing. Signed-off-by: Mark Brown broo...@linaro.org --- arch/arm/boot/dts/exynos5250-smdk5250.dts | 10 ++ arch/arm/boot/dts/exynos5250.dtsi | 3 +++ 2 files changed, 5 insertions(+), 8 deletions(-) I wonder if exynos5250-arndale shouldn't be also considered in this patch. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v8 00/12] Exynos5 IS driver
The patch series add support for Exynos5 camera subsystem. It re-uses mipi-csis and fimc-lite from exynos4-is and adds a new media device and fimc-is device drivers for exynos5. The media device supports asynchronos subdev registration for the fimc-is sensors and is tested on top of the patch series from Sylwester for exynos4-is [1]. [1] http://www.mail-archive.com/linux-media@vger.kernel.org/msg64653.html Changes from v7 --- - Addressed few DT related review comments from Sylwester http://www.mail-archive.com/linux-media@vger.kernel.org/msg66403.html - Few fixes added after some regression testing Changes from v6 --- - Addressed DT binding doc review comments from Sylwester http://www.mail-archive.com/linux-media@vger.kernel.org/msg65771.html http://www.mail-archive.com/linux-media@vger.kernel.org/msg65772.html Changes from v5 --- - Addressed review comments from Sylwester http://www.mail-archive.com/linux-media@vger.kernel.org/msg65578.html http://www.mail-archive.com/linux-media@vger.kernel.org/msg65605.html Changes from v4 --- - Addressed all review comments from Sylwester - Added separate PMU node as suggested by Stephen Warren - Added phandle based discovery of subdevs instead of node name Changes from v3 --- - Dropped the RFC tag - Addressed all review comments from Sylwester and Sachin - Removed clock provider for media dev - Added s5k4e5 sensor devicetree binding doc Changes from v2 --- - Added exynos5 media device driver from Shaik to this series - Added ISP pipeline support in media device driver - Based on Sylwester's latest exynos4-is development - Asynchronos registration of sensor subdevs - Made independent IS-sensor support - Add s5k4e5 sensor driver - Addressed review comments from Sylwester, Hans, Andrzej, Sachin Changes from v1 --- - Addressed all review comments from Sylwester - Made sensor subdevs as independent i2c devices - Lots of cleanup - Debugfs support added - Removed PMU global register access Arun Kumar K (12): [media] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation [media] exynos5-fimc-is: Add driver core files [media] exynos5-fimc-is: Add common driver header files [media] exynos5-fimc-is: Add register definition and context header [media] exynos5-fimc-is: Add isp subdev [media] exynos5-fimc-is: Add scaler subdev [media] exynos5-fimc-is: Add sensor interface [media] exynos5-fimc-is: Add the hardware pipeline control [media] exynos5-fimc-is: Add the hardware interface module [media] exynos5-is: Add Kconfig and Makefile V4L: s5k6a3: Change sensor min/max resolutions V4L: Add driver for s5k4e5 image sensor .../devicetree/bindings/media/exynos5-fimc-is.txt | 46 + .../devicetree/bindings/media/i2c/s5k4e5.txt | 45 + drivers/media/i2c/Kconfig |8 + drivers/media/i2c/Makefile |1 + drivers/media/i2c/s5k4e5.c | 347 drivers/media/i2c/s5k6a3.c | 10 +- drivers/media/platform/Kconfig |1 + drivers/media/platform/Makefile|1 + drivers/media/platform/exynos5-is/Kconfig | 20 + drivers/media/platform/exynos5-is/Makefile |7 + drivers/media/platform/exynos5-is/fimc-is-cmd.h| 187 +++ drivers/media/platform/exynos5-is/fimc-is-core.c | 413 + drivers/media/platform/exynos5-is/fimc-is-core.h | 132 ++ drivers/media/platform/exynos5-is/fimc-is-err.h| 257 +++ .../media/platform/exynos5-is/fimc-is-interface.c | 810 ++ .../media/platform/exynos5-is/fimc-is-interface.h | 124 ++ drivers/media/platform/exynos5-is/fimc-is-isp.c| 534 ++ drivers/media/platform/exynos5-is/fimc-is-isp.h| 90 ++ .../media/platform/exynos5-is/fimc-is-metadata.h | 767 + drivers/media/platform/exynos5-is/fimc-is-param.h | 1159 + .../media/platform/exynos5-is/fimc-is-pipeline.c | 1708 .../media/platform/exynos5-is/fimc-is-pipeline.h | 129 ++ drivers/media/platform/exynos5-is/fimc-is-regs.h | 105 ++ drivers/media/platform/exynos5-is/fimc-is-scaler.c | 476 ++ drivers/media/platform/exynos5-is/fimc-is-scaler.h | 106 ++ drivers/media/platform/exynos5-is/fimc-is-sensor.c | 45 + drivers/media/platform/exynos5-is/fimc-is-sensor.h | 65 + drivers/media/platform/exynos5-is/fimc-is.h| 160 ++ 28 files changed, 7749 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/s5k4e5.txt create mode 100644 drivers/media/i2c/s5k4e5.c create mode 100644 drivers/media/platform/exynos5-is/Kconfig create mode 100644 drivers/media/platform/exynos5-is/Makefile create mode 100644 drivers/media/platform/exynos5-is/fimc-is-cmd.h create mode 100644
[PATCH v8 02/12] [media] exynos5-fimc-is: Add driver core files
This driver is for the FIMC-IS IP available in Samsung Exynos5
SoC onwards. This patch adds the core files for the new driver.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-core.c | 413 ++
drivers/media/platform/exynos5-is/fimc-is-core.h | 132 +++
2 files changed, 545 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-core.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-core.c
b/drivers/media/platform/exynos5-is/fimc-is-core.c
new file mode 100644
index 000..6910581
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-core.c
@@ -0,0 +1,413 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/bug.h
+#include linux/ctype.h
+#include linux/device.h
+#include linux/debugfs.h
+#include linux/delay.h
+#include linux/errno.h
+#include linux/err.h
+#include linux/firmware.h
+#include linux/fs.h
+#include linux/gpio.h
+#include linux/interrupt.h
+#include linux/kernel.h
+#include linux/list.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_gpio.h
+#include linux/of_address.h
+#include linux/of_platform.h
+#include linux/of_irq.h
+#include linux/pinctrl/consumer.h
+#include linux/platform_device.h
+#include linux/pm_runtime.h
+#include linux/slab.h
+#include linux/types.h
+#include linux/videodev2.h
+
+#include media/v4l2-device.h
+#include media/v4l2-ioctl.h
+#include media/v4l2-mem2mem.h
+#include media/v4l2-of.h
+#include media/videobuf2-core.h
+#include media/videobuf2-dma-contig.h
+
+#include fimc-is.h
+#include fimc-is-i2c.h
+
+#define CLK_MCU_ISP_DIV0_FREQ (200 * 100)
+#define CLK_MCU_ISP_DIV1_FREQ (100 * 100)
+#define CLK_ISP_DIV0_FREQ (134 * 100)
+#define CLK_ISP_DIV1_FREQ (68 * 100)
+#define CLK_ISP_DIVMPWM_FREQ (34 * 100)
+
+static const char * const fimc_is_clock_name[] = {
+ [IS_CLK_ISP]= isp,
+ [IS_CLK_MCU_ISP]= mcu_isp,
+ [IS_CLK_ISP_DIV0] = isp_div0,
+ [IS_CLK_ISP_DIV1] = isp_div1,
+ [IS_CLK_ISP_DIVMPWM]= isp_divmpwm,
+ [IS_CLK_MCU_ISP_DIV0] = mcu_isp_div0,
+ [IS_CLK_MCU_ISP_DIV1] = mcu_isp_div1,
+};
+
+static void fimc_is_put_clocks(struct fimc_is *is)
+{
+ int i;
+
+ for (i = 0; i IS_CLK_MAX_NUM; i++) {
+ if (IS_ERR(is-clock[i]))
+ continue;
+ clk_unprepare(is-clock[i]);
+ clk_put(is-clock[i]);
+ is-clock[i] = ERR_PTR(-EINVAL);
+ }
+}
+
+static int fimc_is_get_clocks(struct fimc_is *is)
+{
+ struct device *dev = is-pdev-dev;
+ int i, ret;
+
+ for (i = 0; i IS_CLK_MAX_NUM; i++) {
+ is-clock[i] = clk_get(dev, fimc_is_clock_name[i]);
+ if (IS_ERR(is-clock[i]))
+ goto err;
+ ret = clk_prepare(is-clock[i]);
+ if (ret 0) {
+ clk_put(is-clock[i]);
+ is-clock[i] = ERR_PTR(-EINVAL);
+ goto err;
+ }
+ }
+ return 0;
+err:
+ fimc_is_put_clocks(is);
+ pr_err(Failed to get clock: %s\n, fimc_is_clock_name[i]);
+ return -ENXIO;
+}
+
+static int fimc_is_configure_clocks(struct fimc_is *is)
+{
+ int i, ret;
+
+ for (i = 0; i IS_CLK_MAX_NUM; i++)
+ is-clock[i] = ERR_PTR(-EINVAL);
+
+ ret = fimc_is_get_clocks(is);
+ if (ret)
+ return ret;
+
+ /* Set rates */
+ ret = clk_set_rate(is-clock[IS_CLK_MCU_ISP_DIV0],
+ CLK_MCU_ISP_DIV0_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_MCU_ISP_DIV1],
+ CLK_MCU_ISP_DIV1_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_ISP_DIV0], CLK_ISP_DIV0_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_ISP_DIV1], CLK_ISP_DIV1_FREQ);
+ if (ret)
+ return ret;
+ ret = clk_set_rate(is-clock[IS_CLK_ISP_DIVMPWM],
+ CLK_ISP_DIVMPWM_FREQ);
+ return ret;
+}
+
+static void fimc_is_pipelines_destroy(struct fimc_is *is)
+{
+ int i;
+
+ for (i = 0; i is-drvdata-num_instances; i++)
+ fimc_is_pipeline_destroy(is-pipeline[i]);
+}
+
+static int fimc_is_parse_sensor_config(struct fimc_is *is, unsigned int index,
+
[PATCH v8 01/12] [media] exynos5-fimc-is: Add Exynos5 FIMC-IS device tree bindings documentation
The patch adds the DT binding documentation for Samsung Exynos5 SoC series imaging subsystem (FIMC-IS). Signed-off-by: Arun Kumar K arun...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com --- .../devicetree/bindings/media/exynos5-fimc-is.txt | 46 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/exynos5-fimc-is.txt diff --git a/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt new file mode 100644 index 000..5611401 --- /dev/null +++ b/Documentation/devicetree/bindings/media/exynos5-fimc-is.txt @@ -0,0 +1,46 @@ +Samsung EXYNOS5 SoC series Imaging Subsystem (FIMC-IS) +-- + +The camera subsystem on Samsung Exynos5 SoC has some changes relative +to previous SoC versions. Exynos5 has almost similar MIPI-CSIS and +FIMC-LITE IPs but has a much improved version of FIMC-IS which can +handle sensor controls and camera post-processing operations. The +Exynos5 FIMC-IS has a dedicated ARM Cortex A5 processor, many +post-processing blocks (ISP, DRC, FD, ODC, DIS, 3DNR) and two +dedicated scalers (SCC and SCP). + +fimc-is node + + +Required properties: + +- compatible: must be samsung,exynos5250-fimc-is +- reg : physical base address and size of the memory mapped + registers +- interrupt-parent : parent interrupt controller +- interrupts: fimc-is interrupt to the parent interrupt controller +- clocks: list of clock specifiers, corresponding to entries in + clock-names property +- clock-names : must contain isp, mcu_isp, isp_div0, isp_div1, + isp_divmpwm, mcu_isp_div0, mcu_isp_div1 entries, + matching entries in the clocks property +- samsung,pmu : phandle to the Power Management Unit (PMU) node + +i2c-isp (ISP I2C bus controller) nodes +-- + +Required properties: + +- compatible : should be samsung,exynos4212-i2c-isp for Exynos4212, + Exynos4412 and Exynos5250 SoCs +- reg : physical base address and length of the registers set +- clocks : must contain gate clock specifier for this controller +- clock-names : must contain i2c_isp entry + +For the i2c-isp node, it is required to specify a pinctrl state named default, +according to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt. + +Device tree nodes of the image sensors controlled directly by the FIMC-IS +firmware must be child nodes of their corresponding ISP I2C bus controller node. +The data link of these image sensors must be specified using the common video +interfaces bindings, defined in video-interfaces.txt. -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v8 07/12] [media] exynos5-fimc-is: Add sensor interface
Some sensors to be used with fimc-is are exclusively controlled
by the fimc-is firmware. This minimal sensor driver provides
the required info for the firmware to configure the sensors
sitting on I2C bus.
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-sensor.c | 45 ++
drivers/media/platform/exynos5-is/fimc-is-sensor.h | 65
2 files changed, 110 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-sensor.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.c
b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
new file mode 100644
index 000..475f1c3
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.c
@@ -0,0 +1,45 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include fimc-is-sensor.h
+
+static const struct sensor_drv_data s5k6a3_drvdata = {
+ .id = FIMC_IS_SENSOR_ID_S5K6A3,
+ .open_timeout = S5K6A3_OPEN_TIMEOUT,
+ .setfile_name = exynos5_s5k6a3_setfile.bin,
+};
+
+static const struct sensor_drv_data s5k4e5_drvdata = {
+ .id = FIMC_IS_SENSOR_ID_S5K4E5,
+ .open_timeout = S5K4E5_OPEN_TIMEOUT,
+ .setfile_name = exynos5_s5k4e5_setfile.bin,
+};
+
+static const struct of_device_id fimc_is_sensor_of_ids[] = {
+ {
+ .compatible = samsung,s5k6a3,
+ .data = s5k6a3_drvdata,
+ },
+ {
+ .compatible = samsung,s5k4e5,
+ .data = s5k4e5_drvdata,
+ },
+ { }
+};
+
+const struct sensor_drv_data *exynos5_is_sensor_get_drvdata(
+ struct device_node *node)
+{
+ const struct of_device_id *of_id;
+
+ of_id = of_match_node(fimc_is_sensor_of_ids, node);
+ return of_id ? of_id-data : NULL;
+}
diff --git a/drivers/media/platform/exynos5-is/fimc-is-sensor.h
b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
new file mode 100644
index 000..0ba5733
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-sensor.h
@@ -0,0 +1,65 @@
+/*
+ * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef FIMC_IS_SENSOR_H_
+#define FIMC_IS_SENSOR_H_
+
+#include linux/of.h
+#include linux/types.h
+
+#define S5K6A3_OPEN_TIMEOUT2000 /* ms */
+#define S5K6A3_SENSOR_WIDTH1392
+#define S5K6A3_SENSOR_HEIGHT 1392
+
+#define S5K4E5_OPEN_TIMEOUT2000 /* ms */
+#define S5K4E5_SENSOR_WIDTH2560
+#define S5K4E5_SENSOR_HEIGHT 1920
+
+#define SENSOR_WIDTH_PADDING 16
+#define SENSOR_HEIGHT_PADDING 10
+
+enum fimc_is_sensor_id {
+ FIMC_IS_SENSOR_ID_S5K3H2 = 1,
+ FIMC_IS_SENSOR_ID_S5K6A3,
+ FIMC_IS_SENSOR_ID_S5K4E5,
+ FIMC_IS_SENSOR_ID_S5K3H7,
+ FIMC_IS_SENSOR_ID_CUSTOM,
+ FIMC_IS_SENSOR_ID_END
+};
+
+struct sensor_drv_data {
+ enum fimc_is_sensor_id id;
+ /* sensor open timeout in ms */
+ unsigned short open_timeout;
+ char *setfile_name;
+};
+
+/**
+ * struct fimc_is_sensor - fimc-is sensor data structure
+ * @drvdata: a pointer to the sensor's parameters data structure
+ * @i2c_bus: ISP I2C bus index (0...1)
+ * @width: sensor active width
+ * @height: sensor active height
+ * @pixel_width: sensor effective pixel width (width + padding)
+ * @pixel_height: sensor effective pixel height (height + padding)
+ */
+struct fimc_is_sensor {
+ const struct sensor_drv_data *drvdata;
+ unsigned int i2c_bus;
+ unsigned int width;
+ unsigned int height;
+ unsigned int pixel_width;
+ unsigned int pixel_height;
+};
+
+const struct sensor_drv_data *exynos5_is_sensor_get_drvdata(
+ struct device_node *node);
+
+#endif /* FIMC_IS_SENSOR_H_ */
--
1.7.9.5
--
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[PATCH v8 08/12] [media] exynos5-fimc-is: Add the hardware pipeline control
This patch adds the crucial hardware pipeline control for the
fimc-is driver. All the subdev nodes will call this pipeline
interfaces to reach the hardware. Responsibilities of this module
involves configuring and maintaining the hardware pipeline involving
multiple sub-ips like ISP, DRC, Scalers, ODC, 3DNR, FD etc.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
.../media/platform/exynos5-is/fimc-is-pipeline.c | 1708
.../media/platform/exynos5-is/fimc-is-pipeline.h | 129 ++
2 files changed, 1837 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-pipeline.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
b/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
new file mode 100644
index 000..a73d952
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-pipeline.c
@@ -0,0 +1,1708 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ * Kil-yeon Lim kilyeon...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include fimc-is.h
+#include fimc-is-pipeline.h
+#include fimc-is-metadata.h
+#include fimc-is-regs.h
+#include fimc-is-cmd.h
+#include media/videobuf2-dma-contig.h
+#include linux/delay.h
+
+/* Default setting values */
+#define DEFAULT_PREVIEW_STILL_WIDTH1280
+#define DEFAULT_PREVIEW_STILL_HEIGHT 720
+#define DEFAULT_CAPTURE_VIDEO_WIDTH1920
+#define DEFAULT_CAPTURE_VIDEO_HEIGHT 1080
+#define DEFAULT_CAPTURE_STILL_WIDTH2560
+#define DEFAULT_CAPTURE_STILL_HEIGHT 1920
+#define DEFAULT_CAPTURE_STILL_CROP_WIDTH 2560
+#define DEFAULT_CAPTURE_STILL_CROP_HEIGHT 1440
+#define DEFAULT_PREVIEW_VIDEO_WIDTH640
+#define DEFAULT_PREVIEW_VIDEO_HEIGHT 480
+
+/* Init params for pipeline devices */
+static const struct sensor_param init_sensor_param = {
+ .frame_rate = {
+ .frame_rate = 30,
+ },
+};
+
+static const struct isp_param init_isp_param = {
+ .control = {
+ .cmd = CONTROL_COMMAND_START,
+ .bypass = CONTROL_BYPASS_DISABLE,
+ },
+ .otf_input = {
+ .cmd = OTF_INPUT_COMMAND_DISABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = OTF_INPUT_FORMAT_BAYER,
+ .bitwidth = OTF_INPUT_BIT_WIDTH_10BIT,
+ .order = OTF_INPUT_ORDER_BAYER_GR_BG,
+ .frametime_max = 3,
+ },
+ .dma1_input = {
+ .cmd = DMA_INPUT_COMMAND_DISABLE,
+ },
+ .dma2_input = {
+ .cmd = DMA_INPUT_COMMAND_DISABLE,
+ },
+ .aa = {
+ .cmd = ISP_AA_COMMAND_START,
+ },
+ .flash = {
+ .cmd = ISP_FLASH_COMMAND_DISABLE,
+ .redeye = ISP_FLASH_REDEYE_DISABLE,
+ },
+ .awb = {
+ .cmd = ISP_AWB_COMMAND_AUTO,
+ },
+ .effect = {
+ .cmd = ISP_IMAGE_EFFECT_DISABLE,
+ },
+ .iso = {
+ .cmd = ISP_ISO_COMMAND_AUTO,
+ },
+ .adjust = {
+ .cmd = ISP_ADJUST_COMMAND_AUTO,
+ },
+ .metering = {
+ .cmd = ISP_METERING_COMMAND_CENTER,
+ .win_width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .win_height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ },
+ .afc = {
+ .cmd = ISP_AFC_COMMAND_AUTO,
+ },
+ .otf_output = {
+ .cmd = OTF_OUTPUT_COMMAND_ENABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = OTF_OUTPUT_FORMAT_YUV444,
+ .bitwidth = OTF_OUTPUT_BIT_WIDTH_12BIT,
+ .order = OTF_OUTPUT_ORDER_BAYER_GR_BG,
+ },
+ .dma1_output = {
+ .cmd = DMA_OUTPUT_COMMAND_DISABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = DMA_INPUT_FORMAT_YUV444,
+ .bitwidth = DMA_INPUT_BIT_WIDTH_8BIT,
+ .plane = 1,
+ .order = DMA_INPUT_ORDER_YCBCR,
+ },
+ .dma2_output = {
+ .cmd = DMA_OUTPUT_COMMAND_DISABLE,
+ .width = DEFAULT_CAPTURE_STILL_WIDTH,
+ .height = DEFAULT_CAPTURE_STILL_HEIGHT,
+ .format = DMA_OUTPUT_FORMAT_BAYER,
+ .bitwidth = DMA_OUTPUT_BIT_WIDTH_12BIT,
+ .plane = 1,
+ .order =
[PATCH v8 11/12] V4L: s5k6a3: Change sensor min/max resolutions
s5k6a3 sensor has actual pixel resolution of 1408x1402 against the active resolution 1392x1392. The real resolution is needed when raw sensor SRGB data is dumped to memory by fimc-lite. Signed-off-by: Arun Kumar K arun...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com --- drivers/media/i2c/s5k6a3.c | 10 ++ 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/media/i2c/s5k6a3.c b/drivers/media/i2c/s5k6a3.c index ccbb4fc..e70e217 100644 --- a/drivers/media/i2c/s5k6a3.c +++ b/drivers/media/i2c/s5k6a3.c @@ -25,10 +25,12 @@ #include media/v4l2-async.h #include media/v4l2-subdev.h -#define S5K6A3_SENSOR_MAX_WIDTH1392 -#define S5K6A3_SENSOR_MAX_HEIGHT 1392 -#define S5K6A3_SENSOR_MIN_WIDTH32 -#define S5K6A3_SENSOR_MIN_HEIGHT 32 +#define S5K6A3_SENSOR_MAX_WIDTH1408 +#define S5K6A3_SENSOR_MAX_HEIGHT 1402 +#define S5K6A3_SENSOR_ACTIVE_WIDTH 1392 +#define S5K6A3_SENSOR_ACTIVE_HEIGHT1392 +#define S5K6A3_SENSOR_MIN_WIDTH(32 + 16) +#define S5K6A3_SENSOR_MIN_HEIGHT (32 + 10) #define S5K6A3_DEF_PIX_WIDTH 1296 #define S5K6A3_DEF_PIX_HEIGHT 732 -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v8 10/12] [media] exynos5-is: Add Kconfig and Makefile
Adds Kconfig and Makefile for exynos5-is driver files. Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com Signed-off-by: Arun Kumar K arun...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com --- drivers/media/platform/Kconfig |1 + drivers/media/platform/Makefile|1 + drivers/media/platform/exynos5-is/Kconfig | 20 drivers/media/platform/exynos5-is/Makefile |7 +++ 4 files changed, 29 insertions(+) create mode 100644 drivers/media/platform/exynos5-is/Kconfig create mode 100644 drivers/media/platform/exynos5-is/Makefile diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 08de865..4b0475e 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -123,6 +123,7 @@ config VIDEO_S3C_CAMIF source drivers/media/platform/soc_camera/Kconfig source drivers/media/platform/exynos4-is/Kconfig +source drivers/media/platform/exynos5-is/Kconfig source drivers/media/platform/s5p-tv/Kconfig endif # V4L_PLATFORM_DRIVERS diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index eee28dd..40bf09f 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV)+= s5p-tv/ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D)+= s5p-g2d/ obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC) += exynos-gsc/ +obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_CAMERA) += exynos5-is/ obj-$(CONFIG_BLACKFIN) += blackfin/ diff --git a/drivers/media/platform/exynos5-is/Kconfig b/drivers/media/platform/exynos5-is/Kconfig new file mode 100644 index 000..b67d11a --- /dev/null +++ b/drivers/media/platform/exynos5-is/Kconfig @@ -0,0 +1,20 @@ +config VIDEO_SAMSUNG_EXYNOS5_CAMERA + bool Samsung Exynos5 SoC Camera Media Device driver + depends on VIDEO_V4L2 VIDEO_V4L2_SUBDEV_API PM_RUNTIME + depends on VIDEO_SAMSUNG_EXYNOS4_IS + help + This is a V4L2 media device driver for Exynos5 SoC series + camera subsystem. + +if VIDEO_SAMSUNG_EXYNOS5_CAMERA + +config VIDEO_SAMSUNG_EXYNOS5_FIMC_IS + tristate Samsung Exynos5 SoC FIMC-IS driver + depends on I2C OF + depends on VIDEO_EXYNOS4_FIMC_IS + select VIDEOBUF2_DMA_CONTIG + help + This is a V4L2 driver for Samsung Exynos5 SoC series Imaging + Subsystem known as FIMC-IS. + +endif #VIDEO_SAMSUNG_EXYNOS5_MDEV diff --git a/drivers/media/platform/exynos5-is/Makefile b/drivers/media/platform/exynos5-is/Makefile new file mode 100644 index 000..6cdb037 --- /dev/null +++ b/drivers/media/platform/exynos5-is/Makefile @@ -0,0 +1,7 @@ +ccflags-y += -Idrivers/media/platform/exynos4-is +exynos5-fimc-is-objs := fimc-is-core.o fimc-is-isp.o fimc-is-scaler.o +exynos5-fimc-is-objs += fimc-is-pipeline.o fimc-is-interface.o fimc-is-sensor.o +exynos-mdevice-objs := exynos5-mdev.o + +obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_FIMC_IS) += exynos5-fimc-is.o +obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS5_CAMERA) += exynos-mdevice.o -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH v8 06/12] [media] exynos5-fimc-is: Add scaler subdev
FIMC-IS has two hardware scalers named as scaler-codec and
scaler-preview. This patch adds the common code handling the
video nodes and subdevs of both the scalers.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-scaler.c | 476
drivers/media/platform/exynos5-is/fimc-is-scaler.h | 106 +
2 files changed, 582 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-scaler.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-scaler.c
b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
new file mode 100644
index 000..029eb8b
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-scaler.c
@@ -0,0 +1,476 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include media/v4l2-ioctl.h
+#include media/videobuf2-dma-contig.h
+
+#include fimc-is.h
+
+#define IS_SCALER_DRV_NAME fimc-is-scaler
+
+static const struct fimc_is_fmt formats[] = {
+ {
+ .name = YUV 4:2:0 3p MultiPlanar,
+ .fourcc = V4L2_PIX_FMT_YUV420M,
+ .depth = {8, 2, 2},
+ .num_planes = 3,
+ },
+ {
+ .name = YUV 4:2:0 2p MultiPlanar,
+ .fourcc = V4L2_PIX_FMT_NV12M,
+ .depth = {8, 4},
+ .num_planes = 2,
+ },
+ {
+ .name = YUV 4:2:2 1p MultiPlanar,
+ .fourcc = V4L2_PIX_FMT_NV16,
+ .depth = {16},
+ .num_planes = 1,
+ },
+};
+#define NUM_FORMATS ARRAY_SIZE(formats)
+
+static const struct fimc_is_fmt *find_format(struct v4l2_format *f)
+{
+ unsigned int i;
+
+ for (i = 0; i NUM_FORMATS; i++) {
+ if (formats[i].fourcc == f-fmt.pix_mp.pixelformat)
+ return formats[i];
+ }
+ return NULL;
+}
+
+static int scaler_video_capture_start_streaming(struct vb2_queue *vq,
+ unsigned int count)
+{
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ int ret;
+
+ ret = fimc_is_pipeline_scaler_start(ctx-pipeline,
+ ctx-scaler_id,
+ vq-num_buffers,
+ ctx-fmt-num_planes);
+ if (ret) {
+ v4l2_err(ctx-subdev, Scaler start failed.\n);
+ return -EINVAL;
+ }
+
+ set_bit(STATE_RUNNING, ctx-capture_state);
+ return 0;
+}
+
+static int scaler_video_capture_stop_streaming(struct vb2_queue *vq)
+{
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf;
+ int ret;
+
+ ret = fimc_is_pipeline_scaler_stop(ctx-pipeline, ctx-scaler_id);
+ if (ret)
+ v4l2_info(ctx-subdev, Scaler already stopped.\n);
+
+ /* Release un-used buffers */
+ while (!list_empty(ctx-wait_queue)) {
+ buf = fimc_is_scaler_wait_queue_get(ctx);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+ while (!list_empty(ctx-run_queue)) {
+ buf = fimc_is_scaler_run_queue_get(ctx);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+
+ clear_bit(STATE_RUNNING, ctx-capture_state);
+ return 0;
+}
+
+static int scaler_video_capture_queue_setup(struct vb2_queue *vq,
+ const struct v4l2_format *pfmt,
+ unsigned int *num_buffers, unsigned int *num_planes,
+ unsigned int sizes[], void *allocators[])
+{
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ const struct fimc_is_fmt *fmt = ctx-fmt;
+ unsigned int wh;
+ int i;
+
+ if (!fmt)
+ return -EINVAL;
+
+ *num_planes = fmt-num_planes;
+ wh = ctx-width * ctx-height;
+
+ for (i = 0; i *num_planes; i++) {
+ allocators[i] = ctx-alloc_ctx;
+ sizes[i] = (wh * fmt-depth[i]) / 8;
+ }
+ return 0;
+}
+
+static int scaler_video_capture_buffer_init(struct vb2_buffer *vb)
+{
+ struct vb2_queue *vq = vb-vb2_queue;
+ struct fimc_is_scaler *ctx = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf = container_of(vb, struct fimc_is_buf, vb);
+ const struct fimc_is_fmt *fmt;
+ int i;
+
+ fmt = ctx-fmt;
+ for (i = 0; i fmt-num_planes; i++)
+ buf-paddr[i] = vb2_dma_contig_plane_dma_addr(vb, i);
+
+
[PATCH v8 04/12] [media] exynos5-fimc-is: Add register definition and context header
This patch adds the register definition file for the fimc-is driver and also the header file containing the main context for the driver. Signed-off-by: Arun Kumar K arun...@samsung.com Signed-off-by: Kilyeon Im kilyeon...@samsung.com Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com --- drivers/media/platform/exynos5-is/fimc-is-regs.h | 105 ++ drivers/media/platform/exynos5-is/fimc-is.h | 160 ++ 2 files changed, 265 insertions(+) create mode 100644 drivers/media/platform/exynos5-is/fimc-is-regs.h create mode 100644 drivers/media/platform/exynos5-is/fimc-is.h diff --git a/drivers/media/platform/exynos5-is/fimc-is-regs.h b/drivers/media/platform/exynos5-is/fimc-is-regs.h new file mode 100644 index 000..06aa466 --- /dev/null +++ b/drivers/media/platform/exynos5-is/fimc-is-regs.h @@ -0,0 +1,105 @@ +/* + * Samsung Exynos5 SoC series FIMC-IS driver + * + * Copyright (c) 2013 Samsung Electronics Co., Ltd + * Arun Kumar K arun...@samsung.com + * Kil-yeon Lim kilyeon...@samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef FIMC_IS_REGS_H +#define FIMC_IS_REGS_H + +/* WDT_ISP register */ +#define WDT0x0017 +/* MCUCTL register */ +#define MCUCTL 0x0018 +/* MCU Controller Register */ +#define MCUCTLR(MCUCTL+0x00) +#define MCUCTLR_AXI_ISPX_AWCACHE(x)((x) 16) +#define MCUCTLR_AXI_ISPX_ARCACHE(x)((x) 12) +#define MCUCTLR_MSWRST (1 0) +/* Boot Base OFfset Address Register */ +#define BBOAR (MCUCTL+0x04) +#define BBOAR_BBOA(x) ((x) 0) + +/* Interrupt Generation Register 0 from Host CPU to VIC */ +#define INTGR0 (MCUCTL+0x08) +#define INTGR0_INTGC(n)(1 ((n) + 16)) +#define INTGR0_INTGD(n)(1 (n)) + +/* Interrupt Clear Register 0 from Host CPU to VIC */ +#define INTCR0 (MCUCTL+0x0c) +#define INTCR0_INTCC(n)(1 ((n) + 16)) +#define INTCR0_INTCD(n)(1 (n)) + +/* Interrupt Mask Register 0 from Host CPU to VIC */ +#define INTMR0 (MCUCTL+0x10) +#define INTMR0_INTMC(n)(1 ((n) + 16)) +#define INTMR0_INTMD(n)(1 (n)) + +/* Interrupt Status Register 0 from Host CPU to VIC */ +#define INTSR0 (MCUCTL+0x14) +#define INTSR0_GET_INTSD(n, x) (((x) (n)) 0x1) +#define INTSR0_GET_INTSC(n, x) (((x) ((n) + 16)) 0x1) + +/* Interrupt Mask Status Register 0 from Host CPU to VIC */ +#define INTMSR0(MCUCTL+0x18) +#define INTMSR0_GET_INTMSD(n, x) (((x) (n)) 0x1) +#define INTMSR0_GET_INTMSC(n, x) (((x) ((n) + 16)) 0x1) + +/* Interrupt Generation Register 1 from ISP CPU to Host IC */ +#define INTGR1 (MCUCTL+0x1c) +#define INTGR1_INTGC(n)(1 (n)) + +/* Interrupt Clear Register 1 from ISP CPU to Host IC */ +#define INTCR1 (MCUCTL+0x20) +#define INTCR1_INTCC(n)(1 (n)) + +/* Interrupt Mask Register 1 from ISP CPU to Host IC */ +#define INTMR1 (MCUCTL+0x24) +#define INTMR1_INTMC(n)(1 (n)) + +/* Interrupt Status Register 1 from ISP CPU to Host IC */ +#define INTSR1 (MCUCTL+0x28) +/* Interrupt Mask Status Register 1 from ISP CPU to Host IC */ +#define INTMSR1(MCUCTL+0x2c) +/* Interrupt Clear Register 2 from ISP BLK's interrupts to Host IC */ +#define INTCR2 (MCUCTL+0x30) +#define INTCR2_INTCC(n)(1 (n)) + +/* Interrupt Mask Register 2 from ISP BLK's interrupts to Host IC */ +#define INTMR2 (MCUCTL+0x34) +#define INTMR2_INTMCIS(n) (1 (n)) + +/* Interrupt Status Register 2 from ISP BLK's interrupts to Host IC */ +#define INTSR2 (MCUCTL+0x38) +/* Interrupt Mask Status Register 2 from ISP BLK's interrupts to Host IC */ +#define INTMSR2(MCUCTL+0x3c) +/* General Purpose Output Control Register (0~17) */ +#define GPOCTLR(MCUCTL+0x40) +#define GPOCTLR_GPOG(n, x) ((x) (n)) + +/* General Purpose Pad Output Enable Register (0~17) */ +#define GPOENCTLR (MCUCTL+0x44) +#define GPOENCTLR_GPOEN0(n, x) ((x) (n)) + +/* General Purpose Input Control Register (0~17) */ +#define GPICTLR(MCUCTL+0x48) + +/* IS Shared Registers between ISP CPU and HOST CPU */ +#define ISSR(n)(MCUCTL + 0x80 + (n)) + +/* PMU for FIMC-IS*/ +#define
[PATCH v8 05/12] [media] exynos5-fimc-is: Add isp subdev
fimc-is driver takes video data input from the ISP video node
which is added in this patch. This node accepts Bayer input
buffers which is given from the IS sensors.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
drivers/media/platform/exynos5-is/fimc-is-isp.c | 534 +++
drivers/media/platform/exynos5-is/fimc-is-isp.h | 90
2 files changed, 624 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-isp.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-isp.c
b/drivers/media/platform/exynos5-is/fimc-is-isp.c
new file mode 100644
index 000..7bd603f
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-isp.c
@@ -0,0 +1,534 @@
+/*
+ * Samsung EXYNOS5250 FIMC-IS (Imaging Subsystem) driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include media/v4l2-ioctl.h
+#include media/videobuf2-dma-contig.h
+
+#include fimc-is.h
+
+#define ISP_DRV_NAME fimc-is-isp
+
+static const struct fimc_is_fmt formats[] = {
+ {
+ .name = Bayer GR-BG 8bits,
+ .fourcc = V4L2_PIX_FMT_SGRBG8,
+ .depth = { 8 },
+ .num_planes = 1,
+ },
+ {
+ .name = Bayer GR-BG 10bits,
+ .fourcc = V4L2_PIX_FMT_SGRBG10,
+ .depth = { 16 },
+ .num_planes = 1,
+ },
+ {
+ .name = Bayer GR-BG 12bits,
+ .fourcc = V4L2_PIX_FMT_SGRBG12,
+ .depth = { 16 },
+ .num_planes = 1,
+ },
+};
+#define NUM_FORMATS ARRAY_SIZE(formats)
+
+static const struct fimc_is_fmt *find_format(struct v4l2_format *f)
+{
+ unsigned int i;
+
+ for (i = 0; i NUM_FORMATS; i++)
+ if (formats[i].fourcc == f-fmt.pix_mp.pixelformat)
+ return formats[i];
+ return NULL;
+}
+
+static int isp_video_output_start_streaming(struct vb2_queue *vq,
+ unsigned int count)
+{
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+
+ set_bit(STATE_RUNNING, isp-output_state);
+ return 0;
+}
+
+static int isp_video_output_stop_streaming(struct vb2_queue *vq)
+{
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf;
+
+ /* Release unused buffers */
+ while (!list_empty(isp-wait_queue)) {
+ buf = fimc_is_isp_wait_queue_get(isp);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+ while (!list_empty(isp-run_queue)) {
+ buf = fimc_is_isp_run_queue_get(isp);
+ vb2_buffer_done(buf-vb, VB2_BUF_STATE_ERROR);
+ }
+
+ clear_bit(STATE_RUNNING, isp-output_state);
+ return 0;
+}
+
+static int isp_video_output_queue_setup(struct vb2_queue *vq,
+ const struct v4l2_format *pfmt,
+ unsigned int *num_buffers, unsigned int *num_planes,
+ unsigned int sizes[], void *allocators[])
+{
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ const struct fimc_is_fmt *fmt = isp-fmt;
+ unsigned int wh, i;
+
+ if (!fmt)
+ return -EINVAL;
+
+ *num_planes = fmt-num_planes;
+ wh = isp-width * isp-height;
+
+ for (i = 0; i *num_planes; i++) {
+ allocators[i] = isp-alloc_ctx;
+ sizes[i] = (wh * fmt-depth[i]) / 8;
+ }
+ return 0;
+}
+
+static int isp_video_output_buffer_init(struct vb2_buffer *vb)
+{
+ struct fimc_is_buf *buf = container_of(vb, struct fimc_is_buf, vb);
+
+ buf-paddr[0] = vb2_dma_contig_plane_dma_addr(vb, 0);
+ return 0;
+}
+
+static int isp_video_output_buffer_prepare(struct vb2_buffer *vb)
+{
+ struct vb2_queue *vq = vb-vb2_queue;
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ unsigned long size;
+
+ size = (isp-width * isp-height * isp-fmt-depth[0]) / 8;
+ if (vb2_plane_size(vb, 0) size) {
+ v4l2_err(isp-subdev, User buffer too small (%ld %ld)\n,
+vb2_plane_size(vb, 0), size);
+ return -EINVAL;
+ }
+ vb2_set_plane_payload(vb, 0, size);
+
+ return 0;
+}
+
+static void isp_video_output_buffer_queue(struct vb2_buffer *vb)
+{
+ struct vb2_queue *vq = vb-vb2_queue;
+ struct fimc_is_isp *isp = vb2_get_drv_priv(vq);
+ struct fimc_is_buf *buf = container_of(vb, struct fimc_is_buf, vb);
+
+
[PATCH v8 12/12] V4L: Add driver for s5k4e5 image sensor
This patch adds subdev driver for Samsung S5K4E5 raw image sensor.
Like s5k6a3, it is also another fimc-is firmware controlled
sensor. This minimal sensor driver doesn't do any I2C communications
as its done by ISP firmware. It can be updated if needed to a
regular sensor driver by adding the I2C communication.
Signed-off-by: Arun Kumar K arun...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
.../devicetree/bindings/media/i2c/s5k4e5.txt | 45 +++
drivers/media/i2c/Kconfig |8 +
drivers/media/i2c/Makefile |1 +
drivers/media/i2c/s5k4e5.c | 347
4 files changed, 401 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
create mode 100644 drivers/media/i2c/s5k4e5.c
diff --git a/Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
b/Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
new file mode 100644
index 000..f8394b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/s5k4e5.txt
@@ -0,0 +1,45 @@
+* Samsung S5K4E5 Raw Image Sensor
+
+S5K4E5 is a raw image sensor with maximum resolution of 2560x1920
+pixels. Data transfer is carried out via MIPI CSI-2 port and controls
+via I2C bus.
+
+Required Properties:
+- compatible : must be samsung,s5k4e5
+- reg : I2C device address
+- reset-gpios : specifier of a GPIO connected to the RESET pin
+- clocks : should contain the sensor's EXTCLK clock specifier, from
+ the common clock bindings
+- clock-names : should contain extclk entry
+- svdda-supply : core voltage supply
+- svddio-supply: I/O voltage supply
+
+Optional Properties:
+- clock-frequency : the frequency at which the extclk clock should be
+ configured to operate, in Hz; if this property is not
+ specified default 24 MHz value will be used
+
+The device node should be added to respective control bus controller
+(e.g. I2C0) nodes and linked to the csis port node, using the common
+video interfaces bindings, defined in video-interfaces.txt.
+
+Example:
+
+ i2c-isp@1313 {
+ s5k4e5@20 {
+ compatible = samsung,s5k4e5;
+ reg = 0x20;
+ gpios = gpx1 2 1;
+ clock-frequency = 2400;
+ clocks = clock 129;
+ clock-names = mclk;
+ svdda-supply = ...;
+ svddio-supply = ...;
+ port {
+ is_s5k4e5_ep: endpoint {
+ data-lanes = 1 2 3 4;
+ remote-endpoint = csis0_ep;
+ };
+ };
+ };
+ };
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index f7e9147..271028b 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -572,6 +572,14 @@ config VIDEO_S5K6A3
This is a V4L2 sensor-level driver for Samsung S5K6A3 raw
camera sensor.
+config VIDEO_S5K4E5
+ tristate Samsung S5K4E5 sensor support
+ depends on MEDIA_CAMERA_SUPPORT
+ depends on I2C VIDEO_V4L2 VIDEO_V4L2_SUBDEV_API OF
+ ---help---
+ This is a V4L2 sensor-level driver for Samsung S5K4E5 raw
+ camera sensor.
+
config VIDEO_S5K4ECGX
tristate Samsung S5K4ECGX sensor support
depends on I2C VIDEO_V4L2 VIDEO_V4L2_SUBDEV_API
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index cf3cf03..0aeed8e 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -65,6 +65,7 @@ obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o
obj-$(CONFIG_VIDEO_NOON010PC30)+= noon010pc30.o
obj-$(CONFIG_VIDEO_S5K6AA) += s5k6aa.o
obj-$(CONFIG_VIDEO_S5K6A3) += s5k6a3.o
+obj-$(CONFIG_VIDEO_S5K4E5) += s5k4e5.o
obj-$(CONFIG_VIDEO_S5K4ECGX) += s5k4ecgx.o
obj-$(CONFIG_VIDEO_S5C73M3)+= s5c73m3/
obj-$(CONFIG_VIDEO_ADP1653)+= adp1653.o
diff --git a/drivers/media/i2c/s5k4e5.c b/drivers/media/i2c/s5k4e5.c
new file mode 100644
index 000..639062b
--- /dev/null
+++ b/drivers/media/i2c/s5k4e5.c
@@ -0,0 +1,347 @@
+/*
+ * Samsung S5K4E5 image sensor driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Arun Kumar K arun...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/delay.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/gpio.h
+#include linux/i2c.h
+#include linux/kernel.h
+#include linux/module.h
+#include linux/of_gpio.h
+#include linux/pm_runtime.h
+#include linux/regulator/consumer.h
+#include linux/slab.h
+#include
[PATCH v8 09/12] [media] exynos5-fimc-is: Add the hardware interface module
The hardware interface module finally sends the commands to the
FIMC-IS firmware and runs the interrupt handler for getting the
responses.
Signed-off-by: Arun Kumar K arun...@samsung.com
Signed-off-by: Kilyeon Im kilyeon...@samsung.com
Reviewed-by: Sylwester Nawrocki s.nawro...@samsung.com
---
.../media/platform/exynos5-is/fimc-is-interface.c | 810
.../media/platform/exynos5-is/fimc-is-interface.h | 124 +++
2 files changed, 934 insertions(+)
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.c
create mode 100644 drivers/media/platform/exynos5-is/fimc-is-interface.h
diff --git a/drivers/media/platform/exynos5-is/fimc-is-interface.c
b/drivers/media/platform/exynos5-is/fimc-is-interface.c
new file mode 100644
index 000..c5da6ff
--- /dev/null
+++ b/drivers/media/platform/exynos5-is/fimc-is-interface.c
@@ -0,0 +1,810 @@
+/*
+ * Samsung EXYNOS5 FIMC-IS (Imaging Subsystem) driver
+*
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Kil-yeon Lim kilyeon...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/debugfs.h
+#include linux/seq_file.h
+#include fimc-is.h
+#include fimc-is-cmd.h
+#include fimc-is-regs.h
+
+#define init_request_barrier(itf) mutex_init(itf-request_barrier)
+#define enter_request_barrier(itf) mutex_lock(itf-request_barrier)
+#define exit_request_barrier(itf) mutex_unlock(itf-request_barrier)
+
+static inline void itf_get_cmd(struct fimc_is_interface *itf,
+ struct fimc_is_msg *msg, unsigned int index)
+{
+ struct is_common_reg __iomem *com_regs = itf-com_regs;
+
+ memset(msg, 0, sizeof(*msg));
+
+ switch (index) {
+ case INTR_GENERAL:
+ msg-command = com_regs-ihcmd;
+ msg-instance = com_regs-ihc_sensorid;
+ memcpy(msg-param, com_regs-ihc_param,
+ 4 * sizeof(msg-param[0]));
+ break;
+ case INTR_SCC_FDONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-scc_sensor_id;
+ memcpy(msg-param, com_regs-scc_param,
+ 3 * sizeof(msg-param[0]));
+ break;
+ case INTR_SCP_FDONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-scp_sensor_id;
+ memcpy(msg-param, com_regs-scp_param,
+ 3 * sizeof(msg-param[0]));
+ break;
+ case INTR_META_DONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-meta_sensor_id;
+ msg-param[0] = com_regs-meta_param1;
+ break;
+ case INTR_SHOT_DONE:
+ msg-command = IHC_FRAME_DONE;
+ msg-instance = com_regs-shot_sensor_id;
+ memcpy(msg-param, com_regs-shot_param,
+ 2 * sizeof(msg-param[0]));
+ break;
+ default:
+ dev_err(itf-dev, %s Unknown command\n, __func__);
+ break;
+ }
+}
+
+static inline unsigned int itf_get_intr(struct fimc_is_interface *itf)
+{
+ unsigned int status;
+ struct is_common_reg __iomem *com_regs = itf-com_regs;
+
+ status = readl(itf-regs + INTMSR1) | com_regs-ihcmd_iflag |
+ com_regs-scc_iflag |
+ com_regs-scp_iflag |
+ com_regs-meta_iflag |
+ com_regs-shot_iflag;
+
+ return status;
+}
+
+static void itf_set_state(struct fimc_is_interface *itf,
+ unsigned long state)
+{
+ unsigned long flags;
+ spin_lock_irqsave(itf-slock_state, flags);
+ __set_bit(state, itf-state);
+ spin_unlock_irqrestore(itf-slock_state, flags);
+}
+
+static void itf_clr_state(struct fimc_is_interface *itf,
+ unsigned long state)
+{
+ unsigned long flags;
+ spin_lock_irqsave(itf-slock_state, flags);
+ __clear_bit(state, itf-state);
+ spin_unlock_irqrestore(itf-slock_state, flags);
+}
+
+static int itf_get_state(struct fimc_is_interface *itf,
+ unsigned long state)
+{
+ int ret = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(itf-slock_state, flags);
+ ret = test_bit(state, itf-state);
+ spin_unlock_irqrestore(itf-slock_state, flags);
+ return ret;
+}
+
+static void itf_init_wakeup(struct fimc_is_interface *itf)
+{
+ itf_set_state(itf, IS_IF_STATE_INIT);
+ wake_up(itf-irq_queue);
+}
+
+void itf_busy_wakeup(struct fimc_is_interface *itf)
+{
+ itf_clr_state(itf, IS_IF_STATE_BUSY);
+ wake_up(itf-irq_queue);
+}
+
+static int itf_wait_hw_ready(struct fimc_is_interface *itf)
+{
+ int t;
+ for (t = TRY_RECV_AWARE_COUNT; t = 0; t--) {
+ unsigned int cfg = readl(itf-regs + INTMSR0);
+
Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
Hi Mark,
On Thursday 12 of September 2013 11:40:27 Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Ensure that unused I2C controllers are not activated, causing problems
due to inappropriate pinmuxing or similar, by marking the controllers as
disabled by default and requiring boards to explicitly enable those that
are in use.
Signed-off-by: Mark Brown broo...@linaro.org
---
arch/arm/boot/dts/exynos5250-arndale.dts | 31
++-
arch/arm/boot/dts/exynos5250-smdk5250.dts | 25 +
arch/arm/boot/dts/exynos5250-snow.dts | 4
arch/arm/boot/dts/exynos5250.dtsi | 10 ++
4 files changed, 21 insertions(+), 49 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
b/arch/arm/boot/dts/exynos5250-arndale.dts index 4687fa0..4c10901 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -31,6 +31,7 @@
};
i2c@12C6 {
+ status = okay;
I would keep the status properties at the end of all properties, indicating
that at this point the description is complete and also to be consistent
with other dts files around.
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
samsung,i2c-slave-addr = 0x66;
@@ -319,16 +320,8 @@
};
};
- i2c@12C7 {
- status = disabled;
- };
-
- i2c@12C8 {
- status = disabled;
- };
-
i2c@12C9 {
- wm1811a@1a {
+ status = okay;
Hmm, I sense something wrong going on here.
compatible = wlf,wm1811;
reg = 0x1a;
@@ -346,26 +339,6 @@
};
};
- i2c@12CA {
- status = disabled;
- };
-
- i2c@12CB {
- status = disabled;
- };
-
- i2c@12CC {
- status = disabled;
- };
-
- i2c@12CD {
- status = disabled;
- };
-
- i2c@121D {
- status = disabled;
- };
-
dwmmc_0: dwmmc0@1220 {
num-slots = 1;
supports-highspeed;
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts
b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 67d3c43..90127e3
100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -28,6 +28,7 @@
};
i2c@12C6 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
@@ -62,6 +63,7 @@
};
i2c@12C7 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 2;
@@ -86,6 +88,7 @@
};
i2c@121D {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 4;
samsung,i2c-slave-addr = 0x38;
@@ -101,6 +104,7 @@
};
i2c@12C8 {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 66000;
@@ -110,27 +114,8 @@
};
};
- i2c@12C9 {
- status = disabled;
- };
-
- i2c@12CA {
- status = disabled;
- };
-
- i2c@12CB {
- status = disabled;
- };
-
- i2c@12CC {
- status = disabled;
- };
-
- i2c@12CD {
- status = disabled;
- };
-
i2c@12CE {
+ status = okay;
samsung,i2c-sda-delay = 100;
samsung,i2c-max-bus-freq = 66000;
diff --git a/arch/arm/boot/dts/exynos5250-snow.dts
b/arch/arm/boot/dts/exynos5250-snow.dts index fd711e2..b7674d5 100644
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -48,6 +48,10 @@
};
};
+ i2c@12CA {
+ status = okay;
Hmm, no other properties needed here?
+ };
+
i2c-arbitrator {
compatible = i2c-arb-gpio-challenge;
#address-cells = 1;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi
b/arch/arm/boot/dts/exynos5250.dtsi index a886ee4..4d6312e 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -229,6 +229,7 @@
i2c_0: i2c@12C6 {
compatible = samsung,s3c2440-i2c;
+ status = disabled;
For the sake of consistency, I would place the status property as last here
as well.
Best regards,
Tomasz
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[PATCH v3 2/4] [media] exynos-scaler: Add core functionality for the SCALER driver
This patch adds the core functionality for the SCALER driver.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/media/platform/exynos-scaler/scaler.c | 1261 +
drivers/media/platform/exynos-scaler/scaler.h | 385
2 files changed, 1646 insertions(+)
create mode 100644 drivers/media/platform/exynos-scaler/scaler.c
create mode 100644 drivers/media/platform/exynos-scaler/scaler.h
diff --git a/drivers/media/platform/exynos-scaler/scaler.c
b/drivers/media/platform/exynos-scaler/scaler.c
new file mode 100644
index 000..c22707c
--- /dev/null
+++ b/drivers/media/platform/exynos-scaler/scaler.c
@@ -0,0 +1,1261 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung EXYNOS5 SoC series SCALER driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/interrupt.h
+#include linux/module.h
+#include linux/of_platform.h
+#include linux/pm_runtime.h
+
+#include scaler-regs.h
+
+#define SCALER_CLOCK_GATE_NAME scaler
+
+static const struct scaler_fmt scaler_formats[] = {
+ {
+ .name = YUV 4:2:0 non-contig. 2p, Y/CbCr,
+ .pixelformat= V4L2_PIX_FMT_NV12M,
+ .depth = { 8, 4 },
+ .color = SCALER_YUV420,
+ .color_order= SCALER_CBCR,
+ .num_planes = 2,
+ .num_comp = 2,
+ .scaler_color = SCALER_YUV420_2P_Y_UV,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+
+ }, {
+ .name = YUV 4:2:0 contig. 2p, Y/CbCr,
+ .pixelformat= V4L2_PIX_FMT_NV12,
+ .depth = { 12 },
+ .color = SCALER_YUV420,
+ .color_order= SCALER_CBCR,
+ .num_planes = 1,
+ .num_comp = 2,
+ .scaler_color = SCALER_YUV420_2P_Y_UV,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+ }, {
+ .name = YUV 4:2:0 n.c. 2p, Y/CbCr tiled,
+ .pixelformat= V4L2_PIX_FMT_NV12MT_16X16,
+ .depth = { 8, 4 },
+ .color = SCALER_YUV420,
+ .color_order= SCALER_CBCR,
+ .num_planes = 2,
+ .num_comp = 2,
+ .scaler_color = SCALER_YUV420_2P_Y_UV,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_TILED),
+ }, {
+ .name = YUV 4:2:2 contig. 2p, Y/CbCr,
+ .pixelformat= V4L2_PIX_FMT_NV16,
+ .depth = { 16 },
+ .color = SCALER_YUV422,
+ .color_order= SCALER_CBCR,
+ .num_planes = 1,
+ .num_comp = 2,
+ .scaler_color = SCALER_YUV422_2P_Y_UV,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+ }, {
+ .name = YUV 4:4:4 contig. 2p, Y/CbCr,
+ .pixelformat= V4L2_PIX_FMT_NV24,
+ .depth = { 24 },
+ .color = SCALER_YUV444,
+ .color_order= SCALER_CBCR,
+ .num_planes = 1,
+ .num_comp = 2,
+ .scaler_color = SCALER_YUV444_2P_Y_UV,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+ }, {
+ .name = RGB565,
+ .pixelformat= V4L2_PIX_FMT_RGB565X,
+ .depth = { 16 },
+ .color = SCALER_RGB,
+ .num_planes = 1,
+ .num_comp = 1,
+ .scaler_color = SCALER_RGB565,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+ }, {
+ .name = XRGB-1555, 16 bpp,
+ .pixelformat= V4L2_PIX_FMT_RGB555,
+ .depth = { 16 },
+ .color = SCALER_RGB,
+ .num_planes = 1,
+ .num_comp = 1,
+ .scaler_color = SCALER_ARGB1555,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+ }, {
+ .name = XRGB-, 32 bpp,
+ .pixelformat= V4L2_PIX_FMT_RGB32,
+ .depth = { 32 },
+ .color = SCALER_RGB,
+ .num_planes = 1,
+ .num_comp = 1,
+ .scaler_color = SCALER_ARGB,
+ .flags = (SCALER_FMT_SRC | SCALER_FMT_DST),
+ }, {
+ .name = YUV 4:2:2 packed, YCrYCb,
+ .pixelformat= V4L2_PIX_FMT_YVYU,
+ .depth = { 16
[PATCH v3 4/4] [media] exynos-scaler: Add DT bindings for SCALER driver
This patch adds the DT binding documentation for the
Exynos5420/5410 based SCALER device driver.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
.../devicetree/bindings/media/exynos5-scaler.txt | 22
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/exynos5-scaler.txt
diff --git a/Documentation/devicetree/bindings/media/exynos5-scaler.txt
b/Documentation/devicetree/bindings/media/exynos5-scaler.txt
new file mode 100644
index 000..f620baf
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/exynos5-scaler.txt
@@ -0,0 +1,22 @@
+* Samsung Exynos5 SCALER device
+
+SCALER is used for scaling, blending, color fill and color space
+conversion on EXYNOS[5420/5410] SoCs.
+
+Required properties:
+- compatible: should be samsung,exynos5420-scaler or
+ samsung,exynos5410-scaler
+- reg: should contain SCALER physical address location and length.
+- interrupts: should contain SCALER interrupt number
+- clocks: should contain the SCALER clock specifier, from the
+ common clock bindings
+- clock-names: should be scaler
+
+Example:
+ scaler_0: scaler@0x1280 {
+ compatible = samsung,exynos5420-scaler;
+ reg = 0x1280 0x1000;
+ interrupts = 0 220 0;
+ clocks = clock 381;
+ clock-names = scaler;
+ };
--
1.7.9.5
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[PATCH v3 3/4] [media] exynos-scaler: Add m2m functionality for the SCALER driver
This patch adds the Makefile and memory to memory (m2m) interface
functionality for the SCALER driver.
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/media/platform/Kconfig|8 +
drivers/media/platform/Makefile |1 +
drivers/media/platform/exynos-scaler/Makefile |3 +
drivers/media/platform/exynos-scaler/scaler-m2m.c | 781 +
4 files changed, 793 insertions(+)
create mode 100644 drivers/media/platform/exynos-scaler/Makefile
create mode 100644 drivers/media/platform/exynos-scaler/scaler-m2m.c
diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index 8068d7b..339d3ba 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -201,6 +201,14 @@ config VIDEO_SAMSUNG_EXYNOS_GSC
help
This is a v4l2 driver for Samsung EXYNOS5 SoC G-Scaler.
+config VIDEO_SAMSUNG_EXYNOS_SCALER
+ tristate Samsung Exynos SCALER driver
+ depends on OF VIDEO_DEV VIDEO_V4L2 ARCH_EXYNOS5
+ select VIDEOBUF2_DMA_CONTIG
+ select V4L2_MEM2MEM_DEV
+ help
+ This is a v4l2 driver for Samsung EXYNOS5410/5420 SoC SCALER.
+
config VIDEO_SH_VEU
tristate SuperH VEU mem2mem video processing driver
depends on VIDEO_DEV VIDEO_V4L2 GENERIC_HARDIRQS HAS_DMA
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index 4e4da48..14cdad5 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_TV)+= s5p-tv/
obj-$(CONFIG_VIDEO_SAMSUNG_S5P_G2D)+= s5p-g2d/
obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_GSC) += exynos-gsc/
+obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_SCALER) += exynos-scaler/
obj-$(CONFIG_BLACKFIN) += blackfin/
diff --git a/drivers/media/platform/exynos-scaler/Makefile
b/drivers/media/platform/exynos-scaler/Makefile
new file mode 100644
index 000..6c8a25b
--- /dev/null
+++ b/drivers/media/platform/exynos-scaler/Makefile
@@ -0,0 +1,3 @@
+exynos-scaler-objs := scaler.o scaler-m2m.o scaler-regs.o
+
+obj-$(CONFIG_VIDEO_SAMSUNG_EXYNOS_SCALER) += exynos-scaler.o
diff --git a/drivers/media/platform/exynos-scaler/scaler-m2m.c
b/drivers/media/platform/exynos-scaler/scaler-m2m.c
new file mode 100644
index 000..eb32f2f
--- /dev/null
+++ b/drivers/media/platform/exynos-scaler/scaler-m2m.c
@@ -0,0 +1,781 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung EXYNOS5 SoC series SCALER driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/module.h
+#include linux/pm_runtime.h
+
+#include media/v4l2-ioctl.h
+
+#include scaler-regs.h
+
+#define SCALER_DEF_PIX_FMT V4L2_PIX_FMT_RGB32
+#define SCALER_DEF_WIDTH 1280
+#define SCALER_DEF_HEIGHT 720
+
+static int scaler_m2m_ctx_stop_req(struct scaler_ctx *ctx)
+{
+ struct scaler_ctx *curr_ctx;
+ struct scaler_dev *scaler = ctx-scaler_dev;
+ int ret;
+
+ curr_ctx = v4l2_m2m_get_curr_priv(scaler-m2m.m2m_dev);
+ if (!scaler_m2m_pending(scaler) || (curr_ctx != ctx))
+ return 0;
+
+ scaler_ctx_state_lock_set(SCALER_CTX_STOP_REQ, ctx);
+ ret = wait_event_timeout(scaler-irq_queue,
+ !scaler_ctx_state_is_set(SCALER_CTX_STOP_REQ, ctx),
+ SCALER_SHUTDOWN_TIMEOUT);
+
+ return ret == 0 ? -ETIMEDOUT : ret;
+}
+
+static int scaler_m2m_start_streaming(struct vb2_queue *q, unsigned int count)
+{
+ struct scaler_ctx *ctx = q-drv_priv;
+ int ret;
+
+ ret = pm_runtime_get_sync(ctx-scaler_dev-pdev-dev);
+
+ return ret 0 ? 0 : ret;
+}
+
+static int scaler_m2m_stop_streaming(struct vb2_queue *q)
+{
+ struct scaler_ctx *ctx = q-drv_priv;
+ int ret;
+
+ ret = scaler_m2m_ctx_stop_req(ctx);
+ if (ret 0)
+ scaler_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR);
+
+ pm_runtime_put(ctx-scaler_dev-pdev-dev);
+
+ return 0;
+}
+
+void scaler_m2m_job_finish(struct scaler_ctx *ctx, int vb_state)
+{
+ struct vb2_buffer *src_vb, *dst_vb;
+
+ if (!ctx || !ctx-m2m_ctx)
+ return;
+
+ src_vb = v4l2_m2m_src_buf_remove(ctx-m2m_ctx);
+ dst_vb = v4l2_m2m_dst_buf_remove(ctx-m2m_ctx);
+
+ if (src_vb dst_vb) {
+ v4l2_m2m_buf_done(src_vb, vb_state);
+ v4l2_m2m_buf_done(dst_vb, vb_state);
+
+ v4l2_m2m_job_finish(ctx-scaler_dev-m2m.m2m_dev,
+ ctx-m2m_ctx);
+ }
+}
+
+static void scaler_m2m_job_abort(void *priv)
+{
+ struct scaler_ctx *ctx = priv;
+ int ret;
+
+ ret = scaler_m2m_ctx_stop_req(ctx);
+ if (ret 0)
+
[PATCH v3 1/4] [media] exynos-scaler: Add new driver for Exynos5 SCALER
This patch adds support for SCALER device which is a new device
for scaling, blending, color fill and color space conversion
on EXYNOS5410 and EXYNOS5420 SoCs.
This device supports the followings as key feature.
input image format
- YCbCr420 2P(UV/VU), 3P
- YCbCr422 1P(YUYV/UYVY/YVYU), 2P(UV,VU), 3P
- YCbCr444 2P(UV,VU), 3P
- RGB565, ARGB1555, ARGB, ARGB, RGBA
- Pre-multiplexed ARGB, L8A8 and L8
output image format
- YCbCr420 2P(UV/VU), 3P
- YCbCr422 1P(YUYV/UYVY/YVYU), 2P(UV,VU), 3P
- YCbCr444 2P(UV,VU), 3P
- RGB565, ARGB1555, ARGB, ARGB, RGBA
- Pre-multiplexed ARGB
input rotation
- 0/90/180/270 degree, X/Y/XY Flip
scale ratio
- 1/4 scale down to 16 scale up
color space conversion
- RGB to YUV / YUV to RGB
Size - Exynos5420
- Input : 16x16 to 8192x8192
- Output: 4x4 to 8192x8192
Size - Exynos5410
- Input/Output: 4x4 to 4096x4096
alpha blending, color fill
Signed-off-by: Shaik Ameer Basha shaik.am...@samsung.com
---
drivers/media/platform/exynos-scaler/scaler-regs.c | 334
drivers/media/platform/exynos-scaler/scaler-regs.h | 331 +++
2 files changed, 665 insertions(+)
create mode 100644 drivers/media/platform/exynos-scaler/scaler-regs.c
create mode 100644 drivers/media/platform/exynos-scaler/scaler-regs.h
diff --git a/drivers/media/platform/exynos-scaler/scaler-regs.c
b/drivers/media/platform/exynos-scaler/scaler-regs.c
new file mode 100644
index 000..6c488ce
--- /dev/null
+++ b/drivers/media/platform/exynos-scaler/scaler-regs.c
@@ -0,0 +1,334 @@
+/*
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung EXYNOS5 SoC series SCALER driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/delay.h
+#include linux/platform_device.h
+
+#include scaler-regs.h
+
+/* Scaler reset timeout in milliseconds */
+#define SCALER_RESET_TIMEOUT 50
+
+void scaler_hw_set_sw_reset(struct scaler_dev *dev)
+{
+ u32 cfg;
+
+ cfg = scaler_read(dev, SCALER_CFG);
+ cfg |= SCALER_CFG_SOFT_RESET;
+
+ scaler_write(dev, SCALER_CFG, cfg);
+}
+
+int scaler_wait_reset(struct scaler_dev *dev)
+{
+ unsigned long end = jiffies + msecs_to_jiffies(SCALER_RESET_TIMEOUT);
+ u32 cfg, reset_done = 0;
+
+ while (time_before(jiffies, end)) {
+ cfg = scaler_read(dev, SCALER_CFG);
+ if (!(cfg SCALER_CFG_SOFT_RESET)) {
+ reset_done = 1;
+ break;
+ }
+ usleep_range(10, 20);
+ }
+
+ /*
+* Write any value to read/write register and read it back.
+* If the written and read value matches, then the reset process is
+* succeeded.
+*/
+ while (reset_done) {
+
+ /*
+* [TODO] need to define number of tries before returning
+* -EBUSY to the caller
+*/
+
+ scaler_write(dev, SCALER_CFG_SOFT_RESET_CHECK_REG,
+ SCALER_CFG_SOFT_RESET_CHECK_VAL);
+ if (SCALER_CFG_SOFT_RESET_CHECK_VAL ==
+ scaler_read(dev, SCALER_CFG_SOFT_RESET_CHECK_REG))
+ return 0;
+ }
+
+ return -EBUSY;
+}
+
+void scaler_hw_set_irq(struct scaler_dev *dev, int irq_num, bool enable)
+{
+ u32 cfg;
+
+ if ((irq_num SCALER_INT_FRAME_END) ||
+ (irq_num SCALER_INT_TIMEOUT))
+ return;
+
+ cfg = scaler_read(dev, SCALER_INT_EN);
+ if (enable)
+ cfg |= (1 irq_num);
+ else
+ cfg = ~(1 irq_num);
+ scaler_write(dev, SCALER_INT_EN, cfg);
+}
+
+void scaler_hw_set_input_addr(struct scaler_dev *dev, struct scaler_addr *addr)
+{
+ scaler_dbg(dev, src_buf: 0x%x, cb: 0x%x, cr: 0x%x,
+ addr-y, addr-cb, addr-cr);
+ scaler_write(dev, SCALER_SRC_Y_BASE, addr-y);
+ scaler_write(dev, SCALER_SRC_CB_BASE, addr-cb);
+ scaler_write(dev, SCALER_SRC_CR_BASE, addr-cr);
+}
+
+void scaler_hw_set_output_addr(struct scaler_dev *dev,
+struct scaler_addr *addr)
+{
+ scaler_dbg(dev, dst_buf: 0x%x, cb: 0x%x, cr: 0x%x,
+ addr-y, addr-cb, addr-cr);
+ scaler_write(dev, SCALER_DST_Y_BASE, addr-y);
+ scaler_write(dev, SCALER_DST_CB_BASE, addr-cb);
+ scaler_write(dev, SCALER_DST_CR_BASE, addr-cr);
+}
+
+void scaler_hw_set_in_size(struct scaler_ctx *ctx)
+{
+ struct scaler_dev *dev = ctx-scaler_dev;
+ struct scaler_frame *frame = ctx-s_frame;
+ u32 cfg;
+
+ /* set input pixel offset */
+
[PATCH v3 0/4] Exynos5 Series SCALER Driver
This patch adds support for SCALER device which is a new device for scaling, blending, color fill and color space conversion on EXYNOS5410/5420 SoCs. This device supports the following as key features. input image format - YCbCr420 2P(UV/VU), 3P - YCbCr422 1P(YUYV/UYVY/YVYU), 2P(UV,VU), 3P - YCbCr444 2P(UV,VU), 3P - RGB565, ARGB1555, ARGB, ARGB, RGBA - Pre-multiplexed ARGB, L8A8 and L8 output image format - YCbCr420 2P(UV/VU), 3P - YCbCr422 1P(YUYV/UYVY/YVYU), 2P(UV,VU), 3P - YCbCr444 2P(UV,VU), 3P - RGB565, ARGB1555, ARGB, ARGB, RGBA - Pre-multiplexed ARGB input rotation - 0/90/180/270 degree, X/Y/XY Flip scale ratio - 1/4 scale down to 16 scale up color space conversion - RGB to YUV / YUV to RGB Size - Exynos5420 - Input : 16x16 to 8192x8192 - Output: 4x4 to 8192x8192 Size - Exynos5410 - Input/Output: 4x4 to 4096x4096 alpha blending, color fill Rebased on: --- git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git:master Changes from v2: --- Addressed review comments from, Inki Dae, Hans Verkuil and Sylwester Nawrocki Links to the review comments: 1] https://linuxtv.org/patch/19783/ 2] https://linuxtv.org/patch/19784/ 3] https://linuxtv.org/patch/19785/ 4] https://linuxtv.org/patch/19786/ 5] https://linuxtv.org/patch/19787/ Changes from v1: --- 1] Split the previous single patch into multiple patches. 2] Added DT binding documentation. 3] Removed the unnecessary header file inclusions. 4] Fix the condition check in mscl_prepare_address for swapping cb/cr addresses. Shaik Ameer Basha (4): [media] exynos-scaler: Add new driver for Exynos5 SCALER [media] exynos-scaler: Add core functionality for the SCALER driver [media] exynos-scaler: Add m2m functionality for the SCALER driver [media] exynos-scaler: Add DT bindings for SCALER driver .../devicetree/bindings/media/exynos5-scaler.txt | 22 + drivers/media/platform/Kconfig |8 + drivers/media/platform/Makefile|1 + drivers/media/platform/exynos-scaler/Makefile |3 + drivers/media/platform/exynos-scaler/scaler-m2m.c | 781 drivers/media/platform/exynos-scaler/scaler-regs.c | 334 ++ drivers/media/platform/exynos-scaler/scaler-regs.h | 331 + drivers/media/platform/exynos-scaler/scaler.c | 1261 drivers/media/platform/exynos-scaler/scaler.h | 385 ++ 9 files changed, 3126 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/exynos5-scaler.txt create mode 100644 drivers/media/platform/exynos-scaler/Makefile create mode 100644 drivers/media/platform/exynos-scaler/scaler-m2m.c create mode 100644 drivers/media/platform/exynos-scaler/scaler-regs.c create mode 100644 drivers/media/platform/exynos-scaler/scaler-regs.h create mode 100644 drivers/media/platform/exynos-scaler/scaler.c create mode 100644 drivers/media/platform/exynos-scaler/scaler.h -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] ARM: dts: Leave Exynos5250 SPI controller disabled by default
On Thu, Sep 12, 2013 at 01:56:44PM +0200, Tomasz Figa wrote: I wonder if exynos5250-arndale shouldn't be also considered in this patch. There are no SPI devices on that board (at least not ones that are currently instantiated by the DT). signature.asc Description: Digital signature
Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On Thu, Sep 12, 2013 at 02:58:59PM +0200, Tomasz Figa wrote:
On Thursday 12 of September 2013 11:40:27 Mark Brown wrote:
Please delete unneeded context from your mails, it makes it much easier
to find the new content.
+ i2c@12CA {
+ status = okay;
Hmm, no other properties needed here?
Apparently not, it looks like the binding for the aribtrator doesn't sit
as a child of the bus it's arbitrating - this is the controller
referenced from the arbitrator node.
signature.asc
Description: Digital signature
Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On 09/12/2013 06:58 AM, Tomasz Figa wrote:
Hi Mark,
On Thursday 12 of September 2013 11:40:27 Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Ensure that unused I2C controllers are not activated, causing problems
due to inappropriate pinmuxing or similar, by marking the controllers as
disabled by default and requiring boards to explicitly enable those that
are in use.
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
i2c@12C6 {
+status = okay;
I would keep the status properties at the end of all properties, indicating
that at this point the description is complete and also to be consistent
with other dts files around.
DT doesn't define any kind of ordering for the properties AFAIK, so the
order shouldn't matter in practice; it conveys no semantic
representation as far as the parsing code is concerned even if a human
may be influenced otherwise:-)
Just as an FYI, the rule I've been trying to follow in Tegra DT files is
that properties that are overridden from any included .dtsi file come
first, followed by any new properties. Still, there's no particular
reason anyone else has to follow that layout.
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Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On Thursday 12 of September 2013 14:52:33 Mark Brown wrote:
On Thu, Sep 12, 2013 at 02:58:59PM +0200, Tomasz Figa wrote:
On Thursday 12 of September 2013 11:40:27 Mark Brown wrote:
Please delete unneeded context from your mails, it makes it much easier
to find the new content.
I always snip unnecessary parts of quoted message if its really long, but
if its length is in acceptable range then I try to keep the whole message
just for reference.
+ i2c@12CA {
+ status = okay;
Hmm, no other properties needed here?
Apparently not, it looks like the binding for the aribtrator doesn't sit
as a child of the bus it's arbitrating - this is the controller
referenced from the arbitrator node.
i2c@12CA does look like a normal hardware I2C controller, which needs
some extra properties like samsung,i2c-sda-delay or samsung,i2c-max-bus-
freq. However they are specified in cros5250-common.dtsi, so I'd say that
this might be better place for the status override as well.
Best regards,
Tomasz
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Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On Thursday 12 of September 2013 09:03:23 Stephen Warren wrote:
On 09/12/2013 06:58 AM, Tomasz Figa wrote:
Hi Mark,
On Thursday 12 of September 2013 11:40:27 Mark Brown wrote:
From: Mark Brown broo...@linaro.org
Ensure that unused I2C controllers are not activated, causing problems
due to inappropriate pinmuxing or similar, by marking the controllers
as
disabled by default and requiring boards to explicitly enable those
that
are in use.
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts
i2c@12C6 {
+ status = okay;
I would keep the status properties at the end of all properties,
indicating that at this point the description is complete and also to
be consistent with other dts files around.
DT doesn't define any kind of ordering for the properties AFAIK, so the
order shouldn't matter in practice; it conveys no semantic
representation as far as the parsing code is concerned even if a human
may be influenced otherwise:-)
Well, this is somehow similar to code, maybe not exactly in case of
ordering, but coding style and conventions. Unreadable code can do exactly
the same thing as readable code, while we somehow prefer the readable one.
Just as an FYI, the rule I've been trying to follow in Tegra DT files is
that properties that are overridden from any included .dtsi file come
first, followed by any new properties. Still, there's no particular
reason anyone else has to follow that layout.
On Exynos I've been trying to keep status as the last property, compatible
as first, followed by reg and without any specific order of any other
properties. Again, this is simply to keep some consistence across the dtses
making them easier to read.
Best regards,
Tomasz
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Re: [PATCH 2/3] ARM: dts: Leave Exynos5250 SPI controller disabled by default
On Thursday 12 of September 2013 14:50:28 Mark Brown wrote: On Thu, Sep 12, 2013 at 01:56:44PM +0200, Tomasz Figa wrote: I wonder if exynos5250-arndale shouldn't be also considered in this patch. There are no SPI devices on that board (at least not ones that are currently instantiated by the DT). I can see a bunch of nodes simply adding status = disabled in dts of arndale. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/3] ARM: dts: Leave Exynos5250 SPI controller disabled by default
On Thu, Sep 12, 2013 at 05:51:58PM +0200, Tomasz Figa wrote: On Thursday 12 of September 2013 14:50:28 Mark Brown wrote: There are no SPI devices on that board (at least not ones that are currently instantiated by the DT). I can see a bunch of nodes simply adding status = disabled in dts of arndale. Meh, gone now. signature.asc Description: Digital signature
Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On Thu, Sep 12, 2013 at 05:55:59PM +0200, Tomasz Figa wrote: On Thursday 12 of September 2013 14:52:33 Mark Brown wrote: Please delete unneeded context from your mails, it makes it much easier to find the new content. I always snip unnecessary parts of quoted message if its really long, but if its length is in acceptable range then I try to keep the whole message just for reference. I tend to say that when I find myself paging through entire screens of quote and can't see the relevance to any content I eventually find. i2c@12CA does look like a normal hardware I2C controller, which needs some extra properties like samsung,i2c-sda-delay or samsung,i2c-max-bus- Shouldn't these have sane defaults? freq. However they are specified in cros5250-common.dtsi, so I'd say that this might be better place for the status override as well. Can we rename that file to something like exynos5250-cros-common.dtsi so that it's obvious it's relevant to exynos? I had completely failed to notice that it was anything to do with Exynos when I was searching for affected DTS files. Especially given that it's included in exactly one DTS at the minute... signature.asc Description: Digital signature
Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On Thursday 12 of September 2013 21:00:13 Mark Brown wrote: On Thu, Sep 12, 2013 at 05:55:59PM +0200, Tomasz Figa wrote: On Thursday 12 of September 2013 14:52:33 Mark Brown wrote: Please delete unneeded context from your mails, it makes it much easier to find the new content. I always snip unnecessary parts of quoted message if its really long, but if its length is in acceptable range then I try to keep the whole message just for reference. I tend to say that when I find myself paging through entire screens of quote and can't see the relevance to any content I eventually find. Hmm, looking at it here from my desktop, I could have dropped some of the context between second and third reply indeed. i2c@12CA does look like a normal hardware I2C controller, which needs some extra properties like samsung,i2c-sda-delay or samsung,i2c-max-bus- Shouldn't these have sane defaults? AFAIK those parameters are highly board specific so it would be hard to set any reasonable default for them. freq. However they are specified in cros5250-common.dtsi, so I'd say that this might be better place for the status override as well. Can we rename that file to something like exynos5250-cros-common.dtsi so that it's obvious it's relevant to exynos? I had completely failed to notice that it was anything to do with Exynos when I was searching for affected DTS files. Especially given that it's included in exactly one DTS at the minute... Yes, it would surely make sense to do so, unless there is another cros board that could use this dtsi and is based on another SoC, which I doubt, because there are multiple SoC specific values specified inside it. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/3] ARM: dts: Disable I2C controllers by default on Exynos5250
On Fri, Sep 13, 2013 at 01:02:11AM +0200, Tomasz Figa wrote: On Thursday 12 of September 2013 21:00:13 Mark Brown wrote: i2c@12CA does look like a normal hardware I2C controller, which needs some extra properties like samsung,i2c-sda-delay or samsung,i2c-max-bus- Shouldn't these have sane defaults? AFAIK those parameters are highly board specific so it would be hard to set any reasonable default for them. At least the maximum bus frequency should be able to be set to 100Hz by default, that's the minimum from the I2C spec though pretty much everything does at least 400Hz. sda-delay should really be able to default to either zero or something per-SoC, I don't remember having to tune it when using board files and I2C is generally pretty robust so it'd be surprising if it were that sensitive to system design. signature.asc Description: Digital signature
Re: [PATCH 1/3] dmaengine: pl330: Set residue in tx_status callback.
Hi Chanho,
On Thu, Sep 12, 2013 at 5:10 PM, Chanho Park chanho61.p...@samsung.com wrote:
Hi Padmavathi,
-Original Message-
From: linux-arm-kernel [mailto:linux-arm-kernel-
boun...@lists.infradead.org] On Behalf Of Padmavathi Venna
Sent: Wednesday, September 11, 2013 3:08 PM
To: linux-samsung-soc@vger.kernel.org; linux-arm-
ker...@lists.infradead.org; padm...@samsung.com; padma@gmail.com
Cc: kgene@samsung.com; a...@arndb.de; sbki...@samsung.com;
vinod.k...@intel.com; broo...@kernel.org; dgr...@chromium.org;
ol...@chromium.org
Subject: [PATCH 1/3] dmaengine: pl330: Set residue in tx_status callback.
From: Dylan Reid dgr...@chromium.org
Fill txstate.residue with the amount of bytes remaining in the current
transfer if the transfer is not complete. This will be of particular use
to i2s DMA transfers, providing more accurate hw_ptr values to ASoC.
Signed-off-by: Dylan Reid dgr...@chromium.org
Reviewed-by: Olof Johansson ol...@chromium.org
Signed-off-by: Padmavathi Venna padm...@samsung.com
---
drivers/dma/pl330.c | 55
++-
1 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c index
593827b..7ab9136 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -2476,11 +2476,64 @@ static void pl330_free_chan_resources(struct
dma_chan *chan)
spin_unlock_irqrestore(pch-lock, flags); }
+static inline int
+pl330_src_addr_in_desc(struct dma_pl330_desc *desc, unsigned int sar) {
+ return ((desc-px.src_addr = sar)
+ (sar = (desc-px.src_addr + desc-px.bytes))); }
+
+static inline int
+pl330_dst_addr_in_desc(struct dma_pl330_desc *desc, unsigned int dar) {
+ return ((desc-px.dst_addr = dar)
+ (dar = (desc-px.dst_addr + desc-px.bytes))); }
+
+static unsigned int pl330_tx_residue(struct dma_chan *chan) {
+ struct dma_pl330_chan *pch = to_pchan(chan);
+ void __iomem *regs = pch-dmac-pif.base;
+ struct pl330_thread *thrd = pch-pl330_chid;
+ struct dma_pl330_desc *desc;
+ unsigned int sar, dar;
+ unsigned int residue = 0;
+ unsigned long flags;
+
+ sar = readl(regs + SA(thrd-id));
+ dar = readl(regs + DA(thrd-id));
+
+ spin_lock_irqsave(pch-lock, flags);
+
+ /* Find the desc related to the current buffer. */
+ list_for_each_entry(desc, pch-work_list, node) {
+ if (desc-rqcfg.src_inc pl330_src_addr_in_desc(desc,
sar)) {
+ residue = desc-px.bytes - (sar -
desc-px.src_addr);
+ goto found_unlock;
+ }
+ if (desc-rqcfg.dst_inc pl330_dst_addr_in_desc(desc,
dar)) {
+ residue = desc-px.bytes - (dar -
desc-px.dst_addr);
+ goto found_unlock;
+ }
+ }
+
+found_unlock:
+ spin_unlock_irqrestore(pch-lock, flags);
+
+ return residue;
+}
+
static enum dma_status
pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
- return dma_cookie_status(chan, cookie, txstate);
+ enum dma_status ret;
+
+ ret = dma_cookie_status(chan, cookie, txstate);
+ if (ret != DMA_SUCCESS) /* Not complete, check amount left. */
+ dma_set_residue(txstate, pl330_tx_residue(chan));
+
+ return ret;
Why didn't you use a cookie value to track the request?
The cookie is assigned when each transfer is submitted.
If you save the value in the desc, we can find the request easily.
Ok. I will check this and modify the code in the next version of patches.
Thanks for the suggestion.
Thanks,
Best Regards,
Chanho Park
Best Regards
Padma
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