Re: [PATCH v3 05/14] drm: bridge/analogix_dp: fix link_rate lane_count bug
Hi Jingoo,
On 08/20/2015 02:22 AM, Jingoo Han wrote:
On 2015. 8. 19., at PM 11:50, Yakir Yang y...@rock-chips.com wrote:
link_rate and lane_count already configed in analogix_dp_set_link_train(),
s/configed/configured
Also, the commit name such as fix ... bug is not good.
How about following?
drm: bridge/analogix_dp: remove duplicate configuration of link rate and link
count
Thanks, done, it's more readable.
- Yakir
Best regards,
Jingoo Han
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- Take Thierry Reding suggest, link_rate and lane_count shouldn't config to
the DT property value directly, but we can take those as hardware limite.
For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane,
so DT property would like link-rate = 0x0a lane-count = 4.
Changes in v2: None
drivers/gpu/drm/bridge/analogix_dp_core.c | 16
drivers/gpu/drm/bridge/analogix_dp_core.h | 9 +
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix_dp_core.c
index 480cc13..1778e0a 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
@@ -635,6 +635,8 @@ static void analogix_dp_get_max_rx_bandwidth(struct
analogix_dp_device *dp,
/*
* For DP rev.1.1, Maximum link rate of Main Link lanes
* 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
+ * For DP rev.1.2, Maximum link rate of Main Link lanes
+ * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
*/
analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, data);
*bandwidth = data;
@@ -668,7 +670,8 @@ static void analogix_dp_init_training(struct
analogix_dp_device *dp,
analogix_dp_get_max_rx_lane_count(dp, dp-link_train.lane_count);
if ((dp-link_train.link_rate != LINK_RATE_1_62GBPS)
-(dp-link_train.link_rate != LINK_RATE_2_70GBPS)) {
+(dp-link_train.link_rate != LINK_RATE_2_70GBPS)
+(dp-link_train.link_rate != LINK_RATE_5_40GBPS)) {
dev_err(dp-dev, Rx Max Link Rate is abnormal :%x !\n,
dp-link_train.link_rate);
dp-link_train.link_rate = LINK_RATE_1_62GBPS;
@@ -901,8 +904,8 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
return;
}
-ret = analogix_dp_set_link_train(dp, dp-video_info-lane_count,
- dp-video_info-link_rate);
+ret = analogix_dp_set_link_train(dp, dp-video_info-max_lane_count,
+ dp-video_info-max_link_rate);
if (ret) {
dev_err(dp-dev, unable to do link train\n);
return;
@@ -912,9 +915,6 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
analogix_dp_enable_enhanced_mode(dp, 1);
-analogix_dp_set_lane_count(dp, dp-video_info-lane_count);
-analogix_dp_set_link_bandwidth(dp, dp-video_info-link_rate);
-
analogix_dp_init_video(dp);
ret = analogix_dp_config_video(dp);
if (ret)
@@ -1198,13 +1198,13 @@ static struct video_info
*analogix_dp_dt_parse_pdata(struct device *dev)
}
if (of_property_read_u32(dp_node, analogix,link-rate,
- dp_video_config-link_rate)) {
+ dp_video_config-max_link_rate)) {
dev_err(dev, failed to get link-rate\n);
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, analogix,lane-count,
- dp_video_config-lane_count)) {
+ dp_video_config-max_lane_count)) {
dev_err(dev, failed to get lane-count\n);
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.h
b/drivers/gpu/drm/bridge/analogix_dp_core.h
index 2cefde9..941b34f 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.h
@@ -21,8 +21,9 @@
#define MAX_EQ_LOOP 5
enum link_rate_type {
-LINK_RATE_1_62GBPS = 0x06,
-LINK_RATE_2_70GBPS = 0x0a
+LINK_RATE_1_62GBPS = DP_LINK_BW_1_62,
+LINK_RATE_2_70GBPS = DP_LINK_BW_2_7,
+LINK_RATE_5_40GBPS = DP_LINK_BW_5_4,
};
enum link_lane_count_type {
@@ -128,8 +129,8 @@ struct video_info {
enum color_coefficient ycbcr_coeff;
enum color_depth color_depth;
-enum link_rate_type link_rate;
-enum link_lane_count_type lane_count;
+enum link_rate_type max_link_rate;
+enum link_lane_count_type max_lane_count;
};
struct link_train {
--
1.9.1
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[RFC PATCH v6 9/9] arm: zx_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/configs/zx_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/zx_defconfig b/arch/arm/configs/zx_defconfig index b200bb0..ab683fb 100644 --- a/arch/arm/configs/zx_defconfig +++ b/arch/arm/configs/zx_defconfig @@ -83,7 +83,6 @@ CONFIG_MMC=y CONFIG_MMC_UNSAFE_RESUME=y CONFIG_MMC_BLOCK_MINORS=16 CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y CONFIG_EXT2_FS=y CONFIG_EXT4_FS=y CONFIG_EXT4_FS_POSIX_ACL=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v6 3/9] mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com Acked-by: Govindraj Raja govindraj.r...@imgtec.com Acked-by: Ralf Baechle r...@linux-mips.org --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/mips/configs/pistachio_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/configs/pistachio_defconfig b/arch/mips/configs/pistachio_defconfig index 1646cce..013c62c 100644 --- a/arch/mips/configs/pistachio_defconfig +++ b/arch/mips/configs/pistachio_defconfig @@ -257,7 +257,6 @@ CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=16 CONFIG_MMC_TEST=m CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_RTC_CLASS=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v6 5/9] arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/configs/exynos_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig index 9504e77..7e4af6e 100644 --- a/arch/arm/configs/exynos_defconfig +++ b/arch/arm/configs/exynos_defconfig @@ -161,7 +161,6 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S3C=y CONFIG_MMC_SDHCI_S3C_DMA=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_EXYNOS=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_MAX77686=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 13/14] drm: bridge/analogix_dp: move hpd detect to connector detect function
On 2015. 8. 19., at PM 11:52, Yakir Yang y...@rock-chips.com wrote:
What is the reason to make this patch?
Please make commit message including the reason.
Best regards,
Jingoo Han
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- move dp hpd detect to connector detect function.
Changes in v2: None
drivers/gpu/drm/bridge/analogix_dp_core.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix_dp_core.c
index 75dd44a..052b9b3 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
@@ -915,12 +915,6 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
DRM_ERROR(failed to disable the panel\n);
}
-ret = analogix_dp_detect_hpd(dp);
-if (ret) {
-/* Cable has been disconnected, we're done */
-return;
-}
-
ret = analogix_dp_handle_edid(dp);
if (ret) {
dev_err(dp-dev, unable to handle edid\n);
@@ -953,6 +947,12 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
static enum drm_connector_status analogix_dp_detect(
struct drm_connector *connector, bool force)
{
+struct analogix_dp_device *dp = connector_to_dp(connector);
+
+if (analogix_dp_detect_hpd(dp))
+/* Cable has been disconnected, we're done */
+return connector_status_disconnected;
+
return connector_status_connected;
}
--
1.9.1
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Re: [PATCH v3 0/14] Add Analogix Core Display Port Driver
Hi Jingoo, On 08/20/2015 01:55 AM, Jingoo Han wrote: On 2015. 8. 20., at PM 3:23, Yakir Yang y...@rock-chips.com wrote: Hi Jingoo Archit, On 08/20/2015 12:54 AM, Jingoo Han wrote: On 2015. 8. 20., at PM 1:29, Archit Taneja arch...@codeaurora.org wrote: Hi, On 08/19/2015 08:18 PM, Yakir Yang wrote: Hi all, The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller share the same IP, so a lot of parts can be re-used. I split the common code into bridge directory, then rk3288 and exynos only need to keep some platform code. Cause I can't find the exact IP name of exynos dp controller, so I decide to name dp core driver with analogix which I find in rk3288 eDP TRM ;) Beyond that, there are three light registers setting differents bewteen exynos and rk3288. 1. RK3288 have five special pll resigters which not indicata in exynos dp controller. 2. The address of DP_PHY_PD(dp phy power manager register) are different between rk3288 and exynos. 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug register). I have verified this series on two kinds of rockchip platform board, one is rk3288 sdk board which connect with a 2K display port monitor, the other is google jerry chromebook which connect with a eDP screen cnm,n116bgeea2, both of them works rightlly. I haven't verified the dp function on samsung platform, cause I haven't got exynos boards. I can only ensure that there are no build error on samsung platform, wish some samsung guys help to test. ;) Thanks, - Yakir Changes in v3: - Take Thierry Reding suggest, move exynos's video_timing code to analogix_dp-exynos platform driver, add get_modes method to struct analogix_dp_plat_data. - Take Heiko suggest, rename some samsung* dts propery to analogix*. - Take Thierry Reding suggest, dynamic parse video timing info from struct drm_display_mode and struct drm_display_info. - Take Thierry Reding suggest, link_rate and lane_count shouldn't config to the DT property value directly, but we can take those as hardware limite. For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane, so DT property would like link-rate = 0x0a lane-count = 4. - Take Heiko suggest, add devicetree binding documents. - Take Thierry Reding suggest, remove sync pol colorimetry properies from the new analogix dp driver devicetree binding. - Update the exist exynos dtsi file with the latest DP DT properies. - Take Thierry Reding and Heiko suggest, leave sclk_edp_24m to rockchip dp phy driver which name to 24m, and leave sclk_edp to analogix dp core driver which name to dp, and leave pclk_edp to rockchip dp platform driver which name to pclk. - Take Heiko suggest, add devicetree binding document. - Take Heiko suggest, remove rockchip,panel DT property, take use of remote point to get panel node. - Add the new function point analogix_dp_platdata.get_modes init. - Take Heiko suggest, add rockchip dp phy driver, collect the phy clocks and power control. - Add analogix,need-force-hpd to indicate whether driver need foce hpd when hpd detect failed. - move dp hpd detect to connector detect function. - Add edid modes parse support Changes in v2: - Take Joe Preches advise, improved commit message more readable, and avoid using some uncommon style like bellow: - retval = exynos_dp_read_bytes_from_i2c(... ...) + retval = + exynos_dp_read_bytes_from_i2c(..); - Take Jingoo Han suggest, just remove my name from author list. - Take Jingoo Han suggest, remove new copyright - Fix compiled failed dut to analogix_dp_device misspell - Take Heiko suggest, get panel node with remote-endpoint method, and create devicetree binding for driver. - Remove the clock enable/disbale with sclk_edp sclk_edp_24m, leave those clock to rockchip dp phy driver. - Add GNU license v2 declared and samsung copyright - Fix compile failed dut to phy_pd_addr variable misspell error Yakir Yang (14): drm: exynos/dp: fix code style drm: exynos/dp: convert to drm bridge mode drm: bridge: analogix_dp: split exynos dp driver to bridge dir drm: bridge/analogix_dp: dynamic parse sync_pol interlace colorimetry drm: bridge/analogix_dp: fix link_rate lane_count bug Documentation: drm/bridge: add document for analogix_dp drm: rockchip/dp: add rockchip platform dp driver phy: Add driver for rockchip Display Port PHY drm: bridge/analogix_dp: add platform device type support drm: bridge: analogix_dp: add some rk3288 special registers setting drm: bridge: analogix_dp: try force hpd after plug in lookup failed drm: bridge/analogix_dp: expand the delay time for hpd detect drm: bridge/analogix_dp: move hpd detect to connector detect function drm: bridge/analogix_dp: add edid modes parse in get_modes method .../devicetree/bindings/drm/bridge/analogix_dp.txt | 73 + .../devicetree/bindings/phy/rockchip-dp-phy.txt| 26 +
RE: [PATCH V3] Watchdog: Fix parent of watchdog_devices
diff --git a/drivers/misc/mei/wd.c b/drivers/misc/mei/wd.c index 2bc0f5089f82..b346638833b0 100644 --- a/drivers/misc/mei/wd.c +++ b/drivers/misc/mei/wd.c @@ -364,6 +364,7 @@ int mei_watchdog_register(struct mei_device *dev) int ret; + amt_wd_dev.parent = dev-dev; /* unlock to perserve correct locking order */ mutex_unlock(dev-device_lock); ret = watchdog_register_device(amt_wd_dev); Acked-by: Tomas Winkler tomas.wink...@intel.com Should this be got to stable as well? -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/14] Add Analogix Core Display Port Driver
On 2015. 8. 20., at PM 3:23, Yakir Yang y...@rock-chips.com wrote: Hi Jingoo Archit, On 08/20/2015 12:54 AM, Jingoo Han wrote: On 2015. 8. 20., at PM 1:29, Archit Taneja arch...@codeaurora.org wrote: Hi, On 08/19/2015 08:18 PM, Yakir Yang wrote: Hi all, The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller share the same IP, so a lot of parts can be re-used. I split the common code into bridge directory, then rk3288 and exynos only need to keep some platform code. Cause I can't find the exact IP name of exynos dp controller, so I decide to name dp core driver with analogix which I find in rk3288 eDP TRM ;) Beyond that, there are three light registers setting differents bewteen exynos and rk3288. 1. RK3288 have five special pll resigters which not indicata in exynos dp controller. 2. The address of DP_PHY_PD(dp phy power manager register) are different between rk3288 and exynos. 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug register). I have verified this series on two kinds of rockchip platform board, one is rk3288 sdk board which connect with a 2K display port monitor, the other is google jerry chromebook which connect with a eDP screen cnm,n116bgeea2, both of them works rightlly. I haven't verified the dp function on samsung platform, cause I haven't got exynos boards. I can only ensure that there are no build error on samsung platform, wish some samsung guys help to test. ;) Thanks, - Yakir Changes in v3: - Take Thierry Reding suggest, move exynos's video_timing code to analogix_dp-exynos platform driver, add get_modes method to struct analogix_dp_plat_data. - Take Heiko suggest, rename some samsung* dts propery to analogix*. - Take Thierry Reding suggest, dynamic parse video timing info from struct drm_display_mode and struct drm_display_info. - Take Thierry Reding suggest, link_rate and lane_count shouldn't config to the DT property value directly, but we can take those as hardware limite. For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane, so DT property would like link-rate = 0x0a lane-count = 4. - Take Heiko suggest, add devicetree binding documents. - Take Thierry Reding suggest, remove sync pol colorimetry properies from the new analogix dp driver devicetree binding. - Update the exist exynos dtsi file with the latest DP DT properies. - Take Thierry Reding and Heiko suggest, leave sclk_edp_24m to rockchip dp phy driver which name to 24m, and leave sclk_edp to analogix dp core driver which name to dp, and leave pclk_edp to rockchip dp platform driver which name to pclk. - Take Heiko suggest, add devicetree binding document. - Take Heiko suggest, remove rockchip,panel DT property, take use of remote point to get panel node. - Add the new function point analogix_dp_platdata.get_modes init. - Take Heiko suggest, add rockchip dp phy driver, collect the phy clocks and power control. - Add analogix,need-force-hpd to indicate whether driver need foce hpd when hpd detect failed. - move dp hpd detect to connector detect function. - Add edid modes parse support Changes in v2: - Take Joe Preches advise, improved commit message more readable, and avoid using some uncommon style like bellow: - retval = exynos_dp_read_bytes_from_i2c(... ...) + retval = + exynos_dp_read_bytes_from_i2c(..); - Take Jingoo Han suggest, just remove my name from author list. - Take Jingoo Han suggest, remove new copyright - Fix compiled failed dut to analogix_dp_device misspell - Take Heiko suggest, get panel node with remote-endpoint method, and create devicetree binding for driver. - Remove the clock enable/disbale with sclk_edp sclk_edp_24m, leave those clock to rockchip dp phy driver. - Add GNU license v2 declared and samsung copyright - Fix compile failed dut to phy_pd_addr variable misspell error Yakir Yang (14): drm: exynos/dp: fix code style drm: exynos/dp: convert to drm bridge mode drm: bridge: analogix_dp: split exynos dp driver to bridge dir drm: bridge/analogix_dp: dynamic parse sync_pol interlace colorimetry drm: bridge/analogix_dp: fix link_rate lane_count bug Documentation: drm/bridge: add document for analogix_dp drm: rockchip/dp: add rockchip platform dp driver phy: Add driver for rockchip Display Port PHY drm: bridge/analogix_dp: add platform device type support drm: bridge: analogix_dp: add some rk3288 special registers setting drm: bridge: analogix_dp: try force hpd after plug in lookup failed drm: bridge/analogix_dp: expand the delay time for hpd detect drm: bridge/analogix_dp: move hpd detect to connector detect function drm: bridge/analogix_dp: add edid modes parse in get_modes method .../devicetree/bindings/drm/bridge/analogix_dp.txt | 73 + .../devicetree/bindings/phy/rockchip-dp-phy.txt| 26 +
Re: [PATCH v3 05/14] drm: bridge/analogix_dp: fix link_rate lane_count bug
On 2015. 8. 19., at PM 11:50, Yakir Yang y...@rock-chips.com wrote:
link_rate and lane_count already configed in analogix_dp_set_link_train(),
s/configed/configured
Also, the commit name such as fix ... bug is not good.
How about following?
drm: bridge/analogix_dp: remove duplicate configuration of link rate and link
count
Best regards,
Jingoo Han
so we don't need to config those repeatly after training finished, just
remove them out.
Beside Display Port 1.2 already support 5.4Gbps link rate, the maximum sets
would change from {1.62Gbps, 2.7Gbps} to {1.62Gbps, 2.7Gbps, 5.4Gbps}.
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- Take Thierry Reding suggest, link_rate and lane_count shouldn't config to
the DT property value directly, but we can take those as hardware limite.
For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane,
so DT property would like link-rate = 0x0a lane-count = 4.
Changes in v2: None
drivers/gpu/drm/bridge/analogix_dp_core.c | 16
drivers/gpu/drm/bridge/analogix_dp_core.h | 9 +
2 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix_dp_core.c
index 480cc13..1778e0a 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
@@ -635,6 +635,8 @@ static void analogix_dp_get_max_rx_bandwidth(struct
analogix_dp_device *dp,
/*
* For DP rev.1.1, Maximum link rate of Main Link lanes
* 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps
+ * For DP rev.1.2, Maximum link rate of Main Link lanes
+ * 0x06 = 1.62 Gbps, 0x0a = 2.7 Gbps, 0x14 = 5.4Gbps
*/
analogix_dp_read_byte_from_dpcd(dp, DP_MAX_LINK_RATE, data);
*bandwidth = data;
@@ -668,7 +670,8 @@ static void analogix_dp_init_training(struct
analogix_dp_device *dp,
analogix_dp_get_max_rx_lane_count(dp, dp-link_train.lane_count);
if ((dp-link_train.link_rate != LINK_RATE_1_62GBPS)
-(dp-link_train.link_rate != LINK_RATE_2_70GBPS)) {
+(dp-link_train.link_rate != LINK_RATE_2_70GBPS)
+(dp-link_train.link_rate != LINK_RATE_5_40GBPS)) {
dev_err(dp-dev, Rx Max Link Rate is abnormal :%x !\n,
dp-link_train.link_rate);
dp-link_train.link_rate = LINK_RATE_1_62GBPS;
@@ -901,8 +904,8 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
return;
}
-ret = analogix_dp_set_link_train(dp, dp-video_info-lane_count,
- dp-video_info-link_rate);
+ret = analogix_dp_set_link_train(dp, dp-video_info-max_lane_count,
+ dp-video_info-max_link_rate);
if (ret) {
dev_err(dp-dev, unable to do link train\n);
return;
@@ -912,9 +915,6 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
analogix_dp_enable_rx_to_enhanced_mode(dp, 1);
analogix_dp_enable_enhanced_mode(dp, 1);
-analogix_dp_set_lane_count(dp, dp-video_info-lane_count);
-analogix_dp_set_link_bandwidth(dp, dp-video_info-link_rate);
-
analogix_dp_init_video(dp);
ret = analogix_dp_config_video(dp);
if (ret)
@@ -1198,13 +1198,13 @@ static struct video_info
*analogix_dp_dt_parse_pdata(struct device *dev)
}
if (of_property_read_u32(dp_node, analogix,link-rate,
- dp_video_config-link_rate)) {
+ dp_video_config-max_link_rate)) {
dev_err(dev, failed to get link-rate\n);
return ERR_PTR(-EINVAL);
}
if (of_property_read_u32(dp_node, analogix,lane-count,
- dp_video_config-lane_count)) {
+ dp_video_config-max_lane_count)) {
dev_err(dev, failed to get lane-count\n);
return ERR_PTR(-EINVAL);
}
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.h
b/drivers/gpu/drm/bridge/analogix_dp_core.h
index 2cefde9..941b34f 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.h
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.h
@@ -21,8 +21,9 @@
#define MAX_EQ_LOOP 5
enum link_rate_type {
-LINK_RATE_1_62GBPS = 0x06,
-LINK_RATE_2_70GBPS = 0x0a
+LINK_RATE_1_62GBPS = DP_LINK_BW_1_62,
+LINK_RATE_2_70GBPS = DP_LINK_BW_2_7,
+LINK_RATE_5_40GBPS = DP_LINK_BW_5_4,
};
enum link_lane_count_type {
@@ -128,8 +129,8 @@ struct video_info {
enum color_coefficient ycbcr_coeff;
enum color_depth color_depth;
-enum link_rate_type link_rate;
-enum link_lane_count_type lane_count;
+enum link_rate_type max_link_rate;
+enum link_lane_count_type max_lane_count;
};
struct link_train {
--
1.9.1
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[PATCH V4] Watchdog: Fix parent of watchdog_devices
/sys/class/watchdog/watchdogn/device/modalias can help to identify the
driver/module for a given watchdog node. However, many wdt devices do not
set their parent and so, we do not see an entry for device in sysfs for
such devices.
This patch fixes parent of watchdog_device so that
/sys/class/watchdog/watchdogn/device is populated.
Exceptions: booke, diag288, octeon, softdog and w83627hf -- They do not
have any parent. Not sure, how we can identify driver for these devices.
Signed-off-by: Pratyush Anand pan...@redhat.com
Reviewed-by: Johannes Thumshirn jthumsh...@suse.de
Acked-by: Guenter Roeck li...@roeck-us.net
Acked-by: H Hartley Sweeten hswee...@visionengravers.com
Acked-by: Lee Jones lee.jo...@linaro.org
Acked-by: Lubomir Rintel lkund...@v3.sk
Acked-by: Maxime Coquelin maxime.coque...@st.com
Acked-by: Thierry Reding tred...@nvidia.com
Acked-by: Viresh Kumar viresh.ku...@linaro.org
---
* Changes since v3:
- Fixed max no number of columns in the description to 75
- Fixed grammatical mistake in patch description reported by Uwe
Kleine-König.
- Fixed for mpc8xxx as well.
* Changes since v2:
- Fixed drivers/watchdog/txx9wdt.c:134:20: error: 'pdev' undeclared
Reported-by: kbuild test robot fengguang...@intel.com
* Changes since v1:
- Squash all commits of V1 into a single patch.
- V1 was here:
http://www.spinics.net/lists/linux-watchdog/msg07220.html
drivers/misc/mei/wd.c | 1 +
drivers/watchdog/bcm2835_wdt.c | 1 +
drivers/watchdog/bcm47xx_wdt.c | 1 +
drivers/watchdog/bcm_kona_wdt.c | 1 +
drivers/watchdog/coh901327_wdt.c| 1 +
drivers/watchdog/da9052_wdt.c | 1 +
drivers/watchdog/da9055_wdt.c | 1 +
drivers/watchdog/da9062_wdt.c | 1 +
drivers/watchdog/da9063_wdt.c | 1 +
drivers/watchdog/davinci_wdt.c | 1 +
drivers/watchdog/digicolor_wdt.c| 1 +
drivers/watchdog/ep93xx_wdt.c | 1 +
drivers/watchdog/gpio_wdt.c | 1 +
drivers/watchdog/ie6xx_wdt.c| 1 +
drivers/watchdog/intel-mid_wdt.c| 1 +
drivers/watchdog/jz4740_wdt.c | 1 +
drivers/watchdog/mena21_wdt.c | 1 +
drivers/watchdog/menf21bmc_wdt.c| 1 +
drivers/watchdog/mpc8xxx_wdt.c | 1 +
drivers/watchdog/omap_wdt.c | 1 +
drivers/watchdog/orion_wdt.c| 1 +
drivers/watchdog/pnx4008_wdt.c | 1 +
drivers/watchdog/qcom-wdt.c | 1 +
drivers/watchdog/retu_wdt.c | 1 +
drivers/watchdog/rt2880_wdt.c | 1 +
drivers/watchdog/s3c2410_wdt.c | 1 +
drivers/watchdog/shwdt.c| 1 +
drivers/watchdog/sirfsoc_wdt.c | 1 +
drivers/watchdog/sp805_wdt.c| 1 +
drivers/watchdog/st_lpc_wdt.c | 1 +
drivers/watchdog/stmp3xxx_rtc_wdt.c | 1 +
drivers/watchdog/tegra_wdt.c| 1 +
drivers/watchdog/twl4030_wdt.c | 1 +
drivers/watchdog/txx9wdt.c | 1 +
drivers/watchdog/ux500_wdt.c| 1 +
drivers/watchdog/via_wdt.c | 1 +
drivers/watchdog/wm831x_wdt.c | 1 +
drivers/watchdog/wm8350_wdt.c | 1 +
38 files changed, 38 insertions(+)
diff --git a/drivers/misc/mei/wd.c b/drivers/misc/mei/wd.c
index 2bc0f5089f82..b346638833b0 100644
--- a/drivers/misc/mei/wd.c
+++ b/drivers/misc/mei/wd.c
@@ -364,6 +364,7 @@ int mei_watchdog_register(struct mei_device *dev)
int ret;
+ amt_wd_dev.parent = dev-dev;
/* unlock to perserve correct locking order */
mutex_unlock(dev-device_lock);
ret = watchdog_register_device(amt_wd_dev);
diff --git a/drivers/watchdog/bcm2835_wdt.c b/drivers/watchdog/bcm2835_wdt.c
index 7116968dee12..66c3e656a616 100644
--- a/drivers/watchdog/bcm2835_wdt.c
+++ b/drivers/watchdog/bcm2835_wdt.c
@@ -182,6 +182,7 @@ static int bcm2835_wdt_probe(struct platform_device *pdev)
watchdog_set_drvdata(bcm2835_wdt_wdd, wdt);
watchdog_init_timeout(bcm2835_wdt_wdd, heartbeat, dev);
watchdog_set_nowayout(bcm2835_wdt_wdd, nowayout);
+ bcm2835_wdt_wdd.parent = pdev-dev;
err = watchdog_register_device(bcm2835_wdt_wdd);
if (err) {
dev_err(dev, Failed to register watchdog device);
diff --git a/drivers/watchdog/bcm47xx_wdt.c b/drivers/watchdog/bcm47xx_wdt.c
index b28a072abf78..4064a43f1360 100644
--- a/drivers/watchdog/bcm47xx_wdt.c
+++ b/drivers/watchdog/bcm47xx_wdt.c
@@ -209,6 +209,7 @@ static int bcm47xx_wdt_probe(struct platform_device *pdev)
wdt-wdd.info = bcm47xx_wdt_info;
wdt-wdd.timeout = WDT_DEFAULT_TIME;
+ wdt-wdd.parent = pdev-dev;
ret = wdt-wdd.ops-set_timeout(wdt-wdd, timeout);
if (ret)
goto err_timer;
diff --git a/drivers/watchdog/bcm_kona_wdt.c b/drivers/watchdog/bcm_kona_wdt.c
index 22d8ae65772a..e0c98423f2c9 100644
--- a/drivers/watchdog/bcm_kona_wdt.c
+++ b/drivers/watchdog/bcm_kona_wdt.c
@@ -319,6 +319,7 @@ static int bcm_kona_wdt_probe(struct platform_device *pdev)
spin_lock_init(wdt-lock);
platform_set_drvdata(pdev, wdt);
RE: [PATCH V3] Watchdog: Fix parent of watchdog_devices
On August 19, 2015 04:28, Pratyush Anand wrote: diff --git a/drivers/watchdog/da9052_wdt.c b/drivers/watchdog/da9052_wdt.c index 2e9589652e1e..67e67977bd29 100644 --- a/drivers/watchdog/da9052_wdt.c +++ b/drivers/watchdog/da9052_wdt.c @@ -195,6 +195,7 @@ static int da9052_wdt_probe(struct platform_device *pdev) da9052_wdt-timeout = DA9052_DEF_TIMEOUT; da9052_wdt-info = da9052_wdt_info; da9052_wdt-ops = da9052_wdt_ops; + da9052_wdt-parent = pdev-dev; watchdog_set_drvdata(da9052_wdt, driver_data); kref_init(driver_data-kref); diff --git a/drivers/watchdog/da9055_wdt.c b/drivers/watchdog/da9055_wdt.c index 495089d8dbfe..04d1430d93d2 100644 --- a/drivers/watchdog/da9055_wdt.c +++ b/drivers/watchdog/da9055_wdt.c @@ -161,6 +161,7 @@ static int da9055_wdt_probe(struct platform_device *pdev) da9055_wdt-timeout = DA9055_DEF_TIMEOUT; da9055_wdt-info = da9055_wdt_info; da9055_wdt-ops = da9055_wdt_ops; + da9055_wdt-parent = pdev-dev; watchdog_set_nowayout(da9055_wdt, nowayout); watchdog_set_drvdata(da9055_wdt, driver_data); diff --git a/drivers/watchdog/da9062_wdt.c b/drivers/watchdog/da9062_wdt.c index b3a870ce85be..7386111220d5 100644 --- a/drivers/watchdog/da9062_wdt.c +++ b/drivers/watchdog/da9062_wdt.c @@ -210,6 +210,7 @@ static int da9062_wdt_probe(struct platform_device *pdev) wdt-wdtdev.max_timeout = DA9062_WDT_MAX_TIMEOUT; wdt-wdtdev.timeout = DA9062_WDG_DEFAULT_TIMEOUT; wdt-wdtdev.status = WATCHDOG_NOWAYOUT_INIT_STATUS; + wdt-wdtdev.parent = pdev-dev; watchdog_set_drvdata(wdt-wdtdev, wdt); dev_set_drvdata(pdev-dev, wdt); diff --git a/drivers/watchdog/da9063_wdt.c b/drivers/watchdog/da9063_wdt.c index e2fe2ebdebd4..6bf130bd863d 100644 --- a/drivers/watchdog/da9063_wdt.c +++ b/drivers/watchdog/da9063_wdt.c @@ -175,6 +175,7 @@ static int da9063_wdt_probe(struct platform_device *pdev) wdt-wdtdev.min_timeout = DA9063_WDT_MIN_TIMEOUT; wdt-wdtdev.max_timeout = DA9063_WDT_MAX_TIMEOUT; wdt-wdtdev.timeout = DA9063_WDG_TIMEOUT; + wdt-wdtdev.parent = pdev-dev; wdt-wdtdev.status = WATCHDOG_NOWAYOUT_INIT_STATUS; Acked-by: Adam Thomson adam.thomson.opensou...@diasemi.com
Re: [PATCH v3 13/14] drm: bridge/analogix_dp: move hpd detect to connector detect function
Hi Jingoo,
On 08/20/2015 02:49 AM, Jingoo Han wrote:
On 2015. 8. 19., at PM 11:52, Yakir Yang y...@rock-chips.com wrote:
What is the reason to make this patch?
Please make commit message including the reason.
Okay, I think the below words would be okay :)
This change just make a little clean to make code more like
drm core expect, move hdp detect code from bridge-enable(),
and place them into connector-detect().
Thanks,
- Yakir
Best regards,
Jingoo Han
Signed-off-by: Yakir Yang y...@rock-chips.com
---
Changes in v3:
- move dp hpd detect to connector detect function.
Changes in v2: None
drivers/gpu/drm/bridge/analogix_dp_core.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c
b/drivers/gpu/drm/bridge/analogix_dp_core.c
index 75dd44a..052b9b3 100644
--- a/drivers/gpu/drm/bridge/analogix_dp_core.c
+++ b/drivers/gpu/drm/bridge/analogix_dp_core.c
@@ -915,12 +915,6 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
DRM_ERROR(failed to disable the panel\n);
}
-ret = analogix_dp_detect_hpd(dp);
-if (ret) {
-/* Cable has been disconnected, we're done */
-return;
-}
-
ret = analogix_dp_handle_edid(dp);
if (ret) {
dev_err(dp-dev, unable to handle edid\n);
@@ -953,6 +947,12 @@ static void analogix_dp_commit(struct analogix_dp_device
*dp)
static enum drm_connector_status analogix_dp_detect(
struct drm_connector *connector, bool force)
{
+struct analogix_dp_device *dp = connector_to_dp(connector);
+
+if (analogix_dp_detect_hpd(dp))
+/* Cable has been disconnected, we're done */
+return connector_status_disconnected;
+
return connector_status_connected;
}
--
1.9.1
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[RFC PATCH v6 2/9] Documentation: synopsys-dw-mshc: add bindings for idmac and edmac
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
.../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 25 ++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 346c609..8636f5a 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -75,6 +75,12 @@ Optional properties:
* vmmc-supply: The phandle to the regulator to use for vmmc. If this is
specified we'll defer probe until we can find this regulator.
+* dmas: List of DMA specifiers with the controller specific format as described
+ in the generic DMA client binding. Refer to dma.txt for details.
+
+* dma-names: request names for generic DMA client binding. Must be rx-tx.
+ Refer to dma.txt for details.
+
Aliases:
- All the MSHC controller nodes should be represented in the aliases node using
@@ -95,6 +101,23 @@ board specific portions as listed below.
#size-cells = 0;
};
+[board specific internal DMA resources]
+
+ dwmmc0@1220 {
+ clock-frequency = 4;
+ clock-freq-min-max = 40 2;
+ num-slots = 1;
+ broken-cd;
+ fifo-depth = 0x80;
+ card-detect-delay = 200;
+ vmmc-supply = buck8;
+ bus-width = 8;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ };
+
+[board specific generic DMA request binding]
+
dwmmc0@1220 {
clock-frequency = 4;
clock-freq-min-max = 40 2;
@@ -106,4 +129,6 @@ board specific portions as listed below.
bus-width = 8;
cap-mmc-highspeed;
cap-sd-highspeed;
+ dmas = pdma 12;
+ dma-names = rx-tx;
};
--
2.3.7
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[RFC PATCH v6 1/9] mmc: dw_mmc: Add external dma interface support
DesignWare MMC Controller can supports two types of DMA
mode: external dma and internal dma. We get a RK312x platform
integrated dw_mmc and ARM pl330 dma controller. This patch add
edmac ops to support these platforms. I've tested it on RK31xx
platform with edmac mode and RK3288 platform with idmac mode.
Signed-off-by: Shawn Lin shawn@rock-chips.com
---
Changes in v6:
- add trans_mode condition for IDMAC initialization
suggested by Heiko
- re-test my patch on rk3188 platform and update commit msg
- update performance of pio vs edmac in cover letter
Changes in v5:
- add the title of cover letter
- fix typo of comment
- add macro for reading HCON register
- add Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com for
exynos_defconfig patch
- add Acked-by: Vineet Gupta vgu...@synopsys.com for axs10x_defconfig patch
- add Acked-by: Govindraj Raja govindraj.r...@imgtec.com and
Acked-by: Ralf Baechle r...@linux-mips.org for pistachio_defconfig patch
- add Acked-by: Joachim Eastwood manab...@gmail.com for lpc18xx_defconfig
patch
- add Acked-by: Wei Xu xuw...@hisilicon.com for hisi_defconfig patch
- rebase on https://github.com/jh80chung/dw-mmc.git tags/dw-mmc-for-ulf-v4.2
for merging easily
Changes in v4:
- remove host-trans_mode and use host-use_dma to indicate
transfer mode.
- remove all bt-bindings' changes since we don't need new properities.
- check transfer mode at runtime by reading HCON reg
- spilt defconfig changes for each sub-architecture
- fix the title of cover letter
- reuse some code for reducing code size
Changes in v3:
- choose transfer mode at runtime
- remove all CONFIG_MMC_DW_IDMAC config option
- add supports-idmac property for some platforms
Changes in v2:
- Fix typo of dev_info msg
- remove unused dmach from declaration of dw_mci_dma_slave
drivers/mmc/host/Kconfig| 11 +-
drivers/mmc/host/dw_mmc-pltfm.c | 2 +
drivers/mmc/host/dw_mmc.c | 264
drivers/mmc/host/dw_mmc.h | 5 +
include/linux/mmc/dw_mmc.h | 27 +++-
5 files changed, 242 insertions(+), 67 deletions(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 6a0f9c7..a86c0eb 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -607,15 +607,7 @@ config MMC_DW
help
This selects support for the Synopsys DesignWare Mobile Storage IP
block, this provides host support for SD and MMC interfaces, in both
- PIO and external DMA modes.
-
-config MMC_DW_IDMAC
- bool Internal DMAC interface
- depends on MMC_DW
- help
- This selects support for the internal DMAC block within the Synopsys
- Designware Mobile Storage IP block. This disables the external DMA
- interface.
+ PIO, internal DMA mode and external DMA modes.
config MMC_DW_PLTFM
tristate Synopsys Designware MCI Support as platform device
@@ -644,7 +636,6 @@ config MMC_DW_K3
tristate K3 specific extensions for Synopsys DW Memory Card Interface
depends on MMC_DW
select MMC_DW_PLTFM
- select MMC_DW_IDMAC
help
This selects support for Hisilicon K3 SoC specific extensions to the
Synopsys DesignWare Memory Card Interface driver. Select this option
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c
index ec6dbcd..7e1d13b 100644
--- a/drivers/mmc/host/dw_mmc-pltfm.c
+++ b/drivers/mmc/host/dw_mmc-pltfm.c
@@ -59,6 +59,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev,
host-pdata = pdev-dev.platform_data;
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ /* Get registers' physical base address */
+ host-phy_regs = (void *)(regs-start);
host-regs = devm_ioremap_resource(pdev-dev, regs);
if (IS_ERR(host-regs))
return PTR_ERR(host-regs);
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
index fcbf552..f943619 100644
--- a/drivers/mmc/host/dw_mmc.c
+++ b/drivers/mmc/host/dw_mmc.c
@@ -56,7 +56,6 @@
#define DW_MCI_FREQ_MAX2 /* unit: HZ */
#define DW_MCI_FREQ_MIN40 /* unit: HZ */
-#ifdef CONFIG_MMC_DW_IDMAC
#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \
@@ -102,7 +101,6 @@ struct idmac_desc {
/* Each descriptor can transfer up to 4KB of data in chained mode */
#define DW_MCI_DESC_DATA_LENGTH0x1000
-#endif /* CONFIG_MMC_DW_IDMAC */
static bool dw_mci_reset(struct dw_mci *host);
static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset);
@@ -407,7 +405,6 @@ static int dw_mci_get_dma_dir(struct mmc_data *data)
return DMA_FROM_DEVICE;
}
-#ifdef CONFIG_MMC_DW_IDMAC
static void dw_mci_dma_cleanup(struct dw_mci *host)
{
struct
[RFC PATCH v6 0/9] Add external dma support for Synopsys MSHC
Synopsys DesignWare mobile storage host controller supports three types of transfer mode: pio, internal dma and external dma. However, dw_mmc can only supports pio and internal dma now. Thus some platforms using dw-mshc integrated with generic dma can't work in dma mode. So we submit this patch to achieve it. And the config option, CONFIG_MMC_DW_IDMAC, was added by Will Newton (commit:f95f3850) for the first version of dw_mmc and never be touched since then. At that time dt-bindings hadn't been introduced into dw_mmc yet means we should select CONFIG_MMC_DW_IDMAC to enable internal dma mode at compile time. Nowadays, device-tree helps us to support a variety of boards with one kernel. That's why we need to remove it and decide the transfer mode by reading dw_mmc's HCON reg at runtime. This RFC patch needs lots of ACKs. I know it's hard, but it does need someone to make the running. Patch does the following things: - remove CONFIG_MMC_DW_IDMAC config option - add bindings for edmac used by synopsys-dw-mshc at runtime - add edmac support for synopsys-dw-mshc Patch v1~v4 is based on next of git://git.linaro.org/people/ulf.hansson/mmc Patch v5~v6 is rebased on dw-mmc-for-ulf-v4.2 of https://github.com/jh80chung/dw-mmc.git Test emmc throughput on my platform with edmac support and without edmac support(pio only) iozone -L64 -S32 -azecwI -+n -r4k -r64k -r128k -s1g -i0 -i1 -i2 -f datafile -Rb out.xls /mnt/result.txt (light cpu loading, Direct IO, fixed line size, all pattern recycle, 1GB data in total) ___ | external dma mode | |---| |blksz | Random Read | Random Write | Seq Read | Seq Write| |---| |4kB | 13953kB/s |8602kB/s | 13672kB/s | 9785kB/s| |---| |64kB | 46058kB/s | 24794kB/s | 48058kB/s | 25418kB/s| |---| |128kB | 57026kB/s | 35117kB/s | 57375kB/s | 35183kB/s| |---| VS ___ | pio mode | |---| |blksz | Random Read | Random Write | Seq Read | Seq Write| |---| |4kB | 11720kB/s |8644kB/s | 11549kB/s | 9624kB/s| |---| |64kB | 21869kB/s | 24414kB/s | 22031kB/s | 27986kB/s| |---| |128kB | 23718kB/s | 34495kB/s | 24698kB/s | 34637kB/s| |---| Changes in v6: - add trans_mode condition for IDMAC initialization suggested by Heiko - re-test my patch on rk3188 platform and update commit msg - update performance of pio vs edmac in cover letter Changes in v5: - add the title of cover letter - fix typo of comment - add macro for reading HCON register - add Acked-by: Krzysztof Kozlowski k.kozlow...@samsung.com for exynos_defconfig patch - add Acked-by: Vineet Gupta vgu...@synopsys.com for axs10x_defconfig patch - add Acked-by: Govindraj Raja govindraj.r...@imgtec.com and Acked-by: Ralf Baechle r...@linux-mips.org for pistachio_defconfig patch - add Acked-by: Joachim Eastwood manab...@gmail.com for lpc18xx_defconfig patch - add Acked-by: Wei Xu xuw...@hisilicon.com for hisi_defconfig patch - rebase on https://github.com/jh80chung/dw-mmc.git tags/dw-mmc-for-ulf-v4.2 for merging easily Changes in v4: - remove host-trans_mode and use host-use_dma to indicate transfer mode. - remove all bt-bindings' changes since we don't need new properities. - check transfer mode at runtime by reading HCON reg - spilt defconfig changes for each sub-architecture - fix the title of cover letter - reuse some code for reducing code size Changes in v3: - choose transfer mode at runtime - remove all CONFIG_MMC_DW_IDMAC config option - add supports-idmac property for some platforms Changes in v2: - Fix typo of dev_info msg - remove unused dmach from declaration of dw_mci_dma_slave Shawn Lin (9): mmc: dw_mmc: Add external dma interface support Documentation: synopsys-dw-mshc: add bindings for idmac and edmac mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC arm: multi_v7_defconfig: remove CONFIG_MMC_DW_IDMAC arm: zx_defconfig: remove CONFIG_MMC_DW_IDMAC .../devicetree/bindings/mmc/synopsys-dw-mshc.txt | 25 ++ arch/arc/configs/axs101_defconfig | 1 -
[RFC PATCH v6 4/9] arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com Acked-by: Vineet Gupta vgu...@synopsys.com --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arc/configs/axs101_defconfig | 1 - arch/arc/configs/axs103_defconfig | 1 - arch/arc/configs/axs103_smp_defconfig | 1 - 3 files changed, 3 deletions(-) diff --git a/arch/arc/configs/axs101_defconfig b/arch/arc/configs/axs101_defconfig index 562dac6..c92c0ef 100644 --- a/arch/arc/configs/axs101_defconfig +++ b/arch/arc/configs/axs101_defconfig @@ -89,7 +89,6 @@ CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT3_FS=y CONFIG_EXT4_FS=y diff --git a/arch/arc/configs/axs103_defconfig b/arch/arc/configs/axs103_defconfig index 83a6d8d..cfac24e 100644 --- a/arch/arc/configs/axs103_defconfig +++ b/arch/arc/configs/axs103_defconfig @@ -95,7 +95,6 @@ CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT3_FS=y CONFIG_EXT4_FS=y diff --git a/arch/arc/configs/axs103_smp_defconfig b/arch/arc/configs/axs103_smp_defconfig index f1e1c84..9922a11 100644 --- a/arch/arc/configs/axs103_smp_defconfig +++ b/arch/arc/configs/axs103_smp_defconfig @@ -96,7 +96,6 @@ CONFIG_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_EXT3_FS=y CONFIG_EXT4_FS=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 12/14] drm: bridge/analogix_dp: expand the delay time for hpd detect
On 2015. 8. 19., at PM 11:52, Yakir Yang y...@rock-chips.com wrote: Some edp screen with no hpd signal would need some delay time to ensure that screen would be ready for work, so we can expand the delay time in hpd detect function, it works prefectly on my rk3288 sdk board. Then, this delay has a dependency on the rk3288 sdk board. Also, if the delay time is expanded, the booting time of some Exybos boards will be increased unnecessarily. :-( So, please add new DT property such as 'hpd-delay' that can be added to board DT files. If there is not that DT property in DT files, the default value '10' will written to a variable such as 'unsigned int hpd_delay'. If there is the DT property in DT files, the delay value will written to the variable when parsing DT values and will be used in analogix_dp_detect_hpd(). What I want to say is that there should not be harmful effect on the existing Exynos boards, due to unrelated reasons. Best regards, Jingoo Han Signed-off-by: Yakir Yang y...@rock-chips.com --- Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/analogix_dp_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix_dp_core.c index 99870f7..75dd44a 100644 --- a/drivers/gpu/drm/bridge/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix_dp_core.c @@ -68,7 +68,7 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp) return 0; timeout_loop++; -usleep_range(10, 11); +usleep_range(100, 110); } /* -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v6 6/9] arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com Acked-by: Wei Xu xuw...@hisilicon.com --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/configs/hisi_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/hisi_defconfig b/arch/arm/configs/hisi_defconfig index 5997dbc..b2e340b 100644 --- a/arch/arm/configs/hisi_defconfig +++ b/arch/arm/configs/hisi_defconfig @@ -69,7 +69,6 @@ CONFIG_NOP_USB_XCEIV=y CONFIG_MMC=y CONFIG_RTC_CLASS=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_PLTFM=y CONFIG_RTC_DRV_PL031=y CONFIG_DMADEVICES=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v6 8/9] arm: multi_v7_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/configs/multi_v7_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 5fd8df6..a3734b5 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -520,7 +520,6 @@ CONFIG_MMC_ATMELMCI=y CONFIG_MMC_MVSDIO=y CONFIG_MMC_SDHI=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y CONFIG_MMC_DW_PLTFM=y CONFIG_MMC_DW_EXYNOS=y CONFIG_MMC_DW_ROCKCHIP=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[RFC PATCH v6 7/9] arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC
DesignWare MMC Controller's transfer mode should be decided at runtime instead of compile-time. So we remove this config option and read dw_mmc's register to select DMA master. Signed-off-by: Shawn Lin shawn@rock-chips.com Acked-by: Joachim Eastwood manab...@gmail.com --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/configs/lpc18xx_defconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/configs/lpc18xx_defconfig b/arch/arm/configs/lpc18xx_defconfig index 1c47f86..b7e8cda 100644 --- a/arch/arm/configs/lpc18xx_defconfig +++ b/arch/arm/configs/lpc18xx_defconfig @@ -119,7 +119,6 @@ CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_MMC=y CONFIG_MMC_DW=y -CONFIG_MMC_DW_IDMAC=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y CONFIG_LEDS_PCA9532=y -- 2.3.7 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 12/14] drm: bridge/analogix_dp: expand the delay time for hpd detect
Hi Jingoo, On 08/20/2015 01:11 AM, Jingoo Han wrote: On 2015. 8. 19., at PM 11:52, Yakir Yang y...@rock-chips.com wrote: Some edp screen with no hpd signal would need some delay time to ensure that screen would be ready for work, so we can expand the delay time in hpd detect function, it works prefectly on my rk3288 sdk board. Then, this delay has a dependency on the rk3288 sdk board. Also, if the delay time is expanded, the booting time of some Exybos boards will be increased unnecessarily. :-( So, please add new DT property such as 'hpd-delay' that can be added to board DT files. If there is not that DT property in DT files, the default value '10' will written to a variable such as 'unsigned int hpd_delay'. If there is the DT property in DT files, the delay value will written to the variable when parsing DT values and will be used in analogix_dp_detect_hpd(). What I want to say is that there should not be harmful effect on the existing Exynos boards, due to unrelated reasons. Yeah, you are right, I made an mistake here. And I want to put this delay to need-force-hpd code, cause this property is for the no-hpd-signal eDP screen. But strangely, with my this series, I don't need the expand delay any more, I am not sure which change improved this, I guess those delay time should come from drm core ? Whatever seems we don't need this delay for now, and if I can find the exact reason and realize I still need this delay, I prefer to add those delay in need-force-hpd code. Thanks, - Yakir Best regards, Jingoo Han Signed-off-by: Yakir Yang y...@rock-chips.com --- Changes in v3: None Changes in v2: None drivers/gpu/drm/bridge/analogix_dp_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix_dp_core.c index 99870f7..75dd44a 100644 --- a/drivers/gpu/drm/bridge/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix_dp_core.c @@ -68,7 +68,7 @@ static int analogix_dp_detect_hpd(struct analogix_dp_device *dp) return 0; timeout_loop++; -usleep_range(10, 11); +usleep_range(100, 110); } /* -- 1.9.1 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v3 0/14] Add Analogix Core Display Port Driver
Hi Jingoo Archit, On 08/20/2015 12:54 AM, Jingoo Han wrote: On 2015. 8. 20., at PM 1:29, Archit Taneja arch...@codeaurora.org wrote: Hi, On 08/19/2015 08:18 PM, Yakir Yang wrote: Hi all, The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller share the same IP, so a lot of parts can be re-used. I split the common code into bridge directory, then rk3288 and exynos only need to keep some platform code. Cause I can't find the exact IP name of exynos dp controller, so I decide to name dp core driver with analogix which I find in rk3288 eDP TRM ;) Beyond that, there are three light registers setting differents bewteen exynos and rk3288. 1. RK3288 have five special pll resigters which not indicata in exynos dp controller. 2. The address of DP_PHY_PD(dp phy power manager register) are different between rk3288 and exynos. 3. Rk3288 and exynos have different setting with AUX_HW_RETRY_CTL(dp debug register). I have verified this series on two kinds of rockchip platform board, one is rk3288 sdk board which connect with a 2K display port monitor, the other is google jerry chromebook which connect with a eDP screen cnm,n116bgeea2, both of them works rightlly. I haven't verified the dp function on samsung platform, cause I haven't got exynos boards. I can only ensure that there are no build error on samsung platform, wish some samsung guys help to test. ;) Thanks, - Yakir Changes in v3: - Take Thierry Reding suggest, move exynos's video_timing code to analogix_dp-exynos platform driver, add get_modes method to struct analogix_dp_plat_data. - Take Heiko suggest, rename some samsung* dts propery to analogix*. - Take Thierry Reding suggest, dynamic parse video timing info from struct drm_display_mode and struct drm_display_info. - Take Thierry Reding suggest, link_rate and lane_count shouldn't config to the DT property value directly, but we can take those as hardware limite. For example, RK3288 only support 4 physical lanes of 2.7/1.62 Gbps/lane, so DT property would like link-rate = 0x0a lane-count = 4. - Take Heiko suggest, add devicetree binding documents. - Take Thierry Reding suggest, remove sync pol colorimetry properies from the new analogix dp driver devicetree binding. - Update the exist exynos dtsi file with the latest DP DT properies. - Take Thierry Reding and Heiko suggest, leave sclk_edp_24m to rockchip dp phy driver which name to 24m, and leave sclk_edp to analogix dp core driver which name to dp, and leave pclk_edp to rockchip dp platform driver which name to pclk. - Take Heiko suggest, add devicetree binding document. - Take Heiko suggest, remove rockchip,panel DT property, take use of remote point to get panel node. - Add the new function point analogix_dp_platdata.get_modes init. - Take Heiko suggest, add rockchip dp phy driver, collect the phy clocks and power control. - Add analogix,need-force-hpd to indicate whether driver need foce hpd when hpd detect failed. - move dp hpd detect to connector detect function. - Add edid modes parse support Changes in v2: - Take Joe Preches advise, improved commit message more readable, and avoid using some uncommon style like bellow: - retval = exynos_dp_read_bytes_from_i2c(... ...) + retval = + exynos_dp_read_bytes_from_i2c(..); - Take Jingoo Han suggest, just remove my name from author list. - Take Jingoo Han suggest, remove new copyright - Fix compiled failed dut to analogix_dp_device misspell - Take Heiko suggest, get panel node with remote-endpoint method, and create devicetree binding for driver. - Remove the clock enable/disbale with sclk_edp sclk_edp_24m, leave those clock to rockchip dp phy driver. - Add GNU license v2 declared and samsung copyright - Fix compile failed dut to phy_pd_addr variable misspell error Yakir Yang (14): drm: exynos/dp: fix code style drm: exynos/dp: convert to drm bridge mode drm: bridge: analogix_dp: split exynos dp driver to bridge dir drm: bridge/analogix_dp: dynamic parse sync_pol interlace colorimetry drm: bridge/analogix_dp: fix link_rate lane_count bug Documentation: drm/bridge: add document for analogix_dp drm: rockchip/dp: add rockchip platform dp driver phy: Add driver for rockchip Display Port PHY drm: bridge/analogix_dp: add platform device type support drm: bridge: analogix_dp: add some rk3288 special registers setting drm: bridge: analogix_dp: try force hpd after plug in lookup failed drm: bridge/analogix_dp: expand the delay time for hpd detect drm: bridge/analogix_dp: move hpd detect to connector detect function drm: bridge/analogix_dp: add edid modes parse in get_modes method .../devicetree/bindings/drm/bridge/analogix_dp.txt | 73 + .../devicetree/bindings/phy/rockchip-dp-phy.txt| 26 + .../bindings/video/analogix_dp-rockchip.txt| 83 ++ .../devicetree/bindings/video/exynos_dp.txt| 51 +-
Re: CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
Hi Krzysztof, On 21 August 2015 at 06:25, Krzysztof Kozlowski k.kozlow...@samsung.com wrote: On 21.08.2015 03:15, Anand Moon wrote: Hi Daniel, On 20 August 2015 at 21:40, Daniel Lezcano daniel.lezc...@free.fr wrote: On 08/20/2015 12:54 PM, Anand Moon wrote: Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. Yeah a good willing to fix the bl1. More than one year asking for that ! nooo way !! Your answer is at the end of http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html Thanks for the explanation. I was just referring following the source code. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/mach-exynos/cpuidle-exynos5422.c It seem that cpufreq and cpuidle go hand in hand. Bartlomiej was working on cpufreq for Exynos542x: http://lkml.iu.edu/hypermail/linux/kernel/1504.2/03139.html It would be nice to have also cpuidle and suspend features working on Exynos542x family but this depends on firmware. Some time ago I struggled with suspend on Arndale Octa (Exynos5420) and I failed. I think the firmware is the issue here. Actually I am not sure what is your question Anand. You are asking if someone plans to do this? Yes I am asking are their plans to implement cpufreq and cpuidle simultaneously. -Anand Moon Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] ASoC: Samsung: Remove redundant arndale_audio_remove
On 21.08.2015 01:41, Vaishali Thakkar wrote: There is no use of snd_soc_unregister_card in remove function as devm_snd_soc_register_card in probe function automatically handles it. So, remove use of snd_soc_unregister_card and with this change remove arndale_audio_remove as it is now redundant. Signed-off-by: Vaishali Thakkar vthakkar1...@gmail.comz --- sound/soc/samsung/arndale_rt5631.c | 10 -- 1 file changed, 10 deletions(-) Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/4 RESEND] spi: s3c64xx: extend driver to make full use of runtime PM autosuspend
On 21.08.2015 05:03, Heiner Kallweit wrote:
Extend the driver to make full use of runtime PM autosuspend.
Before only the SPI core was instructed to use autosuspend
by setting master-auto_runtime_pm. Nevertheless due to the missing
pm_runtime_use_autosuspend call autosuspend wasn't active.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
Changed:
- Let driver autosuspend also after leaving s3c64xx_spi_setup
- Enable runtime PM earlier in s3c64xx_spi_probe and prevent
suspending in the relevant part of probe
drivers/spi/spi-s3c64xx.c | 32 +---
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 8a6ab88..edeac06 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -32,6 +32,7 @@
#define MAX_SPI_PORTS6
#define S3C64XX_SPI_QUIRK_POLL (1 0)
#define S3C64XX_SPI_QUIRK_CS_AUTO(1 1)
+#define AUTOSUSPEND_TIMEOUT 2000
/* Registers and bit-fields */
@@ -859,13 +860,15 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
}
}
- pm_runtime_put(sdd-pdev-dev);
+ pm_runtime_mark_last_busy(sdd-pdev-dev);
+ pm_runtime_put_autosuspend(sdd-pdev-dev);
if (!(sdd-port_conf-quirks S3C64XX_SPI_QUIRK_CS_AUTO))
writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd-regs +
S3C64XX_SPI_SLAVE_SEL);
return 0;
setup_exit:
- pm_runtime_put(sdd-pdev-dev);
+ pm_runtime_mark_last_busy(sdd-pdev-dev);
+ pm_runtime_put_autosuspend(sdd-pdev-dev);
/* setup() returns with device de-selected */
if (!(sdd-port_conf-quirks S3C64XX_SPI_QUIRK_CS_AUTO))
writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd-regs +
S3C64XX_SPI_SLAVE_SEL);
@@ -1133,18 +1136,24 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
goto err0;
}
+ pm_runtime_set_autosuspend_delay(pdev-dev, AUTOSUSPEND_TIMEOUT);
+ pm_runtime_use_autosuspend(pdev-dev);
+ pm_runtime_set_active(pdev-dev);
+ pm_runtime_enable(pdev-dev);
I think you should not enable the PM runtime too early. The PM runtime
callbacks can be fired now but driver did not get references to clocks yet.
Best regards,
Krzysztof
+ pm_runtime_get_noresume(pdev-dev);
+
/* Setup clocks */
sdd-clk = devm_clk_get(pdev-dev, spi);
if (IS_ERR(sdd-clk)) {
dev_err(pdev-dev, Unable to acquire clock 'spi'\n);
ret = PTR_ERR(sdd-clk);
- goto err0;
+ goto err1;
}
if (clk_prepare_enable(sdd-clk)) {
dev_err(pdev-dev, Couldn't enable clock 'spi'\n);
ret = -EBUSY;
- goto err0;
+ goto err1;
}
sprintf(clk_name, spi_busclk%d, sci-src_clk_nr);
@@ -1180,13 +1189,10 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
S3C64XX_SPI_INT_TX_OVERRUN_EN | S3C64XX_SPI_INT_TX_UNDERRUN_EN,
sdd-regs + S3C64XX_SPI_INT_EN);
- pm_runtime_set_active(pdev-dev);
- pm_runtime_enable(pdev-dev);
-
ret = devm_spi_register_master(pdev-dev, master);
if (ret != 0) {
dev_err(pdev-dev, cannot register SPI master: %d\n, ret);
- goto err4;
+ goto err3;
}
dev_dbg(pdev-dev, Samsung SoC SPI Driver loaded for Bus SPI-%d with
%d Slaves attached\n,
@@ -1195,15 +1201,19 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
mem_res, (FIFO_LVL_MASK(sdd) 1) + 1,
sdd-rx_dma.dmach, sdd-tx_dma.dmach);
+ pm_runtime_mark_last_busy(pdev-dev);
+ pm_runtime_put_autosuspend(pdev-dev);
+
return 0;
-err4:
- pm_runtime_disable(pdev-dev);
- pm_runtime_set_suspended(pdev-dev);
err3:
clk_disable_unprepare(sdd-src_clk);
err2:
clk_disable_unprepare(sdd-clk);
+err1:
+ pm_runtime_put_noidle(pdev-dev);
+ pm_runtime_disable(pdev-dev);
+ pm_runtime_set_suspended(pdev-dev);
err0:
spi_master_put(master);
--
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Re: [PATCH] rtc: s5m: fix to update ctrl register
On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote: On 21.08.2015 08:15, Alexandre Belloni wrote: Hi, On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote : According to datasheet, the S2MPS13X and S2MPS14X should update write buffer via setting WUDR bit to high after ctrl register is updated. If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use tools/testing/selftests/timers/rtctest.c test program and hour format is used to 12 hour mode in Odroid-XU3 board. From what I understood, I should expect a v2 of tihat patch also setting RUDR, is that right? OR would you prefer that I apply that one and then fix RUDR in a following patch? Right, I would expect that as well... or a comment if this is not needed. Hmm, the driver only writes control register now, so i don't feel the need of patch setting RUDR for control register. Best regards, Krzysztof Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com Cc: sta...@vger.kernel.org can you update the stable tag with the kernel version introducing the issue? Sure, i think it should be v3.16. --- drivers/rtc/rtc-s5m.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 8c70d78..03828bb 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -635,6 +635,18 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) case S2MPS13X: data[0] = (0 BCD_EN_SHIFT) | (1 MODEL24_SHIFT); ret = regmap_write(info-regmap, info-regs-ctrl, data[0]); + if (ret 0) + break; + + ret = regmap_update_bits(info-regmap, + info-regs-rtc_udr_update, + info-regs-rtc_udr_mask, + info-regs-rtc_udr_mask); Very small indentation issue here, it should be aligned with the open parenthesis. OK, i will. Thanks. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 4/4 RESEND] spi: s3c64xx: replace clock disabling with runtime PM suspend call in remove function
On 21.08.2015 05:11, Heiner Kallweit wrote: Simplify s3c64xx_spi_remove by replacing the clock disabling with calling runtime PM suspend which does the same. Waking up the device if it was suspended wouldn't be strictly needed for this driver but using pm_runtime_get_sync is cleaner and makes s3c64xx_spi_remove more consistent with the runtime PM handling in s3c64xx_spi_setup. pm_runtime_force_suspend does most of the work for us: disabling the clocks, disabling runtime PM and setting it to suspended state. Signed-off-by: Heiner Kallweit hkallwe...@gmail.com --- Changed: - Added to the patch set drivers/spi/spi-s3c64xx.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 735b7f5..4a91a6c 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1225,13 +1225,12 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); - pm_runtime_disable(pdev-dev); + pm_runtime_get_sync(pdev-dev); writel(0, sdd-regs + S3C64XX_SPI_INT_EN); - clk_disable_unprepare(sdd-src_clk); - - clk_disable_unprepare(sdd-clk); + pm_runtime_put_noidle(pdev-dev); + pm_runtime_force_suspend(pdev-dev); return 0; } The get+put_noidle looks good. But replacing this with pm_runtime_force_suspend() does not. The device is going to be removed so we do not want to do anything with it any more. We do not want to suspend it. Probably this would work fine but it is not intuitive. I think it's better to just: get(), disable(), set_suspended(), put_noidle() Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: HOW TO MAKE SAMPLES DIR IN THE MAINLINE KERNEL TO BE COMPILED AND CREATED .KO FILE IN THE SAME DIRECTORY
Hi Ravi, I'm wondering is your e-mail come from eDP thread ? cause I see lots of cc guys some as eDP emails :) And for your question, I am not sure I understand rightly. Do you mean that your .ko module not in the same directory with driver source code? If it's your question, I think you can fix it by add SUBDIRS flag in your driver makefile. I test it on kernel 3.14, but I think it would be okay on mainline kernel, it works good in my side, I see hello.ko in my hello/ [~/work/kernel-3.14/hello] 7392h41m $ ls hello.c hello.ko hello.mod.c hello.mod.o hello.o Makefile modules.order Module.symvers # My test makefile obj-m := hello.o KERNEL_DIR := ~/work/kernel-3.14 PWD := $(shell pwd) all: make -C $(KERNEL_DIR) SUBDIRS=$(PWD) modules clean: rm *.o *.ko *.mod.c .PHONY:clean Wish can help, - Yakir On 08/20/2015 03:45 AM, ravi ranjan Mishra wrote: Hi , i did make in the kernel directory but sample directory is not able to compiled and generating .ko file in the same directory. can you please tell. Thanks, Ravi -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/5] ARM: EXYNOS: DTS: add SROM device node for exynos4
Hi,
On Wednesday 27 May 2015 05:32 PM, Krzysztof Kozlowski wrote:
W dniu 29.04.2015 o 17:38, Pankaj Dubey pisze:
Add SROM device node for exynos4.
Subject prefix: ARM: dts:
Ok.
CC: Rob Herring robh...@kernel.org
CC: Mark Rutland mark.rutl...@arm.com
CC: Ian Campbell ijc+devicet...@hellion.org.uk
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 77ea547..48490ea 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -76,6 +76,11 @@
reg = 0x1000 0x100;
};
+ sromc@1257 {
+ compatible = samsung,exynos-srom;
+ reg = 0x1257 0x100;
There are 5 registers, so size of 0x100 seems to be bigger than needed.
Maybe limit it to actual length?
Yes, we do not need size of 0x100. Will take care in next version.
Thanks,
Pankaj Dubey
Best regards,
Krzysztof
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CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. -Anand Moon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
RE: [PATCH] s5p-mfc: fix state check from encoder queue_setup
Hi,
From: Andrzej Hajda [mailto:a.ha...@samsung.com]
Sent: Tuesday, August 18, 2015 3:32 PM
On 05/13/2015 09:25 AM, Seung-Woo Kim wrote:
MFCINST_GOT_INST state is set to encoder context with set_format only
for catpure buffer. In queue_setup of encoder called during reqbufs,
it is checked MFCINST_GOT_INST state for both capture and output
buffer. So this patch fixes to encoder to check MFCINST_GOT_INST state
only for capture buffer from queue_setup.
Signed-off-by: Seung-Woo Kim sw0312@samsung.com
Looks OK.
Reviewed-by: Andrzej Hajda a.ha...@samsung.com
Acked-by: Kamil Debski k.deb...@samsung.com
Regards
Andrzej
Best wishes,
Kamil Debski
---
drivers/media/platform/s5p-mfc/s5p_mfc_enc.c |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
index e65993f..2e57e9f 100644
--- a/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_enc.c
@@ -1819,11 +1819,12 @@ static int s5p_mfc_queue_setup(struct
vb2_queue *vq,
struct s5p_mfc_ctx *ctx = fh_to_ctx(vq-drv_priv);
struct s5p_mfc_dev *dev = ctx-dev;
- if (ctx-state != MFCINST_GOT_INST) {
- mfc_err(inavlid state: %d\n, ctx-state);
- return -EINVAL;
- }
if (vq-type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) {
+ if (ctx-state != MFCINST_GOT_INST) {
+ mfc_err(inavlid state: %d\n, ctx-state);
+ return -EINVAL;
+ }
+
if (ctx-dst_fmt)
*plane_count = ctx-dst_fmt-num_planes;
else
--
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Re: [PATCH 2/5] ARM: EXYNOS: Remove SROM related register settings from mach-exynos
Hi Krzysztof, On Wednesday 27 May 2015 05:26 PM, Krzysztof Kozlowski wrote: W dniu 29.04.2015 o 17:38, Pankaj Dubey pisze: As now we have dedicated driver for SROM controller, it will take care of saving register banks during S2R so we can safely remove these settings from mach-exynos. Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com --- arch/arm/mach-exynos/Kconfig | 2 + arch/arm/mach-exynos/exynos.c | 10 - arch/arm/mach-exynos/include/mach/map.h| 3 -- arch/arm/mach-exynos/suspend.c | 20 +- arch/arm/plat-samsung/include/plat/map-s5p.h | 1 - arch/arm/plat-samsung/include/plat/regs-srom.h | 54 -- 6 files changed, 4 insertions(+), 86 deletions(-) delete mode 100644 arch/arm/plat-samsung/include/plat/regs-srom.h diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 603820e..e842b23 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -25,6 +25,8 @@ menuconfig ARCH_EXYNOS select S5P_DEV_MFC select SRAM select MFD_SYSCON + select SOC_SAMSUNG + select EXYNOS_SROM What about the difference of execution time? The suspend/resume of device may not be called in the same time as previous syscore ops. Does this have any impact? I had tested it for S2R at that time on SMDK5250 board and it was fine. I do not noticed any issue in S2R, so I feel timing should not have any impact. Thanks, Pankaj Dubey Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/5] drivers: soc: add support for exynos SROM driver
Hi Krzysztof,
Sorry for delay in reply, as I got busy in some other official
assignments and could not take this series further at that time.
On Wednesday 27 May 2015 05:22 PM, Krzysztof Kozlowski wrote:
W dniu 29.04.2015 o 17:38, Pankaj Dubey pisze:
This patch adds Exynos SROM controller driver which will handle
save restore of SROM registers during S2R.
Change-Id: Iaddaaebc1d7090c9889e948e68e886519562c43c
Please remove it.
Will do it.
Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com
---
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile | 1 +
drivers/soc/samsung/Kconfig | 14
drivers/soc/samsung/Makefile | 1 +
drivers/soc/samsung/exynos-srom.c | 142 ++
drivers/soc/samsung/exynos-srom.h | 51 ++
6 files changed, 210 insertions(+)
create mode 100644 drivers/soc/samsung/Kconfig
create mode 100644 drivers/soc/samsung/Makefile
create mode 100644 drivers/soc/samsung/exynos-srom.c
create mode 100644 drivers/soc/samsung/exynos-srom.h
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index 76d6bd4..c3abfbe 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -1,6 +1,7 @@
menu SOC (System On Chip) specific Drivers
source drivers/soc/qcom/Kconfig
+source drivers/soc/samsung/Kconfig
source drivers/soc/ti/Kconfig
source drivers/soc/versatile/Kconfig
diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile
index 063113d..620366f 100644
--- a/drivers/soc/Makefile
+++ b/drivers/soc/Makefile
@@ -3,6 +3,7 @@
#
obj-$(CONFIG_ARCH_QCOM) += qcom/
+obj-$(CONFIG_SOC_SAMSUNG) += samsung/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_SOC_TI) += ti/
obj-$(CONFIG_PLAT_VERSATILE) += versatile/
diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig
new file mode 100644
index 000..b6fa4e6
--- /dev/null
+++ b/drivers/soc/samsung/Kconfig
@@ -0,0 +1,14 @@
+#
+# SAMSUNG SoC drivers
+#
+menu Samsung SOC driver support
+
+config SOC_SAMSUNG
+ bool
Any reason for not using menuconfig?
For one of my Exynos PMU patchset [1] this suggestion came from Russel
King, not to use user-visible sysmbol if not required.
[1]:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/304451.html
+
+config EXYNOS_SROM
+ bool
+ depends on ARM ARCH_EXYNOS
+ select SOC_BUS
Why we need to select SOC_BUS?
We do not need it, will modify.
+
+endmenu
diff --git a/drivers/soc/samsung/Makefile b/drivers/soc/samsung/Makefile
new file mode 100644
index 000..9c554d5
--- /dev/null
+++ b/drivers/soc/samsung/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_EXYNOS_SROM) += exynos-srom.o
diff --git a/drivers/soc/samsung/exynos-srom.c
b/drivers/soc/samsung/exynos-srom.c
new file mode 100644
index 000..8aae762
--- /dev/null
+++ b/drivers/soc/samsung/exynos-srom.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright (c) 2015 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * EXYNOS - SROM Controller support
+ * Author: Pankaj Dubey pankaj.du...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/io.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/of_platform.h
+#include linux/platform_device.h
+#include linux/slab.h
+#include exynos-srom.h
+
+static void __iomem *exynos_srom_base;
+
+static unsigned long exynos_srom_offsets[] = {
static const
+ /* SROM side */
+ S5P_SROM_BW,
+ S5P_SROM_BC0,
+ S5P_SROM_BC1,
+ S5P_SROM_BC2,
+ S5P_SROM_BC3,
+};
+
+/**
+ * struct exynos_srom_reg_dump: register dump of SROM Controller registers.
+ * @offset: srom register offset from the controller base address.
+ * @value: the value to be register at offset.
Maybe:
@value: the value of register under the offset
OK.
+ */
+struct exynos_srom_reg_dump {
+ u32 offset;
+ u32 value;
+};
+
+static struct exynos_srom_reg_dump *exynos_srom_regs;
+
+static struct exynos_srom_reg_dump *exynos_srom_alloc_reg_dump(
+ const unsigned long *rdump,
+ unsigned long nr_rdump)
+{
+ struct exynos_srom_reg_dump *rd;
+ unsigned int i;
+
+ rd = kcalloc(nr_rdump, sizeof(*rd), GFP_KERNEL);
+ if (!rd)
+ return NULL;
+
+ for (i = 0; i nr_rdump; ++i)
+ rd[i].offset = rdump[i];
+
+ return rd;
+}
+
+static void exynos_srom_save(void __iomem *base,
+ struct exynos_srom_reg_dump *rd,
+ unsigned int num_regs)
+{
+ for (; num_regs 0; --num_regs, ++rd)
+ rd-value = readl(base + rd-offset);
+
+}
+
+static void exynos_srom_restore(void __iomem *base,
+ const struct
Re: [PATCH 5/5] Documentation: dt-bindings: add exynos-srom binding information
Hi Krzysztof, On Wednesday 27 May 2015 04:51 PM, Krzysztof Kozlowski wrote: 2015-04-29 17:38 GMT+09:00 Pankaj Dubey pankaj.du...@samsung.com: This patch adds exynos-srom binding information for SROM Controller driver on Exynos SoCs. CC: Rob Herring robh...@kernel.org CC: Mark Rutland mark.rutl...@arm.com CC: Ian Campbell ijc+devicet...@hellion.org.uk Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com --- .../devicetree/bindings/arm/samsung/exynos-srom.txt | 12 1 file changed, 12 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt new file mode 100644 index 000..482d1cd --- /dev/null +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt @@ -0,0 +1,12 @@ +SAMSUNG Exynos SoCs SROM Controller driver. + +Required properties: +- compatible : Should at least contain samsung,exynos-srom. At least - do you already expect other compatibles? Nope, as of now I do not expect any other compatible, so I will change this to Should contain samsung,exynos-srom. Thanks, Pankaj Dubey Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] rtc: s5m: fix to update ctrl register
On 21.08.2015 08:15, Alexandre Belloni wrote: Hi, On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote : According to datasheet, the S2MPS13X and S2MPS14X should update write buffer via setting WUDR bit to high after ctrl register is updated. If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use tools/testing/selftests/timers/rtctest.c test program and hour format is used to 12 hour mode in Odroid-XU3 board. From what I understood, I should expect a v2 of tihat patch also setting RUDR, is that right? OR would you prefer that I apply that one and then fix RUDR in a following patch? Right, I would expect that as well... or a comment if this is not needed. Best regards, Krzysztof Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com Cc: sta...@vger.kernel.org can you update the stable tag with the kernel version introducing the issue? --- drivers/rtc/rtc-s5m.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 8c70d78..03828bb 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -635,6 +635,18 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) case S2MPS13X: data[0] = (0 BCD_EN_SHIFT) | (1 MODEL24_SHIFT); ret = regmap_write(info-regmap, info-regs-ctrl, data[0]); +if (ret 0) +break; + +ret = regmap_update_bits(info-regmap, +info-regs-rtc_udr_update, +info-regs-rtc_udr_mask, +info-regs-rtc_udr_mask); Very small indentation issue here, it should be aligned with the open parenthesis. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
On 21.08.2015 03:15, Anand Moon wrote: Hi Daniel, On 20 August 2015 at 21:40, Daniel Lezcano daniel.lezc...@free.fr wrote: On 08/20/2015 12:54 PM, Anand Moon wrote: Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. Yeah a good willing to fix the bl1. More than one year asking for that ! nooo way !! Your answer is at the end of http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html Thanks for the explanation. I was just referring following the source code. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/mach-exynos/cpuidle-exynos5422.c It seem that cpufreq and cpuidle go hand in hand. Bartlomiej was working on cpufreq for Exynos542x: http://lkml.iu.edu/hypermail/linux/kernel/1504.2/03139.html It would be nice to have also cpuidle and suspend features working on Exynos542x family but this depends on firmware. Some time ago I struggled with suspend on Arndale Octa (Exynos5420) and I failed. I think the firmware is the issue here. Actually I am not sure what is your question Anand. You are asking if someone plans to do this? Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/4 RESEND] spi: s3c64xx: simplify suspend / resume handlers
On 21.08.2015 05:07, Heiner Kallweit wrote:
The runtime PM suspend / resume handlers take care of the enabling/
disabling the clocks already. Therefore replace the duplicated
clock handling with pm_runtime_force_suspend/resume.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
Changed:
- Replaced pm_runtime_suspend/resume calls with their
.._force_.. equivalents.
drivers/spi/spi-s3c64xx.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index edeac06..735b7f5 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1246,10 +1246,9 @@ static int s3c64xx_spi_suspend(struct device *dev)
if (ret)
return ret;
- if (!pm_runtime_suspended(dev)) {
- clk_disable_unprepare(sdd-clk);
- clk_disable_unprepare(sdd-src_clk);
- }
+ ret = pm_runtime_force_suspend(dev);
+ if (ret 0)
+ return ret;
sdd-cur_speed = 0; /* Output Clock is stopped */
@@ -1261,14 +1260,14 @@ static int s3c64xx_spi_resume(struct device *dev)
struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
struct s3c64xx_spi_info *sci = sdd-cntrlr_info;
+ int ret;
if (sci-cfg_gpio)
sci-cfg_gpio();
- if (!pm_runtime_suspended(dev)) {
- clk_prepare_enable(sdd-src_clk);
- clk_prepare_enable(sdd-clk);
- }
+ ret = pm_runtime_force_resume(dev);
+ if (ret 0)
+ return ret;
The logic of resume is changed.
Previously if device was runtime suspended when sleeping then clocks
would not be enabled during system resume.
Now device is always runtime suspended before and always runtime resumed
after. So this is different... but I think it's right approach with
current PM model:
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Best regards,
Krzysztof
s3c64xx_spi_hwinit(sdd, sdd-port_id);
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Re: [PATCH v2] rtc: s3c: fix disabled clocks for alarm
On 12/08/2015 at 19:21:46 +0900, Joonyoung Shim wrote :
The clock enable/disable codes for alarm have been removed from
commit 24e1455493da (drivers/rtc/rtc-s3c.c: delete duplicate clock
control) and the clocks are disabled even if alarm is set, so alarm
interrupt can't happen.
The s3c_rtc_setaie function can be called several times with 'enabled'
argument having same value, so it needs to check whether clocks are
enabled or not.
Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com
Cc: sta...@vger.kernel.org # v4.1
---
This is v2 of prior patch [PATCH 4/4] rtc: s3c: enable/disable clocks
for alarm.
Changelog for v2:
- commit messages is modified by Krzysztof suggestion
- make to backportable patch
- add Cc-stable
drivers/rtc/rtc-s3c.c | 24 ++--
1 file changed, 18 insertions(+), 6 deletions(-)
Applied, thanks.
However, ...
@@ -39,6 +39,7 @@ struct s3c_rtc {
void __iomem *base;
struct clk *rtc_clk;
struct clk *rtc_src_clk;
+ bool clk_disabled;
This is quite unusual and I would say the principle of least
astonishment would require using clk_enabled and explicitly set it to
true in the probe. I don't expect a lot of changes regarding the clocks
in the probe so this is probably OK but doing so will require extra
carefulness.
--
Alexandre Belloni, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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Re: [GIT PULL v2 0/5] Samsung updates for v4.3
On Fri, Aug 14, 2015 at 03:42:31AM +0900, Kukjin Kim wrote: Hello Arnd, Olof, Kevin Here is re-spin of pull request for Samsung stuff for v4.3 as per Olof's suggestion. Most of this pull-requests are to switch to support generic cpufreq driver for exynos3250, 4210, 4412 and 5250 and several exynos dt updates. Note as I commented in each tag, each pull-request(signed tag) has a dependency with each other, so please keep the ordering in this time. 1) tags/samsung-clk-driver 2) tags/samsung-late-dt 3) tags/samsung-soc 4) tags/samsung-late-cpufreq-driver 5) tags/samsung-defconfig-new If any problems, please kindly let me know. That ordering is awkward for us. driver-dt-soc-driver-defconfig is not the way we do it. I'll merge them into a next/late branch together, and we might or might not send it in this merge window depending on how it goes. The lesson to learn here (for us and you) is that if there is complex contents, getting it sent in very early is important: rc2/rc3 is ideal. We're likely to be less tolerant of messy dependencies as we start to approach -rc6 and already have a lot of things merged up. We might also have locked into ordering between branches by then that doesn't match what you've used. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2 1/5] Samsung clk driver updates for v4.3
On Fri, Aug 14, 2015 at 03:48:37AM +0900, Kukjin Kim wrote: The following changes since commit d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754: Linux 4.2-rc1 (2015-07-05 11:01:52 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-clk-driver for you to fetch changes up to cd6aceef028afc3fa216e3e7bc94cc31632cad43: clk: exynos4x12: add cpu clock configuration data and instantiate cpu clock (2015-08-14 02:00:43 +0900) Samsung clk driver updates for v4.3 - add cpu clock configuration data and instantiate cpu clock for exynos3250, 4210, 4412 and 5250 SoCs to support Samsung specific cpu-clock type * Note this branch has been provided to clk tree as a topic branch Merged into next/late. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2 3/5] Samsung SoC updates for v4.3
On Fri, Aug 14, 2015 at 03:51:40AM +0900, Kukjin Kim wrote: The following changes since commit d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754: Linux 4.2-rc1 (2015-07-05 11:01:52 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-soc for you to fetch changes up to bdd2648e50508cbb2eb6d1c303e4d2d6d7505400: ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12 (2015-08-14 03:07:10 +0900) Merged into next/late. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] rtc: s5m: fix to update ctrl register
On 21.08.2015 10:00, Joonyoung Shim wrote: On 08/21/2015 09:44 AM, Krzysztof Kozlowski wrote: On 21.08.2015 08:15, Alexandre Belloni wrote: Hi, On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote : According to datasheet, the S2MPS13X and S2MPS14X should update write buffer via setting WUDR bit to high after ctrl register is updated. If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use tools/testing/selftests/timers/rtctest.c test program and hour format is used to 12 hour mode in Odroid-XU3 board. From what I understood, I should expect a v2 of tihat patch also setting RUDR, is that right? OR would you prefer that I apply that one and then fix RUDR in a following patch? Right, I would expect that as well... or a comment if this is not needed. Hmm, the driver only writes control register now, so i don't feel the need of patch setting RUDR for control register. Yes, you're right. There is only regmap_write() (not remap_update_bits()) so your patch is completely fine. Thanks for explanation. Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com Best regards, Krzysztof Best regards, Krzysztof Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com Cc: sta...@vger.kernel.org can you update the stable tag with the kernel version introducing the issue? Sure, i think it should be v3.16. --- drivers/rtc/rtc-s5m.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 8c70d78..03828bb 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -635,6 +635,18 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) case S2MPS13X: data[0] = (0 BCD_EN_SHIFT) | (1 MODEL24_SHIFT); ret = regmap_write(info-regmap, info-regs-ctrl, data[0]); + if (ret 0) + break; + + ret = regmap_update_bits(info-regmap, + info-regs-rtc_udr_update, + info-regs-rtc_udr_mask, + info-regs-rtc_udr_mask); Very small indentation issue here, it should be aligned with the open parenthesis. OK, i will. Thanks. -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2 2/5] Samsung 2nd DT updates for v4.3
On Fri, Aug 14, 2015 at 03:50:30AM +0900, Kukjin Kim wrote: The following changes since commit 5e080b078fa1f929d9aa5586985d5e7c0739d207: ARM: dts: Extend exynos5420-pinctrl nodes using labels instead of paths (2015-07-21 13:01:23 +0900) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-late-dt for you to fetch changes up to ba032795463bfc461937dbde7a345103a47f969b: ARM: dts: add iommu property to JPEG device for exynos4 (2015-08-14 02:30:58 +0900) Samsung 2nd DT updates for v4.3 - for exynos3250, 4212, 4412 and 5250 : add CPU OPP and regulator supply property - for exynos3250 : add CPU cooling binding for exynos3250 boards - for exynos4 SoCs : add iommu property to JPEG device - for exynos4412-odroidu3 : enable SPI1 - for exynos5250-snow : add SPI CS - for exynos5422 : add exynos5422-cpus.dtsi to correct cpu order * Note this branch is depending on tags/samsung-clk-driver It's not depending on it, it contains it -- which is what's required here or bisectability would be broken. Merged into next/late. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 2/4] rtc: s3c: remove unnecessary NULL assignment
On 11/08/2015 at 20:28:20 +0900, Joonyoung Shim wrote : It's unnecessary the code that assigns info-rtc_clk to NULL in s3c_rtc_remove. Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com --- drivers/rtc/rtc-s3c.c | 1 - 1 file changed, 1 deletion(-) Applied, thanks. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] rtc: s3c: add missing clk control
On 11/08/2015 at 20:28:19 +0900, Joonyoung Shim wrote : It's missed to call clk_unprepare() about info-rtc_src_clk in s3c_rtc_remove and to call clk_disable_unprepare about info-rtc_clk in error routine of s3c_rtc_probe. Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com --- drivers/rtc/rtc-s3c.c | 3 +++ 1 file changed, 3 insertions(+) Applied, thanks. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] rtc: s5m: fix to update ctrl register
Hi, On 13/08/2015 at 17:49:24 +0900, Joonyoung Shim wrote : According to datasheet, the S2MPS13X and S2MPS14X should update write buffer via setting WUDR bit to high after ctrl register is updated. If not, ALARM interrupt of rtc-s5m doesn't happen first time when i use tools/testing/selftests/timers/rtctest.c test program and hour format is used to 12 hour mode in Odroid-XU3 board. From what I understood, I should expect a v2 of tihat patch also setting RUDR, is that right? OR would you prefer that I apply that one and then fix RUDR in a following patch? Signed-off-by: Joonyoung Shim jy0922.s...@samsung.com Cc: sta...@vger.kernel.org can you update the stable tag with the kernel version introducing the issue? --- drivers/rtc/rtc-s5m.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/rtc/rtc-s5m.c b/drivers/rtc/rtc-s5m.c index 8c70d78..03828bb 100644 --- a/drivers/rtc/rtc-s5m.c +++ b/drivers/rtc/rtc-s5m.c @@ -635,6 +635,18 @@ static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) case S2MPS13X: data[0] = (0 BCD_EN_SHIFT) | (1 MODEL24_SHIFT); ret = regmap_write(info-regmap, info-regs-ctrl, data[0]); + if (ret 0) + break; + + ret = regmap_update_bits(info-regmap, + info-regs-rtc_udr_update, + info-regs-rtc_udr_mask, + info-regs-rtc_udr_mask); Very small indentation issue here, it should be aligned with the open parenthesis. -- Alexandre Belloni, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/5] drivers: soc: add support for exynos SROM driver
On 20.08.2015 20:34, Pankaj Dubey wrote: Hi Krzysztof, Sorry for delay in reply, as I got busy in some other official assignments and could not take this series further at that time. On Wednesday 27 May 2015 05:22 PM, Krzysztof Kozlowski wrote: W dniu 29.04.2015 o 17:38, Pankaj Dubey pisze: This patch adds Exynos SROM controller driver which will handle save restore of SROM registers during S2R. Change-Id: Iaddaaebc1d7090c9889e948e68e886519562c43c Please remove it. Will do it. Signed-off-by: Pankaj Dubey pankaj.du...@samsung.com --- drivers/soc/Kconfig | 1 + drivers/soc/Makefile | 1 + drivers/soc/samsung/Kconfig | 14 drivers/soc/samsung/Makefile | 1 + drivers/soc/samsung/exynos-srom.c | 142 ++ drivers/soc/samsung/exynos-srom.h | 51 ++ 6 files changed, 210 insertions(+) create mode 100644 drivers/soc/samsung/Kconfig create mode 100644 drivers/soc/samsung/Makefile create mode 100644 drivers/soc/samsung/exynos-srom.c create mode 100644 drivers/soc/samsung/exynos-srom.h diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 76d6bd4..c3abfbe 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -1,6 +1,7 @@ menu SOC (System On Chip) specific Drivers source drivers/soc/qcom/Kconfig +source drivers/soc/samsung/Kconfig source drivers/soc/ti/Kconfig source drivers/soc/versatile/Kconfig diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 063113d..620366f 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -3,6 +3,7 @@ # obj-$(CONFIG_ARCH_QCOM)+= qcom/ +obj-$(CONFIG_SOC_SAMSUNG)+= samsung/ obj-$(CONFIG_ARCH_TEGRA)+= tegra/ obj-$(CONFIG_SOC_TI)+= ti/ obj-$(CONFIG_PLAT_VERSATILE)+= versatile/ diff --git a/drivers/soc/samsung/Kconfig b/drivers/soc/samsung/Kconfig new file mode 100644 index 000..b6fa4e6 --- /dev/null +++ b/drivers/soc/samsung/Kconfig @@ -0,0 +1,14 @@ +# +# SAMSUNG SoC drivers +# +menu Samsung SOC driver support + +config SOC_SAMSUNG +bool Any reason for not using menuconfig? For one of my Exynos PMU patchset [1] this suggestion came from Russel King, not to use user-visible sysmbol if not required. [1]: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-November/304451.html Okay, thanks. I'm fine with that. Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [GIT PULL v2 5/5] Samsung defconfig updates for v4.3
On Fri, Aug 14, 2015 at 03:53:51AM +0900, Kukjin Kim wrote: The following changes since commit d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754: Linux 4.2-rc1 (2015-07-05 11:01:52 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung.git tags/samsung-defconfig-new for you to fetch changes up to 2b347c6494cbc6bfdc81b5201b8aa34afb2c3500: ARM: exynos_defconfig: Enable cpufreq-dt driver (2015-08-12 08:17:31 +0900) Merged into next/late. -Olof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4 RESEND] spi: s3c64xx: clean up runtime PM if driver registration fails
On 21.08.2015 05:02, Heiner Kallweit wrote:
Fix missing runtime PM cleanup if driver registration fails.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
Changed:
- Separated fix from added functionality
drivers/spi/spi-s3c64xx.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
Looks good, thanks:
Reviewed-by: Krzysztof Kozlowski k.kozlow...@samsung.com
Best regards,
Krzysztof
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index cd1cfac..8a6ab88 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1186,7 +1186,7 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
ret = devm_spi_register_master(pdev-dev, master);
if (ret != 0) {
dev_err(pdev-dev, cannot register SPI master: %d\n, ret);
- goto err3;
+ goto err4;
}
dev_dbg(pdev-dev, Samsung SoC SPI Driver loaded for Bus SPI-%d with
%d Slaves attached\n,
@@ -1197,6 +1197,9 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
return 0;
+err4:
+ pm_runtime_disable(pdev-dev);
+ pm_runtime_set_suspended(pdev-dev);
err3:
clk_disable_unprepare(sdd-src_clk);
err2:
--
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Re: CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
On 08/20/2015 08:15 PM, Anand Moon wrote: Hi Daniel, On 20 August 2015 at 21:40, Daniel Lezcano daniel.lezc...@free.fr wrote: On 08/20/2015 12:54 PM, Anand Moon wrote: Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. Yeah a good willing to fix the bl1. More than one year asking for that ! nooo way !! Your answer is at the end of http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html Thanks for the explanation. I was just referring following the source code. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/mach-exynos/cpuidle-exynos5422.c Ah, thanks for the pointer. So for my information, is that driver not working with the exynos5422 ? It seem that cpufreq and cpuidle go hand in hand. At the first glance, there is a dependency with the cluster power state. It is not allowed to enter the cluster power down if another subsystem deny it. The driver itself is a pack of hacks based on cpuidle legacy code and wildly backported from older kernels with arbitrary latency and residency values. -- http://www.linaro.org/ Linaro.org │ Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro Facebook | http://twitter.com/#!/linaroorg Twitter | http://www.linaro.org/linaro-blog/ Blog -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
Hi Daniel, On 20 August 2015 at 21:40, Daniel Lezcano daniel.lezc...@free.fr wrote: On 08/20/2015 12:54 PM, Anand Moon wrote: Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. Yeah a good willing to fix the bl1. More than one year asking for that ! nooo way !! Your answer is at the end of http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html Thanks for the explanation. I was just referring following the source code. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/mach-exynos/cpuidle-exynos5422.c It seem that cpufreq and cpuidle go hand in hand. -Anand Moon -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/4] [media] Media entity cleanups and build fixes
On 08/19/15 17:35, Javier Martinez Canillas wrote: Hello, This series contains a couple of build fixes and cleanups for the Media Controller framework. The goal of the series is to get rid of the struct media_entity .parent member since now that a media_gobj is embedded into entities, the media_gobj .mdev member can be used to store a pointer to the parent struct media_device. So the .parent field becomes redundant and can be removed after all the users are converted to use entity .graph_obj.mdev instead. Patches 1/4 and 2/4 are build fixes I found while build testing if no regressions were introduced by the conversion. Patch 3/4 converts all the drivers and the MC core to use .mdev instead of .parent and finally patch 4/4 removes the .parent field since now is unused. Regarding patches 1 and 2: these should of course be merged with Mauro's patches that make this particular change (patch 3/8), otherwise it would break git bisect. Anyway, Acked-by: Hans Verkuil hans.verk...@cisco.com for the changes in patch 1 and 2, as long as they are added to Mauro's patch 3/8. Regards, Hans The series depend on Mauro's [PATCH v6 0/8] MC preparation patches series [0]. The transformation were automated using a coccinelle semantic patch and the drivers were build tested using allyesconfig and x-building the ARM Exynos and OMAP defconfigs + the needed media config options. Best regards, Javier [0]: http://www.mail-archive.com/linux-media@vger.kernel.org/msg91330.html Javier Martinez Canillas (4): [media] staging: omap4iss: get entity ID using media_entity_id() [media] omap3isp: get entity ID using media_entity_id() [media] media: use entity.graph_obj.mdev instead of .parent [media] media: remove media entity .parent field drivers/media/media-device.c | 8 ++--- drivers/media/media-entity.c | 34 -- drivers/media/platform/exynos4-is/fimc-isp-video.c | 6 ++-- drivers/media/platform/exynos4-is/fimc-lite.c | 8 ++--- drivers/media/platform/exynos4-is/media-dev.c | 2 +- drivers/media/platform/exynos4-is/media-dev.h | 8 ++--- drivers/media/platform/omap3isp/isp.c | 11 --- drivers/media/platform/omap3isp/ispccdc.c | 2 +- drivers/media/platform/omap3isp/ispvideo.c | 10 --- drivers/media/platform/vsp1/vsp1_video.c | 2 +- drivers/media/platform/xilinx/xilinx-dma.c | 2 +- drivers/staging/media/davinci_vpfe/vpfe_video.c| 6 ++-- drivers/staging/media/omap4iss/iss.c | 6 ++-- drivers/staging/media/omap4iss/iss_video.c | 4 +-- include/media/media-entity.h | 1 - 15 files changed, 58 insertions(+), 52 deletions(-) -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 3/4] [media] media: use entity.graph_obj.mdev instead of .parent
On 08/19/15 17:35, Javier Martinez Canillas wrote: The struct media_entity has a .parent field that stores a pointer to the parent struct media_device. But recently a media_gobj was embedded into the entities and since struct media_gojb already has a pointer to a struct media_device in the .mdev field, the .parent field becomes redundant and can be removed. This patch replaces all the usage of .parent by .graph_obj.mdev so that field will become unused and can be removed on a later patch. No functional changes. The transformation was made using the following coccinelle spatch: @@ struct media_entity *me; @@ - me-parent + me-graph_obj.mdev @@ struct media_entity *link; @@ - link-source-entity-parent + link-source-entity-graph_obj.mdev @@ struct exynos_video_entity *ve; @@ - ve-vdev.entity.parent + ve-vdev.entity.graph_obj.mdev Suggested-by: Mauro Carvalho Chehab mche...@osg.samsung.com Signed-off-by: Javier Martinez Canillas jav...@osg.samsung.com Acked-by: Hans Verkuil hans.verk...@cisco.com Regards, Hans -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/4] [media] Media entity cleanups and build fixes
Hello Hans, On 08/20/2015 02:41 PM, Hans Verkuil wrote: On 08/19/15 17:35, Javier Martinez Canillas wrote: Hello, This series contains a couple of build fixes and cleanups for the Media Controller framework. The goal of the series is to get rid of the struct media_entity .parent member since now that a media_gobj is embedded into entities, the media_gobj .mdev member can be used to store a pointer to the parent struct media_device. So the .parent field becomes redundant and can be removed after all the users are converted to use entity .graph_obj.mdev instead. Patches 1/4 and 2/4 are build fixes I found while build testing if no regressions were introduced by the conversion. Patch 3/4 converts all the drivers and the MC core to use .mdev instead of .parent and finally patch 4/4 removes the .parent field since now is unused. Regarding patches 1 and 2: these should of course be merged with Mauro's patches that make this particular change (patch 3/8), otherwise it would break git bisect. Anyway, Acked-by: Hans Verkuil hans.verk...@cisco.com for the changes in patch Thanks a lot for the acks. 1 and 2, as long as they are added to Mauro's patch 3/8. Indeed, I completely agree that these should be squashed with Mauro's patch to maintain git bisect-ability. Regards, Hans Best regards, -- Javier Martinez Canillas Open Source Group Samsung Research America -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
On 21.08.2015 12:41, Anand Moon wrote: Hi Krzysztof, On 21 August 2015 at 06:25, Krzysztof Kozlowski k.kozlow...@samsung.com wrote: On 21.08.2015 03:15, Anand Moon wrote: Hi Daniel, On 20 August 2015 at 21:40, Daniel Lezcano daniel.lezc...@free.fr wrote: On 08/20/2015 12:54 PM, Anand Moon wrote: Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. Yeah a good willing to fix the bl1. More than one year asking for that ! nooo way !! Your answer is at the end of http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html Thanks for the explanation. I was just referring following the source code. https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/mach-exynos/cpuidle-exynos5422.c It seem that cpufreq and cpuidle go hand in hand. Bartlomiej was working on cpufreq for Exynos542x: http://lkml.iu.edu/hypermail/linux/kernel/1504.2/03139.html It would be nice to have also cpuidle and suspend features working on Exynos542x family but this depends on firmware. Some time ago I struggled with suspend on Arndale Octa (Exynos5420) and I failed. I think the firmware is the issue here. Actually I am not sure what is your question Anand. You are asking if someone plans to do this? Yes I am asking are their plans to implement cpufreq and cpuidle simultaneously. There are no obstacles for implementing them simultaneously so the question is rather who plans to do the cpuidle driver for Exynos542x? I don't... at least in nearby future. If I had some spare time then probably I would try to make suspend working. Best regards, Krzysztof -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 4/4 RESEND] spi: s3c64xx: replace clock disabling with runtime PM suspend call in remove function
Simplify s3c64xx_spi_remove by replacing the clock disabling with calling runtime PM suspend which does the same. Waking up the device if it was suspended wouldn't be strictly needed for this driver but using pm_runtime_get_sync is cleaner and makes s3c64xx_spi_remove more consistent with the runtime PM handling in s3c64xx_spi_setup. pm_runtime_force_suspend does most of the work for us: disabling the clocks, disabling runtime PM and setting it to suspended state. Signed-off-by: Heiner Kallweit hkallwe...@gmail.com --- Changed: - Added to the patch set drivers/spi/spi-s3c64xx.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 735b7f5..4a91a6c 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1225,13 +1225,12 @@ static int s3c64xx_spi_remove(struct platform_device *pdev) struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); - pm_runtime_disable(pdev-dev); + pm_runtime_get_sync(pdev-dev); writel(0, sdd-regs + S3C64XX_SPI_INT_EN); - clk_disable_unprepare(sdd-src_clk); - - clk_disable_unprepare(sdd-clk); + pm_runtime_put_noidle(pdev-dev); + pm_runtime_force_suspend(pdev-dev); return 0; } -- 2.5.0 -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 3/4 RESEND] spi: s3c64xx: simplify suspend / resume handlers
The runtime PM suspend / resume handlers take care of the enabling/
disabling the clocks already. Therefore replace the duplicated
clock handling with pm_runtime_force_suspend/resume.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
Changed:
- Replaced pm_runtime_suspend/resume calls with their
.._force_.. equivalents.
drivers/spi/spi-s3c64xx.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index edeac06..735b7f5 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1246,10 +1246,9 @@ static int s3c64xx_spi_suspend(struct device *dev)
if (ret)
return ret;
- if (!pm_runtime_suspended(dev)) {
- clk_disable_unprepare(sdd-clk);
- clk_disable_unprepare(sdd-src_clk);
- }
+ ret = pm_runtime_force_suspend(dev);
+ if (ret 0)
+ return ret;
sdd-cur_speed = 0; /* Output Clock is stopped */
@@ -1261,14 +1260,14 @@ static int s3c64xx_spi_resume(struct device *dev)
struct spi_master *master = dev_get_drvdata(dev);
struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
struct s3c64xx_spi_info *sci = sdd-cntrlr_info;
+ int ret;
if (sci-cfg_gpio)
sci-cfg_gpio();
- if (!pm_runtime_suspended(dev)) {
- clk_prepare_enable(sdd-src_clk);
- clk_prepare_enable(sdd-clk);
- }
+ ret = pm_runtime_force_resume(dev);
+ if (ret 0)
+ return ret;
s3c64xx_spi_hwinit(sdd, sdd-port_id);
--
2.5.0
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[PATCH 2/4 RESEND] spi: s3c64xx: extend driver to make full use of runtime PM autosuspend
Extend the driver to make full use of runtime PM autosuspend.
Before only the SPI core was instructed to use autosuspend
by setting master-auto_runtime_pm. Nevertheless due to the missing
pm_runtime_use_autosuspend call autosuspend wasn't active.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
Changed:
- Let driver autosuspend also after leaving s3c64xx_spi_setup
- Enable runtime PM earlier in s3c64xx_spi_probe and prevent
suspending in the relevant part of probe
drivers/spi/spi-s3c64xx.c | 32 +---
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 8a6ab88..edeac06 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -32,6 +32,7 @@
#define MAX_SPI_PORTS 6
#define S3C64XX_SPI_QUIRK_POLL (1 0)
#define S3C64XX_SPI_QUIRK_CS_AUTO (1 1)
+#define AUTOSUSPEND_TIMEOUT2000
/* Registers and bit-fields */
@@ -859,13 +860,15 @@ static int s3c64xx_spi_setup(struct spi_device *spi)
}
}
- pm_runtime_put(sdd-pdev-dev);
+ pm_runtime_mark_last_busy(sdd-pdev-dev);
+ pm_runtime_put_autosuspend(sdd-pdev-dev);
if (!(sdd-port_conf-quirks S3C64XX_SPI_QUIRK_CS_AUTO))
writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd-regs +
S3C64XX_SPI_SLAVE_SEL);
return 0;
setup_exit:
- pm_runtime_put(sdd-pdev-dev);
+ pm_runtime_mark_last_busy(sdd-pdev-dev);
+ pm_runtime_put_autosuspend(sdd-pdev-dev);
/* setup() returns with device de-selected */
if (!(sdd-port_conf-quirks S3C64XX_SPI_QUIRK_CS_AUTO))
writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd-regs +
S3C64XX_SPI_SLAVE_SEL);
@@ -1133,18 +1136,24 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
goto err0;
}
+ pm_runtime_set_autosuspend_delay(pdev-dev, AUTOSUSPEND_TIMEOUT);
+ pm_runtime_use_autosuspend(pdev-dev);
+ pm_runtime_set_active(pdev-dev);
+ pm_runtime_enable(pdev-dev);
+ pm_runtime_get_noresume(pdev-dev);
+
/* Setup clocks */
sdd-clk = devm_clk_get(pdev-dev, spi);
if (IS_ERR(sdd-clk)) {
dev_err(pdev-dev, Unable to acquire clock 'spi'\n);
ret = PTR_ERR(sdd-clk);
- goto err0;
+ goto err1;
}
if (clk_prepare_enable(sdd-clk)) {
dev_err(pdev-dev, Couldn't enable clock 'spi'\n);
ret = -EBUSY;
- goto err0;
+ goto err1;
}
sprintf(clk_name, spi_busclk%d, sci-src_clk_nr);
@@ -1180,13 +1189,10 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
S3C64XX_SPI_INT_TX_OVERRUN_EN | S3C64XX_SPI_INT_TX_UNDERRUN_EN,
sdd-regs + S3C64XX_SPI_INT_EN);
- pm_runtime_set_active(pdev-dev);
- pm_runtime_enable(pdev-dev);
-
ret = devm_spi_register_master(pdev-dev, master);
if (ret != 0) {
dev_err(pdev-dev, cannot register SPI master: %d\n, ret);
- goto err4;
+ goto err3;
}
dev_dbg(pdev-dev, Samsung SoC SPI Driver loaded for Bus SPI-%d with
%d Slaves attached\n,
@@ -1195,15 +1201,19 @@ static int s3c64xx_spi_probe(struct platform_device
*pdev)
mem_res, (FIFO_LVL_MASK(sdd) 1) + 1,
sdd-rx_dma.dmach, sdd-tx_dma.dmach);
+ pm_runtime_mark_last_busy(pdev-dev);
+ pm_runtime_put_autosuspend(pdev-dev);
+
return 0;
-err4:
- pm_runtime_disable(pdev-dev);
- pm_runtime_set_suspended(pdev-dev);
err3:
clk_disable_unprepare(sdd-src_clk);
err2:
clk_disable_unprepare(sdd-clk);
+err1:
+ pm_runtime_put_noidle(pdev-dev);
+ pm_runtime_disable(pdev-dev);
+ pm_runtime_set_suspended(pdev-dev);
err0:
spi_master_put(master);
--
2.5.0
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[PATCH 1/4 RESEND] spi: s3c64xx: clean up runtime PM if driver registration fails
Fix missing runtime PM cleanup if driver registration fails.
Signed-off-by: Heiner Kallweit hkallwe...@gmail.com
---
Changed:
- Separated fix from added functionality
drivers/spi/spi-s3c64xx.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index cd1cfac..8a6ab88 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1186,7 +1186,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
ret = devm_spi_register_master(pdev-dev, master);
if (ret != 0) {
dev_err(pdev-dev, cannot register SPI master: %d\n, ret);
- goto err3;
+ goto err4;
}
dev_dbg(pdev-dev, Samsung SoC SPI Driver loaded for Bus SPI-%d with
%d Slaves attached\n,
@@ -1197,6 +1197,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
return 0;
+err4:
+ pm_runtime_disable(pdev-dev);
+ pm_runtime_set_suspended(pdev-dev);
err3:
clk_disable_unprepare(sdd-src_clk);
err2:
--
2.5.0
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[PATCH] ASoC: Samsung: Remove redundant arndale_audio_remove
There is no use of snd_soc_unregister_card in remove function
as devm_snd_soc_register_card in probe function automatically
handles it. So, remove use of snd_soc_unregister_card and with
this change remove arndale_audio_remove as it is now redundant.
Signed-off-by: Vaishali Thakkar vthakkar1...@gmail.com
---
sound/soc/samsung/arndale_rt5631.c | 10 --
1 file changed, 10 deletions(-)
diff --git a/sound/soc/samsung/arndale_rt5631.c
b/sound/soc/samsung/arndale_rt5631.c
index 8bf2e2c..9e371eb 100644
--- a/sound/soc/samsung/arndale_rt5631.c
+++ b/sound/soc/samsung/arndale_rt5631.c
@@ -116,15 +116,6 @@ static int arndale_audio_probe(struct platform_device
*pdev)
return ret;
}
-static int arndale_audio_remove(struct platform_device *pdev)
-{
- struct snd_soc_card *card = platform_get_drvdata(pdev);
-
- snd_soc_unregister_card(card);
-
- return 0;
-}
-
static const struct of_device_id samsung_arndale_rt5631_of_match[]
__maybe_unused = {
{ .compatible = samsung,arndale-rt5631, },
{ .compatible = samsung,arndale-alc5631, },
@@ -139,7 +130,6 @@ static struct platform_driver arndale_audio_driver = {
.of_match_table = of_match_ptr(samsung_arndale_rt5631_of_match),
},
.probe = arndale_audio_probe,
- .remove = arndale_audio_remove,
};
module_platform_driver(arndale_audio_driver);
--
1.9.1
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Re: CPUIdle for Exynos5422 Odroid-XU3/XU4 boards.
On 08/20/2015 12:54 PM, Anand Moon wrote: Hello Krzysztof/Kukjim, CPUIdle seen to be not working for Exynos5422 Odroid boards. Is their any way this feature will be implemented in the future. Yeah a good willing to fix the bl1. More than one year asking for that ! nooo way !! Your answer is at the end of http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/350632.html -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
