Re: [linux-sunxi] Re: Upstreaming sunxi mmc support
Hi, On 12/19/2013 10:49 PM, Юрий Пухальский wrote: Good UTC night! Got somewhat further, yet still there are problems. Is there anything i should change in kernel cmdline maybe? Is this a sun5i device, iow A10s or A13 SOC based ? If so you need to build and boot with my sunxi-next u-boot branch: https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-next The only time I've seen those clock update timeout errors is on sun5i with an unfixed uboot. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] A20 vga - 1280x1024
sorry i give up , may be someone else could help you (if applicable here). -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] Re: Upstreaming sunxi mmc support
Good UTC night! Got somewhat further, yet still there are problems. Is there anything i should change in kernel cmdline maybe? On Wed, Dec 18, 2013 at 11:08 PM, Hans de Goede wrote: > Hi, > > > On 12/18/2013 04:30 PM, Юрий Пухальский wrote: > >> Good UTC evening! >> >> I've tried test2 branch and uboot from the branch. Doesn't work yet. >> Are there any kernel configuration options I might have missed? I've used >> defconfig. >> Or maybe the addresses to load are wrong? >> Here's what i see in the log. >> > > Your kernel config likely is not enabling the mmc controller, try using > this tree > (which is the latest): > https://github.com/jwrdegoede/linux-sunxi/commits/sunxi-next > > And if your machine is sun5i or sun7i, build u-boot from this tree: > https://github.com/jwrdegoede/u-boot-sunxi/commits/sunxi-next > (for sun4i older uboots will work fine too) > > And use the attached kernel config. > > > Regards, > > Hans > > -- > You received this message because you are subscribed to a topic in the > Google Groups "linux-sunxi" group. > To unsubscribe from this topic, visit https://groups.google.com/d/ > topic/linux-sunxi/prLRvZAHFvc/unsubscribe. > To unsubscribe from this group and all of its topics, send an email to > linux-sunxi+unsubscr...@googlegroups.com. > For more options, visit https://groups.google.com/groups/opt_out. > -- Point of presence: http://aikipooh.ipernity.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out. ## Booting kernel from Legacy Image at 4600 ... Image Name: Linux-3.13.0-rc4 Image Type: ARM Linux Kernel Image (uncompressed) Data Size:5234464 Bytes = 5 MiB Load Address: 40008000 Entry Point: 40008000 Verifying Checksum ... OK ## Flattened Device Tree blob at 4900 Booting using the fdt blob at 0x4900 Loading Kernel Image ... OK Using Device Tree in place at 4900, end 49005551 Starting kernel ... [0.00] Booting Linux on physical CPU 0x0 [0.00] Initializing cgroup subsys cpuset [0.00] Initializing cgroup subsys cpu [0.00] Initializing cgroup subsys cpuacct [0.00] Linux version 3.13.0-rc4 (root@localhost) (gcc version 4.7.3 (Gentoo 4.7.3-r1 p1.3, pie-0.5.5) ) #1 SMP Thu Dec 19 23:50:29 MSK 2013 [0.00] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d [0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [0.00] Machine model: Olimex A13-Olinuxino [0.00] Memory policy: Data cache writeback [0.00] On node 0 totalpages: 131072 [0.00] free_area_init_node: node 0, pgdat c0accd40, node_mem_map c0bd4000 [0.00] Normal zone: 1024 pages used for memmap [0.00] Normal zone: 0 pages reserved [0.00] Normal zone: 131072 pages, LIFO batch:31 [0.00] CPU: All CPU(s) started in SVC mode. [0.00] PERCPU: Embedded 9 pages/cpu @c0fdc000 s13056 r8192 d15616 u36864 [0.00] pcpu-alloc: s13056 r8192 d15616 u36864 alloc=9*4096 [0.00] pcpu-alloc: [0] 0 [0.00] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 130048 [0.00] Kernel command line: console=ttyS0,115200 loglevel=9 root=/dev/mmcblk0p1 rootwait earlyprintk rw panic=10 [0.00] PID hash table entries: 2048 (order: 1, 8192 bytes) [0.00] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes) [0.00] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes) [0.00] allocated 1048576 bytes of page_cgroup [0.00] please try 'cgroup_disable=memory' option if you don't want memory cgroups [0.00] Memory: 506572K/524288K available (6721K kernel code, 825K rwdata, 2884K rodata, 676K init, 966K bss, 17716K reserved, 0K highmem) [0.00] Virtual kernel memory layout: [0.00] vector : 0x - 0x1000 ( 4 kB) [0.00] fixmap : 0xfff0 - 0xfffe ( 896 kB) [0.00] vmalloc : 0xe080 - 0xff00 ( 488 MB) [0.00] lowmem : 0xc000 - 0xe000 ( 512 MB) [0.00] pkmap : 0xbfe0 - 0xc000 ( 2 MB) [0.00] modules : 0xbf00 - 0xbfe0 ( 14 MB) [0.00] .text : 0xc0008000 - 0xc0969678 (9606 kB) [0.00] .init : 0xc096a000 - 0xc0a13300 ( 677 kB) [0.00] .data : 0xc0a14000 - 0xc0ae2560 ( 826 kB) [0.00].bss : 0xc0ae2560 - 0xc0bd3da8 ( 967 kB) [0.00] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 [0.00] Hierarchical RCU implementation. [0.00] RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1. [0.00] NR_IRQS:16 nr_irqs:16 16 [0.00] sched_clock: 32 bits at 24MHz, resolut
Re: [linux-sunxi] A20 vga - 1280x1024
четверг, 19 декабря 2013 г., 19:08:50 UTC+4 пользователь Rajesh Mallah написал: > > Do you want to run linux or android eventually ? > > Android 4.2.2 > -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot-sunxi 11/11] sunxi: fix gpio drive mask
Hi, On 12/19/2013 01:12 PM, Olliver Schinagl wrote: On 19-12-13 15:22, Chen-Yu Tsai wrote: On Thu, Dec 19, 2013 at 6:43 PM, Olliver Schinagl wrote: On 19-12-13 10:58, Chen-Yu Tsai wrote: From: Ma Haijun A better commit message on this patch would be good, especially explaining it a bit deeper or referencing where you found this. You mean A20 user manual reference? Sure. I'll add that. Though Hans has already merged the other half of the original fix. Yeah I saw; it's just that I wasn't aware and the commit log was a little to uncertain if this is a 'we think this is a fix' or 'we found this in the docs so should be a fix' :) To answer that: the pull and drive control registers have 2 bits per pin, so the masking with ~(0xf << offset) done before was not only clearing the bits of the pin in question but also of the next higher pin (ie when setting pull for A3, pull for A4 would be cleared). This likely has never been an issue since we tend to set pull from low pin number to high pin number ... Feel free to use the above as commit msg btw. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] Re: LCD output on A20 Android 4.2.2
Op donderdag 10 oktober 2013 01:31:41 UTC+2 schreef hdev...@gmail.com: > Hi, > > I followed the instructions to build Android 4.2.2 for A20 from the > "cubieboard2_android_SDK_v1.03.tgz" archive. > > The resulting image works fine on HDMI output but fails to output on an LCD > connected via LVDS (black screen). > > I used the same parameters in sys_config.fex as Linaro image that works fine > on my LCD. > > Is there a patch to apply to enable the LCD output with Android ? I have the same problem. Did you manage to get it working? With some tweaking i was able to get the boot screen but as soon as the desktop is when the LVDS is disabled. setenv bootcmd run load1 setargs_nand boot_normal setenv boot_normal 'run load1; boota 40007800' setenv load1 fatload nand 0 4300 script.bin -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] zet6221 ts driver testing
Hello I need to include ZET6221 driver for 3SC6410 FriendlyArm board. Can someone send source files ? -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] A20 vga - 1280x1024
Do you want to run linux or android eventually ? On Wed, Dec 18, 2013 at 1:59 AM, wrote: > I have Mele M3. Android 4.2.2 > > u-boot(selfcompiled): > lichee-dev-a20 > > script.bin : > disp_init_enable= 1 > disp_mode = 0 > screen0_output_type = 4 > screen0_output_mode = 3 > > BOX connected to VGA, starts at 1024x768, than switched to 1280x1024 with > image scaled from 1280x720 > Seems that something(u-boot?) ignoring things that i set in script.bin, is > it possible to get 1280x1024 resolution on vga ? > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to linux-sunxi+unsubscr...@googlegroups.com. > For more options, visit https://groups.google.com/groups/opt_out. > -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot-sunxi 11/11] sunxi: fix gpio drive mask
On 19-12-13 15:22, Chen-Yu Tsai wrote: On Thu, Dec 19, 2013 at 6:43 PM, Olliver Schinagl wrote: On 19-12-13 10:58, Chen-Yu Tsai wrote: From: Ma Haijun A better commit message on this patch would be good, especially explaining it a bit deeper or referencing where you found this. You mean A20 user manual reference? Sure. I'll add that. Though Hans has already merged the other half of the original fix. Yeah I saw; it's just that I wasn't aware and the commit log was a little to uncertain if this is a 'we think this is a fix' or 'we found this in the docs so should be a fix' :) It will only help people reading over the commit logs is all. Oliver wens oliver Signed-off-by: Ma Haijun Signed-off-by: Chen-Yu Tsau --- arch/arm/cpu/armv7/sunxi/pinmux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c b/arch/arm/cpu/armv7/sunxi/pinmux.c index 8428439..56671f6 100644 --- a/arch/arm/cpu/armv7/sunxi/pinmux.c +++ b/arch/arm/cpu/armv7/sunxi/pinmux.c @@ -69,7 +69,7 @@ int sunxi_gpio_set_drv(u32 pin, u32 val) &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; drv = readl(&pio->drv[0] + index); - drv &= ~(0xf << offset); + drv &= ~(0x3 << offset); drv |= val << offset; writel(drv, &pio->drv[0] + index); -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot-sunxi 11/11] sunxi: fix gpio drive mask
On Thu, Dec 19, 2013 at 6:43 PM, Olliver Schinagl wrote: > On 19-12-13 10:58, Chen-Yu Tsai wrote: >> >> From: Ma Haijun > > A better commit message on this patch would be good, especially explaining > it a bit deeper or referencing where you found this. You mean A20 user manual reference? Sure. I'll add that. Though Hans has already merged the other half of the original fix. wens > > oliver > >> >> Signed-off-by: Ma Haijun >> Signed-off-by: Chen-Yu Tsau >> --- >> arch/arm/cpu/armv7/sunxi/pinmux.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c >> b/arch/arm/cpu/armv7/sunxi/pinmux.c >> index 8428439..56671f6 100644 >> --- a/arch/arm/cpu/armv7/sunxi/pinmux.c >> +++ b/arch/arm/cpu/armv7/sunxi/pinmux.c >> @@ -69,7 +69,7 @@ int sunxi_gpio_set_drv(u32 pin, u32 val) >> &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; >> >> drv = readl(&pio->drv[0] + index); >> - drv &= ~(0xf << offset); >> + drv &= ~(0x3 << offset); >> drv |= val << offset; >> >> writel(drv, &pio->drv[0] + index); >> > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to linux-sunxi+unsubscr...@googlegroups.com. > For more options, visit https://groups.google.com/groups/opt_out. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot-sunxi 02/11] ARM: sunxi: Add GMAC base address and clocks
Hi,
On Thu, Dec 19, 2013 at 6:38 PM, Olliver Schinagl
wrote:
> On 19-12-13 10:58, Chen-Yu Tsai wrote:
>>
>> From: Jens Kuske
>>
>> Signed-off-by: Jens Kuske
>> ---
>> arch/arm/include/asm/arch-sunxi/clock.h | 3 +++
>> arch/arm/include/asm/arch-sunxi/cpu.h | 1 +
>> 2 files changed, 4 insertions(+)
>>
>> diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
>> b/arch/arm/include/asm/arch-sunxi/clock.h
>> index 2e65a9d..b4e540e 100644
>> --- a/arch/arm/include/asm/arch-sunxi/clock.h
>> +++ b/arch/arm/include/asm/arch-sunxi/clock.h
>> @@ -104,6 +104,8 @@ struct sunxi_ccm_reg {
>> u32 mali_clk_cfg; /* 0x154 */
>> u8 res7[0x4];
>> u32 mbus_clk_cfg; /* 0x15c */
>> + u8 res8[0x4];
>> + u32 gmac_clk_cfg; /* 0x164 */
>> };
>>
>> /* apb1 bit field */
>> @@ -170,6 +172,7 @@ struct sunxi_ccm_reg {
>> #define AHB_GATE_OFFSET_USB_OHCI0 2
>> #define AHB_GATE_OFFSET_USB_EHCI0 1
>> #define AHB_GATE_OFFSET_USB 0
>> +#define AHB_GATE_OFFSET_GMAC 17
>
> Looks like GMAC and EMAC use the same AHB Gate offset? Can't we use
> AHB_GATE_OFFSET_EMAC? or atleast put both defines on the same (ordered)
> spot?
They have the same offset, but are in separate registers.
EMAC uses ccm->ahb_gate0; GMAC uses ccm->ahb_gate1.
ChenYu
>
> Oliver
>
>>
>> #define CCM_AHB_GATE_GPS (0x1 << 26)
>> #define CCM_AHB_GATE_SDRAM (0x1 << 14)
>> diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h
>> b/arch/arm/include/asm/arch-sunxi/cpu.h
>> index 378989c..17facc3 100644
>> --- a/arch/arm/include/asm/arch-sunxi/cpu.h
>> +++ b/arch/arm/include/asm/arch-sunxi/cpu.h
>> @@ -109,6 +109,7 @@
>>
>> #define SUNXI_GPS_BASE0x01c3
>> #define SUNXI_MALI400_BASE0x01c4
>> +#define SUNXI_GMAC_BASE0x01c5
>>
>> /* module sram */
>> #define SUNXI_SRAM_C_BASE 0x01d0
>>
>
> --
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Re: [linux-sunxi] Sun8i (A23) spotted in the wild.
On Thu, Dec 19, 2013 at 08:56:07AM -0500, jonsm...@gmail.com wrote: > On Wed, Dec 18, 2013 at 6:32 PM, Luc Verhaegen wrote: > > I tried to order myself one of those cheap Q88 tablets with an A13 just > > now. Big was my surprise when i got it and popped it open, as i was > > staring at an A23. > > > > Bad news all round really: > > * fully locked down android, no root, no adb. I will give another root > > exploit a try tomorrow. > > * our fel utility does not work. > > * we of course have no code for u-boot or linux yet. > > * nothing on the serial port. > > > > This device is a really serious GPL violator. They even went as far as > > removing all open source licenses from the About section under android > > settings. > > Before jumping to conclusions we need to ask Allwinner for the A23 > Android source. I suspect they will provide that as soon you are able > to locate someone who can fulfill the request. They've released the > source for all of their other chips so I wouldn't expect this one to > be any different. > > Many people have been bugging Allwinner to put up a public git repo > instead handing out tar balls. I also wish they's do a unified Android > release that works on all of their CPUs. Will we ever get Kitkat for > the A10? > > So the GPL violator here is likely the Q88 motherboard manufacturer. > First you will need to identify who it is. That is not a simple task > since it is unlikely to be the company that did final assembly. After > you find them you'll need to explain the GPL to them since they > probably don't understand it. I'd also be suspicious that this > company shipped a beta from Allwinner which wasn't really ready for > release. > > Once the Allwinner A23 SDK is located it shouldn't be too hard to load > it and replace whatever this Q88 vendor did. > > This is just a long education process for these vendors. Allwinner > appears to understand the GPL and seems to be trying to comply with > it. Now Allwinner needs to work on educating their customers on how to > comply too. This was mostly a heads-up for allwinner or for those who have contacts within allwinner: The hw is out there, and it is currently in clear violation. Please let us get this resolved. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] Sun8i (A23) spotted in the wild.
On Wed, Dec 18, 2013 at 6:32 PM, Luc Verhaegen wrote: > I tried to order myself one of those cheap Q88 tablets with an A13 just > now. Big was my surprise when i got it and popped it open, as i was > staring at an A23. > > Bad news all round really: > * fully locked down android, no root, no adb. I will give another root > exploit a try tomorrow. > * our fel utility does not work. > * we of course have no code for u-boot or linux yet. > * nothing on the serial port. > > This device is a really serious GPL violator. They even went as far as > removing all open source licenses from the About section under android > settings. Before jumping to conclusions we need to ask Allwinner for the A23 Android source. I suspect they will provide that as soon you are able to locate someone who can fulfill the request. They've released the source for all of their other chips so I wouldn't expect this one to be any different. Many people have been bugging Allwinner to put up a public git repo instead handing out tar balls. I also wish they's do a unified Android release that works on all of their CPUs. Will we ever get Kitkat for the A10? So the GPL violator here is likely the Q88 motherboard manufacturer. First you will need to identify who it is. That is not a simple task since it is unlikely to be the company that did final assembly. After you find them you'll need to explain the GPL to them since they probably don't understand it. I'd also be suspicious that this company shipped a beta from Allwinner which wasn't really ready for release. Once the Allwinner A23 SDK is located it shouldn't be too hard to load it and replace whatever this Q88 vendor did. This is just a long education process for these vendors. Allwinner appears to understand the GPL and seems to be trying to comply with it. Now Allwinner needs to work on educating their customers on how to comply too. > > What we do know: > * two obvious serial pads (which are not sending out anything atm) > * it tries to boot off SD when a likely candidate is there > * it has a 3.4.39 kernel, and the /proc/config.gz was world readable > (this is where the string sun8i was found). > * HW is an A23 which is a bga, with an AXP223 companion > > Board picture is available at the device page: > http://linux-sunxi.org/Ippo_q8h > > Luc Verhaegen. > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to linux-sunxi+unsubscr...@googlegroups.com. > For more options, visit https://groups.google.com/groups/opt_out. -- Jon Smirl jonsm...@gmail.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot-sunxi 11/11] sunxi: fix gpio drive mask
On 19-12-13 10:58, Chen-Yu Tsai wrote: From: Ma Haijun A better commit message on this patch would be good, especially explaining it a bit deeper or referencing where you found this. oliver Signed-off-by: Ma Haijun Signed-off-by: Chen-Yu Tsau --- arch/arm/cpu/armv7/sunxi/pinmux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c b/arch/arm/cpu/armv7/sunxi/pinmux.c index 8428439..56671f6 100644 --- a/arch/arm/cpu/armv7/sunxi/pinmux.c +++ b/arch/arm/cpu/armv7/sunxi/pinmux.c @@ -69,7 +69,7 @@ int sunxi_gpio_set_drv(u32 pin, u32 val) &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; drv = readl(&pio->drv[0] + index); - drv &= ~(0xf << offset); + drv &= ~(0x3 << offset); drv |= val << offset; writel(drv, &pio->drv[0] + index); -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] [PATCH u-boot-sunxi 03/11] ARM: sunxi: Add GMAC driver
On 19-12-13 10:58, Chen-Yu Tsai wrote:
From: Jens Kuske
The existing net/designware driver can be used for sunxi GMAC.
Signed-off-by: Jens Kuske
---
arch/arm/cpu/armv7/sunxi/board.c | 21 -
include/configs/sunxi-common.h | 9 +
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 3e66225..8c43ab6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
#include
@@ -134,14 +135,32 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_SUNXI_EMAC)
+#if defined(CONFIG_SUNXI_EMAC) || defined(CONFIG_SUNXI_GMAC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
+#ifdef CONFIG_SUNXI_EMAC
sunxi_emac_initialize(bis);
+#else
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
Also, do we know how this clk struct looks? I would expect so, can we
use defines here?
oliver
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ sunxi_gpio_set_cfgpin(pin, 5);
+
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#endif
return 0;
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ee21761..165b2ee 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -430,6 +430,15 @@
#define CONFIG_CMD_NET
#endif
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#endif
+
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
--
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Re: [linux-sunxi] [PATCH u-boot-sunxi 03/11] ARM: sunxi: Add GMAC driver
On 19-12-13 10:58, Chen-Yu Tsai wrote:
From: Jens Kuske
The existing net/designware driver can be used for sunxi GMAC.
Signed-off-by: Jens Kuske
---
arch/arm/cpu/armv7/sunxi/board.c | 21 -
include/configs/sunxi-common.h | 9 +
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 3e66225..8c43ab6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
#include
@@ -134,14 +135,32 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_SUNXI_EMAC)
+#if defined(CONFIG_SUNXI_EMAC) || defined(CONFIG_SUNXI_GMAC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
+#ifdef CONFIG_SUNXI_EMAC
sunxi_emac_initialize(bis);
+#else
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ sunxi_gpio_set_cfgpin(pin, 5);
+
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#endif
While small, could we make that into a function called
sunxi_gmac_initialize(bis)?
Oliver
return 0;
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ee21761..165b2ee 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -430,6 +430,15 @@
#define CONFIG_CMD_NET
#endif
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#endif
+
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
--
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Re: [linux-sunxi] [PATCH u-boot-sunxi 02/11] ARM: sunxi: Add GMAC base address and clocks
On 19-12-13 10:58, Chen-Yu Tsai wrote:
From: Jens Kuske
Signed-off-by: Jens Kuske
---
arch/arm/include/asm/arch-sunxi/clock.h | 3 +++
arch/arm/include/asm/arch-sunxi/cpu.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 2e65a9d..b4e540e 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -104,6 +104,8 @@ struct sunxi_ccm_reg {
u32 mali_clk_cfg; /* 0x154 */
u8 res7[0x4];
u32 mbus_clk_cfg; /* 0x15c */
+ u8 res8[0x4];
+ u32 gmac_clk_cfg; /* 0x164 */
};
/* apb1 bit field */
@@ -170,6 +172,7 @@ struct sunxi_ccm_reg {
#define AHB_GATE_OFFSET_USB_OHCI0 2
#define AHB_GATE_OFFSET_USB_EHCI0 1
#define AHB_GATE_OFFSET_USB 0
+#define AHB_GATE_OFFSET_GMAC 17
Looks like GMAC and EMAC use the same AHB Gate offset? Can't we use
AHB_GATE_OFFSET_EMAC? or atleast put both defines on the same (ordered)
spot?
Oliver
#define CCM_AHB_GATE_GPS (0x1 << 26)
#define CCM_AHB_GATE_SDRAM (0x1 << 14)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h
b/arch/arm/include/asm/arch-sunxi/cpu.h
index 378989c..17facc3 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -109,6 +109,7 @@
#define SUNXI_GPS_BASE0x01c3
#define SUNXI_MALI400_BASE0x01c4
+#define SUNXI_GMAC_BASE0x01c5
/* module sram */
#define SUNXI_SRAM_C_BASE 0x01d0
--
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Re: [linux-sunxi] U-boot for A20 chipset
On 19-12-13 07:54, pby wrote: Hi, we have A20 custom chipset. i want to boot it from sdcard. kindly tell me where i can get u-boot source code for suxi-spl.bin and u-boot.bin. we have a linux-sunxi/u-boot-sunxi repository over on a very well known git site kindly tell me git repositary and how can i compile. if you go to linux-sunxi.org everything will become clear oliver Regards pby -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] Fosdem sunxi developers dinner Saturday Feb 2nd, Brussels
Hi, On 12/19/2013 09:18 AM, Carlo Caione wrote: On Wed, Dec 11, 2013 at 9:27 AM, Hans de Goede wrote: Hi All, Together with Oliver and Tsvetan I'm organizing a Fosdem dinner for sunxi developers on Saturday evening. in the subject s/2nd/1st/ :) Oh yes, you're completely correct. The dinner is planned for Saturday evening Feb 1st. My bad. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] Firmware for Bluetooth (and wifi)
Hi, On Thu, Dec 19, 2013 at 12:39 AM, Chen-Yu Tsai wrote: > Hi, > > On Thu, Dec 19, 2013 at 12:16 AM, Arend van Spriel wrote: >> On 12/18/2013 02:12 PM, Hans de Goede wrote: >>> Hi, >>> >>> On 12/18/2013 11:31 AM, Arend van Spriel wrote: On 12/05/2013 10:46 PM, Julian Calaby wrote: > Firstly, are there any plans to support the BCM43362 chipset with the > brcmfmac driver in the near future? Hi Julian, I am working on a patch to support this chip. It is looking promising. Just have to go after a firmware image to be sure. >>> >>> Cool. Do you have a cubietruck? With my latest wip tree: >>> https://github.com/jwrdegoede/linux-sunxi/commits/sunxi-next >> >> No cubietruck here. I googled the term last week because it came up and >> found embeddedcomputer.nl selling it. >> >>> We've mmc/sdio controller support on top of 3.13-rc4, it would be >>> nice if we could also get the wifi and bluetooth to work here. I got the chip to respond to probing. It is BCM43362 for sure. root@cubietruck:/sys/bus/mmc/devices/mmc1:0001/mmc1:0001:1# cat device 0xa962 root@cubietruck:/sys/bus/mmc/devices/mmc1:0001/mmc1:0001:1# cat vendor 0x02d0 Vendor ID is Broadcom. Device ID is 43362. But I get two devices, mmc1:0001:1 and mmc1:0001:2. I don't know if this is normal or not. Bluetooth still isn't responding. >>> I'm certainly willing to give some patches for this a try. Do you >>> have an example of what the dts file for a board with broadcom sdio >>> wifi looks like ? >> >> I am still struggling with dts changes for a Pandaboard. As I understood >> the cubietruck uses AP6210 module and the dts really depends on how >> things are wired up with it. Apart from the SDIO lines it may have an >> additional GPIO output to power the module and GPIO inputs to wakeup the >> host and interrupt line. > > Yes it does. 2 GPIO lines for power, 1 for WiFi, 1 for BT. > Also takes 2 GPIO inputs for interrupts. Not sure how to feed this > to the driver. Last, it takes a clock output out of the A20 for the > low power 32k clock. Not sure if this is mandatory? > > I've read the schematics more than a few times. I can get a dts out > tomorrow. I was planning on doing the clock output and rfkill part > first. Here's my tree, in case anyone wants to play around. It will be rebased a lot. https://github.com/wens/linux/tree/wip/sunxi-next-wifi The DT is not finished yet. External interrupts and low power clock are still missing. Can anyone provide an example for useing the PIO EINT interrupt pins? Cheers, ChenYu -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH u-boot-sunxi 11/11] sunxi: fix gpio drive mask
From: Ma Haijun Signed-off-by: Ma Haijun Signed-off-by: Chen-Yu Tsau --- arch/arm/cpu/armv7/sunxi/pinmux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c b/arch/arm/cpu/armv7/sunxi/pinmux.c index 8428439..56671f6 100644 --- a/arch/arm/cpu/armv7/sunxi/pinmux.c +++ b/arch/arm/cpu/armv7/sunxi/pinmux.c @@ -69,7 +69,7 @@ int sunxi_gpio_set_drv(u32 pin, u32 val) &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]; drv = readl(&pio->drv[0] + index); - drv &= ~(0xf << offset); + drv &= ~(0x3 << offset); drv |= val << offset; writel(drv, &pio->drv[0] + index); -- 1.8.5.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH u-boot-sunxi 08/11] ARM: sunxi: GMAC driver phy interface based on config
GMAC in A20 SoC supports MII and RGMII modes.
Support both so we can use GMAC in different boards.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/cpu/armv7/sunxi/board.c | 9 +
boards.cfg | 4 ++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 6d555f0..386b16e 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -153,7 +153,11 @@ int cpu_eth_init(bd_t *bis)
setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
/* Set MII clock */
+#ifdef CONFIG_RGMII
setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
+#else
+ setbits_le32(&ccm->gmac_clk_cfg, 0);
+#endif
/* Configure pin mux settings for GMAC */
for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) {
@@ -161,7 +165,12 @@ int cpu_eth_init(bd_t *bis)
sunxi_gpio_set_drv(pin, 3);
}
+#ifdef CONFIG_RGMII
designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#else
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1, PHY_INTERFACE_MODE_MII);
+#endif
+
#endif
return 0;
diff --git a/boards.cfg b/boards.cfg
index 405cf56..044e5ca 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -364,8 +364,8 @@ Active arm armv7 sunxi -
sunxi
Active arm armv7 sunxi - sunxi
Cubieboard
sun4i:CUBIEBOARD,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245
-
Active arm armv7 sunxi - sunxi
Cubieboard2
sun7i:CUBIEBOARD2,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS
-
Active arm armv7 sunxi - sunxi
Cubieboard2_FEL
sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS
-
-Active arm armv7 sunxi - sunxi
Cubietruck
sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS
-
-Active arm armv7 sunxi - sunxi
Cubietruck_FEL
sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS
-
+Active arm armv7 sunxi - sunxi
Cubietruck
sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS
-
+Active arm armv7 sunxi - sunxi
Cubietruck_FEL
sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS
-
Active arm armv7 sunxi - sunxi
Cubieboard_512
sun4i:CUBIEBOARD_512,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245
-
Active arm armv7 sunxi - sunxi
Cubieboard_FEL
sun4i:CUBIEBOARD,SPL_FEL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245
-
Active arm armv7 sunxi - sunxi
DNS_M82 sun4i:DNS_M82,SPL
-
--
1.8.5.1
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[linux-sunxi] [PATCH u-boot-sunxi 07/11] ARM: sunxi: Set drive level for GMAC pins
GMAC requires a higher drive level for gigabit speeds.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/cpu/armv7/sunxi/board.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 8c43ab6..6d555f0 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -156,8 +156,10 @@ int cpu_eth_init(bd_t *bis)
setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
/* Configure pin mux settings for GMAC */
- for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) {
sunxi_gpio_set_cfgpin(pin, 5);
+ sunxi_gpio_set_drv(pin, 3);
+ }
designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
#endif
--
1.8.5.1
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[linux-sunxi] [PATCH u-boot-sunxi 09/11] ARM: sunxi: Do not select unused GMAC pins under RGMII mode
Signed-off-by: Chen-Yu Tsai
---
arch/arm/cpu/armv7/sunxi/board.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 386b16e..5d19a64 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -160,7 +160,12 @@ int cpu_eth_init(bd_t *bis)
#endif
/* Configure pin mux settings for GMAC */
- for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++) {
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(16); pin++) {
+#ifdef CONFIG_RGMII
+ /* skip unused pins in RGMII mode */
+ if (pin == SUNXI_GPA(9) || pin == SUNXI_GPA(14))
+ continue;
+#endif
sunxi_gpio_set_cfgpin(pin, 5);
sunxi_gpio_set_drv(pin, 3);
}
--
1.8.5.1
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[linux-sunxi] [PATCH u-boot-sunxi 05/11] ARM: sunxi: Enable support for gigabit PHYs
GMAC on cubietruck uses a gigabit PHY. Enable gigabit PHY support so auto-negotiation is correct. Signed-off-by: Chen-Yu Tsai --- include/configs/sunxi-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 165b2ee..2c86a8e 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -433,6 +433,7 @@ #ifdef CONFIG_SUNXI_GMAC #define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */ #define CONFIG_DW_AUTONEG +#define CONFIG_PHY_GIGE/* GMAC can use gigabit PHY */ #define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */ #define CONFIG_MII /* MII PHY management */ #define CONFIG_CMD_MII -- 1.8.5.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH u-boot-sunxi 00/11] Add GMAC support to u-boot
Hi everyone, This patch series add support for GMAC on Cubieboard2 and Cubietruck, using the designware driver already in u-boot. The patch series should be applied over the current 'sunxi' branch in linux-sunxi/u-boot-sunxi. The work was started by Jens Kuske (jemk), which enabled the GMAC on CubieTruck under 10/100 speeds. Then I added gigabit, pin drive level and Cubieboard 2 support. Ma Haijun picked out an incorrect mask in the pin setup code. There is one modification to the original driver, which reduces the DMA burst length, to a value supported by the GMAC. This should probably be upstreamed. The remaining patches are all sunxi specific. Adding GMAC support to other A20 boards shoule be as simple as adding the proper defines to boards.cfg. Cheers, ChenYu Chen-Yu Tsai (6): ARM: sunxi: Enable support for gigabit PHYs ARM: sunxi: Add functions to set pin drive levels ARM: sunxi: Set drive level for GMAC pins ARM: sunxi: GMAC driver phy interface based on config ARM: sunxi: Do not select unused GMAC pins under RGMII mode ARM: sunxi: Let cubieboard2 use the GMAC driver Jens Kuske (4): net/designware: Reduce DMA burst length ARM: sunxi: Add GMAC base address and clocks ARM: sunxi: Add GMAC driver ARM: sunxi: Let cubietruck use the GMAC driver Ma Haijun (1): sunxi: fix gpio drive mask arch/arm/cpu/armv7/sunxi/board.c| 37 - arch/arm/cpu/armv7/sunxi/pinmux.c | 18 arch/arm/include/asm/arch-sunxi/clock.h | 3 +++ arch/arm/include/asm/arch-sunxi/cpu.h | 1 + arch/arm/include/asm/arch-sunxi/gpio.h | 4 boards.cfg | 8 +++ drivers/net/designware.c| 2 +- include/configs/sunxi-common.h | 10 + 8 files changed, 77 insertions(+), 6 deletions(-) -- 1.8.5.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH u-boot-sunxi 03/11] ARM: sunxi: Add GMAC driver
From: Jens Kuske
The existing net/designware driver can be used for sunxi GMAC.
Signed-off-by: Jens Kuske
---
arch/arm/cpu/armv7/sunxi/board.c | 21 -
include/configs/sunxi-common.h | 9 +
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 3e66225..8c43ab6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
#include
@@ -134,14 +135,32 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_SUNXI_EMAC)
+#if defined(CONFIG_SUNXI_EMAC) || defined(CONFIG_SUNXI_GMAC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
+#ifdef CONFIG_SUNXI_EMAC
sunxi_emac_initialize(bis);
+#else
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ sunxi_gpio_set_cfgpin(pin, 5);
+
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#endif
return 0;
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ee21761..165b2ee 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -430,6 +430,15 @@
#define CONFIG_CMD_NET
#endif
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#endif
+
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
--
1.8.5.1
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[linux-sunxi] [PATCH u-boot-sunxi 01/11] net/designware: Reduce DMA burst length
From: Jens Kuske The GMAC module in Allwinner sunxi SoCs seems to have problems with burst lenghts > 8. Signed-off-by: Jens Kuske --- drivers/net/designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 22155b4..865abe1 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -154,7 +154,7 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis) /* Resore the HW MAC address as it has been lost during MAC reset */ dw_write_hwaddr(dev); - writel(FIXEDBURST | PRIORXTX_41 | BURST_16, + writel(FIXEDBURST | PRIORXTX_41 | BURST_8, &dma_p->busmode); writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | -- 1.8.5.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH u-boot-sunxi 04/11] ARM: sunxi: Let cubietruck use the GMAC driver
From: Jens Kuske Signed-off-by: Jens Kuske --- boards.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/boards.cfg b/boards.cfg index 5d147e2..405cf56 100644 --- a/boards.cfg +++ b/boards.cfg @@ -364,8 +364,8 @@ Active arm armv7 sunxi - sunxi Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - -Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_EMAC,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - -Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_EMAC,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - +Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - +Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - Active arm armv7 sunxi - sunxi Cubieboard_512 sun4i:CUBIEBOARD_512,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - Active arm armv7 sunxi - sunxi Cubieboard_FEL sun4i:CUBIEBOARD,SPL_FEL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - Active arm armv7 sunxi - sunxi DNS_M82 sun4i:DNS_M82,SPL - -- 1.8.5.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] [PATCH u-boot-sunxi 02/11] ARM: sunxi: Add GMAC base address and clocks
From: Jens Kuske
Signed-off-by: Jens Kuske
---
arch/arm/include/asm/arch-sunxi/clock.h | 3 +++
arch/arm/include/asm/arch-sunxi/cpu.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 2e65a9d..b4e540e 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -104,6 +104,8 @@ struct sunxi_ccm_reg {
u32 mali_clk_cfg; /* 0x154 */
u8 res7[0x4];
u32 mbus_clk_cfg; /* 0x15c */
+ u8 res8[0x4];
+ u32 gmac_clk_cfg; /* 0x164 */
};
/* apb1 bit field */
@@ -170,6 +172,7 @@ struct sunxi_ccm_reg {
#define AHB_GATE_OFFSET_USB_OHCI0 2
#define AHB_GATE_OFFSET_USB_EHCI0 1
#define AHB_GATE_OFFSET_USB0
+#define AHB_GATE_OFFSET_GMAC 17
#define CCM_AHB_GATE_GPS (0x1 << 26)
#define CCM_AHB_GATE_SDRAM (0x1 << 14)
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h
b/arch/arm/include/asm/arch-sunxi/cpu.h
index 378989c..17facc3 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -109,6 +109,7 @@
#define SUNXI_GPS_BASE 0x01c3
#define SUNXI_MALI400_BASE 0x01c4
+#define SUNXI_GMAC_BASE0x01c5
/* module sram */
#define SUNXI_SRAM_C_BASE 0x01d0
--
1.8.5.1
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[linux-sunxi] [PATCH u-boot-sunxi 06/11] ARM: sunxi: Add functions to set pin drive levels
Signed-off-by: Chen-Yu Tsai
---
arch/arm/cpu/armv7/sunxi/pinmux.c | 18 ++
arch/arm/include/asm/arch-sunxi/gpio.h | 4
2 files changed, 22 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c
index 89a4b71..8428439 100644
--- a/arch/arm/cpu/armv7/sunxi/pinmux.c
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -59,6 +59,24 @@ int sunxi_gpio_get_cfgpin(u32 pin)
return cfg & 0xf;
}
+int sunxi_gpio_set_drv(u32 pin, u32 val)
+{
+ u32 drv;
+ u32 bank = GPIO_BANK(pin);
+ u32 index = GPIO_DRV_INDEX(pin);
+ u32 offset = GPIO_DRV_OFFSET(pin);
+ struct sunxi_gpio *pio =
+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+
+ drv = readl(&pio->drv[0] + index);
+ drv &= ~(0xf << offset);
+ drv |= val << offset;
+
+ writel(drv, &pio->drv[0] + index);
+
+ return 0;
+}
+
int sunxi_gpio_set_pull(u32 pin, u32 val)
{
u32 pull;
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 4a44759..79b4f21 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -71,6 +71,9 @@ struct sunxi_gpio_reg {
#define GPIO_CFG_INDEX(pin)(((pin) & 0x1f) >> 3)
#define GPIO_CFG_OFFSET(pin) pin) & 0x1f) & 0x7) << 2)
+#define GPIO_DRV_INDEX(pin) (((pin) & 0x1f) >> 4)
+#define GPIO_DRV_OFFSET(pin) pin) & 0x1f) & 0xf) << 1)
+
#define GPIO_PULL_INDEX(pin) (((pin) & 0x1f) >> 4)
#define GPIO_PULL_OFFSET(pin) pin) & 0x1f) & 0xf) << 1)
@@ -168,6 +171,7 @@ enum sunxi_gpio_number {
int sunxi_gpio_set_cfgpin(u32 pin, u32 val);
int sunxi_gpio_get_cfgpin(u32 pin);
+int sunxi_gpio_set_drv(u32 pin, u32 val);
int sunxi_gpio_set_pull(u32 pin, u32 val);
int name_to_gpio(const char *name);
#define name_to_gpio name_to_gpio
--
1.8.5.1
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[linux-sunxi] [PATCH u-boot-sunxi 10/11] ARM: sunxi: Let cubieboard2 use the GMAC driver
Signed-off-by: Chen-Yu Tsai --- boards.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/boards.cfg b/boards.cfg index 044e5ca..4404ebc 100644 --- a/boards.cfg +++ b/boards.cfg @@ -362,8 +362,8 @@ Active arm armv7 sunxi - sunxi Active arm armv7 sunxi - sunxi Coby_MID8042 sun4i:COBY_MID8042,SPL - Active arm armv7 sunxi - sunxi Coby_MID9742 sun4i:COBY_MID9742,SPL - Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - -Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - -Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - +Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - +Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC,STATUSLED=244,STATUSLED1=245,FAST_MBUS - Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII,STATUSLED=245,STATUSLED1=244,STATUSLED2=235,STATUSLED3=231,FAST_MBUS - Active arm armv7 sunxi - sunxi Cubieboard_512 sun4i:CUBIEBOARD_512,SPL,SUNXI_EMAC,STATUSLED=244,STATUSLED1=245 - -- 1.8.5.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] U-boot for A20 chipset
Hi, we have A20 custom chipset. i want to boot it from sdcard. kindly tell me where i can get u-boot source code for suxi-spl.bin and u-boot.bin. kindly tell me git repositary and how can i compile. Regards pby -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
[linux-sunxi] U-boot source code for A20
Hi, we are using A20 custom board. i want to boot this from sd card. i booted from NAND . can you provide link for git repository for u-bot source code for sunxi-spl.bin and u-boot.bin. and kindly tell me how to compile it. Regards Pby -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
Re: [linux-sunxi] Fosdem sunxi developers dinner Saturday Feb 2nd, Brussels
On Wed, Dec 11, 2013 at 9:27 AM, Hans de Goede wrote: > Hi All, > > Together with Oliver and Tsvetan I'm organizing a Fosdem > dinner for sunxi developers on Saturday evening. in the subject s/2nd/1st/ :) -- Carlo Caione -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
