Re: [linux-sunxi] i2s audio codec support for sun7i

2014-02-19 Thread Code Kipper
Hi Puneet,
ignore what I said it was my spdif changes on my branch that broke the
build. I've now switched to the stage/sunxi branch, added this change
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index adafead..2334cab 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -60,7 +60,7 @@ source "sound/soc/sunxi/Kconfig"
 source "sound/soc/sunxi/hdmiaudio/Kconfig"
 source "sound/soc/sunxi/spdif/Kconfig"
 # i2s needs various adjustments for sun7i
-if ARCH_SUN4I || ARCH_SUN5I
+if ARCH_SUN4I || ARCH_SUN5I || ARCH_SUN7I
 source "sound/soc/sunxi/i2s/Kconfig"
 endif
 endif

and i2s now builds.
CK


On 20 February 2014 08:15, Code Kipper  wrote:

> Hi Puneet,
> I'm not sure if I2S is currently supported on the sun7i. Looking at
> sound/soc/Kconfig I see this:
> if SOUND_SUNXI
> source "sound/soc/sunxi/Kconfig"
> source "sound/soc/sunxi/hdmiaudio/Kconfig"
> source "sound/soc/sunxi/spdif/Kconfig"
> # i2s needs various adjustments for sun7i
> if ARCH_SUN4I || ARCH_SUN5I
> source "sound/soc/sunxi/i2s/Kconfig"
> endif
> endif
> which explains why it's not being built. If I enable it then there are
> compile errors as the dma that the current software uses isn't supported by
> sun7i build. I think you will need to look into this more. In sunxi-codec
> etc you can see that the dma routines are platform dependant. You will need
> to hack something similar into i2s.
> BR,
> CK
>
>
> On 20 February 2014 06:18, Puneet B  wrote:
>
>> Hi CodeKipper,
>>
>> ls  sound/soc/sunxi/i2s
>>
>> built-in.o  Makefile modules.order  sndi2s.h sunxi-i2sdma.c
>> sunxi-i2s.h sunxi-sndi2s.h
>> Kconfig modules.builtin  sndi2s.c   sunxi-i2s.c  sunxi-i2sdma.h
>> sunxi-sndi2s.c
>>
>> in menuconfig if i select ARCH_SUN7i then there is no option for i2s
>> support in sound card support for ALSA.
>>
>> but if i select ARCH_SUN4i or ARCH_SUN5i  then there is option for i2s
>> support in sound card support for ALSA.
>>
>>
>> in my actual project we are using TLV320AIC3100IRHBR chip set for i2s
>> support.
>>
>> Regards
>> Punith
>>
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>
>

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Re: [linux-sunxi] i2s audio codec support for sun7i

2014-02-19 Thread Code Kipper
Hi Puneet,
I'm not sure if I2S is currently supported on the sun7i. Looking at
sound/soc/Kconfig I see this:
if SOUND_SUNXI
source "sound/soc/sunxi/Kconfig"
source "sound/soc/sunxi/hdmiaudio/Kconfig"
source "sound/soc/sunxi/spdif/Kconfig"
# i2s needs various adjustments for sun7i
if ARCH_SUN4I || ARCH_SUN5I
source "sound/soc/sunxi/i2s/Kconfig"
endif
endif
which explains why it's not being built. If I enable it then there are
compile errors as the dma that the current software uses isn't supported by
sun7i build. I think you will need to look into this more. In sunxi-codec
etc you can see that the dma routines are platform dependant. You will need
to hack something similar into i2s.
BR,
CK


On 20 February 2014 06:18, Puneet B  wrote:

> Hi CodeKipper,
>
> ls  sound/soc/sunxi/i2s
>
> built-in.o  Makefile modules.order  sndi2s.h sunxi-i2sdma.c
> sunxi-i2s.h sunxi-sndi2s.h
> Kconfig modules.builtin  sndi2s.c   sunxi-i2s.c  sunxi-i2sdma.h
> sunxi-sndi2s.c
>
> in menuconfig if i select ARCH_SUN7i then there is no option for i2s
> support in sound card support for ALSA.
>
> but if i select ARCH_SUN4i or ARCH_SUN5i  then there is option for i2s
> support in sound card support for ALSA.
>
>
> in my actual project we are using TLV320AIC3100IRHBR chip set for i2s
> support.
>
> Regards
> Punith
>
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[linux-sunxi] how to flash android in NAND without phonixsuite ..

2014-02-19 Thread Puneet B
Hi all,

I am using A20 humming bird board.

i want to boot android from NAND.

i booted android from sd card successfully.

i want to know boot0 and boot1 , is it common for all A20 board.

and to which sector i need to flash this.

Regards
Punith

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Re: [linux-sunxi] i2s audio codec support for sun7i

2014-02-19 Thread Puneet B
Hi CodeKipper,

ls  sound/soc/sunxi/i2s

built-in.o  Makefile modules.order  sndi2s.h sunxi-i2sdma.c  
sunxi-i2s.h sunxi-sndi2s.h
Kconfig modules.builtin  sndi2s.c   sunxi-i2s.c  sunxi-i2sdma.h  
sunxi-sndi2s.c

in menuconfig if i select ARCH_SUN7i then there is no option for i2s 
support in sound card support for ALSA.

but if i select ARCH_SUN4i or ARCH_SUN5i  then there is option for i2s 
support in sound card support for ALSA.


in my actual project we are using TLV320AIC3100IRHBR chip set for i2s 
support.

Regards
Punith

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[linux-sunxi] [PATCH 3.4] sunxi: prevent mali drivers from building every time

2014-02-19 Thread Patrick Wood
This patch was suggested to prevent the mali drivers from rebuild
every time the modules are built.  It simply creates symlinks to
sources used by both ump.ko and mali.ko so that their objects are built
in separate directories; otherwise, there is a ping-pong effect between
the ump.ko objects and mali.ko objects overwriting each other.

Signed-off-by: Patrick Wood 
---
 drivers/gpu/mali/ump/Kbuild   |2 +-
 drivers/gpu/mali/ump/linux/mali_osk_atomics.c |1 +
 drivers/gpu/mali/ump/linux/mali_osk_locks.c   |1 +
 drivers/gpu/mali/ump/linux/mali_osk_math.c|1 +
 drivers/gpu/mali/ump/linux/mali_osk_memory.c  |1 +
 drivers/gpu/mali/ump/linux/mali_osk_misc.c|1 +
 6 files changed, 6 insertions(+), 1 deletion(-)
 create mode 12 drivers/gpu/mali/ump/linux/mali_osk_atomics.c
 create mode 12 drivers/gpu/mali/ump/linux/mali_osk_locks.c
 create mode 12 drivers/gpu/mali/ump/linux/mali_osk_math.c
 create mode 12 drivers/gpu/mali/ump/linux/mali_osk_memory.c
 create mode 12 drivers/gpu/mali/ump/linux/mali_osk_misc.c

diff --git a/drivers/gpu/mali/ump/Kbuild b/drivers/gpu/mali/ump/Kbuild
index 01355f5..62380fa 100644
--- a/drivers/gpu/mali/ump/Kbuild
+++ b/drivers/gpu/mali/ump/Kbuild
@@ -12,7 +12,7 @@
 # Change this to use a different config.h
 CONFIG ?= os_memory_64m
 
-UDD_FILE_PREFIX = ../mali/
+UDD_FILE_PREFIX = 
 
 # set the SVN_REV to ${MALI_RELEASE_NAME} due to ARM using subversion
 SVN_REV := $(MALI_RELEASE_NAME)
diff --git a/drivers/gpu/mali/ump/linux/mali_osk_atomics.c 
b/drivers/gpu/mali/ump/linux/mali_osk_atomics.c
new file mode 12
index 000..d37aa82
--- /dev/null
+++ b/drivers/gpu/mali/ump/linux/mali_osk_atomics.c
@@ -0,0 +1 @@
+../../mali/linux/mali_osk_atomics.c
\ No newline at end of file
diff --git a/drivers/gpu/mali/ump/linux/mali_osk_locks.c 
b/drivers/gpu/mali/ump/linux/mali_osk_locks.c
new file mode 12
index 000..f4c33be
--- /dev/null
+++ b/drivers/gpu/mali/ump/linux/mali_osk_locks.c
@@ -0,0 +1 @@
+../../mali/linux/mali_osk_locks.c
\ No newline at end of file
diff --git a/drivers/gpu/mali/ump/linux/mali_osk_math.c 
b/drivers/gpu/mali/ump/linux/mali_osk_math.c
new file mode 12
index 000..e8a59cd
--- /dev/null
+++ b/drivers/gpu/mali/ump/linux/mali_osk_math.c
@@ -0,0 +1 @@
+../../mali/linux/mali_osk_math.c
\ No newline at end of file
diff --git a/drivers/gpu/mali/ump/linux/mali_osk_memory.c 
b/drivers/gpu/mali/ump/linux/mali_osk_memory.c
new file mode 12
index 000..0e5e8c8
--- /dev/null
+++ b/drivers/gpu/mali/ump/linux/mali_osk_memory.c
@@ -0,0 +1 @@
+../../mali/linux/mali_osk_memory.c
\ No newline at end of file
diff --git a/drivers/gpu/mali/ump/linux/mali_osk_misc.c 
b/drivers/gpu/mali/ump/linux/mali_osk_misc.c
new file mode 12
index 000..750aa9d
--- /dev/null
+++ b/drivers/gpu/mali/ump/linux/mali_osk_misc.c
@@ -0,0 +1 @@
+../../mali/linux/mali_osk_misc.c
\ No newline at end of file
-- 
1.7.9.5

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[linux-sunxi] Re: [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Tejun Heo
On Wed, Feb 19, 2014 at 06:18:09PM +0100, Hans de Goede wrote:
> Most of the resources are already devres managed (I use devm functions
> to get them), the problem is not in freeing our reference to the resources,
> the problem is that we've sequences like this:
> 
> devm_get_foo
> enable_foo
> disable_foo
> (automatic release foo)
> 
> Where enable / disable can be done repeatedly (ie each suspend / resume).
> 
> From your review comments, I take it that you want the final disable_foo
> on driver release to happen automatically.
> 
> My preference for this would be to extend the devres tracking already present
> in the relevant subsystems to keep track of the enable count done through a
> specific reference, to allow automatic disable (if needed) on release.
> 
> But thinking more about this, I think that doing this automatically is a bad
> idea, because then we fixate the shutdown sequence to a certain order (the
> order in which we did the _get_foo for the resources) and the correct order 
> may
> be device specific.
> 
> So TL;DR: Yes to making things so that ahci_platform_put_resources gets done
> automatically, no to automating the disable calls.
> 
> If I don't hear back from you, then I'll respin the patch-set assuming that
> you agree to the above.

Yeah, sounds good enough to me.

Thanks.

-- 
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[linux-sunxi] Re: [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Robert Nelson
On Wed, Feb 19, 2014 at 6:01 AM, Hans de Goede  wrote:

> Hi all,
>
> Here is v6 of my patchset for adding ahci-sunxi support. This has been
> tested with Allwinner A10, Allwinner A20 and Freeware imx6x SoCs, including
> suspend / resume. Note that since my last revision the ahci_imx driver has
> also grown imx53 sata support, it would be good if some-one could test that
> with this series.
>

basic file system tests on an imx53-qsb look fine with sata changes..

Using v3.14-rc3 + 20140219 (next) + shawn.guo's imx for-next branch which
wasn't in today next tree..

debian@arm:~$ dmesg | grep ata
[0.00] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing
instruction cache
[0.00] Memory policy: Data cache writeback
[0.00] Memory: 1010076K/1048576K available (7008K kernel code, 527K
rwdata, 2280K rodata, 416K init, 373K bss, 38500K reserved, 524288K highmem)
[0.00]   .data : 0xc0984000 - 0xc0a07d60   ( 528 kB)
[1.796587] libata version 3.00 loaded.
[2.777037] ahci-imx 1000.sata: unable to find phy
[2.784385] ahci-imx 1000.sata: SSS flag set, parallel bus scan
disabled
[2.791495] ahci-imx 1000.sata: AHCI 0001.0100 32 slots 1 ports 3
Gbps 0x1 impl platform mode
[2.800394] ahci-imx 1000.sata: flags: ncq sntf stag pm led clo only
pmp pio slum part ccc
[2.814178] ata1: SATA max UDMA/133 mmio [mem 0x1000-0x1fff]
port 0x100 irq 44
[3.400107] ata1: softreset failed (device not ready)
[3.405174] ata1: applying PMP SRST workaround and retrying
[3.610105] ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
[3.663654] ata1.00: ATA-8: ST9120315AS, 0001SDM1, max UDMA/133
[3.669583] ata1.00: 234441648 sectors, multi 16: LBA48 NCQ (depth 31/32)
[3.678553] ata1.00: configured for UDMA/133
[5.680633] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data
mode. Opts: (null)

Regards,

-- 
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http://www.rcn-ee.com/

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[linux-sunxi] Re: [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Hans de Goede
Hi,

On 02/19/2014 05:25 PM, Tejun Heo wrote:
> Hello, Hans.
> 
> On Wed, Feb 19, 2014 at 04:26:43PM +0100, Hans de Goede wrote:
>> The devres usage are really 2 different issues:
>>
>> 1) There is the issue that we're getting clocks by index (this is by design 
>> as
>> clk-names are not generic), but there is no devm_get_clk_by_index (or some
>> such), this is a shortcoming of the clk-core, which needs a separate patch
>> to fix. I would rather not delay this patch-set based on getting a patch
>> into another subsys.
> 
> Yes, that'd be my usual preference too.  The only reason I'm hesitant
> is because nobody seems to be too interested in long term aspect of
> the code base and the only leverage I have seems to be rejecting
> drivers until things become right.
> 
>> Note that even with devm_get_clk_by_index we can unfortunately not get rid of
>> ahci_platform_put_resources() as in Roger's follow-up patches it gets used 
>> for
>> putting some runtime pm related resources too.
>>
>> I guess this argues for simply turning ahci_platform_get_resources into a
>> devm_ahci_platform_get_resources doing its own devm handling, and then
>> making ahci_platform_put_resources a private function called by the devm
>> framework. If you agree I can do that for the next patch-set.
> 
> Note that libata core already does something similar.  Please take a
> look at ata_host_alloc() for details.  You don't really need to create
> a separate devm_ prefixed variant.  Just making the function register
> devres automatically should be enough.  If this is too much work, I'm
> okay with deferring it until later if you promise to do it soonish.
> 

Ok, I'll try to do this for the next revision.

>> 2) In some comments you also seem to want devm variants of enable / disable
>> resources, or at least have ahci_platform_put_resources do the disable
>> automatically. The problem is that most of the functions called here need to
>> be balanced, they increment / decrement usage counters in the clk / regulator
>> subsystems, so we cannot simply unconditional do an 
>> ahci_platform_disable_resources
>> in ahci_platform_put_resources
>>
>> Doing the disable automatically requires tracking the enable state, and 
>> doing this
>> per resource, since the whole idea of having a separate 
>> ahci_platform_enable_resources
>> is that some drivers may want to override its behavior doing things in a 
>> different
>> order.
>>
>> To ensure proper tracking we would then need to offer 
>> ahci_platform_enable_regulator,
>> etc. functions, and ensure that all drivers using the ahci_platform framework
>> always go through these, rather then calling directly into the relevant 
>> framework.
>>
>> This is all doable, and I'm not against doing this but before spending a 
>> couple of
>> hours coding this all up, I would like to hear back from you whether you 
>> would like
>> to see this, or would rather keep things as is.
> 
> Yes, in principle, I want every resource used by ahci_platform to be
> devres managed.  I *think* devres should be flexible enough to handle
> what you're describing (each devres resource can have data for state
> tracking and devres resources can be looked up and modified, so the
> different orders should be okay) but if not I'd be happy to help
> extend it so that it can.

Most of the resources are already devres managed (I use devm functions
to get them), the problem is not in freeing our reference to the resources,
the problem is that we've sequences like this:

devm_get_foo
enable_foo
disable_foo
(automatic release foo)

Where enable / disable can be done repeatedly (ie each suspend / resume).

>From your review comments, I take it that you want the final disable_foo
on driver release to happen automatically.

My preference for this would be to extend the devres tracking already present
in the relevant subsystems to keep track of the enable count done through a
specific reference, to allow automatic disable (if needed) on release.

But thinking more about this, I think that doing this automatically is a bad
idea, because then we fixate the shutdown sequence to a certain order (the
order in which we did the _get_foo for the resources) and the correct order may
be device specific.

So TL;DR: Yes to making things so that ahci_platform_put_resources gets done
automatically, no to automating the disable calls.

If I don't hear back from you, then I'll respin the patch-set assuming that
you agree to the above.

Regards,

Hans

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[linux-sunxi] Re: [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Tejun Heo
Hello, Hans.

On Wed, Feb 19, 2014 at 04:26:43PM +0100, Hans de Goede wrote:
> The devres usage are really 2 different issues:
> 
> 1) There is the issue that we're getting clocks by index (this is by design as
> clk-names are not generic), but there is no devm_get_clk_by_index (or some
> such), this is a shortcoming of the clk-core, which needs a separate patch
> to fix. I would rather not delay this patch-set based on getting a patch
> into another subsys.

Yes, that'd be my usual preference too.  The only reason I'm hesitant
is because nobody seems to be too interested in long term aspect of
the code base and the only leverage I have seems to be rejecting
drivers until things become right.

> Note that even with devm_get_clk_by_index we can unfortunately not get rid of
> ahci_platform_put_resources() as in Roger's follow-up patches it gets used for
> putting some runtime pm related resources too.
> 
> I guess this argues for simply turning ahci_platform_get_resources into a
> devm_ahci_platform_get_resources doing its own devm handling, and then
> making ahci_platform_put_resources a private function called by the devm
> framework. If you agree I can do that for the next patch-set.

Note that libata core already does something similar.  Please take a
look at ata_host_alloc() for details.  You don't really need to create
a separate devm_ prefixed variant.  Just making the function register
devres automatically should be enough.  If this is too much work, I'm
okay with deferring it until later if you promise to do it soonish.

> 2) In some comments you also seem to want devm variants of enable / disable
> resources, or at least have ahci_platform_put_resources do the disable
> automatically. The problem is that most of the functions called here need to
> be balanced, they increment / decrement usage counters in the clk / regulator
> subsystems, so we cannot simply unconditional do an 
> ahci_platform_disable_resources
> in ahci_platform_put_resources
> 
> Doing the disable automatically requires tracking the enable state, and doing 
> this
> per resource, since the whole idea of having a separate 
> ahci_platform_enable_resources
> is that some drivers may want to override its behavior doing things in a 
> different
> order.
> 
> To ensure proper tracking we would then need to offer 
> ahci_platform_enable_regulator,
> etc. functions, and ensure that all drivers using the ahci_platform framework
> always go through these, rather then calling directly into the relevant 
> framework.
> 
> This is all doable, and I'm not against doing this but before spending a 
> couple of
> hours coding this all up, I would like to hear back from you whether you 
> would like
> to see this, or would rather keep things as is.

Yes, in principle, I want every resource used by ahci_platform to be
devres managed.  I *think* devres should be flexible enough to handle
what you're describing (each devres resource can have data for state
tracking and devres resources can be looked up and modified, so the
different orders should be okay) but if not I'd be happy to help
extend it so that it can.

I'm not sure how many more ahci_platform drivers we'll get but the
rate seems pretty high in recent months, so I think it's worthwhile to
provide full devres coverage even if that complicates ahci_platform a
bit if it can simplify leaf drivers.  Again, if you commit to doing it
in the foreseeable future, I'm okay with proceeding as-is, but it
needs to happen one way or another.

Thanks.

-- 
tejun

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[linux-sunxi] Re: [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Hans de Goede
Hi,

On 02/19/2014 04:02 PM, Tejun Heo wrote:
> Hello,
> 
> On Wed, Feb 19, 2014 at 01:01:42PM +0100, Hans de Goede wrote:
>> Here is v6 of my patchset for adding ahci-sunxi support. This has been
>> tested with Allwinner A10, Allwinner A20 and Freeware imx6x SoCs, including
>> suspend / resume. Note that since my last revision the ahci_imx driver has
>> also grown imx53 sata support, it would be good if some-one could test that
>> with this series.
> 
> Stopping review here.  I really like where it's headed in general and
> most review points,

Thanks for the review. I'll respin the patchset taking the various remarks into
account. I hope to have a new version ready at the end of the coming weekend
at the latest.

> except for lack of devres usage, are rather
> cosmetic.  I'm not completely decided yet whether we can defer devres
> until later or should go for it in the first round.

The devres usage are really 2 different issues:

1) There is the issue that we're getting clocks by index (this is by design as
clk-names are not generic), but there is no devm_get_clk_by_index (or some
such), this is a shortcoming of the clk-core, which needs a separate patch
to fix. I would rather not delay this patch-set based on getting a patch
into another subsys.

Note that even with devm_get_clk_by_index we can unfortunately not get rid of
ahci_platform_put_resources() as in Roger's follow-up patches it gets used for
putting some runtime pm related resources too.

I guess this argues for simply turning ahci_platform_get_resources into a
devm_ahci_platform_get_resources doing its own devm handling, and then
making ahci_platform_put_resources a private function called by the devm
framework. If you agree I can do that for the next patch-set.

2) In some comments you also seem to want devm variants of enable / disable
resources, or at least have ahci_platform_put_resources do the disable
automatically. The problem is that most of the functions called here need to
be balanced, they increment / decrement usage counters in the clk / regulator
subsystems, so we cannot simply unconditional do an 
ahci_platform_disable_resources
in ahci_platform_put_resources

Doing the disable automatically requires tracking the enable state, and doing 
this
per resource, since the whole idea of having a separate 
ahci_platform_enable_resources
is that some drivers may want to override its behavior doing things in a 
different
order.

To ensure proper tracking we would then need to offer 
ahci_platform_enable_regulator,
etc. functions, and ensure that all drivers using the ahci_platform framework
always go through these, rather then calling directly into the relevant 
framework.

This is all doable, and I'm not against doing this but before spending a couple 
of
hours coding this all up, I would like to hear back from you whether you would 
like
to see this, or would rather keep things as is.

Regards,

Hans

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Re: [linux-sunxi] Purchasing AllWinner chips

2014-02-19 Thread jonsm...@gmail.com
On Wed, Feb 19, 2014 at 10:10 AM, Luc Verhaegen  wrote:
> On Wed, Feb 19, 2014 at 09:11:52AM -0500, jonsm...@gmail.com wrote:
>> On Wed, Feb 19, 2014 at 7:13 AM, Luc Verhaegen  wrote:
>> > On Tue, Feb 18, 2014 at 03:35:13PM -0500, jonsm...@gmail.com wrote:
>> >> On Tue, Feb 18, 2014 at 3:09 PM, Andre Renaud  
>> >> wrote:
>> >> > Hi,
>> >> > Does anyone know of a reliable supplier who sells the AllWinner A20
>> >> > chips? I was hoping to find them on digikey, mouser or avnet, but it
>> >> > appears that they're a little bit hard to find. I see that Olimex will
>> >> > sell them in low volumes, but I was hoping for a better known supplier
>> >> > (and higher quantities).
>> >>
>> >> Allwinner is talking with the big distributors currently but AFAIK no
>> >> deal has been reached yet.
>> >>
>> >> Many people have designed their own board locally using a few chips
>> >> from Olimex. Then when you want to make a larger quantity have them
>> >> assembled in Shenzhen. The Allwinner chips are plentiful in Shenzhen.
>> >>
>> >> Instead of buying chips you might want to consider standard Q88 tablet
>> >> PCBAs. A20 tablet PCBAs can be bought in the $20-30 range in Shenzhen.
>> >> An easy way to get a hold of them is to buy Q88 tablets and
>> >> disassemble them. These PCBA are made by many companies and the price
>> >> is highly competitive. It is also possible to buy STB PCBAs.
>> >>
>> >> Another option is to have a Chinese design house make one for you. For
>> >> about $5000 they will design whatever you want and provide about ten
>> >> prototype boards. These designs are easy to put into production since
>> >> they will use local components. Around $40/board for medium volume but
>> >> this depends on what you put on the board.
>> >>
>> >> Reusing Q88 PCBAs is by far the easiest solution. You can mount one in
>> >> a case and then use an internal USB cable to talk to your specialized
>> >> hardware if needed.
>> >
>> > Isn't Q88 an A13 based board?
>>
>> Q88 is just the design dimensions. Most Q88 format boards are A13 but
>> some are A10, A20 and A23.
>
> Oh, i see, this is new info to me.

There are some other standard formats. One is a thick L shaped, and
other is L-shaped with a thin neck. They have Qxx names too but I
don't know what they are.

There is one group of companies making PCBAs in these standard
formats. The location of the LCD/CSI/etc connectors are also
standardized. Another group assembles tablets designed around these
standard PBCAs. This model lets the PBCA vendors sell to multiple
customers and the assembler to have multiple suppliers. I don't think
there are any written specs for this, it just seems to have evolved
that way.

Of course nothing stops you from doing complete custom either.

>
> Maybe this should be documented on our wiki, as we have plenty of Q88
> lookalike devices in at least our A13 tablets.
>
> Luc Verhaegen.
>
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Re: [linux-sunxi] Purchasing AllWinner chips

2014-02-19 Thread Luc Verhaegen
On Wed, Feb 19, 2014 at 09:11:52AM -0500, jonsm...@gmail.com wrote:
> On Wed, Feb 19, 2014 at 7:13 AM, Luc Verhaegen  wrote:
> > On Tue, Feb 18, 2014 at 03:35:13PM -0500, jonsm...@gmail.com wrote:
> >> On Tue, Feb 18, 2014 at 3:09 PM, Andre Renaud  
> >> wrote:
> >> > Hi,
> >> > Does anyone know of a reliable supplier who sells the AllWinner A20
> >> > chips? I was hoping to find them on digikey, mouser or avnet, but it
> >> > appears that they're a little bit hard to find. I see that Olimex will
> >> > sell them in low volumes, but I was hoping for a better known supplier
> >> > (and higher quantities).
> >>
> >> Allwinner is talking with the big distributors currently but AFAIK no
> >> deal has been reached yet.
> >>
> >> Many people have designed their own board locally using a few chips
> >> from Olimex. Then when you want to make a larger quantity have them
> >> assembled in Shenzhen. The Allwinner chips are plentiful in Shenzhen.
> >>
> >> Instead of buying chips you might want to consider standard Q88 tablet
> >> PCBAs. A20 tablet PCBAs can be bought in the $20-30 range in Shenzhen.
> >> An easy way to get a hold of them is to buy Q88 tablets and
> >> disassemble them. These PCBA are made by many companies and the price
> >> is highly competitive. It is also possible to buy STB PCBAs.
> >>
> >> Another option is to have a Chinese design house make one for you. For
> >> about $5000 they will design whatever you want and provide about ten
> >> prototype boards. These designs are easy to put into production since
> >> they will use local components. Around $40/board for medium volume but
> >> this depends on what you put on the board.
> >>
> >> Reusing Q88 PCBAs is by far the easiest solution. You can mount one in
> >> a case and then use an internal USB cable to talk to your specialized
> >> hardware if needed.
> >
> > Isn't Q88 an A13 based board?
> 
> Q88 is just the design dimensions. Most Q88 format boards are A13 but
> some are A10, A20 and A23.

Oh, i see, this is new info to me.

Maybe this should be documented on our wiki, as we have plenty of Q88 
lookalike devices in at least our A13 tablets.

Luc Verhaegen.

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[linux-sunxi] Re: [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Tejun Heo
Hello,

On Wed, Feb 19, 2014 at 01:01:42PM +0100, Hans de Goede wrote:
> Here is v6 of my patchset for adding ahci-sunxi support. This has been
> tested with Allwinner A10, Allwinner A20 and Freeware imx6x SoCs, including
> suspend / resume. Note that since my last revision the ahci_imx driver has
> also grown imx53 sata support, it would be good if some-one could test that
> with this series.

Stopping review here.  I really like where it's headed in general and
most review points, except for lack of devres usage, are rather
cosmetic.  I'm not completely decided yet whether we can defer devres
until later or should go for it in the first round.

Thanks.

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[linux-sunxi] Re: [PATCH v6 07/18] ahci-platform: "Library-ise" ahci_probe functionality

2014-02-19 Thread Tejun Heo
On Wed, Feb 19, 2014 at 01:01:49PM +0100, Hans de Goede wrote:
> ahci_probe consists of 3 steps:
> 1) Get resources (get mmio, clks, regulator)
> 2) Enable resources, handled by ahci_platform_enable_resouces
> 3) The more or less standard ahci-host controller init sequence
> 
> This commit refactors step 1 and 3 into separate functions, so the platform
> drivers for AHCI implementations which need a specific order in step 2,
> and / or need to do some custom register poking at some time, can re-use
> ahci-platform.c code without needing to copy and paste it.
> 
> Note that ahci_platform_init_host's prototype takes the 3 non function
> members of ahci_platform_data as arguments, the idea is that drivers using
> the new exported utility functions will not use ahci_platform_data at all,
> and hopefully in the future ahci_platform_data can go away entirely.
> 
> Signed-off-by: Hans de Goede 

Heh, the lack of comments is getting kinda impressive. :)

Thanks.

-- 
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[linux-sunxi] Re: [PATCH v6 06/18] ahci-platform: Add enable_ / disable_resources helper functions

2014-02-19 Thread Tejun Heo
On Wed, Feb 19, 2014 at 01:01:48PM +0100, Hans de Goede wrote:
> Signed-off-by: Hans de Goede 
> ---
>  drivers/ata/ahci_platform.c   | 83 
> ---
>  include/linux/ahci_platform.h |  2 ++
>  2 files changed, 48 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
> index 2f319e9..1cce7a2 100644
> --- a/drivers/ata/ahci_platform.c
> +++ b/drivers/ata/ahci_platform.c
> @@ -117,6 +117,39 @@ void ahci_platform_disable_clks(struct ahci_host_priv 
> *hpriv)
>  EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
>  
>  
> +int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
> +{
> + int rc;
> +
> + if (hpriv->target_pwr) {
> + rc = regulator_enable(hpriv->target_pwr);
> + if (rc)
> + return rc;
> + }
> +
> + rc = ahci_platform_enable_clks(hpriv);
> + if (rc)
> + goto disable_regulator;
> +
> + return 0;
> +
> +disable_regulator:
> + if (hpriv->target_pwr)
> + regulator_disable(hpriv->target_pwr);
> + return rc;
> +}
> +EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
> +
> +void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
> +{
> + ahci_platform_disable_clks(hpriv);
> +
> + if (hpriv->target_pwr)
> + regulator_disable(hpriv->target_pwr);
> +}
> +EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
> +
> +

Ditto with comments, double blank lines and devres wrapping.

Thanks.

-- 
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[linux-sunxi] Re: [PATCH v6 05/18] ahci-platform: Add support for an optional regulator for sata-target power

2014-02-19 Thread Tejun Heo
On Wed, Feb 19, 2014 at 01:01:47PM +0100, Hans de Goede wrote:
> @@ -268,6 +281,9 @@ pdata_exit:
>   pdata->exit(dev);
>  disable_unprepare_clk:
>   ahci_disable_clks(hpriv);
> +disable_regulator:
> + if (hpriv->target_pwr)
> + regulator_disable(hpriv->target_pwr);

The same thing with clks, I'd much prefer to see ahci_platform doing
devres wrapping so that its consumers wouldn't have to worry about
tearing stuff down.

Thanks.

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[linux-sunxi] Re: [PATCH v6 04/18] ahci-platform: Add support for devices with more then 1 clock

2014-02-19 Thread Tejun Heo
On Wed, Feb 19, 2014 at 01:01:46PM +0100, Hans de Goede wrote:
> diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
> index 434ab89..aaa0c08 100644
> --- a/drivers/ata/ahci_platform.c
> +++ b/drivers/ata/ahci_platform.c
> @@ -87,6 +87,44 @@ static struct scsi_host_template ahci_platform_sht = {
>   AHCI_SHT("ahci_platform"),
>  };
>  
> +
> +int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)

Throughout the series, there are mixtures of one and two blank lines
in front of functions, let's just do one consistently.  Also, can you
please add proper function comments on top of the exported functions?

> +{
> + int c, rc;
> +
> + for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
> + rc = clk_prepare_enable(hpriv->clks[c]);
> + if (rc)
> + goto disable_unprepare_clk;
> + }
> + return 0;
> +
> +disable_unprepare_clk:
> + while (--c >= 0)
> + clk_disable_unprepare(hpriv->clks[c]);
> + return rc;
> +}
> +EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
> +
> +void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
> +{
> + int c;
> +
> + for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
> + if (hpriv->clks[c])
> + clk_disable_unprepare(hpriv->clks[c]);
> +}
> +EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
> +
> +
> +static void ahci_put_clks(struct ahci_host_priv *hpriv)
> +{
> + int c;
> +
> + for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
> + clk_put(hpriv->clks[c]);
> +}

Urgh, clk can't do devm?  ahci_platform itself should be able to build
devmized interface using devres_alloc() or devm_add_action().
Eh maybe later.

> @@ -131,17 +167,26 @@ static int ahci_probe(struct platform_device *pdev)
>   return -ENOMEM;
>   }
>  
> - hpriv->clk = clk_get(dev, NULL);
> - if (IS_ERR(hpriv->clk)) {
> - dev_err(dev, "can't get clock\n");
> - } else {
> - rc = clk_prepare_enable(hpriv->clk);
> - if (rc) {
> - dev_err(dev, "clock prepare enable failed");
> - goto free_clk;
> + max_clk = dev->of_node ? AHCI_MAX_CLKS : 1;
> + for (i = 0; i < max_clk; i++) {
> + if (i == 0)
> + clk = clk_get(dev, NULL); /* For old platform init */
> + else
> + clk = of_clk_get(dev->of_node, i);
> +
> + if (IS_ERR(clk)) {
> + rc = PTR_ERR(clk);
> + if (rc == -EPROBE_DEFER)
> + goto free_clk;
> + break;
>   }
> + hpriv->clks[i] = clk;
>   }

Wouldn't it be nice to have some eplanation on why clk init path
diverges depending on whether dev->of_node is NULL or not?  In
general, the patchset seems dearth on comment side.

Thanks.

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[linux-sunxi] Re: [PATCH v6 01/18] libahci: Allow drivers to override start_engine

2014-02-19 Thread Tejun Heo
Hello,

On Wed, Feb 19, 2014 at 01:01:43PM +0100, Hans de Goede wrote:
> diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
> index 2289efd..2c04211 100644
> --- a/drivers/ata/ahci.h
> +++ b/drivers/ata/ahci.h
> @@ -323,6 +323,8 @@ struct ahci_host_priv {
>   u32 em_msg_type;/* EM message type */
>   struct clk  *clk;   /* Only for platforms 
> supporting clk */
>   void*plat_data; /* Other platform data */
> + /* Optional ahci_start_engine override */
> + void(*start_engine)(struct ata_port *ap);

Can you please add that this gets initialized to the default during
save_initial_config and can be overridden anytime before the host is
activated?

> @@ -500,6 +501,9 @@ void ahci_save_initial_config(struct device *dev,
>   hpriv->cap = cap;
>   hpriv->cap2 = cap2;
>   hpriv->port_map = port_map;
> +
> + if (!hpriv->start_engine)
> + hpriv->start_engine = ahci_start_engine;

Please update the function comment accordingly.

> -void ahci_start_engine(struct ata_port *ap)
> +static void ahci_start_engine(struct ata_port *ap)
>  {
>   void __iomem *port_mmio = ahci_port_base(ap);
>   u32 tmp;
> @@ -576,7 +580,6 @@ void ahci_start_engine(struct ata_port *ap)
>   writel(tmp, port_mmio + PORT_CMD);
>   readl(port_mmio + PORT_CMD); /* flush */
>  }
> -EXPORT_SYMBOL_GPL(ahci_start_engine);

Why are we making ahci_start_engine() static?  Wouldn't there likely
be users who would do more things before or after ahci_start_engine()?
Also, why is there no explanation of this change in the patch
description?

Thanks.

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[linux-sunxi] [A20-Cubietruck] Arm Security extensions

2014-02-19 Thread Aaditya
Hello All,

Does any anybody know whether A20 chip on Cubietruck board implements
ARM security extensions. 
The A20 Manual does not mention any thing about ARM security extensions.

Thanks,
Aaditya.

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Re: [linux-sunxi] Purchasing AllWinner chips

2014-02-19 Thread jonsm...@gmail.com
On Wed, Feb 19, 2014 at 7:13 AM, Luc Verhaegen  wrote:
> On Tue, Feb 18, 2014 at 03:35:13PM -0500, jonsm...@gmail.com wrote:
>> On Tue, Feb 18, 2014 at 3:09 PM, Andre Renaud  wrote:
>> > Hi,
>> > Does anyone know of a reliable supplier who sells the AllWinner A20
>> > chips? I was hoping to find them on digikey, mouser or avnet, but it
>> > appears that they're a little bit hard to find. I see that Olimex will
>> > sell them in low volumes, but I was hoping for a better known supplier
>> > (and higher quantities).
>>
>> Allwinner is talking with the big distributors currently but AFAIK no
>> deal has been reached yet.
>>
>> Many people have designed their own board locally using a few chips
>> from Olimex. Then when you want to make a larger quantity have them
>> assembled in Shenzhen. The Allwinner chips are plentiful in Shenzhen.
>>
>> Instead of buying chips you might want to consider standard Q88 tablet
>> PCBAs. A20 tablet PCBAs can be bought in the $20-30 range in Shenzhen.
>> An easy way to get a hold of them is to buy Q88 tablets and
>> disassemble them. These PCBA are made by many companies and the price
>> is highly competitive. It is also possible to buy STB PCBAs.
>>
>> Another option is to have a Chinese design house make one for you. For
>> about $5000 they will design whatever you want and provide about ten
>> prototype boards. These designs are easy to put into production since
>> they will use local components. Around $40/board for medium volume but
>> this depends on what you put on the board.
>>
>> Reusing Q88 PCBAs is by far the easiest solution. You can mount one in
>> a case and then use an internal USB cable to talk to your specialized
>> hardware if needed.
>
> Isn't Q88 an A13 based board?

Q88 is just the design dimensions. Most Q88 format boards are A13 but
some are A10, A20 and A23.


>
> Luc Verhaegen.
>
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Re: [linux-sunxi] i2s audio codec support for sun7i

2014-02-19 Thread Code Kipper
Hi Puneet,
Can you see if there are any objects/kernel modules in your
sound/soc/sunxi/i2s directory?, it looks like that is a description that
needs updating as there doesn't seem to be any platform checks in the
KConfig. There is also no mention of i2s any of the sunxi def configs. So
if you've built the code then it's just a case of insmod-ing the kernel
module. I've checked the cubie gits and they look very similar so you
should be good to go.
BTW what i2s device are you looking to connect to your board?
BR,CK


On 19 February 2014 13:05, Puneet B  wrote:

> Hi i downloaded sunxi kernel 3.4 from below link.
>
> http://docs.cubieboard.org/tutorials/ct1/development/
> compiling_latest_kernel_for_cubietruck_cubieboard3.
>
> i changed default configuration to sun7i_defconfig.
>
> but for sun7i there is no i2s codec support, it is for only sun4i and
> sun5i( i saw from menuconfig ).
>
> How to get i2s codec support in my A20 board.
>
> Regards
> Punith
>
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Re: [linux-sunxi] [PATCH v6 09/18] ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform

2014-02-19 Thread Priit Laes
Ühel kenal päeval, K, 19.02.2014 kell 13:01, kirjutas Hans de Goede:
> From: Olliver Schinagl 
> 
> This patch adds support for the ahci sata controler found on Allwinner A10
> and A20 SoCs to the ahci_platform driver.
> 
> Orignally written by Olliver Schinagl using the approach of having a platform
> device which probe method creates a new child platform device which gets
> driven by ahci_platform.c, as done by ahci_imx.c .
> 
> Refactored by Hans de Goede to add most of the non sunxi specific 
> functionality
> to ahci_platform.c and use a platform_data pointer from of_device_id for the
> sunxi specific bits.
> 
> Signed-off-by: Olliver Schinagl 
> Signed-off-by: Hans de Goede 
> ---
>  .../devicetree/bindings/ata/ahci-platform.txt  |  15 +-
>  drivers/ata/Kconfig|   9 +
>  drivers/ata/Makefile   |   1 +
>  drivers/ata/ahci_sunxi.c   | 251 
> +
>  4 files changed, 273 insertions(+), 3 deletions(-)
>  create mode 100644 drivers/ata/ahci_sunxi.c
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
> b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> index 1ac807f..499bfed 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
> @@ -4,7 +4,9 @@ SATA nodes are defined to describe on-chip Serial ATA 
> controllers.
>  Each SATA controller should have its own node.
>  
>  Required properties:
> -- compatible: compatible list, contains "snps,spear-ahci"
> +- compatible: compatible list, one of "snps,spear-ahci",
> +  "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
> +  "allwinner,sun4i-a10-ahci"
>  - interrupts: 
>  - reg   : 
>  
> @@ -13,10 +15,17 @@ Optional properties:
>  - clocks: a list of phandle + clock specifier pairs
>  - target-supply : regulator for SATA target power
>  
> -Example:
> +Examples:
>  sata@ffe08000 {
>   compatible = "snps,spear-ahci";
>   reg = <0xffe08000 0x1000>;
>   interrupts = <115>;
> -
>  };
> +
> + ahci: sata@01c18000 {
> + compatible = "allwinner,sun4i-a10-ahci";
> + reg = <0x01c18000 0x1000>;
> + interrupts = <56>;
> + clocks = <&pll6 0>, <&ahb_gates 25>;
> + target-supply = <®_ahci_5v>;
> + };
> diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
> index 4e73772..cc67cc0 100644
> --- a/drivers/ata/Kconfig
> +++ b/drivers/ata/Kconfig
> @@ -106,6 +106,15 @@ config AHCI_IMX
>  
> If unsure, say N.
>  
> +config AHCI_SUNXI
> + tristate "Allwinner sunxi AHCI SATA support"
> + depends on ARCH_SUNXI && SATA_AHCI_PLATFORM
> + help
> +   This option enables support for the Allwinner sunxi SoC's
> +   onboard AHCI SATA.
> +
> +   If unsure, say N.
> +
>  config SATA_FSL
>   tristate "Freescale 3.0Gbps SATA support"
>   depends on FSL_SOC
> diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
> index 46518c6..246050b 100644
> --- a/drivers/ata/Makefile
> +++ b/drivers/ata/Makefile
> @@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24)+= sata_sil24.o
>  obj-$(CONFIG_SATA_DWC)   += sata_dwc_460ex.o
>  obj-$(CONFIG_SATA_HIGHBANK)  += sata_highbank.o libahci.o
>  obj-$(CONFIG_AHCI_IMX)   += ahci_imx.o
> +obj-$(CONFIG_AHCI_SUNXI) += ahci_sunxi.o
>  
>  # SFF w/ custom DMA
>  obj-$(CONFIG_PDC_ADMA)   += pdc_adma.o
> diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
> new file mode 100644
> index 000..568a211
> --- /dev/null
> +++ b/drivers/ata/ahci_sunxi.c
> @@ -0,0 +1,251 @@
> +/*
> + * Allwinner sunxi AHCI SATA platform driver
> + * Copyright 2013 Olliver Schinagl 
> + * Copyright 2014 Hans de Goede 
> + *
> + * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
> + * Based on code from Allwinner Technology Co., Ltd. ,
> + * Daniel Wang 
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms and conditions of the GNU General Public License,
> + * version 2, as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope it will be useful, but WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
> + * more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "ahci.h"
> +
> +#define AHCI_BISTAFR 0x00a0
> +#define AHCI_BISTCR 0x00a4
> +#define AHCI_BISTFCTR 0x00a8
> +#define AHCI_BISTSR 0x00ac
> +#define AHCI_BISTDECR 0x00b0
> +#define AHCI_DIAGNR0 0x00b4
> +#define AHCI_DIAGNR1 0x00b8
> +#define AHCI_OOBR 0x00bc
> +#define AHCI_PHYCS0R 0x00c0
> +#define AHCI_PHYCS1R 0x00c4
> 

Re: [linux-sunxi] [PATCH v6 07/18] ahci-platform: "Library-ise" ahci_probe functionality

2014-02-19 Thread Priit Laes
Ühel kenal päeval, K, 19.02.2014 kell 13:01, kirjutas Hans de Goede:
> ahci_probe consists of 3 steps:
> 1) Get resources (get mmio, clks, regulator)
> 2) Enable resources, handled by ahci_platform_enable_resouces
> 3) The more or less standard ahci-host controller init sequence

...

> diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
> index 5e5f85e..1dc7602 100644
> --- a/include/linux/ahci_platform.h
> +++ b/include/linux/ahci_platform.h
> @@ -20,7 +20,13 @@
>  struct device;
>  struct ata_port_info;
>  struct ahci_host_priv;
> +struct platform_device;
>  
> +/*
> + * Note ahci_platform_data is deprecated. New drivers which need to override
> + * any of these, should instead declare there own platform_driver struct, and
> + * use ahci_platform* functions in their own probe, suspend and resume 
> methods.
> + */

s/there/its

Also, bit fat WARNING would be a lot cooler.

>  struct ahci_platform_data {
>   int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
>   void (*exit)(struct device *dev);
> @@ -35,5 +41,13 @@ int ahci_platform_enable_clks(struct ahci_host_priv 
> *hpriv);
>  void ahci_platform_disable_clks(struct ahci_host_priv *hpriv);
>  int ahci_platform_enable_resources(struct ahci_host_priv *hpriv);
>  void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
> +struct ahci_host_priv *ahci_platform_get_resources(
> + struct platform_device *pdev);
> +void ahci_platform_put_resources(struct ahci_host_priv *hpriv);
> +int ahci_platform_init_host(struct platform_device *pdev,
> + struct ahci_host_priv *hpriv,
> + const struct ata_port_info *pi_template,
> + unsigned int force_port_map,
> + unsigned int mask_port_map);
>  
>  #endif /* _AHCI_PLATFORM_H */
> -- 
> 1.8.5.3
> 

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Re: [linux-sunxi] Kernel 3.4.79 with initramfs (initrd) doesn't recognize/boot SD card

2014-02-19 Thread Luc Verhaegen
On Sun, Feb 16, 2014 at 04:06:07AM +0200, Siarhei Siamashka wrote:
> On Fri, 14 Feb 2014 17:05:32 +0200
> Siarhei Siamashka  wrote:
> 
> > On Fri, 14 Feb 2014 01:54:25 -0800 (PST)
> > dudo  wrote:
> > 
> > > Hi there.
> > > After compiling latest version of 3.4.79 linux-sunxi kernel, branch 
> > > sunxi-3.4, and using it with initramfs (initrd) image, my A13-OLinuXino 
> > > board can't boot SD card any more. As if kernel doesn't "recognise" 
> > > MMC/SD 
> > > card device. If I remove loading of initrd from boot.scr and tell u-boot 
> > > to 
> > > load and boot kernel without initramfs, kernel recognizes MMC/SD card 
> > > device and continues booting normally. The same procedure was ok with 
> > > kernel 3.4.67 which booted rootfs normally. Here are some details of my 
> > > configuration:
> > > 
> > >- A13-OLinuXino
> > >- 
> > >- kernel 3.4.67 + initramfs boots rootfs ok
> > >- kernel 3.4.79 + initramfs doesn't "recognize" MMC/SD card device, so 
> > >it doesn't boot rootfs from SD card; when initrd removed from 
> > > boot.scr, 
> > >kernel boots rootfs ok
> > >- kernel branch sunxi-3.4
> > >- custom kernel configuration or configuration taken from 
> > > a13_defconfig, 
> > >neither boots rootfs; support for MMC and initramfs is included
> > >- u-boot version 2013.10-rc2
> > >- boot.scr built from boot.cmd:
> > >- setenv bootargs console=ttyS0,115200 loglevel=8 root=/dev/mmcblk0p2 
> > >rootwait panic=10 ${extra}
> > >fatload mmc 0 0x4600 initrd.img
> > >fatload mmc 0 0x4300 script.bin
> > >fatload mmc 0 0x4800 uImage
> > >bootm 0x4800 0x4600
> > >- kernel messages regarding MMC:
> > >- [1.359357] [mmc-msg] sw_mci_init
> > >[1.362752] [mmc-msg] MMC host used card: 0x1, boot card: 0x0, 
> > >io_card 0
> > >[1.369554] [mmc-err] alloc dma des failed
> > >[1.373667] [mmc-err] sunxi-mmc.0: Failed to get resouce.
> > >[1.379098] [mmc_pm]: no sdio card used in configuration
> > >
> > > 
> > > I also started sh inside initrd and interactively tried to list 
> > > /dev/mmcblk0 device with sfdisk -l, but as if there wasn't device at all 
> > > (but device file was present):
> > > ls /dev/mmcblk0
> > > brw-rw---T 1 0 25 179,0 /dev/mmcblk0
> > > sfdisk -l /dev/mmcblk0
> > > /dev/mmcblk0: No such device or address
> > > sfdisk: cannot open /dev/mmcblk0 for reading
> > > After starting udev, also no MMC device or partitions detected.
> > > All this worked fine with kernel 3.4.67.
> > 
> > There is a universal recipe for this kind of problems - git bisect.
> > 
> > If something used to work before, but does not work any longer, then
> > it is likely that some commit has caused this. Either by introducing
> > a bug or by exposing some other latent bug. Identifying this particular
> > problematic commit can provide a lot of valuable information.
> > 
> > Bisecting is a mechanical work which takes a bit of time, but does not
> > require any special skills other than being able to compile the kernel
> > from sources. One can find many guides on the Internet or just read
> > about it in "man git-bisect".
> 
> Not sure if dudo has had any progress with bisecting yet. But another
> person has reported a somewhat similar problem with 3.4.79 (also
> using it with initrd) just a few hours ago:
> http://irclog.whitequark.org/linux-sunxi/2014-02-15#6501909;
> 
> A quick summary of this investigation. The new kernel now
> has CMA enabled by default. CMA is trying to reserve 192MB
> of physically contiguous memory between physical addresses
> 0x4300 and 0x5000. Using specifically this address
> range is important because CedarX hardware can work only with
> the first 256MB of physical DRAM (the base physical address
> of DRAM is 0x4000). Now if initrd is placed by u-boot
> somewhere in the middle of this memory area (cutting it into
> two halves), then CMA can't reserve physically contiguous
> 192MB memory block there anymore. So the reservation of
> the CMA memory area fails at boot time:
> [0.00] cma: CMA: failed to reserve 192 MiB
> And then loading of the CedarX kernel module fails later at
> runtime too:
> [7.894415] cedar: failed to allocate memory buffer
> 
> Now looking at dodo's logs again, we see that initrd gets
> loaded at a problematic address too:
> > >fatload mmc 0 0x4600 initrd.img
> And then something related to dma (memory?) allocation fails:
> > >[1.369554] [mmc-err] alloc dma des failed
> 
> The solution for this problem is not to place initrd anywhere
> between 0x4300 and 0x5000. It might be even a good
> idea to introduce a special check in the kernel code for this
> problem to log a comprehensive error message and warn the users.
> 
> Even with the older kernels, placing initrd into this particular
> memory addresses range was not completely safe either. Just the
> overlapping with other memory reser

Re: [linux-sunxi] New board: Merrii M2 (A20)

2014-02-19 Thread Luc Verhaegen
On Fri, Feb 14, 2014 at 10:00:39AM -0800, Marcos Cruz wrote:
> Hi, 
> 
> 
> This is a digital signage board based on A20 SoC, here the website: 
> http://www.merrii.com/en/detail.asp?id=157
> I managed to modify and install the Cubian distribution to function on 
> it but 
> I'm having problems with its VGA and HDMI outputs (no signal).
> The file dmesg_output contains the kernel output.
> What is curious about the board is I had to modify script.fex file in 
> order to make 
> the built in rtl8188etv operational but with the Android that comes 
> pre-installed everything works.
> Have anyone any idea about the VGA and HDMI outputs?
> 
> 
> Regards,
> 
> 
> Marcos

Please work through our http://linux-sunxi.org/New_Device_howto fully.

Luc Verhaegen.

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[linux-sunxi] Re: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

2014-02-19 Thread Hans de Goede
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Hi,

On 02/19/2014 10:46 AM, Maxime Ripard wrote:
> Hi Hans,
> 
> On Tue, Feb 18, 2014 at 09:49:21PM +0100, Hans de Goede wrote:
>> Hi,
>> 
>> On 02/18/2014 04:37 PM, Maxime Ripard wrote:
>> 
>> 
>> 
 + +for (i = 0; i < data->sg_len; i++) { +  pdes[i].config 
 = SDXC_IDMAC_DES0_CH | SDXC_IDMAC_DES0_OWN | +
 SDXC_IDMAC_DES0_DIC; + +   if (data->sg[i].length == max_len) 
 +pdes[i].buf_size = 0; /* 0 == max_len */ +
   else +  pdes[i].buf_size = data->sg[i].length; + +   
pdes[i].buf_addr_ptr1 = sg_dma_address(&data->sg[i]); + 
 pdes[i].buf_addr_ptr2 = (u32)&pdes_pa[i + 1]; + } + +   pdes[0].config |= 
 SDXC_IDMAC_DES0_FD; + pdes[i - 1].config = SDXC_IDMAC_DES0_OWN | 
 SDXC_IDMAC_DES0_LD; + +  wmb(); /* Ensure idma_des hit main mem before 
 we start the idmac */
>>> 
>>> wmb ensure the proper ordering of the instructions, not flushing the caches 
>>> like what your comment implies.
>> 
>> Since I put that comment there, allow me to explain. A modern ARM cpu core 
>> has 2 or more units handling stores. One for regular memory stores, and one 
>> for io-mem stores. Regular mem stores can be re-ordered, io stores cannot. 
>> Normally there is no "syncing" between the 2 store units. Cache flushing is 
>> not an issue here since the memory holding the descriptors for the idma 
>> controller is allocated cache coherent, which on arm means it is not cached.
>> 
>> What is an issue here is the io-store starting the idmac hitting the io-mem 
>> before the descriptors hit the main-mem, the wmb() ensures this does not 
>> happen.
> 
> To expand a bit, my point was not that it was functionnally wrong. Since you 
> put a barrier in there, and that it resides in a cache coherent section, 
> we're fine.
> 
> My point was that the comment itself was misleading.

Well as explained above, the purpose of the wmb is to ensure that
the descriptors hit main memory, before the following writel (in the
caller of this function) starts the controller. So I don't see exactly
how the comment is wrong.

If you've a better wording for the comment, suggestions are welcome.



 +static void sunxi_mmc_dump_errinfo(struct sunxi_mmc_host *smc_host) +{ +  
 struct mmc_command *cmd = smc_host->mrq->cmd; + struct mmc_data *data = 
 smc_host->mrq->data; + +/* For some cmds timeout is normal with 
 sd/mmc cards */ +   if ((smc_host->int_sum & SDXC_INTERRUPT_ERROR_BIT) 
 == SDXC_RESP_TIMEOUT && +(cmd->opcode == 
 SD_IO_SEND_OP_COND || cmd->opcode == SD_IO_RW_DIRECT)) +
 return; + + dev_err(mmc_dev(smc_host->mmc),
>>> 
>>> I'd rather put it at a debug loglevel.
>> 
>> Erm, this only happens if something is seriously wrong.
> 
> Still. Something would be seriously wrong in the MMC driver/controller. You 
> don't want to bloat the whole kernel logs with the dump of your registers 
> just because the MMC is failing. This is of no interest to anyone but someone 
> that would actually try to debug what's wrong.

This is not a complete register dump, this writes a single line to the
kernel log saying that an io error happened, and printing the error flags
set in the status register. We cannot be much shorter then this without
simply not notifying the user that an io error has happened, and not
notifying the user is wrong IMHO.

> 
 +  /* Make sure the controller is in a sane state before enabling irqs */ 
 +ret = sunxi_mmc_init_host(host->mmc); + if (ret) +  
 return ret; + + host->irq = platform_get_irq(pdev, 0); +ret = 
 devm_request_irq(&pdev->dev, host->irq, sunxi_mmc_irq, 0, +
   "sunxi-mmc", host); +if (ret == 0) + 
 disable_irq(host->irq);
>>> 
>>> The disable_irq is useless here. Just exit.
>> 
>> No it is not note the ret == 0, this is not an error handling path!
> 
> Doh... Right. My bad.
> 
>> This is done under an if because we want to do the sunxi_mmc_exit_host 
>> regardless of the request_irq succeeding or not.
>> 
>>> 
 + +/* And put it back in reset */ +
 sunxi_mmc_exit_host(host);
>>> 
>>> Hu? If it's in reset, how can it generate some IRQs?
>> 
>> Yes, that is why we do the whole dance of init controller, get irq, disable 
>> irq, drop it back in reset (until the mmc subsys does a power on of the mmc 
>> card / sdio dev).
>> 
>> Sometime the controller asserts the irq in reset for some reason, so without 
>> the dance as soon as we do the devm_request_irq we get an irq, and worse, 
>> not only do we get an irq, we cannot clear it since writing to the interrupt 
>> status register does not work when the controller is in reset, so we get 
>> stuck re-entering the irq handler.
> 
> Hmmm, I see. It probably deserves some commenting here t

Re: [linux-sunxi] Purchasing AllWinner chips

2014-02-19 Thread Luc Verhaegen
On Tue, Feb 18, 2014 at 03:35:13PM -0500, jonsm...@gmail.com wrote:
> On Tue, Feb 18, 2014 at 3:09 PM, Andre Renaud  wrote:
> > Hi,
> > Does anyone know of a reliable supplier who sells the AllWinner A20
> > chips? I was hoping to find them on digikey, mouser or avnet, but it
> > appears that they're a little bit hard to find. I see that Olimex will
> > sell them in low volumes, but I was hoping for a better known supplier
> > (and higher quantities).
> 
> Allwinner is talking with the big distributors currently but AFAIK no
> deal has been reached yet.
> 
> Many people have designed their own board locally using a few chips
> from Olimex. Then when you want to make a larger quantity have them
> assembled in Shenzhen. The Allwinner chips are plentiful in Shenzhen.
> 
> Instead of buying chips you might want to consider standard Q88 tablet
> PCBAs. A20 tablet PCBAs can be bought in the $20-30 range in Shenzhen.
> An easy way to get a hold of them is to buy Q88 tablets and
> disassemble them. These PCBA are made by many companies and the price
> is highly competitive. It is also possible to buy STB PCBAs.
> 
> Another option is to have a Chinese design house make one for you. For
> about $5000 they will design whatever you want and provide about ten
> prototype boards. These designs are easy to put into production since
> they will use local components. Around $40/board for medium volume but
> this depends on what you put on the board.
> 
> Reusing Q88 PCBAs is by far the easiest solution. You can mount one in
> a case and then use an internal USB cable to talk to your specialized
> hardware if needed.

Isn't Q88 an A13 based board?

Luc Verhaegen.

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Re: [linux-sunxi] Problems running Linux on a A20 tablet, from a micro SD card

2014-02-19 Thread Luc Verhaegen
On Sat, Feb 15, 2014 at 07:37:35PM -0500, Marc Lavallée wrote:
> Hello linux-sunxi developpers.
> This is my first post on the list.
> 
> I followed the instructions to create a hardware pack and used
> it to modify a micro SD card with a cubie board Linux system, in order
> to boot my A20 based iRulu AX105 tablet. When I booted it with the

What instructions did you follow?

Shouldn't you be working through http://linux-sunxi.org/New_Device_howto
instead?

Luc Verhaegen.

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[linux-sunxi] i2s audio codec support for sun7i

2014-02-19 Thread Puneet B
Hi i downloaded sunxi kernel 3.4 from below link.

http://docs.cubieboard.org/tutorials/ct1/development/compiling_latest_kernel_for_cubietruck_cubieboard3
.

i changed default configuration to sun7i_defconfig.

but for sun7i there is no i2s codec support, it is for only sun4i and 
sun5i( i saw from menuconfig ).

How to get i2s codec support in my A20 board.

Regards
Punith

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[linux-sunxi] [PATCH v6 18/18] ARM: sun7i: dt: Add ahci / sata support

2014-02-19 Thread Hans de Goede
This patch adds sunxi sata support to A20 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts |  6 ++
 arch/arm/boot/dts/sun7i-a20-cubietruck.dts  | 18 ++
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts |  6 ++
 arch/arm/boot/dts/sun7i-a20.dtsi|  8 
 4 files changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts 
b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
index 7bf4935..07823c2 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
@@ -13,12 +13,18 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Cubietech Cubieboard2";
compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
 
soc@01c0 {
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_cubieboard2: led_pins@0 {
allwinner,pins = "PH20", "PH21";
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts 
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 025ce52..403bd2e 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -13,13 +13,26 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Cubietech Cubietruck";
compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
 
soc@01c0 {
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
+   ahci_pwr_pin_cubietruck: ahci_pwr_pin@1 {
+   allwinner,pins = "PH12";
+   allwinner,function = "gpio_out";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+
led_pins_cubietruck: led_pins@0 {
allwinner,pins = "PH7", "PH11", "PH20", "PH21";
allwinner,function = "gpio_out";
@@ -90,4 +103,9 @@
gpios = <&pio 7 7 0>;
};
};
+
+   reg_ahci_5v: ahci-5v {
+   pinctrl-0 = <&ahci_pwr_pin_cubietruck>;
+   gpio = <&pio 7 12 0>;
+   };
 };
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts 
b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index b02a796..d5c6799 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -13,12 +13,18 @@
 
 /dts-v1/;
 /include/ "sun7i-a20.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Olimex A20-Olinuxino Micro";
compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
 
soc@01c0 {
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_olinuxino: led_pins@0 {
allwinner,pins = "PH2";
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index daaafd0..3385994 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -392,6 +392,14 @@
#size-cells = <0>;
};
 
+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <0 56 4>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   status = "disabled";
+   };
+
pio: pinctrl@01c20800 {
compatible = "allwinner,sun7i-a20-pinctrl";
reg = <0x01c20800 0x400>;
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 10/18] ahci-imx: Port to library-ised ahci_platform

2014-02-19 Thread Hans de Goede
This avoids the ugliness of creating a nested platform device from probe.

While moving it around anyways, move the mk6q phy init code from probe
to imx_sata_enable, as the phy needs to be re-initialized on resume too,
otherwise the drive won't be recognized after resume.

Tested on a wandboard i.mx6 quad.

Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |   9 +-
 drivers/ata/ahci_imx.c | 338 -
 2 files changed, 141 insertions(+), 206 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 499bfed..d86e854 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -5,8 +5,9 @@ Each SATA controller should have its own node.
 
 Required properties:
 - compatible: compatible list, one of "snps,spear-ahci",
-  "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
-  "allwinner,sun4i-a10-ahci"
+  "snps,exynos5440-ahci", "ibm,476gtr-ahci",
+  "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci" or
+  "fsl,imx6q-ahci"
 - interrupts: 
 - reg   : 
 
@@ -15,6 +16,10 @@ Optional properties:
 - clocks: a list of phandle + clock specifier pairs
 - target-supply : regulator for SATA target power
 
+"fsl,imx53-ahci", "fsl,imx6q-ahci" required properties:
+- clocks: must contain the sata, sata_ref and ahb clocks
+- clock-names   : must contain "ahb" for the ahb clock
+
 Examples:
 sata@ffe08000 {
compatible = "snps,spear-ahci";
diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index ebfd1d6..7d51ee2 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -42,13 +42,7 @@ enum ahci_imx_type {
 struct imx_ahci_priv {
struct platform_device *ahci_pdev;
enum ahci_imx_type type;
-
-   /* i.MX53 clock */
-   struct clk *sata_gate_clk;
-   /* Common clock */
-   struct clk *sata_ref_clk;
struct clk *ahb_clk;
-
struct regmap *gpr;
bool no_device;
bool first_time;
@@ -58,28 +52,52 @@ static int ahci_imx_hotplug;
 module_param_named(hotplug, ahci_imx_hotplug, int, 0644);
 MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 
1=support)");
 
-static int imx_sata_clock_enable(struct device *dev)
+static void ahci_imx_host_stop(struct ata_host *host);
+
+static int imx_sata_enable(struct ahci_host_priv *hpriv)
 {
-   struct imx_ahci_priv *imxpriv = dev_get_drvdata(dev->parent);
+   struct imx_ahci_priv *imxpriv = hpriv->plat_data;
int ret;
 
-   if (imxpriv->type == AHCI_IMX53) {
-   ret = clk_prepare_enable(imxpriv->sata_gate_clk);
-   if (ret < 0) {
-   dev_err(dev, "prepare-enable sata_gate clock err:%d\n",
-   ret);
+   if (imxpriv->no_device)
+   return 0;
+
+   if (hpriv->target_pwr) {
+   ret = regulator_enable(hpriv->target_pwr);
+   if (ret)
return ret;
-   }
}
 
-   ret = clk_prepare_enable(imxpriv->sata_ref_clk);
-   if (ret < 0) {
-   dev_err(dev, "prepare-enable sata_ref clock err:%d\n",
-   ret);
-   goto clk_err;
-   }
+   ret = ahci_platform_enable_clks(hpriv);
+   if (ret < 0)
+   goto disable_regulator;
 
if (imxpriv->type == AHCI_IMX6Q) {
+   /*
+* set PHY Paremeters, two steps to configure the GPR13,
+* one write for rest of parameters, mask of first write
+* is 0x07ff, and the other one write for setting
+* the mpll_clk_en.
+*/
+   regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13,
+  IMX6Q_GPR13_SATA_RX_EQ_VAL_MASK |
+  IMX6Q_GPR13_SATA_RX_LOS_LVL_MASK |
+  IMX6Q_GPR13_SATA_RX_DPLL_MODE_MASK |
+  IMX6Q_GPR13_SATA_SPD_MODE_MASK |
+  IMX6Q_GPR13_SATA_MPLL_SS_EN |
+  IMX6Q_GPR13_SATA_TX_ATTEN_MASK |
+  IMX6Q_GPR13_SATA_TX_BOOST_MASK |
+  IMX6Q_GPR13_SATA_TX_LVL_MASK |
+  IMX6Q_GPR13_SATA_MPLL_CLK_EN |
+  IMX6Q_GPR13_SATA_TX_EDGE_RATE,
+  IMX6Q_GPR13_SATA_RX_EQ_VAL_3_0_DB |
+  IMX6Q_GPR13_SATA_RX_LOS_LVL_SATA2M |
+  IMX6Q_GPR13_SATA_RX_DPLL_MODE_2P_4F |
+  IMX6Q_GPR13_SATA_SPD_MODE_3P0G |
+

[linux-sunxi] [PATCH v6 17/18] ARM: sun4i: dt: Add ahci / sata support

2014-02-19 Thread Hans de Goede
From: Oliver Schinagl 

This patch adds sunxi sata support to A10 boards that have such a connector.
Some boards also feature a regulator via a GPIO and support for this is also
added.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts  |  4 
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts |  6 +
 arch/arm/boot/dts/sun4i-a10.dtsi   |  8 +++
 arch/arm/boot/dts/sunxi-ahci-reg.dtsi  | 36 ++
 4 files changed, 54 insertions(+)
 create mode 100644 arch/arm/boot/dts/sunxi-ahci-reg.dtsi

diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index cbd2e13..d6ec839 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -35,6 +35,10 @@
};
};
 
+   ahci: sata@01c18000 {
+   status = "okay";
+   };
+
pinctrl@01c20800 {
emac_power_pin_a1000: emac_power_pin@0 {
allwinner,pins = "PH15";
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index b139ee6..6df237d8 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -12,6 +12,7 @@
 
 /dts-v1/;
 /include/ "sun4i-a10.dtsi"
+/include/ "sunxi-ahci-reg.dtsi"
 
 / {
model = "Cubietech Cubieboard";
@@ -33,6 +34,11 @@
};
};
 
+   ahci: sata@01c18000 {
+   target-supply = <®_ahci_5v>;
+   status = "okay";
+   };
+
pinctrl@01c20800 {
led_pins_cubieboard: led_pins@0 {
allwinner,pins = "PH20", "PH21";
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 336dbec..454077a 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -338,6 +338,14 @@
#size-cells = <0>;
};
 
+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <56>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   status = "disabled";
+   };
+
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-ic";
reg = <0x01c20400 0x400>;
diff --git a/arch/arm/boot/dts/sunxi-ahci-reg.dtsi 
b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
new file mode 100644
index 000..7072af1
--- /dev/null
+++ b/arch/arm/boot/dts/sunxi-ahci-reg.dtsi
@@ -0,0 +1,36 @@
+/*
+ * sunxi boards sata target power supply common code
+ *
+ * Copyright 2014 - Hans de Goede 
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+   soc@01c0 {
+   pio: pinctrl@01c20800 {
+   ahci_pwr_pin_a: ahci_pwr_pin@0 {
+   allwinner,pins = "PB8";
+   allwinner,function = "gpio_out";
+   allwinner,drive = <0>;
+   allwinner,pull = <0>;
+   };
+   };
+   };
+
+   reg_ahci_5v: ahci-5v {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   pinctrl-0 = <&ahci_pwr_pin_a>;
+   regulator-name = "ahci-5v";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   enable-active-high;
+   gpio = <&pio 1 8 0>;
+   };
+};
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 14/18] ata: ahci_platform: Add 'struct device' argument to ahci_platform_put_resources()

2014-02-19 Thread Hans de Goede
From: Roger Quadros 

There is no easy way to access 'struct device' from 'struct ahci_host_priv'
so add an explicit argument for 'struct device'. We will need it
to call Runtime PM APIs.

Signed-off-by: Roger Quadros 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_imx.c| 5 +++--
 drivers/ata/ahci_platform.c   | 7 ---
 drivers/ata/ahci_sunxi.c  | 2 +-
 include/linux/ahci_platform.h | 3 ++-
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index 7d51ee2..5cdaf0b 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -276,16 +276,17 @@ static int imx_ahci_probe(struct platform_device *pdev)
 disable:
imx_sata_disable(hpriv);
 put_resources:
-   ahci_platform_put_resources(hpriv);
+   ahci_platform_put_resources(dev, hpriv);
return ret;
 }
 
 static void ahci_imx_host_stop(struct ata_host *host)
 {
+   struct device *dev = host->dev;
struct ahci_host_priv *hpriv = host->private_data;
 
imx_sata_disable(hpriv);
-   ahci_platform_put_resources(hpriv);
+   ahci_platform_put_resources(dev, hpriv);
 }
 
 static int imx_ahci_suspend(struct device *dev)
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 073931a..f8ef780 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -243,7 +243,8 @@ free_clk:
 }
 EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
 
-void ahci_platform_put_resources(struct ahci_host_priv *hpriv)
+void ahci_platform_put_resources(struct device *dev,
+struct ahci_host_priv *hpriv)
 {
int c;
 
@@ -375,7 +376,7 @@ pdata_exit:
 disable_resources:
ahci_platform_disable_resources(hpriv);
 put_resources:
-   ahci_platform_put_resources(hpriv);
+   ahci_platform_put_resources(dev, hpriv);
return rc;
 }
 
@@ -389,7 +390,7 @@ static void ahci_host_stop(struct ata_host *host)
pdata->exit(dev);
 
ahci_platform_disable_resources(hpriv);
-   ahci_platform_put_resources(hpriv);
+   ahci_platform_put_resources(dev, hpriv);
 }
 
 #ifdef CONFIG_PM_SLEEP
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 568a211..219d77f 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c
@@ -194,7 +194,7 @@ static int ahci_sunxi_probe(struct platform_device *pdev)
 disable_resources:
ahci_platform_disable_resources(hpriv);
 put_resources:
-   ahci_platform_put_resources(hpriv);
+   ahci_platform_put_resources(dev, hpriv);
return rc;
 }
 
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 7c683c7..719678c 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -43,7 +43,8 @@ int ahci_platform_enable_resources(struct ahci_host_priv 
*hpriv);
 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv);
 struct ahci_host_priv *ahci_platform_get_resources(
struct platform_device *pdev);
-void ahci_platform_put_resources(struct ahci_host_priv *hpriv);
+void ahci_platform_put_resources(struct device *dev,
+struct ahci_host_priv *hpriv);
 int ahci_platform_init_host(struct platform_device *pdev,
struct ahci_host_priv *hpriv,
const struct ata_port_info *pi_template,
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 12/18] ata: ahci_platform: Update DT compatible list

2014-02-19 Thread Hans de Goede
From: Roger Quadros 

The ahci_platform driver supports "snps,dwc-ahci".
Add this to the DT binding information.

Signed-off-by: Roger Quadros 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Hans de Goede 
---
 Documentation/devicetree/bindings/ata/ahci-platform.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index d86e854..48b285f 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -6,8 +6,8 @@ Each SATA controller should have its own node.
 Required properties:
 - compatible: compatible list, one of "snps,spear-ahci",
   "snps,exynos5440-ahci", "ibm,476gtr-ahci",
-  "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci" or
-  "fsl,imx6q-ahci"
+  "allwinner,sun4i-a10-ahci", "fsl,imx53-ahci"
+  "fsl,imx6q-ahci" or "snps,dwc-ahci"
 - interrupts: 
 - reg   : 
 
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 16/18] ARM: sun4i: dt: Remove grouping + simple-bus compatible for regulators

2014-02-19 Thread Hans de Goede
According to Documentation/devicetree/bindings/regulator/regulator.txt
regulator nodes should not be placed under 'simple-bus'.

Mark Rutland also explains about it at:
http://www.spinics.net/lists/linux-usb/msg101497.html

Signed-off-by: Hans de Goede 
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts | 22 +-
 arch/arm/boot/dts/sun4i-a10-hackberry.dts | 18 +++---
 2 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts 
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index d4b081d..cbd2e13 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -80,18 +80,14 @@
};
};
 
-   regulators {
-   compatible = "simple-bus";
-
-   reg_emac_3v3: emac-3v3 {
-   compatible = "regulator-fixed";
-   pinctrl-names = "default";
-   pinctrl-0 = <&emac_power_pin_a1000>;
-   regulator-name = "emac-3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   enable-active-high;
-   gpio = <&pio 7 15 0>;
-   };
+   reg_emac_3v3: emac-3v3 {
+   compatible = "regulator-fixed";
+   pinctrl-names = "default";
+   pinctrl-0 = <&emac_power_pin_a1000>;
+   regulator-name = "emac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   enable-active-high;
+   gpio = <&pio 7 15 0>;
};
 };
diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts 
b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
index 3a1595f..6692d336 100644
--- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts
+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts
@@ -54,16 +54,12 @@
};
};
 
-   regulators {
-   compatible = "simple-bus";
-
-   reg_emac_3v3: emac-3v3 {
-   compatible = "regulator-fixed";
-   regulator-name = "emac-3v3";
-   regulator-min-microvolt = <330>;
-   regulator-max-microvolt = <330>;
-   enable-active-high;
-   gpio = <&pio 7 19 0>;
-   };
+   reg_emac_3v3: emac-3v3 {
+   compatible = "regulator-fixed";
+   regulator-name = "emac-3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   enable-active-high;
+   gpio = <&pio 7 19 0>;
};
 };
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 15/18] ata: ahci_platform: runtime resume the device before use

2014-02-19 Thread Hans de Goede
From: Roger Quadros 

On OMAP platforms the device needs to be runtime resumed before
it can be accessed. The OMAP HWMOD framework takes care of
enabling the module and its resources based on the
device's runtime PM state.

In this patch we runtime resume during .probe() and runtime suspend
during .remove() (i.e. ahci_host_stop()).

We also update the runtime PM state during .resume().

CC: Balaji T K 
Signed-off-by: Roger Quadros 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index f8ef780..bb2e7ab 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "ahci.h"
 
 static void ahci_host_stop(struct ata_host *host);
@@ -234,6 +235,9 @@ struct ahci_host_priv *ahci_platform_get_resources(
}
}
 
+   pm_runtime_enable(dev);
+   pm_runtime_get_sync(dev);
+
return hpriv;
 
 free_clk:
@@ -248,6 +252,9 @@ void ahci_platform_put_resources(struct device *dev,
 {
int c;
 
+   pm_runtime_put_sync(dev);
+   pm_runtime_disable(dev);
+
for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
clk_put(hpriv->clks[c]);
 }
@@ -480,6 +487,11 @@ int ahci_platform_resume(struct device *dev)
if (rc)
goto disable_resources;
 
+   /* We resumed so update PM runtime state */
+   pm_runtime_disable(dev);
+   pm_runtime_set_active(dev);
+   pm_runtime_enable(dev);
+
return 0;
 
 disable_resources:
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 13/18] ata: ahci_platform: Manage SATA PHY

2014-02-19 Thread Hans de Goede
From: Roger Quadros 

Some platforms have a PHY hooked up to the
SATA controller. The PHY needs to be initialized
and powered up for SATA to work. We do that
using the PHY framework.

CC: Balaji T K 
Signed-off-by: Roger Quadros 
Signed-off-by: Hans de Goede 
---
 drivers/ata/Kconfig |  1 +
 drivers/ata/ahci_platform.c | 40 
 include/linux/ahci.h|  2 ++
 3 files changed, 43 insertions(+)

diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index cc67cc0..96176f4 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -91,6 +91,7 @@ config SATA_AHCI
 
 config SATA_AHCI_PLATFORM
tristate "Platform AHCI SATA support"
+   depends on GENERIC_PHY || !GENERIC_PHY
help
  This option enables support for Platform AHCI Serial ATA
  controllers.
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 962ec25..073931a 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "ahci.h"
 
 static void ahci_host_stop(struct ata_host *host);
@@ -131,8 +132,23 @@ int ahci_platform_enable_resources(struct ahci_host_priv 
*hpriv)
if (rc)
goto disable_regulator;
 
+   if (hpriv->phy) {
+   rc = phy_init(hpriv->phy);
+   if (rc)
+   goto disable_clks;
+
+   rc = phy_power_on(hpriv->phy);
+   if (rc) {
+   phy_exit(hpriv->phy);
+   goto disable_clks;
+   }
+   }
+
return 0;
 
+disable_clks:
+   ahci_platform_disable_clks(hpriv);
+
 disable_regulator:
if (hpriv->target_pwr)
regulator_disable(hpriv->target_pwr);
@@ -142,6 +158,11 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
 
 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
 {
+   if (hpriv->phy) {
+   phy_power_off(hpriv->phy);
+   phy_exit(hpriv->phy);
+   }
+
ahci_platform_disable_clks(hpriv);
 
if (hpriv->target_pwr)
@@ -194,6 +215,25 @@ struct ahci_host_priv *ahci_platform_get_resources(
hpriv->clks[i] = clk;
}
 
+   hpriv->phy = devm_phy_get(dev, "sata-phy");
+   if (IS_ERR(hpriv->phy)) {
+   rc = PTR_ERR(hpriv->phy);
+   switch (rc) {
+   case -ENODEV:
+   case -ENOSYS:
+   /* continue normally */
+   hpriv->phy = NULL;
+   break;
+
+   case -EPROBE_DEFER:
+   goto free_clk;
+
+   default:
+   dev_err(dev, "couldn't get sata-phy\n");
+   goto free_clk;
+   }
+   }
+
return hpriv;
 
 free_clk:
diff --git a/include/linux/ahci.h b/include/linux/ahci.h
index ac69cdc..8fbe3d7 100644
--- a/include/linux/ahci.h
+++ b/include/linux/ahci.h
@@ -23,6 +23,7 @@
 
 #include 
 #include 
+#include 
 
 #define AHCI_MAX_CLKS  3
 
@@ -42,6 +43,7 @@ struct ahci_host_priv {
u32 em_msg_type;/* EM message type */
struct clk  *clks[AHCI_MAX_CLKS]; /* Optional */
struct regulator*target_pwr;/* Optional */
+   struct phy  *phy;   /* If platform uses phy */
void*plat_data; /* Other platform data */
/* Optional ahci_start_engine override */
void(*start_engine)(struct ata_port *ap);
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 11/18] ata: ahci_platform: Add DT compatible for Synopsis DWC AHCI controller

2014-02-19 Thread Hans de Goede
From: Roger Quadros 

Add compatible string "snps,dwc-ahci", which should be used
for Synopsis Designware SATA cores. e.g. on TI OMAP5 and DRA7 platforms.

Signed-off-by: Roger Quadros 
Reviewed-by: Bartlomiej Zolnierkiewicz 
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index ba93930..962ec25 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -456,6 +456,7 @@ static const struct of_device_id ahci_of_match[] = {
{ .compatible = "snps,spear-ahci", },
{ .compatible = "snps,exynos5440-ahci", },
{ .compatible = "ibm,476gtr-ahci", },
+   { .compatible = "snps,dwc-ahci", },
{},
 };
 MODULE_DEVICE_TABLE(of, ahci_of_match);
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 06/18] ahci-platform: Add enable_ / disable_resources helper functions

2014-02-19 Thread Hans de Goede
Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 83 ---
 include/linux/ahci_platform.h |  2 ++
 2 files changed, 48 insertions(+), 37 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 2f319e9..1cce7a2 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -117,6 +117,39 @@ void ahci_platform_disable_clks(struct ahci_host_priv 
*hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
 
 
+int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
+{
+   int rc;
+
+   if (hpriv->target_pwr) {
+   rc = regulator_enable(hpriv->target_pwr);
+   if (rc)
+   return rc;
+   }
+
+   rc = ahci_platform_enable_clks(hpriv);
+   if (rc)
+   goto disable_regulator;
+
+   return 0;
+
+disable_regulator:
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
+   return rc;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
+
+void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
+{
+   ahci_platform_disable_clks(hpriv);
+
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
+
+
 static void ahci_put_clks(struct ahci_host_priv *hpriv)
 {
int c;
@@ -190,15 +223,9 @@ static int ahci_probe(struct platform_device *pdev)
hpriv->clks[i] = clk;
}
 
-   if (hpriv->target_pwr) {
-   rc = regulator_enable(hpriv->target_pwr);
-   if (rc)
-   goto free_clk;
-   }
-
-   rc = ahci_enable_clks(dev, hpriv);
+   rc = ahci_platform_enable_resources(hpriv);
if (rc)
-   goto disable_regulator;
+   goto free_clk;
 
/*
 * Some platforms might need to prepare for mmio region access,
@@ -209,7 +236,7 @@ static int ahci_probe(struct platform_device *pdev)
if (pdata && pdata->init) {
rc = pdata->init(dev, hpriv);
if (rc)
-   goto disable_unprepare_clk;
+   goto disable_resources;
}
 
ahci_save_initial_config(dev, hpriv,
@@ -279,11 +306,8 @@ static int ahci_probe(struct platform_device *pdev)
 pdata_exit:
if (pdata && pdata->exit)
pdata->exit(dev);
-disable_unprepare_clk:
-   ahci_disable_clks(hpriv);
-disable_regulator:
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
+disable_resources:
+   ahci_platform_disable_resources(hpriv);
 free_clk:
ahci_put_clks(hpriv);
return rc;
@@ -298,11 +322,8 @@ static void ahci_host_stop(struct ata_host *host)
if (pdata && pdata->exit)
pdata->exit(dev);
 
-   ahci_disable_clks(hpriv);
+   ahci_platform_disable_resources(hpriv);
ahci_put_clks(hpriv);
-
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -337,10 +358,7 @@ static int ahci_suspend(struct device *dev)
if (pdata && pdata->suspend)
return pdata->suspend(dev);
 
-   ahci_disable_clks(hpriv);
-
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
+   ahci_platform_disable_resources(hpriv);
 
return 0;
 }
@@ -352,26 +370,20 @@ static int ahci_resume(struct device *dev)
struct ahci_host_priv *hpriv = host->private_data;
int rc;
 
-   if (hpriv->target_pwr) {
-   rc = regulator_enable(hpriv->target_pwr);
-   if (rc)
-   return rc;
-   }
-
-   rc = ahci_enable_clks(dev, hpriv);
+   rc = ahci_platform_enable_resources(hpriv);
if (rc)
-   goto disable_regulator;
+   return rc;
 
if (pdata && pdata->resume) {
rc = pdata->resume(dev);
if (rc)
-   goto disable_unprepare_clk;
+   goto disable_resources;
}
 
if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
rc = ahci_reset_controller(host);
if (rc)
-   goto disable_unprepare_clk;
+   goto disable_resources;
 
ahci_init_controller(host);
}
@@ -380,11 +392,8 @@ static int ahci_resume(struct device *dev)
 
return 0;
 
-disable_unprepare_clk:
-   ahci_disable_clks(hpriv);
-disable_regulator:
-   if (hpriv->target_pwr)
-   regulator_disable(hpriv->target_pwr);
+disable_resources:
+   ahci_platform_disable_resources(hpriv);
 
return rc;
 }
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 0071d0b..5e5f85e 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -33,5 +33,7 @@ struct ahci_platform_da

[linux-sunxi] [PATCH v6 08/18] ahci-platform: "Library-ise" suspend / resume functionality

2014-02-19 Thread Hans de Goede
Split suspend / resume code into host suspend / resume functionality and
resource enable / disabling phases, and export the new suspend_ / resume_host
functions.

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 55 +++
 include/linux/ahci_platform.h |  5 
 2 files changed, 45 insertions(+), 15 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index b260ebe..ba93930 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -353,14 +353,12 @@ static void ahci_host_stop(struct ata_host *host)
 }
 
 #ifdef CONFIG_PM_SLEEP
-static int ahci_suspend(struct device *dev)
+int ahci_platform_suspend_host(struct device *dev)
 {
-   struct ahci_platform_data *pdata = dev_get_platdata(dev);
struct ata_host *host = dev_get_drvdata(dev);
struct ahci_host_priv *hpriv = host->private_data;
void __iomem *mmio = hpriv->mmio;
u32 ctl;
-   int rc;
 
if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
dev_err(dev, "firmware update required for suspend/resume\n");
@@ -377,7 +375,37 @@ static int ahci_suspend(struct device *dev)
writel(ctl, mmio + HOST_CTL);
readl(mmio + HOST_CTL); /* flush */
 
-   rc = ata_host_suspend(host, PMSG_SUSPEND);
+   return ata_host_suspend(host, PMSG_SUSPEND);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
+
+int ahci_platform_resume_host(struct device *dev)
+{
+   struct ata_host *host = dev_get_drvdata(dev);
+   int rc;
+
+   if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
+   rc = ahci_reset_controller(host);
+   if (rc)
+   return rc;
+
+   ahci_init_controller(host);
+   }
+
+   ata_host_resume(host);
+
+   return 0;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
+
+int ahci_platform_suspend(struct device *dev)
+{
+   struct ahci_platform_data *pdata = dev_get_platdata(dev);
+   struct ata_host *host = dev_get_drvdata(dev);
+   struct ahci_host_priv *hpriv = host->private_data;
+   int rc;
+
+   rc = ahci_platform_suspend_host(dev);
if (rc)
return rc;
 
@@ -388,8 +416,9 @@ static int ahci_suspend(struct device *dev)
 
return 0;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_suspend);
 
-static int ahci_resume(struct device *dev)
+int ahci_platform_resume(struct device *dev)
 {
struct ahci_platform_data *pdata = dev_get_platdata(dev);
struct ata_host *host = dev_get_drvdata(dev);
@@ -406,15 +435,9 @@ static int ahci_resume(struct device *dev)
goto disable_resources;
}
 
-   if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
-   rc = ahci_reset_controller(host);
-   if (rc)
-   goto disable_resources;
-
-   ahci_init_controller(host);
-   }
-
-   ata_host_resume(host);
+   rc = ahci_platform_resume_host(dev);
+   if (rc)
+   goto disable_resources;
 
return 0;
 
@@ -423,9 +446,11 @@ disable_resources:
 
return rc;
 }
+EXPORT_SYMBOL_GPL(ahci_platform_resume);
 #endif
 
-static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
+static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
+ahci_platform_resume);
 
 static const struct of_device_id ahci_of_match[] = {
{ .compatible = "snps,spear-ahci", },
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 1dc7602..7c683c7 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -50,4 +50,9 @@ int ahci_platform_init_host(struct platform_device *pdev,
unsigned int force_port_map,
unsigned int mask_port_map);
 
+int ahci_platform_suspend_host(struct device *dev);
+int ahci_platform_resume_host(struct device *dev);
+int ahci_platform_suspend(struct device *dev);
+int ahci_platform_resume(struct device *dev);
+
 #endif /* _AHCI_PLATFORM_H */
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 09/18] ARM: sunxi: Add support for Allwinner SUNXi SoCs sata to ahci_platform

2014-02-19 Thread Hans de Goede
From: Olliver Schinagl 

This patch adds support for the ahci sata controler found on Allwinner A10
and A20 SoCs to the ahci_platform driver.

Orignally written by Olliver Schinagl using the approach of having a platform
device which probe method creates a new child platform device which gets
driven by ahci_platform.c, as done by ahci_imx.c .

Refactored by Hans de Goede to add most of the non sunxi specific functionality
to ahci_platform.c and use a platform_data pointer from of_device_id for the
sunxi specific bits.

Signed-off-by: Olliver Schinagl 
Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |  15 +-
 drivers/ata/Kconfig|   9 +
 drivers/ata/Makefile   |   1 +
 drivers/ata/ahci_sunxi.c   | 251 +
 4 files changed, 273 insertions(+), 3 deletions(-)
 create mode 100644 drivers/ata/ahci_sunxi.c

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 1ac807f..499bfed 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -4,7 +4,9 @@ SATA nodes are defined to describe on-chip Serial ATA 
controllers.
 Each SATA controller should have its own node.
 
 Required properties:
-- compatible: compatible list, contains "snps,spear-ahci"
+- compatible: compatible list, one of "snps,spear-ahci",
+  "snps,exynos5440-ahci", "ibm,476gtr-ahci", or
+  "allwinner,sun4i-a10-ahci"
 - interrupts: 
 - reg   : 
 
@@ -13,10 +15,17 @@ Optional properties:
 - clocks: a list of phandle + clock specifier pairs
 - target-supply : regulator for SATA target power
 
-Example:
+Examples:
 sata@ffe08000 {
compatible = "snps,spear-ahci";
reg = <0xffe08000 0x1000>;
interrupts = <115>;
-
 };
+
+   ahci: sata@01c18000 {
+   compatible = "allwinner,sun4i-a10-ahci";
+   reg = <0x01c18000 0x1000>;
+   interrupts = <56>;
+   clocks = <&pll6 0>, <&ahb_gates 25>;
+   target-supply = <®_ahci_5v>;
+   };
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 4e73772..cc67cc0 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -106,6 +106,15 @@ config AHCI_IMX
 
  If unsure, say N.
 
+config AHCI_SUNXI
+   tristate "Allwinner sunxi AHCI SATA support"
+   depends on ARCH_SUNXI && SATA_AHCI_PLATFORM
+   help
+ This option enables support for the Allwinner sunxi SoC's
+ onboard AHCI SATA.
+
+ If unsure, say N.
+
 config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
depends on FSL_SOC
diff --git a/drivers/ata/Makefile b/drivers/ata/Makefile
index 46518c6..246050b 100644
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_SATA_SIL24)  += sata_sil24.o
 obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
 obj-$(CONFIG_SATA_HIGHBANK)+= sata_highbank.o libahci.o
 obj-$(CONFIG_AHCI_IMX) += ahci_imx.o
+obj-$(CONFIG_AHCI_SUNXI)   += ahci_sunxi.o
 
 # SFF w/ custom DMA
 obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
new file mode 100644
index 000..568a211
--- /dev/null
+++ b/drivers/ata/ahci_sunxi.c
@@ -0,0 +1,251 @@
+/*
+ * Allwinner sunxi AHCI SATA platform driver
+ * Copyright 2013 Olliver Schinagl 
+ * Copyright 2014 Hans de Goede 
+ *
+ * based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
+ * Based on code from Allwinner Technology Co., Ltd. ,
+ * Daniel Wang 
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "ahci.h"
+
+#define AHCI_BISTAFR 0x00a0
+#define AHCI_BISTCR 0x00a4
+#define AHCI_BISTFCTR 0x00a8
+#define AHCI_BISTSR 0x00ac
+#define AHCI_BISTDECR 0x00b0
+#define AHCI_DIAGNR0 0x00b4
+#define AHCI_DIAGNR1 0x00b8
+#define AHCI_OOBR 0x00bc
+#define AHCI_PHYCS0R 0x00c0
+#define AHCI_PHYCS1R 0x00c4
+#define AHCI_PHYCS2R 0x00c8
+#define AHCI_TIMER1MS 0x00e0
+#define AHCI_GPARAM1R 0x00e8
+#define AHCI_GPARAM2R 0x00ec
+#define AHCI_PPARAMR 0x00f0
+#define AHCI_TESTR 0x00f4
+#define AHCI_VERSIONR 0x00f8
+#define AHCI_IDR 0x00fc
+#define AHCI_RWCR 0x00fc
+#define AHCI_P0DMACR 0x0170
+#define AHCI_P0PHYCR 0x0178
+#define AH

[linux-sunxi] [PATCH v6 07/18] ahci-platform: "Library-ise" ahci_probe functionality

2014-02-19 Thread Hans de Goede
ahci_probe consists of 3 steps:
1) Get resources (get mmio, clks, regulator)
2) Enable resources, handled by ahci_platform_enable_resouces
3) The more or less standard ahci-host controller init sequence

This commit refactors step 1 and 3 into separate functions, so the platform
drivers for AHCI implementations which need a specific order in step 2,
and / or need to do some custom register poking at some time, can re-use
ahci-platform.c code without needing to copy and paste it.

Note that ahci_platform_init_host's prototype takes the 3 non function
members of ahci_platform_data as arguments, the idea is that drivers using
the new exported utility functions will not use ahci_platform_data at all,
and hopefully in the future ahci_platform_data can go away entirely.

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci_platform.c   | 158 --
 include/linux/ahci_platform.h |  14 
 2 files changed, 106 insertions(+), 66 deletions(-)

diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 1cce7a2..b260ebe 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -150,60 +150,31 @@ void ahci_platform_disable_resources(struct 
ahci_host_priv *hpriv)
 EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
 
 
-static void ahci_put_clks(struct ahci_host_priv *hpriv)
-{
-   int c;
-
-   for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
-   clk_put(hpriv->clks[c]);
-}
-
-static int ahci_probe(struct platform_device *pdev)
+struct ahci_host_priv *ahci_platform_get_resources(
+   struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
-   struct ahci_platform_data *pdata = dev_get_platdata(dev);
-   const struct platform_device_id *id = platform_get_device_id(pdev);
-   struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
-   const struct ata_port_info *ppi[] = { &pi, NULL };
struct ahci_host_priv *hpriv;
-   struct ata_host *host;
-   struct resource *mem;
struct clk *clk;
-   int i, irq, max_clk, n_ports, rc;
-
-   mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-   if (!mem) {
-   dev_err(dev, "no mmio space\n");
-   return -EINVAL;
-   }
-
-   irq = platform_get_irq(pdev, 0);
-   if (irq <= 0) {
-   dev_err(dev, "no irq\n");
-   return -EINVAL;
-   }
-
-   if (pdata && pdata->ata_port_info)
-   pi = *pdata->ata_port_info;
+   int i, max_clk, rc;
 
hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
if (!hpriv) {
dev_err(dev, "can't alloc ahci_host_priv\n");
-   return -ENOMEM;
+   return ERR_PTR(-ENOMEM);
}
 
-   hpriv->flags |= (unsigned long)pi.private_data;
-
-   hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
+   hpriv->mmio = devm_ioremap_resource(dev,
+ platform_get_resource(pdev, IORESOURCE_MEM, 0));
if (!hpriv->mmio) {
-   dev_err(dev, "can't map %pR\n", mem);
-   return -ENOMEM;
+   dev_err(dev, "no mmio space\n");
+   return ERR_PTR(-EINVAL);
}
 
hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
if (IS_ERR(hpriv->target_pwr)) {
if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
-   return -EPROBE_DEFER;
+   return ERR_PTR(-EPROBE_DEFER);
hpriv->target_pwr = NULL;
}
 
@@ -223,27 +194,48 @@ static int ahci_probe(struct platform_device *pdev)
hpriv->clks[i] = clk;
}
 
-   rc = ahci_platform_enable_resources(hpriv);
-   if (rc)
-   goto free_clk;
+   return hpriv;
 
-   /*
-* Some platforms might need to prepare for mmio region access,
-* which could be done in the following init call. So, the mmio
-* region shouldn't be accessed before init (if provided) has
-* returned successfully.
-*/
-   if (pdata && pdata->init) {
-   rc = pdata->init(dev, hpriv);
-   if (rc)
-   goto disable_resources;
-   }
+free_clk:
+   while (--i >= 0)
+   clk_put(hpriv->clks[i]);
+   return ERR_PTR(rc);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
+
+void ahci_platform_put_resources(struct ahci_host_priv *hpriv)
+{
+   int c;
+
+   for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
+   clk_put(hpriv->clks[c]);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_put_resources);
+
+
+int ahci_platform_init_host(struct platform_device *pdev,
+   struct ahci_host_priv *hpriv,
+   const struct ata_port_info *pi_template,
+   unsigned int force_port_map,
+   unsigned int mask_port_map)
+{
+   st

[linux-sunxi] [PATCH v6 04/18] ahci-platform: Add support for devices with more then 1 clock

2014-02-19 Thread Hans de Goede
The allwinner-sun4i AHCI controller needs 2 clocks to be enabled and the
imx AHCI controller needs 3 clocks to be enabled.

Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |  1 +
 drivers/ata/ahci_platform.c| 97 +++---
 include/linux/ahci.h   |  4 +-
 include/linux/ahci_platform.h  |  3 +
 4 files changed, 73 insertions(+), 32 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 89de156..3ced07d 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - dma-coherent  : Present if dma operations are coherent
+- clocks: a list of phandle + clock specifier pairs
 
 Example:
 sata@ffe08000 {
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 434ab89..aaa0c08 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -87,6 +87,44 @@ static struct scsi_host_template ahci_platform_sht = {
AHCI_SHT("ahci_platform"),
 };
 
+
+int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
+{
+   int c, rc;
+
+   for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
+   rc = clk_prepare_enable(hpriv->clks[c]);
+   if (rc)
+   goto disable_unprepare_clk;
+   }
+   return 0;
+
+disable_unprepare_clk:
+   while (--c >= 0)
+   clk_disable_unprepare(hpriv->clks[c]);
+   return rc;
+}
+EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
+
+void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
+{
+   int c;
+
+   for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
+   if (hpriv->clks[c])
+   clk_disable_unprepare(hpriv->clks[c]);
+}
+EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
+
+
+static void ahci_put_clks(struct ahci_host_priv *hpriv)
+{
+   int c;
+
+   for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
+   clk_put(hpriv->clks[c]);
+}
+
 static int ahci_probe(struct platform_device *pdev)
 {
struct device *dev = &pdev->dev;
@@ -97,10 +135,8 @@ static int ahci_probe(struct platform_device *pdev)
struct ahci_host_priv *hpriv;
struct ata_host *host;
struct resource *mem;
-   int irq;
-   int n_ports;
-   int i;
-   int rc;
+   struct clk *clk;
+   int i, irq, max_clk, n_ports, rc;
 
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem) {
@@ -131,17 +167,26 @@ static int ahci_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
-   hpriv->clk = clk_get(dev, NULL);
-   if (IS_ERR(hpriv->clk)) {
-   dev_err(dev, "can't get clock\n");
-   } else {
-   rc = clk_prepare_enable(hpriv->clk);
-   if (rc) {
-   dev_err(dev, "clock prepare enable failed");
-   goto free_clk;
+   max_clk = dev->of_node ? AHCI_MAX_CLKS : 1;
+   for (i = 0; i < max_clk; i++) {
+   if (i == 0)
+   clk = clk_get(dev, NULL); /* For old platform init */
+   else
+   clk = of_clk_get(dev->of_node, i);
+
+   if (IS_ERR(clk)) {
+   rc = PTR_ERR(clk);
+   if (rc == -EPROBE_DEFER)
+   goto free_clk;
+   break;
}
+   hpriv->clks[i] = clk;
}
 
+   rc = ahci_enable_clks(dev, hpriv);
+   if (rc)
+   goto free_clk;
+
/*
 * Some platforms might need to prepare for mmio region access,
 * which could be done in the following init call. So, the mmio
@@ -222,11 +267,9 @@ pdata_exit:
if (pdata && pdata->exit)
pdata->exit(dev);
 disable_unprepare_clk:
-   if (!IS_ERR(hpriv->clk))
-   clk_disable_unprepare(hpriv->clk);
+   ahci_disable_clks(hpriv);
 free_clk:
-   if (!IS_ERR(hpriv->clk))
-   clk_put(hpriv->clk);
+   ahci_put_clks(hpriv);
return rc;
 }
 
@@ -239,10 +282,8 @@ static void ahci_host_stop(struct ata_host *host)
if (pdata && pdata->exit)
pdata->exit(dev);
 
-   if (!IS_ERR(hpriv->clk)) {
-   clk_disable_unprepare(hpriv->clk);
-   clk_put(hpriv->clk);
-   }
+   ahci_disable_clks(hpriv);
+   ahci_put_clks(hpriv);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -277,8 +318,7 @@ static int ahci_suspend(struct device *dev)
if (pdata && pdata->suspend)
return pdata->suspend(dev);
 
-   if (!IS_ERR(hpriv->clk))
-   clk_disable_unprepare(hpriv->clk);
+   ahci_disable_clks(hpriv);
 
return 0;
 }
@@ -290,

[linux-sunxi] [PATCH v6 05/18] ahci-platform: Add support for an optional regulator for sata-target power

2014-02-19 Thread Hans de Goede
Signed-off-by: Hans de Goede 
---
 .../devicetree/bindings/ata/ahci-platform.txt  |  1 +
 drivers/ata/ahci_platform.c| 35 --
 include/linux/ahci.h   |  2 ++
 3 files changed, 36 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt 
b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index 3ced07d..1ac807f 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -11,6 +11,7 @@ Required properties:
 Optional properties:
 - dma-coherent  : Present if dma operations are coherent
 - clocks: a list of phandle + clock specifier pairs
+- target-supply : regulator for SATA target power
 
 Example:
 sata@ffe08000 {
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index aaa0c08..2f319e9 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -167,6 +167,13 @@ static int ahci_probe(struct platform_device *pdev)
return -ENOMEM;
}
 
+   hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
+   if (IS_ERR(hpriv->target_pwr)) {
+   if (PTR_ERR(hpriv->target_pwr) == -EPROBE_DEFER)
+   return -EPROBE_DEFER;
+   hpriv->target_pwr = NULL;
+   }
+
max_clk = dev->of_node ? AHCI_MAX_CLKS : 1;
for (i = 0; i < max_clk; i++) {
if (i == 0)
@@ -183,9 +190,15 @@ static int ahci_probe(struct platform_device *pdev)
hpriv->clks[i] = clk;
}
 
+   if (hpriv->target_pwr) {
+   rc = regulator_enable(hpriv->target_pwr);
+   if (rc)
+   goto free_clk;
+   }
+
rc = ahci_enable_clks(dev, hpriv);
if (rc)
-   goto free_clk;
+   goto disable_regulator;
 
/*
 * Some platforms might need to prepare for mmio region access,
@@ -268,6 +281,9 @@ pdata_exit:
pdata->exit(dev);
 disable_unprepare_clk:
ahci_disable_clks(hpriv);
+disable_regulator:
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
 free_clk:
ahci_put_clks(hpriv);
return rc;
@@ -284,6 +300,9 @@ static void ahci_host_stop(struct ata_host *host)
 
ahci_disable_clks(hpriv);
ahci_put_clks(hpriv);
+
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
 }
 
 #ifdef CONFIG_PM_SLEEP
@@ -320,6 +339,9 @@ static int ahci_suspend(struct device *dev)
 
ahci_disable_clks(hpriv);
 
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
+
return 0;
 }
 
@@ -330,9 +352,15 @@ static int ahci_resume(struct device *dev)
struct ahci_host_priv *hpriv = host->private_data;
int rc;
 
+   if (hpriv->target_pwr) {
+   rc = regulator_enable(hpriv->target_pwr);
+   if (rc)
+   return rc;
+   }
+
rc = ahci_enable_clks(dev, hpriv);
if (rc)
-   return rc;
+   goto disable_regulator;
 
if (pdata && pdata->resume) {
rc = pdata->resume(dev);
@@ -354,6 +382,9 @@ static int ahci_resume(struct device *dev)
 
 disable_unprepare_clk:
ahci_disable_clks(hpriv);
+disable_regulator:
+   if (hpriv->target_pwr)
+   regulator_disable(hpriv->target_pwr);
 
return rc;
 }
diff --git a/include/linux/ahci.h b/include/linux/ahci.h
index 19970b0..ac69cdc 100644
--- a/include/linux/ahci.h
+++ b/include/linux/ahci.h
@@ -22,6 +22,7 @@
 #define __LINUX_AHCI_H__
 
 #include 
+#include 
 
 #define AHCI_MAX_CLKS  3
 
@@ -40,6 +41,7 @@ struct ahci_host_priv {
u32 em_buf_sz;  /* EM buffer size in byte */
u32 em_msg_type;/* EM message type */
struct clk  *clks[AHCI_MAX_CLKS]; /* Optional */
+   struct regulator*target_pwr;/* Optional */
void*plat_data; /* Other platform data */
/* Optional ahci_start_engine override */
void(*start_engine)(struct ata_port *ap);
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 01/18] libahci: Allow drivers to override start_engine

2014-02-19 Thread Hans de Goede
Allwinner A10 and A20 ARM SoCs have an AHCI sata controller which needs a
special register to be poked before starting the DMA engine.

This register gets reset on an ahci_stop_engine call, so there is no other
place then ahci_start_engine where this poking can be done.

This commit allows drivers to override ahci_start_engine behavior for use by
the Allwinner AHCI driver (and potentially other drivers in the future).

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci.c  |  6 --
 drivers/ata/ahci.h  |  3 ++-
 drivers/ata/libahci.c   | 27 ++-
 drivers/ata/sata_highbank.c |  3 ++-
 4 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index dc2756f..eda68b4 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -564,6 +564,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, 
unsigned int *class,
 unsigned long deadline)
 {
struct ata_port *ap = link->ap;
+   struct ahci_host_priv *hpriv = ap->host->private_data;
bool online;
int rc;
 
@@ -574,7 +575,7 @@ static int ahci_vt8251_hardreset(struct ata_link *link, 
unsigned int *class,
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 deadline, &online, NULL);
 
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
 
DPRINTK("EXIT, rc=%d, class=%u\n", rc, *class);
 
@@ -589,6 +590,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, 
unsigned int *class,
 {
struct ata_port *ap = link->ap;
struct ahci_port_priv *pp = ap->private_data;
+   struct ahci_host_priv *hpriv = ap->host->private_data;
u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG;
struct ata_taskfile tf;
bool online;
@@ -604,7 +606,7 @@ static int ahci_p5wdh_hardreset(struct ata_link *link, 
unsigned int *class,
rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context),
 deadline, &online, NULL);
 
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
 
/* The pseudo configuration device on SIMG4726 attached to
 * ASUS P5W-DH Deluxe doesn't send signature FIS after
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 2289efd..2c04211 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -323,6 +323,8 @@ struct ahci_host_priv {
u32 em_msg_type;/* EM message type */
struct clk  *clk;   /* Only for platforms 
supporting clk */
void*plat_data; /* Other platform data */
+   /* Optional ahci_start_engine override */
+   void(*start_engine)(struct ata_port *ap);
 };
 
 extern int ahci_ignore_sss;
@@ -357,7 +359,6 @@ int ahci_do_softreset(struct ata_link *link, unsigned int 
*class,
  int (*check_ready)(struct ata_link *link));
 
 int ahci_stop_engine(struct ata_port *ap);
-void ahci_start_engine(struct ata_port *ap);
 int ahci_check_ready(struct ata_link *link);
 int ahci_kick_engine(struct ata_port *ap);
 int ahci_port_resume(struct ata_port *ap);
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index 36605ab..c550b5c 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -69,6 +69,7 @@ static ssize_t ahci_transmit_led_message(struct ata_port *ap, 
u32 state,
 
 static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
 static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
+static void ahci_start_engine(struct ata_port *ap);
 static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc);
 static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc);
 static int ahci_port_start(struct ata_port *ap);
@@ -500,6 +501,9 @@ void ahci_save_initial_config(struct device *dev,
hpriv->cap = cap;
hpriv->cap2 = cap2;
hpriv->port_map = port_map;
+
+   if (!hpriv->start_engine)
+   hpriv->start_engine = ahci_start_engine;
 }
 EXPORT_SYMBOL_GPL(ahci_save_initial_config);
 
@@ -565,7 +569,7 @@ static int ahci_scr_write(struct ata_link *link, unsigned 
int sc_reg, u32 val)
return -EINVAL;
 }
 
-void ahci_start_engine(struct ata_port *ap)
+static void ahci_start_engine(struct ata_port *ap)
 {
void __iomem *port_mmio = ahci_port_base(ap);
u32 tmp;
@@ -576,7 +580,6 @@ void ahci_start_engine(struct ata_port *ap)
writel(tmp, port_mmio + PORT_CMD);
readl(port_mmio + PORT_CMD); /* flush */
 }
-EXPORT_SYMBOL_GPL(ahci_start_engine);
 
 int ahci_stop_engine(struct ata_port *ap)
 {
@@ -766,7 +769,7 @@ static void ahci_start_port(struct ata_port *ap)
 
/* enable DMA */
if (!(hpriv->flags & AHCI_HFLAG_DELAY_ENGINE))
-   ahci_start_engine(ap);
+   hpriv->start_engine(ap);
 
/* turn on LEDs */
if (ap->flags & ATA_FLAG_EM) {
@@ 

[linux-sunxi] [PATCH v6 00/18] ahci: library-ise ahci_platform, add sunxi driver and cleanup imx driver

2014-02-19 Thread Hans de Goede
Hi all,

Here is v6 of my patchset for adding ahci-sunxi support. This has been
tested with Allwinner A10, Allwinner A20 and Freeware imx6x SoCs, including
suspend / resume. Note that since my last revision the ahci_imx driver has
also grown imx53 sata support, it would be good if some-one could test that
with this series.

History:

v1, by Olliver Schinagl:
This was using the approach of having a platform device which probe method
creates a new child platform device which gets driven by ahci_platform.c,
as done by ahci_imx.c .

v2, by Hans de Goede:
Stand-alone platform driver based on Olliver's work

v3, by Hans de Goede:
patch-series, with 4 different parts
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr
   regulator
b) New ahci-sunxi code only populating ahci_platform_data, passed to
   ahci_platform.c to of_device_id matching.
c) Refactor ahci-imx code to work the same as the new ahci-sunxi code, this
   is the reason why v3 is an RFC, I'm waiting for the wandboard I ordered to
   arrive so that I can actually test this.
d) dts bindings for the sunxi ahci parts

v4, by Hans de Goede:
patch-series, with 5 different parts:
a) Make ahci_platform.c more generic, handle more then 1 clk, target pwr
   regulator
b) Turn parts of ahci_platform.c into a library for use by other drivers
c) New ahci-sunxi driver using the ahci_platform.c library functionality
d) Refactor ahci-imx code to work the same as the new ahci-sunxi code
e) dts bindings for the sunxi ahci parts

v5:
v4 + the following changes:
1) fsl,imx6q driver is now tested
2) fixed suspend / resume on fsl,imx6q
3) Modifed devicetree node naming to match dt spec
4) Reworked the busy waiting code in the sunxi-phy handling as suggested by
   Russell King

v6:
v5 rebased on top of 3.14-rc3 + the following changes
1) Added Roger Quadros' generic phy support series
2) Added a "ARM: sun4i: dt: Remove grouping + simple-bus for regulators" dts
   patch

Tejun, can you please add patches 1-15 to your ata tree for 3.15 ?

Maxime, can you please add patch 16-18 to your dts tree for 3.15 ?

Thanks & Regards,

Hans 

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[linux-sunxi] [PATCH v6 03/18] ahci-platform: Pass ahci_host_priv ptr to ahci_platform_data init method

2014-02-19 Thread Hans de Goede
Some ahci_platform_data->init methods need access to the ahci_host_priv data.

When calling ahci_platform_data->init the ata_host has not been allocated yet,
so access to ahci_host_priv through the dev argument is not possible.

Signed-off-by: Hans de Goede 
---
 arch/arm/mach-davinci/devices-da8xx.c |  5 +++--
 arch/arm/mach-spear/spear1340.c   |  2 +-
 drivers/ata/ahci_imx.c| 12 ++--
 drivers/ata/ahci_platform.c   |  2 +-
 include/linux/ahci_platform.h |  3 ++-
 5 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 0486cdf..c4e97da 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1061,7 +1062,7 @@ static unsigned long da850_sata_xtal[] = {
KHZ_TO_HZ(6),
 };
 
-static int da850_sata_init(struct device *dev, void __iomem *addr)
+static int da850_sata_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
int i, ret;
unsigned int val;
@@ -1096,7 +1097,7 @@ static int da850_sata_init(struct device *dev, void 
__iomem *addr)
SATA_PHY_TXSWING(3) |
SATA_PHY_ENPLL(1);
 
-   __raw_writel(val, addr + SATA_P0PHYCR_REG);
+   __raw_writel(val, hpriv->mmio + SATA_P0PHYCR_REG);
 
return 0;
 
diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c
index 3fb6834..9e2f3ac 100644
--- a/arch/arm/mach-spear/spear1340.c
+++ b/arch/arm/mach-spear/spear1340.c
@@ -77,7 +77,7 @@
SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
 
 /* SATA device registration */
-static int sata_miphy_init(struct device *dev, void __iomem *addr)
+static int sata_miphy_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
writel(SPEAR1340_SATA_CFG_VAL, SPEAR1340_PCIE_SATA_CFG);
writel(SPEAR1340_PCIE_SATA_MIPHY_CFG_SATA_25M_CRYSTAL_CLK,
diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
index dd4d6f7..ebfd1d6 100644
--- a/drivers/ata/ahci_imx.c
+++ b/drivers/ata/ahci_imx.c
@@ -168,7 +168,7 @@ static const struct ata_port_info ahci_imx_port_info = {
.port_ops   = &ahci_imx_ops,
 };
 
-static int imx_sata_init(struct device *dev, void __iomem *mmio)
+static int imx_sata_init(struct device *dev, struct ahci_host_priv *hpriv)
 {
int ret = 0;
unsigned int reg_val;
@@ -185,19 +185,19 @@ static int imx_sata_init(struct device *dev, void __iomem 
*mmio)
 * Implement the port0.
 * Get the ahb clock rate, and configure the TIMER1MS register.
 */
-   reg_val = readl(mmio + HOST_CAP);
+   reg_val = readl(hpriv->mmio + HOST_CAP);
if (!(reg_val & HOST_CAP_SSS)) {
reg_val |= HOST_CAP_SSS;
-   writel(reg_val, mmio + HOST_CAP);
+   writel(reg_val, hpriv->mmio + HOST_CAP);
}
-   reg_val = readl(mmio + HOST_PORTS_IMPL);
+   reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);
if (!(reg_val & 0x1)) {
reg_val |= 0x1;
-   writel(reg_val, mmio + HOST_PORTS_IMPL);
+   writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);
}
 
reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000;
-   writel(reg_val, mmio + HOST_TIMER1MS);
+   writel(reg_val, hpriv->mmio + HOST_TIMER1MS);
 
return 0;
 }
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 4b231ba..434ab89 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -149,7 +149,7 @@ static int ahci_probe(struct platform_device *pdev)
 * returned successfully.
 */
if (pdata && pdata->init) {
-   rc = pdata->init(dev, hpriv->mmio);
+   rc = pdata->init(dev, hpriv);
if (rc)
goto disable_unprepare_clk;
}
diff --git a/include/linux/ahci_platform.h b/include/linux/ahci_platform.h
index 73a2500..737fe38 100644
--- a/include/linux/ahci_platform.h
+++ b/include/linux/ahci_platform.h
@@ -19,9 +19,10 @@
 
 struct device;
 struct ata_port_info;
+struct ahci_host_priv;
 
 struct ahci_platform_data {
-   int (*init)(struct device *dev, void __iomem *addr);
+   int (*init)(struct device *dev, struct ahci_host_priv *hpriv);
void (*exit)(struct device *dev);
int (*suspend)(struct device *dev);
int (*resume)(struct device *dev);
-- 
1.8.5.3

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[linux-sunxi] [PATCH v6 02/18] libahci: Move ahci_host_priv declaration to include/linux/ahci.h

2014-02-19 Thread Hans de Goede
With the ahci-platform.c changes later in this patch-set, some
arch/arm/mach-foo/*.c sata drivers need access to ahci_host_priv, so move
its declaration outside of drivers/ata.

Signed-off-by: Hans de Goede 
---
 drivers/ata/ahci.h   | 20 +---
 include/linux/ahci.h | 46 ++
 2 files changed, 47 insertions(+), 19 deletions(-)
 create mode 100644 include/linux/ahci.h

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 2c04211..0f80129 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -35,7 +35,7 @@
 #ifndef _AHCI_H
 #define _AHCI_H
 
-#include 
+#include 
 #include 
 
 /* Enclosure Management Control */
@@ -309,24 +309,6 @@ struct ahci_port_priv {
char*irq_desc;  /* desc in /proc/interrupts */
 };
 
-struct ahci_host_priv {
-   void __iomem *  mmio;   /* bus-independent mem map */
-   unsigned intflags;  /* AHCI_HFLAG_* */
-   u32 cap;/* cap to use */
-   u32 cap2;   /* cap2 to use */
-   u32 port_map;   /* port map to use */
-   u32 saved_cap;  /* saved initial cap */
-   u32 saved_cap2; /* saved initial cap2 */
-   u32 saved_port_map; /* saved initial port_map */
-   u32 em_loc; /* enclosure management location */
-   u32 em_buf_sz;  /* EM buffer size in byte */
-   u32 em_msg_type;/* EM message type */
-   struct clk  *clk;   /* Only for platforms 
supporting clk */
-   void*plat_data; /* Other platform data */
-   /* Optional ahci_start_engine override */
-   void(*start_engine)(struct ata_port *ap);
-};
-
 extern int ahci_ignore_sss;
 
 extern struct device_attribute *ahci_shost_attrs[];
diff --git a/include/linux/ahci.h b/include/linux/ahci.h
new file mode 100644
index 000..3499d44
--- /dev/null
+++ b/include/linux/ahci.h
@@ -0,0 +1,46 @@
+/*
+ *  ahci.h - Common AHCI SATA definitions and declarations
+ *
+ *  Maintained by:  Tejun Heo 
+ *  Please ALWAYS copy linux-...@vger.kernel.org
+ *  on emails.
+ *
+ *  Copyright 2004-2005 Red Hat, Inc.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2, or (at your option)
+ *  any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ */
+
+#ifndef __LINUX_AHCI_H__
+#define __LINUX_AHCI_H__
+
+#include 
+
+struct ata_port;
+
+struct ahci_host_priv {
+   void __iomem*mmio;  /* bus-independent mem map */
+   unsigned intflags;  /* AHCI_HFLAG_* */
+   u32 cap;/* cap to use */
+   u32 cap2;   /* cap2 to use */
+   u32 port_map;   /* port map to use */
+   u32 saved_cap;  /* saved initial cap */
+   u32 saved_cap2; /* saved initial cap2 */
+   u32 saved_port_map; /* saved initial port_map */
+   u32 em_loc; /* enclosure management location */
+   u32 em_buf_sz;  /* EM buffer size in byte */
+   u32 em_msg_type;/* EM message type */
+   struct clk  *clk;   /* Optional */
+   void*plat_data; /* Other platform data */
+   /* Optional ahci_start_engine override */
+   void(*start_engine)(struct ata_port *ap);
+};
+
+#endif
-- 
1.8.5.3

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[linux-sunxi] Re: [PATCH v7 4/8] ARM: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs

2014-02-19 Thread Maxime Ripard
Hi Hans,

On Tue, Feb 18, 2014 at 09:49:21PM +0100, Hans de Goede wrote:
> Hi,
> 
> On 02/18/2014 04:37 PM, Maxime Ripard wrote:
> 
> 
> 
> >>+
> >>+   for (i = 0; i < data->sg_len; i++) {
> >>+   pdes[i].config = SDXC_IDMAC_DES0_CH | SDXC_IDMAC_DES0_OWN |
> >>+SDXC_IDMAC_DES0_DIC;
> >>+
> >>+   if (data->sg[i].length == max_len)
> >>+   pdes[i].buf_size = 0; /* 0 == max_len */
> >>+   else
> >>+   pdes[i].buf_size = data->sg[i].length;
> >>+
> >>+   pdes[i].buf_addr_ptr1 = sg_dma_address(&data->sg[i]);
> >>+   pdes[i].buf_addr_ptr2 = (u32)&pdes_pa[i + 1];
> >>+   }
> >>+
> >>+   pdes[0].config |= SDXC_IDMAC_DES0_FD;
> >>+   pdes[i - 1].config = SDXC_IDMAC_DES0_OWN | SDXC_IDMAC_DES0_LD;
> >>+
> >>+   wmb(); /* Ensure idma_des hit main mem before we start the idmac */
> >
> >wmb ensure the proper ordering of the instructions, not flushing the
> >caches like what your comment implies.
> 
> Since I put that comment there, allow me to explain. A modern ARM
> cpu core has 2 or more units handling stores. One for regular
> memory stores, and one for io-mem stores. Regular mem stores can
> be re-ordered, io stores cannot. Normally there is no "syncing"
> between the 2 store units. Cache flushing is not an issue here
> since the memory holding the descriptors for the idma controller
> is allocated cache coherent, which on arm means it is not cached.
> 
> What is an issue here is the io-store starting the idmac hitting
> the io-mem before the descriptors hit the main-mem, the wmb()
> ensures this does not happen.

To expand a bit, my point was not that it was functionnally
wrong. Since you put a barrier in there, and that it resides in a
cache coherent section, we're fine.

My point was that the comment itself was misleading.

> >>+static int sunxi_mmc_prepare_dma(struct sunxi_mmc_host *smc_host,
> >>+struct mmc_data *data)
> >>+{
> >>+   u32 dma_len;
> >>+   u32 i;
> >>+   u32 temp;
> >>+   struct scatterlist *sg;
> >>+
> >>+   dma_len = dma_map_sg(mmc_dev(smc_host->mmc), data->sg, data->sg_len,
> >>+sunxi_mmc_get_dma_dir(data));
> >>+   if (dma_len == 0) {
> >>+   dev_err(mmc_dev(smc_host->mmc), "dma_map_sg failed\n");
> >>+   return -ENOMEM;
> >>+   }
> >>+
> >>+   for_each_sg(data->sg, sg, data->sg_len, i) {
> >>+   if (sg->offset & 3 || sg->length & 3) {
> >>+   dev_err(mmc_dev(smc_host->mmc),
> >>+   "unaligned scatterlist: os %x length %d\n",
> >>+   sg->offset, sg->length);
> >>+   return -EINVAL;
> >>+   }
> >>+   }
> >>+
> >>+   sunxi_mmc_init_idma_des(smc_host, data);
> >>+
> >>+   temp = mci_readl(smc_host, REG_GCTRL);
> >>+   temp |= SDXC_DMA_ENABLE_BIT;
> >>+   mci_writel(smc_host, REG_GCTRL, temp);
> >>+   temp |= SDXC_DMA_RESET;
> >>+   mci_writel(smc_host, REG_GCTRL, temp);
> >
> >Does it really need to be done in two steps?
> 
> We don't know, so this is probably best left as is.

Ok.

> >
> >(Newline)
> >
> >>+   mci_writel(smc_host, REG_DMAC, SDXC_IDMAC_SOFT_RESET);
> >>+
> >>+   if (!(data->flags & MMC_DATA_WRITE))
> >>+   mci_writel(smc_host, REG_IDIE, SDXC_IDMAC_RECEIVE_INTERRUPT);
> >>+
> >>+   mci_writel(smc_host, REG_DMAC, SDXC_IDMAC_FIX_BURST | 
> >>SDXC_IDMAC_IDMA_ON);
> >>+
> >>+   return 0;
> >>+}
> >>+
> >>+static void sunxi_mmc_send_manual_stop(struct sunxi_mmc_host *host,
> >>+  struct mmc_request *req)
> >>+{
> >>+   u32 cmd_val = SDXC_START | SDXC_RESP_EXPIRE | SDXC_STOP_ABORT_CMD
> >>+   | SDXC_CHECK_RESPONSE_CRC | MMC_STOP_TRANSMISSION;
> >>+   u32 ri = 0;
> >>+   unsigned long expire = jiffies + msecs_to_jiffies(1000);
> >>+
> >>+   mci_writel(host, REG_CARG, 0);
> >>+   mci_writel(host, REG_CMDR, cmd_val);
> >>+
> >>+   do {
> >>+   ri = mci_readl(host, REG_RINTR);
> >>+   } while (!(ri & (SDXC_COMMAND_DONE | SDXC_INTERRUPT_ERROR_BIT)) &&
> >>+time_before(jiffies, expire));
> >>+
> >>+   if (ri & SDXC_INTERRUPT_ERROR_BIT) {
> >>+   dev_err(mmc_dev(host->mmc), "send stop command failed\n");
> >>+   if (req->stop)
> >>+   req->stop->resp[0] = -ETIMEDOUT;
> >>+   } else {
> >>+   if (req->stop)
> >>+   req->stop->resp[0] = mci_readl(host, REG_RESP0);
> >>+   }
> >>+
> >>+   mci_writel(host, REG_RINTR, 0x);
> >>+}
> >>+
> >>+static void sunxi_mmc_dump_errinfo(struct sunxi_mmc_host *smc_host)
> >>+{
> >>+   struct mmc_command *cmd = smc_host->mrq->cmd;
> >>+   struct mmc_data *data = smc_host->mrq->data;
> >>+
> >>+   /* For some cmds timeout is normal with sd/mmc cards */
> >>+   if ((smc_host->int_sum & SDXC_INTERRUPT_ERROR_BIT) == SDXC_RESP_TIMEOUT 
> >>&&
> >>+   (cmd->opcode == SD_IO_SEND_OP_COND || cmd->opcode == 
> >>SD_IO_RW_DIRECT))
> >>+   return;
> >>+
>