Re: [linux-sunxi] Getting Linux
What operating system do you have on your PC? The other partition is in the format of ext3/ext4. On Sun, Aug 10, 2014 at 1:15 AM, wrote: > Hi, > > I recently bought a Jesurun A19 Android media player that is based on the > Allwinner A20 SOC. > > I would like to run either Linux or the stock android ROM from an SD card. > However, I'm struggling to make progress. > > Here's what I've done so far: > > I tried various SD Card bootable Linux distributions build for the > Cubieboard. I eventually found one (Cubieez) that (mostly) works with the > Jesurun A19. However, networking (both wired and wireless) doesn't work. > > I did however, manage to extract the stock android image from the internal > NAND chip by running dd on the Linux command line. > > I then tried flashing the image to an SD card. When I put the SD card in a > PC, it recognises and mounts the first partition (which appears to be in > FAT format). This has enabled me to access various boot files including > script.bin. > > Unfortunately, I cannot access any of the other partitions. As far as I > can tell, the image doesn't have a standard partition table. > > I tried replacing the cubieez script.bin with the script.bin file that I > extracted from the stock Android image. However, networking still isn't > working. > > I'm rapidly running out of ideas. Can anyone help? > > Thanks, > > Jason > > -- > You received this message because you are subscribed to the Google Groups > "linux-sunxi" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to linux-sunxi+unsubscr...@googlegroups.com. > For more options, visit https://groups.google.com/d/optout. > -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Re: Running Linux on a Jesurun A19 Android media player
On Sat, Aug 09, 2014 at 12:38:08PM -0700, Jason wrote: > Yes I did read the wiki. It's how I found this google group. > > None of the devices listed is the same as mine. > > I'm happy to upload any files and/or info somewhere if it will help. > However, it wasn't clear from the wiki how to do that. Try reading that sentence on the wiki _again_. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Move meminfo into sunxi-tools
This patchset moves the a10-meminfo tool from https://github.com/maxnet/a10-meminfo into our own tools repository, as the sunxi-tools repository is the natural place for this utility. All patches are as they appear in the original repo, but are limited to only the C file. Author and date info was kept as is. In a final commit, the tool was renamed to meminfo, a static build line was added to the Makefile. The resulting binary has been verified on an ubuntu and on android. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 1/6] meminfo: Initial upload
From: Floris Bos
---
a10-meminfo.c | 262 +
1 files changed, 262 insertions(+), 0 deletions(-)
create mode 100644 a10-meminfo.c
diff --git a/a10-meminfo.c b/a10-meminfo.c
new file mode 100644
index 000..ebd43ac
--- /dev/null
+++ b/a10-meminfo.c
@@ -0,0 +1,262 @@
+/*
+ * A10-meminfo
+ * Dumps DRAM controller settings
+ *
+ * Author: Floris Bos
+ * License: GPL
+ *
+ * Compile with: gcc -static -o a10-meminfo-static a10-meminfo.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SUNXI_DRAMC_BASE0x01c01000
+#define SUNXI_CCM_BASE 0x01C2
+
+typedef uint32_t u32;
+typedef uint8_t u8;
+
+/*
+ * Memory header definition copied from u-boot
arch/arm/include/asm/arch-sunxi/dram.h
+ * (C) Copyright 2007-2012 Allwinner Technology Co., Ltd.
)
+ */
+struct sunxi_dram_reg {
+ u32 ccr;/* 0x00 controller configuration register */
+ u32 dcr;/* 0x04 dram configuration register */
+ u32 iocr; /* 0x08 i/o configuration register */
+ u32 csr;/* 0x0c controller status register */
+ u32 drr;/* 0x10 dram refresh register */
+ u32 tpr0; /* 0x14 dram timing parameters register 0 */
+ u32 tpr1; /* 0x18 dram timing parameters register 1 */
+ u32 tpr2; /* 0x1c dram timing parameters register 2 */
+ u32 gdllcr; /* 0x20 global dll control register */
+ u8 res0[0x28];
+ u32 rslr0; /* 0x4c rank system latency register */
+ u32 rslr1; /* 0x50 rank system latency register */
+ u8 res1[0x8];
+ u32 rdgr0; /* 0x5c rank dqs gating register */
+ u32 rdgr1; /* 0x60 rank dqs gating register */
+ u8 res2[0x34];
+ u32 odtcr; /* 0x98 odt configuration register */
+ u32 dtr0; /* 0x9c data training register 0 */
+ u32 dtr1; /* 0xa0 data training register 1 */
+ u32 dtar; /* 0xa4 data training address register */
+ u32 zqcr0; /* 0xa8 zq control register 0 */
+ u32 zqcr1; /* 0xac zq control register 1 */
+ u32 zqsr; /* 0xb0 zq status register */
+ u32 idcr; /* 0xb4 initializaton delay configure reg */
+ u8 res3[0x138];
+ u32 mr; /* 0x1f0 mode register */
+ u32 emr;/* 0x1f4 extended mode register */
+ u32 emr2; /* 0x1f8 extended mode register */
+ u32 emr3; /* 0x1fc extended mode register */
+ u32 dllctr; /* 0x200 dll control register */
+ u32 dllcr[5]; /* 0x204 dll control register 0(byte 0) */
+ /* 0x208 dll control register 1(byte 1) */
+ /* 0x20c dll control register 2(byte 2) */
+ /* 0x210 dll control register 3(byte 3) */
+ /* 0x214 dll control register 4(byte 4) */
+ u32 dqtr0; /* 0x218 dq timing register */
+ u32 dqtr1; /* 0x21c dq timing register */
+ u32 dqtr2; /* 0x220 dq timing register */
+ u32 dqtr3; /* 0x224 dq timing register */
+ u32 dqstr; /* 0x228 dqs timing register */
+ u32 dqsbtr; /* 0x22c dqsb timing register */
+ u32 mcr;/* 0x230 mode configure register */
+ u8 res[0x8];
+ u32 reg_23c;/* 0x23c register description unknown!!! */
+ u32 apr;/* 0x240 arbiter period register */
+ u32 pldtr; /* 0x244 priority level data threshold reg */
+ u8 res5[0x8];
+ u32 hpcr[32]; /* 0x250 host port configure register */
+ u8 res6[0x10];
+ u32 csel; /* 0x2e0 controller select register */
+};
+
+struct dram_para {
+ u32 baseaddr;
+ u32 clock;
+ u32 type;
+ u32 rank_num;
+ u32 density;
+ u32 io_width;
+ u32 bus_width;
+ u32 cas;
+ u32 zq;
+ u32 odt_en;
+ u32 size;
+ u32 tpr0;
+ u32 tpr1;
+ u32 tpr2;
+ u32 tpr3;
+ u32 tpr4;
+ u32 tpr5;
+ u32 emr1;
+ u32 emr2;
+ u32 emr3;
+};
+
+/* Clock control header copied from include/asm/arch-sunxi/clock.h */
+struct sunxi_ccm_reg {
+ u32 pll1_cfg; /* 0x00 pll1 control */
+ u32 pll1_tun; /* 0x04 pll1 tuning */
+ u32 pll2_cfg; /* 0x08 pll2 control */
+ u32 pll2_tun; /* 0x0c pll2 tuning */
+ u32 pll3_cfg; /* 0x10 pll3 control */
+ u8 res0[0x4];
+ u32 pll4_cfg; /* 0x18 pll4 control */
+ u8 res1[0x4];
+ u32 pll5_cfg; /* 0x20 pll5 control */
+ u32 pll5_tun; /* 0x24 pll5 tuning */
+ u32 pll6_cfg;
[linux-sunxi] [PATCH 4/6] meminfo: fix 'dram_tpr3' reporting
From: Siarhei Siamashka Get it from the dllcr registers instead of always returning 0. --- a10-meminfo.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/a10-meminfo.c b/a10-meminfo.c index 2c815af..b4dc2d4 100644 --- a/a10-meminfo.c +++ b/a10-meminfo.c @@ -229,6 +229,11 @@ int main(int argc, char **argv) p.tpr0 = r->tpr0; p.tpr1 = r->tpr1; p.tpr2 = r->tpr2; +p.tpr3 = r->dllcr[0]) >> 6) & 0x3f) << 16) | + r->dllcr[1]) >> 14) & 0xf) << 0) | + r->dllcr[2]) >> 14) & 0xf) << 4) | + r->dllcr[3]) >> 14) & 0xf) << 8) | + r->dllcr[4]) >> 14) & 0xf) << 12); p.emr1 = r->emr; p.emr2 = r->emr2; p.emr3 = r->emr3; -- 1.7.7 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 2/6] meminfo: do not assume Memory is always 24MHz * X
From: Oliver Schinagl
DDR runs from the PLL5 and has several option to be configured, just as
factor N, M, P and K. This patch probes all those registers to determine
the clock.
---
a10-meminfo.c | 25 +++--
1 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/a10-meminfo.c b/a10-meminfo.c
index ebd43ac..8fdf19d 100644
--- a/a10-meminfo.c
+++ b/a10-meminfo.c
@@ -23,6 +23,16 @@
#define SUNXI_DRAMC_BASE0x01c01000
#define SUNXI_CCM_BASE 0x01C2
+#define CCM_PLL5_FACTOR_M0
+#define CCM_PLL5_FACTOR_K4
+#define CCM_PLL5_FACTOR_N8
+#define CCM_PLL5_FACTOR_P 16
+
+#define CCM_PLL5_FACTOR_M_SIZE 0x03
+#define CCM_PLL5_FACTOR_K_SIZE 0x03
+#define CCM_PLL5_FACTOR_N_SIZE 0x1f
+#define CCM_PLL5_FACTOR_P_SIZE 0x03
+
typedef uint32_t u32;
typedef uint8_t u8;
@@ -232,8 +242,19 @@ int main(int argc, char **argv)
p.rank_num = (r->dcr >> 10 & 3)+1;
p.io_width = (r->dcr >> 1 & 3) << 3;
p.bus_width = ((r->dcr >> 6 & 3)+1) << 3;
-p.clock = (ccm->pll5_cfg >> 8 & 0x1f) * 24;
-
+/*
+ * The clock for DDR is calculated as:
+ * (24 MHz * N * K) / M
+ * PLL5 has a second output port isn't interesting for memory info,
+ * but is calculated as:
+ * (24 MHz * N * K) / P
+ */
+ p.clock = (24 *
+ ((ccm->pll5_cfg >> CCM_PLL5_FACTOR_N) & CCM_PLL5_FACTOR_N_SIZE) *
+ ((ccm->pll5_cfg >> CCM_PLL5_FACTOR_K) & CCM_PLL5_FACTOR_K_SIZE) /
+ ((ccm->pll5_cfg >> CCM_PLL5_FACTOR_M) & CCM_PLL5_FACTOR_M_SIZE)
+);
+
/* Print dram_para struct */
printf("dram_clk = %d\n", p.clock);
printf("dram_type = %d\n", p.type);
--
1.7.7
--
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[linux-sunxi] [PATCH 3/6] meminfo: swap PLL1 TUN2 register to proper location
From: Oliver Schinagl
PLL1_tun2 had a wrong comment (0x34) in the original and was swapped to
accomidate this position. Actually the comment was wrong and the
location right, so this patch puts pll1_tun2 to 0x38.
0x34 is now reserved.
---
a10-meminfo.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/a10-meminfo.c b/a10-meminfo.c
index 8fdf19d..2c815af 100644
--- a/a10-meminfo.c
+++ b/a10-meminfo.c
@@ -131,8 +131,8 @@ struct sunxi_ccm_reg {
u32 pll6_cfg; /* 0x28 pll6 control */
u32 pll6_tun; /* 0x2c pll6 tuning */
u32 pll7_cfg; /* 0x30 pll7 control */
- u32 pll1_tun2; /* 0x34 pll5 tuning2 */
u8 res2[0x4];
+ u32 pll1_tun2; /* 0x38 pll5 tuning2 */
u32 pll5_tun2; /* 0x3c pll5 tuning2 */
u8 res3[0xc];
u32 pll_lock_dbg; /* 0x4c pll lock time debug */
--
1.7.7
--
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[linux-sunxi] [PATCH 6/6] meminfo: rename and add to build
* rename a10-meminfo to meminfo
* add static build to Makefile
* fix operand warning
* built binary verified on proper linux and android
Signed-off-by: Luc Verhaegen
---
.gitignore|1 +
Makefile |3 +
README|6 +
a10-meminfo.c | 288 -
meminfo.c | 288 +
5 files changed, 298 insertions(+), 288 deletions(-)
delete mode 100644 a10-meminfo.c
create mode 100644 meminfo.c
diff --git a/.gitignore b/.gitignore
index 22df838..490a572 100644
--- a/.gitignore
+++ b/.gitignore
@@ -5,5 +5,6 @@ bootinfo
fel
pio
nand-part
+meminfo
*.o
*.swp
diff --git a/Makefile b/Makefile
index f58bced..922da8f 100644
--- a/Makefile
+++ b/Makefile
@@ -111,6 +111,9 @@ boot_head_sun5i.bin: boot_head_sun5i.elf
bootinfo: bootinfo.c
+meminfo: meminfo.c
+ $(CROSS_COMPILE)gcc -g -O0 -Wall -static -o $@ $^
+
.gitignore: Makefile
@for x in $(TOOLS) '*.o' '*.swp'; do \
echo "$$x"; \
diff --git a/README b/README
index 506930f..e71933f 100644
--- a/README
+++ b/README
@@ -60,5 +60,11 @@ phoenix_info:
phoenixcard utility and optionally extracts the embedded boot
code & firmware file from their hidden partitions.
+meminfo:
+ Tool for reading DRAM settings from registers. Compiled as a
+ static binary for use on android and other OSes. To build this,
+ get a toolchain, and run:
+ make CROSS_COMPILE=arm-linux-gnueabihf- meminfo
+
This software is licensed under the terms of GPLv2+ as defined by the
Free Software Foundation, details can be read in the COPYING file.
diff --git a/a10-meminfo.c b/a10-meminfo.c
deleted file mode 100644
index 9814783..000
--- a/a10-meminfo.c
+++ /dev/null
@@ -1,288 +0,0 @@
-/*
- * A10-meminfo
- * Dumps DRAM controller settings
- *
- * Author: Floris Bos
- * License: GPL
- *
- * Compile with: gcc -static -o a10-meminfo-static a10-meminfo.c
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#define SUNXI_DRAMC_BASE0x01c01000
-#define SUNXI_CCM_BASE 0x01C2
-
-#define CCM_PLL5_FACTOR_M0
-#define CCM_PLL5_FACTOR_K4
-#define CCM_PLL5_FACTOR_N8
-#define CCM_PLL5_FACTOR_P 16
-
-#define CCM_PLL5_FACTOR_M_SIZE 0x03
-#define CCM_PLL5_FACTOR_K_SIZE 0x03
-#define CCM_PLL5_FACTOR_N_SIZE 0x1f
-#define CCM_PLL5_FACTOR_P_SIZE 0x03
-
-typedef uint32_t u32;
-typedef uint8_t u8;
-
-/*
- * Memory header definition copied from u-boot
arch/arm/include/asm/arch-sunxi/dram.h
- * (C) Copyright 2007-2012 Allwinner Technology Co., Ltd.
)
- */
-struct sunxi_dram_reg {
- u32 ccr;/* 0x00 controller configuration register */
- u32 dcr;/* 0x04 dram configuration register */
- u32 iocr; /* 0x08 i/o configuration register */
- u32 csr;/* 0x0c controller status register */
- u32 drr;/* 0x10 dram refresh register */
- u32 tpr0; /* 0x14 dram timing parameters register 0 */
- u32 tpr1; /* 0x18 dram timing parameters register 1 */
- u32 tpr2; /* 0x1c dram timing parameters register 2 */
- u32 gdllcr; /* 0x20 global dll control register */
- u8 res0[0x28];
- u32 rslr0; /* 0x4c rank system latency register */
- u32 rslr1; /* 0x50 rank system latency register */
- u8 res1[0x8];
- u32 rdgr0; /* 0x5c rank dqs gating register */
- u32 rdgr1; /* 0x60 rank dqs gating register */
- u8 res2[0x34];
- u32 odtcr; /* 0x98 odt configuration register */
- u32 dtr0; /* 0x9c data training register 0 */
- u32 dtr1; /* 0xa0 data training register 1 */
- u32 dtar; /* 0xa4 data training address register */
- u32 zqcr0; /* 0xa8 zq control register 0 */
- u32 zqcr1; /* 0xac zq control register 1 */
- u32 zqsr; /* 0xb0 zq status register */
- u32 idcr; /* 0xb4 initializaton delay configure reg */
- u8 res3[0x138];
- u32 mr; /* 0x1f0 mode register */
- u32 emr;/* 0x1f4 extended mode register */
- u32 emr2; /* 0x1f8 extended mode register */
- u32 emr3; /* 0x1fc extended mode register */
- u32 dllctr; /* 0x200 dll control register */
- u32 dllcr[5]; /* 0x204 dll control register 0(byte 0) */
- /* 0x208 dll control register 1(byte 1) */
- /* 0x20c dll control register 2(byte 2) */
- /* 0x210 dll control register 3(byte 3) */
- /* 0x214 dll control register 4(byte 4) */
- u32 dqtr0; /* 0x218 dq timing register */
- u32 dqtr1; /* 0x21c d
[linux-sunxi] [PATCH 5/6] meminfo: fix 'dram_clk' reporting for frequencies that are not multiples of 24
From: Siarhei Siamashka The K and M factors encode values 1-4 in two bits (starting from 1 and not 0). The typical DRAM clock frequency setup uses K=2 and M=2, which means that both of them are read as 1 from the bit fields. That's why a10-meminfo used to work in most cases (1/1 is the same as 2/2). However a10-meminfo happens to report wrong 'dram_clk' if the other values of K and M are selected. This patch fixes it. --- a10-meminfo.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/a10-meminfo.c b/a10-meminfo.c index b4dc2d4..9814783 100644 --- a/a10-meminfo.c +++ b/a10-meminfo.c @@ -256,8 +256,8 @@ int main(int argc, char **argv) */ p.clock = (24 * ((ccm->pll5_cfg >> CCM_PLL5_FACTOR_N) & CCM_PLL5_FACTOR_N_SIZE) * - ((ccm->pll5_cfg >> CCM_PLL5_FACTOR_K) & CCM_PLL5_FACTOR_K_SIZE) / - ((ccm->pll5_cfg >> CCM_PLL5_FACTOR_M) & CCM_PLL5_FACTOR_M_SIZE) + (((ccm->pll5_cfg >> CCM_PLL5_FACTOR_K) & CCM_PLL5_FACTOR_K_SIZE) + 1) / + (((ccm->pll5_cfg >> CCM_PLL5_FACTOR_M) & CCM_PLL5_FACTOR_M_SIZE) + 1) ); /* Print dram_para struct */ -- 1.7.7 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Move meminfo into sunxi-tools
On Sun, Aug 10, 2014 at 03:38:59PM +0200, Luc Verhaegen wrote: > > All patches are as they appear in the original repo, but are limited to > only the C file. Author and date info was kept as is. To keep the dates of the original commits, i will, after review, push this code directly. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 6/6] meminfo: rename and add to build
* rename a10-meminfo to meminfo * add static build to Makefile * fix operand warning * built binary verified on proper linux and android Signed-off-by: Luc Verhaegen --- .gitignore |1 + Makefile |3 +++ README |6 ++ a10-meminfo.c => meminfo.c |2 +- 4 files changed, 11 insertions(+), 1 deletions(-) rename a10-meminfo.c => meminfo.c (99%) diff --git a/.gitignore b/.gitignore index 22df838..490a572 100644 --- a/.gitignore +++ b/.gitignore @@ -5,5 +5,6 @@ bootinfo fel pio nand-part +meminfo *.o *.swp diff --git a/Makefile b/Makefile index f58bced..922da8f 100644 --- a/Makefile +++ b/Makefile @@ -111,6 +111,9 @@ boot_head_sun5i.bin: boot_head_sun5i.elf bootinfo: bootinfo.c +meminfo: meminfo.c + $(CROSS_COMPILE)gcc -g -O0 -Wall -static -o $@ $^ + .gitignore: Makefile @for x in $(TOOLS) '*.o' '*.swp'; do \ echo "$$x"; \ diff --git a/README b/README index 506930f..e71933f 100644 --- a/README +++ b/README @@ -60,5 +60,11 @@ phoenix_info: phoenixcard utility and optionally extracts the embedded boot code & firmware file from their hidden partitions. +meminfo: + Tool for reading DRAM settings from registers. Compiled as a + static binary for use on android and other OSes. To build this, + get a toolchain, and run: + make CROSS_COMPILE=arm-linux-gnueabihf- meminfo + This software is licensed under the terms of GPLv2+ as defined by the Free Software Foundation, details can be read in the COPYING file. diff --git a/a10-meminfo.c b/meminfo.c similarity index 99% rename from a10-meminfo.c rename to meminfo.c index 9814783..4455bc0 100644 --- a/a10-meminfo.c +++ b/meminfo.c @@ -243,7 +243,7 @@ int main(int argc, char **argv) p.cas= (r->mr >> 4 & 15); if (p.type == 3) p.cas += 4; -p.density = 1 << 8+(r->dcr >> 3 & 7); +p.density = (1 << 8) + (r->dcr >> 3 & 7); p.rank_num = (r->dcr >> 10 & 3)+1; p.io_width = (r->dcr >> 1 & 3) << 3; p.bus_width = ((r->dcr >> 6 & 3)+1) << 3; -- 1.7.7 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH] sunxi: ICOU Fatty I support
Signed-off-by: Paul Kocialkowski
---
board/sunxi/Makefile|1 +
board/sunxi/dram_icou_fatty_i.c | 31 +++
boards.cfg |1 +
3 files changed, 33 insertions(+)
create mode 100644 board/sunxi/dram_icou_fatty_i.c
diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
index ef767e8..07042da 100644
--- a/board/sunxi/Makefile
+++ b/board/sunxi/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_HCORE_HC860) += dram_sun4i_384_1024_iow16.o
obj-$(CONFIG_HYUNDAI_A7) += dram_sun4i_360_512.o
obj-$(CONFIG_A7HD) += dram_sun4i_360_1024_iow8.o
obj-$(CONFIG_I12_TVBOX)+= dram_sun7i_384_1024_iow16.o
+obj-$(CONFIG_ICOU_FATTY_I) += dram_icou_fatty_i.o
obj-$(CONFIG_INTERRA3) += dram_mk802ii_a20.o
obj-$(CONFIG_INET_86VZ) += dram_a10s_olinuxino_m.o
obj-$(CONFIG_INET97F_II) += dram_sun4i_408_512.o
diff --git a/board/sunxi/dram_icou_fatty_i.c b/board/sunxi/dram_icou_fatty_i.c
new file mode 100644
index 000..b06ebc2
--- /dev/null
+++ b/board/sunxi/dram_icou_fatty_i.c
@@ -0,0 +1,31 @@
+/* this file is generated, don't edit it yourself */
+
+#include "common.h"
+#include
+
+static struct dram_para dram_para = {
+ .clock = 384,
+ .type = 3,
+ .rank_num = 1,
+ .density = 4096,
+ .io_width = 16,
+ .bus_width = 32,
+ .cas = 9,
+ .zq = 0x7f,
+ .odt_en = 0,
+ .size = 1024,
+ .tpr0 = 0x42d899b7,
+ .tpr1 = 0xa090,
+ .tpr2 = 0x22a00,
+ .tpr3 = 0,
+ .tpr4 = 1,
+ .tpr5 = 0,
+ .emr1 = 0x4,
+ .emr2 = 0x10,
+ .emr3 = 0,
+};
+
+unsigned long sunxi_dram_init(void)
+{
+ return dramc_init(&dram_para);
+}
diff --git a/boards.cfg b/boards.cfg
index 24d44c2..0e4a385 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -418,6 +418,7 @@ Active arm armv7 sunxi -
sunxi
Active arm armv7 sunxi - sunxi
Hyundai_A7 sun4i:HYUNDAI_A7,SPL
-
Active arm armv7 sunxi - sunxi
Hyundai_A7HD sun4i:A7HD,SPL
-
Active arm armv7 sunxi - sunxi
i12-tvbox
sun7i:I12_TVBOX,SPL,FAST_MBUS,STATUSLED=244
-
+Active arm armv7 sunxi - sunxi
ICOU_Fatty_I sun7i:ICOU_FATTY_I,SPL
-
Active arm armv7 sunxi - sunxi
Interra-3
sun7i:INTERRA3,SPL,SUNXI_GMAC,FAST_MBUS,MMC_SUNXI_SLOT=2
-
Active arm armv7 sunxi - sunxi
INet_86VZsun5i:INET_86VZ,SPL
-
Active arm armv7 sunxi - sunxi
INet_86VZ_FELsun5i:INET_86VZ,SPL_FEL,UART0_PORT_F
-
--
1.7.9.5
--
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[linux-sunxi] [PATCH] a20: ICOU Fatty I support
Signed-off-by: Paul Kocialkowski --- sys_config/a20/icou_fatty_i.fex | 983 +++ 1 file changed, 983 insertions(+) create mode 100644 sys_config/a20/icou_fatty_i.fex diff --git a/sys_config/a20/icou_fatty_i.fex b/sys_config/a20/icou_fatty_i.fex new file mode 100644 index 000..8e32711 --- /dev/null +++ b/sys_config/a20/icou_fatty_i.fex @@ -0,0 +1,983 @@ +[product] +version = "100" +machine = "s785-v10" + +[platform] +eraseflag = 1 + +[target] +boot_clock = 912 +dcdc2_vol = 1400 +dcdc3_vol = 1250 +ldo2_vol = 3000 +ldo3_vol = 2800 +ldo4_vol = 2800 +power_start = 0 +storage_type = 0 + +[clock] +pll3 = 297 +pll4 = 300 +pll6 = 600 +pll7 = 297 +pll8 = 336 + +[card_boot] +logical_start = 40960 +sprite_gpio0 = + +[card0_boot_para] +card_ctrl = 0 +card_high_speed = 1 +card_line = 4 +sdc_d1 = port:PF00<2><1> +sdc_d0 = port:PF01<2><1> +sdc_clk = port:PF02<2><1> +sdc_cmd = port:PF03<2><1> +sdc_d3 = port:PF04<2><1> +sdc_d2 = port:PF05<2><1> + +[card2_boot_para] +card_ctrl = 2 +card_high_speed = 1 +card_line = 4 +sdc_cmd = port:PC06<3><1> +sdc_clk = port:PC07<3><1> +sdc_d0 = port:PC08<3><1> +sdc_d1 = port:PC09<3><1> +sdc_d2 = port:PC10<3><1> +sdc_d3 = port:PC11<3><1> + +[twi_para] +twi_port = 0 +twi_scl = port:PB00<2> +twi_sda = port:PB01<2> + +[uart_para] +uart_debug_port = 0 +uart_debug_tx = port:PB22<2><1> +uart_debug_rx = port:PB23<2><1> + +[uart_force_debug] +uart_debug_port = 0 +uart_debug_tx = port:PF02<4><1> +uart_debug_rx = port:PF04<4><1> + +[jtag_para] +jtag_enable = 1 +jtag_ms = port:PB14<3> +jtag_ck = port:PB15<3> +jtag_do = port:PB16<3> +jtag_di = port:PB17<3> + +[pm_para] +standby_mode = 1 + +[dram_para] +dram_baseaddr = 0x4000 +dram_clk = 384 +dram_type = 3 +dram_rank_num = 1 +dram_chip_density = 4096 +dram_io_width = 16 +dram_bus_width = 32 +dram_cas = 9 +dram_zq = 0x7f +dram_odt_en = 0 +dram_size = 1024 +dram_tpr0 = 0x42d899b7 +dram_tpr1 = 0xa090 +dram_tpr2 = 0x22a00 +dram_tpr3 = 0x0 +dram_tpr4 = 0x1 +dram_tpr5 = 0x0 +dram_emr1 = 0x4 +dram_emr2 = 0x10 +dram_emr3 = 0x0 + +[mali_para] +mali_used = 1 +mali_clkdiv = 1 + +[emac_para] +emac_used = 0 +emac_rxd3 = port:PA00<2> +emac_rxd2 = port:PA01<2> +emac_rxd1 = port:PA02<2> +emac_rxd0 = port:PA03<2> +emac_txd3 = port:PA04<2> +emac_txd2 = port:PA05<2> +emac_txd1 = port:PA06<2> +emac_txd0 = port:PA07<2> +emac_rxclk = port:PA08<2> +emac_rxerr = port:PA09<2> +emac_rxdV = port:PA10<2> +emac_mdc = port:PA11<2> +emac_mdio = port:PA12<2> +emac_txen = port:PA13<2> +emac_txclk = port:PA14<2> +emac_crs = port:PA15<2> +emac_col = port:PA16<2> +emac_reset = port:PA17<1> + +[twi0_para] +twi0_used = 1 +twi0_scl = port:PB00<2> +twi0_sda = port:PB01<2> + +[twi1_para] +twi1_used = 1 +twi1_scl = port:PB18<2> +twi1_sda = port:PB19<2> + +[twi2_para] +twi2_used = 1 +twi2_scl = port:PB20<2> +twi2_sda = port:PB21<2> + +[uart_para0] +uart_used = 1 +uart_port = 0 +uart_type = 2 +uart_tx = port:PB22<2><1> +uart_rx = port:PB23<2><1> + +[uart_para1] +uart_used = 0 +uart_port = 1 +uart_type = 8 +uart_tx = port:PA10<4><1> +uart_rx = port:PA11<4><1> +uart_rts = port:PA12<4><1> +uart_cts = port:PA13<4><1> +uart_dtr = port:PA14<4><1> +uart_dsr = port:PA15<4><1> +uart_dcd = port:PA16<4><1> +uart_ring = port:PA17<4><1> + +[uart_para2] +uart_used = 0 +uart_port = 2 +uart_type = 4 +uart_tx = port:PI18<3><1> +uart_rx = port:PI19<3><1> +uart_rts = port:PI16<3><1> +uart_cts = port:PI17<3><1> + +[uart_para3] +uart_used = 0 +uart_port = 3 +uart_type = 4 +uart_tx = port:PH00<4><1> +uart_rx = port:PH01<4><1> +uart_rts = port:PH02<4><1> +uart_cts = port:PH03<4><1> + +[uart_para4] +uart_used = 0 +uart_port = 4 +uart_type = 2 +uart_tx = port:PH04<4><1> +uart_rx = port:PH05<4><1> + +[uart_para5] +uart_used = 0 +uart_port = 5 +uart_type = 2 +uart_tx = port:PH06<4><1> +uart_rx = port:PH07<4><1> + +[uart_para6] +uart_used = 0 +uart_port = 6 +uart_type = 2 +uart_tx = port:PA12<3><1> +uart_rx = port:PA13<3><1> + +[uart_para7] +uart_used = 0 +uart_port = 7 +uart_type = 2 +uart_tx = port:PA14<3><1> +uart_rx = port:PA15<3><1> + +[spi0_para] +spi_used = 0 +spi_cs_bitmap = 1 +spi_cs0 = port:PI10<2> +spi_cs1 = port:PI14<2> +spi_sclk = port:PI11<2> +spi_mosi = port:PI12<2> +spi_miso = port:PI13<2> + +[spi1_para] +spi_used = 0 +spi_cs_bitmap = 1 +spi_cs0 = port:PA00<3> +spi_cs1 = port:PA04<3> +spi_sclk = port:PA01<3> +spi_mosi = port:PA02<3> +spi_miso = port:PA03<3> + +[spi2_para] +spi_used = 0 +spi_cs_bitmap = 1 +spi_cs0 = port:PC19<3> +spi_cs1 = port:PB13<2> +spi_sclk = port:PC20<3> +spi_mosi = port:PC21<3> +spi_miso = port:PC22<3> + +[spi3_para] +spi_used = 0 +spi_cs_bitmap = 1 +spi_cs0 = port:PA05<3> +spi_cs1 = port:PA09<3> +spi_sclk = port:PA06<3> +spi_mosi = port:PA07<3> +spi_miso = port:PA08<3> + +[ctp_para] +ctp_used = 1 +ctp_name = "ft5x_ts" +ctp_twi_id = 2 +ctp_twi_addr = 0x38 +ctp_screen_max_x = 768 +ctp_screen_max_y = 1024 +ctp_revert_x_flag = 0 +ctp_revert_y_flag = 0 +ctp_exchange_x_y_flag = 0 +ctp_int_port = port:PH21<6> +ctp_wakeup = port:PB13<1><1> + +[ct
Re: [linux-sunxi] [PATCH] a20: ICOU Fatty I support
On Sun, Aug 10, 2014 at 04:26:08PM +0200, Paul Kocialkowski wrote: > Signed-off-by: Paul Kocialkowski > --- > sys_config/a20/icou_fatty_i.fex | 983 > +++ > 1 file changed, 983 insertions(+) > create mode 100644 sys_config/a20/icou_fatty_i.fex Done. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] [PATCH] sunxi: ICOU Fatty I support
On Sun, Aug 10, 2014 at 04:22:58PM +0200, Paul Kocialkowski wrote: > Signed-off-by: Paul Kocialkowski > --- > board/sunxi/Makefile|1 + > board/sunxi/dram_icou_fatty_i.c | 31 +++ > boards.cfg |1 + > 3 files changed, 33 insertions(+) > create mode 100644 board/sunxi/dram_icou_fatty_i.c Done. Luc Verhaegen. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: Re[2]: [linux-sunxi] Re: sun7i_tvd and cubietruck A20
در دوشنبه 14 آوریل 2014، ساعت 20:31:19 (UTC+4:30)، Rosimildo DaSilva نوشته: > Hi there, > > > I am wondering if these is any progress on this. I've got a NTSC Security > Camera around, and I am thinking of hooking it up to tvin line, using a 75 > ohms resistor to ground. > > It would be nice if we had more info on the manual or even a working > driver. > > > R > > > On Monday, January 27, 2014 8:33:17 AM UTC-6, vova brovkovich wrote: > > Hi masters. > Thanks for reply, even so sad. > Yes information is weak, and one that is available, morely puts questions > rather than gets answers. > Had you tried to get more documentation from Allwinner ? > Is it realistic ? > I have wrote them but no reply ( yet ? ). > Vladimir. > > > Четверг, 23 января 2014, 7:27 -08:00 от Rosimildo DaSilva : > > > > > As Enrico said earlier in this thread, it is pointless to start any work > without a "working setup", even if using blobs from AW drops and using their > distro. > > > All we have are 4 pins that we don't even know if more than a resistor and a > connector is required, which TV modes are supported, etc. > > > Without a proper documentation and a working system, it is hard to start. > > > The boards providers should at least provide examples of working prototypes, > even if crap drivers... but not even that is provided. > > > R > > > On Thursday, January 23, 2014 3:59:16 AM UTC-6, Olliver Schinagl wrote:Hey > vladimir > > > > On 23-01-14 05:06, za...@mail.ru wrote: > > > Hi masters. > > > I'd like to ask you about your progress with a sun7i_tvd driver > > none, nobody is working on it. > > > I tried but haven't got any answer from A20-boards suppliers. > > They dont' know, nor care about customers; they just sell you their > > crap; and that's that. They rely on Allwinner supplied BBSP. > > > The strange situations... > > as usual :) > > > ( I don't found the driver in linux-sunxi-sunxi 3.4, only in > > ...linux-sunxi-import-lichee-3.3-a20-dev. > > sunxi-3.4 is our community maintained driver; lichee-3.3 is allwinner > > supplied BSP driver, they have a driver, we don't > > > What means that in forther release it was removed ?? ) > > No, that means, we haven't ported their driver yet. We'll be looking > > forward for your patch :) > > > So what do you think is it a chance to get a working TVins in Allwinner > > (the only interesting feature of this SoC) ? > > 0 - 100 %. If you put in the effort in porting it; we can add it and > > it's good. Otherwise, it requires someone interested to port the driver. > > > Best regards, Vladimir. > > > > Make sure to check out the community wiki, http://linux-sunxi.org > > > > Oliver > > > > > > > > > > > > -- > > You received this message because you are subscribed to a topic in the Google > Groups "linux-sunxi" group. > > To unsubscribe from this topic, visit > https://groups.google.com/d/topic/linux-sunxi/9dAldgInrkw/unsubscribe. > > To unsubscribe from this group and all of its topics, send an email to > linux-sunxi...@googlegroups.com. > > For more options, visit https://groups.google.com/groups/opt_out. > > > > > > > > -- > Vova Brovkovich Which means that a company produces a product that does not provide information in detail -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: Getting Linux
Thanks for your reply. I initially tried reading the partitions within Windows, and as expected, it only recognised the FAT partition. I then loaded Linux (my PC is dual boot) and tried mounting the partitions directly from the image file using kpartx. Unfortunately, kpartx didn't recognise any of them. Perhaps that's a limitation of kpartx, it's not a program that I use very much. Unfortunately, I can't try flashing the image back to an SD card right now, as all my SD cards are in use. It not at all clear from the wiki whether the NAND is supposed to contain a standard partiton table. However, I notice there is another utility available called nand-part which will list the NAND partitions and their offsets. I might try using that instead of kpartx. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
Re: [linux-sunxi] Problem with Allwinner A31 fastboot and Macs
On Wednesday, 6 August 2014 08:24:10 UTC+10, Simos Xenitellis wrote: > > > On Sun, Aug 3, 2014 at 8:52 AM, Caspy7 > > wrote: > >> We've got 500 A31-based tablets which we're testing Firefox OS on >> worldwide. >> > > Out of curiosity, what Linux kernel do you use for those tablets with > Firefox OS? > Is it the one at http://git.rhombus-tech.net/linux ? > > Simos > Simos, Yes with a patchset from: https://github.com/flatfish-fox/flatfish-kernel Actually the readme in that repo points people to http://linux-sunxi.org/A31 and then to follow the link to the rhombus repo Maks. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
