Re: [linux-sunxi] SUNXI-GMAC driver logs every vlan frame...
On 04.06.2014 16:36, Eddy Beaupre wrote:
Hello!
Don't know if i'm the only one who's using vlan with sunxi-gmac, but the
current driver is terribly spammy for the logs, it log every single vlan
frame at the INFO level. Personally i don't think that information is
useful at all but if you want to keep it enable, it should log it at the
DEBUG level instead. So i propose this little simple modification to the
source (or better, remove the whole line.):
diff --git a/drivers/net/ethernet/allwinner/gmac/gmac_desc.c
b/drivers/net/ethernet/allwinner/gmac/gmac_desc.c
index 57ae52f..c34f033 100644
--- a/drivers/net/ethernet/allwinner/gmac/gmac_desc.c
+++ b/drivers/net/ethernet/allwinner/gmac/gmac_desc.c
@@ -49,7 +49,7 @@ int desc_get_tx_status(void *data, struct
gmac_extra_stats *x,
}
if (p->desc0.tx.vlan_tag) {
- printk(KERN_INFO "GMAC TX status: VLAN frame\n");
+ pr_debug("GMAC TX status: VLAN frame\n");
x->tx_vlan++;
}
Thanks!
sorry for the delay. applied to stage/sunxi-3.4
thank you!
Alejandro Mery
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[linux-sunxi] Re: [RFC Patch 1/4] mfd: AXP20x: Add power supply bindings documentation
On Tue, 21 October 2014 Lee Jones wrote:
> On Mon, 20 Oct 2014, Bruno Prémont wrote:
> > ---
> > Note: the OCV values seem to have some defaults build into the
> > PMIC though may need adjustment if the used battery has a different
> > open circuit voltage curve.
> > As far as understood (these values are set in vendor driver but not
> > mentioned in chip documentation) they represent charge percentage
> > for some predefined voltages.
> >
> > If prefixing these values with "x-power," is preferred the following
> > patch should becomes a dependency:
> >
> > http://lists.infradead.org/pipermail/linux-arm-kernel/2014-June/267606.html
> > and users in patch 2/4, 4/4 need adjusting.
> >
> >
> > Documentation/devicetree/bindings/mfd/axp20x.txt | 20 +
> > 1 files changed, 20 insertions(+), 0 deletion(-)
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/axp20x.txt
> > b/Documentation/devicetree/bindings/mfd/axp20x.txt
> > index cc9e01b..8ea681c 100644
> > --- a/Documentation/devicetree/bindings/mfd/axp20x.txt
> > +++ b/Documentation/devicetree/bindings/mfd/axp20x.txt
> > @@ -28,6 +28,20 @@ Required properties:
> > (range: 750-1875). Default: 1.5MHz
> >
> > Optional properties for DCDCs:
> > +- backup: Settings for backup/RTC battery charger
> > + (Voltage in µV, current in µA)
> > + If not present, charger will be left untouched
> > +- battery.ocv: OCV capacity curve points (16 data values)
> > +- battery.resistance: internal battery resistance in mΩ
> > + (defaults to 100mΩ)
> > +- battery.capacity: Battery capacity in mAh
> > + If this attribute is missing, charger will be disabled
> > + unless there is a battery connected.
> > +- battery.temp_sensor: Description of temperautre sensor, 3 values
> > + - driver current (20µA, 40µA, 60µA or 80µA)
> > + - low temperature warning level (in µV)
> > + - high temperature warning level (in µV)
> > + If missing, temperature sensor gets disabled
> > - x-powers,dcdc-workmode: 1 for PWM mode, 0 for AUTO mode
> > Default: AUTO mode
> >
> > @@ -49,6 +63,12 @@ axp209: pmic@34 {
> > ldo3in-supply = <&axp_ipsout_reg>;
> > ldo5in-supply = <&axp_ipsout_reg>;
> >
> > + backup = <300 200>;
> > + battery.ocv = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>;
> > + battery.resistance = <0>;
> > + battery.capacity = <2000>;
> > + battery.temp_sensor = <20 100 400>;
>
> Since when do we use '.'s in property names?
I've not found guidelines on this, but whatever is the right way to
name them, I'm open for suggestions.
Bruno
> > regulators {
> > x-powers,dcdc-freq = <1500>;
> >
>
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[linux-sunxi] Re: [PATCH] Add Full Duplex support to SPI (v2)
Le mardi 20 mai 2014 11:44:56 UTC+1, miltong...@gmail.com a écrit : > excelent news this patch is available since i am trying to connect rf24l01 > sensor using spi, now i have a simple question, my as an absolute > newbiehoy do i apply this patch? i am using cubieez on cb2. > your help will be a bless. thanks Hi I dont even know how to appply it too. I have kernel 3.4.103+ for olinuxino Lime. Does this end our misery with full duplex? -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Hello, everyone. does anyone have the description of ddr memory controller's registers of A31?
we want to use different ddr3 sdram ics(EtronTech EM6GE16EWXC) which work on wider operating temperature(-40 ~ +95), so we have to config the memory controller to apply new ddr3 memory ic. I noticed A31 is of sun6i, and sun6i uses Allwinner AW1633 DRAM memory controller, but I couldn't find any details of DRAM controller's registers of A31 or A31S but init_dram/mctl_reg.h //* //Allwinner Technology, All Right Reserved. 2006-2010 Copyright (c) // //File: mctl_reg.h // //Description: This file implements basic functions for AW1633 DRAM controller // //History: // 2012/02/06 Berg Xing 0.10Initial version // 2012/02/24 Berg Xing 0.20Support 2 channel // 2012/02/27 Berg Xing 0.30modify mode register access //2012/03/01Berg Xing 0.40add LPDDR2 //2012/03/10Berg Xing 0.50add mctl_dll_init() function //2012/04/26Berg Xing 0.60add deep sleep //2012/06/19Berg Xing 0.70add 2T mode //2012/11/07CPL0.80FPGA version based on berg's code //2012/11/14CPL0.90add SID and regulate the parameters order //2012/11/21CPL0.91modify parameters error //2012/11/25CPL0.92modify for IC test //2012/11/27CPL0.93add master configuration //2012/11/28CPL0.94modify for boot and burn interface compatible //2012/11/29CPL0.95modify lock parameters configuration //2012/12/3CPL0.96add dll&pll delay and simple test //* #ifndef _MCTL_REG_H #define _MCTL_REG_H //DRAMC base address definition #define MCTL_COM_BASE0x01c62000 #define MCTL_CTL_BASE0x01c63000 #define MCTL_PHY_BASE0x01c65000 #define MCTL_RAM_BASE0x01c64000 //#define MCTL_CTL00x01c63000 //#define MCTL_CTL10x01c64000 //#define MCTL_PHY00x01c65000 //#define MCTL_PHY10x01c66000 #define SDR_COM_CR(MCTL_COM_BASE + 0x00) #define SDR_COM_CCR(MCTL_COM_BASE + 0x04) #define SDR_COM_DBGCR(MCTL_COM_BASE + 0x08) #define SDR_COM_DBGCR1(MCTL_COM_BASE + 0x0c) #define SDR_COM_RMCR(MCTL_COM_BASE + 0x10) #define SDR_COM_MMCR(MCTL_COM_BASE + 0x30) #define SDR_COM_MBAGCR(MCTL_COM_BASE + 0x70) #define SDR_COM_MBACR(MCTL_COM_BASE + 0x74) #define SDR_COM_MAER(MCTL_COM_BASE + 0x88) #define SDR_COM_MDFSCR(MCTL_COM_BASE + 0x100) #define SDR_COM_MDFSMER(MCTL_COM_BASE + 0x104) #define SDR_COM_MDFSMRMR(MCTL_COM_BASE + 0x108) #define SDR_COM_MDFSTR0(MCTL_COM_BASE + 0x10c) #define SDR_COM_MDFSTR1(MCTL_COM_BASE + 0x110) #define SDR_COM_MDFSTR2(MCTL_COM_BASE + 0x114) #define SDR_COM_MDFSTR3(MCTL_COM_BASE + 0x118) #define SDR_COM_MDFSGCR(MCTL_COM_BASE + 0x11c) #define SDR_COM_MDFSIVR(MCTL_COM_BASE + 0x13c) #define SDR_COM_MDFSTCR(MCTL_COM_BASE + 0x14c) #define SDR_SCTL(MCTL_CTL_BASE + 0x04) #define SDR_SSTAT(MCTL_CTL_BASE + 0x08) #define SDR_MCMD(MCTL_CTL_BASE + 0x40) #define SDR_CMDSTAT(MCTL_CTL_BASE + 0x4c) #define SDR_CMDSTATEN(MCTL_CTL_BASE + 0x50) #define SDR_MRRCFG0(MCTL_CTL_BASE + 0x60) #define SDR_MRRSTAT0(MCTL_CTL_BASE + 0x64) #define SDR_MRRSTAT1(MCTL_CTL_BASE + 0x68) #define SDR_MCFG1(MCTL_CTL_BASE + 0x7c) #define SDR_MCFG(MCTL_CTL_BASE + 0x80) #define SDR_PPCFG(MCTL_CTL_BASE + 0x84) #define SDR_MSTAT(MCTL_CTL_BASE + 0x88) #define SDR_LP2ZQCFG(MCTL_CTL_BASE + 0x8c) #define SDR_DTUSTAT(MCTL_CTL_BASE + 0x94) #define SDR_DTUNA(MCTL_CTL_BASE + 0x98) #define SDR_DTUNE(MCTL_CTL_BASE + 0x9c) #define SDR_DTUPRD0(MCTL_CTL_BASE + 0xa0) #define SDR_DTUPRD1(MCTL_CTL_BASE + 0xa4) #define SDR_DTUPRD2(MCTL_CTL_BASE + 0xa8) #define SDR_DTUPRD3(MCTL_CTL_BASE + 0xac) #define SDR_DTUAWDT(MCTL_CTL_BASE + 0xb0) #define SDR_TOGCNT1U(MCTL_CTL_BASE + 0xc0) #define SDR_TOGCNT100N(MCTL_CTL_BASE + 0xcc) #define SDR_TREFI(MCTL_CTL_BASE + 0xd0) #define SDR_TMRD
[linux-sunxi] Re: [U-Boot] [PATCH] sun7i: Set CONFIG_ARMV7_SEC_BY_DEFAULT when CONFIG_OLD_KERNEL_COMPAT is set
On Wed, Oct 22, 2014 at 03:45:23PM +0200, Hans de Goede wrote: > Old kernels cannot handle booting in non-secure (hyp) mode, so when > CONFIG_OLD_KERNEL_COMPAT is set, also set CONFIG_ARMV7_SEC_BY_DEFAULT. > > Note that whether to booting secure or non-secure can always be overriden > using the bootm_boot_mode environment variable. This belongs in Kconfig. If you want to make it really optional all the same, make modifying it depend on CONFIG_EXPERT too. -- Tom signature.asc Description: Digital signature
[linux-sunxi] Re: [PATCH] sun7i: Set CONFIG_ARMV7_SEC_BY_DEFAULT when CONFIG_OLD_KERNEL_COMPAT is set
On Wed, 2014-10-22 at 15:45 +0200, Hans de Goede wrote: > Old kernels cannot handle booting in non-secure (hyp) mode, so when > CONFIG_OLD_KERNEL_COMPAT is set, also set CONFIG_ARMV7_SEC_BY_DEFAULT. > > Note that whether to booting secure or non-secure can always be overriden nits: "boot" (not booting, or s/whether to/ perhaps) and "overridden" > using the bootm_boot_mode environment variable. > > Signed-off-by: Hans de Goede > --- > include/configs/sun7i.h | 4 > 1 file changed, 4 insertions(+) > > diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h > index 966cbd8..4a864b2 100644 > --- a/include/configs/sun7i.h > +++ b/include/configs/sun7i.h > @@ -35,6 +35,10 @@ > #define CONFIG_ARMV7_PSCI1 > #define CONFIG_ARMV7_PSCI_NR_CPUS2 > #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE > +#ifdef CONFIG_OLD_KERNEL_COMPAT > +#define CONFIG_ARMV7_SEC_BY_DEFAULT 1 > +#endif I think this would be better right after the NONSEC+VIRT defines just above the context here, since they are related. Ian. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [U-Boot] [PATCH 3/3] sunxi: Add CONFIG_OLD_KERNEL_COMPAT Kconfig option
On Wed, Oct 22, 2014 at 03:44:36PM +0200, Hans de Goede wrote: > Add a Kconfig option which users can select when they want to boot older > kernels, e.g. the linux-sunxi 3.4 kernels. For now this just forces the pll5 > "p" value to 1 (divide by 2) as that is what those kernels are hardcoded too, > in the future this may enable further workarounds. Conceptually fine, but please do CONFIG_OLD_SUNXI_KERNEL_COMPAT so that we don't start using this symbol more broadly and so it's clear where exactly it's compat for. Thanks! -- Tom signature.asc Description: Digital signature
[linux-sunxi] Re: [PATCH v2] ARM: bootm: Allow booting in secure mode on hyp capable systems
On Wed, 2014-10-22 at 15:45 +0200, Hans de Goede wrote:
> if (!fake) {
> #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
> - armv7_init_nonsec();
> - secure_ram_addr(_do_nonsec_entry)(kernel_entry,
> - 0, machid, r2);
> -#else
> - kernel_entry(0, machid, r2);
> + if (boot_nonsec()) {
> + armv7_init_nonsec();
> + secure_ram_addr(_do_nonsec_entry)(kernel_entry,
> + 0, machid, r2);
> + }
> #endif
> + kernel_entry(0, machid, r2);
There's a subtle different here, which is that this final kernel_entry
call used to be in the #else clause, and so emitted for the NONSEC ||
VIRT case. So if the _do_nonsec_entry call were to fail (not currently
possible) and return you'd end up trying again via the sec path.
I'm not sure that's a bad thing, but it is a difference so it'd be good
to know it was a deliberate choice (or not).
Ian.
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[linux-sunxi] Re: [PATCH 3/3] sunxi: Add CONFIG_OLD_KERNEL_COMPAT Kconfig option
On Wed, 2014-10-22 at 15:44 +0200, Hans de Goede wrote: > Add a Kconfig option which users can select when they want to boot older > kernels, e.g. the linux-sunxi 3.4 kernels. For now this just forces the pll5 > "p" value to 1 (divide by 2) as that is what those kernels are hardcoded too, > in the future this may enable further workarounds. > > Signed-off-by: Hans de Goede > --- > arch/arm/cpu/armv7/sunxi/dram.c | 4 > board/sunxi/Kconfig | 7 +++ > 2 files changed, 11 insertions(+) > > diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c > index 0cbcf57..c0dc456 100644 > --- a/arch/arm/cpu/armv7/sunxi/dram.c > +++ b/arch/arm/cpu/armv7/sunxi/dram.c > @@ -293,6 +293,10 @@ static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk) > reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); > reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(clk / 24)); > } > +#ifdef CONFIG_OLD_KERNEL_COMPAT > + /* Old kernels are hardcoded to P=1 (divide by 2) */ > + reg_val |= CCM_PLL5_CTRL_P(1); > +#endif I think this would be better placed above the if/else ladder, just next to the: reg_val &= ~CCM_PLL5_CTRL_P_MASK; /* set P to 0 (x1) */ i.e. keep the frobbings of P in the same place. Ian. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH 2/3] sunxi: dram: Use clock_get_pll5p to calculate mbus, rather then hardcoding
On Wed, 2014-10-22 at 15:44 +0200, Hans de Goede wrote: > This is a preparation patch for making the pll5 "p" divisor configurable > through Kconfig. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH 1/3] sunxi: Add clock_get_pll5p() function
On Wed, 2014-10-22 at 15:44 +0200, Hans de Goede wrote: > This is a preparation patch for making the pll5 "p" divisor configurable > through Kconfig. > > Signed-off-by: Hans de Goede Acked-by: Ian Campbell -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH v2 5/8] ARM: sunxi: Add support for R_PIO gpio banks
On Wed, 2014-10-22 at 16:47 +0800, Chen-Yu Tsai wrote: > From: Hans de Goede > > The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO > or R_PIO, which handles pin banks L and beyond. > > Also add a clear description about SUNXI_GPIO_BANKS, stating it only > counts the number of pin banks in the _main_ pin controller. > > Signed-off-by: Hans de Goede > [w...@csie.org: expanded commit message] > [w...@csie.org: add pin bank M and expand comments] > [w...@csie.org: add comment on SUNXI_GPIO_BANKS macro] > Signed-off-by: Chen-Yu Tsai Acked-by: Ian Campbell -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH] Move fsl_s8.fex to the a31s directory.
Hi, my last patch that added fsl_s8.fex misplaced it in the a31 directory. This one moves it to a31s. cu Reinhard --- sys_config/a31/fsl_s8.fex | 964 - sys_config/a31s/fsl_s8.fex | 964 + 2 files changed, 964 insertions(+), 964 deletions(-) delete mode 100644 sys_config/a31/fsl_s8.fex create mode 100644 sys_config/a31s/fsl_s8.fex diff --git a/sys_config/a31/fsl_s8.fex b/sys_config/a31/fsl_s8.fex deleted file mode 100644 index e09b6cb..000 --- a/sys_config/a31/fsl_s8.fex +++ /dev/null @@ -1,964 +0,0 @@ -[product] -version = "100" -machine = "a31s-tablet" - -[platform] -eraseflag = 1 - -[target] -boot_clock = 1008 -storage_type = -1 - -[power_sply] -dcdc1_vol = 3000 -dcdc2_vol = 1200 -dcdc3_vol = 1260 -dcdc4_vol = 1240 -dcdc5_vol = 1500 -aldo2_vol = 1800 -aldo3_vol = 3000 - -[card_boot] -logical_start = 40960 -sprite_gpio0 = - -[card0_boot_para] -card_ctrl = 0 -card_high_speed = 1 -card_line = 4 -sdc_d1 = port:PF00<2><1> -sdc_d0 = port:PF01<2><1> -sdc_clk = port:PF02<2><1> -sdc_cmd = port:PF03<2><1> -sdc_d3 = port:PF04<2><1> -sdc_d2 = port:PF05<2><1> - -[card2_boot_para] -card_ctrl = 2 -card_high_speed = 1 -card_line = 4 -sdc_cmd = port:PC06<3><1> -sdc_clk = port:PC07<3><1> -sdc_d0 = port:PC08<3><1> -sdc_d1 = port:PC09<3><1> -sdc_d2 = port:PC10<3><1> -sdc_d3 = port:PC11<3><1> - -[twi_para] -twi_port = 0 -twi_scl = port:PH14<2> -twi_sda = port:PH15<2> - -[uart_para] -uart_debug_port = 0 -uart_debug_tx = port:PH20<2><1> -uart_debug_rx = port:PH21<2><1> - -[jtag_para] -jtag_enable = 1 -jtag_ms = port:PH09<3> -jtag_ck = port:PH10<3> -jtag_do = port:PH11<3> -jtag_di = port:PH12<3> - -[clock] -pll3 = 297 -pll4 = 300 -pll6 = 600 -pll7 = 297 -pll8 = 360 -pll9 = 297 -pll10 = 702 - -[dram_para] -dram_clk = 360 -dram_type = 3 -dram_zq = 0x88 -dram_odt_en = 0 -dram_para1 = 284427264 -dram_para2 = 4353 -dram_mr0 = 6736 -dram_mr1 = 4 -dram_mr2 = 24 -dram_mr3 = 0 -dram_tpr0 = 0x0 -dram_tpr1 = 0x8800 -dram_tpr2 = 0x39a70140 -dram_tpr3 = 0xa092e74c -dram_tpr4 = 0x2948c209 -dram_tpr5 = 0x8944422c -dram_tpr6 = 0x30028480 -dram_tpr7 = 0x2a3297 -dram_tpr8 = 0x5034fa8 -dram_tpr9 = 0x36353d8 -dram_tpr10 = 0x0 -dram_tpr11 = 0x0 -dram_tpr12 = 0x0 -dram_tpr13 = 0x1 - -[pm_para] -standby_mode = 1 - -[wakeup_src_para] -cpu_en = 0 -cpu_freq = 48 -pll_ratio = 273 -dram_selfresh_en = 1 -dram_freq = 36 -wakeup_src0 = port:PL05<2><1> - -[gmac_para] -gmac_used = 0 -gmac_txd0 = port:PA00<2> -gmac_txd1 = port:PA01<2> -gmac_txd2 = port:PA02<2> -gmac_txd3 = port:PA03<2> -gmac_txd4 = port:PA04<2> -gmac_txd5 = port:PA05<2> -gmac_txd6 = port:PA06<2> -gmac_txd7 = port:PA07<2> -gmac_txclk = port:PA08<2> -gmac_txen = port:PA09<2> -gmac_gtxclk = port:PA10<2> -gmac_rxd0 = port:PA11<2> -gmac_rxd1 = port:PA12<2> -gmac_rxd2 = port:PA13<2> -gmac_rxd3 = port:PA14<2> -gmac_rxd4 = port:PA15<2> -gmac_rxd5 = port:PA16<2> -gmac_rxd6 = port:PA17<2> -gmac_rxd7 = port:PA18<2> -gmac_rxdv = port:PA19<2> -gmac_rxclk = port:PA20<2> -gmac_txerr = port:PA21<2> -gmac_rxerr = port:PA22<2> -gmac_col = port:PA23<2> -gmac_crs = port:PA24<2> -gmac_clkin = port:PA25<2> -gmac_mdc = port:PA26<2> -gmac_mdio = port:PA27<2> - -[twi0_para] -twi_used = 1 -twi_scl = port:PH14<2> -twi_sda = port:PH15<2> - -[twi1_para] -twi_used = 1 -twi_scl = port:PH16<2> -twi_sda = port:PH17<2> - -[twi2_para] -twi_used = 1 -twi_scl = port:PH18<2> -twi_sda = port:PH19<2> - -[twi3_para] -twi_used = 1 -twi_scl = port:PG10<2> -twi_sda = port:PG11<2> - -[uart_para0] -uart_used = 1 -uart_port = 0 -uart_type = 2 -uart_tx = port:PH20<2><1> -uart_rx = port:PH21<2><1> - -[uart_para1] -uart_used = 0 -uart_port = 1 -uart_type = 4 -uart_tx = port:PA04<4><1> -uart_rx = port:PA05<4><1> -uart_rts = port:PA06<4><1> -uart_cts = port:PA07<4><1> - -[uart_para2] -uart_used = 0 -uart_port = 2 -uart_type = 4 -uart_tx = port:PG06<2><1> -uart_rx = port:PG07<2><1> -uart_rts = port:PG08<2><1> -uart_cts = port:PG09<2><1> - -[uart_para3] -uart_used = 0 -uart_port = 3 -uart_type = 4 -uart_tx = port:PB05<3><1> -uart_rx = port:PB06<3><1> -uart_rts = port:PB04<3><1> -uart_cts = port:PB00<3><1> - -[uart_para4] -uart_used = 0 -uart_port = 4 -uart_type = 2 -uart_tx = port:PG17<2><1> -uart_rx = port:PG18<2><1> -uart_rts = port:PB04<3><1> -uart_cts = port:PB00<3><1> - -[uart_para5] -uart_used = 0 -uart_port = 5 -uart_type = 4 -uart_tx = port:PE04<3><1> -uart_rx = port:PE05<3><1> -uart_rts = port:PE06<3><1> -uart_cts = port:PE07<3><1> - -[spi0_para] -spi_used = 0 -spi_cs_bitmap = 1 -spi_cs0 = port:PC27<3><1> -spi_sclk = port:PC02<3> -spi_mosi = port:PC00<3> -spi_miso = port:PC01<3> - -[spi1_para] -spi_used = 0 -spi_cs_bitmap = 1 -spi_cs1 = port:PG12<2><1> -spi_cs0 = port:PG13<2><1> -spi_sclk = port:PG14<2> -spi_mosi = port:PG15<2> -spi_miso = port:PG16<2> - -[spi2_para] -spi_used = 0 -spi_cs_bitmap = 1 -spi_cs0 = port:PH09<2> -spi_sclk = port:PH10<2> -spi_mosi = port:PH11<2> -spi_miso = port:PH12<2> - -[spi3_para] -spi_used =
[linux-sunxi] [PATCH v4 3/5] simplefb: formalize pseudo palette handling
From: Luc Verhaegen
Signed-off-by: Luc Verhaegen
Acked-by: Stephen Warren
[hdego...@redhat.com: drop unnecessary void * cast]
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede
Acked-by: Geert Uytterhoeven
Reviewed-by: Maxime Ripard
Reviewed-by: David Herrmann
---
drivers/video/fbdev/simplefb.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/video/fbdev/simplefb.c b/drivers/video/fbdev/simplefb.c
index 210f3a0..ec112c1 100644
--- a/drivers/video/fbdev/simplefb.c
+++ b/drivers/video/fbdev/simplefb.c
@@ -41,6 +41,8 @@ static struct fb_var_screeninfo simplefb_var = {
.vmode = FB_VMODE_NONINTERLACED,
};
+#define PSEUDO_PALETTE_SIZE 16
+
static int simplefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
u_int transp, struct fb_info *info)
{
@@ -50,7 +52,7 @@ static int simplefb_setcolreg(u_int regno, u_int red, u_int
green, u_int blue,
u32 cb = blue >> (16 - info->var.blue.length);
u32 value;
- if (regno >= 16)
+ if (regno >= PSEUDO_PALETTE_SIZE)
return -EINVAL;
value = (cr << info->var.red.offset) |
@@ -163,11 +165,16 @@ static int simplefb_parse_pd(struct platform_device *pdev,
return 0;
}
+struct simplefb_par {
+ u32 palette[PSEUDO_PALETTE_SIZE];
+};
+
static int simplefb_probe(struct platform_device *pdev)
{
int ret;
struct simplefb_params params;
struct fb_info *info;
+ struct simplefb_par *par;
struct resource *mem;
if (fb_get_options("simplefb", NULL))
@@ -188,11 +195,13 @@ static int simplefb_probe(struct platform_device *pdev)
return -EINVAL;
}
- info = framebuffer_alloc(sizeof(u32) * 16, &pdev->dev);
+ info = framebuffer_alloc(sizeof(struct simplefb_par), &pdev->dev);
if (!info)
return -ENOMEM;
platform_set_drvdata(pdev, info);
+ par = info->par;
+
info->fix = simplefb_fix;
info->fix.smem_start = mem->start;
info->fix.smem_len = resource_size(mem);
@@ -225,7 +234,7 @@ static int simplefb_probe(struct platform_device *pdev)
framebuffer_release(info);
return -ENODEV;
}
- info->pseudo_palette = (void *)(info + 1);
+ info->pseudo_palette = par->palette;
dev_info(&pdev->dev, "framebuffer at 0x%lx, 0x%x bytes, mapped to
0x%p\n",
info->fix.smem_start, info->fix.smem_len,
--
2.1.0
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[linux-sunxi] [PATCH v4 1/5] simplefb: Add simplefb MAINTAINERS entry
During the discussion about adding clock handling code to simplefb, it became clear that simplefb currently does not have an active maintainer. I've discussed this with Stephen Warren , the original author of simplefb, and with his permisson I'm picking up maintainership of simplefb. Cc: Stephen Warren Signed-off-by: Hans de Goede Acked-by: Geert Uytterhoeven Acked-by: Stephen Warren Reviewed-by: Maxime Ripard Reviewed-by: David Herrmann --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 73d1aef..6e92e73 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8416,6 +8416,14 @@ F: drivers/media/usb/siano/ F: drivers/media/usb/siano/ F: drivers/media/mmc/siano/ +SIMPLEFB FB DRIVER +M: Hans de Goede +L: linux-fb...@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/video/simple-framebuffer.txt +F: drivers/video/fbdev/simplefb.c +F: include/linux/platform_data/simplefb.h + SH_VEU V4L2 MEM2MEM DRIVER L: linux-me...@vger.kernel.org S: Orphan -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v4 0/5] simplefb: add clock handling code
Hi Tomi, Here is v4 of the patch-set to add clocks support to simplefb. Changes in v2: -Added "simplefb: Add simplefb MAINTAINERS entry" patch Changes in v3: -Improved description of simplefb binding Changes in v4: -Change clocks in simplefb from a linked-list to a (simpler) dynamically allocated array v2 got some objections from some people because clocks are hardware description and as such do not belong in a virtual device node as simplefb is. As explained in the following thread the use of clocks in simplefb has nothing to do with clock topology (so hardware description), but is about which clocks of a number of possible clocks where actually chosen by the firmware to bring of the fb, as such this clearly is state description. AFAIK at the end of the thread no one was disagreeing with this anymore (I did not get any replies to my last mails explaining this). Some of us also got together at the Plumbers conference in Dusseldorf to discuss this, present were: David Herrmann, Maxime Ripard, Geert Uytterhoeven and Hans de Goede (me), conclusions: -We will add a clocks property to the simplefb devicetree bindings, so that u-boot setup framebuffers passed to the kernel (for early console support) can properly list the clocks used, and simplefb can claim them to avoid them getting turned off, thereby breaking the early console -simplefb/simpledrm -> native-kms driver handoff will keep using the linear framebuffer address to identify which simplefb platform device to destroy during handoff, so that if their are multiple kms devices involved, the handover happens at the right moment and we don't loose console output anywhere (and we should be able to do a flickerfree handover) Since we seem to have broad agreement on how to move forward with this, I would like to ask you to please merge this patch-set for 3.19. I know 3.19 is still somewhat ar away, but I would like to submit the u-boot side of this to upstream ASAP, so can you please let me know if you plan to take this patch-set for 3.19 soon ? Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v4 5/5] simplefb: add clock handling code
From: Luc Verhaegen
This claims and enables clocks listed in the simple framebuffer dt node.
This is needed so that the display engine, in case the required clocks
are known by the kernel code and are described in the dt, will remain
properly enabled.
Signed-off-by: Luc Verhaegen
[hdego...@redhat.com: Change clks from list to dynamic array]
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede
Acked-by: Geert Uytterhoeven
Reviewed-by: Maxime Ripard
Reviewed-by: David Herrmann
--
Changes in v4:
-change clks from linkedlist to dynamic allocated array
-propagate EPROBE_DEFER up from simplefb_clocks_init to simplefb_probe
---
drivers/video/fbdev/simplefb.c | 101 -
1 file changed, 100 insertions(+), 1 deletion(-)
diff --git a/drivers/video/fbdev/simplefb.c b/drivers/video/fbdev/simplefb.c
index cdcf1fe..cd96edd 100644
--- a/drivers/video/fbdev/simplefb.c
+++ b/drivers/video/fbdev/simplefb.c
@@ -26,6 +26,7 @@
#include
#include
#include
+#include
static struct fb_fix_screeninfo simplefb_fix = {
.id = "simple",
@@ -167,8 +168,98 @@ static int simplefb_parse_pd(struct platform_device *pdev,
struct simplefb_par {
u32 palette[PSEUDO_PALETTE_SIZE];
+ int clk_count;
+ struct clk **clks;
};
+/*
+ * Clock handling code.
+ *
+ * Here we handle the clocks property of our "simple-framebuffer" dt node.
+ * This is necessary so that we can make sure that any clocks needed by
+ * the display engine that the bootloader set up for us (and for which it
+ * provided a simplefb dt node), stay up, for the life of the simplefb
+ * driver.
+ *
+ * When the driver unloads, we cleanly disable, and then release the clocks.
+ *
+ * We only complain about errors here, no action is taken as the most likely
+ * error can only happen due to a mismatch between the bootloader which set
+ * up simplefb, and the clock definitions in the device tree. Chances are
+ * that there are no adverse effects, and if there are, a clean teardown of
+ * the fb probe will not help us much either. So just complain and carry on,
+ * and hope that the user actually gets a working fb at the end of things.
+ */
+static int
+simplefb_clocks_init(struct simplefb_par *par, struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct clk *clock;
+ int i, ret;
+
+ if (dev_get_platdata(&pdev->dev) || !np)
+ return 0;
+
+ par->clk_count = of_clk_get_parent_count(np);
+ if (par->clk_count <= 0)
+ return 0;
+
+ par->clks = kcalloc(par->clk_count, sizeof(struct clk *), GFP_KERNEL);
+ if (!par->clks)
+ return -ENOMEM;
+
+ for (i = 0; i < par->clk_count; i++) {
+ clock = of_clk_get(np, i);
+ if (IS_ERR(clock)) {
+ if (PTR_ERR(clock) == -EPROBE_DEFER) {
+ while (--i >= 0) {
+ if (par->clks[i])
+ clk_put(par->clks[i]);
+ }
+ kfree(par->clks);
+ return -EPROBE_DEFER;
+ }
+ dev_err(&pdev->dev, "%s: clock %d not found: %ld\n",
+ __func__, i, PTR_ERR(clock));
+ continue;
+ }
+ par->clks[i] = clock;
+ }
+
+ for (i = 0; i < par->clk_count; i++) {
+ if (par->clks[i]) {
+ ret = clk_prepare_enable(par->clks[i]);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "%s: failed to enable clock %d: %d\n",
+ __func__, i, ret);
+ clk_put(par->clks[i]);
+ par->clks[i] = NULL;
+ }
+ }
+ }
+
+ return 0;
+}
+
+static void
+simplefb_clocks_destroy(struct simplefb_par *par)
+{
+ int i;
+
+ if (!par->clks)
+ return;
+
+ for (i = 0; i < par->clk_count; i++) {
+ if (par->clks[i]) {
+ clk_disable_unprepare(par->clks[i]);
+ clk_put(par->clks[i]);
+ }
+ }
+
+ kfree(par->clks);
+}
+
static int simplefb_probe(struct platform_device *pdev)
{
int ret;
@@ -236,6 +327,10 @@ static int simplefb_probe(struct platform_device *pdev)
}
info->pseudo_palette = par->palette;
+ ret = simplefb_clocks_init(par, pdev);
+ if (ret < 0)
+ goto error_unmap;
+
dev_info(&pdev->dev, "framebuffer at 0x%lx, 0x%x bytes, mapped to
0x%p\n",
info->fix.smem_start, info->fix.smem_len,
info->screen_base);
@@ -247,13 +342,15 @@ static int simp
[linux-sunxi] [PATCH v4 2/5] dt-bindings: Add a clocks property to the simple-framebuffer binding
A simple-framebuffer node represents a framebuffer setup by the firmware /
bootloader. Such a framebuffer may have a number of clocks in use, add a
property to communicate this to the OS.
Signed-off-by: Hans de Goede
Reviewed-by: Mike Turquette
Acked-by: Geert Uytterhoeven
Reviewed-by: Maxime Ripard
--
Changes in v2:
-Added Reviewed-by: Mike Turquette
Changes in v3:
-Updated description to make clear simplefb deals with more then just memory
---
Documentation/devicetree/bindings/video/simple-framebuffer.txt | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/video/simple-framebuffer.txt
b/Documentation/devicetree/bindings/video/simple-framebuffer.txt
index 70c26f3..172ad5f 100644
--- a/Documentation/devicetree/bindings/video/simple-framebuffer.txt
+++ b/Documentation/devicetree/bindings/video/simple-framebuffer.txt
@@ -1,8 +1,8 @@
Simple Framebuffer
-A simple frame-buffer describes a raw memory region that may be rendered to,
-with the assumption that the display hardware has already been set up to scan
-out from that buffer.
+A simple frame-buffer describes a frame-buffer setup by firmware or
+the bootloader, with the assumption that the display hardware has already
+been set up to scan out from the memory pointed to by the reg property.
Required properties:
- compatible: "simple-framebuffer"
@@ -14,6 +14,9 @@ Required properties:
- r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
- a8b8g8r8 (32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r).
+Optional properties:
+- clocks : List of clocks used by the framebuffer
+
Example:
framebuffer {
--
2.1.0
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[linux-sunxi] [PATCH v4 4/5] simplefb: add goto error path to probe
From: Luc Verhaegen
While at it update ioremap_wc error return from ENODEV to ENOMEM.
Signed-off-by: Luc Verhaegen
Acked-by: Stephen Warren
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede
Acked-by: Geert Uytterhoeven
Reviewed-by: Maxime Ripard
Reviewed-by: David Herrmann
---
drivers/video/fbdev/simplefb.c | 18 +++---
1 file changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/video/fbdev/simplefb.c b/drivers/video/fbdev/simplefb.c
index ec112c1..cdcf1fe 100644
--- a/drivers/video/fbdev/simplefb.c
+++ b/drivers/video/fbdev/simplefb.c
@@ -220,8 +220,8 @@ static int simplefb_probe(struct platform_device *pdev)
info->apertures = alloc_apertures(1);
if (!info->apertures) {
- framebuffer_release(info);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto error_fb_release;
}
info->apertures->ranges[0].base = info->fix.smem_start;
info->apertures->ranges[0].size = info->fix.smem_len;
@@ -231,8 +231,8 @@ static int simplefb_probe(struct platform_device *pdev)
info->screen_base = ioremap_wc(info->fix.smem_start,
info->fix.smem_len);
if (!info->screen_base) {
- framebuffer_release(info);
- return -ENODEV;
+ ret = -ENOMEM;
+ goto error_fb_release;
}
info->pseudo_palette = par->palette;
@@ -247,14 +247,18 @@ static int simplefb_probe(struct platform_device *pdev)
ret = register_framebuffer(info);
if (ret < 0) {
dev_err(&pdev->dev, "Unable to register simplefb: %d\n", ret);
- iounmap(info->screen_base);
- framebuffer_release(info);
- return ret;
+ goto error_unmap;
}
dev_info(&pdev->dev, "fb%d: simplefb registered!\n", info->node);
return 0;
+
+error_unmap:
+ iounmap(info->screen_base);
+error_fb_release:
+ framebuffer_release(info);
+ return ret;
}
static int simplefb_remove(struct platform_device *pdev)
--
2.1.0
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[linux-sunxi] Re: [PATCH v3 1/4] input: Add new sun4i-lradc-keys driver
Hi Hans, On Wed, Oct 22, 2014 at 01:11:02PM +0200, Hans de Goede wrote: > Allwinnner sunxi SoCs have a low resolution adc (called lradc) which is > specifically designed to have various (tablet) keys (ie home, back, search, > etc). attached to it using a resistor network. This adds a driver for this. > > There are 2 channels, currently this driver only supports chan0 since there > are no boards known to use chan1. > > This has been tested on an olimex a10s-olinuxino-micro, a13-olinuxino, and > a20-olinuxino-micro. > > Signed-off-by: Hans de Goede Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
[linux-sunxi] [PATCH] sun7i: Set CONFIG_ARMV7_SEC_BY_DEFAULT when CONFIG_OLD_KERNEL_COMPAT is set
Old kernels cannot handle booting in non-secure (hyp) mode, so when CONFIG_OLD_KERNEL_COMPAT is set, also set CONFIG_ARMV7_SEC_BY_DEFAULT. Note that whether to booting secure or non-secure can always be overriden using the bootm_boot_mode environment variable. Signed-off-by: Hans de Goede --- include/configs/sun7i.h | 4 1 file changed, 4 insertions(+) diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 966cbd8..4a864b2 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -35,6 +35,10 @@ #define CONFIG_ARMV7_PSCI 1 #define CONFIG_ARMV7_PSCI_NR_CPUS 2 #define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE +#ifdef CONFIG_OLD_KERNEL_COMPAT +#define CONFIG_ARMV7_SEC_BY_DEFAULT1 +#endif + #define CONFIG_SYS_CLK_FREQ2400 /* -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2] ARM: bootm: Allow booting in secure mode on hyp capable systems
Older Linux kernels will not properly boot in hype mode, add support for a
bootm_boot_mode environment variable, which when set to "sec" will cause
u-boot to boot in secure mode even when build with non-sec (and hyp) support.
Signed-off-by: Hans de Goede
Acked-by: Marc Zyngier
Acked-by: Siarhei Siamashka
--
Changes in v2:
-Allow changing the default boot mode to secure through defining
CONFIG_ARMV7_SEC_BY_DEFAULT, this is useful for archs which have a Kconfig
option for compatibility with older kernels
---
arch/arm/lib/bootm.c | 31 ++-
1 file changed, 26 insertions(+), 5 deletions(-)
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 39fe7a1..ff0170a 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -235,6 +235,26 @@ static void boot_prep_linux(bootm_headers_t *images)
}
}
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
+static bool boot_nonsec(void)
+{
+ char *s = getenv("bootm_boot_mode");
+#ifdef CONFIG_ARMV7_SEC_BY_DEFAULT
+ bool nonsec = false;
+#else
+ bool nonsec = true;
+#endif
+
+ if (s && !strcmp(s, "sec"))
+ nonsec = false;
+
+ if (s && !strcmp(s, "nonsec"))
+ nonsec = true;
+
+ return nonsec;
+}
+#endif
+
/* Subcommand: GO */
static void boot_jump_linux(bootm_headers_t *images, int flag)
{
@@ -283,12 +303,13 @@ static void boot_jump_linux(bootm_headers_t *images, int
flag)
if (!fake) {
#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT)
- armv7_init_nonsec();
- secure_ram_addr(_do_nonsec_entry)(kernel_entry,
- 0, machid, r2);
-#else
- kernel_entry(0, machid, r2);
+ if (boot_nonsec()) {
+ armv7_init_nonsec();
+ secure_ram_addr(_do_nonsec_entry)(kernel_entry,
+ 0, machid, r2);
+ }
#endif
+ kernel_entry(0, machid, r2);
}
#endif
}
--
2.1.0
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[linux-sunxi] [PATCH 2/3] sunxi: dram: Use clock_get_pll5p to calculate mbus, rather then hardcoding
This is a preparation patch for making the pll5 "p" divisor configurable
through Kconfig.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/dram.c | 32 ++--
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
index 584f742..0cbcf57 100644
--- a/arch/arm/cpu/armv7/sunxi/dram.c
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -252,15 +252,9 @@ static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk)
{
u32 reg_val;
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
-
- /* PLL5P and PLL6 are the potential clock sources for MBUS */
- u32 pll6x_div, pll5p_div;
- u32 pll6x_clk = clock_get_pll6() / 100;
- u32 pll5p_clk = clk / 24 * 48;
+ u32 pll5p_clk, pll6x_clk;
+ u32 pll5p_div, pll6x_div;
u32 pll5p_rate, pll6x_rate;
-#ifdef CONFIG_SUN7I
- pll6x_clk *= 2; /* sun7i uses PLL6*2, sun5i uses just PLL6 */
-#endif
/* setup DRAM PLL */
reg_val = readl(&ccm->pll5_cfg);
@@ -269,32 +263,27 @@ static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk)
reg_val &= ~CCM_PLL5_CTRL_N_MASK; /* set N to 0 (x0) */
reg_val &= ~CCM_PLL5_CTRL_P_MASK; /* set P to 0 (x1) */
if (clk >= 540 && clk < 552) {
- /* dram = 540MHz, pll5p = 1080MHz */
- pll5p_clk = 1080;
+ /* dram = 540MHz */
reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2));
reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3));
reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(15));
} else if (clk >= 512 && clk < 528) {
- /* dram = 512MHz, pll5p = 1536MHz */
- pll5p_clk = 1536;
+ /* dram = 512MHz */
reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(3));
reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(4));
reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(16));
} else if (clk >= 496 && clk < 504) {
- /* dram = 496MHz, pll5p = 1488MHz */
- pll5p_clk = 1488;
+ /* dram = 496MHz */
reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(3));
reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2));
reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(31));
} else if (clk >= 468 && clk < 480) {
- /* dram = 468MHz, pll5p = 936MHz */
- pll5p_clk = 936;
+ /* dram = 468MHz */
reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2));
reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3));
reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(13));
} else if (clk >= 396 && clk < 408) {
- /* dram = 396MHz, pll5p = 792MHz */
- pll5p_clk = 792;
+ /* dram = 396MHz */
reg_val |= CCM_PLL5_CTRL_M(CCM_PLL5_CTRL_M_X(2));
reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(3));
reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(11));
@@ -322,6 +311,13 @@ static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk)
/* setup MBUS clock */
if (!mbus_clk)
mbus_clk = 300;
+
+ /* PLL5P and PLL6 are the potential clock sources for MBUS */
+ pll6x_clk = clock_get_pll6() / 100;
+#ifdef CONFIG_SUN7I
+ pll6x_clk *= 2; /* sun7i uses PLL6*2, sun5i uses just PLL6 */
+#endif
+ pll5p_clk = clock_get_pll5p() / 100;
pll6x_div = DIV_ROUND_UP(pll6x_clk, mbus_clk);
pll5p_div = DIV_ROUND_UP(pll5p_clk, mbus_clk);
pll6x_rate = pll6x_clk / pll6x_div;
--
2.1.0
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[linux-sunxi] [PATCH 3/3] sunxi: Add CONFIG_OLD_KERNEL_COMPAT Kconfig option
Add a Kconfig option which users can select when they want to boot older kernels, e.g. the linux-sunxi 3.4 kernels. For now this just forces the pll5 "p" value to 1 (divide by 2) as that is what those kernels are hardcoded too, in the future this may enable further workarounds. Signed-off-by: Hans de Goede --- arch/arm/cpu/armv7/sunxi/dram.c | 4 board/sunxi/Kconfig | 7 +++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c index 0cbcf57..c0dc456 100644 --- a/arch/arm/cpu/armv7/sunxi/dram.c +++ b/arch/arm/cpu/armv7/sunxi/dram.c @@ -293,6 +293,10 @@ static void mctl_setup_dram_clock(u32 clk, u32 mbus_clk) reg_val |= CCM_PLL5_CTRL_K(CCM_PLL5_CTRL_K_X(2)); reg_val |= CCM_PLL5_CTRL_N(CCM_PLL5_CTRL_N_X(clk / 24)); } +#ifdef CONFIG_OLD_KERNEL_COMPAT + /* Old kernels are hardcoded to P=1 (divide by 2) */ + reg_val |= CCM_PLL5_CTRL_P(1); +#endif reg_val &= ~CCM_PLL5_CTRL_VCO_GAIN; /* PLL VCO Gain off */ reg_val |= CCM_PLL5_CTRL_EN;/* PLL On */ writel(reg_val, &ccm->pll5_cfg); diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 66261fc..0331088 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -19,6 +19,13 @@ config SYS_SOC config FDTFILE string "Default fdtfile env setting for this board" +config OLD_KERNEL_COMPAT + boolean "Enable workarounds for booting old kernels" + default n + ---help--- + Set this to enable various workarounds for old kernels, this results in + sub-optimal settings for newer kernels, only enable if needed. + config MMC0_CD_PIN string "Card detect pin for mmc0" default "" -- 2.1.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 1/3] sunxi: Add clock_get_pll5p() function
This is a preparation patch for making the pll5 "p" divisor configurable
through Kconfig.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/clock_sun4i.c| 11 +++
arch/arm/include/asm/arch-sunxi/clock.h | 1 +
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 3 +++
3 files changed, 15 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
index ecbdb01..4a0d64f 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c
@@ -180,6 +180,17 @@ void clock_set_pll1(unsigned int hz)
}
#endif
+unsigned int clock_get_pll5p(void)
+{
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+ uint32_t rval = readl(&ccm->pll5_cfg);
+ int n = ((rval & CCM_PLL5_CTRL_N_MASK) >> CCM_PLL5_CTRL_N_SHIFT);
+ int k = ((rval & CCM_PLL5_CTRL_K_MASK) >> CCM_PLL5_CTRL_K_SHIFT) + 1;
+ int p = ((rval & CCM_PLL5_CTRL_P_MASK) >> CCM_PLL5_CTRL_P_SHIFT);
+ return (2400 * n * k) >> p;
+}
+
unsigned int clock_get_pll6(void)
{
struct sunxi_ccm_reg *const ccm =
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 8f5d860..9775c85 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -25,6 +25,7 @@
int clock_init(void);
int clock_twi_onoff(int port, int state);
void clock_set_pll1(unsigned int hz);
+unsigned int clock_get_pll5p(void);
unsigned int clock_get_pll6(void);
void clock_init_safe(void);
void clock_init_uart(void);
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 1ba997a..90af8e2 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -199,13 +199,16 @@ struct sunxi_ccm_reg {
#define CCM_PLL5_CTRL_M1_MASK CCM_PLL5_CTRL_M1(0x3)
#define CCM_PLL5_CTRL_M1_X(n) ((n) - 1)
#define CCM_PLL5_CTRL_K(n) (((n) & 0x3) << 4)
+#define CCM_PLL5_CTRL_K_SHIFT 4
#define CCM_PLL5_CTRL_K_MASK CCM_PLL5_CTRL_K(0x3)
#define CCM_PLL5_CTRL_K_X(n) ((n) - 1)
#define CCM_PLL5_CTRL_LDO (0x1 << 7)
#define CCM_PLL5_CTRL_N(n) (((n) & 0x1f) << 8)
+#define CCM_PLL5_CTRL_N_SHIFT 8
#define CCM_PLL5_CTRL_N_MASK CCM_PLL5_CTRL_N(0x1f)
#define CCM_PLL5_CTRL_N_X(n) (n)
#define CCM_PLL5_CTRL_P(n) (((n) & 0x3) << 16)
+#define CCM_PLL5_CTRL_P_SHIFT 16
#define CCM_PLL5_CTRL_P_MASK CCM_PLL5_CTRL_P(0x3)
#define CCM_PLL5_CTRL_P_X(n) ((n) - 1)
#define CCM_PLL5_CTRL_BW (0x1 << 18)
--
2.1.0
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[linux-sunxi] Re: [U-Boot] [PATCH v3 6/6] sunxi: Kconfig: Unify sunxi Kconfig code
Hi, On 10/21/2014 09:03 PM, Ian Campbell wrote: > On Sun, 2014-10-12 at 22:17 +0100, Ian Campbell wrote: >>> -if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN6I || TARGET_SUN7I >>> + default "sun4i" if TARGET_SUN4I >>> + default "sun5i" if TARGET_SUN5I >>> + default "sun6i" if TARGET_SUN5I > > There is a typo here which is apparent with "MAKEALL -s sunxi", since it > causes Colombus_defconfig not to build. > > Patch is below but given the breakage is only in u-boot-sunxi.git#next > right now I think it would be better to fold it into the original patch. Good catch thanks, I've squashed this into the original commit and done a forced push to u-boot-sunxi/next with this. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH v6 2/2] mtd: nand: add sunxi NFC dt bindings doc
Good Day My Noble Friend ... I'll post here some results Boris would like if possible could pass me some more step for tests with nand? what is still missing to run? take a look below .. __ [1.119502] nand: device found, Manufacturer ID: 0xec, Chip ID: 0xd7 [1.125908] nand: Samsung K9GBG08U0A 32G 3.3V 8-bit [1.130790] nand: 4096MiB, MLC, page size: 8192, OOB size: 640 [1.136811] Scanning device for bad blocks [1.833630] random: nonblocking pool is initialized [ 10.083008] No valid partition found on /soc@01c0/nand@01c03000/nand@0 ___ root@cubie0:~# mtdinfo Count of MTD devices: 1 Present MTD devices:mtd0 Sysfs interface supported: yes ___ root@cubie0:~# mtdinfo /dev/mtd0 mtd0 Name: K9GBG08U0A 32G 3.3V 8-bit Type: mlc-nand Eraseblock size: 1048576 bytes, 1024.0 KiB Amount of eraseblocks:4096 (4294967296 bytes, 4.0 GiB) Minimum input/output unit size: 8192 bytes Sub-page size: 8192 bytes OOB size: 640 bytes Character device major/minor: 90:0 Bad blocks are allowed:false Device is writable:true __ root@cubie0:~# mtd_debug info /dev/mtd0 mtd.type = (unknown type - new MTD API maybe?) mtd.flags = MTD_CAP_NANDFLASH mtd.size = 0 mtd.erasesize = 1048576 (1M) mtd.writesize = 8192 (8K) mtd.oobsize = 640 regions = 0 _ /dev/mtd0 /dev/mtd0ro _ root@cubie0:~# cat /proc/mtd dev:size erasesize name mtd0: 1 0010 "K9GBG08U0A 32G 3.3V 8-bit" _ __ -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v3 4/4] ARM: dts: sun7i: Add lradc node
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 59 -
arch/arm/boot/dts/sun7i-a20.dtsi| 7 +++
2 files changed, 64 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 9d669cdf..c00badd 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -12,8 +12,9 @@
*/
/dts-v1/;
-/include/ "sun7i-a20.dtsi"
-/include/ "sunxi-common-regulators.dtsi"
+#include "sun7i-a20.dtsi"
+#include "sunxi-common-regulators.dtsi"
+#include
/ {
model = "Olimex A20-Olinuxino Micro";
@@ -100,6 +101,60 @@
};
};
+ lradc: lradc@01c22800 {
+ vref-supply = <®_vcc3v0>;
+ status = "okay";
+
+ button@191 {
+ label = "Volume Up";
+ linux,code = ;
+ channel = <0>;
+ voltage = <191274>;
+ };
+
+ button@392 {
+ label = "Volume Down";
+ linux,code = ;
+ channel = <0>;
+ voltage = <392644>;
+ };
+
+ button@601 {
+ label = "Menu";
+ linux,code = ;
+ channel = <0>;
+ voltage = <601151>;
+ };
+
+ button@795 {
+ label = "Search";
+ linux,code = ;
+ channel = <0>;
+ voltage = <795090>;
+ };
+
+ button@987 {
+ label = "Home";
+ linux,code = ;
+ channel = <0>;
+ voltage = <987387>;
+ };
+
+ button@1184 {
+ label = "Esc";
+ linux,code = ;
+ channel = <0>;
+ voltage = <1184678>;
+ };
+
+ button@1398 {
+ label = "Enter";
+ linux,code = ;
+ channel = <0>;
+ voltage = <1398804>;
+ };
+ };
+
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index f0a75c6..9174423 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -911,6 +911,13 @@
status = "disabled";
};
+ lradc: lradc@01c22800 {
+ compatible = "allwinner,sun4i-a10-lradc-keys";
+ reg = <0x01c22800 0x100>;
+ interrupts = <0 31 4>;
+ status = "disabled";
+ };
+
sid: eeprom@01c23800 {
compatible = "allwinner,sun7i-a20-sid";
reg = <0x01c23800 0x200>;
--
2.1.0
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[linux-sunxi] [PATCH v3 1/4] input: Add new sun4i-lradc-keys driver
Allwinnner sunxi SoCs have a low resolution adc (called lradc) which is
specifically designed to have various (tablet) keys (ie home, back, search,
etc). attached to it using a resistor network. This adds a driver for this.
There are 2 channels, currently this driver only supports chan0 since there
are no boards known to use chan1.
This has been tested on an olimex a10s-olinuxino-micro, a13-olinuxino, and
a20-olinuxino-micro.
Signed-off-by: Hans de Goede
--
Changes in v2:
-Change devicetree bindings to use a per key subnode, like gpio-keys does
---
.../devicetree/bindings/input/sun4i-lradc-keys.txt | 62 +
MAINTAINERS| 7 +
drivers/input/keyboard/Kconfig | 10 +
drivers/input/keyboard/Makefile| 1 +
drivers/input/keyboard/sun4i-lradc-keys.c | 258 +
5 files changed, 338 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
create mode 100644 drivers/input/keyboard/sun4i-lradc-keys.c
diff --git a/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
b/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
new file mode 100644
index 000..b9c32f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
@@ -0,0 +1,62 @@
+Allwinner sun4i low res adc attached tablet keys
+
+
+Required properties:
+ - compatible: "allwinner,sun4i-a10-lradc-keys"
+ - reg: mmio address range of the chip
+ - interrupts: interrupt to which the chip is connected
+ - vref-supply: powersupply for the lradc reference voltage
+
+Each key is represented as a sub-node of "allwinner,sun4i-a10-lradc-keys":
+
+Required subnode-properties:
+ - label: Descriptive name of the key.
+ - linux,code: Keycode to emit.
+ - channel: Channel this key is attached to, mut be 0 or 1.
+ - voltage: Voltage in µV at lradc input when this key is pressed.
+
+Example:
+
+#include
+
+ lradc: lradc@01c22800 {
+ compatible = "allwinner,sun4i-a10-lradc-keys";
+ reg = <0x01c22800 0x100>;
+ interrupts = <31>;
+ vref-supply = <®_vcc3v0>;
+
+ button@191 {
+ label = "Volume Up";
+ linux,code = ;
+ channel = <0>;
+ voltage = <191274>;
+ };
+
+ button@392 {
+ label = "Volume Down";
+ linux,code = ;
+ channel = <0>;
+ voltage = <392644>;
+ };
+
+ button@601 {
+ label = "Menu";
+ linux,code = ;
+ channel = <0>;
+ voltage = <601151>;
+ };
+
+ button@795 {
+ label = "Enter";
+ linux,code = ;
+ channel = <0>;
+ voltage = <795090>;
+ };
+
+ button@987 {
+ label = "Home";
+ linux,code = ;
+ channel = <0>;
+ voltage = <987387>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index a20df9b..73d1aef 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -8932,6 +8932,13 @@ F: arch/m68k/sun3*/
F: arch/m68k/include/asm/sun3*
F: drivers/net/ethernet/i825xx/sun3*
+SUN4I LOW RES ADC ATTACHED TABLET KEYS DRIVER
+M: Hans de Goede
+L: linux-in...@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
+F: drivers/input/keyboard/sun4i-lradc-keys.c
+
SUNDANCE NETWORK DRIVER
M: Denis Kirjanov
L: net...@vger.kernel.org
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index a3958c6..2d11b44 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -567,6 +567,16 @@ config KEYBOARD_STMPE
To compile this driver as a module, choose M here: the module will be
called stmpe-keypad.
+config KEYBOARD_SUN4I_LRADC
+ tristate "Allwinner sun4i low res adc attached tablet keys support"
+ depends on ARCH_SUNXI
+ help
+ This selects support for the Allwinner low res adc attached tablet
+ keys found on Allwinner sunxi SoCs.
+
+ To compile this driver as a module, choose M here: the
+ module will be called sun4i-lradc-keys.
+
config KEYBOARD_DAVINCI
tristate "TI DaVinci Key Scan"
depends on ARCH_DAVINCI_DM365
diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
index 0a33456..a35269a 100644
--- a/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@ -53,6 +53,7 @@ obj-$(CONFIG_KEYBOARD_SPEAR) += spear-keyboard.o
obj-$(CONFIG_
[linux-sunxi] [PATCH v3 3/4] ARM: dts: sun5i: Add lradc node
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts | 45 ++--
arch/arm/boot/dts/sun5i-a10s.dtsi| 7
arch/arm/boot/dts/sun5i-a13-olinuxino.dts| 45 ++--
arch/arm/boot/dts/sun5i-a13.dtsi | 7
4 files changed, 100 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
index ea9519d..0b82d20 100644
--- a/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
@@ -12,8 +12,9 @@
*/
/dts-v1/;
-/include/ "sun5i-a10s.dtsi"
-/include/ "sunxi-common-regulators.dtsi"
+#include "sun5i-a10s.dtsi"
+#include "sunxi-common-regulators.dtsi"
+#include
/ {
model = "Olimex A10s-Olinuxino Micro";
@@ -98,6 +99,46 @@
};
};
+ lradc: lradc@01c22800 {
+ vref-supply = <®_vcc3v0>;
+ status = "okay";
+
+ button@191 {
+ label = "Volume Up";
+ linux,code = ;
+ channel = <0>;
+ voltage = <191274>;
+ };
+
+ button@392 {
+ label = "Volume Down";
+ linux,code = ;
+ channel = <0>;
+ voltage = <392644>;
+ };
+
+ button@601 {
+ label = "Menu";
+ linux,code = ;
+ channel = <0>;
+ voltage = <601151>;
+ };
+
+ button@795 {
+ label = "Enter";
+ linux,code = ;
+ channel = <0>;
+ voltage = <795090>;
+ };
+
+ button@987 {
+ label = "Home";
+ linux,code = ;
+ channel = <0>;
+ voltage = <987387>;
+ };
+ };
+
uart0: serial@01c28000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi
b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 531272c..7c6c883 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -520,6 +520,13 @@
reg = <0x01c20c90 0x10>;
};
+ lradc: lradc@01c22800 {
+ compatible = "allwinner,sun4i-a10-lradc-keys";
+ reg = <0x01c22800 0x100>;
+ interrupts = <31>;
+ status = "disabled";
+ };
+
sid: eeprom@01c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>;
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 429994e..b4ec8eb 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -12,8 +12,9 @@
*/
/dts-v1/;
-/include/ "sun5i-a13.dtsi"
-/include/ "sunxi-common-regulators.dtsi"
+#include "sun5i-a13.dtsi"
+#include "sunxi-common-regulators.dtsi"
+#include
/ {
model = "Olimex A13-Olinuxino";
@@ -66,6 +67,46 @@
};
};
+ lradc: lradc@01c22800 {
+ vref-supply = <®_vcc3v0>;
+ status = "okay";
+
+ button@191 {
+ label = "Volume Up";
+ linux,code = ;
+ channel = <0>;
+ voltage = <191274>;
+ };
+
+ button@392 {
+ label = "Volume Down";
+ linux,code = ;
+ channel = <0>;
+ voltage = <392644>;
+ };
+
+ button@601 {
+ label = "Menu";
+ linux,code = ;
+ channel = <0>;
+ voltage = <601151>;
+ };
+
+ button@795 {
+ label = "Enter";
+ linux,code = ;
+ channel = <0>;
+ voltage = <795090>;
+ };
+
+ button@987 {
+
[linux-sunxi] [PATCH v3 2/4] ARM: dts: sun4i: Add lradc node
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun4i-a10.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 380f914..1ef7d57 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -669,6 +669,13 @@
status = "disabled";
};
+ lradc: lradc@01c22800 {
+ compatible = "allwinner,sun4i-a10-lradc-keys";
+ reg = <0x01c22800 0x100>;
+ interrupts = <31>;
+ status = "disabled";
+ };
+
sid: eeprom@01c23800 {
compatible = "allwinner,sun4i-a10-sid";
reg = <0x01c23800 0x10>;
--
2.1.0
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[linux-sunxi] [PATCH v3 0/4] input: Add new sun4i-lradc-keys driver
Hi All, Here is v3 of my patchset for the lradc attached tablet keys found one some Allwinner boards. Changes since v2: -s/KEY_HOME/KEY_HOMEPAGE/ -s/sun4i-lradc-keys/sun4i-a10-lradc-keys/ -Use mV as address for the key subnodes in devicetree -dts formatting fixes according to Maxime's review -Do not set .owner field, as module_platform_driver already does that Changes since previous postings a long time ago: -device tree description now has one subnode per key just like gpio-keys I hope this version is to everyones liking and can be merged soon :) The intend is for the actual driver to go upstream through Dmitry's tree, where as the 3 dts patches should go upstream through Maxime's tree. Thanks & Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH v2 1/4] input: Add new sun4i-lradc-keys driver
Hi,
On 10/21/2014 07:04 PM, Maxime Ripard wrote:
> Hi Hans,
>
> Thanks, a lot for respinning this.
>
> On Tue, Oct 21, 2014 at 10:24:47AM +0200, Hans de Goede wrote:
>> Allwinnner sunxi SoCs have a low resolution adc (called lradc) which is
>> specifically designed to have various (tablet) keys (ie home, back, search,
>> etc). attached to it using a resistor network. This adds a driver for this.
>>
>> There are 2 channels, currently this driver only supports chan0 since there
>> are no boards known to use chan1.
>>
>> This has been tested on an olimex a10s-olinuxino-micro, a13-olinuxino, and
>> a20-olinuxino-micro.
>>
>> Signed-off-by: Hans de Goede
>> --
>> Changes in v2:
>> -Change devicetree bindings to use a per key subnode, like gpio-keys does
>> ---
>> .../devicetree/bindings/input/sun4i-lradc-keys.txt | 57 +
>> MAINTAINERS| 7 +
>> drivers/input/keyboard/Kconfig | 10 +
>> drivers/input/keyboard/Makefile| 1 +
>> drivers/input/keyboard/sun4i-lradc-keys.c | 259
>> +
>> 5 files changed, 334 insertions(+)
>> create mode 100644
>> Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
>> create mode 100644 drivers/input/keyboard/sun4i-lradc-keys.c
>>
>> diff --git a/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
>> b/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
>> new file mode 100644
>> index 000..36a141b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
>> @@ -0,0 +1,57 @@
>> +Allwinner sun4i low res adc attached tablet keys
>> +
>> +
>> +Required properties:
>> + - compatible: "allwinner,sun4i-lradc-keys"
>> + - reg: mmio address range of the chip
>> + - interrupts: interrupt to which the chip is connected
>> + - vref-supply: powersupply for the lradc reference voltage
>> +
>> +Each key is represented as a sub-node of "allwinner,sun4i-lradc-keys":
>> +
>> +Required subnode-properties:
>> +- label: Descriptive name of the key.
>> +- linux,code: Keycode to emit.
>> +- channel: Channel this key is attached to, mut be 0 or 1.
>> +- voltage: Voltage in µV at lradc input when this key is pressed.
>> +
>> +Example:
>> +
>> +#include
>> +
>> +lradc: lradc@01c22800 {
>> +compatible = "allwinner,sun4i-lradc-keys";
>
> You're still using the old pattern for the compatible here, it should
> be allwinner,sun4i-a10-lradc-keys.
Will fix for the next version.
>
>> +reg = <0x01c22800 0x100>;
>> +interrupts = <31>;
>> +vref-supply = <®_vcc3v0>;
>> +button@19 {
>
> I guess the node address in centivolts aren't really that common,
> maybe in mV instead?
Ack for using mV, will fix for the next version.
>
>> +label = "Volume Up";
>> +linux,code = ;
>> +channel = <0>;
>> +voltage = <191274>;
>> +};
>
> And a newline between the nodes please.
Will fix for the next version.
>> +button@39 {
>> +label = "Volume Down";
>> +linux,code = ;
>> +channel = <0>;
>> +voltage = <392644>;
>> +};
>> +button@60 {
>> +label = "Menu";
>> +linux,code = ;
>> +channel = <0>;
>> +voltage = <601151>;
>> +};
>> +button@80 {
>> +label = "Enter";
>> +linux,code = ;
>> +channel = <0>;
>> +voltage = <795090>;
>> +};
>> +button@98 {
>> +label = "Home";
>> +linux,code = ;
>> +channel = <0>;
>> +voltage = <987387>;
>> +};
>> +};
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index a20df9b..73d1aef 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -8932,6 +8932,13 @@ F:arch/m68k/sun3*/
>> F: arch/m68k/include/asm/sun3*
>> F: drivers/net/ethernet/i825xx/sun3*
>>
>> +SUN4I LOW RES ADC ATTACHED TABLET KEYS DRIVER
>> +M: Hans de Goede
>> +L: linux-in...@vger.kernel.org
>> +S: Maintained
>> +F: Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt
>> +F: drivers/input/keyboard/sun4i-lradc-keys.c
>> +
>> SUNDANCE NETWORK DRIVER
>> M: Denis Kirjanov
>> L: net...@vger.kernel.org
>> diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
>> index a3958c6..2d11b44 100644
>> --- a/drivers/input/keyboard/Kconfig
>> +++ b/drivers/input/keyboard/Kconfig
>> @@ -567,6 +567,16 @@ config KEYBOARD_STMPE
>>To compile this driver as a module, choose M here: the module will be
>>called stmpe-keypad.
>>
>> +config KEYBOARD_SUN4I_LRADC
>> +tristate "Allwinner s
Re: [linux-sunxi] Re: [PATCH v2 3/4] ARM: dts: sun5i: Add lradc node
Hi,
On 10/21/2014 10:29 PM, Hans de Goede wrote:
> Hi,
>
> On 10/21/2014 06:21 PM, Dmitry Torokhov wrote:
>> Hi Hans,
>>
>> On Tue, Oct 21, 2014 at 10:24:49AM +0200, Hans de Goede wrote:
>>> +button@98 {
>>> +label = "Home";
>>> +linux,code = ;
>>
>> I do not think you really want KEY_HOME (go to the beginning of the
>> line) here, KEY_HOMEPAGE or similar would suit better.
>
> I can understand where you're coming from, but KEY_HOME is what these
> keys typically send under android, and what android expects them to
> send...
>
> Not sure if that is a good argument to keep it as KEY_HOME though.
>
> Please let me know which way you want this key to be mapped, and
> I'll update it for the next version.
Sleeping a night on this I fully agree that what android is doing /
expecting here is just plain wrong, so I'll change this to KEY_HOMEPAGE
when I respin the set.
Regards,
Hans
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Re: [linux-sunxi] Re: [PATCH v7 0/6] mfd: AXP20x: Add support for AXP202 and AXP209
On Wed, Oct 22, 2014 at 09:59:29AM +0200, Maxime Ripard wrote: > On Wed, Oct 22, 2014 at 08:28:42AM +0200, Bruno Prémont wrote: > > On Sun, 29 Jun 2014 20:23:51 +0200 Carlo Caione wrote: > > > During the merging of v6 several patches were left out. This v7 comprises > > > all the patches that are still pending. > > > > Any progress on this or reason why these are stuck? > > No one bothered resubmitting it. > > If you have some time to work on this, it would be great if you could > pick up the work, if not, I'll do it. Wow, I totally forgot about those patches. Sorry for that. If you are willing to work on the patches go ahead, otherwise I'll find a bit of time myself. -- Carlo Caione -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH v5 4/4] crypto: Add Allwinner Security System crypto accelerator
On Sunday 19 October 2014 16:16:22 LABBE Corentin wrote:
> Add support for the Security System included in Allwinner SoC A20.
> The Security System is a hardware cryptographic accelerator that support
> AES/MD5/SHA1/DES/3DES/PRNG algorithms.
>
> Signed-off-by: LABBE Corentin
Please wrap lines in the changelog after about 70 characters.
> --- /dev/null
> +++ b/drivers/crypto/sunxi-ss/sunxi-ss-cipher.c
> @@ -0,0 +1,489 @@
> +#include "sunxi-ss.h"
> +
> +extern struct sunxi_ss_ctx *ss;
'extern' declarations belong into header files, not .c files. It would
be even better to avoid this completely and carry the pointer to the
context in an object that gets passed around. In general we want drivers
to be written in a way that allows having multiple instances of the
device, which the global pointer prevents.
> +
> + src32 = (u32 *)src_addr;
> + dst32 = (u32 *)dst_addr;
You appear to be missing '__iomem' annotations for the mmio pointers.
Please always run your code through the 'sparse' checker using 'make C=1'
to catch and fix this and other erros.
> + ileft = areq->nbytes / 4;
> + oleft = areq->nbytes / 4;
> + i = 0;
> + do {
> + if (ileft > 0 && rx_cnt > 0) {
> + todo = min(rx_cnt, ileft);
> + ileft -= todo;
> + do {
> + writel_relaxed(*src32++,
> + ss->base +
> + SS_RXFIFO);
> + todo--;
> + } while (todo > 0);
> + }
This looks like it should be using writesl() instead of the
writel_relaxed() loop. That should not only be faster but it will
also change the byte ordering if you are running a big-endian
kernel.
Since this is a FIFO register, the ordering that writesl uses
is likely the correct one.
Arnd
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[linux-sunxi] [PATCH v2 1/8] ARM: sunxi: Add sun8i (A23) UART0 pin mux support
UART0 pin muxes on the A23 have a different function value.
Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
---
arch/arm/include/asm/arch-sunxi/gpio.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 59122db..7e2b169 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -127,8 +127,14 @@ enum sunxi_gpio_number {
#define SUNXI_GPF0_SDC02
#define SUNXI_GPF2_SDC02
+
+#ifdef CONFIG_SUN8I
+#define SUNXI_GPF2_UART0_TX3
+#define SUNXI_GPF4_UART0_RX3
+#else
#define SUNXI_GPF2_UART0_TX4
#define SUNXI_GPF4_UART0_RX4
+#endif
#define SUN4I_GPG0_SDC14
--
2.1.1
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[linux-sunxi] [PATCH v2 0/8] ARM: sunxi: Add Allwinner A23 (sun8i) support
Hi everyone, This series adds support for Allwinner's A23 SoC. All the patches are either direct cherry-picks or changes manually merged from u-boot-sunxi. Patch 1 adds uart0 pinmux values for A23. Patch 2 adds support for using uart0 on port F, either using a breakout board or soldering wires to exposed pads. At least one version of A23 tablets requires this, as no other uarts are exposed. Patch 3 adds support for sun8i in the mmc driver. This is the same as sun6i. Patch 4 adds machine support for sun8i. Patch 5 adds support for gpio banks L and beyond, which is used by r_uart, p2wi (on sun6i) and rsb (on sun8i). Patch 6 makes the prcm apb0 clock enabling function to take an argument for which modules should be enabled. Patch 7 adds support for using r_uart as a console (with CONS_INDEX=5). Patch 8 adds a defconfig for the Ippo Q8H A23 tablet board. Changes since v1: - Dropped "ARM: sunxi: Fix build break when CONFIG_MMC is not defined" (already merged) - Add clarifying comment about SUNXI_GPIO_BANKS macro - Correct R_PIO L pin bank starting offset - Check for R_PIO pins by matching against L pin bank start pin number Cheers ChenYu Chen-Yu Tsai (7): ARM: sunxi: Add sun8i (A23) UART0 pin mux support ARM: sunxi: Add support for uart0 on port F (mmc0) mmc: sunxi: Add support for sun8i (A23) ARM: sunxi: Add basic A23 support ARM: sunxi: Allow specifying module in prcm apb0 init function ARM: sunxi: Add support for using R_UART as console ARM: sunxi: Add Ippo-q8h-v5 A23 tablet board defconfig Hans de Goede (1): ARM: sunxi: Add support for R_PIO gpio banks arch/arm/Kconfig| 3 +++ arch/arm/cpu/armv7/sunxi/Makefile | 2 ++ arch/arm/cpu/armv7/sunxi/board.c| 18 +-- arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 6 + arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++ arch/arm/cpu/armv7/sunxi/prcm.c | 12 +- arch/arm/include/asm/arch-sunxi/clock.h | 2 +- arch/arm/include/asm/arch-sunxi/cpu.h | 1 + arch/arm/include/asm/arch-sunxi/gpio.h | 40 +++-- arch/arm/include/asm/arch-sunxi/mmc.h | 2 +- arch/arm/include/asm/arch-sunxi/prcm.h | 2 +- board/sunxi/Kconfig | 3 ++- board/sunxi/MAINTAINERS | 5 + configs/Ippo_q8h_defconfig | 4 drivers/mmc/sunxi_mmc.c | 2 +- include/configs/sun8i.h | 23 +++ include/configs/sunxi-common.h | 3 +++ 17 files changed, 116 insertions(+), 14 deletions(-) create mode 100644 configs/Ippo_q8h_defconfig create mode 100644 include/configs/sun8i.h -- 2.1.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 2/8] ARM: sunxi: Add support for uart0 on port F (mmc0)
Allwinner SoCs provide uart0 muxed with mmc0, which can then be used
with a micro SD breakout board. On the A23, this is the only way to
use uart0.
Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
---
arch/arm/cpu/armv7/sunxi/board.c | 11 ++-
include/configs/sunxi-common.h | 2 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index b6d63db..29d45b6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -50,7 +50,16 @@ u32 spl_boot_mode(void)
int gpio_init(void)
{
-#if CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I))
+#if CONFIG_CONS_INDEX == 1 && defined(CONFIG_UART0_PORT_F)
+#if defined(CONFIG_SUN4I) || defined(CONFIG_SUN7I)
+ /* disable GPB22,23 as uart0 tx,rx to avoid conflict */
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUNXI_GPIO_INPUT);
+ sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUNXI_GPIO_INPUT);
+#endif
+ sunxi_gpio_set_cfgpin(SUNXI_GPF(2), SUNXI_GPF2_UART0_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPF(4), SUNXI_GPF4_UART0_RX);
+ sunxi_gpio_set_pull(SUNXI_GPF(4), 1);
+#elif CONFIG_CONS_INDEX == 1 && (defined(CONFIG_SUN4I) ||
defined(CONFIG_SUN7I))
sunxi_gpio_set_cfgpin(SUNXI_GPB(22), SUN4I_GPB22_UART0_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPB(23), SUN4I_GPB23_UART0_RX);
sunxi_gpio_set_pull(SUNXI_GPB(23), SUNXI_GPIO_PULL_UP);
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index a8d08b4..6ba9df6 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -77,6 +77,7 @@
#define CONFIG_INITRD_TAG
/* mmc config */
+#if !defined(CONFIG_UART0_PORT_F)
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_MMC
@@ -84,6 +85,7 @@
#define CONFIG_MMC_SUNXI_SLOT 0
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC
controller */
+#endif
/* 4MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
--
2.1.1
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[linux-sunxi] [PATCH v2 8/8] ARM: sunxi: Add Ippo-q8h-v5 A23 tablet board defconfig
Ippo q8h is a series of A23 tablet boards. This defconfig is for v5 of these boards, though for u-boot purposes they are mostly the same. See: http://linux-sunxi.org/Ippo_q8h Signed-off-by: Chen-Yu Tsai Acked-by: Ian Campbell --- board/sunxi/MAINTAINERS| 5 + configs/Ippo_q8h_defconfig | 4 2 files changed, 9 insertions(+) create mode 100644 configs/Ippo_q8h_defconfig diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 7afe45e..febd126 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -50,3 +50,8 @@ COLOMBUS BOARD M: Maxime Ripard S: Maintained F: configs/Colombus_defconfig + +IPPO-Q8H-V5 BOARD +M: CHen-Yu Tsai +S: Maintained +F: configs/Ippo_q8h_v5_defconfig diff --git a/configs/Ippo_q8h_defconfig b/configs/Ippo_q8h_defconfig new file mode 100644 index 000..781f137 --- /dev/null +++ b/configs/Ippo_q8h_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="IPPO_Q8H_V5,CONS_INDEX=5" +CONFIG_ARM=y +CONFIG_TARGET_SUN8I=y +CONFIG_DEFAULT_DEVICE_TREE="sun8i-a23-ippo-q8h-v5.dtb" -- 2.1.1 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 3/8] mmc: sunxi: Add support for sun8i (A23)
The Allwinner A23 SoC has reset controls like the A31 (sun6i).
The FIFO address is also the same as sun6i.
Re-use code added for sun6i.
Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
---
arch/arm/include/asm/arch-sunxi/mmc.h | 2 +-
drivers/mmc/sunxi_mmc.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/mmc.h
b/arch/arm/include/asm/arch-sunxi/mmc.h
index 70d7875..8a21674 100644
--- a/arch/arm/include/asm/arch-sunxi/mmc.h
+++ b/arch/arm/include/asm/arch-sunxi/mmc.h
@@ -43,7 +43,7 @@ struct sunxi_mmc {
u32 chda; /* 0x90 */
u32 cbda; /* 0x94 */
u32 res1[26];
-#if defined(CONFIG_SUN6I)
+#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I)
u32 res2[64];
#endif
u32 fifo; /* 0x100 (0x200 on sun6i) FIFO access address */
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index d3b1039..16592e3 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -75,7 +75,7 @@ static int mmc_clk_io_on(int sdc_no)
/* config ahb clock */
setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_MMC(sdc_no));
-#if defined(CONFIG_SUN6I)
+#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I)
/* unassert reset */
setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no));
#endif
--
2.1.1
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[linux-sunxi] [PATCH v2 7/8] ARM: sunxi: Add support for using R_UART as console
The A23 only has UART0 muxed with MMC0. Some of the boards we
encountered expose R_UART as a set of pads.
Add support for R_UART so we can have a console while using mmc.
Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
---
arch/arm/cpu/armv7/sunxi/board.c | 4
arch/arm/cpu/armv7/sunxi/clock_sun6i.c | 6 ++
arch/arm/include/asm/arch-sunxi/cpu.h | 1 +
arch/arm/include/asm/arch-sunxi/gpio.h | 3 +++
include/configs/sunxi-common.h | 1 +
5 files changed, 15 insertions(+)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 61c1ba9..aeb2c2f 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -75,6 +75,10 @@ int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG3_UART1_TX);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG4_UART1_RX);
sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
+#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_SUN8I)
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(2), SUN8I_GPL2_R_UART_TX);
+ sunxi_gpio_set_cfgpin(SUNXI_GPL(3), SUN8I_GPL3_R_UART_RX);
+ sunxi_gpio_set_pull(SUNXI_GPL(3), SUNXI_GPIO_PULL_UP);
#else
#error Unsupported console port number. Please fix pin mux settings in board.c
#endif
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
index 8387b93..1eae976 100644
--- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
+++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include
void clock_init_uart(void)
@@ -20,6 +21,7 @@ void clock_init_uart(void)
struct sunxi_ccm_reg *const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+#if CONFIG_CONS_INDEX < 5
/* uart clock source is apb2 */
writel(APB2_CLK_SRC_OSC24M|
APB2_CLK_RATE_N_1|
@@ -35,6 +37,10 @@ void clock_init_uart(void)
setbits_le32(&ccm->apb2_reset_cfg,
1 << (APB2_RESET_UART_SHIFT +
CONFIG_CONS_INDEX - 1));
+#else
+ /* enable R_PIO and R_UART clocks, and de-assert resets */
+ prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART);
+#endif
/* Dup with clock_init_safe(), drop once sun6i SPL support lands */
writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
diff --git a/arch/arm/include/asm/arch-sunxi/cpu.h
b/arch/arm/include/asm/arch-sunxi/cpu.h
index 313e6c8..0de79a0 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu.h
@@ -111,6 +111,7 @@
#define SUNXI_AVG_BASE 0x01ea
#define SUNXI_PRCM_BASE0x01f01400
+#define SUNXI_R_UART_BASE 0x01f02800
#define SUNXI_R_PIO_BASE 0x01f02c00
#define SUNXI_P2WI_BASE0x01f03400
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index de7a86a..7bb6499 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -172,6 +172,9 @@ enum sunxi_gpio_number {
#define SUN4I_GPI4_SDC32
+#define SUN8I_GPL2_R_UART_TX 2
+#define SUN8I_GPL3_R_UART_RX 2
+
/* GPIO pin pull-up/down config */
#define SUNXI_GPIO_PULL_DISABLE0
#define SUNXI_GPIO_PULL_UP 1
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 6ba9df6..97fd9e2 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -42,6 +42,7 @@
#define CONFIG_SYS_NS16550_COM2SUNXI_UART1_BASE
#define CONFIG_SYS_NS16550_COM3SUNXI_UART2_BASE
#define CONFIG_SYS_NS16550_COM4SUNXI_UART3_BASE
+#define CONFIG_SYS_NS16550_COM5SUNXI_R_UART_BASE
/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x4000
--
2.1.1
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[linux-sunxi] [PATCH v2 5/8] ARM: sunxi: Add support for R_PIO gpio banks
From: Hans de Goede
The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO
or R_PIO, which handles pin banks L and beyond.
Also add a clear description about SUNXI_GPIO_BANKS, stating it only
counts the number of pin banks in the _main_ pin controller.
Signed-off-by: Hans de Goede
[w...@csie.org: expanded commit message]
[w...@csie.org: add pin bank M and expand comments]
[w...@csie.org: add comment on SUNXI_GPIO_BANKS macro]
Signed-off-by: Chen-Yu Tsai
---
arch/arm/include/asm/arch-sunxi/gpio.h | 31 +--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index 7e2b169..de7a86a 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -10,6 +10,7 @@
#define _SUNXI_GPIO_H
#include
+#include
/*
* sunxi has 9 banks of gpio, they are:
@@ -27,8 +28,27 @@
#define SUNXI_GPIO_G 6
#define SUNXI_GPIO_H 7
#define SUNXI_GPIO_I 8
+
+/*
+ * This defines the number of GPIO banks for the _main_ GPIO controller.
+ * You should fix up the padding in struct sunxi_gpio_reg below if you
+ * change this.
+ */
#define SUNXI_GPIO_BANKS 9
+/*
+ * sun6i/sun8i and later SoCs have an additional GPIO controller (R_PIO)
+ * at a different register offset.
+ *
+ * sun6i has 2 banks:
+ * PL0 - PL8 | PM0 - PM7
+ *
+ * sun8i has 1 bank:
+ * PL0 - PL11
+ */
+#define SUNXI_GPIO_L 11
+#define SUNXI_GPIO_M 12
+
struct sunxi_gpio {
u32 cfg[4];
u32 dat;
@@ -50,8 +70,9 @@ struct sunxi_gpio_reg {
struct sunxi_gpio_int gpio_int;
};
-#define BANK_TO_GPIO(bank) \
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank]
+#define BANK_TO_GPIO(bank) (((bank) < SUNXI_GPIO_L) ? \
+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \
+ &((struct sunxi_gpio_reg *)SUNXI_R_PIO_BASE)->gpio_bank[(bank) -
SUNXI_GPIO_L])
#define GPIO_BANK(pin) ((pin) >> 5)
#define GPIO_NUM(pin) ((pin) & 0x1f)
@@ -75,6 +96,8 @@ struct sunxi_gpio_reg {
#define SUNXI_GPIO_G_NR32
#define SUNXI_GPIO_H_NR32
#define SUNXI_GPIO_I_NR32
+#define SUNXI_GPIO_L_NR32
+#define SUNXI_GPIO_M_NR32
#define SUNXI_GPIO_NEXT(__gpio) \
((__gpio##_START) + (__gpio##_NR) + 0)
@@ -89,6 +112,8 @@ enum sunxi_gpio_number {
SUNXI_GPIO_G_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_F),
SUNXI_GPIO_H_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_G),
SUNXI_GPIO_I_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_H),
+ SUNXI_GPIO_L_START = 352,
+ SUNXI_GPIO_M_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_L),
};
/* SUNXI GPIO number definitions */
@@ -101,6 +126,8 @@ enum sunxi_gpio_number {
#define SUNXI_GPG(_nr) (SUNXI_GPIO_G_START + (_nr))
#define SUNXI_GPH(_nr) (SUNXI_GPIO_H_START + (_nr))
#define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr))
+#define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr))
+#define SUNXI_GPM(_nr) (SUNXI_GPIO_M_START + (_nr))
/* GPIO pin function config */
#define SUNXI_GPIO_INPUT 0
--
2.1.1
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[linux-sunxi] [PATCH v2 6/8] ARM: sunxi: Allow specifying module in prcm apb0 init function
The prcm apb0 controls multiple modules. Allow specifying which
modules to enable clocks and de-assert resets so the function
can be reused.
Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
---
arch/arm/cpu/armv7/sunxi/prcm.c| 12 +++-
arch/arm/include/asm/arch-sunxi/prcm.h | 2 +-
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/prcm.c b/arch/arm/cpu/armv7/sunxi/prcm.c
index 7b3ee89..19b4938 100644
--- a/arch/arm/cpu/armv7/sunxi/prcm.c
+++ b/arch/arm/cpu/armv7/sunxi/prcm.c
@@ -21,13 +21,15 @@
#include
#include
-void prcm_init_apb0(void)
+/* APB0 clock gate and reset bit offsets are the same. */
+void prcm_apb0_enable(u32 flags)
{
struct sunxi_prcm_reg *prcm =
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
- setbits_le32(&prcm->apb0_gate, PRCM_APB0_GATE_P2WI |
- PRCM_APB0_GATE_PIO);
- setbits_le32(&prcm->apb0_reset, PRCM_APB0_RESET_P2WI |
- PRCM_APB0_RESET_PIO);
+ /* open the clock for module */
+ setbits_le32(&prcm->apb0_gate, flags);
+
+ /* deassert reset for module */
+ setbits_le32(&prcm->apb0_reset, flags);
}
diff --git a/arch/arm/include/asm/arch-sunxi/prcm.h
b/arch/arm/include/asm/arch-sunxi/prcm.h
index 1b40f09..3d3bfa6 100644
--- a/arch/arm/include/asm/arch-sunxi/prcm.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
@@ -233,6 +233,6 @@ struct sunxi_prcm_reg {
u32 dram_tst; /* 0x190 */
};
-void prcm_init_apb0(void);
+void prcm_apb0_enable(u32 flags);
#endif /* __ASSEMBLY__ */
#endif /* _PRCM_H */
--
2.1.1
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[linux-sunxi] [PATCH v2 4/8] ARM: sunxi: Add basic A23 support
The basic blocks of the A23 are similar to the A31 (sun6i). Re-use
sun6i code for initial clock, gpio, and uart setup.
There is no SPL support for A23, as we do not have any documentation
or sample code for DRAM initialization.
Signed-off-by: Chen-Yu Tsai
Acked-by: Ian Campbell
---
arch/arm/Kconfig| 3 +++
arch/arm/cpu/armv7/sunxi/Makefile | 2 ++
arch/arm/cpu/armv7/sunxi/board.c| 3 ++-
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
arch/arm/include/asm/arch-sunxi/clock.h | 2 +-
board/sunxi/Kconfig | 3 ++-
include/configs/sun8i.h | 23 +++
7 files changed, 35 insertions(+), 3 deletions(-)
create mode 100644 include/configs/sun8i.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 8bcb7e3..cff7ad9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -450,6 +450,9 @@ config TARGET_SUN6I
config TARGET_SUN7I
bool "Support sun7i"
+config TARGET_SUN8I
+ bool "Support sun8i"
+
config TARGET_SNOWBALL
bool "Support snowball"
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 2a42dca..24f1dae 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -12,10 +12,12 @@ obj-y += board.o
obj-y += clock.o
obj-y += pinmux.o
obj-$(CONFIG_SUN6I)+= prcm.o
+obj-$(CONFIG_SUN8I)+= prcm.o
obj-$(CONFIG_SUN4I)+= clock_sun4i.o
obj-$(CONFIG_SUN5I)+= clock_sun4i.o
obj-$(CONFIG_SUN6I)+= clock_sun6i.o
obj-$(CONFIG_SUN7I)+= clock_sun4i.o
+obj-$(CONFIG_SUN8I)+= clock_sun6i.o
ifndef CONFIG_SPL_BUILD
obj-y += cpu_info.o
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 29d45b6..61c1ba9 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -100,7 +100,8 @@ void reset_cpu(ulong addr)
/* do some early init */
void s_init(void)
{
-#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || defined CONFIG_SUN6I)
+#if !defined CONFIG_SPL_BUILD && (defined CONFIG_SUN7I || \
+ defined CONFIG_SUN6I || defined CONFIG_SUN8I)
/* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
asm volatile(
"mrc p15, 0, r0, c1, c0, 1\n"
diff --git a/arch/arm/cpu/armv7/sunxi/cpu_info.c
b/arch/arm/cpu/armv7/sunxi/cpu_info.c
index 40c4e13..4f2a09c 100644
--- a/arch/arm/cpu/armv7/sunxi/cpu_info.c
+++ b/arch/arm/cpu/armv7/sunxi/cpu_info.c
@@ -27,6 +27,8 @@ int print_cpuinfo(void)
puts("CPU: Allwinner A31 (SUN6I)\n");
#elif defined CONFIG_SUN7I
puts("CPU: Allwinner A20 (SUN7I)\n");
+#elif defined CONFIG_SUN8I
+ puts("CPU: Allwinner A23 (SUN8I)\n");
#else
#warning Please update cpu_info.c with correct CPU information
puts("CPU: SUNXI Family\n");
diff --git a/arch/arm/include/asm/arch-sunxi/clock.h
b/arch/arm/include/asm/arch-sunxi/clock.h
index 8f5d860..012c2af 100644
--- a/arch/arm/include/asm/arch-sunxi/clock.h
+++ b/arch/arm/include/asm/arch-sunxi/clock.h
@@ -15,7 +15,7 @@
#define CLK_GATE_CLOSE 0x0
/* clock control module regs definition */
-#ifdef CONFIG_SUN6I
+#if defined(CONFIG_SUN6I) || defined(CONFIG_SUN8I)
#include
#else
#include
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 4ac562c..7fe9005 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN6I || TARGET_SUN7I
+if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN6I || TARGET_SUN7I || TARGET_SUN8I
config SYS_CONFIG_NAME
string
@@ -6,6 +6,7 @@ config SYS_CONFIG_NAME
default "sun5i" if TARGET_SUN5I
default "sun6i" if TARGET_SUN5I
default "sun7i" if TARGET_SUN7I
+ default "sun8i" if TARGET_SUN8I
config SYS_CPU
default "armv7"
diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h
new file mode 100644
index 000..1c1a7cd
--- /dev/null
+++ b/include/configs/sun8i.h
@@ -0,0 +1,23 @@
+/*
+ * (C) Copyright 2014 Chen-Yu Tsai
+ *
+ * Configuration settings for the Allwinner A23 (sun8i) CPU
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * A23 specific configuration
+ */
+#define CONFIG_SUN8I /* sun8i SoC generation */
+#define CONFIG_SYS_PROMPT "sun8i# "
+
+/*
+ * Include common sunxi configuration where most the settings are
+ */
+#include
+
+#endif /* __CONFIG_H */
--
2.1.1
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Re: [linux-sunxi] Re: [PATCH v2 4/4] ARM: dts: sun7i: Add lradc node
Hi, On 10/22/2014 10:38 AM, Maxime Ripard wrote: > Hi Hans, > > On Tue, Oct 21, 2014 at 10:24:50AM +0200, Hans de Goede wrote: >> Signed-off-by: Hans de Goede >> --- >> arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 48 >> + >> arch/arm/boot/dts/sun7i-a20.dtsi| 7 >> 2 files changed, 55 insertions(+) >> >> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts >> b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts >> index 9d669cdf..85e7194 100644 >> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts >> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts >> @@ -14,6 +14,7 @@ >> /dts-v1/; >> /include/ "sun7i-a20.dtsi" >> /include/ "sunxi-common-regulators.dtsi" >> +#include > > I'm just wondering... Weren't we supposed to switch all includes to > the preprocessor syntax in such a case? I've just checked other in tree users of dt-bindings/input/input.h and you seem to be right, I will fix this for the next version. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH v2 4/4] ARM: dts: sun7i: Add lradc node
Hi Hans, On Tue, Oct 21, 2014 at 10:24:50AM +0200, Hans de Goede wrote: > Signed-off-by: Hans de Goede > --- > arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 48 > + > arch/arm/boot/dts/sun7i-a20.dtsi| 7 > 2 files changed, 55 insertions(+) > > diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts > b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts > index 9d669cdf..85e7194 100644 > --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts > +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts > @@ -14,6 +14,7 @@ > /dts-v1/; > /include/ "sun7i-a20.dtsi" > /include/ "sunxi-common-regulators.dtsi" > +#include I'm just wondering... Weren't we supposed to switch all includes to the preprocessor syntax in such a case? Maybe to handle the case were the DTSIs would have to use some preprocessors macros that wouldn't be expanded in this case? -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
[linux-sunxi] Re: [PATCH v7 0/6] mfd: AXP20x: Add support for AXP202 and AXP209
On Wed, Oct 22, 2014 at 08:28:42AM +0200, Bruno Prémont wrote: > On Sun, 29 Jun 2014 20:23:51 +0200 Carlo Caione wrote: > > During the merging of v6 several patches were left out. This v7 comprises > > all the patches that are still pending. > > Any progress on this or reason why these are stuck? No one bothered resubmitting it. If you have some time to work on this, it would be great if you could pick up the work, if not, I'll do it. Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com signature.asc Description: Digital signature
