Re: [linux-sunxi] [PATCH 4/9] rc: sunxi-cir: Add support for an optional reset controller
Hi Hans,
On Fri, Nov 21, 2014 at 2:55 AM, Hans de Goede wrote:
> On sun6i the cir block is attached to the reset controller, add support
> for de-asserting the reset if a reset controller is specified in dt.
>
> Signed-off-by: Hans de Goede
> ---
> drivers/media/rc/sunxi-cir.c | 25 +++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
Shouldn't we be updating the binding documentation?
> diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
> index bcee8e1..895fb65 100644
> --- a/drivers/media/rc/sunxi-cir.c
> +++ b/drivers/media/rc/sunxi-cir.c
> @@ -23,6 +23,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #define SUNXI_IR_DEV "sunxi-ir"
> @@ -95,6 +96,7 @@ struct sunxi_ir {
> int irq;
> struct clk *clk;
> struct clk *apb_clk;
> + struct reset_control *rst;
> const char *map_name;
> };
>
> @@ -166,15 +168,29 @@ static int sunxi_ir_probe(struct platform_device *pdev)
> return PTR_ERR(ir->clk);
> }
>
> + /* Reset (optional) */
> + ir->rst = devm_reset_control_get_optional(dev, NULL);
> + if (IS_ERR(ir->rst)) {
> + ret = PTR_ERR(ir->rst);
> + if (ret == -EPROBE_DEFER)
> + return ret;
> + ir->rst = NULL;
> + } else {
> + ret = reset_control_deassert(ir->rst);
> + if (ret)
> + return ret;
> + }
> +
> ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
> if (ret) {
> dev_err(dev, "set ir base clock failed!\n");
> - return ret;
> + goto exit_reset_assert;
> }
>
> if (clk_prepare_enable(ir->apb_clk)) {
> dev_err(dev, "try to enable apb_ir_clk failed\n");
> - return -EINVAL;
> + ret = -EINVAL;
> + goto exit_reset_assert;
> }
>
> if (clk_prepare_enable(ir->clk)) {
> @@ -271,6 +287,9 @@ exit_clkdisable_clk:
> clk_disable_unprepare(ir->clk);
> exit_clkdisable_apb_clk:
> clk_disable_unprepare(ir->apb_clk);
> +exit_reset_assert:
> + if (ir->rst)
> + reset_control_assert(ir->rst);
>
> return ret;
> }
> @@ -282,6 +301,8 @@ static int sunxi_ir_remove(struct platform_device *pdev)
>
> clk_disable_unprepare(ir->clk);
> clk_disable_unprepare(ir->apb_clk);
> + if (ir->rst)
> + reset_control_assert(ir->rst);
>
> spin_lock_irqsave(&ir->ir_lock, flags);
> /* disable IR IRQ */
> --
> 2.1.0
>
> --
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--
Julian Calaby
Email: julian.cal...@gmail.com
Profile: http://www.google.com/profiles/julian.calaby/
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Re: [linux-sunxi] linux backports
Hi Tim, On Fri, Nov 21, 2014 at 8:18 AM, Tim Tisdall wrote: > Has anyone tried running linux backports on the sunxi-3.4 branch? I'm > trying to backport from linux-stable and here's the output: > > tim@ebtim:~/engage/txcz_a20/backports$ ../env/bin/python gentree.py > --integrate --clean --gitdebug --git-revision master > ~/engage/txcz_a20/linux-stable/ ~/engage/txcz_a20/linux-sunxi/ [snip] > I've never done this stuff before, so it's possible I'm also just doing it > wrong. I'm not overly familiar with it either, however it looks like it's not compatible with your kernel tree. >From what I read when the latest version was released a couple of days ago, --integrate only works with linux-next newer than 2014-11-14. Unless you _need_ the drivers built in, I strongly recommend you just use their pre-patched tarballs instead of gentree as it's much easier. Thanks, -- Julian Calaby Email: julian.cal...@gmail.com Profile: http://www.google.com/profiles/julian.calaby/ -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] linux backports
Has anyone tried running linux backports on the sunxi-3.4 branch? I'm
trying to backport from linux-stable and here's the output:
tim@ebtim:~/engage/txcz_a20/backports$ ../env/bin/python gentree.py
--integrate --clean --gitdebug --git-revision master
~/engage/txcz_a20/linux-stable/ ~/engage/txcz_a20/linux-sunxi/
Get original source files from git ...
Applying patches from patches to
/home/tim/engage/txcz_a20/linux-sunxi/backports/ ...
Failed to apply changes from
collateral-evolutions/network/0027-genl-const/hwsim.patch
> patching file drivers/net/wireless/mac80211_hwsim.c
> Hunk #1 FAILED at 490.
> Hunk #2 succeeded at 2485 (offset -274 lines).
> 1 out of 2 hunks FAILED -- saving rejects to file
drivers/net/wireless/mac80211_hwsim.c.rej
Traceback (most recent call last):
File "gentree.py", line 1091, in
ret = _main()
File "gentree.py", line 724, in _main
logwrite=logwrite)
File "gentree.py", line 906, in process
apply_patches(args, "backport", source_dir, 'patches', bpid.target_dir,
logwrite)
File "gentree.py", line 552, in apply_patches
raise Exception('Patch failed')
Exception: Patch failed
I've never done this stuff before, so it's possible I'm also just doing it
wrong.
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Re: [linux-sunxi] [PATCH 3/9] clk: sunxi: Add prcm mod0 clock driver
Hi,
On 11/20/2014 07:24 PM, Chen-Yu Tsai wrote:
> Hi,
>
> On Thu, Nov 20, 2014 at 7:55 AM, Hans de Goede wrote:
>> Add a driver for mod0 clocks found in the prcm. Currently there is only
>> one mod0 clocks in the prcm, the ir clock.
>>
>> Signed-off-by: Hans de Goede
>> ---
>> Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
>> drivers/clk/sunxi/Makefile| 2 +-
>> drivers/clk/sunxi/clk-sun6i-prcm-mod0.c | 63
>> +++
>> drivers/mfd/sun6i-prcm.c | 14 +
>> 4 files changed, 79 insertions(+), 1 deletion(-)
>> create mode 100644 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
>>
>> diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
>> b/Documentation/devicetree/bindings/clock/sunxi.txt
>> index ed116df..342c75a 100644
>> --- a/Documentation/devicetree/bindings/clock/sunxi.txt
>> +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
>> @@ -56,6 +56,7 @@ Required properties:
>> "allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
>> "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
>> "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
>> + "allwinner,sun6i-a31-ir-clk" - for the ir clock on A31
>>
>> Required properties for all clocks:
>> - reg : shall be the control register address for the clock.
>> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
>> index 7ddc2b5..daf8b1c 100644
>> --- a/drivers/clk/sunxi/Makefile
>> +++ b/drivers/clk/sunxi/Makefile
>> @@ -10,4 +10,4 @@ obj-y += clk-sun8i-mbus.o
>>
>> obj-$(CONFIG_MFD_SUN6I_PRCM) += \
>> clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
>> - clk-sun8i-apb0.o
>> + clk-sun8i-apb0.o clk-sun6i-prcm-mod0.o
>> diff --git a/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
>> b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
>> new file mode 100644
>> index 000..e80f18e
>> --- /dev/null
>> +++ b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
>> @@ -0,0 +1,63 @@
>> +/*
>> + * Allwinner A31 PRCM mod0 clock driver
>> + *
>> + * Copyright (C) 2014 Hans de Goede
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#include "clk-factors.h"
>> +#include "clk-mod0.h"
>> +
>> +static const struct of_device_id sun6i_a31_prcm_mod0_clk_dt_ids[] = {
>> + { .compatible = "allwinner,sun6i-a31-ir-clk" },
>
> Could we use a generic name, like "sun6i-a31-prcm-mod0-clk"?
> IIRC, there is another one, the module clock for the 1-wire interface.
I wish we could use a generic name, but that does not work for mfd device
subnodes, as the mfd framework attaches resources (such as registers) to
the subnodes based on the compatible.
BTW it seems that that the 1-wire clock is not 100% mod0 clock compatible,
at least the ccmu.h in the allwinner SDK uses a different struct definition
for it.
Regards,
Hans
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Re: [linux-sunxi] [PATCH 3/9] clk: sunxi: Add prcm mod0 clock driver
Hi,
On Thu, Nov 20, 2014 at 7:55 AM, Hans de Goede wrote:
> Add a driver for mod0 clocks found in the prcm. Currently there is only
> one mod0 clocks in the prcm, the ir clock.
>
> Signed-off-by: Hans de Goede
> ---
> Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
> drivers/clk/sunxi/Makefile| 2 +-
> drivers/clk/sunxi/clk-sun6i-prcm-mod0.c | 63
> +++
> drivers/mfd/sun6i-prcm.c | 14 +
> 4 files changed, 79 insertions(+), 1 deletion(-)
> create mode 100644 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
>
> diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
> b/Documentation/devicetree/bindings/clock/sunxi.txt
> index ed116df..342c75a 100644
> --- a/Documentation/devicetree/bindings/clock/sunxi.txt
> +++ b/Documentation/devicetree/bindings/clock/sunxi.txt
> @@ -56,6 +56,7 @@ Required properties:
> "allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
> "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
> "allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
> + "allwinner,sun6i-a31-ir-clk" - for the ir clock on A31
>
> Required properties for all clocks:
> - reg : shall be the control register address for the clock.
> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> index 7ddc2b5..daf8b1c 100644
> --- a/drivers/clk/sunxi/Makefile
> +++ b/drivers/clk/sunxi/Makefile
> @@ -10,4 +10,4 @@ obj-y += clk-sun8i-mbus.o
>
> obj-$(CONFIG_MFD_SUN6I_PRCM) += \
> clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
> - clk-sun8i-apb0.o
> + clk-sun8i-apb0.o clk-sun6i-prcm-mod0.o
> diff --git a/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
> b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
> new file mode 100644
> index 000..e80f18e
> --- /dev/null
> +++ b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
> @@ -0,0 +1,63 @@
> +/*
> + * Allwinner A31 PRCM mod0 clock driver
> + *
> + * Copyright (C) 2014 Hans de Goede
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "clk-factors.h"
> +#include "clk-mod0.h"
> +
> +static const struct of_device_id sun6i_a31_prcm_mod0_clk_dt_ids[] = {
> + { .compatible = "allwinner,sun6i-a31-ir-clk" },
Could we use a generic name, like "sun6i-a31-prcm-mod0-clk"?
IIRC, there is another one, the module clock for the 1-wire interface.
Same for the DT patches.
ChenYu
> + { /* sentinel */ }
> +};
> +
> +static DEFINE_SPINLOCK(sun6i_prcm_mod0_lock);
> +
> +static int sun6i_a31_prcm_mod0_clk_probe(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> + struct resource *r;
> + void __iomem *reg;
> +
> + if (!np)
> + return -ENODEV;
> +
> + r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + reg = devm_ioremap_resource(&pdev->dev, r);
> + if (IS_ERR(reg))
> + return PTR_ERR(reg);
> +
> + sunxi_factors_register(np, &sun4i_a10_mod0_data,
> + &sun6i_prcm_mod0_lock, reg);
> + return 0;
> +}
> +
> +static struct platform_driver sun6i_a31_prcm_mod0_clk_driver = {
> + .driver = {
> + .name = "sun6i-a31-prcm-mod0-clk",
> + .of_match_table = sun6i_a31_prcm_mod0_clk_dt_ids,
> + },
> + .probe = sun6i_a31_prcm_mod0_clk_probe,
> +};
> +module_platform_driver(sun6i_a31_prcm_mod0_clk_driver);
> +
> +MODULE_DESCRIPTION("Allwinner A31 PRCM mod0 clock driver");
> +MODULE_AUTHOR("Hans de Goede ");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
> index 283ab8d..ff1254f 100644
> --- a/drivers/mfd/sun6i-prcm.c
> +++ b/drivers/mfd/sun6i-prcm.c
> @@ -41,6 +41,14 @@ static const struct resource
> sun6i_a31_apb0_gates_clk_res[] = {
> },
> };
>
> +static const struct resource sun6i_a31_ir_clk_res[] = {
> + {
> + .start = 0x54,
> + .end = 0x57,
> + .flags = IORESOURCE_MEM,
> + },
> +};
> +
> static const struct resource sun6i_a31_apb0_rstc_res[] = {
> {
> .start = 0xb0,
> @@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
> .resources = sun6i_a31_apb0_gates_clk_res,
> },
> {
> + .name = "sun6i-a31-ir-clk",
> + .of_compatible = "allwinner,sun6i
Re: [linux-sunxi] Re: New board: Merrii M2 (A20)
Hello, we are working on Merrii M2 too and the board works perfectly with 12V, we have the last sunxi-linux and a debian on the SD, I can send you an image if you want to test it On the other hand, do yo have power on the USBs and SATA? we have power booting with android but no power with sunxi-linux 2014-11-18 17:21 GMT+01:00 mahdi Chi : > I work on Merri M2 and manage to build Linux for it. > > when i power up board with USB OTG it boot good. > but when i power up the board with 12 v power socket it reboot repeatedly. > > do you have any advice to solve this problem? > > -- > You received this message because you are subscribed to a topic in the > Google Groups "linux-sunxi" group. > To unsubscribe from this topic, visit > https://groups.google.com/d/topic/linux-sunxi/trGVVwsFRUY/unsubscribe. > To unsubscribe from this group and all its topics, send an email to > linux-sunxi+unsubscr...@googlegroups.com. > For more options, visit https://groups.google.com/d/optout. > -- Movil: (+34) 633534429 e-mail: car...@zausan.com web: www.zausan.com C/ 9 de Octubre, 82 1ยช Planta despacho 6. 46520. Puerto de Sagunto, Valencia. -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] Re: [PATCH 5/9] rc: sunxi-cir: Add support for the larger fifo found on sun5i and sun6i
Em Thu, 20 Nov 2014 16:55:24 +0100
Hans de Goede escreveu:
> Add support for the larger fifo found on sun5i and sun6i, having a separate
> compatible for the ir found on sun5i & sun6i also is useful if we ever want
> to add ir transmit support, because the sun5i & sun6i version do not have
> transmit support.
>
> Note this commits also adds checking for the end-of-packet interrupt flag
> (which was already enabled), as the fifo-data-available interrupt flag only
> gets set when the trigger-level is exceeded. So far we've been getting away
> with not doing this because of the low trigger-level, but this is something
> which we should have done since day one.
>
> Signed-off-by: Hans de Goede
As this is meant to be merged via some other tree:
Acked-by: Mauro Carvalho Chehab
> ---
> .../devicetree/bindings/media/sunxi-ir.txt | 2 +-
> drivers/media/rc/sunxi-cir.c| 21
> -
> 2 files changed, 13 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt
> b/Documentation/devicetree/bindings/media/sunxi-ir.txt
> index 23dd5ad..5767128 100644
> --- a/Documentation/devicetree/bindings/media/sunxi-ir.txt
> +++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt
> @@ -1,7 +1,7 @@
> Device-Tree bindings for SUNXI IR controller found in sunXi SoC family
>
> Required properties:
> -- compatible : should be "allwinner,sun4i-a10-ir";
> +- compatible : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir"
> - clocks : list of clock specifiers, corresponding to
> entries in clock-names property;
> - clock-names: should contain "apb" and "ir" entries;
> diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
> index 895fb65..559b0e3 100644
> --- a/drivers/media/rc/sunxi-cir.c
> +++ b/drivers/media/rc/sunxi-cir.c
> @@ -56,12 +56,12 @@
> #define REG_RXINT_RAI_EN BIT(4)
>
> /* Rx FIFO available byte level */
> -#define REG_RXINT_RAL(val)(((val) << 8) & (GENMASK(11, 8)))
> +#define REG_RXINT_RAL(val)((val) << 8)
>
> /* Rx Interrupt Status */
> #define SUNXI_IR_RXSTA_REG0x30
> /* RX FIFO Get Available Counter */
> -#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (GENMASK(5, 0)))
> +#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
> /* Clear all interrupt status value */
> #define REG_RXSTA_CLEARALL0xff
>
> @@ -72,10 +72,6 @@
> /* CIR_REG register idle threshold */
> #define REG_CIR_ITHR(val)(((val) << 8) & (GENMASK(15, 8)))
>
> -/* Hardware supported fifo size */
> -#define SUNXI_IR_FIFO_SIZE16
> -/* How many messages in FIFO trigger IRQ */
> -#define TRIGGER_LEVEL 8
> /* Required frequency for IR0 or IR1 clock in CIR mode */
> #define SUNXI_IR_BASE_CLK 800
> /* Frequency after IR internal divider */
> @@ -94,6 +90,7 @@ struct sunxi_ir {
> struct rc_dev *rc;
> void __iomem*base;
> int irq;
> + int fifo_size;
> struct clk *clk;
> struct clk *apb_clk;
> struct reset_control *rst;
> @@ -115,11 +112,11 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
> /* clean all pending statuses */
> writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
>
> - if (status & REG_RXINT_RAI_EN) {
> + if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
> /* How many messages in fifo */
> rc = REG_RXSTA_GET_AC(status);
> /* Sanity check */
> - rc = rc > SUNXI_IR_FIFO_SIZE ? SUNXI_IR_FIFO_SIZE : rc;
> + rc = rc > ir->fifo_size ? ir->fifo_size : rc;
> /* If we have data */
> for (cnt = 0; cnt < rc; cnt++) {
> /* for each bit in fifo */
> @@ -156,6 +153,11 @@ static int sunxi_ir_probe(struct platform_device *pdev)
> if (!ir)
> return -ENOMEM;
>
> + if (of_device_is_compatible(dn, "allwinner,sun5i-a13-ir"))
> + ir->fifo_size = 64;
> + else
> + ir->fifo_size = 16;
> +
> /* Clock */
> ir->apb_clk = devm_clk_get(dev, "apb");
> if (IS_ERR(ir->apb_clk)) {
> @@ -271,7 +273,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
>* level
>*/
> writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
> -REG_RXINT_RAI_EN | REG_RXINT_RAL(TRIGGER_LEVEL - 1),
> +REG_RXINT_RAI_EN | REG_RXINT_RAL(ir->fifo_size / 2 - 1),
> ir->base + SUNXI_IR_RXINT_REG);
>
> /* Enable IR Module */
> @@ -319,6 +321,7 @@ static int sunxi_ir_remove(struct platform_device *pdev)
>
> static const struct of_device_id sunxi_ir_match[] = {
> { .compatible = "allwinner,sun4i-a10-ir", },
> + { .compatible = "allwinner,sun5i-a13-ir", },
> {},
> };
>
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[linux-sunxi] Re: [PATCH 4/9] rc: sunxi-cir: Add support for an optional reset controller
Em Thu, 20 Nov 2014 16:55:23 +0100
Hans de Goede escreveu:
> On sun6i the cir block is attached to the reset controller, add support
> for de-asserting the reset if a reset controller is specified in dt.
>
> Signed-off-by: Hans de Goede
As this is meant to be merged via some other tree:
Acked-by: Mauro Carvalho Chehab
> ---
> drivers/media/rc/sunxi-cir.c | 25 +++--
> 1 file changed, 23 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
> index bcee8e1..895fb65 100644
> --- a/drivers/media/rc/sunxi-cir.c
> +++ b/drivers/media/rc/sunxi-cir.c
> @@ -23,6 +23,7 @@
> #include
> #include
> #include
> +#include
> #include
>
> #define SUNXI_IR_DEV "sunxi-ir"
> @@ -95,6 +96,7 @@ struct sunxi_ir {
> int irq;
> struct clk *clk;
> struct clk *apb_clk;
> + struct reset_control *rst;
> const char *map_name;
> };
>
> @@ -166,15 +168,29 @@ static int sunxi_ir_probe(struct platform_device *pdev)
> return PTR_ERR(ir->clk);
> }
>
> + /* Reset (optional) */
> + ir->rst = devm_reset_control_get_optional(dev, NULL);
> + if (IS_ERR(ir->rst)) {
> + ret = PTR_ERR(ir->rst);
> + if (ret == -EPROBE_DEFER)
> + return ret;
> + ir->rst = NULL;
> + } else {
> + ret = reset_control_deassert(ir->rst);
> + if (ret)
> + return ret;
> + }
> +
> ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
> if (ret) {
> dev_err(dev, "set ir base clock failed!\n");
> - return ret;
> + goto exit_reset_assert;
> }
>
> if (clk_prepare_enable(ir->apb_clk)) {
> dev_err(dev, "try to enable apb_ir_clk failed\n");
> - return -EINVAL;
> + ret = -EINVAL;
> + goto exit_reset_assert;
> }
>
> if (clk_prepare_enable(ir->clk)) {
> @@ -271,6 +287,9 @@ exit_clkdisable_clk:
> clk_disable_unprepare(ir->clk);
> exit_clkdisable_apb_clk:
> clk_disable_unprepare(ir->apb_clk);
> +exit_reset_assert:
> + if (ir->rst)
> + reset_control_assert(ir->rst);
>
> return ret;
> }
> @@ -282,6 +301,8 @@ static int sunxi_ir_remove(struct platform_device *pdev)
>
> clk_disable_unprepare(ir->clk);
> clk_disable_unprepare(ir->apb_clk);
> + if (ir->rst)
> + reset_control_assert(ir->rst);
>
> spin_lock_irqsave(&ir->ir_lock, flags);
> /* disable IR IRQ */
--
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[linux-sunxi] [PATCH 8/9] ARM: dts: sun6i: Add pinmux settings for the ir pins
Add pinmux settings for the ir receive pin of the A31.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index d33e758..90b7537 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -922,6 +922,13 @@
#interrupt-cells = <2>;
#size-cells = <0>;
#gpio-cells = <3>;
+
+ ir_pins_a: ir@0 {
+ allwinner,pins = "PL4";
+ allwinner,function = "s_ir";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
};
};
};
--
2.1.0
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[linux-sunxi] [PATCH 4/9] rc: sunxi-cir: Add support for an optional reset controller
On sun6i the cir block is attached to the reset controller, add support
for de-asserting the reset if a reset controller is specified in dt.
Signed-off-by: Hans de Goede
---
drivers/media/rc/sunxi-cir.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index bcee8e1..895fb65 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -23,6 +23,7 @@
#include
#include
#include
+#include
#include
#define SUNXI_IR_DEV "sunxi-ir"
@@ -95,6 +96,7 @@ struct sunxi_ir {
int irq;
struct clk *clk;
struct clk *apb_clk;
+ struct reset_control *rst;
const char *map_name;
};
@@ -166,15 +168,29 @@ static int sunxi_ir_probe(struct platform_device *pdev)
return PTR_ERR(ir->clk);
}
+ /* Reset (optional) */
+ ir->rst = devm_reset_control_get_optional(dev, NULL);
+ if (IS_ERR(ir->rst)) {
+ ret = PTR_ERR(ir->rst);
+ if (ret == -EPROBE_DEFER)
+ return ret;
+ ir->rst = NULL;
+ } else {
+ ret = reset_control_deassert(ir->rst);
+ if (ret)
+ return ret;
+ }
+
ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
if (ret) {
dev_err(dev, "set ir base clock failed!\n");
- return ret;
+ goto exit_reset_assert;
}
if (clk_prepare_enable(ir->apb_clk)) {
dev_err(dev, "try to enable apb_ir_clk failed\n");
- return -EINVAL;
+ ret = -EINVAL;
+ goto exit_reset_assert;
}
if (clk_prepare_enable(ir->clk)) {
@@ -271,6 +287,9 @@ exit_clkdisable_clk:
clk_disable_unprepare(ir->clk);
exit_clkdisable_apb_clk:
clk_disable_unprepare(ir->apb_clk);
+exit_reset_assert:
+ if (ir->rst)
+ reset_control_assert(ir->rst);
return ret;
}
@@ -282,6 +301,8 @@ static int sunxi_ir_remove(struct platform_device *pdev)
clk_disable_unprepare(ir->clk);
clk_disable_unprepare(ir->apb_clk);
+ if (ir->rst)
+ reset_control_assert(ir->rst);
spin_lock_irqsave(&ir->ir_lock, flags);
/* disable IR IRQ */
--
2.1.0
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[linux-sunxi] [PATCH 0/9] sun6i / A31 ir receiver support
Hi Maxime, et al, Here is a patch series adding support for the ir receiver found on sun6i, it is the same one as found on sun5i (which is very similar to the sun4i one we already support), except that as usual on sun6i it needs a reset to be de-asserted. More interesting is the clocking of it, it is clocked through a clock which comes from the prcm module, I guess this is done so that the remote can keep working with all the main clocks turned off. So this patch series starts with adding support for this new ir clock. I've discussed how to best upstream this with Mauro Chehab, the media maintainer, and since this only touches sunxi-cir.c under the media tree, he is fine with everything going upstream to your tree. Regards, Hans -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH 9/9] ARM: dts: sun6i: Enable ir receiver on the Mele M9
The Mele M9 has an ir receiver, enable it.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31-m9.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts
b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 4202c64..94ddf9c 100644
--- a/arch/arm/boot/dts/sun6i-a31-m9.dts
+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts
@@ -83,6 +83,12 @@
reg = <1>;
};
};
+
+ ir@01f02000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_pins_a>;
+ status = "okay";
+ };
};
leds {
--
2.1.0
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[linux-sunxi] [PATCH 7/9] ARM: dts: sun6i: Add ir node
Add a node for the ir receiver found on the A31.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 4aa628b..d33e758 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -900,6 +900,16 @@
reg = <0x01f01c00 0x300>;
};
+ ir@01f02000 {
+ compatible = "allwinner,sun5i-a13-ir";
+ clocks = <&apb0_gates 1>, <&ir_clk>;
+ clock-names = "apb", "ir";
+ resets = <&apb0_rst 1>;
+ interrupts = <0 37 4>;
+ reg = <0x01f02000 0x40>;
+ status = "disabled";
+ };
+
r_pio: pinctrl@01f02c00 {
compatible = "allwinner,sun6i-a31-r-pinctrl";
reg = <0x01f02c00 0x400>;
--
2.1.0
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[linux-sunxi] [PATCH 5/9] rc: sunxi-cir: Add support for the larger fifo found on sun5i and sun6i
Add support for the larger fifo found on sun5i and sun6i, having a separate
compatible for the ir found on sun5i & sun6i also is useful if we ever want
to add ir transmit support, because the sun5i & sun6i version do not have
transmit support.
Note this commits also adds checking for the end-of-packet interrupt flag
(which was already enabled), as the fifo-data-available interrupt flag only
gets set when the trigger-level is exceeded. So far we've been getting away
with not doing this because of the low trigger-level, but this is something
which we should have done since day one.
Signed-off-by: Hans de Goede
---
.../devicetree/bindings/media/sunxi-ir.txt | 2 +-
drivers/media/rc/sunxi-cir.c| 21 -
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt
b/Documentation/devicetree/bindings/media/sunxi-ir.txt
index 23dd5ad..5767128 100644
--- a/Documentation/devicetree/bindings/media/sunxi-ir.txt
+++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt
@@ -1,7 +1,7 @@
Device-Tree bindings for SUNXI IR controller found in sunXi SoC family
Required properties:
-- compatible : should be "allwinner,sun4i-a10-ir";
+- compatible : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir"
- clocks : list of clock specifiers, corresponding to
entries in clock-names property;
- clock-names : should contain "apb" and "ir" entries;
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 895fb65..559b0e3 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -56,12 +56,12 @@
#define REG_RXINT_RAI_EN BIT(4)
/* Rx FIFO available byte level */
-#define REG_RXINT_RAL(val)(((val) << 8) & (GENMASK(11, 8)))
+#define REG_RXINT_RAL(val)((val) << 8)
/* Rx Interrupt Status */
#define SUNXI_IR_RXSTA_REG0x30
/* RX FIFO Get Available Counter */
-#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (GENMASK(5, 0)))
+#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (ir->fifo_size * 2 - 1))
/* Clear all interrupt status value */
#define REG_RXSTA_CLEARALL0xff
@@ -72,10 +72,6 @@
/* CIR_REG register idle threshold */
#define REG_CIR_ITHR(val)(((val) << 8) & (GENMASK(15, 8)))
-/* Hardware supported fifo size */
-#define SUNXI_IR_FIFO_SIZE16
-/* How many messages in FIFO trigger IRQ */
-#define TRIGGER_LEVEL 8
/* Required frequency for IR0 or IR1 clock in CIR mode */
#define SUNXI_IR_BASE_CLK 800
/* Frequency after IR internal divider */
@@ -94,6 +90,7 @@ struct sunxi_ir {
struct rc_dev *rc;
void __iomem*base;
int irq;
+ int fifo_size;
struct clk *clk;
struct clk *apb_clk;
struct reset_control *rst;
@@ -115,11 +112,11 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
/* clean all pending statuses */
writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
- if (status & REG_RXINT_RAI_EN) {
+ if (status & (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
/* How many messages in fifo */
rc = REG_RXSTA_GET_AC(status);
/* Sanity check */
- rc = rc > SUNXI_IR_FIFO_SIZE ? SUNXI_IR_FIFO_SIZE : rc;
+ rc = rc > ir->fifo_size ? ir->fifo_size : rc;
/* If we have data */
for (cnt = 0; cnt < rc; cnt++) {
/* for each bit in fifo */
@@ -156,6 +153,11 @@ static int sunxi_ir_probe(struct platform_device *pdev)
if (!ir)
return -ENOMEM;
+ if (of_device_is_compatible(dn, "allwinner,sun5i-a13-ir"))
+ ir->fifo_size = 64;
+ else
+ ir->fifo_size = 16;
+
/* Clock */
ir->apb_clk = devm_clk_get(dev, "apb");
if (IS_ERR(ir->apb_clk)) {
@@ -271,7 +273,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
* level
*/
writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
- REG_RXINT_RAI_EN | REG_RXINT_RAL(TRIGGER_LEVEL - 1),
+ REG_RXINT_RAI_EN | REG_RXINT_RAL(ir->fifo_size / 2 - 1),
ir->base + SUNXI_IR_RXINT_REG);
/* Enable IR Module */
@@ -319,6 +321,7 @@ static int sunxi_ir_remove(struct platform_device *pdev)
static const struct of_device_id sunxi_ir_match[] = {
{ .compatible = "allwinner,sun4i-a10-ir", },
+ { .compatible = "allwinner,sun5i-a13-ir", },
{},
};
--
2.1.0
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[linux-sunxi] [PATCH 6/9] ARM: dts: sun6i: Add ir_clk node
Add an ir_clk sub-node to the prcm node.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index a01b215..4aa628b 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -882,6 +882,13 @@
"apb0_i2c";
};
+ ir_clk: ir_clk {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun6i-a31-ir-clk";
+ clocks = <&osc32k>, <&osc24M>;
+ clock-output-names = "ir";
+ };
+
apb0_rst: apb0_rst {
compatible = "allwinner,sun6i-a31-clock-reset";
#reset-cells = <1>;
--
2.1.0
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[linux-sunxi] [PATCH 2/9] clk: sunxi: Make sun4i_a10_mod0_data available outside of clk-mod0.c
The sun6i prcm has mod0 compatible clocks, these need a separate driver
because the prcm uses the mfd framework, but we do want to re-use the
standard mod0 clk handling from clk-mod0.c for this, export
sun4i_a10_mod0_data, so that the prcm mod0 clk driver can use this.
Signed-off-by: Hans de Goede
---
drivers/clk/sunxi/clk-mod0.c | 2 +-
drivers/clk/sunxi/clk-mod0.h | 8
2 files changed, 9 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/sunxi/clk-mod0.h
diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index 9530833..0989502 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -67,7 +67,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
.pwidth = 2,
};
-static const struct factors_data sun4i_a10_mod0_data __initconst = {
+const struct factors_data sun4i_a10_mod0_data = {
.enable = 31,
.mux = 24,
.table = &sun4i_a10_mod0_config,
diff --git a/drivers/clk/sunxi/clk-mod0.h b/drivers/clk/sunxi/clk-mod0.h
new file mode 100644
index 000..49aa9ab
--- /dev/null
+++ b/drivers/clk/sunxi/clk-mod0.h
@@ -0,0 +1,8 @@
+#ifndef __MACH_SUNXI_CLK_MOD0_H
+#define __MACH_SUNXI_CLK_MOD0_H
+
+#include "clk-factors.h"
+
+extern const struct factors_data sun4i_a10_mod0_data;
+
+#endif
--
2.1.0
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[linux-sunxi] [PATCH 3/9] clk: sunxi: Add prcm mod0 clock driver
Add a driver for mod0 clocks found in the prcm. Currently there is only
one mod0 clocks in the prcm, the ir clock.
Signed-off-by: Hans de Goede
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/Makefile| 2 +-
drivers/clk/sunxi/clk-sun6i-prcm-mod0.c | 63 +++
drivers/mfd/sun6i-prcm.c | 14 +
4 files changed, 79 insertions(+), 1 deletion(-)
create mode 100644 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt
b/Documentation/devicetree/bindings/clock/sunxi.txt
index ed116df..342c75a 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -56,6 +56,7 @@ Required properties:
"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
+ "allwinner,sun6i-a31-ir-clk" - for the ir clock on A31
Required properties for all clocks:
- reg : shall be the control register address for the clock.
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 7ddc2b5..daf8b1c 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -10,4 +10,4 @@ obj-y += clk-sun8i-mbus.o
obj-$(CONFIG_MFD_SUN6I_PRCM) += \
clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
- clk-sun8i-apb0.o
+ clk-sun8i-apb0.o clk-sun6i-prcm-mod0.o
diff --git a/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
new file mode 100644
index 000..e80f18e
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
@@ -0,0 +1,63 @@
+/*
+ * Allwinner A31 PRCM mod0 clock driver
+ *
+ * Copyright (C) 2014 Hans de Goede
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include "clk-factors.h"
+#include "clk-mod0.h"
+
+static const struct of_device_id sun6i_a31_prcm_mod0_clk_dt_ids[] = {
+ { .compatible = "allwinner,sun6i-a31-ir-clk" },
+ { /* sentinel */ }
+};
+
+static DEFINE_SPINLOCK(sun6i_prcm_mod0_lock);
+
+static int sun6i_a31_prcm_mod0_clk_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ struct resource *r;
+ void __iomem *reg;
+
+ if (!np)
+ return -ENODEV;
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ reg = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(reg))
+ return PTR_ERR(reg);
+
+ sunxi_factors_register(np, &sun4i_a10_mod0_data,
+ &sun6i_prcm_mod0_lock, reg);
+ return 0;
+}
+
+static struct platform_driver sun6i_a31_prcm_mod0_clk_driver = {
+ .driver = {
+ .name = "sun6i-a31-prcm-mod0-clk",
+ .of_match_table = sun6i_a31_prcm_mod0_clk_dt_ids,
+ },
+ .probe = sun6i_a31_prcm_mod0_clk_probe,
+};
+module_platform_driver(sun6i_a31_prcm_mod0_clk_driver);
+
+MODULE_DESCRIPTION("Allwinner A31 PRCM mod0 clock driver");
+MODULE_AUTHOR("Hans de Goede ");
+MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
index 283ab8d..ff1254f 100644
--- a/drivers/mfd/sun6i-prcm.c
+++ b/drivers/mfd/sun6i-prcm.c
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[]
= {
},
};
+static const struct resource sun6i_a31_ir_clk_res[] = {
+ {
+ .start = 0x54,
+ .end = 0x57,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
static const struct resource sun6i_a31_apb0_rstc_res[] = {
{
.start = 0xb0,
@@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
.resources = sun6i_a31_apb0_gates_clk_res,
},
{
+ .name = "sun6i-a31-ir-clk",
+ .of_compatible = "allwinner,sun6i-a31-ir-clk",
+ .num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
+ .resources = sun6i_a31_ir_clk_res,
+ },
+ {
.name = "sun6i-a31-apb0-clock-reset",
.of_compatible = "allwinner,sun6i-a31-clock-reset",
.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),
--
2.1.0
--
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[linux-sunxi] [PATCH 1/9] clk: sunxi: Give sunxi_factors_register a registers parameter
Before this commit sunxi_factors_register uses of_iomap(node, 0) to get
the clk registers. The sun6i prcm has factor clocks, for which we want to
use sunxi_factors_register, but of_iomap(node, 0) does not work for the prcm
factor clocks, because the prcm uses the mfd framework, so the registers
are not part of the dt-node, instead they are added to the platform_device,
as platform_device resources.
This commit makes getting the registers the callers duty, so that
sunxi_factors_register can be used with mfd instantiated platform device too.
Signed-off-by: Hans de Goede
---
drivers/clk/sunxi/clk-factors.c| 10 --
drivers/clk/sunxi/clk-factors.h| 7 ---
drivers/clk/sunxi/clk-mod0.c | 6 --
drivers/clk/sunxi/clk-sun8i-mbus.c | 2 +-
drivers/clk/sunxi/clk-sunxi.c | 3 ++-
5 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index f83ba09..fc4f4b5 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -156,9 +156,10 @@ static const struct clk_ops clk_factors_ops = {
.set_rate = clk_factors_set_rate,
};
-struct clk * __init sunxi_factors_register(struct device_node *node,
- const struct factors_data *data,
- spinlock_t *lock)
+struct clk *sunxi_factors_register(struct device_node *node,
+ const struct factors_data *data,
+ spinlock_t *lock,
+ void __iomem *reg)
{
struct clk *clk;
struct clk_factors *factors;
@@ -168,11 +169,8 @@ struct clk * __init sunxi_factors_register(struct
device_node *node,
struct clk_hw *mux_hw = NULL;
const char *clk_name = node->name;
const char *parents[FACTORS_MAX_PARENTS];
- void __iomem *reg;
int i = 0;
- reg = of_iomap(node, 0);
-
/* if we have a mux, we will have >1 parents */
while (i < FACTORS_MAX_PARENTS &&
(parents[i] = of_clk_get_parent_name(node, i)) != NULL)
diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
index 9913840..1f5526d 100644
--- a/drivers/clk/sunxi/clk-factors.h
+++ b/drivers/clk/sunxi/clk-factors.h
@@ -37,8 +37,9 @@ struct clk_factors {
spinlock_t *lock;
};
-struct clk * __init sunxi_factors_register(struct device_node *node,
- const struct factors_data *data,
- spinlock_t *lock);
+struct clk *sunxi_factors_register(struct device_node *node,
+ const struct factors_data *data,
+ spinlock_t *lock,
+ void __iomem *reg);
#endif
diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index 4a56385..9530833 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -78,7 +78,8 @@ static DEFINE_SPINLOCK(sun4i_a10_mod0_lock);
static void __init sun4i_a10_mod0_setup(struct device_node *node)
{
- sunxi_factors_register(node, &sun4i_a10_mod0_data,
&sun4i_a10_mod0_lock);
+ sunxi_factors_register(node, &sun4i_a10_mod0_data,
+ &sun4i_a10_mod0_lock, of_iomap(node, 0));
}
CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk",
sun4i_a10_mod0_setup);
@@ -86,7 +87,8 @@ static DEFINE_SPINLOCK(sun5i_a13_mbus_lock);
static void __init sun5i_a13_mbus_setup(struct device_node *node)
{
- struct clk *mbus = sunxi_factors_register(node, &sun4i_a10_mod0_data,
&sun5i_a13_mbus_lock);
+ struct clk *mbus = sunxi_factors_register(node, &sun4i_a10_mod0_data,
+ &sun5i_a13_mbus_lock, of_iomap(node, 0));
/* The MBUS clocks needs to be always enabled */
__clk_get(mbus);
diff --git a/drivers/clk/sunxi/clk-sun8i-mbus.c
b/drivers/clk/sunxi/clk-sun8i-mbus.c
index 8e49b44..444d603 100644
--- a/drivers/clk/sunxi/clk-sun8i-mbus.c
+++ b/drivers/clk/sunxi/clk-sun8i-mbus.c
@@ -69,7 +69,7 @@ static DEFINE_SPINLOCK(sun8i_a23_mbus_lock);
static void __init sun8i_a23_mbus_setup(struct device_node *node)
{
struct clk *mbus = sunxi_factors_register(node, &sun8i_a23_mbus_data,
- &sun8i_a23_mbus_lock);
+ &sun8i_a23_mbus_lock, of_iomap(node, 0));
/* The MBUS clocks needs to be always enabled */
__clk_get(mbus);
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index d5dc951..f19e0f9 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -521,7 +521,8 @@ static const struct factors_data sun7i_a20_out_data
__initconst = {
static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
