[linux-sunxi] [PATCH 2/5] pinctrl: sun6i: Add A31s pinctrl support

2014-11-23 Thread Hans de Goede
The A31s is a stripped down version of the A31, as such it is missing some
pins and some functions on some pins.

The new pinctrl-sun6i-a31s.c this commit adds is a copy of pinctrl-sun6i-a31s.c
with the missing pins and functions removed.

Note there is no a31s specific version of pinctrl-sun6i-a31-r.c, as the
prcm pins are identical between the A31 and the A31s.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt   |   1 +
 drivers/pinctrl/sunxi/Kconfig  |   4 +
 drivers/pinctrl/sunxi/Makefile |   1 +
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c | 814 +
 4 files changed, 820 insertions(+)
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c

diff --git 
a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt 
b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
index 93ce12e..fdd8046 100644
--- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
@@ -11,6 +11,7 @@ Required properties:
   allwinner,sun5i-a10s-pinctrl
   allwinner,sun5i-a13-pinctrl
   allwinner,sun6i-a31-pinctrl
+  allwinner,sun6i-a31s-pinctrl
   allwinner,sun6i-a31-r-pinctrl
   allwinner,sun7i-a20-pinctrl
   allwinner,sun8i-a23-pinctrl
diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
index a5e10f7..6cffe38 100644
--- a/drivers/pinctrl/sunxi/Kconfig
+++ b/drivers/pinctrl/sunxi/Kconfig
@@ -21,6 +21,10 @@ config PINCTRL_SUN6I_A31
def_bool MACH_SUN6I
select PINCTRL_SUNXI_COMMON
 
+config PINCTRL_SUN6I_A31S
+   def_bool MACH_SUN6I
+   select PINCTRL_SUNXI_COMMON
+
 config PINCTRL_SUN6I_A31_R
def_bool MACH_SUN6I
depends on RESET_CONTROLLER
diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile
index e797efb..2f82290 100644
--- a/drivers/pinctrl/sunxi/Makefile
+++ b/drivers/pinctrl/sunxi/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_PINCTRL_SUN4I_A10) += pinctrl-sun4i-a10.o
 obj-$(CONFIG_PINCTRL_SUN5I_A10S)   += pinctrl-sun5i-a10s.o
 obj-$(CONFIG_PINCTRL_SUN5I_A13)+= pinctrl-sun5i-a13.o
 obj-$(CONFIG_PINCTRL_SUN6I_A31)+= pinctrl-sun6i-a31.o
+obj-$(CONFIG_PINCTRL_SUN6I_A31S)   += pinctrl-sun6i-a31s.o
 obj-$(CONFIG_PINCTRL_SUN6I_A31_R)  += pinctrl-sun6i-a31-r.o
 obj-$(CONFIG_PINCTRL_SUN7I_A20)+= pinctrl-sun7i-a20.o
 obj-$(CONFIG_PINCTRL_SUN8I_A23)+= pinctrl-sun8i-a23.o
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c 
b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c
new file mode 100644
index 000..42ee373
--- /dev/null
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31s.c
@@ -0,0 +1,814 @@
+/*
+ * Allwinner A31 SoCs pinctrl driver.
+ *
+ * Copyright (C) 2014 Maxime Ripard
+ *
+ * Maxime Ripard maxime.rip...@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/pinctrl/pinctrl.h
+
+#include pinctrl-sunxi.h
+
+static const struct sunxi_desc_pin sun6i_a31s_pins[] = {
+   SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
+ SUNXI_FUNCTION(0x0, gpio_in),
+ SUNXI_FUNCTION(0x1, gpio_out),
+ SUNXI_FUNCTION(0x2, gmac),  /* TXD0 */
+ SUNXI_FUNCTION(0x4, uart1), /* DTR */
+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)),  /* PA_EINT0 */
+   SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
+ SUNXI_FUNCTION(0x0, gpio_in),
+ SUNXI_FUNCTION(0x1, gpio_out),
+ SUNXI_FUNCTION(0x2, gmac),  /* TXD1 */
+ SUNXI_FUNCTION(0x4, uart1), /* DSR */
+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)),  /* PA_EINT1 */
+   SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
+ SUNXI_FUNCTION(0x0, gpio_in),
+ SUNXI_FUNCTION(0x1, gpio_out),
+ SUNXI_FUNCTION(0x2, gmac),  /* TXD2 */
+ SUNXI_FUNCTION(0x4, uart1), /* DCD */
+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)),  /* PA_EINT2 */
+   SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
+ SUNXI_FUNCTION(0x0, gpio_in),
+ SUNXI_FUNCTION(0x1, gpio_out),
+ SUNXI_FUNCTION(0x2, gmac),  /* TXD3 */
+ SUNXI_FUNCTION(0x4, uart1), /* RING */
+ SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)),  /* PA_EINT3 */
+   SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
+ SUNXI_FUNCTION(0x0, gpio_in),
+ SUNXI_FUNCTION(0x1, gpio_out),
+ SUNXI_FUNCTION(0x2, gmac),  /* TXD4 */
+ SUNXI_FUNCTION(0x4, uart1),

[linux-sunxi] [PATCH 1/5] pinctrl: sun6i: Add some missing functions, fix i2c3 muxing

2014-11-23 Thread Hans de Goede
While working on pinctrl for the A31s, I noticed that function 4 of
PA15 - PA18 was missing, add these.

I also noticed that i2c3 sck / sda got assigned to PB5  PB6, this should
be PB4  PB5, fix this as well.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c 
b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
index a2b4b85..fb19e15 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c
@@ -134,24 +134,28 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, gmac),  /* RXD4 */
  SUNXI_FUNCTION(0x3, lcd1),  /* D15 */
+ SUNXI_FUNCTION(0x4, clk_a_out),
  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
  SUNXI_FUNCTION(0x0, gpio_in),
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, gmac),  /* RXD5 */
  SUNXI_FUNCTION(0x3, lcd1),  /* D16 */
+ SUNXI_FUNCTION(0x4, dmic),  /* CLK */
  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
  SUNXI_FUNCTION(0x0, gpio_in),
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, gmac),  /* RXD6 */
  SUNXI_FUNCTION(0x3, lcd1),  /* D17 */
+ SUNXI_FUNCTION(0x4, dmic),  /* DIN */
  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
  SUNXI_FUNCTION(0x0, gpio_in),
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, gmac),  /* RXD7 */
  SUNXI_FUNCTION(0x3, lcd1),  /* D18 */
+ SUNXI_FUNCTION(0x4, clk_b_out),
  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
  SUNXI_FUNCTION(0x0, gpio_in),
@@ -207,6 +211,7 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, gmac),  /* MDC */
  SUNXI_FUNCTION(0x3, lcd1),  /* HSYNC */
+ SUNXI_FUNCTION(0x4, clk_c_out),
  SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 26)), /* PA_EINT26 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 27),
  SUNXI_FUNCTION(0x0, gpio_in),
@@ -242,20 +247,20 @@ static const struct sunxi_desc_pin sun6i_a31_pins[] = {
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, i2s0),  /* DO1 */
  SUNXI_FUNCTION(0x3, uart3), /* RTS */
+ SUNXI_FUNCTION(0x4, i2c3),  /* SCK */
  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)),  /* PB_EINT4 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 5),
  SUNXI_FUNCTION(0x0, gpio_in),
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, i2s0),  /* DO2 */
  SUNXI_FUNCTION(0x3, uart3), /* TX */
- SUNXI_FUNCTION(0x4, i2c3),  /* SCK */
+ SUNXI_FUNCTION(0x4, i2c3),  /* SDA */
  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)),  /* PB_EINT5 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 6),
  SUNXI_FUNCTION(0x0, gpio_in),
  SUNXI_FUNCTION(0x1, gpio_out),
  SUNXI_FUNCTION(0x2, i2s0),  /* DO3 */
  SUNXI_FUNCTION(0x3, uart3), /* RX */
- SUNXI_FUNCTION(0x4, i2c3),  /* SDA */
  SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)),  /* PB_EINT6 */
SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 7),
  SUNXI_FUNCTION(0x0, gpio_in),
-- 
2.1.0

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[linux-sunxi] [PATCH 4/5] ARM: dts: sun6i: Add sun6i-a31s.dtsi

2014-11-23 Thread Hans de Goede
Add a dtsi file for A31s based boards. This is a copy of sun6i-a31.dtsi, with:

-The main pinctrl compatible changed to allwinner,sun6i-a31s.dtsi
-The ohci2 controller is present according to the data-sheet, but not routed
 to the outside, so remove it from the dtsi as having an always disabled node
 is not useful.

All the other nodes present in the original sun6i-a31.dtsi are present in
the A31s too, and are 100% compatible.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/boot/dts/sun6i-a31s.dtsi | 925 ++
 1 file changed, 925 insertions(+)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s.dtsi

diff --git a/arch/arm/boot/dts/sun6i-a31s.dtsi 
b/arch/arm/boot/dts/sun6i-a31s.dtsi
new file mode 100644
index 000..b3b99a9
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s.dtsi
@@ -0,0 +1,925 @@
+/*
+ * Copyright 2013 Maxime Ripard
+ *
+ * Maxime Ripard maxime.rip...@free-electrons.com
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this library; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the Software), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/include/ skeleton.dtsi
+
+/ {
+   interrupt-parent = gic;
+
+   aliases {
+   serial0 = uart0;
+   serial1 = uart1;
+   serial2 = uart2;
+   serial3 = uart3;
+   serial4 = uart4;
+   serial5 = uart5;
+   ethernet0 = gmac;
+   };
+
+   chosen {
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges;
+
+   framebuffer@0 {
+   compatible = allwinner,simple-framebuffer, 
simple-framebuffer;
+   allwinner,pipeline = de_be0-lcd0-hdmi;
+   clocks = pll6;
+   status = disabled;
+   };
+   };
+
+   cpus {
+   enable-method = allwinner,sun6i-a31;
+   #address-cells = 1;
+   #size-cells = 0;
+
+   cpu@0 {
+   compatible = arm,cortex-a7;
+   device_type = cpu;
+   reg = 0;
+   };
+
+   cpu@1 {
+   compatible = arm,cortex-a7;
+   device_type = cpu;
+   reg = 1;
+   };
+
+   cpu@2 {
+   compatible = arm,cortex-a7;
+   device_type = cpu;
+   reg = 2;
+   };
+
+   cpu@3 {
+   compatible = arm,cortex-a7;
+   device_type = cpu;
+   reg = 3;
+   };
+   };
+
+   memory {
+   reg = 0x4000 0x8000;
+   };
+
+   pmu {
+   compatible = arm,cortex-a7-pmu, arm,cortex-a15-pmu;
+   interrupts = 0 120 4,
+0 121 4,
+   

[linux-sunxi] [PATCH 5/5] ARM: dts: sun6i: Add dts file for CSQ CS908 board

2014-11-23 Thread Hans de Goede
The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND,
rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG
controller), ethernet, 3.5 mm jack with a/v out and hdmi out:

http://www.geekbuying.com/item/CS908-Allwinner-A31S-Quad-Core-1-2GHz-Android-4-4-Mini-TV-Box-HDMI-HDD-Player-1G-8G-WIFI-Miracast---Black-95.html

Note it has no sdcard slot and therefore can only be fel booted.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/boot/dts/Makefile |   3 +-
 arch/arm/boot/dts/sun6i-a31s-cs908.dts | 109 +
 2 files changed, 111 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/sun6i-a31s-cs908.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8ebfa76..0c0201c 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -434,7 +434,8 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-app4-evb1.dtb \
sun6i-a31-colombus.dtb \
sun6i-a31-hummingbird.dtb \
-   sun6i-a31-m9.dtb
+   sun6i-a31-m9.dtb \
+   sun6i-a31s-cs908.dtb
 dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-bananapi.dtb \
sun7i-a20-cubieboard2.dtb \
diff --git a/arch/arm/boot/dts/sun6i-a31s-cs908.dts 
b/arch/arm/boot/dts/sun6i-a31s-cs908.dts
new file mode 100644
index 000..48d3a70
--- /dev/null
+++ b/arch/arm/boot/dts/sun6i-a31s-cs908.dts
@@ -0,0 +1,109 @@
+/*
+ * Copyright 2014 Hans de Goede hdego...@redhat.com
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this library; if not, write to the Free
+ * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the Software), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+/include/ sun6i-a31s.dtsi
+
+/ {
+   model = CSQ CS908 top set box;
+   compatible = csq,cs908, allwinner,sun6i-a31s;
+
+   chosen {
+   bootargs = earlyprintk console=ttyS0,115200;
+   };
+
+   soc@01c0 {
+   usbphy: phy@01c19400 {
+   status = okay;
+   };
+
+   ehci0: usb@01c1a000 {
+   status = okay;
+   };
+
+   ehci1: usb@01c1b000 {
+   status = okay;
+   };
+
+   ohci1: usb@01c1b400 {
+   status = okay;
+   };
+
+   pio: pinctrl@01c20800 {
+   usb1_vbus_pin_csq908: usb1_vbus_pin@0 {
+   allwinner,pins = PC27;
+   allwinner,function = gpio_out;
+   allwinner,drive = 0;
+   allwinner,pull = 0;
+   };
+   };
+
+   uart0: serial@01c28000 {
+   pinctrl-names = default;
+   pinctrl-0 = uart0_pins_a;
+   status = okay;
+   };
+
+   gmac: ethernet@01c3 {
+   pinctrl-names = 

[linux-sunxi] [PATCH 0/5] sun6i: Add A31s (pinctrl) support

2014-11-23 Thread Hans de Goede
Hi Maxime and Linus,

Here is a patch series for the A31s, a variant of the already supported
A31 with less pins.

As such this patch-set introduces pinctrl support for it + a dtsi + the
first board using it.

I'm not sure if sunxi pinctrl patches go through Maxime's tree or Linus' tree,
so I'll leave figuring out who takes what patches to you two.

Regards,

Hans

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[linux-sunxi] [PATCH v2 4/9] rc: sunxi-cir: Add support for an optional reset controller

2014-11-23 Thread Hans de Goede
On sun6i the cir block is attached to the reset controller, add support
for de-asserting the reset if a reset controller is specified in dt.

Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Mauro Carvalho Chehab mche...@osg.samsung.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
---
 .../devicetree/bindings/media/sunxi-ir.txt |  2 ++
 drivers/media/rc/sunxi-cir.c   | 25 --
 2 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt 
b/Documentation/devicetree/bindings/media/sunxi-ir.txt
index 23dd5ad..6b70b9b 100644
--- a/Documentation/devicetree/bindings/media/sunxi-ir.txt
+++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt
@@ -10,6 +10,7 @@ Required properties:
 
 Optional properties:
 - linux,rc-map-name : Remote control map name.
+- resets : phandle + reset specifier pair
 
 Example:
 
@@ -17,6 +18,7 @@ ir0: ir@01c21800 {
compatible = allwinner,sun4i-a10-ir;
clocks = apb0_gates 6, ir0_clk;
clock-names = apb, ir;
+   resets = apb0_rst 1;
interrupts = 0 5 1;
reg = 0x01C21800 0x40;
linux,rc-map-name = rc-rc6-mce;
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index bcee8e1..895fb65 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -23,6 +23,7 @@
 #include linux/interrupt.h
 #include linux/module.h
 #include linux/of_platform.h
+#include linux/reset.h
 #include media/rc-core.h
 
 #define SUNXI_IR_DEV sunxi-ir
@@ -95,6 +96,7 @@ struct sunxi_ir {
int irq;
struct clk  *clk;
struct clk  *apb_clk;
+   struct reset_control *rst;
const char  *map_name;
 };
 
@@ -166,15 +168,29 @@ static int sunxi_ir_probe(struct platform_device *pdev)
return PTR_ERR(ir-clk);
}
 
+   /* Reset (optional) */
+   ir-rst = devm_reset_control_get_optional(dev, NULL);
+   if (IS_ERR(ir-rst)) {
+   ret = PTR_ERR(ir-rst);
+   if (ret == -EPROBE_DEFER)
+   return ret;
+   ir-rst = NULL;
+   } else {
+   ret = reset_control_deassert(ir-rst);
+   if (ret)
+   return ret;
+   }
+
ret = clk_set_rate(ir-clk, SUNXI_IR_BASE_CLK);
if (ret) {
dev_err(dev, set ir base clock failed!\n);
-   return ret;
+   goto exit_reset_assert;
}
 
if (clk_prepare_enable(ir-apb_clk)) {
dev_err(dev, try to enable apb_ir_clk failed\n);
-   return -EINVAL;
+   ret = -EINVAL;
+   goto exit_reset_assert;
}
 
if (clk_prepare_enable(ir-clk)) {
@@ -271,6 +287,9 @@ exit_clkdisable_clk:
clk_disable_unprepare(ir-clk);
 exit_clkdisable_apb_clk:
clk_disable_unprepare(ir-apb_clk);
+exit_reset_assert:
+   if (ir-rst)
+   reset_control_assert(ir-rst);
 
return ret;
 }
@@ -282,6 +301,8 @@ static int sunxi_ir_remove(struct platform_device *pdev)
 
clk_disable_unprepare(ir-clk);
clk_disable_unprepare(ir-apb_clk);
+   if (ir-rst)
+   reset_control_assert(ir-rst);
 
spin_lock_irqsave(ir-ir_lock, flags);
/* disable IR IRQ */
-- 
2.1.0

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[linux-sunxi] [PATCH v2 2/9] clk: sunxi: Make sun4i_a10_mod0_data available outside of clk-mod0.c

2014-11-23 Thread Hans de Goede
The sun6i prcm has mod0 compatible clocks, these need a separate driver
because the prcm uses the mfd framework, but we do want to re-use the
standard mod0 clk handling from clk-mod0.c for this, export
sun4i_a10_mod0_data, so that the prcm mod0 clk driver can use this.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 drivers/clk/sunxi/clk-mod0.c | 2 +-
 drivers/clk/sunxi/clk-mod0.h | 8 
 2 files changed, 9 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/sunxi/clk-mod0.h

diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index 5fb1f7e..7c06d42 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -67,7 +67,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
.pwidth = 2,
 };
 
-static const struct factors_data sun4i_a10_mod0_data __initconst = {
+const struct factors_data sun4i_a10_mod0_data = {
.enable = 31,
.mux = 24,
.table = sun4i_a10_mod0_config,
diff --git a/drivers/clk/sunxi/clk-mod0.h b/drivers/clk/sunxi/clk-mod0.h
new file mode 100644
index 000..49aa9ab
--- /dev/null
+++ b/drivers/clk/sunxi/clk-mod0.h
@@ -0,0 +1,8 @@
+#ifndef __MACH_SUNXI_CLK_MOD0_H
+#define __MACH_SUNXI_CLK_MOD0_H
+
+#include clk-factors.h
+
+extern const struct factors_data sun4i_a10_mod0_data;
+
+#endif
-- 
2.1.0

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[linux-sunxi] [PATCH v2 9/9] ARM: dts: sun6i: Enable ir receiver on the Mele M9

2014-11-23 Thread Hans de Goede
The Mele M9 has an ir receiver, enable it.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/boot/dts/sun6i-a31-m9.dts | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/boot/dts/sun6i-a31-m9.dts 
b/arch/arm/boot/dts/sun6i-a31-m9.dts
index 4202c64..94ddf9c 100644
--- a/arch/arm/boot/dts/sun6i-a31-m9.dts
+++ b/arch/arm/boot/dts/sun6i-a31-m9.dts
@@ -83,6 +83,12 @@
reg = 1;
};
};
+
+   ir@01f02000 {
+   pinctrl-names = default;
+   pinctrl-0 = ir_pins_a;
+   status = okay;
+   };
};
 
leds {
-- 
2.1.0

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[linux-sunxi] [PATCH v2 0/9] sun6i / A31 ir receiver support

2014-11-23 Thread Hans de Goede
Hi All,

Here is v2 of my sun6i ir receiver support patch-set as with v1, this
touches clk, mfd (for the prcm clks), dts and media/rc code.

Changes in v2:
-clk: sunxi: Give sunxi_factors_register a registers parameter
 -Updated commit message to mention the removal of __init
 -Add error checking to calls of of_iomap
-rc: sunxi-cir: Add support for an optional reset controller
 -Document resets property in devicetree bindings doc

Regards,

Hans

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[linux-sunxi] [PATCH v2 3/9] clk: sunxi: Add prcm mod0 clock driver

2014-11-23 Thread Hans de Goede
Add a driver for mod0 clocks found in the prcm. Currently there is only
one mod0 clocks in the prcm, the ir clock.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 Documentation/devicetree/bindings/clock/sunxi.txt |  1 +
 drivers/clk/sunxi/Makefile|  2 +-
 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c   | 63 +++
 drivers/mfd/sun6i-prcm.c  | 14 +
 4 files changed, 79 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/sunxi/clk-sun6i-prcm-mod0.c

diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt 
b/Documentation/devicetree/bindings/clock/sunxi.txt
index ed116df..342c75a 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -56,6 +56,7 @@ Required properties:
allwinner,sun4i-a10-usb-clk - for usb gates + resets on A10 / A20
allwinner,sun5i-a13-usb-clk - for usb gates + resets on A13
allwinner,sun6i-a31-usb-clk - for usb gates + resets on A31
+   allwinner,sun6i-a31-ir-clk - for the ir clock on A31
 
 Required properties for all clocks:
 - reg : shall be the control register address for the clock.
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 7ddc2b5..daf8b1c 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -10,4 +10,4 @@ obj-y += clk-sun8i-mbus.o
 
 obj-$(CONFIG_MFD_SUN6I_PRCM) += \
clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
-   clk-sun8i-apb0.o
+   clk-sun8i-apb0.o clk-sun6i-prcm-mod0.o
diff --git a/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c 
b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
new file mode 100644
index 000..e80f18e
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun6i-prcm-mod0.c
@@ -0,0 +1,63 @@
+/*
+ * Allwinner A31 PRCM mod0 clock driver
+ *
+ * Copyright (C) 2014 Hans de Goede hdego...@redhat.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include linux/clk-provider.h
+#include linux/clkdev.h
+#include linux/module.h
+#include linux/of_address.h
+#include linux/platform_device.h
+
+#include clk-factors.h
+#include clk-mod0.h
+
+static const struct of_device_id sun6i_a31_prcm_mod0_clk_dt_ids[] = {
+   { .compatible = allwinner,sun6i-a31-ir-clk },
+   { /* sentinel */ }
+};
+
+static DEFINE_SPINLOCK(sun6i_prcm_mod0_lock);
+
+static int sun6i_a31_prcm_mod0_clk_probe(struct platform_device *pdev)
+{
+   struct device_node *np = pdev-dev.of_node;
+   struct resource *r;
+   void __iomem *reg;
+
+   if (!np)
+   return -ENODEV;
+
+   r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   reg = devm_ioremap_resource(pdev-dev, r);
+   if (IS_ERR(reg))
+   return PTR_ERR(reg);
+
+   sunxi_factors_register(np, sun4i_a10_mod0_data,
+  sun6i_prcm_mod0_lock, reg);
+   return 0;
+}
+
+static struct platform_driver sun6i_a31_prcm_mod0_clk_driver = {
+   .driver = {
+   .name = sun6i-a31-prcm-mod0-clk,
+   .of_match_table = sun6i_a31_prcm_mod0_clk_dt_ids,
+   },
+   .probe = sun6i_a31_prcm_mod0_clk_probe,
+};
+module_platform_driver(sun6i_a31_prcm_mod0_clk_driver);
+
+MODULE_DESCRIPTION(Allwinner A31 PRCM mod0 clock driver);
+MODULE_AUTHOR(Hans de Goede hdego...@redhat.com);
+MODULE_LICENSE(GPL);
diff --git a/drivers/mfd/sun6i-prcm.c b/drivers/mfd/sun6i-prcm.c
index 283ab8d..ff1254f 100644
--- a/drivers/mfd/sun6i-prcm.c
+++ b/drivers/mfd/sun6i-prcm.c
@@ -41,6 +41,14 @@ static const struct resource sun6i_a31_apb0_gates_clk_res[] 
= {
},
 };
 
+static const struct resource sun6i_a31_ir_clk_res[] = {
+   {
+   .start = 0x54,
+   .end = 0x57,
+   .flags = IORESOURCE_MEM,
+   },
+};
+
 static const struct resource sun6i_a31_apb0_rstc_res[] = {
{
.start = 0xb0,
@@ -69,6 +77,12 @@ static const struct mfd_cell sun6i_a31_prcm_subdevs[] = {
.resources = sun6i_a31_apb0_gates_clk_res,
},
{
+   .name = sun6i-a31-ir-clk,
+   .of_compatible = allwinner,sun6i-a31-ir-clk,
+   .num_resources = ARRAY_SIZE(sun6i_a31_ir_clk_res),
+   .resources = sun6i_a31_ir_clk_res,
+   },
+   {
.name = sun6i-a31-apb0-clock-reset,
.of_compatible = allwinner,sun6i-a31-clock-reset,
.num_resources = ARRAY_SIZE(sun6i_a31_apb0_rstc_res),
-- 
2.1.0

-- 
You received 

[linux-sunxi] [PATCH v2 8/9] ARM: dts: sun6i: Add pinmux settings for the ir pins

2014-11-23 Thread Hans de Goede
Add pinmux settings for the ir receive pin of the A31.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index d33e758..90b7537 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -922,6 +922,13 @@
#interrupt-cells = 2;
#size-cells = 0;
#gpio-cells = 3;
+
+   ir_pins_a: ir@0 {
+   allwinner,pins = PL4;
+   allwinner,function = s_ir;
+   allwinner,drive = 0;
+   allwinner,pull = 0;
+   };
};
};
 };
-- 
2.1.0

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[linux-sunxi] [PATCH v2 6/9] ARM: dts: sun6i: Add ir_clk node

2014-11-23 Thread Hans de Goede
Add an ir_clk sub-node to the prcm node.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 arch/arm/boot/dts/sun6i-a31.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index a01b215..4aa628b 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -882,6 +882,13 @@
apb0_i2c;
};
 
+   ir_clk: ir_clk {
+   #clock-cells = 0;
+   compatible = allwinner,sun6i-a31-ir-clk;
+   clocks = osc32k, osc24M;
+   clock-output-names = ir;
+   };
+
apb0_rst: apb0_rst {
compatible = allwinner,sun6i-a31-clock-reset;
#reset-cells = 1;
-- 
2.1.0

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[linux-sunxi] [PATCH v2 1/9] clk: sunxi: Give sunxi_factors_register a registers parameter

2014-11-23 Thread Hans de Goede
Before this commit sunxi_factors_register uses of_iomap(node, 0) to get
the clk registers. The sun6i prcm has factor clocks, for which we want to
use sunxi_factors_register, but of_iomap(node, 0) does not work for the prcm
factor clocks, because the prcm uses the mfd framework, so the registers
are not part of the dt-node, instead they are added to the platform_device,
as platform_device resources.

This commit makes getting the registers the callers duty, so that
sunxi_factors_register can be used with mfd instantiated platform device too.

While at it also add error checking to the of_iomap calls.

This commit also drops the __init function from sunxi_factors_register since
platform driver probe functions are not __init.

Signed-off-by: Hans de Goede hdego...@redhat.com
---
 drivers/clk/sunxi/clk-factors.c| 10 --
 drivers/clk/sunxi/clk-factors.h|  7 ---
 drivers/clk/sunxi/clk-mod0.c   | 24 ++--
 drivers/clk/sunxi/clk-sun8i-mbus.c | 13 +++--
 drivers/clk/sunxi/clk-sunxi.c  | 11 ++-
 5 files changed, 51 insertions(+), 14 deletions(-)

diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index f83ba09..fc4f4b5 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -156,9 +156,10 @@ static const struct clk_ops clk_factors_ops = {
.set_rate = clk_factors_set_rate,
 };
 
-struct clk * __init sunxi_factors_register(struct device_node *node,
-  const struct factors_data *data,
-  spinlock_t *lock)
+struct clk *sunxi_factors_register(struct device_node *node,
+  const struct factors_data *data,
+  spinlock_t *lock,
+  void __iomem *reg)
 {
struct clk *clk;
struct clk_factors *factors;
@@ -168,11 +169,8 @@ struct clk * __init sunxi_factors_register(struct 
device_node *node,
struct clk_hw *mux_hw = NULL;
const char *clk_name = node-name;
const char *parents[FACTORS_MAX_PARENTS];
-   void __iomem *reg;
int i = 0;
 
-   reg = of_iomap(node, 0);
-
/* if we have a mux, we will have 1 parents */
while (i  FACTORS_MAX_PARENTS 
   (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
index 9913840..1f5526d 100644
--- a/drivers/clk/sunxi/clk-factors.h
+++ b/drivers/clk/sunxi/clk-factors.h
@@ -37,8 +37,9 @@ struct clk_factors {
spinlock_t *lock;
 };
 
-struct clk * __init sunxi_factors_register(struct device_node *node,
-  const struct factors_data *data,
-  spinlock_t *lock);
+struct clk *sunxi_factors_register(struct device_node *node,
+  const struct factors_data *data,
+  spinlock_t *lock,
+  void __iomem *reg);
 
 #endif
diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index 4a56385..5fb1f7e 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -78,7 +78,17 @@ static DEFINE_SPINLOCK(sun4i_a10_mod0_lock);
 
 static void __init sun4i_a10_mod0_setup(struct device_node *node)
 {
-   sunxi_factors_register(node, sun4i_a10_mod0_data, 
sun4i_a10_mod0_lock);
+   void __iomem *reg;
+
+   reg = of_iomap(node, 0);
+   if (!reg) {
+   pr_err(Could not get registers for mod0-clk: %s\n,
+  node-name);
+   return;
+   }
+
+   sunxi_factors_register(node, sun4i_a10_mod0_data,
+  sun4i_a10_mod0_lock, reg);
 }
 CLK_OF_DECLARE(sun4i_a10_mod0, allwinner,sun4i-a10-mod0-clk, 
sun4i_a10_mod0_setup);
 
@@ -86,7 +96,17 @@ static DEFINE_SPINLOCK(sun5i_a13_mbus_lock);
 
 static void __init sun5i_a13_mbus_setup(struct device_node *node)
 {
-   struct clk *mbus = sunxi_factors_register(node, sun4i_a10_mod0_data, 
sun5i_a13_mbus_lock);
+   struct clk *mbus;
+   void __iomem *reg;
+
+   reg = of_iomap(node, 0);
+   if (!reg) {
+   pr_err(Could not get registers for a13-mbus-clk\n);
+   return;
+   }
+
+   mbus = sunxi_factors_register(node, sun4i_a10_mod0_data,
+ sun5i_a13_mbus_lock, reg);
 
/* The MBUS clocks needs to be always enabled */
__clk_get(mbus);
diff --git a/drivers/clk/sunxi/clk-sun8i-mbus.c 
b/drivers/clk/sunxi/clk-sun8i-mbus.c
index 8e49b44..c0629ff 100644
--- a/drivers/clk/sunxi/clk-sun8i-mbus.c
+++ b/drivers/clk/sunxi/clk-sun8i-mbus.c
@@ -68,8 +68,17 @@ static DEFINE_SPINLOCK(sun8i_a23_mbus_lock);
 
 static void __init sun8i_a23_mbus_setup(struct device_node *node)
 {
-   struct clk *mbus = sunxi_factors_register(node, sun8i_a23_mbus_data,
- 

[linux-sunxi] [PATCH v2 5/9] rc: sunxi-cir: Add support for the larger fifo found on sun5i and sun6i

2014-11-23 Thread Hans de Goede
Add support for the larger fifo found on sun5i and sun6i, having a separate
compatible for the ir found on sun5i  sun6i also is useful if we ever want
to add ir transmit support, because the sun5i  sun6i version do not have
transmit support.

Note this commits also adds checking for the end-of-packet interrupt flag
(which was already enabled), as the fifo-data-available interrupt flag only
gets set when the trigger-level is exceeded. So far we've been getting away
with not doing this because of the low trigger-level, but this is something
which we should have done since day one.

Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Mauro Carvalho Chehab mche...@osg.samsung.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
---
 .../devicetree/bindings/media/sunxi-ir.txt  |  2 +-
 drivers/media/rc/sunxi-cir.c| 21 -
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt 
b/Documentation/devicetree/bindings/media/sunxi-ir.txt
index 6b70b9b..1811a06 100644
--- a/Documentation/devicetree/bindings/media/sunxi-ir.txt
+++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt
@@ -1,7 +1,7 @@
 Device-Tree bindings for SUNXI IR controller found in sunXi SoC family
 
 Required properties:
-- compatible   : should be allwinner,sun4i-a10-ir;
+- compatible   : allwinner,sun4i-a10-ir or allwinner,sun5i-a13-ir
 - clocks   : list of clock specifiers, corresponding to
  entries in clock-names property;
 - clock-names  : should contain apb and ir entries;
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 895fb65..559b0e3 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -56,12 +56,12 @@
 #define REG_RXINT_RAI_EN   BIT(4)
 
 /* Rx FIFO available byte level */
-#define REG_RXINT_RAL(val)(((val)  8)  (GENMASK(11, 8)))
+#define REG_RXINT_RAL(val)((val)  8)
 
 /* Rx Interrupt Status */
 #define SUNXI_IR_RXSTA_REG0x30
 /* RX FIFO Get Available Counter */
-#define REG_RXSTA_GET_AC(val) (((val)  8)  (GENMASK(5, 0)))
+#define REG_RXSTA_GET_AC(val) (((val)  8)  (ir-fifo_size * 2 - 1))
 /* Clear all interrupt status value */
 #define REG_RXSTA_CLEARALL0xff
 
@@ -72,10 +72,6 @@
 /* CIR_REG register idle threshold */
 #define REG_CIR_ITHR(val)(((val)  8)  (GENMASK(15, 8)))
 
-/* Hardware supported fifo size */
-#define SUNXI_IR_FIFO_SIZE16
-/* How many messages in FIFO trigger IRQ */
-#define TRIGGER_LEVEL 8
 /* Required frequency for IR0 or IR1 clock in CIR mode */
 #define SUNXI_IR_BASE_CLK 800
 /* Frequency after IR internal divider  */
@@ -94,6 +90,7 @@ struct sunxi_ir {
struct rc_dev   *rc;
void __iomem*base;
int irq;
+   int fifo_size;
struct clk  *clk;
struct clk  *apb_clk;
struct reset_control *rst;
@@ -115,11 +112,11 @@ static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
/* clean all pending statuses */
writel(status | REG_RXSTA_CLEARALL, ir-base + SUNXI_IR_RXSTA_REG);
 
-   if (status  REG_RXINT_RAI_EN) {
+   if (status  (REG_RXINT_RAI_EN | REG_RXINT_RPEI_EN)) {
/* How many messages in fifo */
rc  = REG_RXSTA_GET_AC(status);
/* Sanity check */
-   rc = rc  SUNXI_IR_FIFO_SIZE ? SUNXI_IR_FIFO_SIZE : rc;
+   rc = rc  ir-fifo_size ? ir-fifo_size : rc;
/* If we have data */
for (cnt = 0; cnt  rc; cnt++) {
/* for each bit in fifo */
@@ -156,6 +153,11 @@ static int sunxi_ir_probe(struct platform_device *pdev)
if (!ir)
return -ENOMEM;
 
+   if (of_device_is_compatible(dn, allwinner,sun5i-a13-ir))
+   ir-fifo_size = 64;
+   else
+   ir-fifo_size = 16;
+
/* Clock */
ir-apb_clk = devm_clk_get(dev, apb);
if (IS_ERR(ir-apb_clk)) {
@@ -271,7 +273,7 @@ static int sunxi_ir_probe(struct platform_device *pdev)
 * level
 */
writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
-  REG_RXINT_RAI_EN | REG_RXINT_RAL(TRIGGER_LEVEL - 1),
+  REG_RXINT_RAI_EN | REG_RXINT_RAL(ir-fifo_size / 2 - 1),
   ir-base + SUNXI_IR_RXINT_REG);
 
/* Enable IR Module */
@@ -319,6 +321,7 @@ static int sunxi_ir_remove(struct platform_device *pdev)
 
 static const struct of_device_id sunxi_ir_match[] = {
{ .compatible = allwinner,sun4i-a10-ir, },
+   { .compatible = allwinner,sun5i-a13-ir, },
{},
 };
 
-- 
2.1.0

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[linux-sunxi] Re: [PATCH 5/9] rc: sunxi-cir: Add support for the larger fifo found on sun5i and sun6i

2014-11-23 Thread Maxime Ripard
On Fri, Nov 21, 2014 at 11:13:17AM +0100, Hans de Goede wrote:
 Hi,
 
 On 11/21/2014 10:59 AM, Maxime Ripard wrote:
  On Fri, Nov 21, 2014 at 09:42:09AM +0100, Hans de Goede wrote:
  Hi,
 
  On 11/21/2014 09:26 AM, Maxime Ripard wrote:
  Hi Mauro,
 
  On Thu, Nov 20, 2014 at 02:28:56PM -0200, Mauro Carvalho Chehab wrote:
  Em Thu, 20 Nov 2014 16:55:24 +0100
  Hans de Goede hdego...@redhat.com escreveu:
 
  Add support for the larger fifo found on sun5i and sun6i, having a 
  separate
  compatible for the ir found on sun5i  sun6i also is useful if we ever 
  want
  to add ir transmit support, because the sun5i  sun6i version do not 
  have
  transmit support.
 
  Note this commits also adds checking for the end-of-packet interrupt 
  flag
  (which was already enabled), as the fifo-data-available interrupt flag 
  only
  gets set when the trigger-level is exceeded. So far we've been getting 
  away
  with not doing this because of the low trigger-level, but this is 
  something
  which we should have done since day one.
 
  Signed-off-by: Hans de Goede hdego...@redhat.com
 
  As this is meant to be merged via some other tree:
 
  Acked-by: Mauro Carvalho Chehab mche...@osg.samsung.com
 
  I think merging it through your tree would be just fine.
 
  Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
 
  Heh, I was thinking it would be best if it went through Maxime's tree 
  because
  it also has some deps on new clk stuff (well the dts have deps on that), 
  but either
  way works for me.
 
  Maxime if you want this go through Mauro's tree, I can send a pull-req to 
  Mauro
  (I'm a linux-media sub-maintainer), so if that is the case let me know and 
  I'll
  prepare a pull-req (after fixing the missing reset documentation in the 
  bindings).
  
  So much for not reading the cover letter... Sorry.
  
  We're getting quite close to the end of the ARM merge window, and I
  got a couple comments, Lee hasn't commented yet, so I'd say it's a bit
  too late for this to come in.
 
 Oh, but this was not intended for 3.19, this can wait till 3.20 from my pov,
 sorry if that was not clear. I was assuming that the merge window was more
 or less closed already, so that this going into 3.20 was expected.

Perfect then :)

Maxime

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[linux-sunxi] Re: [PATCH] boards:sunxi: Add MSI Primo73 tablet

2014-11-23 Thread Siarhei Siamashka
On Sun, 12 Oct 2014 03:49:17 +0300
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:

 This is a 7 tablet with Allwinner A20 SoC. More details at
 http://linux-sunxi.org/MSI_Primo73
 
 DRAM settings are the same as in the pre-installed Android firmware.
 Reliability has been verified by using the lima-memtester tool in two
 configurations:
   1. the default dram_clock=384MHz, dcdc3=1.250V settings
   2. artificially adjusted dram_clock=408MHz, dcdc3=1.225V settings
  (DRAM clock frequency increased by one step and dcdc3 voltage
  reduced by one step).
 No problems have been detected in either of them after several hours
 of running tests.
 
 Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
 ---
  board/sunxi/Makefile | 1 +
  boards.cfg   | 1 +
  2 files changed, 2 insertions(+)
 
 diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile
 index 478f913..d0618dd 100644
 --- a/board/sunxi/Makefile
 +++ b/board/sunxi/Makefile
 @@ -75,6 +75,7 @@ obj-$(CONFIG_MK802_A10S)+= dram_mk802_a10s.o
  obj-$(CONFIG_MK802II)+= dram_sun4i_408_1024_iow8.o
  obj-$(CONFIG_MK802II_A20)+= dram_mk802ii_a20.o
  obj-$(CONFIG_MK808C_A20) += dram_sun7i_384_1024_iow16.o
 +obj-$(CONFIG_MSI_PRIMO73)+= dram_sun7i_384_1024_iow16.o
  obj-$(CONFIG_OLIMEX_A13_SOM) += dram_sun5i_408_512_busw16_iow16.o
  obj-$(CONFIG_OLIMEX_A20_SOM)+= dram_sun7i_384_1024_iow16.o
  obj-$(CONFIG_PCDUINO)+= dram_sun4i_408_1024_iow8.o
 diff --git a/boards.cfg b/boards.cfg
 index 61f1fa2..e90776f 100644
 --- a/boards.cfg
 +++ b/boards.cfg
 @@ -454,6 +454,7 @@ Active  arm armv7  sunxi   -  
  sunxi
  Active  arm armv7  sunxi   -   sunxi 
   mk802ii_A20  sun7i:MK802II_A20,SPL  
   
  -
  Active  arm armv7  sunxi   -   sunxi 
   mk802ii  sun4i:MK802II,SPL  
   
  -
  Active  arm armv7  sunxi   -   sunxi 
   mk808c_A20   sun7i:MK808C_A20,SPL   
   
  -
 +Active  arm armv7  sunxi   -   sunxi 
   MSI_Primo73  sun7i:MSI_PRIMO73,SPL  
   
  -
  Active  arm armv7  sunxi   -   sunxi 
   OLIMEX-A13-SOM   
 sun5i:OLIMEX_A13_SOM,SPL,NO_AXP,STATUSLED=201,CONS_INDEX=2
 -
  Active  arm armv7  sunxi   -   sunxi 
   Olimex_A20-SOM   
 sun7i:OLIMEX_A20_SOM,SPL,SUNXI_GMAC,RGMII,STATUSLED1=245,FAST_MBUS
-
  Active  arm armv7  sunxi   -   sunxi 
   pcDuino  sun4i:PCDUINO,SPL,SUNXI_EMAC   
   
  -

There have been no objections so far, pushed to
https://github.com/linux-sunxi/u-boot-sunxi

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Re: [linux-sunxi] [PATCH u-boot-sunxi] sunxi: axp152: dcdc3 scale is 50mV / step not 25mV / step

2014-11-23 Thread Siarhei Siamashka
On Mon, 13 Oct 2014 14:54:45 +0200
Hans de Goede hdego...@redhat.com wrote:

 Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
 error introduced when adding the axp152_mvolt_to_target during review of the
 axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.
 
 This commit fixes this.
 
 Signed-off-by: Hans de Goede hdego...@redhat.com
 ---
  drivers/power/axp152.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
 index fa4ea05..27c2c4c 100644
 --- a/drivers/power/axp152.c
 +++ b/drivers/power/axp152.c
 @@ -62,7 +62,7 @@ int axp152_set_dcdc2(int mvolt)
  
  int axp152_set_dcdc3(int mvolt)
  {
 - u8 target = axp152_mvolt_to_target(mvolt, 700, 3500, 25);
 + u8 target = axp152_mvolt_to_target(mvolt, 700, 3500, 50);
  
   return axp152_write(AXP152_DCDC3_VOLTAGE, target);
  }

I have no hardware with AXP152 PMIC myself, but based on
   http://irclog.whitequark.org/linux-sunxi/2014-10-20#10571381
we got Tested-by: Michal Suchanek hramr...@gmail.com

 This patch fixes a regression introduced by the axp code cleanups did a
 while back. The regression causes the DRAM voltage to be set to 2.3V
 instead of 1.5V, this patch fixes this.

 Please apply this to linux-sunxi/u-boot-sunxi ASAP.

You seem to have commit access to https://github.com/linux-sunxi/u-boot-sunxi
Is there any reason why this regression fix has not been pushed
there yet?

-- 
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Re: [linux-sunxi] [PATCH 3.4] sunxi: g2d: handle noop blits

2014-11-23 Thread Siarhei Siamashka
On Fri,  7 Nov 2014 04:54:10 -0500
Andreas Baierl l...@imkreisrum.de wrote:

 From: Andreas Baierl ich...@imkreisrum.de
 
 Zero area blits are technically valid noops and are requested bay
 libvdpau. Return 0 when blit area is zero without performing bogus
 calculations.
 
 This reverts commit 3303e27 but also catches the zero values
 which were leading to failed calculations.

What kind of failed calculations? Do you mean the suspicious
checks like this:

 +if(((para-src_rect.x  0)((-para-src_rect.x)  para-src_rect.w)) ||

Which do not catch a special case with negative para-src_rect.x where
(-para-src_rect.x == para-src_rect.w) and this causes troubles
further in the function? Or something else?


 Signed-off-by: Michal Suchanek hramr...@gmail.com
 Signed-off-by: Andreas Baierl ich...@imkreisrum.de
 ---
  drivers/char/sunxi_g2d/g2d.c | 27 ---
  1 file changed, 20 insertions(+), 7 deletions(-)
 
 diff --git a/drivers/char/sunxi_g2d/g2d.c b/drivers/char/sunxi_g2d/g2d.c
 index 288685a..085ace3 100644
 --- a/drivers/char/sunxi_g2d/g2d.c
 +++ b/drivers/char/sunxi_g2d/g2d.c
 @@ -138,8 +138,7 @@ int g2d_blit(g2d_blt * para)
   __s32 err = 0;
  
   /* check the parameter valid */
 -if(para-src_rect.w == 0 || para-src_rect.h == 0 ||
 -   ((para-src_rect.x  0)((-para-src_rect.x)  para-src_rect.w)) ||
 +if(((para-src_rect.x  0)((-para-src_rect.x)  para-src_rect.w)) ||
 ((para-src_rect.y  0)((-para-src_rect.y)  para-src_rect.h)) ||
 ((para-dst_x  0)((-para-dst_x)  para-src_rect.w)) ||
 ((para-dst_y  0)((-para-dst_y)  para-src_rect.h)) ||
 @@ -153,6 +152,12 @@ int g2d_blit(g2d_blt * para)
   }
   else
   {
 + if((para-dst_rect.w == 0) || (para-dst_rect.h == 0) ||
 +(para-src_rect.w == 0) || (para-src_rect.h == 0))
 + {
 + printk(KERN_DEBUG User requested g2d blit on zero 
 region\n);

If zero area blits are technically valid and really used, then spamming
the dmesg log is not a really great idea. It may lead to a severe
performance problems.

Wouldn't an early check and return 0 (success) be a much better fix?
Maybe something like this:

if (para-src_rect.w == 0 || para-src_rect.h == 0)
return 0;

 + return err;
 + }
   if(((para-src_rect.x  0)((-para-src_rect.x)  
 para-src_rect.w)))
   {
   para-src_rect.w = para-src_rect.w + para-src_rect.x;
 @@ -205,8 +210,7 @@ int g2d_fill(g2d_fillrect * para)
   __s32 err = 0;
  
   /* check the parameter valid */
 - if(para-dst_rect.w == 0 || para-dst_rect.h == 0 ||
 -((para-dst_rect.x  0)((-para-dst_rect.x)para-dst_rect.w)) ||
 + if(((para-dst_rect.x  0)((-para-dst_rect.x)para-dst_rect.w)) ||
  ((para-dst_rect.y  0)((-para-dst_rect.y)para-dst_rect.h)) ||
  ((para-dst_rect.x  0)(para-dst_rect.x  para-dst_image.w - 1)) 
 ||
  ((para-dst_rect.y  0)(para-dst_rect.y  para-dst_image.h - 1)))
 @@ -216,6 +220,11 @@ int g2d_fill(g2d_fillrect * para)
   }
   else
   {
 + if((para-dst_rect.w == 0) || (para-dst_rect.h == 0))
 + {
 + printk(KERN_DEBUG User requested g2d fill on zero 
 region\n);
 + return err;
 + }
   if(((para-dst_rect.x  0)((-para-dst_rect.x)  
 para-dst_rect.w)))
   {
   para-dst_rect.w = para-dst_rect.w + para-dst_rect.x;
 @@ -247,9 +256,7 @@ int g2d_stretchblit(g2d_stretchblt * para)
   __s32 err = 0;
  
   /* check the parameter valid */
 -if(para-src_rect.w == 0 || para-src_rect.h == 0 ||
 -   para-dst_rect.w == 0 || para-dst_rect.h == 0 ||
 -   ((para-src_rect.x  0)((-para-src_rect.x)  para-src_rect.w)) ||
 +if(((para-src_rect.x  0)((-para-src_rect.x)  para-src_rect.w)) ||
 ((para-src_rect.y  0)((-para-src_rect.y)  para-src_rect.h)) ||
 ((para-dst_rect.x  0)((-para-dst_rect.x)  para-dst_rect.w)) ||
 ((para-dst_rect.y  0)((-para-dst_rect.y)  para-dst_rect.h)) ||
 @@ -263,6 +270,12 @@ int g2d_stretchblit(g2d_stretchblt * para)
   }
   else
   {
 + if((para-dst_rect.w == 0) || (para-dst_rect.h == 0) ||
 +(para-src_rect.w == 0) || (para-src_rect.h == 0))
 + {
 + printk(KERN_DEBUG User requested g2d stretchblit on 
 zero region\n);
 + return err;
 + }
   if(((para-src_rect.x  0)((-para-src_rect.x)  
 para-src_rect.w)))
   {
   para-src_rect.w = para-src_rect.w + para-src_rect.x;



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Re: [linux-sunxi] [PATCH 1/2 3.4] Re-Enable symmetric multiprocessing for sun7i

2014-11-23 Thread Siarhei Siamashka
On Mon, 10 Nov 2014 09:06:31 +0100
Andreas Baierl l...@imkreisrum.de wrote:

 From: Andreas Baierlich...@imkreisrum.de
 
 Signed-off-by: Andreas Baierlich...@imkreisrum.de
 ---
   arch/arm/configs/sun7i_defconfig | 4 +++-
   1 file changed, 3 insertions(+), 1 deletion(-)
 
 diff --git a/arch/arm/configs/sun7i_defconfig 
 b/arch/arm/configs/sun7i_defconfig
 index be7fedb..ce17398 100644
 --- a/arch/arm/configs/sun7i_defconfig
 +++ b/arch/arm/configs/sun7i_defconfig
 @@ -42,9 +42,11 @@ CONFIG_KARMA_PARTITION=y
   CONFIG_EFI_PARTITION=y
   CONFIG_CFQ_GROUP_IOSCHED=y
   CONFIG_ARCH_SUN7I=y
 -CONFIG_SWP_EMULATE=y
   CONFIG_NO_HZ=y
   CONFIG_HIGH_RES_TIMERS=y
 +CONFIG_SMP=y
 +CONFIG_ARM_ARCH_TIMER=y
 +CONFIG_NR_CPUS=2
   CONFIG_PREEMPT=y
   CONFIG_AEABI=y
   CONFIG_HIGHMEM=y
 -- 2.1.1
 

Thanks for fixing this regression.

The patch was mangled, so applied the changes manually and also
dropped CONFIG_ARM_ARCH_TIMER=y (it is not directly related to SMP).

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Re: [linux-sunxi] [PATCH 2/2 3.4] Enable CONFIG_FHANDLE required for systemd = 209

2014-11-23 Thread Siarhei Siamashka
On Mon, 10 Nov 2014 09:06:35 +0100
Andreas Baierl l...@imkreisrum.de wrote:

 From: Andreas Baierlich...@imkreisrum.de
 
 Signed-off-by: Andreas Baierlich...@imkreisrum.de
 ---
   arch/arm/configs/sun7i_defconfig | 1 +
   1 file changed, 1 insertion(+)
 
 diff --git a/arch/arm/configs/sun7i_defconfig 
 b/arch/arm/configs/sun7i_defconfig
 index ce17398..083b404 100644
 --- a/arch/arm/configs/sun7i_defconfig
 +++ b/arch/arm/configs/sun7i_defconfig
 @@ -2,6 +2,7 @@ CONFIG_EXPERIMENTAL=y
   CONFIG_SYSVIPC=y
   CONFIG_BSD_PROCESS_ACCT=y
   CONFIG_BSD_PROCESS_ACCT_V3=y
 +CONFIG_FHANDLE=y
   CONFIG_TASKSTATS=y
   CONFIG_TASK_DELAY_ACCT=y
   CONFIG_TASK_XACCT=y
 -- 2.1.1
 

Thanks, looks good.

The patch was mangled, so applied the changes manually and
also enabled this option for sun4i/sun5i/sun7i (we don't want
the configs for sun4i/sun5i/sun7i to diverge).

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Re: [linux-sunxi] [PATCH 3.4] sunxi: disp: Fix division by zero.

2014-11-23 Thread Siarhei Siamashka
On Thu, 13 Nov 2014 06:27:39 -0500
Andreas Baierl l...@imkreisrum.de wrote:

 From: Andreas Baierl ich...@imkreisrum.de
 
 If DISP_CMD_VIDEO_START is called and layer.para.src_win.width = 0,
 a division by zero is happening.
 This patch is ported from Allwinner's display driver code.
 It catches the division by zero by disabling vpp operations if src_win.width 
  1280 and
 if src width matches scn width.
 
 Signed-off-by: Andreas Baierl ich...@imkreisrum.de
 ---
  drivers/video/sunxi/disp/disp_video.c | 12 +++-
  1 file changed, 7 insertions(+), 5 deletions(-)
 
 diff --git a/drivers/video/sunxi/disp/disp_video.c 
 b/drivers/video/sunxi/disp/disp_video.c
 index aa07364..4d4ac0b 100644
 --- a/drivers/video/sunxi/disp/disp_video.c
 +++ b/drivers/video/sunxi/disp/disp_video.c
 @@ -71,11 +71,13 @@ static __s32 video_enhancement_start(__u32 sel, __u32 id)
   /* !!! assume open HDMI before video start */
   if (gdisp.screen[sel].output_type == DISP_OUTPUT_TYPE_HDMI) {
   scaler_index = gdisp.screen[sel].layer_manage[id].scaler_index;
 - scaleuprate =
 - gdisp.screen[sel].layer_manage[id].para.scn_win.width *
 - 2 /
 - gdisp.screen[sel].layer_manage[id].para.src_win.width;
 -
 + if ((gdisp.screen[sel].layer_manage[id].para.scn_win.width == 
 gdisp.screen[sel].layer_manage[id].para.src_win.width) || 
 (gdisp.screen[sel].layer_manage[id].para.src_win.width  1280)) {
 + scaleuprate = 0;
 + }
 + else
 + {
 + scaleuprate = 
 gdisp.screen[sel].layer_manage[id].para.scn_win.width * 2 / 
 gdisp.screen[sel].layer_manage[id].para.src_win.width;
 + }
   switch (scaleuprate) {
   case 0: /* scale down, do noting */
   DE_SCAL_Vpp_Enable(scaler_index, 0);

Could the patch be updated to pass the checkpatch.pl test? One of the
lines is clearly too long.

It would be great if the commit message explained who exactly is using
the DISP_CMD_VIDEO_START ioctl and what is the use case where the old
code fails. A brief explanation about what are the vpp operations and
why this fix is correct (not just the literal description of the C code
constructs) would also help a lot.

Obviously, the division by zero in the kernel triggered by the userland
code via an ioctl is not nice. However the old Allwinner code is full of
problems and it does not make much sense wasting time on fixing *all*
of them.

The point is that some of the users are stuck with the old kernels
and don't seem to be motivated to upgrade. Fixing kernel driver bugs
is nice, but relying on the fix to be magically present in all kernels
is way too optimistic. Unless the users can be somehow forced to
upgrade their kernels, keeping workarounds in the userland code
(libvdpau-sunxi?) may be still necessary.

Reviewing/applying patches takes time. With the sunxi-3.4 kernel
patches, this time is just wasted. I'm not very enthusiastic to take
any part in this activity myself, unless the fix is really justified
and needed to address some practical problem.

Thanks.

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[linux-sunxi] Re: [PATCH 1/2] sunxi: axp152: Keep DRAM / Vddr at bootloader set value

2014-11-23 Thread Siarhei Siamashka
On Wed, 15 Oct 2014 22:13:54 +0300
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:

 On Wed, 15 Oct 2014 12:10:44 +0200
 Hans de Goede hdego...@redhat.com wrote:
 
  Some fex files contain wrong values, causing stability issues.
  
  Signed-off-by: Hans de Goede hdego...@redhat.com
  ---
   drivers/power/axp152.c | 22 --
   1 file changed, 12 insertions(+), 10 deletions(-)
  
  diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
  index 77132e1..3b8e68f 100644
  --- a/drivers/power/axp152.c
  +++ b/drivers/power/axp152.c
  @@ -541,15 +541,17 @@ static struct regulator_init_data 
  regl_init_data[AXP152_REGULATOR_COUNT] = {
  .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  }
  },
  -   [axp152_dcdc3] = { /* Vddr, power on 1.5V, Android from fex */
  +   [axp152_dcdc3] = { /* Vddr, power on 1.5V, use u-boot value */
  .num_consumer_supplies = 1,
  .consumer_supplies = axp152_dcdc3_supply,
  .constraints = {
  -   .min_uV =  1500 * 1000,
  -   .max_uV =  1500 * 1000,
  +   .min_uV =  1000 * 1000,
  +   .max_uV =  1600 * 1000,
  .always_on = 1,
  -   .apply_uV = 1,
  -   .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  +   /*
  +* We do not allow changing the DRAM voltage, because
  +* of stability, so no REGULATOR_CHANGE_VOLTAGE.
  +*/
  }
  },
  [axp152_dcdc4] = { /* Vcpu, power on 1.25V, Android from fex */
  @@ -622,11 +624,11 @@ static int __init axp_board_init(void)
   
  /* Note we ignore the dcdc2_vol key as dcdc2 is set by the dvfs code */
   
  -   ret = script_parser_fetch(target, dcdc3_vol, val, sizeof(int));
  -   if (ret == 0) {
  -   regl_init_data[axp152_dcdc3].constraints.min_uV = val * 1000;
  -   regl_init_data[axp152_dcdc3].constraints.max_uV = val * 1000;
  -   }
  +   /*
  +* Note we ignore the dcdc3_vol key as that sometimes contains wrong
  +* values make the dram unstable, instead we stick with the bootloader
  +* set voltage.
  +*/
   
  ret = script_parser_fetch(target, dcdc4_vol, val, sizeof(int));
  if (ret == 0) {
 
 Thanks, looks good.
 
 Should we also try ti preserve the dcdc4 value from the bootloader for
 AXP152? It provides power for VDD-DLL, just like dcdc3 in the case of
 AXP209. Regarding other differences, on Allwinner A10/A20, VCC-DRAM
 seems to be usually taking 1.5V from some other sources (not as a
 direct output from AXP209).
 
 BTW, this is inconsistent with my older patch
 
 https://github.com/linux-sunxi/linux-sunxi/commit/5052b83aa44dc16d6662d8d9d936166c139ad8c5
 I tried to make it deliberately spammy, so that if anyone encounters
 any regression, identifying the root cause would be easy. However your
 approach is clearly more correct.
 
 Acked-by: Siarhei Siamashka siarhei.siamas...@gmail.com

Thanks, pushed to stage/sunxi-3.4

And the final reminder. If any of the AXP152 users on this mailing list
could make and test a similar patch for protecting dcdc4 voltage
(VDD-DLL), that would be really great. Because it would allow us to
configure the VDD-DLL voltage in u-boot and potentially gain some DRAM
clock speed uplift on this hardware without worrying about clashing
with the settings from FEX.

-- 
Best regards,
Siarhei Siamashka

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[linux-sunxi] Re: [PATCH 2/2] sunxi: nand: Fix nand clk calculation

2014-11-23 Thread Siarhei Siamashka
On Fri, 31 Oct 2014 09:53:52 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:

 On Thu, 16 Oct 2014 10:42:19 +0200
 Hans de Goede hdego...@redhat.com wrote:
 
  Hi,
  
  On 10/15/2014 09:28 PM, Siarhei Siamashka wrote:
   On Wed, 15 Oct 2014 12:10:45 +0200
   Hans de Goede hdego...@redhat.com wrote:
   
   Before the u-boot dram cleanup u-boot would always set PLL5 factor m to
   2 (reg value 1) and div p to 1, and get_cmu_clk in the nand code
   would calculate the pll5p clk like this:
  
   clk = 24 * factor_n * factor_k / div_p / factor_m;
  
   aka:
  
   clk = 24 * factor_n * factor_k / (div_p * factor_m);
  
   This is wrong however, factor_m is not used to calculate pll5p, and 
   div_p is
   not a straight divider, but it divides by 2 ^ div_p. Since with the m == 
   2 and
   p == 1 settings used before the dram cleanup, this happend to do the 
   right
   thing in the form of dividing by 2. But with the new dram code div_p is 
   0,
   and then the old get_cmu_clk code fails with a divide by 0 error.
  
   This commit fixes this, by changing the clk calculation to the correct 
   form of:
  
   clk = (24 * factor_n * factor_k)  div_p;
  
   Signed-off-by: Hans de Goede hdego...@redhat.com
   ---
drivers/block/sunxi_nand/nfd/nand_blk.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
  
   diff --git a/drivers/block/sunxi_nand/nfd/nand_blk.c 
   b/drivers/block/sunxi_nand/nfd/nand_blk.c
   index a632453..2169301 100644
   --- a/drivers/block/sunxi_nand/nfd/nand_blk.c
   +++ b/drivers/block/sunxi_nand/nfd/nand_blk.c
   @@ -1095,16 +1095,15 @@ __u32 get_cmu_clk(void)
{
__u32 reg_val;
__u32 div_p, factor_n;
   -__u32 factor_k, factor_m;
   +__u32 factor_k;
__u32 clock;

reg_val  = *(volatile unsigned int *)(0xf1c2 + 0x20);
div_p= (reg_val  16)  0x3;
factor_n = (reg_val  8)  0x1f;
factor_k = ((reg_val  4)  0x3) + 1;
   -factor_m = ((reg_val  0)  0x3) + 1;

   -clock = 24 * factor_n * factor_k/div_p/factor_m;
   +clock = (24 * factor_n * factor_k)  div_p;

return clock;
}
   
   That's a good catch. Also one more copy-paste of exactly the same code
   appears to be in 'drivers/block/sunxi_nand/nandtest/nand_test.c'
  
  That code is not compiled / used. Still feel free to submit a patch to fix 
  it if you want
  to.
 
 I see only two acceptable solutions: either the fix should be applied
 in both places, or the unused code should be purged from the source
 tree. Your current fix is incomplete.
 
  I don't have commit access to the linux-sunxi kernel sources, can you 
  please push these
  2 fixes ?
 
 Feel free to resubmit the patch. Or if you wish, I can modify your
 patch to apply the changes in both places.

Hans, I'm not going to start lecturing you about why the copy/paste
duplicated code is bad. And why diverging the separate instances
of already existing duplicated code is making everything even worse.
Most likely you know it yourself perfectly fine.

You probably think that this patch is good enough for the sunxi-3.4
kernel. And maybe you are even right. However I'm not very happy,
because it is serving as a bad example for the others.

Anyway, this is already taking too much time, so I just pushed your
patch to the stage/sunxi-3.4 branch as-is (without my Acked-by).
With the assumption that you are fully accountable for the quality
of this fix. Please keep in mind that I have not volunteered to be
maintaining the sunxi-3.4 kernel. And there are other people on this
mailing list, who could have approved and pushed your patch much
earlier. But appears that everyone is too busy at the moment.
Moreover, I believe that you can get the commit access yourself
any time. This should not be a problem if you just request for it.

Thanks for your contribution. It is really appreciated.

-- 
Best regards,
Siarhei Siamashka

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Re: Re: [linux-sunxi] Allwinner documentation (hardware datasheet, user manual) for A10, A10s, A13, A20, A31, A31s

2014-11-23 Thread RFat
Alright, the manual of the A80 is OUT! 

(https://github.com/allwinner-zh/documents)

Thanks a lot Kevin!

-R

On Tuesday, October 14, 2014 4:39:06 AM UTC+3, Zhao Zhili wrote:

 You are right. China have suffer too much from idealism. Now they come to 
 the other way. Don't say something too beautiful to them, they don't 
 believe that and think you are a cheater. 

 On Mon, Oct 13, 2014 at 08:11:40AM -0700, jacky lau wrote: 
  I agree with you and Jhon Yi. Developing a soc is not too hard now, 
 getting 
  customers is harder and more important. I hope the market will force all 
  China Soc company more open. But before that happen, I don't think they 
  will become more open. 
  They don't have experience in working with the open source community, if 
 you want 
  them to be more open, you need to do more communicate with them. And 
  remember, to them, neither the law nor the spirit of free software, but 
 making 
  money is paramount. Tell them they will get more customers, make more 
 money 
  and prove it, then they will follow. 
  
  在 2014年10月11日星期六UTC+8下午10时53分48秒,Jon Smirl写道: 
   
   On Sat, Oct 11, 2014 at 10:31 AM, jacky lau i90...@gmail.com 
   javascript: wrote: 
A big client will buy thousands of chips once. Are there any 
 relation 
between big client and user manual publishing? No. So they don't 
 think 
   it's 
necessary to open their private property. When you are a big client, 
 you 
   are 
VIP, all document and source code is open to you. And if publish all 
technical documentation, competitors will know some technical secret 
   (e.g. 
bug;) they don't want them to know. 
Open world is beautiful, but they will not actively participate if 
 there 
   is 
no return. Why some China soc company publish some documents and 
 source 
   code 
now? I think this is mainly for marketing. But no matter how, VIP 
   priority. 
   
   Right now Allwinner is only good for tablets and STBs because 
   Allwinner supplies turnkey solutions. If documentation were more open 
   other applications could be developed. If customer can't get software 
   working for these other applications, they won't buy thousands of 
   chips. So if Allwinner wants to survive past the end of the tablet fad 
   they have to start developing these other markets. Otherwise when the 
   tablet fad is over it will be the end of Allwinner. 
   
   You also over estimate the value of technical secrets.  What is the 
   point of putting a secret h.264 encode/decode unit on the chip if half 
   of your customers can't get it working?  Obviously Rockchip knows how 
   to make h.264 encode/decode since they have a similar unit on their 
   chip. And so does Freescale, TI, ST, etc. -- there is no big secret in 
   making h.264 hardware for people familiar with how to do it (hint, it 
   is an ISO standard).  So by keeping the documentation secret you hide 
   nothing significant from your competitors and much, much worse -- you 
   keep your own customers from using the hardware they bought.  Think 
   about it --- which is more important - hiding something form a 
   competitor that they probably already know, or getting your customers 
   to ship and buy more chips? 
   
   Bottom line - which one brings cash in the door - secret documentation 
   or getting as many customers as possible to ship? 
   
   

在 2014年10月6日星期一UTC+8下午8时55分30秒,RFat写道: 

Hi Kevin, 

Publishing the user manuals will certainly increase Allwinner's 
 chips 
popularity. 

I was wondering if there is a rough estimate as to when the A80's 
   manual 
will be made available? 

Thanks! 
Raanan 

On Monday, September 29, 2014 12:46:53 PM UTC+3, 
   ke...@allwinnertech.com 
wrote: 

Hi All, 

I have put the documents on github, and the url is 
https://github.com/allwinner-zh/documents.git 
Thanks Simos, Henrik and Luc's suggestion. And other documents 
 will be 
upated to here when released. 


 
Best Regards, 
kevin.z.m 



From: HenrikNordström 
Date: 2014-09-29 08:46 
To: linux...@googlegroups.com 
CC: sh...@allwinnertech.com; Meng Zhang 
Subject: Re: [linux-sunxi] Allwinner documentation (hardware 
   datasheet, 
user manual) for A10, A10s, A13, A20, A31, A31s 
sön 2014-09-28 klockan 02:18 +0200 skrev Luc Verhaegen: 

 Why didn't someone from Allwinner send these documents in 
   him/herself? 

The current person discussion the matter with Allwiner was Simos, 
 who 
   is 
part of the linux-sunxi community. Allwinner sent current versions 
 of 
the documents to Simos for distribution in the community. What is 
   wrong? 

Mailing the full set of documents as attachments directly to the 
mailinglist is not appropriate. And for some strange and unknown 
   reason 
Allwinner do not appear to have a public 

Re: [linux-sunxi] [PATCH 3.4] sunxi: disp: Fix division by zero.

2014-11-23 Thread Andreas Baierl

Am 24.11.2014 00:57, schrieb Siarhei Siamashka:

On Thu, 13 Nov 2014 06:27:39 -0500
Andreas Baierl l...@imkreisrum.de wrote:


From: Andreas Baierl ich...@imkreisrum.de

If DISP_CMD_VIDEO_START is called and layer.para.src_win.width = 0,
a division by zero is happening.
This patch is ported from Allwinner's display driver code.
It catches the division by zero by disabling vpp operations if src_win.width  
1280 and
if src width matches scn width.

Signed-off-by: Andreas Baierl ich...@imkreisrum.de
---
  drivers/video/sunxi/disp/disp_video.c | 12 +++-
  1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/video/sunxi/disp/disp_video.c 
b/drivers/video/sunxi/disp/disp_video.c
index aa07364..4d4ac0b 100644
--- a/drivers/video/sunxi/disp/disp_video.c
+++ b/drivers/video/sunxi/disp/disp_video.c
@@ -71,11 +71,13 @@ static __s32 video_enhancement_start(__u32 sel, __u32 id)
/* !!! assume open HDMI before video start */
if (gdisp.screen[sel].output_type == DISP_OUTPUT_TYPE_HDMI) {
scaler_index = gdisp.screen[sel].layer_manage[id].scaler_index;
-   scaleuprate =
-   gdisp.screen[sel].layer_manage[id].para.scn_win.width *
-   2 /
-   gdisp.screen[sel].layer_manage[id].para.src_win.width;
-
+   if ((gdisp.screen[sel].layer_manage[id].para.scn_win.width == 
gdisp.screen[sel].layer_manage[id].para.src_win.width) || 
(gdisp.screen[sel].layer_manage[id].para.src_win.width  1280)) {
+   scaleuprate = 0;
+   }
+   else
+   {
+   scaleuprate = 
gdisp.screen[sel].layer_manage[id].para.scn_win.width * 2 / 
gdisp.screen[sel].layer_manage[id].para.src_win.width;
+   }
switch (scaleuprate) {
case 0: /* scale down, do noting */
DE_SCAL_Vpp_Enable(scaler_index, 0);

Could the patch be updated to pass the checkpatch.pl test? One of the
lines is clearly too long.

Will do that.


It would be great if the commit message explained who exactly is using
the DISP_CMD_VIDEO_START ioctl and what is the use case where the old
code fails. A brief explanation about what are the vpp operations and
why this fix is correct (not just the literal description of the C code
constructs) would also help a lot.
In this case it's used by libvdpau-sunxi. DISP_CMD_VIDEO_START triggers 
some Video Post Processing (VPP) operations, such as luma sharpness level.
The DISP_CMD_VIDEO_* ioctls is the way, Allwinner goes for putting video 
to the fb in their cedarx-libs sample code. DISP_CMD_VIDEO_SET_FB for 
example sets
the new video address to be used for fb copy. These whole video 
operations (including deinterlacing e.g.) are processed in Hal_Set_Frame 
which is done withinn VBlanking.

Hope, I understood that correctly.

If para.src_win.width == 0 because userland doesn't care, we run into a 
division by zero. So the provided fix is that piece of code, which is 
included in allwinner's kernel drops.
It disables these VPP operations by checking, if the para.src_win.width 
is  1280 which includes the 0. It also does nothing, if src_win.width 
equals scn_win.width.



Obviously, the division by zero in the kernel triggered by the userland
code via an ioctl is not nice. However the old Allwinner code is full of
problems and it does not make much sense wasting time on fixing *all*
of them.

The point is that some of the users are stuck with the old kernels
and don't seem to be motivated to upgrade. Fixing kernel driver bugs
is nice, but relying on the fix to be magically present in all kernels
is way too optimistic. Unless the users can be somehow forced to
upgrade their kernels, keeping workarounds in the userland code
(libvdpau-sunxi?) may be still necessary.

Reviewing/applying patches takes time. With the sunxi-3.4 kernel
patches, this time is just wasted. I'm not very enthusiastic to take
any part in this activity myself, unless the fix is really justified
and needed to address some practical problem.

Thanks.
ACK. I won't read all the code to go fixing it. It's just like fixing 
the things, that occur here and seem to produce some trouble. And this 
one caused trouble because it stops working libvdpau in some cases.
It's surely not the best fix, but better than nothing imo. There should 
not be put too much time in 3.4 but especially the disp code will take 
some time until it appears in mainline. So I think it would be legal to do

some bug fixing in 3.4 at a minimum level.

I will resend a v2 with an updated commit message.

Regards
Andreas

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