Re: [linux-sunxi] LVDS LCD no clock

2015-05-07 Thread Kaspter Ju

Hi Attila,

Just comment out CONFIG_SUNXI_DISPLAY

--- a/u-boot-2011.09/include/configs/sun7i.h
+++ b/u-boot-2011.09/include/configs/sun7i.h
@@ -150,7 +150,7 @@
 #define CONFIG_CMD_BOOTA
 #define CONFIG_SUN7I_DMA
 #define CONFIG_CMD_MEMORY
-#define CONFIG_SUNXI_DISPLAY
+//#define CONFIG_SUNXI_DISPLAY

 #define CONFIG_SUNXI_AXP20
 #define CONFIG_SUNXI_AXP_MAINPMU_TYPE_20X


On 05/02/2015 05:09 AM, azh...@gmail.com wrote:

Dear Kaspter,
Could You explain how did You disable lvds in u-boot?
I have the exatly same problem, with my olimex a20 som,
I dont have lvds clock, just constant high signal.

Thanks in advance
Attila HOFFEREK



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Re: [linux-sunxi] A20 higher External interrupr (EINT22-EINT31)

2015-05-07 Thread Andrea Venturi


On Thursday, May 7, 2015 at 10:00:04 AM UTC+2, Maxime Ripard wrote:

 ...
  any advice for further investigation? 

 There's more to it. 


thanx for the quick reply!
 

 I don't think that ever supposed to work that way, most notably 
 because it just wouldn't work with SoCs that multiple interrupt banks 
 (like the A31, A23, etc.) 


sorry, i'm slowly wading my way on this topic, so i'm not very competent
I  supposed this single bank interrupt setup, as it's simpler (and older: 
A10 A20..) case were already working, and someway it works! :-)

then the more general case, multiple banks and so on.. will follow adding 
over.
 

 I think it worked by accident, because it's somewhat compatible with 
 the default interrupt property parsing code, but that probably need 
 some additional development. 

 What's mainly missing would be an irq_xlate function in the pinctrl 
 driver that would parse the interrupt property with the same format 
 than we have for gpios (phandle excluded, of course), which would mean 
 something like that in your case. 

 interrupt-parent = pio; 
 interrupts = 8 10 flags; 


in this example, there was a interrupt-extended entry that's i suppose 
it's more or less similar..

http://linux-sunxi.org/External_interrupts  

is that a fake/stub entry? amazing..

That function would then need to lookup in our pin array that it's 
 indeed an interrupt, and would return the number of the interrupt 
 within the interrupt controller (which would be 22 in your case). 

 I can try to cook something during the weekend, and send you a patch 
 for you to test. 


that would be more than i expect.. surely i'll test!

thanx

Andrea
 


 Maxime 

 -- 
 Maxime Ripard, Free Electrons 
 Embedded Linux, Kernel and Android engineering 
 http://free-electrons.com 


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Re: [linux-sunxi] orange pi plus (Allwinner H3 based) has a Debian server image available since today

2015-05-07 Thread Steven Saunderson


On Wednesday, May 6, 2015 at 6:45:56 AM UTC+10, Nick Ludlam wrote:


 I've just received my Orange Pi Plus board today, and while I was 
 downloading the Debian server image I noticed that they've released 
 something called Linux SDK source code from 
 http://www.orangepi.org/downloaded/download.html

 Interesting point about the Orange Pi Debian server is that the boot 
partition contains uImage only.  No uEnv.txt or script.bin or boot.scr.

Cheers,
Steven 

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Re: Re: [linux-sunxi] Release nand flash driver opensource for A10/A13/A31

2015-05-07 Thread kevin.z.m...@gmail.com

On 2015-04-10 at 13:51, Priit Laes pl...@plaes.org wrote:
On Fri, 2015-04-10 at 09:30 +0800, kevin.z.m...@gmail.com wrote:
 Hi, 
 
 The nand flash driver open source for A10/A13/A20/A31 has been 
 released,
 you can get it from the github 
 https://github.com/allwinner-zh/linux-3.4-sunxi/tree/master/modules/nand 
 
 
Thanks. Looks good.
 
What is the status for bootloader (u-boot) NAND code? Only A20 support 
has been released under GPLv2?
 
The A10 and A31 nand drivers for bootloader has been released, you can
get them from 
https://github.com/allwinner-zh/bootloader/tree/master/u-boot-2011.09/nand_sunxi
 

Nand drivers for other platforms such as A80, A83, include bootloader and
kernel, will be released later.

There's still this binary file that shouldn't be there:
bootloader/u-boot-2011.09/nand_sunxi/sun7i/libnand-sun7i
 
 
Päikest,
Priit Laes :)
 


kevin.z.m...@gmail.com

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Re: [linux-sunxi] A20 higher External interrupr (EINT22-EINT31)

2015-05-07 Thread Maxime Ripard
On Wed, May 06, 2015 at 11:48:59PM -0700, Andrea Venturi wrote:
 hello,
 
 i have an issue about external interrupts, following this clear example: 
 http://linux-sunxi.org/External_interrupts
 
 it works for EINT up to EINT21 in PH port, but if i try in an Olimex A20 
 SOM (on a A20 SOM EVB who have a schematic available showing no hints 
 AFAICS) an EINT in PI port (EINT22-EINT31) nothing is raised when i put the 
 pin to GND.
 
 i slightly more thorough description is in Olimex forum 
 https://www.olimex.com/forum/index.php?topic=4400.0 but i suppose it's more 
 general issue, that's why i post here too (sorry if it's seen as a bad 
 attitude..)
 
 BTW the A20 PIO page on linux-sunxi.org doesn't talk about these higher 
 EINT22-EINT31 so i smell something fishy here: 
 http://linux-sunxi.org/A20/PIO
 
 any advice for further investigation?

There's more to it.

I don't think that ever supposed to work that way, most notably
because it just wouldn't work with SoCs that multiple interrupt banks
(like the A31, A23, etc.)

I think it worked by accident, because it's somewhat compatible with
the default interrupt property parsing code, but that probably need
some additional development.

What's mainly missing would be an irq_xlate function in the pinctrl
driver that would parse the interrupt property with the same format
than we have for gpios (phandle excluded, of course), which would mean
something like that in your case.

interrupt-parent = pio;
interrups = 8 10 flags; 

That function would then need to lookup in our pin array that it's
indeed an interrupt, and would return the number of the interrupt
within the interupt controller (which would be 22 in your case).

I can try to cook something during the weekend, and send you a patch
for you to test.

Maxime

-- 
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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[linux-sunxi] A20 higher External interrupr (EINT22-EINT31)

2015-05-07 Thread Andrea Venturi
hello,

i have an issue about external interrupts, following this clear example: 
http://linux-sunxi.org/External_interrupts

it works for EINT up to EINT21 in PH port, but if i try in an Olimex A20 
SOM (on a A20 SOM EVB who have a schematic available showing no hints 
AFAICS) an EINT in PI port (EINT22-EINT31) nothing is raised when i put the 
pin to GND.

i slightly more thorough description is in Olimex forum 
https://www.olimex.com/forum/index.php?topic=4400.0 but i suppose it's more 
general issue, that's why i post here too (sorry if it's seen as a bad 
attitude..)

BTW the A20 PIO page on linux-sunxi.org doesn't talk about these higher 
EINT22-EINT31 so i smell something fishy here: 
http://linux-sunxi.org/A20/PIO

any advice for further investigation?

bests

Andrea

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[linux-sunxi] spi nor flash booting?

2015-05-07 Thread Michal Suchanek
Hello,

anybody has seen a device with bootable SPI NOR flash memory?

iirc some of the Allwinner evaluation boards had spi flash but maybe I
am confusing them with other board.

Is it known which SPI bus and CS is checked?

Thanks

Michal

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[linux-sunxi] Re: [PATCH 0/2] ARM: sun9i: cubieboard4: Enable USB hosts and LEDs

2015-05-07 Thread Tyler Baker
Hi ChenYu,

On 7 May 2015 at 09:43, Chen-Yu Tsai w...@csie.org wrote:
 Hi Maxime,

 This small series enables USB host and LED support on the Cubieboard4.
 We already support these on the Optimus, so it's just dts stuff.


 Regards
 ChenYu


 Chen-Yu Tsai (2):
   ARM: dts: sun9i: cubieboard4: Enable USB support
   ARM: dts: sun9i: cubieboard4: Enable LEDs

Thanks for posting these patches. I gave this series a spin on my
cubieboard4 atop next-20150507 both with sunxi_defconfig and
multi_v7_defconfig.  Tested all four USB ports with various USB
devices, and for good measure toggled the LED's :) Everything worked
as expected, so feel free to add my

Tested-by: Tyler Baker tyler.ba...@linaro.org


  arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 83 
 +
  1 file changed, 83 insertions(+)

 --
 2.1.4


Cheers,

Tyler

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Re: [linux-sunxi] A20 higher External interrupr (EINT22-EINT31)

2015-05-07 Thread Maxime Ripard
Please keep all the recipients in Cc.

On Thu, May 07, 2015 at 02:13:16AM -0700, Andrea Venturi wrote:
  I don't think that ever supposed to work that way, most notably 
  because it just wouldn't work with SoCs that multiple interrupt banks 
  (like the A31, A23, etc.) 
 
 
 sorry, i'm slowly wading my way on this topic, so i'm not very
 competent I supposed this single bank interrupt setup, as it's
 simpler (and older: A10 A20..) case were already working, and
 someway it works! :-)

Like I said, I strongly suspect it works by accident.

 then the more general case, multiple banks and so on.. will follow
 adding over.
 
  I think it worked by accident, because it's somewhat compatible with 
  the default interrupt property parsing code, but that probably need 
  some additional development. 
 
  What's mainly missing would be an irq_xlate function in the pinctrl 
  driver that would parse the interrupt property with the same format 
  than we have for gpios (phandle excluded, of course), which would mean 
  something like that in your case. 
 
  interrupt-parent = pio; 
  interrupts = 8 10 flags; 

 in this example, there was a interrupt-extended entry that's i suppose 
 it's more or less similar..
 

interrupt-extended is a way to group interrupt-parent and interrupts
together. These two syntaxes are strictly equivalent.

Maxime

-- 
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Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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Re: Re: [linux-sunxi] How to adjust bitrate of allwinner's encoder dynamically

2015-05-07 Thread kevin.z.m...@gmail.com

On 2015-05-05 at 21:21, jonsm...@gmail.com jonsm...@gmail.com wrote:
On Tue, May 5, 2015 at 12:00 AM, kevin.z.m...@gmail.com
kevin.z.m...@gmail.com wrote:

 On 2015-04-29 at 21:20, jonsm...@gmail.com jonsm...@gmail.com wrote:
On Tue, Apr 28, 2015 at 10:37 PM, kevin.z.m...@gmail.com
kevin.z.m...@gmail.com wrote:
 Hi,

 The encoder allows you to set the MaxQp(0~51), MinQp(0~51), and
 MaxBitrate

 parameters. MaxQp and MinQp are used to controlpicture quality and
 MaxBitrate

 is used to clamp the maximum encoding bit rate within the bitrate
 statistical

 time;

 The default configuration is MinQp = 10; MaxQp = 40. If you could not get

 it to work for lower bitrates , please try to change MaxQp to a bigger
 value,

The bitrate setting on an h.264 encoder is supposed to take precedence
and be a hard limit. So if I set 500Kb/sec the encoder has to adjust
everything else until it can hit and hold that limit. Min/MaxQp should
not overrule the Bitrate limit. I believe the only exception to that
is for VBR where you are allowed to exceed the bandwidth limit by 10%
for short periods of time. The encoder is also supposed to be smart on
how it adjusts itself when the bandwidth limit is set.

These limits are there for streaming video. I needed to set a 500Kb/s
hard limit because I only had 500Kb/s of streaming capacity available.
I couldn't figure out how to keep the Allwinner encoder at a 500Kb/s
limit, it would stay at 500Kb/s for a while but then if there was
rapid motion it would jump to 2Mb/s. It should not matter if CBR or
VBR is set, the limit should still be enforced. Of course when it
jumped to 2Mb/s on my 500Kb/s pipe, the stream dropped.

 Nowadays, the limits of streaming video can't be controlled accurately
 with every frame, but an average in a period. On the A20 platform, it
 can't reach 500kb/s with 720p@30fps, the lowest value should be 1.5Mb/s.
 
That was an important bit of information that should have been in the
datasheet. It would have saved me a huge amount of time messing with
the A20 if I had known 500Kb was never going to be possible.

 

Check out the the software x86 h.264 implementations - they will
output exactly 500Kb/s when told to. You can watch the picture become
very clear when the scene is still and then go grainy when there is
rapid motion.

Also - I had severe problems with noise on A20 cameras. That noise is
random from frame to frame. Encoding that noise wastes all of my
500Kb/s bandwidth which makes the image quality terrible. Typical
some type of ISP is used to remove this noise before h.264 encoding.

 There may be 3 main factors causing noise, they are lens, Sensor and
 ISP. A20 has none local ISP, selecting an external ISP may reduce the
 noise. Besides ISP, the lens and Sensor is important too, and the NT99141
 is recommended.

Does the Allwinner V3 support external I2S? I'd just look in the
datasheet, but it is too much hassle to get it.
 Yes, V3 can support external IIS.
 We will make the documents for v3 ready as soon as possible.
 
Can the V3 hit 500Kb/s for h.264?
For static scenes with little noise, V3 and A83T can reach 500kbps for
720p@30pfs or 1080p@15fps.

 
Currently we are using the Grain Media GM8138S. It is very nice with
the 128MB of DRAM in the same package. We also looked at the
Highsilicon Hi3518e but it gets way too hot. We use GM8138S with
2-channel I2S.
 
What we really need is:
1) 8-channel I2S
V3 can support 8 channel I2S with one data wire.

2) Camera that can do low noise, 720P or 1080P video at 500Kb/s (security 
video)
Take reference from the above.

3) Runs Android
Because V3 has no GPU, it's difficult to run a complete Android.

4) The unit is headless so no display
5) OpenCL on the GPU would be a bonus.
V3 has no GPU module, can't support OpenCL.


I have not found this combination is a low cost chip that works.
 
 

 
 Best Regards,
 kevin.z.m

 
 
 
-- 
Jon Smirl
jonsm...@gmail.com



kevin.z.m...@gmail.com

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[linux-sunxi] 6LowPan Suuport in linux-sunxi kernel

2015-05-07 Thread Puneet B
Hi ALL,

I need to test IOT kind of application with A20 board, but to test i need 
kernel which will support 6LowPan .
But only kernel 3.17 and above will support 6LowPan. So is it any branch of 
this kernel for A20 or  is it possible 
to make 3.4 to support 6LowPan?.

Regards
Punith

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[linux-sunxi] Re: [PATCH 4/6] dmaengine: sun6i: Add support for Allwinner H3 (sun8i) variant

2015-05-07 Thread Vinod Koul
On Wed, May 06, 2015 at 12:13:42PM +0200, Maxime Ripard wrote:
 On Wed, May 06, 2015 at 11:31:31AM +0200, Jens Kuske wrote:
  The H3 SoC has the same dma engine as the A31 (sun6i), with a
  reduced amount of endpoints and physical channels. Add the proper
  config data and compatible string to support it.
  
  Signed-off-by: Jens Kuske jensku...@gmail.com

This looks fine to me, I think can be merged now. Do you guys want the
mainatainers to pick up patches to their subsystem or merge them tgether,
though don't see any dependency though

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Re: [linux-sunxi] 6LowPan Suuport in linux-sunxi kernel

2015-05-07 Thread Julian Calaby
Hi Punith,

On Thu, May 7, 2015 at 10:10 PM, Puneet B punit...@gmail.com wrote:
 Hi ALL,

 I need to test IOT kind of application with A20 board, but to test i need
 kernel which will support 6LowPan .
 But only kernel 3.17 and above will support 6LowPan. So is it any branch of
 this kernel for A20 or  is it possible
 to make 3.4 to support 6LowPan?.

Have you looked at the linux-backports project?

https://backports.wiki.kernel.org/index.php/Main_Page

Thanks,

-- 
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Email: julian.cal...@gmail.com
Profile: http://www.google.com/profiles/julian.calaby/

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[linux-sunxi] [PATCH 2/2] ARM: dts: sun9i: cubieboard4: Enable LEDs

2015-05-07 Thread Chen-Yu Tsai
The Cubieboard4 has 2 controllable LEDs, 1 red and 1 green.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts 
b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 42ddc046213c..d63ea4284adf 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -62,6 +62,22 @@
stdout-path = serial0:115200n8;
};
 
+   leds {
+   compatible = gpio-leds;
+   pinctrl-names = default;
+   pinctrl-0 = led_pins_cubieboard4;
+
+   green {
+   label = cubieboard4:green:usr;
+   gpios = pio 7 17 GPIO_ACTIVE_HIGH; /* PH17 */
+   };
+
+   red {
+   label = cubieboard4:red:usr;
+   gpios = pio 7 6 GPIO_ACTIVE_HIGH; /* PH6 */
+   };
+   };
+
reg_usb3_vbus: usb3-vbus {
compatible = regulator-fixed;
pinctrl-names = default;
@@ -89,6 +105,13 @@
 };
 
 pio {
+   led_pins_cubieboard4: led-pins@0 {
+   allwinner,pins = PH6, PH17;
+   allwinner,function = gpio_out;
+   allwinner,drive = SUN4I_PINCTRL_10_MA;
+   allwinner,pull = SUN4I_PINCTRL_NO_PULL;
+   };
+
mmc0_cd_pin_cubieboard4: mmc0_cd_pin@0 {
allwinner,pins = PH18;
allwinner,function = gpio_in;
-- 
2.1.4

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[linux-sunxi] [PATCH 1/2] ARM: dts: sun9i: cubieboard4: Enable USB support

2015-05-07 Thread Chen-Yu Tsai
The Cubieboard4 has 4 USB ports. 3 of them are connected to a GL850G
USB hub chip on usb1. The fourth one, the lower port of 2 ports next
to the power barrel, is directly connected to usb3.

2 power enable GPIOs are used between the 2 port groups, 1 for each.
This raises the possibility of having no power for hub-connected port
next to the power barrel, if usb3 is not enabled.

Signed-off-by: Chen-Yu Tsai w...@csie.org
---
 arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 60 +
 1 file changed, 60 insertions(+)

diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts 
b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index 6484dcf69873..42ddc046213c 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -62,6 +62,30 @@
stdout-path = serial0:115200n8;
};
 
+   reg_usb3_vbus: usb3-vbus {
+   compatible = regulator-fixed;
+   pinctrl-names = default;
+   pinctrl-0 = usb3_vbus_pin_cubieboard4;
+   regulator-name = usb3-vbus;
+   regulator-min-microvolt = 500;
+   regulator-max-microvolt = 500;
+   enable-active-high;
+   gpio = pio 7 15 GPIO_ACTIVE_HIGH; /* PH15 */
+   };
+};
+
+ehci0 {
+   status = okay;
+};
+
+ehci2 {
+   status = okay;
+};
+
+/* usb1 is connected to a GL850G USB hub chip, so no need to enable OHCI */
+
+ohci2 {
+   status = okay;
 };
 
 pio {
@@ -71,6 +95,20 @@
allwinner,drive = SUN4I_PINCTRL_10_MA;
allwinner,pull = SUN4I_PINCTRL_PULL_UP;
};
+
+   usb1_vbus_pin_cubieboard4: usb1_vbus_pin@1 {
+   allwinner,pins = PH14;
+   allwinner,function = gpio_out;
+   allwinner,drive = SUN4I_PINCTRL_10_MA;
+   allwinner,pull = SUN4I_PINCTRL_NO_PULL;
+   };
+
+   usb3_vbus_pin_cubieboard4: usb3_vbus_pin@1 {
+   allwinner,pins = PH15;
+   allwinner,function = gpio_out;
+   allwinner,drive = SUN4I_PINCTRL_10_MA;
+   allwinner,pull = SUN4I_PINCTRL_NO_PULL;
+   };
 };
 
 mmc0 {
@@ -92,8 +130,30 @@
status = okay;
 };
 
+reg_usb1_vbus {
+   pinctrl-0 = usb1_vbus_pin_cubieboard4;
+   gpio = pio 7 14 GPIO_ACTIVE_HIGH; /* PH14 */
+   status = okay;
+};
+
 uart0 {
pinctrl-names = default;
pinctrl-0 = uart0_pins_a;
status = okay;
 };
+
+usbphy1 {
+   phy-supply = reg_usb1_vbus;
+   status = okay;
+};
+
+/*
+ * Unfortunately reg_usb1_vbus also powers one of the ports from usb3's hub.
+ * One should always make sure both regulators are enabled and working for
+ * all USB ports to have power.
+ */
+
+usbphy3 {
+   phy-supply = reg_usb3_vbus;
+   status = okay;
+};
-- 
2.1.4

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[linux-sunxi] [PATCH 0/2] ARM: sun9i: cubieboard4: Enable USB hosts and LEDs

2015-05-07 Thread Chen-Yu Tsai
Hi Maxime,

This small series enables USB host and LED support on the Cubieboard4.
We already support these on the Optimus, so it's just dts stuff.


Regards
ChenYu


Chen-Yu Tsai (2):
  ARM: dts: sun9i: cubieboard4: Enable USB support
  ARM: dts: sun9i: cubieboard4: Enable LEDs

 arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 83 +
 1 file changed, 83 insertions(+)

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2.1.4

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Re: [linux-sunxi] 6LowPan Suuport in linux-sunxi kernel

2015-05-07 Thread jonsm...@gmail.com
On Thu, May 7, 2015 at 8:10 AM, Puneet B punit...@gmail.com wrote:
 Hi ALL,

 I need to test IOT kind of application with A20 board, but to test i need
 kernel which will support 6LowPan .
 But only kernel 3.17 and above will support 6LowPan. So is it any branch of
 this kernel for A20 or  is it possible
 to make 3.4 to support 6LowPan?.

Use an 802.15.4 chip that supports 6Lowpan inside of it.  Like the TI
CC2530 or Freescale MC13224.  Some of these chips have UART (SLIP)
interfaces and other have USB Ethernet.  So now the kernel only sees
IPv6 via the USB Ethernet/SLIP and knows nothing about 6Lowpan.

Search for 6lowpan border routers. https://github.com/cetic/6lbr/wiki


 Regards
 Punith

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jonsm...@gmail.com

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