Re: [linux-sunxi] [PATCH 01/14] phy: Distinguish between Rx and Tx for MIPI D-PHY with submodes
Hi Jernej,
On Fri 23 Oct 20, 20:18, Jernej Škrabec wrote:
> Dne petek, 23. oktober 2020 ob 19:45:33 CEST je Paul Kocialkowski napisal(a):
> > As some D-PHY controllers support both Rx and Tx mode, we need a way for
> > users to explicitly request one or the other. For instance, Rx mode can
> > be used along with MIPI CSI-2 while Tx mode can be used with MIPI DSI.
> >
> > Introduce new MIPI D-PHY PHY submodes to use with PHY_MODE_MIPI_DPHY.
> > The default (zero value) is kept to Tx so only the rkisp1 driver, which
> > uses D-PHY in Rx mode, needs to be adapted.
> >
> > Signed-off-by: Paul Kocialkowski
> > ---
> > drivers/staging/media/rkisp1/rkisp1-isp.c | 3 ++-
> > include/linux/phy/phy-mipi-dphy.h | 13 +
>
> I think some changes are missing in this patch. For example,
> phy_set_mode_ext() must be modified to take another argument, otherwise
> change
> of rkisp1-isp driver doesn't make much sense.
Thanks for looking into this! As you can see in:
https://elixir.bootlin.com/linux/latest/source/include/linux/phy/phy.h#L213
phy_set_mode_ext already takes a submode argument (which is already used for
USB mode selection, for instance) and phy_set_mode is just a macro which calls
phy_set_mode_ext with submode set to 0.
In our case, that means that most current users of phy_set_mode with
PHY_MODE_MIPI_DPHY will select Tx mode by default, so there is no particular
need for adaptation. Only the rkisp1 driver uses PHY_MODE_MIPI_DPHY for Rx,
so this one was changed to use phy_set_mode_ext with PHY_MIPI_DPHY_SUBMODE_RX
instead.
As a result, there should be no missing changes. Do you agree?
Cheers,
Paul
> Best regards,
> Jernej
>
> > 2 files changed, 15 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/staging/media/rkisp1/rkisp1-isp.c b/drivers/staging/
> media/rkisp1/rkisp1-isp.c
> > index 6ec1e9816e9f..0afbce00121e 100644
> > --- a/drivers/staging/media/rkisp1/rkisp1-isp.c
> > +++ b/drivers/staging/media/rkisp1/rkisp1-isp.c
> > @@ -902,7 +902,8 @@ static int rkisp1_mipi_csi2_start(struct rkisp1_isp
> *isp,
> >
> > phy_mipi_dphy_get_default_config(pixel_clock, isp->sink_fmt-
> >bus_width,
> > sensor->lanes, cfg);
> > - phy_set_mode(sensor->dphy, PHY_MODE_MIPI_DPHY);
> > + phy_set_mode_ext(cdev->dphy, PHY_MODE_MIPI_DPHY,
> > +PHY_MIPI_DPHY_SUBMODE_RX);
> > phy_configure(sensor->dphy, &opts);
> > phy_power_on(sensor->dphy);
> >
> > diff --git a/include/linux/phy/phy-mipi-dphy.h b/include/linux/phy/phy-mipi-
> dphy.h
> > index a877ffee845d..0f57ef46a8b5 100644
> > --- a/include/linux/phy/phy-mipi-dphy.h
> > +++ b/include/linux/phy/phy-mipi-dphy.h
> > @@ -6,6 +6,19 @@
> > #ifndef __PHY_MIPI_DPHY_H_
> > #define __PHY_MIPI_DPHY_H_
> >
> > +/**
> > + * enum phy_mipi_dphy_submode - MIPI D-PHY sub-mode
> > + *
> > + * A MIPI D-PHY can be used to transmit or receive data.
> > + * Since some controllers can support both, the direction to enable is
> specified
> > + * with the PHY sub-mode. Transmit is assumed by default with phy_set_mode.
> > + */
> > +
> > +enum phy_mipi_dphy_submode {
> > + PHY_MIPI_DPHY_SUBMODE_TX = 0,
> > + PHY_MIPI_DPHY_SUBMODE_RX,
> > +};
> > +
> > /**
> > * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
> > *
> > --
> > 2.28.0
> >
> > --
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> linux-sunxi/20201023174546.504028-2-paul.kocialkowski%40bootlin.com.
> >
>
>
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Paul Kocialkowski, Bootlin
Embedded Linux and kernel engineering
https://bootlin.com
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Re: [linux-sunxi] [PATCH] Disable HS-DDR mode for Olimex A64-OLinuXino variants with eMMC
Hi Philip
> >
> > I catched a slight difference between the mainline and vendor driver
> > in DDR mode.
> >
> > the phase is set to 1
> > case MMC_TIMING_UHS_DDR50:
> > case MMC_TIMING_MMC_DDR52:
> > dat_drv_ph = 1;
> > speed_mod = SM2_HSDDR52_DDR50;
> > break;
> >
> > Could you add a hack in DDR mode and see if it's working better ?
> >
> > Maybe line 738:
> >
> > #define SDXC_REG_DRV_DL (0x0140)
> > #define SDXC_DAT_DRV_PH_SEL BIT(17)
> >
> > rval = mmc_readl(host, REG_DRV_DL);
> > rval |= SDXC_DAT_DRV_PH_SEL;
> > mmc_writel(host, REG_DRV_DL, rval);
>
> I tried with this patch but no luck, see log below
>
> --- a/drivers/mmc/host/sunxi-mmc.c
> +++ b/drivers/mmc/host/sunxi-mmc.c
> @@ -230,6 +230,8 @@
>
> #define SDXC_CAL_TIMEOUT 3 /* in seconds, 3s is enough*/
>
> +#define SDXC_DAT_DRV_PH_SEL BIT(17)
> +
> struct sunxi_mmc_clk_delay {
> u32 output;
> u32 sample;
> @@ -718,6 +720,7 @@
>struct mmc_ios *ios, u32 rate)
> {
> int index;
> + u32 rval;
>
> /* clk controller delays not used under new timings mode */
> if (host->use_new_timings)
> @@ -736,6 +739,10 @@
> if (ios->timing != MMC_TIMING_UHS_DDR50 &&
> ios->timing != MMC_TIMING_MMC_DDR52) {
> index = SDXC_CLK_50M;
> +
> + rval = mmc_readl(host, REG_DRV_DL);
> + rval |= SDXC_DAT_DRV_PH_SEL;
> + mmc_writel(host, REG_DRV_DL, rval);
> } else if (ios->bus_width == MMC_BUS_WIDTH_8) {
> index = SDXC_CLK_50M_DDR_8BIT;
> } else {
Sorry this will not work, as H6 uses new timing mode the function will
return before setting the DRV_PHASE.
Could you retry with a patch like this :
https://github.com/clementperon/linux/commit/287a62a6e9ccda3ade9b407ce12ee7db0865b41b.patch
Thanks for your test,
Clement
>
> Regards,
> Philip
>
> > Regards,
> > Clement
> >
> >>
> >> Regards,
> >> Clement
> >>
> >>>
> >>> Maxime
>
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[linux-sunxi] [PATCH 03/10] ARM: dts: sun7i: cubietruck: Enable RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Cubietruck has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 67073d97672d ("ARM: dts: sun7i: cubietruck: Enable the GMAC")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 8c8dee6ea461..9109ca0919ad 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -151,7 +151,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 02/10] ARM: dts: sun6i: a31-hummingbird: Enable RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: c220aec2bb79 ("ARM: dts: sun6i: Add Merrii A31 Hummingbird support")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
index 049e6ab3cf56..73de34ae37fd 100644
--- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
+++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
@@ -154,7 +154,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 05/10] ARM: dts: sun8i: h3: orangepi-plus2e: Enable RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Orange Pi Plus 2E has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Fixes: 7a78ef92cdc5 ("ARM: sun8i: h3: Enable EMAC with external PHY on Orange
Pi Plus 2E")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
index 6dbf7b2e0c13..b6ca45d18e51 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts
@@ -67,7 +67,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 01/10] Revert "arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active high"
From: Chen-Yu Tsai
This reverts commit 75ee680cbd2e4d0156b94f9fec50076361ab12f2.
Turns out the activity and link LEDs on the RJ45 port are active low,
just like on the Orange Pi PC.
Revert the commit that says otherwise.
Fixes: 75ee680cbd2e ("arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to
active high")
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Signed-off-by: Chen-Yu Tsai
---
If you have this board, please help test it.
For me, the correct lighting of the LEDs is both LEDs should be lit
when connected at 100 Mbps.
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index 71fb73208939..babf4cf1b2f6 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -53,11 +53,6 @@ aliases {
};
};
-&emac {
- /* LEDs changed to active high on the plus */
- /delete-property/ allwinner,leds-active-low;
-};
-
&mmc1 {
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
--
2.28.0
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[linux-sunxi] [PATCH 04/10] ARM: dts: sun7i: bananapi-m1-plus: Enable RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M1+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 04c85ecad32a ("ARM: dts: sun7i: Add dts file for Bananapi M1 Plus board")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
index 32d5d45a35c0..8945dbb114a2 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapi-m1-plus.dts
@@ -130,7 +130,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <®_gmac_3v3>;
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 10/10] arm64: dts: allwinner: a64: bananapi-m64: Enable RGMII RX/TX delay on PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M64 has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: e7295499903d ("arm64: allwinner: bananapi-m64: Enable dwmac-sun8i")
Fixes: 94f442886711 ("arm64: dts: allwinner: A64: Restore EMAC changes")
Signed-off-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index 3ea5182ca489..e5e840b9fbb4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -105,7 +105,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <®_dc1sw>;
status = "okay";
--
2.28.0
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[linux-sunxi] [PATCH 06/10] ARM: dts: sun8i: a83t: Enable both RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M3 and Cubietruck Plus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 039359948a4b ("ARM: dts: sun8i: a83t: Enable Ethernet on two boards")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 2 +-
arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 9d34eabba121..431f70234d36 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -131,7 +131,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_sw>;
phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
allwinner,rx-delay-ps = <700>;
allwinner,tx-delay-ps = <700>;
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index d9be511f054f..d8326a5c681d 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -183,7 +183,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_dldo4>;
phy-handle = <&rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 08/10] ARM: dts: sunxi: bananapi-m2-plus: Enable RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M2+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 8c7ba536e709 ("ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i")
Fixes: 4904337fe34f ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Fixes: aa8fee415f46 ("ARM: dts: sun8i: h3: Split out non-SoC-specific parts of
Bananapi M2 Plus")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
index 39263e74fbb5..8e5cb3b3fd68 100644
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
@@ -126,7 +126,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 07/10] ARM: dts: sun9i: Enable both RGMII RX/TX delay on Ethernet PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Cubieboard 4 and A80 Optimus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 98048143b7f8 ("ARM: dts: sun9i: cubieboard4: Enable GMAC")
Fixes: bc9bd03a44f9 ("ARM: dts: sun9i: a80-optimus: Enable GMAC")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts | 2 +-
arch/arm/boot/dts/sun9i-a80-optimus.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
index d3b337b043a1..484b93df20cb 100644
--- a/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
+++ b/arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
@@ -129,7 +129,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <®_cldo1>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun9i-a80-optimus.dts
b/arch/arm/boot/dts/sun9i-a80-optimus.dts
index bbc6335e5631..5c3580d712e4 100644
--- a/arch/arm/boot/dts/sun9i-a80-optimus.dts
+++ b/arch/arm/boot/dts/sun9i-a80-optimus.dts
@@ -124,7 +124,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <®_cldo1>;
status = "okay";
};
--
2.28.0
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[linux-sunxi] [PATCH 09/10] arm64: dts: allwinner: h5: libretech-all-h5-cc: Enable RGMII RX/TX delay on PHY
From: Chen-Yu Tsai
The Ethernet PHY on the Libre Computer ALL-H5-CC has the RX and TX
delays enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
rx/tx delay config").
Fixes: 60d0426d7603 ("arm64: dts: allwinner: h5: Add Libre Computer ALL-H5-CC
H5 board")
Signed-off-by: Chen-Yu Tsai
---
arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
index df1b9263ad0e..6e30a564c87f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts
@@ -36,7 +36,7 @@ &emac {
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <®_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
/delete-property/ allwinner,leds-active-low;
status = "okay";
};
--
2.28.0
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Re: [linux-sunxi] [PATCH 02/10] ARM: dts: sun6i: a31-hummingbird: Enable RGMII RX/TX delay on Ethernet PHY
在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
> From: Chen-Yu Tsai
>
> The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementation doesn't reconfigure the delays incorrectly. This
> happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
> rx/tx delay config").
Personally I think they should revert this commit, and consider other
solution.
This commit breaks everything.
(Although the patch on individual DT patches are technically correct)
>
> Fixes: c220aec2bb79 ("ARM: dts: sun6i: Add Merrii A31 Hummingbird
> support")
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> index 049e6ab3cf56..73de34ae37fd 100644
> --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> @@ -154,7 +154,7 @@ &gmac {
> pinctrl-names = "default";
> pinctrl-0 = <&gmac_rgmii_pins>;
> phy-handle = <&phy1>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> status = "okay";
> };
>
> --
> 2.28.0
>
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Re: [linux-sunxi] [PATCH 02/10] ARM: dts: sun6i: a31-hummingbird: Enable RGMII RX/TX delay on Ethernet PHY
Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng napisal(a):
> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
>
> > From: Chen-Yu Tsai
> >
> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> > enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
> >
> > Fix the phy-mode description to correct reflect this so that the
> > implementation doesn't reconfigure the delays incorrectly. This
> > happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
> > rx/tx delay config").
>
> Personally I think they should revert this commit, and consider other
> solution.
>
> This commit breaks everything.
>
Previously broken driver allowed inproper DT to work, so you have to fix
everything eventually.
Plus side, there is no need to have hack for Pine64 Plus ethernet anymore.
Best regards,
Jernej
> (Although the patch on individual DT patches are technically correct)
>
> > Fixes: c220aec2bb79 ("ARM: dts: sun6i: Add Merrii A31 Hummingbird
> > support")
> > Signed-off-by: Chen-Yu Tsai
> > ---
> >
> > arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> > b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> > index 049e6ab3cf56..73de34ae37fd 100644
> > --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> > +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> > @@ -154,7 +154,7 @@ &gmac {
> >
> > pinctrl-names = "default";
> > pinctrl-0 = <&gmac_rgmii_pins>;
> > phy-handle = <&phy1>;
> >
> > - phy-mode = "rgmii";
> > + phy-mode = "rgmii-id";
> >
> > status = "okay";
> >
> > };
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Re: [linux-sunxi] [PATCH 02/10] ARM: dts: sun6i: a31-hummingbird: Enable RGMII RX/TX delay on Ethernet PHY
于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec"
写到:
>Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng
>napisal(a):
>> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
>>
>> > From: Chen-Yu Tsai
>> >
>> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
>> > enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
>> >
>> > Fix the phy-mode description to correct reflect this so that the
>> > implementation doesn't reconfigure the delays incorrectly. This
>> > happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
>> > rx/tx delay config").
>>
>> Personally I think they should revert this commit, and consider other
>> solution.
>>
>> This commit breaks everything.
>>
>
>Previously broken driver allowed inproper DT to work, so you have to
>fix
>everything eventually.
There is no "improper DT" if it's already shipped, DT should suffer driver
change, not changed to match driver.
I think at least Fedora tends to ship a DT with a system image that will
not get updated when kernel gets updated.
>
>Plus side, there is no need to have hack for Pine64 Plus ethernet
>anymore.
>
>Best regards,
>Jernej
>
>> (Although the patch on individual DT patches are technically correct)
>>
>> > Fixes: c220aec2bb79 ("ARM: dts: sun6i: Add Merrii A31 Hummingbird
>> > support")
>> > Signed-off-by: Chen-Yu Tsai
>> > ---
>> >
>> > arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
>> > 1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> > b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> > index 049e6ab3cf56..73de34ae37fd 100644
>> > --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> > +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
>> > @@ -154,7 +154,7 @@ &gmac {
>> >
>> >pinctrl-names = "default";
>> >pinctrl-0 = <&gmac_rgmii_pins>;
>> >phy-handle = <&phy1>;
>> >
>> > - phy-mode = "rgmii";
>> > + phy-mode = "rgmii-id";
>> >
>> >status = "okay";
>> >
>> > };
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Re: [linux-sunxi] [PATCH 02/10] ARM: dts: sun6i: a31-hummingbird: Enable RGMII RX/TX delay on Ethernet PHY
Hi,
On Sat, 24 Oct 2020 at 20:39, Icenowy Zheng wrote:
>
>
>
> 于 2020年10月25日 GMT+08:00 上午2:30:35, "Jernej Škrabec"
> 写到:
> >Dne sobota, 24. oktober 2020 ob 19:51:06 CEST je Icenowy Zheng
> >napisal(a):
> >> 在 2020-10-25星期日的 00:25 +0800，Chen-Yu Tsai写道：
> >>
> >> > From: Chen-Yu Tsai
> >> >
> >> > The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
> >> > enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
> >> >
> >> > Fix the phy-mode description to correct reflect this so that the
> >> > implementation doesn't reconfigure the delays incorrectly. This
> >> > happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
> >> > rx/tx delay config").
> >>
> >> Personally I think they should revert this commit, and consider other
> >> solution.
> >>
> >> This commit breaks everything.
> >>
> >
> >Previously broken driver allowed inproper DT to work, so you have to
> >fix
> >everything eventually.
>
> There is no "improper DT" if it's already shipped, DT should suffer driver
> change, not changed to match driver.
>
> I think at least Fedora tends to ship a DT with a system image that will
> not get updated when kernel gets updated.
I think we are missing a phy-mode saying use RGMII but don't change
the delay set by the hardware.
Or maybe introduce a phy-mode='rgmii-noid' to explicitly disable the
RX/TD delay using software bits
and use phy-mode='rgmii' to keep the delay set by the hardware.
Clement
>
> >
> >Plus side, there is no need to have hack for Pine64 Plus ethernet
> >anymore.
> >
> >Best regards,
> >Jernej
> >
> >> (Although the patch on individual DT patches are technically correct)
> >>
> >> > Fixes: c220aec2bb79 ("ARM: dts: sun6i: Add Merrii A31 Hummingbird
> >> > support")
> >> > Signed-off-by: Chen-Yu Tsai
> >> > ---
> >> >
> >> > arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 2 +-
> >> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >> >
> >> > diff --git a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> >> > b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> >> > index 049e6ab3cf56..73de34ae37fd 100644
> >> > --- a/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> >> > +++ b/arch/arm/boot/dts/sun6i-a31-hummingbird.dts
> >> > @@ -154,7 +154,7 @@ &gmac {
> >> >
> >> >pinctrl-names = "default";
> >> >pinctrl-0 = <&gmac_rgmii_pins>;
> >> >phy-handle = <&phy1>;
> >> >
> >> > - phy-mode = "rgmii";
> >> > + phy-mode = "rgmii-id";
> >> >
> >> >status = "okay";
> >> >
> >> > };
>
> --
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Re: [linux-sunxi] [PATCH 10/10] arm64: dts: allwinner: a64: bananapi-m64: Enable RGMII RX/TX delay on PHY
On Sun, Oct 25, 2020 at 12:25:15AM +0800, Chen-Yu Tsai wrote:
> From: Chen-Yu Tsai
>
> The Ethernet PHY on the Bananapi M64 has the RX and TX delays
> enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
>
> Fix the phy-mode description to correct reflect this so that the
> implementation doesn't reconfigure the delays incorrectly. This
> happened with commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e
> rx/tx delay config").
>
> Fixes: e7295499903d ("arm64: allwinner: bananapi-m64: Enable dwmac-sun8i")
> Fixes: 94f442886711 ("arm64: dts: allwinner: A64: Restore EMAC changes")
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> index 3ea5182ca489..e5e840b9fbb4 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
> @@ -105,7 +105,7 @@ &ehci1 {
> &emac {
> pinctrl-names = "default";
> pinctrl-0 = <&rgmii_pins>;
> - phy-mode = "rgmii";
> + phy-mode = "rgmii-id";
> phy-handle = <&ext_rgmii_phy>;
> phy-supply = <®_dc1sw>;
> status = "okay";
> --
> 2.28.0
Tested-by: Corentin Labbe
Thanks
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Re: [linux-sunxi] [PATCH] Disable HS-DDR mode for Olimex A64-OLinuXino variants with eMMC
Hi Clément, On 24.10.20 at 15:00, Clément Péron wrote: > Hi Philip > > > >>> >>> I catched a slight difference between the mainline and vendor driver >>> in DDR mode. >>> >>> the phase is set to 1 >>> case MMC_TIMING_UHS_DDR50: >>> case MMC_TIMING_MMC_DDR52: >>> dat_drv_ph = 1; >>> speed_mod = SM2_HSDDR52_DDR50; >>> break; >>> >>> Could you add a hack in DDR mode and see if it's working better ? >>> >>> Maybe line 738: >>> >>> #define SDXC_REG_DRV_DL (0x0140) >>> #define SDXC_DAT_DRV_PH_SEL BIT(17) >>> >>> rval = mmc_readl(host, REG_DRV_DL); >>> rval |= SDXC_DAT_DRV_PH_SEL; >>> mmc_writel(host, REG_DRV_DL, rval); >> >> I tried with this patch but no luck, see log below > Sorry this will not work, as H6 uses new timing mode the function will > return before setting the DRV_PHASE. I'm actually testing on an A64 - but that shouldn't matter, right? > Could you retry with a patch like this : > https://github.com/clementperon/linux/commit/287a62a6e9ccda3ade9b407ce12ee7db0865b41b.patch Unfortunately that didn't work either: [...] [3.755418] sunxi-mmc 1c0f000.mmc: initialized, max. request size: 16384 KB, uses new timings mode [3.755432] sunxi-mmc 1c0f000.mmc: MMC version: 0.0.0 [3.758685] sunxi-mmc 1c1.mmc: allocated mmc-pwrseq [3.783369] sunxi-mmc 1c1.mmc: initialized, max. request size: 16384 KB, uses new timings mode [3.783382] sunxi-mmc 1c1.mmc: MMC version: 0.0.0 [3.798267] mmc0: new high speed SDHC card at address [3.799776] mmcblk0: mmc0: SC16G 14.8 GiB [3.804248] mmcblk0: p1 [3.811371] sunxi-mmc 1c11000.mmc: initialized, max. request size: 2048 KB, uses new timings mode [3.811385] sunxi-mmc 1c11000.mmc: MMC version: 0.0.0 [...] [3.936574] sunxi-mmc 1c11000.mmc: Setting Phase delay [3.936890] mmc2: new DDR MMC card at address 0001 [3.938617] mmcblk2: mmc2:0001 Q2J55L 7.09 GiB [3.939692] mmcblk2boot0: mmc2:0001 Q2J55L partition 1 16.0 MiB [3.940519] mmcblk2boot1: mmc2:0001 Q2J55L partition 2 16.0 MiB [3.943067] sunxi-mmc 1c11000.mmc: data error, sending stop command [3.943083] sunxi-mmc 1c11000.mmc: send stop command failed [...] [4.009680] blk_update_request: I/O error, dev mmcblk2, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 0 [4.009692] Buffer I/O error on dev mmcblk2, logical block 0, async page read [4.009817] sunxi-mmc 1c11000.mmc: data error, sending stop command [4.009899] blk_update_request: I/O error, dev mmcblk2, sector 2 op 0x0:(READ) flags 0x0 phys_seg 6 prio class 0 [4.009906] Buffer I/O error on dev mmcblk2, logical block 2, async page read [4.009914] Buffer I/O error on dev mmcblk2, logical block 3, async page read [4.009920] Buffer I/O error on dev mmcblk2, logical block 4, async page read [4.009926] Buffer I/O error on dev mmcblk2, logical block 5, async page read [4.009931] Buffer I/O error on dev mmcblk2, logical block 6, async page read [4.009937] Buffer I/O error on dev mmcblk2, logical block 7, async page read [...] > Thanks for your test, > Clement Thanks for trying to fix that :-) Philip -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. To view this discussion on the web, visit https://groups.google.com/d/msgid/linux-sunxi/22c45ac3-5406-3f80-0521-325e0fb9cacb%40inventati.org.
