Re: [linux-sunxi] [PATCH v2 0/5] ARM: sunxi: Add support for USB OTG PHY
On Tue, Nov 11, 2014 at 10:11 AM, Hans de Goede wrote: > Hi, > > On 11/10/2014 07:55 PM, Roman Byshko wrote: >> Hi, >> >> There is already support for two USB phys, which are used for >> USB host controllers on Allwinner SoC aka sunxi. >> >> This patch series add support for the USB OTG phy (aka phy0). >> >> The code has been tested on Allwinner A20 aka sun7i (Cubietruck). >> >> Best regards, >> Roman Byshko > > First of all very cool that you're working on this, I somehow missed > v1, but I'm very happy to see this. > > Second some questions, this series seems to only add support for > initializing the phy, without adding the necessary magic for > switching from app to host mode, and without actually hooking up musb, > I assume you've a follow up series adding musb support, which actually > uses the phy ? Yes, there will be follow ups. > Also have you coordinated your work with ChenYu? ATM ChenYu is mostly > working on other stuff, but AFAIk he has been working on musb support > in the past. Yes. Best, Roman > > Regards, > > Hans > > ___ > linux-arm-kernel mailing list > linux-arm-ker...@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 1/5] phy: sun4i: add support for USB phy0
The driver for sun4i USB phys currently supports
only phy1 and phy2 which are used for USB host
controllers. This patch adds support for USB phy0,
which is used by the musb hdrc USB controller.
Signed-off-by: Roman Byshko
---
drivers/phy/phy-sun4i-usb.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index 0baf5ef..6bd2b0c 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -157,6 +157,10 @@ static int sun4i_usb_phy_init(struct phy *_phy)
return ret;
}
+ /* Enable USB 45 Ohm resistor calibration */
+ if (phy->index == 0)
+ sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
+
/* Adjust PHY's magnitude and rate */
sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
@@ -213,7 +217,7 @@ static struct phy *sun4i_usb_phy_xlate(struct device *dev,
{
struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
- if (WARN_ON(args->args[0] == 0 || args->args[0] >= data->num_phys))
+ if (args->args[0] >= data->num_phys)
return ERR_PTR(-ENODEV);
return data->phys[args->args[0]].phy;
@@ -255,8 +259,7 @@ static int sun4i_usb_phy_probe(struct platform_device *pdev)
if (IS_ERR(data->base))
return PTR_ERR(data->base);
- /* Skip 0, 0 is the phy for otg which is not yet supported. */
- for (i = 1; i < data->num_phys; i++) {
+ for (i = 0; i < data->num_phys; i++) {
struct sun4i_usb_phy *phy = data->phys + i;
char name[16];
--
2.1.2
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[linux-sunxi] [PATCH v2 5/5] ARM: dts: sun7i: Cubietruck: add power supply regulator for USB OTG VBUS
Signed-off-by: Roman Byshko
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 1682307..a281d25 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -40,6 +40,7 @@
};
usbphy: phy@01c13400 {
+ usb0_vbus-supply = <®_usb0_vbus>;
usb1_vbus-supply = <®_usb1_vbus>;
usb2_vbus-supply = <®_usb2_vbus>;
status = "okay";
--
2.1.2
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[linux-sunxi] [PATCH v2 0/5] ARM: sunxi: Add support for USB OTG PHY
Hi, There is already support for two USB phys, which are used for USB host controllers on Allwinner SoC aka sunxi. This patch series add support for the USB OTG phy (aka phy0). The code has been tested on Allwinner A20 aka sun7i (Cubietruck). Best regards, Roman Byshko Changes since v1: * Improved comment about 45 Ohm resistor calibration * Added Signed-off-by to all patches Roman Byshko (5): phy: sun4i: add support for USB phy0 ARM: dtsi: sunxi: add common VBUS regulator ARM: sun7i: dtsi: add support for usbphy0 ARM: dts: sun7i: Cubietruck: override regulator pin ARM: dts: sun7i: Cubietruck: add power supply regulator for USB OTG VBUS arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 14 ++ arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++-- arch/arm/boot/dts/sunxi-common-regulators.dtsi | 19 +++ drivers/phy/phy-sun4i-usb.c| 9 ++--- 4 files changed, 41 insertions(+), 5 deletions(-) -- 2.1.2 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 3/5] ARM: sun7i: dtsi: add support for usbphy0
Signed-off-by: Roman Byshko --- arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index 82097c9..f787ccb 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -552,8 +552,8 @@ reg-names = "phy_ctrl", "pmu1", "pmu2"; clocks = <&usb_clk 8>; clock-names = "usb_phy"; - resets = <&usb_clk 1>, <&usb_clk 2>; - reset-names = "usb1_reset", "usb2_reset"; + resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>; + reset-names = "usb0_reset", "usb1_reset", "usb2_reset"; status = "disabled"; }; -- 2.1.2 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 4/5] ARM: dts: sun7i: Cubietruck: override regulator pin
Cubietruck uses different pin for the USB OTG VBUS that
is why we override the one defined in sunxi-common-regulators.dtsi
Signed-off-by: Roman Byshko
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index a6c1a3c..1682307 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -92,6 +92,13 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+
+ usb0_vbus_pin_a: usb0_vbus_pin@0 {
+ allwinner,pins = "PH17";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
};
pwm: pwm@01c20e00 {
@@ -185,6 +192,12 @@
status = "okay";
};
+ reg_usb0_vbus: usb0-vbus {
+ pinctrl-0 = <&usb0_vbus_pin_a>;
+ gpio = <&pio 7 17 0>;
+ status = "okay";
+ };
+
reg_usb1_vbus: usb1-vbus {
status = "okay";
};
--
2.1.2
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[linux-sunxi] [PATCH v2 2/5] ARM: dtsi: sunxi: add common VBUS regulator
Until now the regulator nodes for powering USB VBUS
existed only for the two host controllers. Now the regulator
is added for USB OTG too.
Signed-off-by: Roman Byshko
---
arch/arm/boot/dts/sunxi-common-regulators.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-common-regulators.dtsi
b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
index c9c5b10..f521672 100644
--- a/arch/arm/boot/dts/sunxi-common-regulators.dtsi
+++ b/arch/arm/boot/dts/sunxi-common-regulators.dtsi
@@ -21,6 +21,13 @@
allwinner,pull = <0>;
};
+ usb0_vbus_pin_a: usb0_vbus_pin@0 {
+ allwinner,pins = "PB9";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
usb1_vbus_pin_a: usb1_vbus_pin@0 {
allwinner,pins = "PH6";
allwinner,function = "gpio_out";
@@ -49,6 +56,18 @@
status = "disabled";
};
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_vbus_pin_a>;
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ enable-active-high;
+ gpio = <&pio 1 9 0>;
+ status = "disabled";
+ };
+
reg_usb1_vbus: usb1-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
--
2.1.2
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[linux-sunxi] [PATCH v4 2/5] sunxi: add USB EHCI driver
The Allwinner aka sunxi SoCs have one or more USB host controllers.
This adds a driver for their EHCI.
Signed-off-by: Roman Byshko
---
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-sunxi.c | 201 ++
2 files changed, 202 insertions(+)
create mode 100644 drivers/usb/host/ehci-sunxi.c
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 04c1a64..c4f5157 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
new file mode 100644
index 000..23617b7
--- /dev/null
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -0,0 +1,201 @@
+/*
+ * Copyright (C) 2014 Roman Byshko
+ *
+ * Roman Byshko
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include "ehci.h"
+
+#define SUNXI_USB1_IO_BASE 0x01c14000
+#define SUNXI_USB2_IO_BASE 0x01c1c000
+
+#define SUNXI_USB_PMU_IRQ_ENABLE 0x800
+#define SUNXI_USB_CSR 0x01c13404
+#define SUNXI_USB_PASSBY_EN1
+
+#define SUNXI_EHCI_AHB_ICHR8_EN(1 << 10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0)
+
+static struct sunxi_ehci_hcd {
+ struct usb_hcd *hcd;
+ int usb_rst_mask;
+ int ahb_clk_mask;
+ int gpio_vbus;
+ void *csr;
+ int irq;
+ int id;
+} sunxi_echi_hcd[] = {
+ {
+ .usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
+ .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
+ .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
+ .csr = (void *)SUNXI_USB_CSR,
+ .irq = 39,
+ .id = 1,
+ },
+#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
+ {
+ .usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
+ .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
+ .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
+ .csr = (void *)SUNXI_USB_CSR,
+ .irq = 40,
+ .id = 2,
+ }
+#endif
+};
+
+static int enabled_hcd_count;
+
+static void *get_io_base(int hcd_id)
+{
+ if (hcd_id == 1)
+ return (void *)SUNXI_USB1_IO_BASE;
+ else if (hcd_id == 2)
+ return (void *)SUNXI_USB2_IO_BASE;
+ else
+ return NULL;
+}
+
+static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
+ int data, int len)
+{
+ int j = 0, usbc_bit = 0;
+ void *dest = sunxi_ehci->csr;
+
+ usbc_bit = 1 << (sunxi_ehci->id * 2);
+ for (j = 0; j < len; j++) {
+ /* set the bit address to be written */
+ clrbits_le32(dest, 0xff << 8);
+ setbits_le32(dest, (addr + j) << 8);
+
+ clrbits_le32(dest, usbc_bit);
+ /* set data bit */
+ if (data & 0x1)
+ setbits_le32(dest, 1 << 7);
+ else
+ clrbits_le32(dest, 1 << 7);
+
+ setbits_le32(dest, usbc_bit);
+
+ clrbits_le32(dest, usbc_bit);
+
+ data >>= 1;
+ }
+}
+
+static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+ /* The following comments are machine
+* translated from Chinese, you have been warned!
+*/
+
+ /* adjust PHY's magnitude and rate */
+ usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
+
+ /* threshold adjustment disconnect */
+#ifdef CONFIG_SUN4I
+ usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
+#else
+ usb_phy_write(sunxi_ehci, 0x2a, 2, 2);
+#endif
+
+ return;
+}
+
+static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable)
+{
+ unsigned long bits = 0;
+ void *addr = get_io_base(sunxi_ehci->id) + SUNXI_USB_PMU_IRQ_ENABLE;
+
+ bits = SUNXI_EHCI_AHB_ICHR8_EN |
+ SUNXI_EHCI_AHB_INCR4_BURST_EN |
+ SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
+ SUNXI_EHCI_ULPI_BYPASS_EN;
+
+ if (enable)
+ setbits_le32(addr, bits);
+ else
+ clrbits_le32(addr, bits);
+
+ return;
+}
+
+static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+ struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ setbits_le32(&a
[linux-sunxi] [PATCH v3 1/5] sunxi: add defines to control USB Host clocks/resets
The commit adds three defines which will be used in
the EHCI driver to enable USB clock and assert
reset controllers of the corresponding PHYs.
Signed-off-by: Roman Byshko
Acked-by: Ian Campbell
---
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 928f3f2..fe7348a 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -253,4 +253,8 @@ struct sunxi_ccm_reg {
#define CCM_GMAC_CTRL_GPIT_MII (0x0 << 2)
#define CCM_GMAC_CTRL_GPIT_RGMII (0x1 << 2)
+#define CCM_USB_CTRL_PHY1_RST (0x1 << 1)
+#define CCM_USB_CTRL_PHY2_RST (0x1 << 2)
+#define CCM_USB_CTRL_PHYGATE (0x1 << 8)
+
#endif /* _SUNXI_CLOCK_SUN4I_H */
--
2.0.0
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[linux-sunxi] [PATCH v3 2/5] sunxi: add USB EHCI driver
The Allwinner aka sunxi SoCs have one or more USB host controllers.
This adds a driver for their EHCI.
Signed-off-by: Roman Byshko
---
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-sunxi.c | 196 ++
2 files changed, 197 insertions(+)
create mode 100644 drivers/usb/host/ehci-sunxi.c
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 04c1a64..c4f5157 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
new file mode 100644
index 000..dc628ca
--- /dev/null
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -0,0 +1,196 @@
+/*
+ * Copyright (C) 2014 Roman Byshko
+ *
+ * Roman Byshko
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include "ehci.h"
+
+#define SUNXI_USB1_IO_BASE 0x01c14000
+#define SUNXI_USB2_IO_BASE 0x01c1c000
+
+#define SUNXI_USB_PMU_IRQ_ENABLE 0x800
+#define SUNXI_USB_CSR 0x01c13404
+#define SUNXI_USB_PASSBY_EN1
+
+#define SUNXI_EHCI_AHB_ICHR8_EN(1 << 10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0)
+
+static struct sunxi_ehci_hcd {
+ struct usb_hcd *hcd;
+ int usb_rst_mask;
+ int ahb_clk_mask;
+ int gpio_vbus;
+ void *csr;
+ int irq;
+ int id;
+} sunxi_echi_hcd[] = {
+ {
+ .usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
+ .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0,
+ .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
+ .csr = (void*) SUNXI_USB_CSR,
+ .irq = 39,
+ .id = 1,
+ },
+#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
+ {
+ .usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
+ .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1,
+ .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
+ .csr = (void*) SUNXI_USB_CSR,
+ .irq = 40,
+ .id = 2,
+ }
+#endif
+};
+
+static int enabled_hcd_count = 0;
+
+static void* get_io_base(int hcd_id)
+{
+ if (hcd_id == 1)
+ return (void*) SUNXI_USB1_IO_BASE;
+ else if (hcd_id == 2)
+ return (void*) SUNXI_USB2_IO_BASE;
+ else return NULL;
+}
+
+static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
+ int data, int len)
+{
+ int j = 0, usbc_bit = 0;
+ void *dest = sunxi_ehci->csr;
+
+ usbc_bit = 1 << (sunxi_ehci->id * 2);
+ for (j = 0; j < len; j++) {
+ /* set the bit address to be written */
+ clrbits_le32(dest, 0xff << 8);
+ setbits_le32(dest, (addr + j) << 8);
+
+ clrbits_le32(dest, usbc_bit);
+ /* set data bit */
+ if (data & 0x1)
+ setbits_le32(dest, 1 << 7);
+ else
+ clrbits_le32(dest, 1 << 7);
+
+ setbits_le32(dest, usbc_bit);
+
+ clrbits_le32(dest, usbc_bit);
+
+ data >>= 1;
+ }
+}
+
+static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+ /* The following comments are machine
+* translated from Chinese, you have been warned!
+*/
+
+ /* adjust PHY's magnitude and rate */
+ usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
+
+ /* threshold adjustment disconnect */
+ usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
+
+ return;
+}
+
+static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable)
+{
+ unsigned long bits = 0;
+ void *addr = get_io_base(sunxi_ehci->id) + SUNXI_USB_PMU_IRQ_ENABLE;
+
+ bits = SUNXI_EHCI_AHB_ICHR8_EN |
+ SUNXI_EHCI_AHB_INCR4_BURST_EN |
+ SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
+ SUNXI_EHCI_ULPI_BYPASS_EN;
+
+ if (enable)
+ setbits_le32(addr, bits);
+ else
+ clrbits_le32(addr, bits);
+
+ return;
+}
+
+static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+ struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ setbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask);
+ setbits_le32(&cc
[linux-sunxi] [PATCH v3 4/5] sun7i: add USB EHCI settings
Specific USB EHCI settings to be set for sun7i if CONFIG_USB_EHCI is enabled. Signed-off-by: Roman Byshko Acked-by: Ian Campbell --- include/configs/sun7i.h | 8 1 file changed, 8 insertions(+) diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index d9be104..0c9bddd 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -17,6 +17,14 @@ #define CONFIG_SYS_PROMPT "sun7i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI + +#define CONFIG_USB_MAX_CONTROLLER_COUNT2 +#define CONFIG_SUNXI_USB_VBUS0_GPIO230 +#define CONFIG_SUNXI_USB_VBUS1_GPIO227 +#endif + /* * Include common sunxi configuration where most the settings are */ -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v3 0/5] ARM: Allwinner sunxi USB Host EHCI support
This patch series adds USB Host EHCI support to the sunxi SoCs. It was tested on Cubietruck. Now you could boot from a USB stick or use a compatible Ethernet dongle to add a second Ethernet port in U-Boot. Best, Roman Byshko Changes since v2: - improved commit messages - removed BIT macro - added get_io_base function - removed unnecessary verboseness when defining sunxi_echi_hcd array - the EHCI driver is now based on [2] and uses GPIO driver - possible failure is ruled out by introducing enabled_hcd_count Changes since v1: - fixed erroneous copyright author - used SPDX tag instead of the full license - used setbits_le32/clrbits_le32 instead of direct bit poking - usage of setbits_le32/clrbits_le32 automatically fixed bug where usbc_bit was clobbered unintentionally - added more info about commented out gpio_direction_output, it will be used once [1] is applied against upstream [1] http://patchwork.ozlabs.org/patch/356566/ [2] http://git.denx.de/u-boot-sunxi.git/ Roman Byshko (5): sunxi: add defines to control USB Host clocks/resets sunxi: add USB EHCI driver sunxi: add general USB settings sun7i: add USB EHCI settings sun7i: cubietruck: enable USB EHCI arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 4 + boards.cfg| 2 +- drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-sunxi.c | 196 ++ include/configs/sun7i.h | 8 ++ include/configs/sunxi-common.h| 6 + 6 files changed, 216 insertions(+), 1 deletion(-) create mode 100644 drivers/usb/host/ehci-sunxi.c -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v3 3/5] sunxi: add general USB settings
General configuration settings to be set if CONFIG_USB_EHCI is enabled for an Allwinner aka sunxi SoC. Signed-off-by: Roman Byshko Acked-by: Ian Campbell --- include/configs/sunxi-common.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 845b004..18dbede 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -204,6 +204,12 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #endif +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 +#define CONFIG_USB_STORAGE +#endif + #if !defined CONFIG_ENV_IS_IN_MMC && \ !defined CONFIG_ENV_IS_IN_NAND && \ !defined CONFIG_ENV_IS_IN_FAT && \ -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v3 5/5] sun7i: cubietruck: enable USB EHCI
Cubietruck has two USB host controllers. This makes them usable by enabling the EHCI driver for them. Signed-off-by: Roman Byshko Acked-by: Ian Campbell --- boards.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index 035b5c7..ae167c2 100644 --- a/boards.cfg +++ b/boards.cfg @@ -381,7 +381,7 @@ Active arm armv7 sunxi - sunxi Active arm armv7 sunxi - sunxi Cubieboard sun4i:CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC Hans de Goede Active arm armv7 sunxi - sunxi Cubieboard2 sun7i:CUBIEBOARD2,SPL,SUNXI_GMAC Ian Campbell :Hans de Goede Active arm armv7 sunxi - sunxi Cubieboard2_FEL sun7i:CUBIEBOARD2,SPL_FEL,SUNXI_GMAC Ian Campbell :Hans de Goede -Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,AXP209_POWER,SUNXI_GMAC,RGMII Ian Campbell :Hans de Goede +Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,AXP209_POWER,SUNXI_GMAC,RGMII,USB_EHCI Ian Campbell :Hans de Goede Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,AXP209_POWER,SUNXI_GMAC,RGMII Ian Campbell :Hans de Goede Active arm armv7 sunxi - sunxi r7-tv-dongle sun5i:R7DONGLE,SPL,AXP152_POWER Hans de Goede Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 2/5] sunxi: add USB EHCI driver
Signed-off-by: Roman Byshko
---
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-sunxi.c | 212 ++
2 files changed, 213 insertions(+)
create mode 100644 drivers/usb/host/ehci-sunxi.c
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 04c1a64..c4f5157 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
+obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
obj-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o
obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
new file mode 100644
index 000..8e2baa9
--- /dev/null
+++ b/drivers/usb/host/ehci-sunxi.c
@@ -0,0 +1,212 @@
+/*
+ * Copyright (C) 2014 Roman Byshko
+ *
+ * Roman Byshko
+ *
+ * Based on code from
+ * Allwinner Technology Co., Ltd.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include "ehci.h"
+
+#define BIT(x) (1 << (x))
+
+#define SUNXI_USB1_IO_BASE 0x01c14000
+#define SUNXI_USB2_IO_BASE 0x01c1c000
+
+#define SUNXI_USB_PMU_IRQ_ENABLE 0x800
+#define SUNXI_USB_CSR 0x01c13404
+#define SUNXI_USB_PASSBY_EN1
+
+#define SUNXI_EHCI_AHB_ICHR8_ENBIT(10)
+#define SUNXI_EHCI_AHB_INCR4_BURST_EN BIT(9)
+#define SUNXI_EHCI_AHB_INCRX_ALIGN_EN BIT(8)
+#define SUNXI_EHCI_ULPI_BYPASS_EN BIT(0)
+
+static struct sunxi_ehci_hcd {
+ void *ehci_base;
+ struct usb_hcd *hcd;
+ int usb_rst_mask;
+ int ahb_clk_mask;
+ int gpio_vbus;
+ void *csr;
+ int irq;
+ int id;
+} sunxi_echi_hcd[CONFIG_USB_MAX_CONTROLLER_COUNT] = {
+ [0] = {
+ .ehci_base = (void *) SUNXI_USB1_IO_BASE,
+ .usb_rst_mask = CCM_USB_CTRL_PHY1_RST,
+ .ahb_clk_mask = BIT(AHB_GATE_OFFSET_USB_EHCI0),
+ .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO,
+ .csr = (void*) SUNXI_USB_CSR,
+ .irq = 39,
+ .id = 1,
+ },
+#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
+ [1] = {
+ .ehci_base = (void *) SUNXI_USB2_IO_BASE,
+ .usb_rst_mask = CCM_USB_CTRL_PHY2_RST,
+ .ahb_clk_mask = BIT(AHB_GATE_OFFSET_USB_EHCI1),
+ .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO,
+ .csr = (void*) SUNXI_USB_CSR,
+ .irq = 40,
+ .id = 2,
+ }
+#endif
+};
+
+static int sunxi_gpio_output(u32 pin, u32 val)
+{
+ u32 bank = GPIO_BANK(pin);
+ u32 num = GPIO_NUM(pin);
+ struct sunxi_gpio *pio =
+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+
+ if (val)
+ setbits_le32(&pio->dat, 0x1 << num);
+ else
+ clrbits_le32(&pio->dat, 0x1 << num);
+
+ return 0;
+}
+
+static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr,
+ int data, int len)
+{
+ int temp = 0, j = 0, usbc_bit = 0;
+ void *dest = sunxi_ehci->csr;
+
+ usbc_bit = BIT(sunxi_ehci->id * 2);
+ for (j = 0; j < len; j++) {
+ /* set the bit address to be written */
+ clrbits_le32(dest, 0xff << 8);
+ setbits_le32(dest, (addr + j) << 8);
+
+ clrbits_le32(dest, usbc_bit);
+ /* set data bit */
+ if (data & 0x1)
+ setbits_le32(dest, BIT(7));
+ else
+ clrbits_le32(dest, BIT(7));
+
+ setbits_le32(dest, usbc_bit);
+
+ clrbits_le32(dest, usbc_bit);
+
+ data >>= 1;
+ }
+}
+
+static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci)
+{
+ /* The following comments are machine
+* translated from Chinese, you have been warned!
+*/
+
+ /* adjust PHY's magnitude and rate */
+ usb_phy_write(sunxi_ehci, 0x20, 0x14, 5);
+
+ /* threshold adjustment disconnect */
+ usb_phy_write(sunxi_ehci, 0x2a, 3, 2);
+
+ return;
+}
+
+static void sunxi_usb_passby(struct sunxi_ehci_hcd *sunxi_ehci, int enable)
+{
+ unsigned long reg_value = 0;
+ unsigned long bits = 0;
+ void *addr = sunxi_ehci->ehci_base + SUNXI_USB_PMU_IRQ_ENABLE;
+
+ bits = SUNXI_EHCI_AHB_ICHR8_EN |
+ SUNXI_EHCI_AHB_INCR4_BURST_EN |
+ SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
+ SUNXI_EHCI_ULPI_BYPASS_EN;
+
+ if (enable)
+ setbits_le32(addr, bits);
+ else
+ clrbits_le32(addr, bits);
+
+ retur
[linux-sunxi] [PATCH v2 4/5] sun7i: add USB EHCI configuration
Signed-off-by: Roman Byshko --- include/configs/sun7i.h | 8 1 file changed, 8 insertions(+) diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 9b693f7..0a1d83e 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -16,6 +16,14 @@ #define CONFIG_SYS_PROMPT "sun7i# " +#ifdef CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_SUNXI + +#define CONFIG_USB_MAX_CONTROLLER_COUNT2 +#define CONFIG_SUNXI_USB_VBUS0_GPIO230 +#define CONFIG_SUNXI_USB_VBUS1_GPIO227 +#endif + /* * Include common sunxi configuration where most the settings are */ -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 3/5] sunxi: add USB options to configs
Signed-off-by: Roman Byshko --- include/configs/sunxi-common.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 5d72d62..c7746bb 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -181,6 +181,12 @@ #define CONFIG_BOOTP_SEND_HOSTNAME #endif +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1 +#define CONFIG_USB_STORAGE +#endif + #if !defined CONFIG_ENV_IS_IN_MMC && \ !defined CONFIG_ENV_IS_IN_NAND && \ !defined CONFIG_ENV_IS_IN_FAT && \ -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 5/5] sun7i: cubietruck: enable USB EHCI
Signed-off-by: Roman Byshko --- boards.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards.cfg b/boards.cfg index 1ba2081..fda3a08 100644 --- a/boards.cfg +++ b/boards.cfg @@ -377,7 +377,7 @@ Active arm armv7 rmobile renesas lager Active arm armv7 s5pc1xx samsung goni s5p_goni - Robert Baldyga Active arm armv7 s5pc1xx samsung smdkc100 smdkc100 - Minkyu Kang Active arm armv7 socfpga altera socfpga socfpga_cyclone5 - - -Active arm armv7 sunxi - sunxi Cubietrucksun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII - +Active arm armv7 sunxi - sunxi Cubietruck sun7i:CUBIETRUCK,SPL,SUNXI_GMAC,RGMII,USB_EHCI - Active arm armv7 sunxi - sunxi Cubietruck_FEL sun7i:CUBIETRUCK,SPL_FEL,SUNXI_GMAC,RGMII - Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier Active arm armv7 u8500 st-ericsson u8500 u8500_href- - -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 0/5] ARM: Allwinner sun7i (A20) USB Host EHCI support
This patch series adds USB Host EHCI support to the sun7i SoC. It was tested on Cubietruck. Now you could boot from a USB stick or use a compatible Ethernet dongle to add a second Ethernet port in U-Boot. ehci-sunxi.c contains some code for poking GPIOs. This code will go away once [1] is applied against upstream. For now this patch series is self-contained and has no dependencies. Best, Roman Byshko Changes since v1: - fixed erroneous copyright author - used SPDX tag instead of the full license - used setbits_le32/clrbits_le32 instead of direct bit poking - usage of setbits_le32/clrbits_le32 automatically fixed bug where usbc_bit was clobbered unintentionally - added more info about commented out gpio_direction_output, it will be used once [1] is applied against upstream [1] http://patchwork.ozlabs.org/patch/356566/ Roman Byshko (5): sunxi: add defines to control USB Host clocks/resets sunxi: add USB EHCI driver sunxi: add USB options to configs sun7i: add USB EHCI configuration sun7i: cubietruck: enable USB EHCI arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 4 + boards.cfg| 2 +- drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-sunxi.c | 212 ++ include/configs/sun7i.h | 8 + include/configs/sunxi-common.h| 6 + 6 files changed, 232 insertions(+), 1 deletion(-) create mode 100644 drivers/usb/host/ehci-sunxi.c -- 2.0.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to linux-sunxi+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/d/optout.
[linux-sunxi] [PATCH v2 1/5] sunxi: add defines to control USB Host clocks/resets
Signed-off-by: Roman Byshko
---
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 928f3f2..fe7348a 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -253,4 +253,8 @@ struct sunxi_ccm_reg {
#define CCM_GMAC_CTRL_GPIT_MII (0x0 << 2)
#define CCM_GMAC_CTRL_GPIT_RGMII (0x1 << 2)
+#define CCM_USB_CTRL_PHY1_RST (0x1 << 1)
+#define CCM_USB_CTRL_PHY2_RST (0x1 << 2)
+#define CCM_USB_CTRL_PHYGATE (0x1 << 8)
+
#endif /* _SUNXI_CLOCK_SUN4I_H */
--
2.0.0
--
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