Re: [linux-sunxi] sun6i SPL support status update

2014-06-13 Thread Maksim Lin
Came across this thread in my attempts to get u-boot booting off a sdcard 
on a A31 based tablet.

Would there have been in more work on this since April? 

Maks.

On Thursday, 3 April 2014 19:31:44 UTC+11, Maxime Ripard wrote:
>
> On Tue, Apr 01, 2014 at 09:55:44PM +0200, Olliver Schinagl wrote: 
> > On 03/31/2014 08:27 AM, Chen-Yu Tsai wrote: 
> > >Hi Hans, 
> > > 
> > >On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede  > wrote: 
> > >>Hi, 
> > >> 
> > >>After wens pointed me to: 
> > >>
> http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31
>  
> > >> 
> > >>I've tried to get a full SPL going on sun6i. No luck sofar, 
> > >>dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram 
> > >>going, at least get_ram_size() likes it. But I cannot get the 
> > >>mmc to work in the SPL. I've narrowed this down to 2  problems, 
> > >>which I believe are related: 
> > >> 
> > >>1) The mmc controller will simply not work with pll6 as source, 
> > >>after adding a test for the pll6 lock bit I believe this is caused 
> > >>by pll6 never locking. 
> > >> 
> > >>2) When switching the mmc controller clocksource to OSC24M, then 
> > >>it does work, but gets stuck reading the first sector from the card. 
> > >>I believe this happens because the card is only being supplied 3.0V' 
> > >>rather then 3.3V. 
> > >> 
> > >>Note that the same code works fine in the no SPL u-boot when loaded 
> > >>through boot0 + boot1. 
> > >> 
> > >>Likely wrong power supply voltages are the culprit in both cases 
> > >>(the A31 also has a vdd-pll power pin. 
> > >> 
> > >>So it looks like the next step is to first get the pmic going in 
> > >>u-boot (which will be useful even if booted through boot0 + 1, to 
> > >>enable the nic-phy if nothing else). 
> > > 
> > >The A23 lichee u-boot has drivers for P2WI (used in sun6i) and RSB 
> > >(reduced serial bus, used on A23): 
> > Are they not the same? I haven't looked I admit, I just figured they 
> > changed the name a little to make it sound distinctive. 
>
> We don't have much details, but the bus itself looks different, since 
> it supports many devices, which is impossible with the p2wi. 
>   
> > Are they similar at all? If so, I guess that the i2c vs p2wi 
> > discussion held a few days ago is moot then :) 
>
> Why so? 
>
> -- 
> Maxime Ripard, Free Electrons 
> Embedded Linux, Kernel and Android engineering 
> http://free-electrons.com 
>

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Re: [linux-sunxi] sun6i SPL support status update

2014-04-03 Thread Maxime Ripard
On Tue, Apr 01, 2014 at 09:55:44PM +0200, Olliver Schinagl wrote:
> On 03/31/2014 08:27 AM, Chen-Yu Tsai wrote:
> >Hi Hans,
> >
> >On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede  wrote:
> >>Hi,
> >>
> >>After wens pointed me to:
> >>http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31
> >>
> >>I've tried to get a full SPL going on sun6i. No luck sofar,
> >>dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram
> >>going, at least get_ram_size() likes it. But I cannot get the
> >>mmc to work in the SPL. I've narrowed this down to 2  problems,
> >>which I believe are related:
> >>
> >>1) The mmc controller will simply not work with pll6 as source,
> >>after adding a test for the pll6 lock bit I believe this is caused
> >>by pll6 never locking.
> >>
> >>2) When switching the mmc controller clocksource to OSC24M, then
> >>it does work, but gets stuck reading the first sector from the card.
> >>I believe this happens because the card is only being supplied 3.0V'
> >>rather then 3.3V.
> >>
> >>Note that the same code works fine in the no SPL u-boot when loaded
> >>through boot0 + boot1.
> >>
> >>Likely wrong power supply voltages are the culprit in both cases
> >>(the A31 also has a vdd-pll power pin.
> >>
> >>So it looks like the next step is to first get the pmic going in
> >>u-boot (which will be useful even if booted through boot0 + 1, to
> >>enable the nic-phy if nothing else).
> >
> >The A23 lichee u-boot has drivers for P2WI (used in sun6i) and RSB
> >(reduced serial bus, used on A23):
> Are they not the same? I haven't looked I admit, I just figured they
> changed the name a little to make it sound distinctive.

We don't have much details, but the bus itself looks different, since
it supports many devices, which is impossible with the p2wi.
 
> Are they similar at all? If so, I guess that the i2c vs p2wi
> discussion held a few days ago is moot then :)

Why so?

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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Re: [linux-sunxi] sun6i SPL support status update

2014-04-01 Thread Koen Kooi

Op 1 apr. 2014, om 21:55 heeft Olliver Schinagl  het 
volgende geschreven:

> On 03/31/2014 08:27 AM, Chen-Yu Tsai wrote:
>> Hi Hans,
>> 
>> On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede  wrote:
>>> Hi,
>>> 
>>> After wens pointed me to:
>>> http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31
>>> 
>>> I've tried to get a full SPL going on sun6i. No luck sofar,
>>> dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram
>>> going, at least get_ram_size() likes it. But I cannot get the
>>> mmc to work in the SPL. I've narrowed this down to 2  problems,
>>> which I believe are related:
>>> 
>>> 1) The mmc controller will simply not work with pll6 as source,
>>> after adding a test for the pll6 lock bit I believe this is caused
>>> by pll6 never locking.
>>> 
>>> 2) When switching the mmc controller clocksource to OSC24M, then
>>> it does work, but gets stuck reading the first sector from the card.
>>> I believe this happens because the card is only being supplied 3.0V'
>>> rather then 3.3V.
>>> 
>>> Note that the same code works fine in the no SPL u-boot when loaded
>>> through boot0 + boot1.
>>> 
>>> Likely wrong power supply voltages are the culprit in both cases
>>> (the A31 also has a vdd-pll power pin.
>>> 
>>> So it looks like the next step is to first get the pmic going in
>>> u-boot (which will be useful even if booted through boot0 + 1, to
>>> enable the nic-phy if nothing else).
>> 
>> The A23 lichee u-boot has drivers for P2WI (used in sun6i) and RSB
>> (reduced serial bus, used on A23):
> Are they not the same? I haven't looked I admit, I just figured they changed 
> the name a little to make it sound distinctive.
> 
> Are they similar at all? If so, I guess that the i2c vs p2wi discussion held 
> a few days ago is moot then :)

"2 wire interface" is a way of avoiding paying NXP royalties for I2C while 
still producing the same hardware :)

regards,

Koen


> 
> Olliver
>> 
>> https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/p2wi
>> https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/rsb
>> 
>> And also PMIC drivers:
>> 
>> https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/power
>> 
>> Judging from the code, my guess is AXP221 and AXP223 or differ in
>> the type of interface supported.
>> 
>> Hope this helps. :)
>> 
>>> And then see from there. Maybe I'll take a shot at this tonight,
>>> for now I'm going to spend some time with my family.
>> 
>> 
>> Cheers,
>> ChenYu
>> 
> 
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Re: [linux-sunxi] sun6i SPL support status update

2014-04-01 Thread Olliver Schinagl

On 03/31/2014 08:27 AM, Chen-Yu Tsai wrote:

Hi Hans,

On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede  wrote:

Hi,

After wens pointed me to:
http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31

I've tried to get a full SPL going on sun6i. No luck sofar,
dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram
going, at least get_ram_size() likes it. But I cannot get the
mmc to work in the SPL. I've narrowed this down to 2  problems,
which I believe are related:

1) The mmc controller will simply not work with pll6 as source,
after adding a test for the pll6 lock bit I believe this is caused
by pll6 never locking.

2) When switching the mmc controller clocksource to OSC24M, then
it does work, but gets stuck reading the first sector from the card.
I believe this happens because the card is only being supplied 3.0V'
rather then 3.3V.

Note that the same code works fine in the no SPL u-boot when loaded
through boot0 + boot1.

Likely wrong power supply voltages are the culprit in both cases
(the A31 also has a vdd-pll power pin.

So it looks like the next step is to first get the pmic going in
u-boot (which will be useful even if booted through boot0 + 1, to
enable the nic-phy if nothing else).


The A23 lichee u-boot has drivers for P2WI (used in sun6i) and RSB
(reduced serial bus, used on A23):
Are they not the same? I haven't looked I admit, I just figured they 
changed the name a little to make it sound distinctive.


Are they similar at all? If so, I guess that the i2c vs p2wi discussion 
held a few days ago is moot then :)


Olliver


https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/p2wi
https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/rsb

And also PMIC drivers:

https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/power

Judging from the code, my guess is AXP221 and AXP223 or differ in
the type of interface supported.

Hope this helps. :)


And then see from there. Maybe I'll take a shot at this tonight,
for now I'm going to spend some time with my family.



Cheers,
ChenYu



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Re: [linux-sunxi] sun6i SPL support status update

2014-03-30 Thread Chen-Yu Tsai
Hi Hans,

On Sun, Mar 30, 2014 at 8:04 PM, Hans de Goede  wrote:
> Hi,
>
> After wens pointed me to:
> http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31
>
> I've tried to get a full SPL going on sun6i. No luck sofar,
> dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram
> going, at least get_ram_size() likes it. But I cannot get the
> mmc to work in the SPL. I've narrowed this down to 2  problems,
> which I believe are related:
>
> 1) The mmc controller will simply not work with pll6 as source,
> after adding a test for the pll6 lock bit I believe this is caused
> by pll6 never locking.
>
> 2) When switching the mmc controller clocksource to OSC24M, then
> it does work, but gets stuck reading the first sector from the card.
> I believe this happens because the card is only being supplied 3.0V'
> rather then 3.3V.
>
> Note that the same code works fine in the no SPL u-boot when loaded
> through boot0 + boot1.
>
> Likely wrong power supply voltages are the culprit in both cases
> (the A31 also has a vdd-pll power pin.
>
> So it looks like the next step is to first get the pmic going in
> u-boot (which will be useful even if booted through boot0 + 1, to
> enable the nic-phy if nothing else).

The A23 lichee u-boot has drivers for P2WI (used in sun6i) and RSB
(reduced serial bus, used on A23):

https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/p2wi
https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/rsb

And also PMIC drivers:

https://github.com/wens/u-boot-sunxi/tree/lichee-dev-a23/drivers/power

Judging from the code, my guess is AXP221 and AXP223 or differ in
the type of interface supported.

Hope this helps. :)

> And then see from there. Maybe I'll take a shot at this tonight,
> for now I'm going to spend some time with my family.


Cheers,
ChenYu

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[linux-sunxi] sun6i SPL support status update

2014-03-30 Thread Hans de Goede
Hi,

After wens pointed me to:
http://git.rhombus-tech.net/?p=u-boot.git;a=blob;f=arch/arm/cpu/armv7/sunxi/dram_sun6i.c;h=9275ca21ac99592c7d520a41c0914b359c27b913;hb=refs/heads/lichee/jb-4.2.2-a31

I've tried to get a full SPL going on sun6i. No luck sofar,
dropping in dram_sun6i.[c,h] +pll5 config seems to get the dram
going, at least get_ram_size() likes it. But I cannot get the
mmc to work in the SPL. I've narrowed this down to 2  problems,
which I believe are related:

1) The mmc controller will simply not work with pll6 as source,
after adding a test for the pll6 lock bit I believe this is caused
by pll6 never locking.

2) When switching the mmc controller clocksource to OSC24M, then
it does work, but gets stuck reading the first sector from the card.
I believe this happens because the card is only being supplied 3.0V'
rather then 3.3V.

Note that the same code works fine in the no SPL u-boot when loaded
through boot0 + boot1.

Likely wrong power supply voltages are the culprit in both cases
(the A31 also has a vdd-pll power pin.

So it looks like the next step is to first get the pmic going in
u-boot (which will be useful even if booted through boot0 + 1, to
enable the nic-phy if nothing else).

And then see from there. Maybe I'll take a shot at this tonight,
for now I'm going to spend some time with my family.

Regards,


Hans

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