RE: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Anton Tikhomirov
Hi Kamil,

...

 +| 3. Supporting SoCs
 ++
 +
 +To support a new SoC a new file should be added to the drivers/phy
 +directory. Each SoC's configuration is stored in an instance of the
 +struct samsung_usb2_phy_config.
 +
 +struct samsung_usb2_phy_config {
 + const struct samsung_usb2_common_phy *phys;
 + unsigned int num_phys;
 + bool has_mode_switch;

You missed rate_to_clk here.

 +};
 +

...

 diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-samsung-
 usb2.c
 new file mode 100644
 index 000..c3b7719
 --- /dev/null
 +++ b/drivers/phy/phy-samsung-usb2.c
 @@ -0,0 +1,222 @@
 +/*
 + * Samsung SoC USB 1.1/2.0 PHY driver
 + *
 + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
 + * Author: Kamil Debski k.deb...@samsung.com
 + *
 + * This program is free software; you can redistribute it and/or
 modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +#include linux/clk.h
 +#include linux/mfd/syscon.h
 +#include linux/module.h
 +#include linux/of.h
 +#include linux/of_address.h
 +#include linux/phy/phy.h
 +#include linux/platform_device.h
 +#include linux/spinlock.h
 +#include phy-samsung-usb2.h
 +
 +static int samsung_usb2_phy_power_on(struct phy *phy)
 +{
 + struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
 + struct samsung_usb2_phy_driver *drv = inst-drv;
 + int ret;
 +
 + dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
 + inst-cfg-label);
 + ret = clk_prepare_enable(drv-clk);

clk_prepare_enable() can sleep, and therefore doesn't allow
samusng_usb2_phy_power_on() to be used in atomic context
(e.g. inside spin_lock-ed area), what sometimes may be desirable.
What about to prepare clock in probe, and just enable it here
(note: clk_enable() doesn't sleep).

 + if (ret)
 + goto err_main_clk;
 + ret = clk_prepare_enable(drv-ref_clk);
 + if (ret)
 + goto err_instance_clk;
 + if (inst-cfg-power_on) {
 + spin_lock(drv-lock);
 + ret = inst-cfg-power_on(inst);
 + spin_unlock(drv-lock);
 + }
 +
 + return 0;

Thank you

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Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kishon Vijay Abraham I



On Thursday 06 March 2014 01:56 PM, Anton Tikhomirov wrote:

Hi Kamil,

...


+| 3. Supporting SoCs
++
+
+To support a new SoC a new file should be added to the drivers/phy
+directory. Each SoC's configuration is stored in an instance of the
+struct samsung_usb2_phy_config.
+
+struct samsung_usb2_phy_config {
+   const struct samsung_usb2_common_phy *phys;
+   unsigned int num_phys;
+   bool has_mode_switch;


You missed rate_to_clk here.


+};
+


...


diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-samsung-
usb2.c
new file mode 100644
index 000..c3b7719
--- /dev/null
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -0,0 +1,222 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski k.deb...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/phy/phy.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+#include phy-samsung-usb2.h
+
+static int samsung_usb2_phy_power_on(struct phy *phy)
+{
+   struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
+   struct samsung_usb2_phy_driver *drv = inst-drv;
+   int ret;
+
+   dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
+   inst-cfg-label);
+   ret = clk_prepare_enable(drv-clk);


clk_prepare_enable() can sleep, and therefore doesn't allow
samusng_usb2_phy_power_on() to be used in atomic context
(e.g. inside spin_lock-ed area), what sometimes may be desirable.
What about to prepare clock in probe, and just enable it here
(note: clk_enable() doesn't sleep).


The PHY power-on callback is anyway called with mutex held, so I guess 
it's fine to have clk_prepare_enable() here.


Thanks
Kishon
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Re: OTG102/EzCapture2 no audio

2014-03-06 Thread Clemens Ladisch
David Woodfall wrote:
 mplayer reports no sound:

 mplayer tv:// -tv 
 driver=v4l2:device=/dev/video1:normid=8:alsa:adevice=hw.1:forceaudio:volume=80
 ...
 Selected driver: v4l2
 Opening video decoder: [raw] RAW Uncompressed Video
 Audio: no sound

Does mplayer something.wav work?

 Neither aplay -l nor -L list the device

Because the device is not used for playback.
Try arecord -l.


Regards,
Clemens
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RE: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Anton Tikhomirov
Hello,

 Subject: Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver
 
 
 
 On Thursday 06 March 2014 01:56 PM, Anton Tikhomirov wrote:
  Hi Kamil,
 
  ...
 
  +| 3. Supporting SoCs
  ++
  +
  +To support a new SoC a new file should be added to the drivers/phy
  +directory. Each SoC's configuration is stored in an instance of the
  +struct samsung_usb2_phy_config.
  +
  +struct samsung_usb2_phy_config {
  +  const struct samsung_usb2_common_phy *phys;
  +  unsigned int num_phys;
  +  bool has_mode_switch;
 
  You missed rate_to_clk here.
 
  +};
  +
 
  ...
 
  diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-
 samsung-
  usb2.c
  new file mode 100644
  index 000..c3b7719
  --- /dev/null
  +++ b/drivers/phy/phy-samsung-usb2.c
  @@ -0,0 +1,222 @@
  +/*
  + * Samsung SoC USB 1.1/2.0 PHY driver
  + *
  + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  + * Author: Kamil Debski k.deb...@samsung.com
  + *
  + * This program is free software; you can redistribute it and/or
  modify
  + * it under the terms of the GNU General Public License version 2
 as
  + * published by the Free Software Foundation.
  + */
  +
  +#include linux/clk.h
  +#include linux/mfd/syscon.h
  +#include linux/module.h
  +#include linux/of.h
  +#include linux/of_address.h
  +#include linux/phy/phy.h
  +#include linux/platform_device.h
  +#include linux/spinlock.h
  +#include phy-samsung-usb2.h
  +
  +static int samsung_usb2_phy_power_on(struct phy *phy)
  +{
  +  struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
  +  struct samsung_usb2_phy_driver *drv = inst-drv;
  +  int ret;
  +
  +  dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
  +  inst-cfg-label);
  +  ret = clk_prepare_enable(drv-clk);
 
  clk_prepare_enable() can sleep, and therefore doesn't allow
  samusng_usb2_phy_power_on() to be used in atomic context
  (e.g. inside spin_lock-ed area), what sometimes may be desirable.
  What about to prepare clock in probe, and just enable it here
  (note: clk_enable() doesn't sleep).
 
 The PHY power-on callback is anyway called with mutex held, so I guess
 it's fine to have clk_prepare_enable() here.

If we rely totally on generic PHY functions such as phy_power_on()
and friends, why do we need to use locking in callbacks at all.

 
 Thanks
 Kishon

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Re: BUG: USB Reset-Resume Mechanism does not work for runtime resume

2014-03-06 Thread Oliver Neukum
On Wed, 2014-03-05 at 11:15 -0500, Alan Stern wrote:
 On Wed, 5 Mar 2014, Oliver Neukum wrote:
 
  On Wed, 2014-03-05 at 09:40 +, Poulain, Loic wrote:
   Hi,
   
   I think there is an issue with the reset-resume mechanism during USB
   runtime resume, leaving the interfaces suspended forever.
   
   - Context:
   
   Android platform, running a 3.13 + Google AOSP patches kernel.
   I'm facing a USB issue with the bsusb driver. btusb driver has the USB
   runtime suspend enabled + remote wakeup.
   However sometimes the USB runtime resume does not work as expected (we
   admit here that this can happen).
   
   [ 3066.408413] usb 2-3: usb auto-resume
   [ 3066.408433] hub 2-0:1.0: state 7 ports 9 chg  evt 0008
   [ 3066.445465] usb 2-3: finish resume
   [ 3071.447591] usb 2-3: bt_hc_worker timed out on ep0in len=0/2
   [ 3071.447598] usb 2-3: retry with reset-resume
   
   Then the usbcore tries a reset-resume, but btusb driver does not
   implement this callback.
 
 The best solution would be to fix the hardware so that a normal resume 
 does work.

Indeed.

  This is extremely tricky, almost academical a question.
  We cannot fall back to reset_resume() in this case without
  very bad consequences.
  If remote wakeup is needed, reset_resume() must not be used.
 
 The only alternative is to logically disconnect the device.  But this 
 conflicts with the persist_enabled flag.

In error handling? It seems to me that persist_enabled is a declaration
of a goal. What the consequences of reaching that
goal should be is a legitimate question.

  It seems to me that the bug in this case is the fallback itself.
  From a design viewpoint is probably wrong the unbind a device
  in the runtime case. We'd better notify the driver in every case.
  If you unbind and rebind you just risk getting into a tight loop.
 
 In this case, turning off the persist flag might help:
 
   echo 0 /sys/bus/usb/devices/.../power/persist

But in case remote wakeup is not requested the device
should persist.

Regards
Oliver



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Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kishon Vijay Abraham I

Hi,

On Thursday 06 March 2014 02:22 PM, Anton Tikhomirov wrote:

Hello,


Subject: Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver



On Thursday 06 March 2014 01:56 PM, Anton Tikhomirov wrote:

Hi Kamil,

...


+| 3. Supporting SoCs
++
+
+To support a new SoC a new file should be added to the drivers/phy
+directory. Each SoC's configuration is stored in an instance of the
+struct samsung_usb2_phy_config.
+
+struct samsung_usb2_phy_config {
+   const struct samsung_usb2_common_phy *phys;
+   unsigned int num_phys;
+   bool has_mode_switch;


You missed rate_to_clk here.


+};
+


...


diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-

samsung-

usb2.c
new file mode 100644
index 000..c3b7719
--- /dev/null
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -0,0 +1,222 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski k.deb...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2

as

+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/phy/phy.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+#include phy-samsung-usb2.h
+
+static int samsung_usb2_phy_power_on(struct phy *phy)
+{
+   struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
+   struct samsung_usb2_phy_driver *drv = inst-drv;
+   int ret;
+
+   dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
+   inst-cfg-label);
+   ret = clk_prepare_enable(drv-clk);


clk_prepare_enable() can sleep, and therefore doesn't allow
samusng_usb2_phy_power_on() to be used in atomic context
(e.g. inside spin_lock-ed area), what sometimes may be desirable.
What about to prepare clock in probe, and just enable it here
(note: clk_enable() doesn't sleep).


The PHY power-on callback is anyway called with mutex held, so I guess
it's fine to have clk_prepare_enable() here.


If we rely totally on generic PHY functions such as phy_power_on()
and friends, why do we need to use locking in callbacks at all.


Didn't get you.. We don't want to invoke power_on when init is getting 
executed or you don't want power on or power off to get executed 
simultaneously right? So we need to protect it.


Cheers
Kishon
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Re: [PATCH v3 07/13] usb: chipidea: add OTG fsm operation functions implemenation.

2014-03-06 Thread Peter Chen
On Thu, Mar 06, 2014 at 02:52:17PM +0800, Li Jun wrote:
 On Wed, Mar 05, 2014 at 04:28:14PM +0800, Peter Chen wrote:
  On Thu, Feb 27, 2014 at 07:38:25AM +0800, Li Jun wrote:
   Add OTG HNP and SRP operation functions implementation:
   - charge vbus
   - drive vbus
   - connection signaling
   - drive sof
   - start data pulse
   - add fsm timer
   - delete fsm timer
   - start host
   - start gadget
   
   Signed-off-by: Li Jun b47...@freescale.com
   ---
drivers/usb/chipidea/bits.h|   11 ++
drivers/usb/chipidea/ci.h  |1 +
drivers/usb/chipidea/otg_fsm.c |  231 
   
drivers/usb/chipidea/otg_fsm.h |   23 
4 files changed, 266 insertions(+)
   
   diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
   index 83d06c1..c42eb35 100644
   --- a/drivers/usb/chipidea/bits.h
   +++ b/drivers/usb/chipidea/bits.h
   @@ -44,9 +44,14 @@
#define DEVICEADDR_USBADR (0x7FUL  25)

/* PORTSC */
   +#define PORTSC_CCSBIT(0)
   +#define PORTSC_CSCBIT(1)
   +#define PORTSC_PECBIT(3)
   +#define PORTSC_OCCBIT(5)
#define PORTSC_FPRBIT(6)
#define PORTSC_SUSP   BIT(7)
#define PORTSC_HSPBIT(9)
   +#define PORTSC_PP BIT(12)
#define PORTSC_PTC(0x0FUL  16)
#define PORTSC_PHCD(d) ((d) ? BIT(22) : BIT(23))
/* PTS and PTW for non lpm version only */
   @@ -56,6 +61,9 @@
#define PORTSC_PTWBIT(28)
#define PORTSC_STSBIT(29)

   +#define PORTSC_W1C_BITS  \
   + (PORTSC_CSC | PORTSC_PEC | PORTSC_OCC)
   +
/* DEVLC */
#define DEVLC_PFSCBIT(23)
#define DEVLC_PSPD(0x03UL  25)
   @@ -71,7 +79,10 @@
#define PTS_HSIC  4

/* OTGSC */
   +#define OTGSC_VD   BIT(0)
   +#define OTGSC_VC   BIT(1)
#define OTGSC_IDPU BIT(5)
   +#define OTGSC_HADP BIT(6)
#define OTGSC_ID   BIT(8)
#define OTGSC_AVV  BIT(9)
#define OTGSC_ASV  BIT(10)
   diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
   index db6bf30..171b1d2 100644
   --- a/drivers/usb/chipidea/ci.h
   +++ b/drivers/usb/chipidea/ci.h
   @@ -175,6 +175,7 @@ struct ci_hdrc {
 enum ci_rolerole;
 boolis_otg;
 struct otg_fsm  *fsm;
   + struct ci_otg_fsm_timer_list*fsm_timer;
 struct work_struct  work;
 struct workqueue_struct *wq;

   diff --git a/drivers/usb/chipidea/otg_fsm.c 
   b/drivers/usb/chipidea/otg_fsm.c
   index 904381e..aa24466 100644
   --- a/drivers/usb/chipidea/otg_fsm.c
   +++ b/drivers/usb/chipidea/otg_fsm.c
   @@ -18,12 +18,242 @@
#include linux/usb/otg.h
#include linux/usb/gadget.h
#include linux/usb/chipidea.h
   +#include linux/regulator/consumer.h

#include ci.h
#include bits.h
#include otg.h
#include otg_fsm.h

   +/* Add timer to active timer list */
   +static void ci_otg_add_timer(struct ci_hdrc *ci, enum 
   ci_otg_fsm_timer_index t)
   +{
   + struct ci_otg_fsm_timer *tmp_timer;
   + struct ci_otg_fsm_timer *timer = ci-fsm_timer-timer_list[t];
   + struct list_head *active_timers = ci-fsm_timer-active_timers;
   +
   + if (t = NUM_CI_OTG_FSM_TIMERS)
   + return;
   +
   + /*
   +  * Check if the timer is already in the active list,
   +  * if so update timer count
   +  */
   + list_for_each_entry(tmp_timer, active_timers, list)
   + if (tmp_timer == timer) {
   + timer-count = timer-expires;
   + return;
   + }
   +
   + timer-count = timer-expires;
   + list_add_tail(timer-list, active_timers);
   +
   + /* Enable 1ms irq */
   + if (!(hw_read(ci, OP_OTGSC, OTGSC_1MSIE)))
   + ci_enable_otg_interrupt(ci, OTGSC_1MSIE);
   +}
   +
   +/* Remove timer from active timer list */
   +static void ci_otg_del_timer(struct ci_hdrc *ci, enum 
   ci_otg_fsm_timer_index t)
   +{
   + struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
   + struct ci_otg_fsm_timer *timer = ci-fsm_timer-timer_list[t];
   + struct list_head *active_timers = ci-fsm_timer-active_timers;
   + int flag = 0;
   +
   + if (t = NUM_CI_OTG_FSM_TIMERS)
   + return;
   +
   + list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
   + if (tmp_timer == timer) {
   + list_del(timer-list);
   + flag = 1;
   + }
   +
   + /* Disable 1ms irq if there is no any active timer */
   + if ((flag == 1)  list_empty(active_timers))
   + ci_disable_otg_interrupt(ci, OTGSC_1MSIE);
   +}
  
  Why variable flag is needed?
  
 
 with this flag check, driver need not do irq disable again when the timer
 was already deleted.
 

It only needs to disable 1ms timer interrupt when there is no active 

RE: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Anton Tikhomirov
Hi,

 Subject: RE: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver
 
 Hi,
 
  Subject: Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver
 
  Hi,
 
  On Thursday 06 March 2014 02:22 PM, Anton Tikhomirov wrote:
   Hello,
  
   Subject: Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver
  
  
  
   On Thursday 06 March 2014 01:56 PM, Anton Tikhomirov wrote:
   Hi Kamil,
  
   ...
  
   +| 3. Supporting SoCs
   ++
   +
   +To support a new SoC a new file should be added to the
  drivers/phy
   +directory. Each SoC's configuration is stored in an instance of
  the
   +struct samsung_usb2_phy_config.
   +
   +struct samsung_usb2_phy_config {
   +  const struct samsung_usb2_common_phy *phys;
   +  unsigned int num_phys;
   +  bool has_mode_switch;
  
   You missed rate_to_clk here.
  
   +};
   +
  
   ...
  
   diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-
   samsung-
   usb2.c
   new file mode 100644
   index 000..c3b7719
   --- /dev/null
   +++ b/drivers/phy/phy-samsung-usb2.c
   @@ -0,0 +1,222 @@
   +/*
   + * Samsung SoC USB 1.1/2.0 PHY driver
   + *
   + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   + * Author: Kamil Debski k.deb...@samsung.com
   + *
   + * This program is free software; you can redistribute it
 and/or
   modify
   + * it under the terms of the GNU General Public License version
 2
   as
   + * published by the Free Software Foundation.
   + */
   +
   +#include linux/clk.h
   +#include linux/mfd/syscon.h
   +#include linux/module.h
   +#include linux/of.h
   +#include linux/of_address.h
   +#include linux/phy/phy.h
   +#include linux/platform_device.h
   +#include linux/spinlock.h
   +#include phy-samsung-usb2.h
   +
   +static int samsung_usb2_phy_power_on(struct phy *phy)
   +{
   +  struct samsung_usb2_phy_instance *inst =
  phy_get_drvdata(phy);
   +  struct samsung_usb2_phy_driver *drv = inst-drv;
   +  int ret;
   +
   +  dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
   +  inst-cfg-label);
   +  ret = clk_prepare_enable(drv-clk);
  
   clk_prepare_enable() can sleep, and therefore doesn't allow
   samusng_usb2_phy_power_on() to be used in atomic context
   (e.g. inside spin_lock-ed area), what sometimes may be desirable.
   What about to prepare clock in probe, and just enable it here
   (note: clk_enable() doesn't sleep).
  
   The PHY power-on callback is anyway called with mutex held, so I
  guess
   it's fine to have clk_prepare_enable() here.
  
   If we rely totally on generic PHY functions such as phy_power_on()
   and friends, why do we need to use locking in callbacks at all.
 
  Didn't get you.. We don't want to invoke power_on when init is
 getting
  executed or you don't want power on or power off to get executed
  simultaneously right? So we need to protect it.
 
 I mean callbacks such as samsung_usb2_phy_power_on() which uses
 spin_lock.
 It's already protected by mutex in phy_power_on().

Well... phy_power_on() uses mutex to protect power_on() callback.
power_on() is samsung_usb2_phy_power_on() in our case.
samsung_usb2_phy_power_on() uses spinlock.
My question is why do we need to use spinlock _inside_ callback
if it is already protected by mutex.



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Re: OTG102/EzCapture2 no audio

2014-03-06 Thread David Woodfall

mplayer reports no sound:

mplayer tv:// -tv 
driver=v4l2:device=/dev/video1:normid=8:alsa:adevice=hw.1:forceaudio:volume=80
...
Selected driver: v4l2
Opening video decoder: [raw] RAW Uncompressed Video
Audio: no sound


Does mplayer something.wav work?


Yes, mplayer works for wavs and other files..


Neither aplay -l nor -L list the device


Because the device is not used for playback.
Try arecord -l.



% arecord -l
 List of CAPTURE Hardware Devices 
card 0: PCH [HDA Intel PCH], device 0: CX20590 Analog [CX20590 Analog]
 Subdevices: 1/1
 Subdevice #0: subdevice #0
card 1: Cx231xxAudio [Cx231xx Audio], device 0: Cx231xx Audio [Conexant cx231xx 
Capture]
 Subdevices: 1/1
 Subdevice #0: subdevice #0


So it is listed at least. But arecord produces a silent .wav when I use it:

arecord -f dat -D hw:CARD=Cx231xxAudio,DEV=0 test.wav


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Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kishon Vijay Abraham I

Hi,

On Thursday 06 March 2014 02:49 PM, Anton Tikhomirov wrote:

Hi,


Subject: RE: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

Hi,


Subject: Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

Hi,

On Thursday 06 March 2014 02:22 PM, Anton Tikhomirov wrote:

Hello,


Subject: Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver



On Thursday 06 March 2014 01:56 PM, Anton Tikhomirov wrote:

Hi Kamil,

...


+| 3. Supporting SoCs
++
+
+To support a new SoC a new file should be added to the

drivers/phy

+directory. Each SoC's configuration is stored in an instance of

the

+struct samsung_usb2_phy_config.
+
+struct samsung_usb2_phy_config {
+   const struct samsung_usb2_common_phy *phys;
+   unsigned int num_phys;
+   bool has_mode_switch;


You missed rate_to_clk here.


+};
+


...


diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-

samsung-

usb2.c
new file mode 100644
index 000..c3b7719
--- /dev/null
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -0,0 +1,222 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski k.deb...@samsung.com
+ *
+ * This program is free software; you can redistribute it

and/or

modify
+ * it under the terms of the GNU General Public License version

2

as

+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/phy/phy.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+#include phy-samsung-usb2.h
+
+static int samsung_usb2_phy_power_on(struct phy *phy)
+{
+   struct samsung_usb2_phy_instance *inst =

phy_get_drvdata(phy);

+   struct samsung_usb2_phy_driver *drv = inst-drv;
+   int ret;
+
+   dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
+   inst-cfg-label);
+   ret = clk_prepare_enable(drv-clk);


clk_prepare_enable() can sleep, and therefore doesn't allow
samusng_usb2_phy_power_on() to be used in atomic context
(e.g. inside spin_lock-ed area), what sometimes may be desirable.
What about to prepare clock in probe, and just enable it here
(note: clk_enable() doesn't sleep).


The PHY power-on callback is anyway called with mutex held, so I

guess

it's fine to have clk_prepare_enable() here.


If we rely totally on generic PHY functions such as phy_power_on()
and friends, why do we need to use locking in callbacks at all.


Didn't get you.. We don't want to invoke power_on when init is

getting

executed or you don't want power on or power off to get executed
simultaneously right? So we need to protect it.


I mean callbacks such as samsung_usb2_phy_power_on() which uses
spin_lock.
It's already protected by mutex in phy_power_on().


Well... phy_power_on() uses mutex to protect power_on() callback.
power_on() is samsung_usb2_phy_power_on() in our case.
samsung_usb2_phy_power_on() uses spinlock.
My question is why do we need to use spinlock _inside_ callback
if it is already protected by mutex.


It is needed when the same PHY provider implements multiple PHYs. 
phy-core can protect phy-ops of same PHY. However if the PHY provider 
implements multiple PHYs, phy-core won't be able to protect.


Cheers
Kishon
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Re: USB remote wakeup through gpio interrupt

2014-03-06 Thread Jagdish Gedia
Hi Peter,

My usb device is not capable of giving interrupt when it finishes
using usb. So i dont have any idea where can i call pm_runtime_put for
my usb device?

the other thing is that, earlier you have told, waking up usb device
through interrupt is same as writing on to ../power/control , but i
think writing on to ../power/control will disable the autosuspend
for usb device in future, but i want autosuspend to be enabled for my
usb device always. Will using pm_runtime_get and pm_runtime_put cause
the disable of autosuspend for usb device?



Thanks,
Jagdish Gediya

On Thu, Mar 6, 2014 at 2:53 PM, Jagdish Gedia jvged...@gmail.com wrote:
 Hi Alan,

 As you have told, i have executed pm_request_resume() function from my
 interrupt handler, and it is waking up my USB device. I have
 implemented all this functionality in class driver(cdc-acm.c).
 but what is happening is after 2-3 times, ausosuspend is getting
 disable for my device. I want autosuspend to be enabled for usb device
 forever. Do pm_request_resume function causes this behavior?



 Thanks,
 Jagdish Gediya
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Re: [PATCH v5 3/6] drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework

2014-03-06 Thread Kishon Vijay Abraham I



On Monday 03 March 2014 05:08 PM, Kishon Vijay Abraham I wrote:

Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3
driver in drivers/usb/phy to drivers/phy and also renamed the file to
phy-ti-pipe3 since this same driver will be used for SATA PHY and
PCIE PHY.


merged 3rd, 4th and 5th patch of this series to linux-phy next.

Thanks
Kishon



Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
  drivers/phy/Kconfig|   11 +
  drivers/phy/Makefile   |1 +
  .../phy/phy-omap-usb3.c = phy/phy-ti-pipe3.c} |  240 
  drivers/usb/phy/Kconfig|   11 -
  drivers/usb/phy/Makefile   |1 -
  5 files changed, 158 insertions(+), 106 deletions(-)
  rename drivers/{usb/phy/phy-omap-usb3.c = phy/phy-ti-pipe3.c} (54%)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index c7a551c..e3ec7d1 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -40,6 +40,17 @@ config OMAP_USB2
  The USB OTG controller communicates with the comparator using this
  driver.

+config TI_PIPE3
+   tristate TI PIPE3 PHY Driver
+   depends on ARCH_OMAP2PLUS || COMPILE_TEST
+   select GENERIC_PHY
+   select OMAP_CONTROL_USB
+   help
+ Enable this to support the PIPE3 PHY that is part of TI SOCs. This
+ driver takes care of all the PHY functionality apart from comparator.
+ This driver interacts with the OMAP Control PHY Driver to power
+ on/off the PHY.
+
  config TWL4030_USB
tristate TWL4030 USB Transceiver Driver
depends on TWL4030_CORE  REGULATOR_TWL4030  USB_MUSB_OMAP2PLUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index b57c253..32e3f94 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -8,4 +8,5 @@ obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)   += phy-exynos-dp-video.o
  obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)   += phy-exynos-mipi-video.o
  obj-$(CONFIG_PHY_MVEBU_SATA)  += phy-mvebu-sata.o
  obj-$(CONFIG_OMAP_USB2)   += phy-omap-usb2.o
+obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
  obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
diff --git a/drivers/usb/phy/phy-omap-usb3.c b/drivers/phy/phy-ti-pipe3.c
similarity index 54%
rename from drivers/usb/phy/phy-omap-usb3.c
rename to drivers/phy/phy-ti-pipe3.c
index 0c6ba29..67b189d 100644
--- a/drivers/usb/phy/phy-omap-usb3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -1,5 +1,5 @@
  /*
- * omap-usb3 - USB PHY, talking to dwc3 controller in OMAP.
+ * phy-ti-pipe3 - PIPE3 PHY driver.
   *
   * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
   * This program is free software; you can redistribute it and/or modify
@@ -19,10 +19,11 @@
  #include linux/module.h
  #include linux/platform_device.h
  #include linux/slab.h
-#include linux/usb/omap_usb.h
+#include linux/phy/phy.h
  #include linux/of.h
  #include linux/clk.h
  #include linux/err.h
+#include linux/io.h
  #include linux/pm_runtime.h
  #include linux/delay.h
  #include linux/usb/omap_control_usb.h
@@ -52,17 +53,34 @@

  /*
   * This is an Empirical value that works, need to confirm the actual
- * value required for the USB3PHY_PLL_CONFIGURATION2.PLL_IDLE status
- * to be correctly reflected in the USB3PHY_PLL_STATUS register.
+ * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
+ * to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
   */
  # define PLL_IDLE_TIME  100;

-struct usb_dpll_map {
+struct pipe3_dpll_params {
+   u16 m;
+   u8  n;
+   u8  freq:3;
+   u8  sd;
+   u32 mf;
+};
+
+struct ti_pipe3 {
+   void __iomem*pll_ctrl_base;
+   struct device   *dev;
+   struct device   *control_dev;
+   struct clk  *wkupclk;
+   struct clk  *sys_clk;
+   struct clk  *optclk;
+};
+
+struct pipe3_dpll_map {
unsigned long rate;
-   struct usb_dpll_params params;
+   struct pipe3_dpll_params params;
  };

-static struct usb_dpll_map dpll_map[] = {
+static struct pipe3_dpll_map dpll_map[] = {
{1200, {1250, 5, 4, 20, 0} },   /* 12 MHz */
{1680, {3125, 20, 4, 20, 0} },  /* 16.8 MHz */
{1920, {1172, 8, 4, 20, 65537} },   /* 19.2 MHz */
@@ -71,7 +89,18 @@ static struct usb_dpll_map dpll_map[] = {
{3840, {3125, 47, 4, 20, 92843} },  /* 38.4 MHz */
  };

-static struct usb_dpll_params *omap_usb3_get_dpll_params(unsigned long rate)
+static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
+{
+   return __raw_readl(addr + offset);
+}
+
+static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,
+   u32 data)
+{
+   __raw_writel(data, addr + offset);
+}
+
+static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
  {
int i;

@@ 

RE: USB remote wakeup through gpio interrupt

2014-03-06 Thread Peter Chen

 
 
 Hi Peter,
 
 My usb device is not capable of giving interrupt when it finishes using
 usb. So i dont have any idea where can i call pm_runtime_put for my usb
 device?
 
 the other thing is that, earlier you have told, waking up usb device
 through interrupt is same as writing on to ../power/control , but i
 think writing on to ../power/control will disable the autosuspend for
 usb device in future, but i want autosuspend to be enabled for my usb
 device always. Will using pm_runtime_get and pm_runtime_put cause the
 disable of autosuspend for usb device?
 

It is not related to autosuspend. Make sure you use above two APIs in pair.
Of cos, writing on to ../power/control will disable autosuspend.

Peter

 
 Thanks,
 Jagdish Gediya
 
 On Thu, Mar 6, 2014 at 2:53 PM, Jagdish Gedia jvged...@gmail.com wrote:
  Hi Alan,
 
  As you have told, i have executed pm_request_resume() function from my
  interrupt handler, and it is waking up my USB device. I have
  implemented all this functionality in class driver(cdc-acm.c).
  but what is happening is after 2-3 times, ausosuspend is getting
  disable for my device. I want autosuspend to be enabled for usb device
  forever. Do pm_request_resume function causes this behavior?
 
 
 
  Thanks,
  Jagdish Gediya
 

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Re: OTG102/EzCapture2 no audio

2014-03-06 Thread David Woodfall

On (06/03/14 09:18), Dave Woodfall d...@dawoodfall.net put forth the 
proposition:

mplayer reports no sound:

mplayer tv:// -tv 
driver=v4l2:device=/dev/video1:normid=8:alsa:adevice=hw.1:forceaudio:volume=80
...
Selected driver: v4l2
Opening video decoder: [raw] RAW Uncompressed Video
Audio: no sound


Does mplayer something.wav work?


Yes, mplayer works for wavs and other files..


Neither aplay -l nor -L list the device


Because the device is not used for playback.
Try arecord -l.



% arecord -l
 List of CAPTURE Hardware Devices 
card 0: PCH [HDA Intel PCH], device 0: CX20590 Analog [CX20590 Analog]
Subdevices: 1/1
Subdevice #0: subdevice #0
card 1: Cx231xxAudio [Cx231xx Audio], device 0: Cx231xx Audio [Conexant cx231xx 
Capture]
Subdevices: 1/1
Subdevice #0: subdevice #0


So it is listed at least. But arecord produces a silent .wav when I use it:

arecord -f dat -D hw:CARD=Cx231xxAudio,DEV=0 test.wav


Success. I used the second command mentioned on the linuxtv wiki:

mplayer tv:// -tv
driver=v4l2:device=/dev/video1:normid=8:alsa:adevice=hw.1:forceaudio:volume=80:immediatemode=0:width=720

Still no sound through arecord though.

-Dave

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Re: [PATCH] xhci: 'noxhci_port_switch' kernel parameter

2014-03-06 Thread Holger Hans Peter Freyther
On Mon, Feb 24, 2014 at 11:37:35AM -0800, Dan Williams wrote:
 Add a command line switch for disabling ehci port switchover.  Useful
 for working around / debugging xhci incompatibilities where ehci
 operation is available.

Lovely and thank you for creating the patch. I will try to find time
to test-boot with your patch.

holger
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[PATCH v2 2/3] phy: omap-usb2: Provide workaround for USB2PHY false disconnect

2014-03-06 Thread George Cherian
From: Austin Beam austinb...@ti.com

Enable the dra7x errata workaround for false disconnect problem
with USB2PHY. False disconnects were detected with some of the devices.
Reduce the sensitivity of the disconnect logic within the USB2PHY subsystem
to enusre these false disconnects are not registered.

[george.cher...@ti.com]
While at that, pass proper flags for each SoC's. This is a common driver
used across OMAP4,OMAP5,DRA7xx and AM437x USB2PHY.

False disconnect workaround is currently applicable for only DRA7x.

Update the Documentation also to add new comaptible.

Signed-off-by: Austin Beam austinb...@ti.com
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
v1 - v2 
 changed devm_request_and ioremap to devm_ioremap_resource

 drivers/phy/phy-omap-usb2.c  | 44 
 include/linux/usb/omap_usb.h |  3 +++
 2 files changed, 47 insertions(+)

diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index d54f24b..0ae4129 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -31,6 +31,9 @@
 #include linux/phy/phy.h
 #include linux/of_platform.h
 
+#define USB2PHY_DISCON_BYP_LATCH (1  31)
+#define USB2PHY_ANA_CONFIG1 0x4c
+
 /**
  * omap_usb2_set_comparator - links the comparator present in the sytem with
  * this phy
@@ -138,7 +141,30 @@ static int omap_usb_power_on(struct phy *x)
return 0;
 }
 
+static int omap_usb_init(struct phy *x)
+{
+   struct omap_usb *phy = phy_get_drvdata(x);
+   u32 val;
+
+   if (phy-flags  OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
+   /*
+*
+* Reduce the sensitivity of internal PHY by enabling the
+* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
+* resolves issues with certain devices which can otherwise
+* be prone to false disconnects.
+*
+*/
+   val = omap_usb_readl(phy-phy_base, USB2PHY_ANA_CONFIG1);
+   val |= USB2PHY_DISCON_BYP_LATCH;
+   omap_usb_writel(phy-phy_base, USB2PHY_ANA_CONFIG1, val);
+   }
+
+   return 0;
+}
+
 static struct phy_ops ops = {
+   .init   = omap_usb_init,
.power_on   = omap_usb_power_on,
.power_off  = omap_usb_power_off,
.owner  = THIS_MODULE,
@@ -150,6 +176,11 @@ static const struct usb_phy_data omap_usb2_data = {
.flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
 };
 
+static const struct usb_phy_data dra7x_usb2_data = {
+   .label = dra7x_usb2,
+   .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+};
+
 static const struct usb_phy_data am437x_usb2_data = {
.label = am437x_usb2,
.flags =  0,
@@ -161,6 +192,10 @@ static const struct of_device_id omap_usb2_id_table[] = {
.data = omap_usb2_data,
},
{
+   .compatible = ti,dra7x-usb2,
+   .data = dra7x_usb2_data,
+   },
+   {
.compatible = ti,am437x-usb2,
.data = am437x_usb2_data,
},
@@ -173,6 +208,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
 {
struct omap_usb *phy;
struct phy *generic_phy;
+   struct resource *res;
struct phy_provider *phy_provider;
struct usb_otg *otg;
struct device_node *node = pdev-dev.of_node;
@@ -208,6 +244,14 @@ static int omap_usb2_probe(struct platform_device *pdev)
phy-phy.otg= otg;
phy-phy.type   = USB_PHY_TYPE_USB2;
 
+   if (phy_data-flags  OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   phy-phy_base = devm_ioremap_resource(pdev-dev, res);
+   if (!phy-phy_base)
+   return -ENOMEM;
+   phy-flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;
+   }
+
control_node = of_parse_phandle(node, ctrl-module, 0);
if (!control_node) {
dev_err(pdev-dev, Failed to get control device phandle\n);
diff --git a/include/linux/usb/omap_usb.h b/include/linux/usb/omap_usb.h
index 034161d..248a603 100644
--- a/include/linux/usb/omap_usb.h
+++ b/include/linux/usb/omap_usb.h
@@ -34,11 +34,13 @@ struct omap_usb {
struct usb_phy  phy;
struct phy_companion*comparator;
void __iomem*pll_ctrl_base;
+   void __iomem*phy_base;
struct device   *dev;
struct device   *control_dev;
struct clk  *wkupclk;
struct clk  *sys_clk;
struct clk  *optclk;
+   u8  flags;
u8  is_suspended:1;
 };
 
@@ -50,6 +52,7 @@ struct usb_phy_data {
 /* Driver Flags */
 #define OMAP_USB2_HAS_START_SRP (1  0)
 #define OMAP_USB2_HAS_SET_VBUS (1  1)

RE: BUG: USB Reset-Resume Mechanism does not work for runtime resume

2014-03-06 Thread Poulain, Loic
I agree, but because it's possible to have many different hardware for the same 
class driver, you can't predict if all of them will be not broken. So in this 
case, each USB class driver should have the reset-resume callback.
A broken device can be a device which doesn't resume correctly 1 time per 
thousand (due to timing reason or anything else). Today, this single resume 
failure is enough to stuck the device (suspended forever).
because mobile systems are more and more PM agressive, I think we could see 
this problem occurring more often.

Unbind/rebind is here as a fallback mechanism for drivers that don't know how 
to restore device after resume failure, and it works pretty well for system PM. 
For runtime PM, half of the work is done, interface is declared as needs_rebind 
but never rebind. So either the rebind work should be completed for PM runtime 
or an other solution found (logical disconnect, reset_resume mandatory...). But 
I think this dead end should be fixed.

Regards,
Loic Poulain

From: Peter Chen [peter.c...@freescale.com]
Sent: Thursday, March 06, 2014 2:10 AM
To: Alan Stern
Cc: Poulain, Loic; linux-usb@vger.kernel.org
Subject: Re: BUG: USB Reset-Resume Mechanism does not work for runtime resume

On Wed, Mar 05, 2014 at 11:26:06AM -0500, Alan Stern wrote:
 On Wed, 5 Mar 2014, Poulain, Loic wrote:

  + function 'do_rebind_interface' is in charge of unbind and rebind the 
  interfaces with the 'need_binfind' flag set.
  + However this method is only called in 'usb_resume_complete'.
  + Problem is that 'usb_resume_complete' is a dev_pm_ops callback 
  (core/usb.h) used by the System PM core which is never called in a runtime 
  PM scenario.
  + So interfaces remain suspended forever (or until the next PM system 
  suspend/resume), device is unusable.
  (unbinding/rebinding manually the interface via sysfs recovers the device)
 
  Could you please let me know if it's the expected behavior or a real issue. 
  Should we not call 'do_rebind_interface' in the runtime resume sequence?

 I suspect this is an oversight.

 Still, implementing it would be difficult.  In usb_runtime_resume, the
 device lock may or may not already be held.  Therefore we cannot simply
 lock the device and call do_rebind_interfaces.

 Using a work queue for this seems like overkill (and it seems fragile).
 I don't know what we should do.


If the autosuspend supported device can't respond resume correctly, eg,
after resume, it can't respond GET_STATUS correctly in this case, the
.reset_resume interface is a must for class driver, it just like a
workaround for broken hardware.

--

Best Regards,
Peter Chen

-
Intel Corporation SAS (French simplified joint stock company)
Registered headquarters: Les Montalets- 2, rue de Paris, 
92196 Meudon Cedex, France
Registration Number:  302 456 199 R.C.S. NANTERRE
Capital: 4,572,000 Euros

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Re: USB Host support for mx25

2014-03-06 Thread Fabio Estevam
On Thu, Mar 6, 2014 at 1:36 AM, Peter Chen peter.c...@freescale.com wrote:

 Do you have usbmisc node? usbmisc is not probed or its probe has failed.

Thanks, Peter. usbmisc node was 'disabled' at imx25.dtsi. I removed
the 'disabled' and now the probe goes a bit further:

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
usbcore: registered new interface driver usb-storage
53ff4400.usb supply vbus not found, using dummy regulator
ci_hdrc ci_hdrc.0: doesn't support gadget
ci_hdrc ci_hdrc.0: EHCI Host Controller
ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1
ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected

usb 1-1: new low-speed USB device number 2 using ci_hdrc
usb 1-1: device descriptor read/64, error -71
usb 1-1: device descriptor read/64, error -71
usb 1-1: new low-speed USB device number 3 using ci_hdrc
usb 1-1: device descriptor read/64, error -71
usb 1-1: device descriptor read/64, error -71
usb 1-1: new low-speed USB device number 4 using ci_hdrc
usb 1-1: device not accepting address 4, error -71
...
usb 1-1: new low-speed USB device number 5 using ci_hdrc
usb 1-1: device not accepting address 5, error -71
hub 1-0:1.0: unable to enumerate USB device on port 1

My changes now look like this:

diff --git a/arch/arm/boot/dts/imx25-pdk.dts b/arch/arm/boot/dts/imx25-pdk.dts
index 7a6d21f..6f17d11 100644
--- a/arch/arm/boot/dts/imx25-pdk.dts
+++ b/arch/arm/boot/dts/imx25-pdk.dts
@@ -107,3 +107,8 @@
 fsl,uart-has-rtscts;
 status = okay;
 };
+
+usbhost1 {
+phy_type = serial;
+status = okay;
+};
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
index 32f760e..7fa123b 100644
--- a/arch/arm/boot/dts/imx25.dtsi
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -482,13 +482,17 @@
 };

 usbphy1: usbphy@1 {
-compatible = nop-usbphy;
-status = disabled;
+compatible = usb-nop-xceiv;
+clocks = clks 0;
+clock-names = main_clk;
+status = okay;
 };

 usbphy2: usbphy@2 {
-compatible = nop-usbphy;
-status = disabled;
+compatible = usb-nop-xceiv;
+clocks = clks 0;
+clock-names = main_clk;
+status = okay;
 };

 usbotg: usb@53ff4000 {
@@ -498,6 +502,7 @@
 clocks = clks 9, clks 70, clks 8;
 clock-names = ipg, ahb, per;
 fsl,usbmisc = usbmisc 0;
+fsl,usbphy = usbphy1;
 status = disabled;
 };

@@ -508,6 +513,7 @@
 clocks = clks 9, clks 70, clks 8;
 clock-names = ipg, ahb, per;
 fsl,usbmisc = usbmisc 1;
+fsl,usbphy = usbphy2;
 status = disabled;
 };

@@ -517,7 +523,6 @@
 clocks = clks 9, clks 70, clks 8;
 clock-names = ipg, ahb, per;
 reg = 0x53ff4600 0x00f;
-status = disabled;
 };

 dryice@53ffc000 {

Let me know if you have some other suggestion.

Thanks,

Fabio Estevam
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RE: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kamil Debski
Hi Anton, Kishon,

 From: Anton Tikhomirov [mailto:av.tikhomi...@samsung.com]
 Sent: Thursday, March 06, 2014 9:26 AM
 
 Hi Kamil,
 
 ...
 
  +| 3. Supporting SoCs
  ++
  +
  +To support a new SoC a new file should be added to the drivers/phy
  +directory. Each SoC's configuration is stored in an instance of the
  +struct samsung_usb2_phy_config.
  +
  +struct samsung_usb2_phy_config {
  +   const struct samsung_usb2_common_phy *phys;
  +   unsigned int num_phys;
  +   bool has_mode_switch;
 
 You missed rate_to_clk here.

Thank you for spotting this.

Kishon: I am sorry that this omission was made. I am happy to send an
updated patchset. However, I want to give some time for any additional
comments. Do you think that we have for this? Is today evening ok with you?
 
  +};
  +
 
 ...
 
  diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-
 samsung-
  usb2.c new file mode 100644 index 000..c3b7719
  --- /dev/null
  +++ b/drivers/phy/phy-samsung-usb2.c
  @@ -0,0 +1,222 @@
  +/*
  + * Samsung SoC USB 1.1/2.0 PHY driver
  + *
  + * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  + * Author: Kamil Debski k.deb...@samsung.com
  + *
  + * This program is free software; you can redistribute it and/or
  modify
  + * it under the terms of the GNU General Public License version 2 as
  + * published by the Free Software Foundation.
  + */
  +
  +#include linux/clk.h
  +#include linux/mfd/syscon.h
  +#include linux/module.h
  +#include linux/of.h
  +#include linux/of_address.h
  +#include linux/phy/phy.h
  +#include linux/platform_device.h
  +#include linux/spinlock.h
  +#include phy-samsung-usb2.h
  +
  +static int samsung_usb2_phy_power_on(struct phy *phy) {
  +   struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
  +   struct samsung_usb2_phy_driver *drv = inst-drv;
  +   int ret;
  +
  +   dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
  +   inst-cfg-label);
  +   ret = clk_prepare_enable(drv-clk);
 
 clk_prepare_enable() can sleep, and therefore doesn't allow
 samusng_usb2_phy_power_on() to be used in atomic context (e.g. inside
 spin_lock-ed area), what sometimes may be desirable.
 What about to prepare clock in probe, and just enable it here
 (note: clk_enable() doesn't sleep).

From the onward discussion between you and Kishon, I draw the conclusion
that this change is not necessary. Right?

 
  +   if (ret)
  +   goto err_main_clk;
  +   ret = clk_prepare_enable(drv-ref_clk);
  +   if (ret)
  +   goto err_instance_clk;
  +   if (inst-cfg-power_on) {
  +   spin_lock(drv-lock);
  +   ret = inst-cfg-power_on(inst);
  +   spin_unlock(drv-lock);
  +   }
  +
  +   return 0;
 
 Thank you

Best wishes,
-- 
Kamil Debski
Samsung RD Institute Poland


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RE: [PATCH v9 0/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kamil Debski
Hi Tobias,

 From: Tobias Jakobi [mailto:tjak...@math.uni-bielefeld.de]
 Sent: Thursday, March 06, 2014 12:08 AM
 
 Hello Kamil,
 
 this looks very good. I just tested the patchset on my ODROID-X2
 (Exynos4412-based board) and the USB stability issues I mentioned to
 you before (with the older patchset) seem to be gone.

This problem was related to the reset procedure not being done completely. 
It is corrected now.

 
 All devices on the USB behave normally (mass storage, ethernet and
 bluetooth).

Thank you for testing these patches. Would you consider adding a Tested-by 
tag?
I am planning to send v10 soon, which will address comments to v9.

 
 With best wishes,
 Tobias

Best wishes,
-- 
Kamil Debski
Samsung RD Institute Poland

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Re: [PATCH v9 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kishon Vijay Abraham I

Hi,

On Thursday 06 March 2014 03:54 PM, Kamil Debski wrote:

Hi Anton, Kishon,


From: Anton Tikhomirov [mailto:av.tikhomi...@samsung.com]
Sent: Thursday, March 06, 2014 9:26 AM

Hi Kamil,

...


+| 3. Supporting SoCs
++
+
+To support a new SoC a new file should be added to the drivers/phy
+directory. Each SoC's configuration is stored in an instance of the
+struct samsung_usb2_phy_config.
+
+struct samsung_usb2_phy_config {
+   const struct samsung_usb2_common_phy *phys;
+   unsigned int num_phys;
+   bool has_mode_switch;


You missed rate_to_clk here.


Thank you for spotting this.

Kishon: I am sorry that this omission was made. I am happy to send an
updated patchset. However, I want to give some time for any additional
comments. Do you think that we have for this? Is today evening ok with you?


Would be great if you can send the patch in 2-3 hrs.. I'd like to give 
enough time for auto build to detect any errors.





+};
+


...


diff --git a/drivers/phy/phy-samsung-usb2.c b/drivers/phy/phy-

samsung-

usb2.c new file mode 100644 index 000..c3b7719
--- /dev/null
+++ b/drivers/phy/phy-samsung-usb2.c
@@ -0,0 +1,222 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski k.deb...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/mfd/syscon.h
+#include linux/module.h
+#include linux/of.h
+#include linux/of_address.h
+#include linux/phy/phy.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+#include phy-samsung-usb2.h
+
+static int samsung_usb2_phy_power_on(struct phy *phy) {
+   struct samsung_usb2_phy_instance *inst = phy_get_drvdata(phy);
+   struct samsung_usb2_phy_driver *drv = inst-drv;
+   int ret;
+
+   dev_dbg(drv-dev, Request to power_on \%s\ usb phy\n,
+   inst-cfg-label);
+   ret = clk_prepare_enable(drv-clk);


clk_prepare_enable() can sleep, and therefore doesn't allow
samusng_usb2_phy_power_on() to be used in atomic context (e.g. inside
spin_lock-ed area), what sometimes may be desirable.
What about to prepare clock in probe, and just enable it here
(note: clk_enable() doesn't sleep).


 From the onward discussion between you and Kishon, I draw the conclusion
that this change is not necessary. Right?


right.

Cheers
Kishon
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Re: [PATCH 1/3] phy: omap-usb2: Adapt phy-omap-usb2 for AM437x

2014-03-06 Thread Kishon Vijay Abraham I

George,

On Monday 03 March 2014 03:40 PM, George Cherian wrote:

Adapt phy-omap-usb2 driver for AM437x.
- Add new comaptible ti,am437x-usb2 for AM437x
- Pass proper data to differentiate AM437x and others.
- AM437x doesnot support  set_vbus and start_srp.
- Also update the Documentation to add new compatible.

Signed-off-by: George Cherian george.cher...@ti.com
---
  Documentation/devicetree/bindings/usb/usb-phy.txt |  4 +-
  drivers/phy/phy-omap-usb2.c   | 49 +--
  include/linux/usb/omap_usb.h  |  9 +
  3 files changed, 49 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt 
b/Documentation/devicetree/bindings/usb/usb-phy.txt
index c0245c8..b3fa409 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -3,7 +3,9 @@ USB PHY
  OMAP USB2 PHY

  Required properties:
- - compatible: Should be ti,omap-usb2
+ - compatible: Should be either of
+   * ti,omap-usb2 for OMAP4, OMAP5, DRA7
+   * ti,am437x-usb2 for AM437x
   - reg : Address and length of the register set for the device.
   - #phy-cells: determine the number of cells that should be given in the
 phandle while referencing this phy.
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index 7699752..d54f24b 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -144,6 +144,31 @@ static struct phy_ops ops = {
.owner  = THIS_MODULE,
  };

+#ifdef CONFIG_OF
+static const struct usb_phy_data omap_usb2_data = {
+   .label = omap_usb2,
+   .flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
+};
+
+static const struct usb_phy_data am437x_usb2_data = {
+   .label = am437x_usb2,
+   .flags =  0,
+};
+
+static const struct of_device_id omap_usb2_id_table[] = {
+   {
+   .compatible = ti,omap-usb2,
+   .data = omap_usb2_data,
+   },
+   {
+   .compatible = ti,am437x-usb2,
+   .data = am437x_usb2_data,
+   },
+   {},
+};
+MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
+#endif
+
  static int omap_usb2_probe(struct platform_device *pdev)
  {
struct omap_usb *phy;
@@ -153,10 +178,16 @@ static int omap_usb2_probe(struct platform_device *pdev)
struct device_node *node = pdev-dev.of_node;
struct device_node *control_node;
struct platform_device *control_pdev;
+   const struct of_device_id *of_id;
+   struct usb_phy_data *phy_data;
+
+   of_id = of_match_device(of_match_ptr(omap_usb2_id_table), pdev-dev);

-   if (!node)
+   if (!of_id)
return -EINVAL;

+   phy_data = (struct usb_phy_data *)of_id-data;
+
phy = devm_kzalloc(pdev-dev, sizeof(*phy), GFP_KERNEL);
if (!phy) {
dev_err(pdev-dev, unable to allocate memory for USB2 PHY\n);
@@ -172,7 +203,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
phy-dev = pdev-dev;

phy-phy.dev = phy-dev;
-   phy-phy.label   = omap-usb2;
+   phy-phy.label   = phy_data-label;
phy-phy.set_suspend = omap_usb2_suspend;
phy-phy.otg = otg;
phy-phy.type= USB_PHY_TYPE_USB2;
@@ -196,8 +227,10 @@ static int omap_usb2_probe(struct platform_device *pdev)

otg-set_host= omap_usb_set_host;
otg-set_peripheral  = omap_usb_set_peripheral;
-   otg-set_vbus= omap_usb_set_vbus;
-   otg-start_srp   = omap_usb_start_srp;
+   if (phy_data-flags  OMAP_USB2_HAS_SET_VBUS)
+   otg-set_vbus= omap_usb_set_vbus;
+   if (phy_data-flags  OMAP_USB2_HAS_START_SRP)
+   otg-start_srp   = omap_usb_start_srp;
otg-phy = phy-phy;

platform_set_drvdata(pdev, phy);
@@ -297,14 +330,6 @@ static const struct dev_pm_ops omap_usb2_pm_ops = {
  #define DEV_PM_OPS NULL
  #endif

-#ifdef CONFIG_OF
-static const struct of_device_id omap_usb2_id_table[] = {
-   { .compatible = ti,omap-usb2 },
-   {}
-};
-MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
-#endif
-
  static struct platform_driver omap_usb2_driver = {
.probe  = omap_usb2_probe,
.remove = omap_usb2_remove,
diff --git a/include/linux/usb/omap_usb.h b/include/linux/usb/omap_usb.h
index 6ae2936..034161d 100644
--- a/include/linux/usb/omap_usb.h
+++ b/include/linux/usb/omap_usb.h
@@ -42,6 +42,15 @@ struct omap_usb {
u8  is_suspended:1;
  };

+struct usb_phy_data {
+   const char *label;
+   u32 flags;


u8 should be sufficient no?

Can you also refresh the patch on linux-phy next?

Thanks
Kishon
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[PATCH v10 1/4] phy: core: Add an exported of_phy_get function

2014-03-06 Thread Kamil Debski
Previously the of_phy_get function took a struct device * and
was declared static. It was impossible to call it from
another driver and thus it was impossible to get phy defined
for a given node. The old function was renamed to _of_phy_get
and was left for internal use. of_phy_get function was added
and it was exported. The function enables to get a phy for
a given device tree node.

Signed-off-by: Kamil Debski k.deb...@samsung.com
---
 drivers/phy/phy-core.c  |   45 -
 include/linux/phy/phy.h |6 ++
 2 files changed, 42 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 6c73837..7c1b0e1 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -274,8 +274,8 @@ int phy_power_off(struct phy *phy)
 EXPORT_SYMBOL_GPL(phy_power_off);
 
 /**
- * of_phy_get() - lookup and obtain a reference to a phy by phandle
- * @dev: device that requests this phy
+ * _of_phy_get() - lookup and obtain a reference to a phy by phandle
+ * @np: device_node for which to get the phy
  * @index: the index of the phy
  *
  * Returns the phy associated with the given phandle value,
@@ -284,20 +284,17 @@ EXPORT_SYMBOL_GPL(phy_power_off);
  * not yet loaded. This function uses of_xlate call back function provided
  * while registering the phy_provider to find the phy instance.
  */
-static struct phy *of_phy_get(struct device *dev, int index)
+static struct phy *_of_phy_get(struct device_node *np, int index)
 {
int ret;
struct phy_provider *phy_provider;
struct phy *phy = NULL;
struct of_phandle_args args;
 
-   ret = of_parse_phandle_with_args(dev-of_node, phys, #phy-cells,
+   ret = of_parse_phandle_with_args(np, phys, #phy-cells,
index, args);
-   if (ret) {
-   dev_dbg(dev, failed to get phy in %s node\n,
-   dev-of_node-full_name);
+   if (ret)
return ERR_PTR(-ENODEV);
-   }
 
mutex_lock(phy_provider_mutex);
phy_provider = of_phy_provider_lookup(args.np);
@@ -317,6 +314,36 @@ err0:
 }
 
 /**
+ * of_phy_get() - lookup and obtain a reference to a phy using a device_node.
+ * @np: device_node for which to get the phy
+ * @con_id: name of the phy from device's point of view
+ *
+ * Returns the phy driver, after getting a refcount to it; or
+ * -ENODEV if there is no such phy. The caller is responsible for
+ * calling phy_put() to release that count.
+ */
+struct phy *of_phy_get(struct device_node *np, const char *con_id)
+{
+   struct phy *phy = NULL;
+   int index = 0;
+
+   if (con_id)
+   index = of_property_match_string(np, phy-names, con_id);
+
+   phy = _of_phy_get(np, index);
+   if (IS_ERR(phy))
+   return phy;
+
+   if (!try_module_get(phy-ops-owner))
+   return ERR_PTR(-EPROBE_DEFER);
+
+   get_device(phy-dev);
+
+   return phy;
+}
+EXPORT_SYMBOL_GPL(of_phy_get);
+
+/**
  * phy_put() - release the PHY
  * @phy: the phy returned by phy_get()
  *
@@ -407,7 +434,7 @@ struct phy *phy_get(struct device *dev, const char *string)
if (dev-of_node) {
index = of_property_match_string(dev-of_node, phy-names,
string);
-   phy = of_phy_get(dev, index);
+   phy = _of_phy_get(dev-of_node, index);
} else {
phy = phy_lookup(dev, string);
}
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 3f83459..2fe3194 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -151,6 +151,7 @@ struct phy *devm_phy_get(struct device *dev, const char 
*string);
 struct phy *devm_phy_optional_get(struct device *dev, const char *string);
 void phy_put(struct phy *phy);
 void devm_phy_put(struct device *dev, struct phy *phy);
+struct phy *of_phy_get(struct device_node *np, const char *con_id);
 struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args *args);
 struct phy *phy_create(struct device *dev, const struct phy_ops *ops,
@@ -259,6 +260,11 @@ static inline void devm_phy_put(struct device *dev, struct 
phy *phy)
 {
 }
 
+struct phy *of_phy_get(struct device_node *np, const char *con_id)
+{
+   return ERR_PTR(-ENOSYS);
+}
+
 static inline struct phy *of_phy_simple_xlate(struct device *dev,
struct of_phandle_args *args)
 {
-- 
1.7.9.5

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[PATCH v10 0/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kamil Debski
Hi,

This is the tenth version of this patchset. The only difference since v9
is correction in the documentation.

Best wishes,
Kamil Debski

--
Changes from v9:
1) phy: core: Add an exported of_phy_get function
   - No changes since v9.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v9.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Fixed missing callback in the documentation of the
 samsung_usb2_phy_config structure.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - No changes since v9.

--
Changes from v8:
1) phy: core: Add an exported of_phy_get function
   - No changes since v8.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v8.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Fix empty blank line at EOF errors
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Fix empty blank line at EOF error

--
Changes from v7:
1) phy: core: Add an exported of_phy_get function
   - No changes since v7.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v7.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Fix checkpatch errors with code indentation and corrected whitespace.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Fix checkpatch errors with code indentation and corrected whitespace.

--
Changes from v6: (not including the change that controller patches were removed
form this patchset, also this patchset excludes S5PV210 support - it needs more
testing)
1) phy: core: Add an exported of_phy_get function
   - No changes since v6.
2) phy: core: Add devm_of_phy_get to phy-core
   - No changes since v6.
3) phy: Add new Exynos USB 2.0 PHY driver
   - Changed the way clocks are supplied to the driver. Prior to version v7
 there were reference clocks for every phy instance, now a single ref
 clock was introduced.
   - Updated documentation to match the aforementioned change.
   - Add offset EXYNOS_*_UPHYCLK_PHYFSEL_OFFSET to the clock register content
 defines.
   - Corrected way clock register is modified. Instead of a simple write, a
 proper read, modify, write sequence was introduced.
   - Important stability fix - added udelay after PHY reset. This fixes a bug
 causing instability in USB LAN adapters. Without the delay the DMA burst
 mode was could not be enabled.
4) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
   - Changed handling of clocks to use a single ref clock.


Changes from v5:
1) phy: core: Add an exported of_phy_get function
- corrected behaviour of the modification when GENERIC_PHY is not enabled
  by adding a stub of the of_phy_get function
2) phy: core: Add devm_of_phy_get to phy-core
- corrected behaviour of the modification when GENERIC_PHY is not enabled
  by adding a stub of the devm_of_phy_get function
3) dts: Add usb2phy to Exynos 4
- no change
4) dts: Add usb2phy to Exynos 5250
- in the previous version, this patch included some phy-exynos5250-usb2.c code
  by mistake, the code has been remove and added to the proper patch
5) phy: Add new Exynos USB PHY driver
- changed strings from Exynos 4212 to Exynos 4x12, as the Exynos 4212 driver is
  actually a driver for the whole Exynos 4x12 family
- added documentation to the Exynos USB 2.0 PHY driver adaptaion layer
- corrected strings HSCI - HSIC
- fixed a problem introduced by previous change - on Exynos 4x12 the HSIC did
  not work on its own
- mode switch support was added to Exynos 4x12 (same io pins are used by host
  and device)
- support for phy_set_bus_width introduced by Matt Porter was added
6) phy: Add support for S5PV210 to the Exynos USB PHY
- setting of clk register was fixed
7) phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY
- supoprt was added for HSIC and device
8) usb: ehci-exynos: Change to use phy provided by the generic phy framework
- DT documentation was moved from usb-ehci.txt to exynos-usb.txt


Changes from v4:
1) phy: core: Add an exported of_phy_get function
- the new exported function of_phy_get was changed to take the phy's name as a
  parameter instead of the index
2) phy: core: Add devm_of_phy_get to phy-core
- fixes made in the comments to devm_of_phy_get
3) phy: Add new Exynos USB PHY driver
- move the documentation from a new to an existing file - samsung-phy.txt
- fix typos and uppercase hex addresses
- add more explanations to Kconfig (checkpatch still complains, but I find it
  hard to think what else could I add)
- add selects MFD_SYSCON as the driver needs it (Thank you, Tobias!)
- cleanup included headers in both *.c and .h files
- use BIT(x) macro instead of (1  x)
- replaced HOST and DEV with PHY0 and PHY1 in phy-exynos4212-usb2.c, the
  registers are described as PHYx in the documentation hence the decision to
  leave the PHYx naming
- fixed typo in exynos4210_rate_to_clk reg - *reg
- change hax_mode_switch and enabled type to bool
4) usb: ehci-s5p: Change to use phy provided by the 

[PATCH v10 2/4] phy: core: Add devm_of_phy_get to phy-core

2014-03-06 Thread Kamil Debski
Adding devm_of_phy_get will allow to get phys by supplying a
pointer to the struct device_node instead of struct device.

Signed-off-by: Kamil Debski k.deb...@samsung.com
---
 drivers/phy/phy-core.c  |   31 +++
 include/linux/phy/phy.h |8 
 2 files changed, 39 insertions(+)

diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index 7c1b0e1..623b71c 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -526,6 +526,37 @@ struct phy *devm_phy_optional_get(struct device *dev, 
const char *string)
 EXPORT_SYMBOL_GPL(devm_phy_optional_get);
 
 /**
+ * devm_of_phy_get() - lookup and obtain a reference to a phy.
+ * @dev: device that requests this phy
+ * @np: node containing the phy
+ * @con_id: name of the phy from device's point of view
+ *
+ * Gets the phy using of_phy_get(), and associates a device with it using
+ * devres. On driver detach, release function is invoked on the devres data,
+ * then, devres data is freed.
+ */
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id)
+{
+   struct phy **ptr, *phy;
+
+   ptr = devres_alloc(devm_phy_release, sizeof(*ptr), GFP_KERNEL);
+   if (!ptr)
+   return ERR_PTR(-ENOMEM);
+
+   phy = of_phy_get(np, con_id);
+   if (!IS_ERR(phy)) {
+   *ptr = phy;
+   devres_add(dev, ptr);
+   } else {
+   devres_free(ptr);
+   }
+
+   return phy;
+}
+EXPORT_SYMBOL_GPL(devm_of_phy_get);
+
+/**
  * phy_create() - create a new phy
  * @dev: device that is creating the new phy
  * @ops: function pointers for performing phy operations
diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
index 2fe3194..bcbf96c 100644
--- a/include/linux/phy/phy.h
+++ b/include/linux/phy/phy.h
@@ -149,6 +149,8 @@ struct phy *phy_get(struct device *dev, const char *string);
 struct phy *phy_optional_get(struct device *dev, const char *string);
 struct phy *devm_phy_get(struct device *dev, const char *string);
 struct phy *devm_phy_optional_get(struct device *dev, const char *string);
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id);
 void phy_put(struct phy *phy);
 void devm_phy_put(struct device *dev, struct phy *phy);
 struct phy *of_phy_get(struct device_node *np, const char *con_id);
@@ -252,6 +254,12 @@ static inline struct phy *devm_phy_optional_get(struct 
device *dev,
return ERR_PTR(-ENOSYS);
 }
 
+struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,
+   const char *con_id)
+{
+   return ERR_PTR(-ENOSYS);
+}
+
 static inline void phy_put(struct phy *phy)
 {
 }
-- 
1.7.9.5

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[PATCH v10 3/4] phy: Add new Exynos USB 2.0 PHY driver

2014-03-06 Thread Kamil Debski
Add a new driver for the Exynos USB 2.0 PHY. The new driver uses the generic
PHY framework. The driver includes support for the Exynos 4x10 and 4x12
SoC families.

Signed-off-by: Kamil Debski k.deb...@samsung.com
---
 .../devicetree/bindings/phy/samsung-phy.txt|   53 
 Documentation/phy/samsung-usb2.txt |  135 
 drivers/phy/Kconfig|   29 ++
 drivers/phy/Makefile   |3 +
 drivers/phy/phy-exynos4210-usb2.c  |  261 
 drivers/phy/phy-exynos4x12-usb2.c  |  328 
 drivers/phy/phy-samsung-usb2.c |  222 +
 drivers/phy/phy-samsung-usb2.h |   66 
 8 files changed, 1097 insertions(+)
 create mode 100644 Documentation/phy/samsung-usb2.txt
 create mode 100644 drivers/phy/phy-exynos4210-usb2.c
 create mode 100644 drivers/phy/phy-exynos4x12-usb2.c
 create mode 100644 drivers/phy/phy-samsung-usb2.c
 create mode 100644 drivers/phy/phy-samsung-usb2.h

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index c0fccaa..bf955ab 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -20,3 +20,56 @@ Required properties:
 - compatible : should be samsung,exynos5250-dp-video-phy;
 - reg : offset and length of the Display Port PHY register set;
 - #phy-cells : from the generic PHY bindings, must be 0;
+
+Samsung S5P/EXYNOS SoC series USB PHY
+-
+
+Required properties:
+- compatible : should be one of the listed compatibles:
+   - samsung,exynos4210-usb2-phy
+   - samsung,exynos4x12-usb2-phy
+- reg : a list of registers used by phy driver
+   - first and obligatory is the location of phy modules registers
+- samsung,sysreg-phandle - handle to syscon used to control the system 
registers
+- samsung,pmureg-phandle - handle to syscon used to control PMU registers
+- #phy-cells : from the generic phy bindings, must be 1;
+- clocks and clock-names:
+   - the phy clock is required by the phy module, used as a gate
+   - the ref clock is used to get the rate of the clock provided to the
+ PHY module
+
+The first phandle argument in the PHY specifier identifies the PHY, its
+meaning is compatible dependent. For the currently supported SoCs (Exynos 4210
+and Exynos 4212) it is as follows:
+  0 - USB device (device),
+  1 - USB host (host),
+  2 - HSIC0 (hsic0),
+  3 - HSIC1 (hsic1),
+
+Exynos 4210 and Exynos 4212 use mode switching and require that mode switch
+register is supplied.
+
+Example:
+
+For Exynos 4412 (compatible with Exynos 4212):
+
+usbphy: phy@125b {
+   compatible = samsung,exynos4x12-usb2-phy;
+   reg = 0x125b 0x100;
+   clocks = clock 305, clock 2;
+   clock-names = phy, ref;
+   status = okay;
+   #phy-cells = 1;
+   samsung,sysreg-phandle = sys_reg;
+   samsung,pmureg-phandle = pmu_reg;
+};
+
+Then the PHY can be used in other nodes such as:
+
+phy-consumer@1234 {
+   phys = usbphy 2;
+   phy-names = phy;
+};
+
+Refer to DT bindings documentation of particular PHY consumer devices for more
+information about required PHYs and the way of specification.
diff --git a/Documentation/phy/samsung-usb2.txt 
b/Documentation/phy/samsung-usb2.txt
new file mode 100644
index 000..ed12d43
--- /dev/null
+++ b/Documentation/phy/samsung-usb2.txt
@@ -0,0 +1,135 @@
+.--+
+|  Samsung USB 2.0 PHY adaptation layer   |
++-+'
+
+| 1. Description
++
+
+The architecture of the USB 2.0 PHY module in Samsung SoCs is similar
+among many SoCs. In spite of the similarities it proved difficult to
+create a one driver that would fit all these PHY controllers. Often
+the differences were minor and were found in particular bits of the
+registers of the PHY. In some rare cases the order of register writes or
+the PHY powering up process had to be altered. This adaptation layer is
+a compromise between having separate drivers and having a single driver
+with added support for many special cases.
+
+| 2. Files description
++--
+
+- phy-samsung-usb2.c
+   This is the main file of the adaptation layer. This file contains
+   the probe function and provides two callbacks to the Generic PHY
+   Framework. This two callbacks are used to power on and power off the
+   phy. They carry out the common work that has to be done on all version
+   of the PHY module. Depending on which SoC was chosen they execute SoC
+   specific callbacks. The specific SoC version is selected by choosing
+   the appropriate compatible string. In addition, this file contains
+ 

[PATCH v10 4/4] phy: Add Exynos 5250 support to the Exynos USB 2.0 PHY driver

2014-03-06 Thread Kamil Debski
Add support for Exynos 5250. This driver is to replace the old
USB 2.0 PHY driver.

Signed-off-by: Kamil Debski k.deb...@samsung.com
---
 .../devicetree/bindings/phy/samsung-phy.txt|1 +
 drivers/phy/Kconfig|   11 +
 drivers/phy/Makefile   |1 +
 drivers/phy/phy-exynos5250-usb2.c  |  404 
 drivers/phy/phy-samsung-usb2.c |6 +
 drivers/phy/phy-samsung-usb2.h |1 +
 6 files changed, 424 insertions(+)
 create mode 100644 drivers/phy/phy-exynos5250-usb2.c

diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt 
b/Documentation/devicetree/bindings/phy/samsung-phy.txt
index bf955ab..28f9edb 100644
--- a/Documentation/devicetree/bindings/phy/samsung-phy.txt
+++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt
@@ -28,6 +28,7 @@ Required properties:
 - compatible : should be one of the listed compatibles:
- samsung,exynos4210-usb2-phy
- samsung,exynos4x12-usb2-phy
+   - samsung,exynos5250-usb2-phy
 - reg : a list of registers used by phy driver
- first and obligatory is the location of phy modules registers
 - samsung,sysreg-phandle - handle to syscon used to control the system 
registers
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3374836..1b607d7 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -136,4 +136,15 @@ config PHY_EXYNOS4X12_USB2
  Samsung USB 2.0 PHY driver is enabled and means that support for this
  particular SoC is compiled in the driver. In case of Exynos 4x12 four
  phys are available - device, host, HSIC0 and HSIC1.
+
+config PHY_EXYNOS5250_USB2
+   bool Support for Exynos 5250
+   depends on PHY_SAMSUNG_USB2
+   depends on SOC_EXYNOS5250
+   help
+ Enable USB PHY support for Exynos 5250. This option requires that
+ Samsung USB 2.0 PHY driver is enabled and means that support for this
+ particular SoC is compiled in the driver. In case of Exynos 5250 four
+ phys are available - device, host, HSIC0 and HSIC.
+
 endmenu
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index c4ddd23..ecf0d3f 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_PHY_SUN4I_USB)   += phy-sun4i-usb.o
 obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-samsung-usb2.o
 obj-$(CONFIG_PHY_EXYNOS4210_USB2)  += phy-exynos4210-usb2.o
 obj-$(CONFIG_PHY_EXYNOS4X12_USB2)  += phy-exynos4x12-usb2.o
+obj-$(CONFIG_PHY_EXYNOS5250_USB2)  += phy-exynos5250-usb2.o
diff --git a/drivers/phy/phy-exynos5250-usb2.c 
b/drivers/phy/phy-exynos5250-usb2.c
new file mode 100644
index 000..94179af
--- /dev/null
+++ b/drivers/phy/phy-exynos5250-usb2.c
@@ -0,0 +1,404 @@
+/*
+ * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
+ *
+ * Copyright (C) 2013 Samsung Electronics Co., Ltd.
+ * Author: Kamil Debski k.deb...@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/delay.h
+#include linux/io.h
+#include linux/phy/phy.h
+#include linux/regmap.h
+#include phy-samsung-usb2.h
+
+/* Exynos USB PHY registers */
+#define EXYNOS_5250_REFCLKSEL_CRYSTAL  0x0
+#define EXYNOS_5250_REFCLKSEL_XO   0x1
+#define EXYNOS_5250_REFCLKSEL_CLKCORE  0x2
+
+#define EXYNOS_5250_FSEL_9MHZ6 0x0
+#define EXYNOS_5250_FSEL_10MHZ 0x1
+#define EXYNOS_5250_FSEL_12MHZ 0x2
+#define EXYNOS_5250_FSEL_19MHZ20x3
+#define EXYNOS_5250_FSEL_20MHZ 0x4
+#define EXYNOS_5250_FSEL_24MHZ 0x5
+#define EXYNOS_5250_FSEL_50MHZ 0x7
+
+/* Normal host */
+#define EXYNOS_5250_HOSTPHYCTRL0   0x0
+
+#define EXYNOS_5250_HOSTPHYCTRL0_PHYSWRSTALL   BIT(31)
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT   19
+#define EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_MASK\
+   (0x3  EXYNOS_5250_HOSTPHYCTRL0_REFCLKSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT16
+#define EXYNOS_5250_HOSTPHYCTRL0_FSEL_MASK \
+   (0x7  EXYNOS_5250_HOSTPHYCTRL0_FSEL_SHIFT)
+#define EXYNOS_5250_HOSTPHYCTRL0_TESTBURNINBIT(11)
+#define EXYNOS_5250_HOSTPHYCTRL0_RETENABLE BIT(10)
+#define EXYNOS_5250_HOSTPHYCTRL0_COMMON_ON_N   BIT(9)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_MASK(0x3  7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_DUAL(0x0  7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ID0 (0x1  7)
+#define EXYNOS_5250_HOSTPHYCTRL0_VATESTENB_ANALOGTEST  (0x2  7)
+#define EXYNOS_5250_HOSTPHYCTRL0_SIDDQ BIT(6)
+#define EXYNOS_5250_HOSTPHYCTRL0_FORCESLEEPBIT(5)
+#define EXYNOS_5250_HOSTPHYCTRL0_FORCESUSPEND  BIT(4)
+#define 

Re: OTG102/EzCapture2 no audio

2014-03-06 Thread Clemens Ladisch
David Woodfall wrote:
 Success. I used the second command mentioned on the linuxtv wiki:

 mplayer tv:// -tv
 driver=v4l2:device=/dev/video1:normid=8:alsa:adevice=hw.1:forceaudio:volume=80:immediatemode=0:width=720

 Still no sound through arecord though.

It's probably necessary to configure the tuner correctly.


Regards,
Clemens
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[PATCH v2 1/3] phy: omap-usb2: Adapt phy-omap-usb2 for AM437x

2014-03-06 Thread George Cherian
Adapt phy-omap-usb2 driver for AM437x.
- Add new comaptible ti,am437x-usb2 for AM437x
- Pass proper data to differentiate AM437x and others.
- AM437x doesnot support  set_vbus and start_srp.
- Also update the Documentation to add new compatible.

Signed-off-by: George Cherian george.cher...@ti.com
---
 Documentation/devicetree/bindings/usb/usb-phy.txt |  4 +-
 drivers/phy/phy-omap-usb2.c   | 49 +--
 include/linux/phy/omap_usb.h  |  9 +
 3 files changed, 49 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt 
b/Documentation/devicetree/bindings/usb/usb-phy.txt
index c0245c8..b3fa409 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -3,7 +3,9 @@ USB PHY
 OMAP USB2 PHY
 
 Required properties:
- - compatible: Should be ti,omap-usb2
+ - compatible: Should be either of
+   * ti,omap-usb2 for OMAP4, OMAP5, DRA7
+   * ti,am437x-usb2 for AM437x
  - reg : Address and length of the register set for the device.
  - #phy-cells: determine the number of cells that should be given in the
phandle while referencing this phy.
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index 9c3f056..0c78f54 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -122,6 +122,31 @@ static struct phy_ops ops = {
.owner  = THIS_MODULE,
 };
 
+#ifdef CONFIG_OF
+static const struct usb_phy_data omap_usb2_data = {
+   .label = omap_usb2,
+   .flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
+};
+
+static const struct usb_phy_data am437x_usb2_data = {
+   .label = am437x_usb2,
+   .flags =  0,
+};
+
+static const struct of_device_id omap_usb2_id_table[] = {
+   {
+   .compatible = ti,omap-usb2,
+   .data = omap_usb2_data,
+   },
+   {
+   .compatible = ti,am437x-usb2,
+   .data = am437x_usb2_data,
+   },
+   {},
+};
+MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
+#endif
+
 static int omap_usb2_probe(struct platform_device *pdev)
 {
struct omap_usb *phy;
@@ -131,10 +156,16 @@ static int omap_usb2_probe(struct platform_device *pdev)
struct device_node *node = pdev-dev.of_node;
struct device_node *control_node;
struct platform_device *control_pdev;
+   const struct of_device_id *of_id;
+   struct usb_phy_data *phy_data;
+
+   of_id = of_match_device(of_match_ptr(omap_usb2_id_table), pdev-dev);
 
-   if (!node)
+   if (!of_id)
return -EINVAL;
 
+   phy_data = (struct usb_phy_data *)of_id-data;
+
phy = devm_kzalloc(pdev-dev, sizeof(*phy), GFP_KERNEL);
if (!phy) {
dev_err(pdev-dev, unable to allocate memory for USB2 PHY\n);
@@ -150,7 +181,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
phy-dev= pdev-dev;
 
phy-phy.dev= phy-dev;
-   phy-phy.label  = omap-usb2;
+   phy-phy.label  = phy_data-label;
phy-phy.otg= otg;
phy-phy.type   = USB_PHY_TYPE_USB2;
 
@@ -171,8 +202,10 @@ static int omap_usb2_probe(struct platform_device *pdev)
 
otg-set_host   = omap_usb_set_host;
otg-set_peripheral = omap_usb_set_peripheral;
-   otg-set_vbus   = omap_usb_set_vbus;
-   otg-start_srp  = omap_usb_start_srp;
+   if (phy_data-flags  OMAP_USB2_HAS_SET_VBUS)
+   otg-set_vbus   = omap_usb_set_vbus;
+   if (phy_data-flags  OMAP_USB2_HAS_START_SRP)
+   otg-start_srp  = omap_usb_start_srp;
otg-phy= phy-phy;
 
platform_set_drvdata(pdev, phy);
@@ -272,14 +305,6 @@ static const struct dev_pm_ops omap_usb2_pm_ops = {
 #define DEV_PM_OPS NULL
 #endif
 
-#ifdef CONFIG_OF
-static const struct of_device_id omap_usb2_id_table[] = {
-   { .compatible = ti,omap-usb2 },
-   {}
-};
-MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
-#endif
-
 static struct platform_driver omap_usb2_driver = {
.probe  = omap_usb2_probe,
.remove = omap_usb2_remove,
diff --git a/include/linux/phy/omap_usb.h b/include/linux/phy/omap_usb.h
index 19d343c3..35989a8 100644
--- a/include/linux/phy/omap_usb.h
+++ b/include/linux/phy/omap_usb.h
@@ -39,6 +39,15 @@ struct omap_usb {
struct clk  *optclk;
 };
 
+struct usb_phy_data {
+   const char *label;
+   u8 flags;
+};
+
+/* Driver Flags */
+#define OMAP_USB2_HAS_START_SRP (1  0)
+#define OMAP_USB2_HAS_SET_VBUS (1  1)
+
 #definephy_to_omapusb(x)   container_of((x), struct omap_usb, phy)
 
 #if defined(CONFIG_OMAP_USB2) || defined(CONFIG_OMAP_USB2_MODULE)
-- 
1.8.3.1

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[PATCH v2 3/3] phy: omap-usb2: Add different compatible for OMAP5

2014-03-06 Thread George Cherian
Add a new compatible for OMAP5 since it does not use any of the
OTG operations as of now.
HAS_SRP and SET_VBUS functionalities are used only for OMAP4.

Update the Documentation also to add new comaptible.

Signed-off-by: George Cherian george.cher...@ti.com
---
 Documentation/devicetree/bindings/usb/usb-phy.txt | 3 ++-
 drivers/phy/phy-omap-usb2.c   | 9 +
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt 
b/Documentation/devicetree/bindings/usb/usb-phy.txt
index 03de61a5..ec199a5 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -4,7 +4,8 @@ OMAP USB2 PHY
 
 Required properties:
  - compatible: Should be either of
-   * ti,omap-usb2 for OMAP4 and OMAP5
+   * ti,omap-usb2 for OMAP4
+   * ti,omap5-usb2 for OMAP5
* ti,dra7x-usb2 for DRA7
* ti,am437x-usb2 for AM437x
  - reg : Address and length of the register set for the device.
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index b220202..3cc4aba 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -154,6 +154,11 @@ static const struct usb_phy_data omap_usb2_data = {
.flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
 };
 
+static const struct usb_phy_data omap5_usb2_data = {
+   .label = omap5_usb2,
+   .flags = 0,
+};
+
 static const struct usb_phy_data dra7x_usb2_data = {
.label = dra7x_usb2,
.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
@@ -170,6 +175,10 @@ static const struct of_device_id omap_usb2_id_table[] = {
.data = omap_usb2_data,
},
{
+   .compatible = ti,omap5-usb2,
+   .data = omap5_usb2_data,
+   },
+   {
.compatible = ti,dra7x-usb2,
.data = dra7x_usb2_data,
},
-- 
1.8.3.1

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[PATCH v2 0/3] phy-omap-usb2 driver enhancements

2014-03-06 Thread George Cherian

This series 
* Adds suport for AM437x USB2 PHY driver
* Address DRA7 PHY errata for false disconnect
* New compatible for OMAP5

Changelog v1 - v2 
* Refreshed the whole series on top of linux-phy/next
* u32 flags changed to u8 flags in Patch1
* changed devm_request_and ioremap to devm_ioremap_resource in Patch2

Austin Beam (1):
  phy: omap-usb2: Provide workaround for USB2PHY false disconnect

George Cherian (2):
  phy: omap-usb2: Adapt phy-omap-usb2 for AM437x
  phy: omap-usb2: Add different compatible for OMAP5

 Documentation/devicetree/bindings/usb/usb-phy.txt |   6 +-
 drivers/phy/phy-omap-usb2.c   | 102 +++---
 include/linux/phy/omap_usb.h  |  13 +++
 3 files changed, 108 insertions(+), 13 deletions(-)

-- 
1.8.3.1

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Re: [PATCH 1/3] phy: omap-usb2: Adapt phy-omap-usb2 for AM437x

2014-03-06 Thread George Cherian

On 3/6/2014 4:43 PM, Kishon Vijay Abraham I wrote:

George,

On Monday 03 March 2014 03:40 PM, George Cherian wrote:

Adapt phy-omap-usb2 driver for AM437x.
- Add new comaptible ti,am437x-usb2 for AM437x
- Pass proper data to differentiate AM437x and others.
- AM437x doesnot support  set_vbus and start_srp.
- Also update the Documentation to add new compatible.

Signed-off-by: George Cherian george.cher...@ti.com
---
  Documentation/devicetree/bindings/usb/usb-phy.txt |  4 +-
  drivers/phy/phy-omap-usb2.c   | 49 
+--

  include/linux/usb/omap_usb.h  |  9 +
  3 files changed, 49 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt 
b/Documentation/devicetree/bindings/usb/usb-phy.txt

index c0245c8..b3fa409 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -3,7 +3,9 @@ USB PHY
  OMAP USB2 PHY

  Required properties:
- - compatible: Should be ti,omap-usb2
+ - compatible: Should be either of
+* ti,omap-usb2 for OMAP4, OMAP5, DRA7
+* ti,am437x-usb2 for AM437x
   - reg : Address and length of the register set for the device.
   - #phy-cells: determine the number of cells that should be given 
in the

 phandle while referencing this phy.
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index 7699752..d54f24b 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -144,6 +144,31 @@ static struct phy_ops ops = {
  .owner= THIS_MODULE,
  };

+#ifdef CONFIG_OF
+static const struct usb_phy_data omap_usb2_data = {
+.label = omap_usb2,
+.flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
+};
+
+static const struct usb_phy_data am437x_usb2_data = {
+.label = am437x_usb2,
+.flags =  0,
+};
+
+static const struct of_device_id omap_usb2_id_table[] = {
+{
+.compatible = ti,omap-usb2,
+.data = omap_usb2_data,
+},
+{
+.compatible = ti,am437x-usb2,
+.data = am437x_usb2_data,
+},
+{},
+};
+MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
+#endif
+
  static int omap_usb2_probe(struct platform_device *pdev)
  {
  struct omap_usb*phy;
@@ -153,10 +178,16 @@ static int omap_usb2_probe(struct 
platform_device *pdev)

  struct device_node *node = pdev-dev.of_node;
  struct device_node *control_node;
  struct platform_device *control_pdev;
+const struct of_device_id *of_id;
+struct usb_phy_data *phy_data;
+
+of_id = of_match_device(of_match_ptr(omap_usb2_id_table), 
pdev-dev);


-if (!node)
+if (!of_id)
  return -EINVAL;

+phy_data = (struct usb_phy_data *)of_id-data;
+
  phy = devm_kzalloc(pdev-dev, sizeof(*phy), GFP_KERNEL);
  if (!phy) {
  dev_err(pdev-dev, unable to allocate memory for USB2 
PHY\n);
@@ -172,7 +203,7 @@ static int omap_usb2_probe(struct platform_device 
*pdev)

  phy-dev= pdev-dev;

  phy-phy.dev= phy-dev;
-phy-phy.label= omap-usb2;
+phy-phy.label= phy_data-label;
  phy-phy.set_suspend= omap_usb2_suspend;
  phy-phy.otg= otg;
  phy-phy.type= USB_PHY_TYPE_USB2;
@@ -196,8 +227,10 @@ static int omap_usb2_probe(struct 
platform_device *pdev)


  otg-set_host= omap_usb_set_host;
  otg-set_peripheral= omap_usb_set_peripheral;
-otg-set_vbus= omap_usb_set_vbus;
-otg-start_srp= omap_usb_start_srp;
+if (phy_data-flags  OMAP_USB2_HAS_SET_VBUS)
+otg-set_vbus= omap_usb_set_vbus;
+if (phy_data-flags  OMAP_USB2_HAS_START_SRP)
+otg-start_srp= omap_usb_start_srp;
  otg-phy= phy-phy;

  platform_set_drvdata(pdev, phy);
@@ -297,14 +330,6 @@ static const struct dev_pm_ops omap_usb2_pm_ops = {
  #define DEV_PM_OPS NULL
  #endif

-#ifdef CONFIG_OF
-static const struct of_device_id omap_usb2_id_table[] = {
-{ .compatible = ti,omap-usb2 },
-{}
-};
-MODULE_DEVICE_TABLE(of, omap_usb2_id_table);
-#endif
-
  static struct platform_driver omap_usb2_driver = {
  .probe= omap_usb2_probe,
  .remove= omap_usb2_remove,
diff --git a/include/linux/usb/omap_usb.h b/include/linux/usb/omap_usb.h
index 6ae2936..034161d 100644
--- a/include/linux/usb/omap_usb.h
+++ b/include/linux/usb/omap_usb.h
@@ -42,6 +42,15 @@ struct omap_usb {
  u8is_suspended:1;
  };

+struct usb_phy_data {
+const char *label;
+u32 flags;


u8 should be sufficient no?

Can you also refresh the patch on linux-phy next?


Refreshed and sent v2

Thanks
Kishon



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[PATCH v2 2/3] phy: omap-usb2: Provide workaround for USB2PHY false disconnect

2014-03-06 Thread George Cherian
From: Austin Beam austinb...@ti.com

Enable the dra7x errata workaround for false disconnect problem
with USB2PHY. False disconnects were detected with some of the devices.
Reduce the sensitivity of the disconnect logic within the USB2PHY subsystem
to enusre these false disconnects are not registered.

[george.cher...@ti.com]
While at that, pass proper flags for each SoC's. This is a common driver
used across OMAP4,OMAP5,DRA7xx and AM437x USB2PHY.

False disconnect workaround is currently applicable for only DRA7x.

Update the Documentation also to add new comaptible.

Signed-off-by: Austin Beam austinb...@ti.com
Signed-off-by: George Cherian george.cher...@ti.com
Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
---
 Documentation/devicetree/bindings/usb/usb-phy.txt |  3 +-
 drivers/phy/phy-omap-usb2.c   | 44 +++
 include/linux/phy/omap_usb.h  |  4 +++
 3 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/usb-phy.txt 
b/Documentation/devicetree/bindings/usb/usb-phy.txt
index b3fa409..03de61a5 100644
--- a/Documentation/devicetree/bindings/usb/usb-phy.txt
+++ b/Documentation/devicetree/bindings/usb/usb-phy.txt
@@ -4,7 +4,8 @@ OMAP USB2 PHY
 
 Required properties:
  - compatible: Should be either of
-   * ti,omap-usb2 for OMAP4, OMAP5, DRA7
+   * ti,omap-usb2 for OMAP4 and OMAP5
+   * ti,dra7x-usb2 for DRA7
* ti,am437x-usb2 for AM437x
  - reg : Address and length of the register set for the device.
  - #phy-cells: determine the number of cells that should be given in the
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index 0c78f54..b220202 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -31,6 +31,9 @@
 #include linux/phy/phy.h
 #include linux/of_platform.h
 
+#define USB2PHY_DISCON_BYP_LATCH (1  31)
+#define USB2PHY_ANA_CONFIG1 0x4c
+
 /**
  * omap_usb2_set_comparator - links the comparator present in the sytem with
  * this phy
@@ -116,7 +119,30 @@ static int omap_usb_power_on(struct phy *x)
return 0;
 }
 
+static int omap_usb_init(struct phy *x)
+{
+   struct omap_usb *phy = phy_get_drvdata(x);
+   u32 val;
+
+   if (phy-flags  OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
+   /*
+*
+* Reduce the sensitivity of internal PHY by enabling the
+* DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
+* resolves issues with certain devices which can otherwise
+* be prone to false disconnects.
+*
+*/
+   val = omap_usb_readl(phy-phy_base, USB2PHY_ANA_CONFIG1);
+   val |= USB2PHY_DISCON_BYP_LATCH;
+   omap_usb_writel(phy-phy_base, USB2PHY_ANA_CONFIG1, val);
+   }
+
+   return 0;
+}
+
 static struct phy_ops ops = {
+   .init   = omap_usb_init,
.power_on   = omap_usb_power_on,
.power_off  = omap_usb_power_off,
.owner  = THIS_MODULE,
@@ -128,6 +154,11 @@ static const struct usb_phy_data omap_usb2_data = {
.flags = OMAP_USB2_HAS_START_SRP | OMAP_USB2_HAS_SET_VBUS,
 };
 
+static const struct usb_phy_data dra7x_usb2_data = {
+   .label = dra7x_usb2,
+   .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
+};
+
 static const struct usb_phy_data am437x_usb2_data = {
.label = am437x_usb2,
.flags =  0,
@@ -139,6 +170,10 @@ static const struct of_device_id omap_usb2_id_table[] = {
.data = omap_usb2_data,
},
{
+   .compatible = ti,dra7x-usb2,
+   .data = dra7x_usb2_data,
+   },
+   {
.compatible = ti,am437x-usb2,
.data = am437x_usb2_data,
},
@@ -151,6 +186,7 @@ static int omap_usb2_probe(struct platform_device *pdev)
 {
struct omap_usb *phy;
struct phy *generic_phy;
+   struct resource *res;
struct phy_provider *phy_provider;
struct usb_otg *otg;
struct device_node *node = pdev-dev.of_node;
@@ -185,6 +221,14 @@ static int omap_usb2_probe(struct platform_device *pdev)
phy-phy.otg= otg;
phy-phy.type   = USB_PHY_TYPE_USB2;
 
+   if (phy_data-flags  OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   phy-phy_base = devm_ioremap_resource(pdev-dev, res);
+   if (!phy-phy_base)
+   return -ENOMEM;
+   phy-flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;
+   }
+
control_node = of_parse_phandle(node, ctrl-module, 0);
if (!control_node) {
dev_err(pdev-dev, Failed to get control device phandle\n);
diff --git a/include/linux/phy/omap_usb.h b/include/linux/phy/omap_usb.h
index 35989a8..dc2c541 100644
--- a/include/linux/phy/omap_usb.h
+++ 

[PATCH v2 03/13] phy: omap-control: update dra7 and am437 usb2 bindings

2014-03-06 Thread Roger Quadros
The dra7-usb2 and am437-usb2 bindings have not yet been used.
Change them to be more elegant.

Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--
 drivers/phy/phy-omap-control.c   | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 5c5b1b0..28e674b 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -9,9 +9,9 @@ Required properties:
 e.g. USB2_PHY on OMAP5.
  ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
 e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-dra7-usb2 - if it has power down register like USB2 PHY on
 DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-am437-usb2 - if it has power down register like USB2 PHY on
 AM437 platform.
  - reg : Address and length of the register set for the device. It contains
the address of otghs_control for control-phy-otghs or power register
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
index 17fc200..a7e2d7f 100644
--- a/drivers/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -228,11 +228,11 @@ static const struct of_device_id 
omap_control_phy_id_table[] = {
.data = pipe3_data,
},
{
-   .compatible = ti,control-phy-dra7usb2,
+   .compatible = ti,control-phy-dra7-usb2,
.data = dra7usb2_data,
},
{
-   .compatible = ti,control-phy-am437usb2,
+   .compatible = ti,control-phy-am437-usb2,
.data = am437usb2_data,
},
{},
-- 
1.8.3.2

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[PATCH v2 08/13] phy: ti-pipe3: Fix suspend/resume and module reload

2014-03-06 Thread Roger Quadros
Due to Errata i783, SATA breaks if its DPLL is idled. The recommeded
workaround to issue a softreset to the SATA controller doesn't seem to
work. Here we just prevent SATA DPLL from Idling and hence avoid
the issue altogether.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/phy-ti-pipe3.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 12cc900..5913676 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -238,6 +238,10 @@ static int ti_pipe3_exit(struct phy *x)
u32 val;
unsigned long timeout;
 
+   /* SATA DPLL can't be powered down due to Errata i783 */
+   if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-sata))
+   return 0;
+
/* Put DPLL in IDLE mode */
val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
val |= PLL_IDLE;
-- 
1.8.3.2

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[PATCH v2 12/13] ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods

2014-03-06 Thread Roger Quadros
From: Nikhil Devshatwar nikhil...@ti.com

Add hwmods for ocp2scp3 and sata modules.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Nikhil Devshatwar nikhil...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 31 ++-
 1 file changed, 26 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 18f333c..3c9a430 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
 };
 
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
+
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+   .master = dra7xx_l4_cfg_hwmod,
+   .slave  = dra7xx_ocp2scp3_hwmod,
+   .clk= l4_root_clk_div,
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+   .name   = ocp2scp3,
+   .class  = dra7xx_ocp2scp_hwmod_class,
+   .clkdm_name = l3init_clkdm,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = 
DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+   .context_offs = 
DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_HWCTRL,
+   },
+   },
+};
+
 /*
  * 'qspi' class
  *
@@ -1268,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
 };
 
 /* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
-   { .role = ref_clk, .clk = sata_ref_clk },
-};
 
 static struct omap_hwmod dra7xx_sata_hwmod = {
.name   = sata,
@@ -1278,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.clkdm_name = l3init_clkdm,
.flags  = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk   = func_48m_fclk,
+   .mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.modulemode   = MODULEMODE_SWCTRL,
},
},
-   .opt_clks   = sata_opt_clks,
-   .opt_clks_cnt   = ARRAY_SIZE(sata_opt_clks),
 };
 
 /*
@@ -2683,6 +2703,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] 
__initdata = {
dra7xx_l4_per1__mmc4,
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
+   dra7xx_l4_cfg__ocp2scp3,
dra7xx_l3_main_1__qspi,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
-- 
1.8.3.2

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[PATCH v2 10/13] ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods

2014-03-06 Thread Roger Quadros
From: Keshava Munegowda keshava_mgo...@ti.com

Create hwmods for ocp2scp3 and sata modules.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
CC: Paul Walmsley p...@pwsan.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 73 ++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index e297d62..227a69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1726,6 +1726,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
},
 };
 
+/*
+ * 'ocp2scp' class
+ * bridge to transform ocp interface protocol to scp (serial control port)
+ * protocol
+ */
+/* ocp2scp3 */
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
+   .master = omap54xx_l4_cfg_hwmod,
+   .slave  = omap54xx_ocp2scp3_hwmod,
+   .clk= l4_root_clk_div,
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
+   .name   = ocp2scp3,
+   .class  = omap54xx_ocp2scp_hwmod_class,
+   .clkdm_name = l3init_clkdm,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = 
OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+   .context_offs = 
OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_HWCTRL,
+   },
+   },
+};
+
+/*
+ * 'sata' class
+ * sata:  serial ata interface  gen2 compliant   ( 1 rx/ 1 tx)
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
+   .sysc_offs  = 0x,
+   .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+  SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+   .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
+   .name   = sata,
+   .sysc   = omap54xx_sata_sysc,
+};
+
+/* sata */
+static struct omap_hwmod omap54xx_sata_hwmod = {
+   .name   = sata,
+   .class  = omap54xx_sata_hwmod_class,
+   .clkdm_name = l3init_clkdm,
+   .flags  = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+   .main_clk   = func_48m_fclk,
+   .mpu_rt_idx = 1,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
+   .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_SWCTRL,
+   },
+   },
+};
+
+/* l4_cfg - sata */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
+   .master = omap54xx_l4_cfg_hwmod,
+   .slave  = omap54xx_sata_hwmod,
+   .clk= l3_iclk_div,
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
 
 /*
  * Interfaces
@@ -2399,6 +2470,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] 
__initdata = {
omap54xx_l4_cfg__usb_tll_hs,
omap54xx_l4_cfg__usb_otg_ss,
omap54xx_l4_wkup__wd_timer2,
+   omap54xx_l4_cfg__ocp2scp3,
+   omap54xx_l4_cfg__sata,
NULL,
 };
 
-- 
1.8.3.2

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[PATCH v2 09/13] phy: omap: Depend on OMAP_OCP2SCP bus driver

2014-03-06 Thread Roger Quadros
The OMAP_USB2 and OMAP_PIPE3 PHY devices will not be
detected if the OMAP_OCP2SCP bus driver is not present.
Make them depend on it.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fe8c009..2aead8b 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -47,6 +47,7 @@ config OMAP_USB2
depends on USB_PHY
select GENERIC_PHY
select OMAP_CONTROL_PHY
+   depends on OMAP_OCP2SCP
help
  Enable this to support the transceiver that is part of SOC. This
  driver takes care of all the PHY functionality apart from comparator.
@@ -58,6 +59,7 @@ config TI_PIPE3
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
select OMAP_CONTROL_PHY
+   depends on OMAP_OCP2SCP
help
  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  driver takes care of all the PHY functionality apart from comparator.
-- 
1.8.3.2

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[PATCH v2 11/13] ARM: dts: omap5: add sata node

2014-03-06 Thread Roger Quadros
From: Balaji T K balaj...@ti.com

Add support for sata.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/omap5.dtsi | 40 
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index e47601a..b398cff 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -828,6 +828,46 @@
 
#thermal-sensor-cells = 1;
};
+
+   omap_control_sata: control-phy@4a002374 {
+   compatible = ti,control-phy-pipe3;
+   reg = 0x4a002374 0x4;
+   reg-names = power;
+   clocks = sys_clkin;
+   clock-names = sysclk;
+   };
+
+   /* OCP2SCP3 */
+   ocp2scp@4a09 {
+   compatible = ti,omap-ocp2scp;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x4a09 0x20;
+   ranges;
+   ti,hwmods = ocp2scp3;
+   sata_phy: phy@4a096000 {
+   compatible = ti,phy-pipe3-sata;
+   reg = 0x4A096000 0x80, /* phy_rx */
+ 0x4A096400 0x64, /* phy_tx */
+ 0x4A096800 0x40; /* pll_ctrl */
+   reg-names = phy_rx, phy_tx, pll_ctrl;
+   ctrl-module = omap_control_sata;
+   clocks = sys_clkin;
+   clock-names = sysclk;
+   #phy-cells = 0;
+   };
+   };
+
+   sata: sata@4a141100 {
+   compatible = snps,dwc-ahci;
+   reg = 0x4a14 0x1100, 0x4a141100 0x7;
+   interrupts = GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH;
+   phys = sata_phy;
+   phy-names = sata-phy;
+   clocks = sata_ref_clk;
+   ti,hwmods = sata;
+   };
+
};
 };
 
-- 
1.8.3.2

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[PATCH v2 13/13] ARM: dts: dra7: add OCP2SCP3 and SATA nodes

2014-03-06 Thread Roger Quadros
From: Balaji T K balaj...@ti.com

Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/dra7.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9e3caf3..597979b 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -772,6 +772,45 @@
dma-names = tx0, rx0;
status = disabled;
};
+
+   omap_control_sata: control-phy@4a002374 {
+   compatible = ti,control-phy-pipe3;
+   reg = 0x4a002374 0x4;
+   reg-names = power;
+   clocks = sys_clkin1;
+   clock-names = sysclk;
+   };
+
+   /* OCP2SCP3 */
+   ocp2scp@4a09 {
+   compatible = ti,omap-ocp2scp;
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges;
+   reg = 0x4a09 0x20;
+   ti,hwmods = ocp2scp3;
+   sata_phy: phy@4A096000 {
+   compatible = ti,phy-pipe3-sata;
+   reg = 0x4A096000 0x80, /* phy_rx */
+ 0x4A096400 0x64, /* phy_tx */
+ 0x4A096800 0x40; /* pll_ctrl */
+   reg-names = phy_rx, phy_tx, pll_ctrl;
+   ctrl-module = omap_control_sata;
+   clocks = sys_clkin1;
+   clock-names = sysclk;
+   #phy-cells = 0;
+   };
+   };
+
+   sata: sata@4a141100 {
+   compatible = snps,dwc-ahci;
+   reg = 0x4a14 0x1100, 0x4a141100 0x7;
+   interrupts = GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH;
+   phys = sata_phy;
+   phy-names = sata-phy;
+   clocks = sata_ref_clk;
+   ti,hwmods = sata;
+   };
};
 };
 
-- 
1.8.3.2

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[PATCH v2 05/13] phy: ti-pipe3: Add SATA DPLL support

2014-03-06 Thread Roger Quadros
USB and SATA DPLLs need different settings. Provide
the SATA DPLL settings and use the proper DPLL settings
based on device tree node's compatible_id.

Update the DT binding information.

Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt |  3 +-
 drivers/phy/phy-ti-pipe3.c   | 76 +---
 2 files changed, 57 insertions(+), 22 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 8d13349..2c2d66a 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -53,7 +53,8 @@ usb2phy@4a0ad080 {
 TI PIPE3 PHY
 
 Required properties:
- - compatible: Should be ti,phy-usb3. ti,omap-usb3 is deprecated.
+ - compatible: Should be ti,phy-usb3 or ti,phy-pipe3-sata.
+   ti,omap-usb3 is deprecated.
  - reg : Address and length of the register set for the device.
  - reg-names: The names of the register addresses corresponding to the 
registers
filled in reg.
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 211703c..f141237 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -66,6 +66,11 @@ struct pipe3_dpll_params {
u32 mf;
 };
 
+struct pipe3_dpll_map {
+   unsigned long rate;
+   struct pipe3_dpll_params params;
+};
+
 struct ti_pipe3 {
void __iomem*pll_ctrl_base;
struct device   *dev;
@@ -73,20 +78,27 @@ struct ti_pipe3 {
struct clk  *wkupclk;
struct clk  *sys_clk;
struct clk  *refclk;
+   struct pipe3_dpll_map   *dpll_map;
 };
 
-struct pipe3_dpll_map {
-   unsigned long rate;
-   struct pipe3_dpll_params params;
-};
-
-static struct pipe3_dpll_map dpll_map[] = {
+static struct pipe3_dpll_map dpll_map_usb[] = {
{1200, {1250, 5, 4, 20, 0} },   /* 12 MHz */
{1680, {3125, 20, 4, 20, 0} },  /* 16.8 MHz */
{1920, {1172, 8, 4, 20, 65537} },   /* 19.2 MHz */
{2000, {1000, 7, 4, 10, 0} },   /* 20 MHz */
{2600, {1250, 12, 4, 20, 0} },  /* 26 MHz */
{3840, {3125, 47, 4, 20, 92843} },  /* 38.4 MHz */
+   { },/* Terminator */
+};
+
+static struct pipe3_dpll_map dpll_map_sata[] = {
+   {1200, {1000, 7, 4, 6, 0} },/* 12 MHz */
+   {1680, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
+   {1920, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
+   {2000, {600, 7, 4, 6, 0} }, /* 20 MHz */
+   {2600, {461, 7, 4, 6, 0} }, /* 26 MHz */
+   {3840, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
+   { },/* Terminator */
 };
 
 static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
@@ -100,15 +112,20 @@ static inline void ti_pipe3_writel(void __iomem *addr, 
unsigned offset,
__raw_writel(data, addr + offset);
 }
 
-static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
+static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
 {
-   int i;
+   unsigned long rate;
+   struct pipe3_dpll_map *dpll_map = phy-dpll_map;
 
-   for (i = 0; i  ARRAY_SIZE(dpll_map); i++) {
-   if (rate == dpll_map[i].rate)
-   return dpll_map[i].params;
+   rate = clk_get_rate(phy-sys_clk);
+
+   for (; dpll_map-rate; dpll_map++) {
+   if (rate == dpll_map-rate)
+   return dpll_map-params;
}
 
+   dev_err(phy-dev, No DPLL configuration for %lu Hz SYS CLK\n, rate);
+
return NULL;
 }
 
@@ -182,16 +199,11 @@ static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
 static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
 {
u32 val;
-   unsigned long   rate;
struct pipe3_dpll_params *dpll_params;
 
-   rate = clk_get_rate(phy-sys_clk);
-   dpll_params = ti_pipe3_get_dpll_params(rate);
-   if (!dpll_params) {
-   dev_err(phy-dev,
- No DPLL configuration for %lu Hz SYS CLK\n, rate);
+   dpll_params = ti_pipe3_get_dpll_params(phy);
+   if (!dpll_params)
return -EINVAL;
-   }
 
val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION1);
val = ~PLL_REGN_MASK;
@@ -244,6 +256,10 @@ static struct phy_ops ops = {
.owner  = THIS_MODULE,
 };
 
+#ifdef CONFIG_OF
+static const struct of_device_id ti_pipe3_id_table[];
+#endif
+
 static int ti_pipe3_probe(struct platform_device *pdev)
 {
struct ti_pipe3 *phy;
@@ -253,8 +269,10 @@ static int ti_pipe3_probe(struct platform_device *pdev)
struct device_node *node = pdev-dev.of_node;
struct device_node *control_node;
struct platform_device *control_pdev;
+   

[PATCH v2 04/13] phy: ti-pipe3: cleanup clock handling

2014-03-06 Thread Roger Quadros
As this driver is no longer USB specific, use generic clock names.
- Use 'wkupclk', 'sysclk' and 'refclk' clock-names. Update DT binding info.
- Fix PLL_SD_SHIFT from 9 to 10
- Don't separate prepare/unprepare clock from enable/disable. This
ensures optimal power savings.

Update omap5 usb3_phy device tree node.

CC: Benoît Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt | 12 ++
 arch/arm/boot/dts/omap5.dtsi |  7 ++-
 drivers/phy/phy-ti-pipe3.c   | 55 
 3 files changed, 46 insertions(+), 28 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 28e674b..8d13349 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -59,6 +59,12 @@ Required properties:
filled in reg.
  - #phy-cells: determine the number of cells that should be given in the
phandle while referencing this phy.
+ - clocks: a list of phandles and clock-specifier pairs, one for each entry in
+   clock-names.
+ - clock-names: should include:
+   * wkupclk - wakup clock.
+   * sysclk - system clock.
+   * refclk - reference clock.
 
 Optional properties:
  - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -74,4 +80,10 @@ usb3phy@4a084400 {
reg-names = phy_rx, phy_tx, pll_ctrl;
ctrl-module = omap_control_usb;
#phy-cells = 0;
+   clocks = usb_phy_cm_clk32k,
+sys_clkin,
+usb_otg_ss_refclk960m;
+   clock-names =   wkupclk,
+   sysclk,
+   refclk;
 };
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 859a800..e47601a 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -778,7 +778,12 @@
  0x4a084800 0x64,
  0x4a084c00 0x40;
reg-names = phy_rx, phy_tx, pll_ctrl;
-   ctrl-module = omap_control_usb3phy;
+   clocks = usb_phy_cm_clk32k,
+sys_clkin,
+usb_otg_ss_refclk960m;
+   clock-names =   wkupclk,
+   sysclk,
+   refclk;
#phy-cells = 0;
};
};
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index fd029b1..211703c 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -45,7 +45,7 @@
 #definePLL_SELFREQDCO_MASK 0x000E
 #definePLL_SELFREQDCO_SHIFT0x1
 #definePLL_SD_MASK 0x0003FC00
-#definePLL_SD_SHIFT0x9
+#definePLL_SD_SHIFT10
 #defineSET_PLL_GO  0x1
 #definePLL_TICOPWDN0x1
 #definePLL_LOCK0x2
@@ -72,7 +72,7 @@ struct ti_pipe3 {
struct device   *control_dev;
struct clk  *wkupclk;
struct clk  *sys_clk;
-   struct clk  *optclk;
+   struct clk  *refclk;
 };
 
 struct pipe3_dpll_map {
@@ -270,23 +270,21 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
phy-dev= pdev-dev;
 
-   phy-wkupclk = devm_clk_get(phy-dev, usb_phy_cm_clk32k);
+   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
if (IS_ERR(phy-wkupclk)) {
-   dev_err(pdev-dev, unable to get usb_phy_cm_clk32k\n);
+   dev_err(pdev-dev, unable to get wkupclk\n);
return PTR_ERR(phy-wkupclk);
}
-   clk_prepare(phy-wkupclk);
 
-   phy-optclk = devm_clk_get(phy-dev, usb_otg_ss_refclk960m);
-   if (IS_ERR(phy-optclk)) {
-   dev_err(pdev-dev, unable to get usb_otg_ss_refclk960m\n);
-   return PTR_ERR(phy-optclk);
+   phy-refclk = devm_clk_get(phy-dev, refclk);
+   if (IS_ERR(phy-refclk)) {
+   dev_err(pdev-dev, unable to get refclk\n);
+   return PTR_ERR(phy-refclk);
}
-   clk_prepare(phy-optclk);
 
-   phy-sys_clk = devm_clk_get(phy-dev, sys_clkin);
+   phy-sys_clk = devm_clk_get(phy-dev, sysclk);
if (IS_ERR(phy-sys_clk)) {
-   pr_err(%s: unable to get sys_clkin\n, __func__);
+   dev_err(pdev-dev, unable to get sysclk\n);
return -EINVAL;
}
 
@@ -326,10 +324,6 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
 static int ti_pipe3_remove(struct platform_device *pdev)
 {
-   struct ti_pipe3 *phy = platform_get_drvdata(pdev);
-
-   

[PATCH v2 07/13] phy: ti-pipe3: streamline PHY operations

2014-03-06 Thread Roger Quadros
Limit .power_on() and .power_off() to just control the
PHY power and not the DPLL. The DPLL will be enabled
in .init() and idled in .exit().

Don't reprogram the DPLL if it has been already locked
by the bootloader. This fixes a problem with SATA, where
it fails if SATA was used by the bootloader.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/phy-ti-pipe3.c | 114 +
 1 file changed, 63 insertions(+), 51 deletions(-)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index baa3f78d..12cc900 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -47,7 +47,8 @@
 #definePLL_SD_MASK 0x0003FC00
 #definePLL_SD_SHIFT10
 #defineSET_PLL_GO  0x1
-#definePLL_TICOPWDN0x1
+#define PLL_LDOPWDNBIT(15)
+#define PLL_TICOPWDN   BIT(16)
 #definePLL_LOCK0x2
 #definePLL_IDLE0x1
 
@@ -56,7 +57,8 @@
  * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
  * to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
  */
-# define PLL_IDLE_TIME  100;
+#define PLL_IDLE_TIME  100 /* in milliseconds */
+#define PLL_LOCK_TIME  100 /* in milliseconds */
 
 struct pipe3_dpll_params {
u16 m;
@@ -132,24 +134,6 @@ static struct pipe3_dpll_params 
*ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
 static int ti_pipe3_power_off(struct phy *x)
 {
struct ti_pipe3 *phy = phy_get_drvdata(x);
-   int val;
-   int timeout = PLL_IDLE_TIME;
-
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
-   val |= PLL_IDLE;
-   ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION2, val);
-
-   do {
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_STATUS);
-   if (val  PLL_TICOPWDN)
-   break;
-   udelay(5);
-   } while (--timeout);
-
-   if (!timeout) {
-   dev_err(phy-dev, power off failed\n);
-   return -EBUSY;
-   }
 
omap_control_phy_power(phy-control_dev, 0);
 
@@ -159,44 +143,34 @@ static int ti_pipe3_power_off(struct phy *x)
 static int ti_pipe3_power_on(struct phy *x)
 {
struct ti_pipe3 *phy = phy_get_drvdata(x);
-   int val;
-   int timeout = PLL_IDLE_TIME;
-
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
-   val = ~PLL_IDLE;
-   ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION2, val);
 
-   do {
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_STATUS);
-   if (!(val  PLL_TICOPWDN))
-   break;
-   udelay(5);
-   } while (--timeout);
-
-   if (!timeout) {
-   dev_err(phy-dev, power on failed\n);
-   return -EBUSY;
-   }
+   omap_control_phy_power(phy-control_dev, 1);
 
return 0;
 }
 
-static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
+static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)
 {
u32 val;
unsigned long   timeout;
 
-   ti_pipe3_writel(phy-pll_ctrl_base, PLL_GO, SET_PLL_GO);
-
-   timeout = jiffies + msecs_to_jiffies(20);
+   timeout = jiffies + msecs_to_jiffies(PLL_LOCK_TIME);
do {
+   cpu_relax();
val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_STATUS);
if (val  PLL_LOCK)
break;
-   } while (!WARN_ON(time_after(jiffies, timeout)));
+   } while (!time_after(jiffies, timeout));
+
+   if (!(val  PLL_LOCK)) {
+   dev_err(phy-dev, DPLL failed to lock\n);
+   return -EBUSY;
+   }
+
+   return 0;
 }
 
-static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
+static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)
 {
u32 val;
struct pipe3_dpll_params *dpll_params;
@@ -230,27 +204,65 @@ static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
val |= dpll_params-sd  PLL_SD_SHIFT;
ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION3, val);
 
-   ti_pipe3_dpll_relock(phy);
+   ti_pipe3_writel(phy-pll_ctrl_base, PLL_GO, SET_PLL_GO);
 
-   return 0;
+   return ti_pipe3_dpll_wait_lock(phy);
 }
 
 static int ti_pipe3_init(struct phy *x)
 {
struct ti_pipe3 *phy = phy_get_drvdata(x);
-   int ret;
+   u32 val;
+   int ret = 0;
 
-   ret = ti_pipe3_dpll_lock(phy);
-   if (ret)
-   return ret;
+   /* Bring it out of IDLE if it is IDLE */
+   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
+   if (val  PLL_IDLE) {
+   val = ~PLL_IDLE;
+   ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION2, val);
+   ret = ti_pipe3_dpll_wait_lock(phy);
+   }
 
-   omap_control_phy_power(phy-control_dev, 1);
+   /* Program the DPLL only if not locked */
+   val = 

[PATCH v2 00/13] ARM: OMAP: SATA support for OMAP5 DRA7

2014-03-06 Thread Roger Quadros
Hi,

This series adds SATA support for OMAP5 uevm and DRA7-evm boards.

- Cleans up the ti-pipe3 PHY driver
- Adds SATA DPLL support to ti-pipe3 PHY driver
- Adds SATA nodes to hwmod and SoC DT data

Patches are based on 3.14-rc4 with balbi/next, linux-phy/next and
omap-for-v3.15/dt merged on top..

To test SATA you will also need [1].

[1] - http://article.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7285

Changelog:

v2
- use 'depends on' instead of 'select' OCP2SCP bus driver.
- Changed DT bindings for dra7-usb2 and am437-usb2 phy.

cheers,
-roger

---
Balaji T K (2):
  ARM: dts: omap5: add sata node
  ARM: dts: dra7: add OCP2SCP3 and SATA nodes

Keshava Munegowda (1):
  ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods

Kishon Vijay Abraham I (1):
  phy: rename struct omap_control_usb to struct omap_control_phy

Nikhil Devshatwar (1):
  ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods

Roger Quadros (8):
  phy: omap-control: Update DT binding information
  phy: omap-control: update dra7 and am437 usb2 bindings
  phy: ti-pipe3: cleanup clock handling
  phy: ti-pipe3: Add SATA DPLL support
  phy: ti-pipe3: Don't get 'wkupclk' and 'refclk' for SATA PHY
  phy: ti-pipe3: streamline PHY operations
  phy: ti-pipe3: Fix suspend/resume and module reload
  phy: omap: Depend on OMAP_OCP2SCP bus driver

 Documentation/devicetree/bindings/phy/ti-phy.txt   |  40 ++-
 Documentation/devicetree/bindings/usb/omap-usb.txt |  24 --
 arch/arm/boot/dts/dra7.dtsi|  39 +++
 arch/arm/boot/dts/omap5.dtsi   |  47 ++-
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c |  73 +
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c  |  31 +-
 drivers/phy/Kconfig|  16 +-
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-omap-control.c | 320 +
 drivers/phy/phy-omap-usb2.c|   8 +-
 drivers/phy/phy-ti-pipe3.c | 269 ++---
 drivers/usb/musb/omap2430.c|   2 +-
 drivers/usb/phy/Kconfig|  10 -
 drivers/usb/phy/Makefile   |   1 -
 drivers/usb/phy/phy-omap-control.c | 319 
 include/linux/phy/omap_control_phy.h   |  89 ++
 include/linux/usb/omap_control_usb.h   |  89 --
 17 files changed, 815 insertions(+), 563 deletions(-)
 create mode 100644 drivers/phy/phy-omap-control.c
 delete mode 100644 drivers/usb/phy/phy-omap-control.c
 create mode 100644 include/linux/phy/omap_control_phy.h
 delete mode 100644 include/linux/usb/omap_control_usb.h

-- 
1.8.3.2

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[PATCH v2 01/13] phy: rename struct omap_control_usb to struct omap_control_phy

2014-03-06 Thread Roger Quadros
From: Kishon Vijay Abraham I kis...@ti.com

Rename struct omap_control_usb to struct omap_control_phy since it can
be used to control PHY of USB, SATA and PCIE. Also move the driver and
include files under *phy* and made the corresponding changes in the users
of phy-omap-control.

Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/Kconfig  |  14 +-
 drivers/phy/Makefile |   1 +
 drivers/phy/phy-omap-control.c   | 320 +++
 drivers/phy/phy-omap-usb2.c  |   8 +-
 drivers/phy/phy-ti-pipe3.c   |   8 +-
 drivers/usb/musb/omap2430.c  |   2 +-
 drivers/usb/phy/Kconfig  |  10 --
 drivers/usb/phy/Makefile |   1 -
 drivers/usb/phy/phy-omap-control.c   | 319 --
 include/linux/phy/omap_control_phy.h |  89 ++
 include/linux/usb/omap_control_usb.h |  89 --
 11 files changed, 431 insertions(+), 430 deletions(-)
 create mode 100644 drivers/phy/phy-omap-control.c
 delete mode 100644 drivers/usb/phy/phy-omap-control.c
 create mode 100644 include/linux/phy/omap_control_phy.h
 delete mode 100644 include/linux/usb/omap_control_usb.h

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 1b607d7..fe8c009 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -31,12 +31,22 @@ config PHY_MVEBU_SATA
depends on OF
select GENERIC_PHY
 
+config OMAP_CONTROL_PHY
+   tristate OMAP CONTROL PHY Driver
+   help
+ Enable this to add support for the PHY part present in the control
+ module. This driver has API to power on the USB2 PHY and to write to
+ the mailbox. The mailbox is present only in omap4 and the register to
+ power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
+ additional register to power on USB3 PHY/SATA PHY/PCIE PHY
+ (PIPE3 PHY).
+
 config OMAP_USB2
tristate OMAP USB2 PHY Driver
depends on ARCH_OMAP2PLUS
depends on USB_PHY
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the transceiver that is part of SOC. This
  driver takes care of all the PHY functionality apart from comparator.
@@ -47,7 +57,7 @@ config TI_PIPE3
tristate TI PIPE3 PHY Driver
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  driver takes care of all the PHY functionality apart from comparator.
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ecf0d3f..8da05a8 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
 obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)  += phy-exynos-dp-video.o
 obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)+= phy-exynos-mipi-video.o
 obj-$(CONFIG_PHY_MVEBU_SATA)   += phy-mvebu-sata.o
+obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
 obj-$(CONFIG_TWL4030_USB)  += phy-twl4030-usb.o
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
new file mode 100644
index 000..17fc200
--- /dev/null
+++ b/drivers/phy/phy-omap-control.c
@@ -0,0 +1,320 @@
+/*
+ * omap-control-phy.c - The PHY part of control module.
+ *
+ * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Author: Kishon Vijay Abraham I kis...@ti.com
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include linux/module.h
+#include linux/platform_device.h
+#include linux/slab.h
+#include linux/of.h
+#include linux/of_device.h
+#include linux/err.h
+#include linux/io.h
+#include linux/clk.h
+#include linux/phy/omap_control_phy.h
+
+/**
+ * omap_control_phy_power - power on/off the phy using control module reg
+ * @dev: the control module device
+ * @on: 0 or 1, based on powering on or off the PHY
+ */
+void omap_control_phy_power(struct device *dev, int on)
+{
+   u32 val;
+   unsigned long rate;
+   struct omap_control_phy *control_phy;
+
+   if (IS_ERR(dev) || !dev) {
+   pr_err(%s: invalid device\n, __func__);
+   return;
+   }
+
+   

[PATCH v2 02/13] phy: omap-control: Update DT binding information

2014-03-06 Thread Roger Quadros
Move omap-control binding information to the right location.

Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt   | 25 ++
 Documentation/devicetree/bindings/usb/omap-usb.txt | 24 -
 2 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index f671163..5c5b1b0 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -1,5 +1,30 @@
 TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
 
+OMAP CONTROL PHY
+
+Required properties:
+ - compatible: Should be one of
+ ti,control-phy-otghs - if it has otghs_control mailbox register as on OMAP4.
+ ti,control-phy-usb2 - if it has Power down bit in control_dev_conf register
+e.g. USB2_PHY on OMAP5.
+ ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
+e.g. USB3 PHY and SATA PHY on OMAP5.
+ ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+DRA7 platform.
+ ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+AM437 platform.
+ - reg : Address and length of the register set for the device. It contains
+   the address of otghs_control for control-phy-otghs or power register
+   for other types.
+ - reg-names: should be otghs_control control-phy-otghs and power for
+   other types.
+
+omap_control_usb: omap-control-usb@4a002300 {
+compatible = ti,control-phy-otghs;
+reg = 0x4a00233c 0x4;
+reg-names = otghs_control;
+};
+
 OMAP USB2 PHY
 
 Required properties:
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt 
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index c495135..38b2fae 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -76,27 +76,3 @@ omap_dwc3 {
ranges;
 };
 
-OMAP CONTROL USB
-
-Required properties:
- - compatible: Should be one of
- ti,control-phy-otghs - if it has otghs_control mailbox register as on OMAP4.
- ti,control-phy-usb2 - if it has Power down bit in control_dev_conf register
-   e.g. USB2_PHY on OMAP5.
- ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
-   e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
-   DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
-   AM437 platform.
- - reg : Address and length of the register set for the device. It contains
-   the address of otghs_control for control-phy-otghs or power register
-   for other types.
- - reg-names: should be otghs_control control-phy-otghs and power for
-   other types.
-
-omap_control_usb: omap-control-usb@4a002300 {
-   compatible = ti,control-phy-otghs;
-   reg = 0x4a00233c 0x4;
-   reg-names = otghs_control;
-};
-- 
1.8.3.2

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Re: [PATCH v2 00/13] ARM: OMAP: SATA support for OMAP5 DRA7

2014-03-06 Thread Roger Quadros
On 03/06/2014 04:22 PM, Roger Quadros wrote:
 Hi,
 
 This series adds SATA support for OMAP5 uevm and DRA7-evm boards.
 
 - Cleans up the ti-pipe3 PHY driver
 - Adds SATA DPLL support to ti-pipe3 PHY driver
 - Adds SATA nodes to hwmod and SoC DT data
 
 Patches are based on 3.14-rc4 with balbi/next, linux-phy/next and
 omap-for-v3.15/dt merged on top..
 
 To test SATA you will also need [1].
 
 [1] - http://article.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7285
 
 Changelog:
 
 v2
 - use 'depends on' instead of 'select' OCP2SCP bus driver.
 - Changed DT bindings for dra7-usb2 and am437-usb2 phy.
 
 cheers,
 -roger
 
 ---
 Balaji T K (2):
   ARM: dts: omap5: add sata node
   ARM: dts: dra7: add OCP2SCP3 and SATA nodes
 
 Keshava Munegowda (1):
   ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods
 
 Kishon Vijay Abraham I (1):
   phy: rename struct omap_control_usb to struct omap_control_phy
 
 Nikhil Devshatwar (1):
   ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods
 
 Roger Quadros (8):
   phy: omap-control: Update DT binding information
   phy: omap-control: update dra7 and am437 usb2 bindings
   phy: ti-pipe3: cleanup clock handling
   phy: ti-pipe3: Add SATA DPLL support
   phy: ti-pipe3: Don't get 'wkupclk' and 'refclk' for SATA PHY
   phy: ti-pipe3: streamline PHY operations
   phy: ti-pipe3: Fix suspend/resume and module reload
   phy: omap: Depend on OMAP_OCP2SCP bus driver
 
  Documentation/devicetree/bindings/phy/ti-phy.txt   |  40 ++-
  Documentation/devicetree/bindings/usb/omap-usb.txt |  24 --
  arch/arm/boot/dts/dra7.dtsi|  39 +++
  arch/arm/boot/dts/omap5.dtsi   |  47 ++-
  arch/arm/mach-omap2/omap_hwmod_54xx_data.c |  73 +
  arch/arm/mach-omap2/omap_hwmod_7xx_data.c  |  31 +-
  drivers/phy/Kconfig|  16 +-
  drivers/phy/Makefile   |   1 +
  drivers/phy/phy-omap-control.c | 320 
 +
  drivers/phy/phy-omap-usb2.c|   8 +-
  drivers/phy/phy-ti-pipe3.c | 269 ++---
  drivers/usb/musb/omap2430.c|   2 +-
  drivers/usb/phy/Kconfig|  10 -
  drivers/usb/phy/Makefile   |   1 -
  drivers/usb/phy/phy-omap-control.c | 319 
  include/linux/phy/omap_control_phy.h   |  89 ++
  include/linux/usb/omap_control_usb.h   |  89 --
  17 files changed, 815 insertions(+), 563 deletions(-)
  create mode 100644 drivers/phy/phy-omap-control.c
  delete mode 100644 drivers/usb/phy/phy-omap-control.c
  create mode 100644 include/linux/phy/omap_control_phy.h
  delete mode 100644 include/linux/usb/omap_control_usb.h
 
oops. forgot to add -M :(.

I'll resend just the 1st patch since it contains the file rename.
updated diffstat is below.

 Documentation/devicetree/bindings/phy/ti-phy.txt   |  40 ++-
 Documentation/devicetree/bindings/usb/omap-usb.txt |  24 --
 arch/arm/boot/dts/dra7.dtsi|  39 +++
 arch/arm/boot/dts/omap5.dtsi   |  47 +++-
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c |  73 ++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c  |  31 ++-
 drivers/phy/Kconfig|  16 +-
 drivers/phy/Makefile   |   1 +
 drivers/{usb = }/phy/phy-omap-control.c   | 169 ++---
 drivers/phy/phy-omap-usb2.c|   8 +-
 drivers/phy/phy-ti-pipe3.c | 269 +
 drivers/usb/musb/omap2430.c|   2 +-
 drivers/usb/phy/Kconfig|  10 -
 drivers/usb/phy/Makefile   |   1 -
 .../omap_control_usb.h = phy/omap_control_phy.h}  |  36 +--
 15 files changed, 509 insertions(+), 257 deletions(-)
 rename drivers/{usb = }/phy/phy-omap-control.c (53%)
 rename include/linux/{usb/omap_control_usb.h = phy/omap_control_phy.h} (68%)

cheers,
-roger
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[PATCH v2 06/13] phy: ti-pipe3: Don't get 'wkupclk' and 'refclk' for SATA PHY

2014-03-06 Thread Roger Quadros
SATA PHY doesn't need 'wkupclk; and 'refclk' so don't
try to get them for SATA PHY.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/phy-ti-pipe3.c | 24 +++-
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index f141237..baa3f78d 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -294,16 +294,22 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
phy-dev= pdev-dev;
 
-   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
-   if (IS_ERR(phy-wkupclk)) {
-   dev_err(pdev-dev, unable to get wkupclk\n);
-   return PTR_ERR(phy-wkupclk);
-   }
+   if (!of_device_is_compatible(node, ti,phy-pipe3-sata)) {
+
+   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
+   if (IS_ERR(phy-wkupclk)) {
+   dev_err(pdev-dev, unable to get wkupclk\n);
+   return PTR_ERR(phy-wkupclk);
+   }
 
-   phy-refclk = devm_clk_get(phy-dev, refclk);
-   if (IS_ERR(phy-refclk)) {
-   dev_err(pdev-dev, unable to get refclk\n);
-   return PTR_ERR(phy-refclk);
+   phy-refclk = devm_clk_get(phy-dev, refclk);
+   if (IS_ERR(phy-refclk)) {
+   dev_err(pdev-dev, unable to get refclk\n);
+   return PTR_ERR(phy-refclk);
+   }
+   } else {
+   phy-wkupclk = ERR_PTR(-ENODEV);
+   phy-refclk = ERR_PTR(-ENODEV);
}
 
phy-sys_clk = devm_clk_get(phy-dev, sysclk);
-- 
1.8.3.2

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[PATCH v2 01/13][RESEND] phy: rename struct omap_control_usb to struct omap_control_phy

2014-03-06 Thread Roger Quadros
From: Kishon Vijay Abraham I kis...@ti.com

Rename struct omap_control_usb to struct omap_control_phy since it can
be used to control PHY of USB, SATA and PCIE. Also move the driver and
include files under *phy* and made the corresponding changes in the users
of phy-omap-control.

Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/Kconfig|  14 +-
 drivers/phy/Makefile   |   1 +
 drivers/{usb = }/phy/phy-omap-control.c   | 165 +++--
 drivers/phy/phy-omap-usb2.c|   8 +-
 drivers/phy/phy-ti-pipe3.c |   8 +-
 drivers/usb/musb/omap2430.c|   2 +-
 drivers/usb/phy/Kconfig|  10 --
 drivers/usb/phy/Makefile   |   1 -
 .../omap_control_usb.h = phy/omap_control_phy.h}  |  36 ++---
 9 files changed, 123 insertions(+), 122 deletions(-)
 rename drivers/{usb = }/phy/phy-omap-control.c (55%)
 rename include/linux/{usb/omap_control_usb.h = phy/omap_control_phy.h} (68%)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 1b607d7..fe8c009 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -31,12 +31,22 @@ config PHY_MVEBU_SATA
depends on OF
select GENERIC_PHY
 
+config OMAP_CONTROL_PHY
+   tristate OMAP CONTROL PHY Driver
+   help
+ Enable this to add support for the PHY part present in the control
+ module. This driver has API to power on the USB2 PHY and to write to
+ the mailbox. The mailbox is present only in omap4 and the register to
+ power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
+ additional register to power on USB3 PHY/SATA PHY/PCIE PHY
+ (PIPE3 PHY).
+
 config OMAP_USB2
tristate OMAP USB2 PHY Driver
depends on ARCH_OMAP2PLUS
depends on USB_PHY
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the transceiver that is part of SOC. This
  driver takes care of all the PHY functionality apart from comparator.
@@ -47,7 +57,7 @@ config TI_PIPE3
tristate TI PIPE3 PHY Driver
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  driver takes care of all the PHY functionality apart from comparator.
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ecf0d3f..8da05a8 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
 obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)  += phy-exynos-dp-video.o
 obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)+= phy-exynos-mipi-video.o
 obj-$(CONFIG_PHY_MVEBU_SATA)   += phy-mvebu-sata.o
+obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
 obj-$(CONFIG_TWL4030_USB)  += phy-twl4030-usb.o
diff --git a/drivers/usb/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
similarity index 55%
rename from drivers/usb/phy/phy-omap-control.c
rename to drivers/phy/phy-omap-control.c
index e725318..17fc200 100644
--- a/drivers/usb/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -1,5 +1,5 @@
 /*
- * omap-control-usb.c - The USB part of control module.
+ * omap-control-phy.c - The PHY part of control module.
  *
  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
  * This program is free software; you can redistribute it and/or modify
@@ -24,36 +24,36 @@
 #include linux/err.h
 #include linux/io.h
 #include linux/clk.h
-#include linux/usb/omap_control_usb.h
+#include linux/phy/omap_control_phy.h
 
 /**
- * omap_control_usb_phy_power - power on/off the phy using control module reg
+ * omap_control_phy_power - power on/off the phy using control module reg
  * @dev: the control module device
  * @on: 0 or 1, based on powering on or off the PHY
  */
-void omap_control_usb_phy_power(struct device *dev, int on)
+void omap_control_phy_power(struct device *dev, int on)
 {
u32 val;
unsigned long rate;
-   struct omap_control_usb *control_usb;
+   struct omap_control_phy *control_phy;
 
if (IS_ERR(dev) || !dev) {
pr_err(%s: invalid device\n, __func__);
return;
}
 
-   control_usb = dev_get_drvdata(dev);
-   if (!control_usb) {
-   dev_err(dev, %s: invalid control usb device\n, __func__);
+   control_phy = dev_get_drvdata(dev);
+   if (!control_phy) {
+   dev_err(dev, %s: invalid control phy device\n, __func__);
return;
}
 
-   if 

[PATCH v2 13/13] ARM: dts: dra7: add OCP2SCP3 and SATA nodes

2014-03-06 Thread Roger Quadros
From: Balaji T K balaj...@ti.com

Add nodes for OCP2SCP3 bus, SATA controller and SATA PHY.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/dra7.dtsi | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 9e3caf3..597979b 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -772,6 +772,45 @@
dma-names = tx0, rx0;
status = disabled;
};
+
+   omap_control_sata: control-phy@4a002374 {
+   compatible = ti,control-phy-pipe3;
+   reg = 0x4a002374 0x4;
+   reg-names = power;
+   clocks = sys_clkin1;
+   clock-names = sysclk;
+   };
+
+   /* OCP2SCP3 */
+   ocp2scp@4a09 {
+   compatible = ti,omap-ocp2scp;
+   #address-cells = 1;
+   #size-cells = 1;
+   ranges;
+   reg = 0x4a09 0x20;
+   ti,hwmods = ocp2scp3;
+   sata_phy: phy@4A096000 {
+   compatible = ti,phy-pipe3-sata;
+   reg = 0x4A096000 0x80, /* phy_rx */
+ 0x4A096400 0x64, /* phy_tx */
+ 0x4A096800 0x40; /* pll_ctrl */
+   reg-names = phy_rx, phy_tx, pll_ctrl;
+   ctrl-module = omap_control_sata;
+   clocks = sys_clkin1;
+   clock-names = sysclk;
+   #phy-cells = 0;
+   };
+   };
+
+   sata: sata@4a141100 {
+   compatible = snps,dwc-ahci;
+   reg = 0x4a14 0x1100, 0x4a141100 0x7;
+   interrupts = GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH;
+   phys = sata_phy;
+   phy-names = sata-phy;
+   clocks = sata_ref_clk;
+   ti,hwmods = sata;
+   };
};
 };
 
-- 
1.8.3.2

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[PATCH v2 06/13] phy: ti-pipe3: Don't get 'wkupclk' and 'refclk' for SATA PHY

2014-03-06 Thread Roger Quadros
SATA PHY doesn't need 'wkupclk; and 'refclk' so don't
try to get them for SATA PHY.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/phy-ti-pipe3.c | 24 +++-
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index f141237..baa3f78d 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -294,16 +294,22 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
phy-dev= pdev-dev;
 
-   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
-   if (IS_ERR(phy-wkupclk)) {
-   dev_err(pdev-dev, unable to get wkupclk\n);
-   return PTR_ERR(phy-wkupclk);
-   }
+   if (!of_device_is_compatible(node, ti,phy-pipe3-sata)) {
+
+   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
+   if (IS_ERR(phy-wkupclk)) {
+   dev_err(pdev-dev, unable to get wkupclk\n);
+   return PTR_ERR(phy-wkupclk);
+   }
 
-   phy-refclk = devm_clk_get(phy-dev, refclk);
-   if (IS_ERR(phy-refclk)) {
-   dev_err(pdev-dev, unable to get refclk\n);
-   return PTR_ERR(phy-refclk);
+   phy-refclk = devm_clk_get(phy-dev, refclk);
+   if (IS_ERR(phy-refclk)) {
+   dev_err(pdev-dev, unable to get refclk\n);
+   return PTR_ERR(phy-refclk);
+   }
+   } else {
+   phy-wkupclk = ERR_PTR(-ENODEV);
+   phy-refclk = ERR_PTR(-ENODEV);
}
 
phy-sys_clk = devm_clk_get(phy-dev, sysclk);
-- 
1.8.3.2

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[PATCH v2 11/13] ARM: dts: omap5: add sata node

2014-03-06 Thread Roger Quadros
From: Balaji T K balaj...@ti.com

Add support for sata.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/boot/dts/omap5.dtsi | 40 
 1 file changed, 40 insertions(+)

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index e47601a..b398cff 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -828,6 +828,46 @@
 
#thermal-sensor-cells = 1;
};
+
+   omap_control_sata: control-phy@4a002374 {
+   compatible = ti,control-phy-pipe3;
+   reg = 0x4a002374 0x4;
+   reg-names = power;
+   clocks = sys_clkin;
+   clock-names = sysclk;
+   };
+
+   /* OCP2SCP3 */
+   ocp2scp@4a09 {
+   compatible = ti,omap-ocp2scp;
+   #address-cells = 1;
+   #size-cells = 1;
+   reg = 0x4a09 0x20;
+   ranges;
+   ti,hwmods = ocp2scp3;
+   sata_phy: phy@4a096000 {
+   compatible = ti,phy-pipe3-sata;
+   reg = 0x4A096000 0x80, /* phy_rx */
+ 0x4A096400 0x64, /* phy_tx */
+ 0x4A096800 0x40; /* pll_ctrl */
+   reg-names = phy_rx, phy_tx, pll_ctrl;
+   ctrl-module = omap_control_sata;
+   clocks = sys_clkin;
+   clock-names = sysclk;
+   #phy-cells = 0;
+   };
+   };
+
+   sata: sata@4a141100 {
+   compatible = snps,dwc-ahci;
+   reg = 0x4a14 0x1100, 0x4a141100 0x7;
+   interrupts = GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH;
+   phys = sata_phy;
+   phy-names = sata-phy;
+   clocks = sata_ref_clk;
+   ti,hwmods = sata;
+   };
+
};
 };
 
-- 
1.8.3.2

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[PATCH v2 10/13] ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods

2014-03-06 Thread Roger Quadros
From: Keshava Munegowda keshava_mgo...@ti.com

Create hwmods for ocp2scp3 and sata modules.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
CC: Paul Walmsley p...@pwsan.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 73 ++
 1 file changed, 73 insertions(+)

diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index e297d62..227a69f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1726,6 +1726,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
},
 };
 
+/*
+ * 'ocp2scp' class
+ * bridge to transform ocp interface protocol to scp (serial control port)
+ * protocol
+ */
+/* ocp2scp3 */
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
+   .master = omap54xx_l4_cfg_hwmod,
+   .slave  = omap54xx_ocp2scp3_hwmod,
+   .clk= l4_root_clk_div,
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
+   .name   = ocp2scp3,
+   .class  = omap54xx_ocp2scp_hwmod_class,
+   .clkdm_name = l3init_clkdm,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = 
OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+   .context_offs = 
OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_HWCTRL,
+   },
+   },
+};
+
+/*
+ * 'sata' class
+ * sata:  serial ata interface  gen2 compliant   ( 1 rx/ 1 tx)
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
+   .sysc_offs  = 0x,
+   .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
+   .idlemodes  = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+  SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
+  MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
+   .sysc_fields= omap_hwmod_sysc_type2,
+};
+
+static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
+   .name   = sata,
+   .sysc   = omap54xx_sata_sysc,
+};
+
+/* sata */
+static struct omap_hwmod omap54xx_sata_hwmod = {
+   .name   = sata,
+   .class  = omap54xx_sata_hwmod_class,
+   .clkdm_name = l3init_clkdm,
+   .flags  = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
+   .main_clk   = func_48m_fclk,
+   .mpu_rt_idx = 1,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
+   .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_SWCTRL,
+   },
+   },
+};
+
+/* l4_cfg - sata */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
+   .master = omap54xx_l4_cfg_hwmod,
+   .slave  = omap54xx_sata_hwmod,
+   .clk= l3_iclk_div,
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
 
 /*
  * Interfaces
@@ -2399,6 +2470,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] 
__initdata = {
omap54xx_l4_cfg__usb_tll_hs,
omap54xx_l4_cfg__usb_otg_ss,
omap54xx_l4_wkup__wd_timer2,
+   omap54xx_l4_cfg__ocp2scp3,
+   omap54xx_l4_cfg__sata,
NULL,
 };
 
-- 
1.8.3.2

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[PATCH v2 12/13] ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods

2014-03-06 Thread Roger Quadros
From: Nikhil Devshatwar nikhil...@ti.com

Add hwmods for ocp2scp3 and sata modules.

[Roger Q] Clean up.

CC: Benoit Cousson bcous...@baylibre.com
CC: Paul Walmsley p...@pwsan.com
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Nikhil Devshatwar nikhil...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 31 ++-
 1 file changed, 26 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c 
b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 18f333c..3c9a430 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1215,6 +1215,30 @@ static struct omap_hwmod dra7xx_ocp2scp1_hwmod = {
},
 };
 
+/* ocp2scp3 */
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod;
+
+/* l4_cfg - ocp2scp3 */
+static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
+   .master = dra7xx_l4_cfg_hwmod,
+   .slave  = dra7xx_ocp2scp3_hwmod,
+   .clk= l4_root_clk_div,
+   .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
+   .name   = ocp2scp3,
+   .class  = dra7xx_ocp2scp_hwmod_class,
+   .clkdm_name = l3init_clkdm,
+   .prcm = {
+   .omap4 = {
+   .clkctrl_offs = 
DRA7XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
+   .context_offs = 
DRA7XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
+   .modulemode   = MODULEMODE_HWCTRL,
+   },
+   },
+};
+
 /*
  * 'qspi' class
  *
@@ -1268,9 +1292,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
 };
 
 /* sata */
-static struct omap_hwmod_opt_clk sata_opt_clks[] = {
-   { .role = ref_clk, .clk = sata_ref_clk },
-};
 
 static struct omap_hwmod dra7xx_sata_hwmod = {
.name   = sata,
@@ -1278,6 +1299,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.clkdm_name = l3init_clkdm,
.flags  = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk   = func_48m_fclk,
+   .mpu_rt_idx = 1,
.prcm = {
.omap4 = {
.clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1307,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
.modulemode   = MODULEMODE_SWCTRL,
},
},
-   .opt_clks   = sata_opt_clks,
-   .opt_clks_cnt   = ARRAY_SIZE(sata_opt_clks),
 };
 
 /*
@@ -2683,6 +2703,7 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] 
__initdata = {
dra7xx_l4_per1__mmc4,
dra7xx_l4_cfg__mpu,
dra7xx_l4_cfg__ocp2scp1,
+   dra7xx_l4_cfg__ocp2scp3,
dra7xx_l3_main_1__qspi,
dra7xx_l4_cfg__sata,
dra7xx_l4_cfg__smartreflex_core,
-- 
1.8.3.2

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[PATCH v2 09/13] phy: omap: Depend on OMAP_OCP2SCP bus driver

2014-03-06 Thread Roger Quadros
The OMAP_USB2 and OMAP_PIPE3 PHY devices will not be
detected if the OMAP_OCP2SCP bus driver is not present.
Make them depend on it.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index fe8c009..2aead8b 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -47,6 +47,7 @@ config OMAP_USB2
depends on USB_PHY
select GENERIC_PHY
select OMAP_CONTROL_PHY
+   depends on OMAP_OCP2SCP
help
  Enable this to support the transceiver that is part of SOC. This
  driver takes care of all the PHY functionality apart from comparator.
@@ -58,6 +59,7 @@ config TI_PIPE3
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
select OMAP_CONTROL_PHY
+   depends on OMAP_OCP2SCP
help
  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  driver takes care of all the PHY functionality apart from comparator.
-- 
1.8.3.2

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[PATCH v2 03/13] phy: omap-control: update dra7 and am437 usb2 bindings

2014-03-06 Thread Roger Quadros
The dra7-usb2 and am437-usb2 bindings have not yet been used.
Change them to be more elegant.

Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--
 drivers/phy/phy-omap-control.c   | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 5c5b1b0..28e674b 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -9,9 +9,9 @@ Required properties:
 e.g. USB2_PHY on OMAP5.
  ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
 e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-dra7-usb2 - if it has power down register like USB2 PHY on
 DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-am437-usb2 - if it has power down register like USB2 PHY on
 AM437 platform.
  - reg : Address and length of the register set for the device. It contains
the address of otghs_control for control-phy-otghs or power register
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
index 17fc200..a7e2d7f 100644
--- a/drivers/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -228,11 +228,11 @@ static const struct of_device_id 
omap_control_phy_id_table[] = {
.data = pipe3_data,
},
{
-   .compatible = ti,control-phy-dra7usb2,
+   .compatible = ti,control-phy-dra7-usb2,
.data = dra7usb2_data,
},
{
-   .compatible = ti,control-phy-am437usb2,
+   .compatible = ti,control-phy-am437-usb2,
.data = am437usb2_data,
},
{},
-- 
1.8.3.2

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[PATCH v2 04/13] phy: ti-pipe3: cleanup clock handling

2014-03-06 Thread Roger Quadros
As this driver is no longer USB specific, use generic clock names.
- Use 'wkupclk', 'sysclk' and 'refclk' clock-names. Update DT binding info.
- Fix PLL_SD_SHIFT from 9 to 10
- Don't separate prepare/unprepare clock from enable/disable. This
ensures optimal power savings.

Update omap5 usb3_phy device tree node.

CC: Benoît Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt | 12 ++
 arch/arm/boot/dts/omap5.dtsi |  7 ++-
 drivers/phy/phy-ti-pipe3.c   | 55 
 3 files changed, 46 insertions(+), 28 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 28e674b..8d13349 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -59,6 +59,12 @@ Required properties:
filled in reg.
  - #phy-cells: determine the number of cells that should be given in the
phandle while referencing this phy.
+ - clocks: a list of phandles and clock-specifier pairs, one for each entry in
+   clock-names.
+ - clock-names: should include:
+   * wkupclk - wakup clock.
+   * sysclk - system clock.
+   * refclk - reference clock.
 
 Optional properties:
  - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -74,4 +80,10 @@ usb3phy@4a084400 {
reg-names = phy_rx, phy_tx, pll_ctrl;
ctrl-module = omap_control_usb;
#phy-cells = 0;
+   clocks = usb_phy_cm_clk32k,
+sys_clkin,
+usb_otg_ss_refclk960m;
+   clock-names =   wkupclk,
+   sysclk,
+   refclk;
 };
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 859a800..e47601a 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -778,7 +778,12 @@
  0x4a084800 0x64,
  0x4a084c00 0x40;
reg-names = phy_rx, phy_tx, pll_ctrl;
-   ctrl-module = omap_control_usb3phy;
+   clocks = usb_phy_cm_clk32k,
+sys_clkin,
+usb_otg_ss_refclk960m;
+   clock-names =   wkupclk,
+   sysclk,
+   refclk;
#phy-cells = 0;
};
};
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index fd029b1..211703c 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -45,7 +45,7 @@
 #definePLL_SELFREQDCO_MASK 0x000E
 #definePLL_SELFREQDCO_SHIFT0x1
 #definePLL_SD_MASK 0x0003FC00
-#definePLL_SD_SHIFT0x9
+#definePLL_SD_SHIFT10
 #defineSET_PLL_GO  0x1
 #definePLL_TICOPWDN0x1
 #definePLL_LOCK0x2
@@ -72,7 +72,7 @@ struct ti_pipe3 {
struct device   *control_dev;
struct clk  *wkupclk;
struct clk  *sys_clk;
-   struct clk  *optclk;
+   struct clk  *refclk;
 };
 
 struct pipe3_dpll_map {
@@ -270,23 +270,21 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
phy-dev= pdev-dev;
 
-   phy-wkupclk = devm_clk_get(phy-dev, usb_phy_cm_clk32k);
+   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
if (IS_ERR(phy-wkupclk)) {
-   dev_err(pdev-dev, unable to get usb_phy_cm_clk32k\n);
+   dev_err(pdev-dev, unable to get wkupclk\n);
return PTR_ERR(phy-wkupclk);
}
-   clk_prepare(phy-wkupclk);
 
-   phy-optclk = devm_clk_get(phy-dev, usb_otg_ss_refclk960m);
-   if (IS_ERR(phy-optclk)) {
-   dev_err(pdev-dev, unable to get usb_otg_ss_refclk960m\n);
-   return PTR_ERR(phy-optclk);
+   phy-refclk = devm_clk_get(phy-dev, refclk);
+   if (IS_ERR(phy-refclk)) {
+   dev_err(pdev-dev, unable to get refclk\n);
+   return PTR_ERR(phy-refclk);
}
-   clk_prepare(phy-optclk);
 
-   phy-sys_clk = devm_clk_get(phy-dev, sys_clkin);
+   phy-sys_clk = devm_clk_get(phy-dev, sysclk);
if (IS_ERR(phy-sys_clk)) {
-   pr_err(%s: unable to get sys_clkin\n, __func__);
+   dev_err(pdev-dev, unable to get sysclk\n);
return -EINVAL;
}
 
@@ -326,10 +324,6 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
 static int ti_pipe3_remove(struct platform_device *pdev)
 {
-   struct ti_pipe3 *phy = platform_get_drvdata(pdev);
-
-   

[PATCH v2 05/13] phy: ti-pipe3: Add SATA DPLL support

2014-03-06 Thread Roger Quadros
USB and SATA DPLLs need different settings. Provide
the SATA DPLL settings and use the proper DPLL settings
based on device tree node's compatible_id.

Update the DT binding information.

Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt |  3 +-
 drivers/phy/phy-ti-pipe3.c   | 76 +---
 2 files changed, 57 insertions(+), 22 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 8d13349..2c2d66a 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -53,7 +53,8 @@ usb2phy@4a0ad080 {
 TI PIPE3 PHY
 
 Required properties:
- - compatible: Should be ti,phy-usb3. ti,omap-usb3 is deprecated.
+ - compatible: Should be ti,phy-usb3 or ti,phy-pipe3-sata.
+   ti,omap-usb3 is deprecated.
  - reg : Address and length of the register set for the device.
  - reg-names: The names of the register addresses corresponding to the 
registers
filled in reg.
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 211703c..f141237 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -66,6 +66,11 @@ struct pipe3_dpll_params {
u32 mf;
 };
 
+struct pipe3_dpll_map {
+   unsigned long rate;
+   struct pipe3_dpll_params params;
+};
+
 struct ti_pipe3 {
void __iomem*pll_ctrl_base;
struct device   *dev;
@@ -73,20 +78,27 @@ struct ti_pipe3 {
struct clk  *wkupclk;
struct clk  *sys_clk;
struct clk  *refclk;
+   struct pipe3_dpll_map   *dpll_map;
 };
 
-struct pipe3_dpll_map {
-   unsigned long rate;
-   struct pipe3_dpll_params params;
-};
-
-static struct pipe3_dpll_map dpll_map[] = {
+static struct pipe3_dpll_map dpll_map_usb[] = {
{1200, {1250, 5, 4, 20, 0} },   /* 12 MHz */
{1680, {3125, 20, 4, 20, 0} },  /* 16.8 MHz */
{1920, {1172, 8, 4, 20, 65537} },   /* 19.2 MHz */
{2000, {1000, 7, 4, 10, 0} },   /* 20 MHz */
{2600, {1250, 12, 4, 20, 0} },  /* 26 MHz */
{3840, {3125, 47, 4, 20, 92843} },  /* 38.4 MHz */
+   { },/* Terminator */
+};
+
+static struct pipe3_dpll_map dpll_map_sata[] = {
+   {1200, {1000, 7, 4, 6, 0} },/* 12 MHz */
+   {1680, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
+   {1920, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
+   {2000, {600, 7, 4, 6, 0} }, /* 20 MHz */
+   {2600, {461, 7, 4, 6, 0} }, /* 26 MHz */
+   {3840, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
+   { },/* Terminator */
 };
 
 static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
@@ -100,15 +112,20 @@ static inline void ti_pipe3_writel(void __iomem *addr, 
unsigned offset,
__raw_writel(data, addr + offset);
 }
 
-static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
+static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
 {
-   int i;
+   unsigned long rate;
+   struct pipe3_dpll_map *dpll_map = phy-dpll_map;
 
-   for (i = 0; i  ARRAY_SIZE(dpll_map); i++) {
-   if (rate == dpll_map[i].rate)
-   return dpll_map[i].params;
+   rate = clk_get_rate(phy-sys_clk);
+
+   for (; dpll_map-rate; dpll_map++) {
+   if (rate == dpll_map-rate)
+   return dpll_map-params;
}
 
+   dev_err(phy-dev, No DPLL configuration for %lu Hz SYS CLK\n, rate);
+
return NULL;
 }
 
@@ -182,16 +199,11 @@ static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
 static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
 {
u32 val;
-   unsigned long   rate;
struct pipe3_dpll_params *dpll_params;
 
-   rate = clk_get_rate(phy-sys_clk);
-   dpll_params = ti_pipe3_get_dpll_params(rate);
-   if (!dpll_params) {
-   dev_err(phy-dev,
- No DPLL configuration for %lu Hz SYS CLK\n, rate);
+   dpll_params = ti_pipe3_get_dpll_params(phy);
+   if (!dpll_params)
return -EINVAL;
-   }
 
val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION1);
val = ~PLL_REGN_MASK;
@@ -244,6 +256,10 @@ static struct phy_ops ops = {
.owner  = THIS_MODULE,
 };
 
+#ifdef CONFIG_OF
+static const struct of_device_id ti_pipe3_id_table[];
+#endif
+
 static int ti_pipe3_probe(struct platform_device *pdev)
 {
struct ti_pipe3 *phy;
@@ -253,8 +269,10 @@ static int ti_pipe3_probe(struct platform_device *pdev)
struct device_node *node = pdev-dev.of_node;
struct device_node *control_node;
struct platform_device *control_pdev;
+   

[PATCH v2 07/13] phy: ti-pipe3: streamline PHY operations

2014-03-06 Thread Roger Quadros
Limit .power_on() and .power_off() to just control the
PHY power and not the DPLL. The DPLL will be enabled
in .init() and idled in .exit().

Don't reprogram the DPLL if it has been already locked
by the bootloader. This fixes a problem with SATA, where
it fails if SATA was used by the bootloader.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/phy-ti-pipe3.c | 114 +
 1 file changed, 63 insertions(+), 51 deletions(-)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index baa3f78d..12cc900 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -47,7 +47,8 @@
 #definePLL_SD_MASK 0x0003FC00
 #definePLL_SD_SHIFT10
 #defineSET_PLL_GO  0x1
-#definePLL_TICOPWDN0x1
+#define PLL_LDOPWDNBIT(15)
+#define PLL_TICOPWDN   BIT(16)
 #definePLL_LOCK0x2
 #definePLL_IDLE0x1
 
@@ -56,7 +57,8 @@
  * value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
  * to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
  */
-# define PLL_IDLE_TIME  100;
+#define PLL_IDLE_TIME  100 /* in milliseconds */
+#define PLL_LOCK_TIME  100 /* in milliseconds */
 
 struct pipe3_dpll_params {
u16 m;
@@ -132,24 +134,6 @@ static struct pipe3_dpll_params 
*ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
 static int ti_pipe3_power_off(struct phy *x)
 {
struct ti_pipe3 *phy = phy_get_drvdata(x);
-   int val;
-   int timeout = PLL_IDLE_TIME;
-
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
-   val |= PLL_IDLE;
-   ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION2, val);
-
-   do {
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_STATUS);
-   if (val  PLL_TICOPWDN)
-   break;
-   udelay(5);
-   } while (--timeout);
-
-   if (!timeout) {
-   dev_err(phy-dev, power off failed\n);
-   return -EBUSY;
-   }
 
omap_control_phy_power(phy-control_dev, 0);
 
@@ -159,44 +143,34 @@ static int ti_pipe3_power_off(struct phy *x)
 static int ti_pipe3_power_on(struct phy *x)
 {
struct ti_pipe3 *phy = phy_get_drvdata(x);
-   int val;
-   int timeout = PLL_IDLE_TIME;
-
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
-   val = ~PLL_IDLE;
-   ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION2, val);
 
-   do {
-   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_STATUS);
-   if (!(val  PLL_TICOPWDN))
-   break;
-   udelay(5);
-   } while (--timeout);
-
-   if (!timeout) {
-   dev_err(phy-dev, power on failed\n);
-   return -EBUSY;
-   }
+   omap_control_phy_power(phy-control_dev, 1);
 
return 0;
 }
 
-static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
+static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)
 {
u32 val;
unsigned long   timeout;
 
-   ti_pipe3_writel(phy-pll_ctrl_base, PLL_GO, SET_PLL_GO);
-
-   timeout = jiffies + msecs_to_jiffies(20);
+   timeout = jiffies + msecs_to_jiffies(PLL_LOCK_TIME);
do {
+   cpu_relax();
val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_STATUS);
if (val  PLL_LOCK)
break;
-   } while (!WARN_ON(time_after(jiffies, timeout)));
+   } while (!time_after(jiffies, timeout));
+
+   if (!(val  PLL_LOCK)) {
+   dev_err(phy-dev, DPLL failed to lock\n);
+   return -EBUSY;
+   }
+
+   return 0;
 }
 
-static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
+static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)
 {
u32 val;
struct pipe3_dpll_params *dpll_params;
@@ -230,27 +204,65 @@ static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
val |= dpll_params-sd  PLL_SD_SHIFT;
ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION3, val);
 
-   ti_pipe3_dpll_relock(phy);
+   ti_pipe3_writel(phy-pll_ctrl_base, PLL_GO, SET_PLL_GO);
 
-   return 0;
+   return ti_pipe3_dpll_wait_lock(phy);
 }
 
 static int ti_pipe3_init(struct phy *x)
 {
struct ti_pipe3 *phy = phy_get_drvdata(x);
-   int ret;
+   u32 val;
+   int ret = 0;
 
-   ret = ti_pipe3_dpll_lock(phy);
-   if (ret)
-   return ret;
+   /* Bring it out of IDLE if it is IDLE */
+   val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
+   if (val  PLL_IDLE) {
+   val = ~PLL_IDLE;
+   ti_pipe3_writel(phy-pll_ctrl_base, PLL_CONFIGURATION2, val);
+   ret = ti_pipe3_dpll_wait_lock(phy);
+   }
 
-   omap_control_phy_power(phy-control_dev, 1);
+   /* Program the DPLL only if not locked */
+   val = 

[PATCH v2 08/13] phy: ti-pipe3: Fix suspend/resume and module reload

2014-03-06 Thread Roger Quadros
Due to Errata i783, SATA breaks if its DPLL is idled. The recommeded
workaround to issue a softreset to the SATA controller doesn't seem to
work. Here we just prevent SATA DPLL from Idling and hence avoid
the issue altogether.

Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/phy-ti-pipe3.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 12cc900..5913676 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -238,6 +238,10 @@ static int ti_pipe3_exit(struct phy *x)
u32 val;
unsigned long timeout;
 
+   /* SATA DPLL can't be powered down due to Errata i783 */
+   if (of_device_is_compatible(phy-dev-of_node, ti,phy-pipe3-sata))
+   return 0;
+
/* Put DPLL in IDLE mode */
val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION2);
val |= PLL_IDLE;
-- 
1.8.3.2

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[PATCH v2 00/13][RESEND] ARM: OMAP: SATA support for OMAP5 DRA7

2014-03-06 Thread Roger Quadros
Hi,

[Resending cause I messed up Kishon's email ID in the original v2.]

This series adds SATA support for OMAP5 uevm and DRA7-evm boards.

- Cleans up the ti-pipe3 PHY driver
- Adds SATA DPLL support to ti-pipe3 PHY driver
- Adds SATA nodes to hwmod and SoC DT data

Patches are based on 3.14-rc4 with balbi/next, linux-phy/next and
omap-for-v3.15/dt merged on top..

To test SATA you will also need [1].

[1] - http://article.gmane.org/gmane.comp.hardware.netbook.arm.sunxi/7285

Changelog:

v2
- use 'depends on' instead of 'select' OCP2SCP bus driver.
- Changed DT bindings for dra7-usb2 and am437-usb2 phy.

cheers,
-roger

---
Balaji T K (2):
  ARM: dts: omap5: add sata node
  ARM: dts: dra7: add OCP2SCP3 and SATA nodes

Keshava Munegowda (1):
  ARM: OMAP5: hwmod: Add ocp2scp3 and sata hwmods

Kishon Vijay Abraham I (1):
  phy: rename struct omap_control_usb to struct omap_control_phy

Nikhil Devshatwar (1):
  ARM: DRA7: hwmod: Add ocp2scp3 and sata hwmods

Roger Quadros (8):
  phy: omap-control: Update DT binding information
  phy: omap-control: update dra7 and am437 usb2 bindings
  phy: ti-pipe3: cleanup clock handling
  phy: ti-pipe3: Add SATA DPLL support
  phy: ti-pipe3: Don't get 'wkupclk' and 'refclk' for SATA PHY
  phy: ti-pipe3: streamline PHY operations
  phy: ti-pipe3: Fix suspend/resume and module reload
  phy: omap: Depend on OMAP_OCP2SCP bus driver

 Documentation/devicetree/bindings/phy/ti-phy.txt   |  40 ++-
 Documentation/devicetree/bindings/usb/omap-usb.txt |  24 --
 arch/arm/boot/dts/dra7.dtsi|  39 +++
 arch/arm/boot/dts/omap5.dtsi   |  47 +++-
 arch/arm/mach-omap2/omap_hwmod_54xx_data.c |  73 ++
 arch/arm/mach-omap2/omap_hwmod_7xx_data.c  |  31 ++-
 drivers/phy/Kconfig|  16 +-
 drivers/phy/Makefile   |   1 +
 drivers/{usb = }/phy/phy-omap-control.c   | 169 ++---
 drivers/phy/phy-omap-usb2.c|   8 +-
 drivers/phy/phy-ti-pipe3.c | 269 +
 drivers/usb/musb/omap2430.c|   2 +-
 drivers/usb/phy/Kconfig|  10 -
 drivers/usb/phy/Makefile   |   1 -
 .../omap_control_usb.h = phy/omap_control_phy.h}  |  36 +--
 15 files changed, 509 insertions(+), 257 deletions(-)
 rename drivers/{usb = }/phy/phy-omap-control.c (53%)
 rename include/linux/{usb/omap_control_usb.h = phy/omap_control_phy.h} (68%)

-- 
1.8.3.2

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[PATCH v2 02/13] phy: omap-control: Update DT binding information

2014-03-06 Thread Roger Quadros
Move omap-control binding information to the right location.

Signed-off-by: Roger Quadros rog...@ti.com
---
 Documentation/devicetree/bindings/phy/ti-phy.txt   | 25 ++
 Documentation/devicetree/bindings/usb/omap-usb.txt | 24 -
 2 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index f671163..5c5b1b0 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -1,5 +1,30 @@
 TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs
 
+OMAP CONTROL PHY
+
+Required properties:
+ - compatible: Should be one of
+ ti,control-phy-otghs - if it has otghs_control mailbox register as on OMAP4.
+ ti,control-phy-usb2 - if it has Power down bit in control_dev_conf register
+e.g. USB2_PHY on OMAP5.
+ ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
+e.g. USB3 PHY and SATA PHY on OMAP5.
+ ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+DRA7 platform.
+ ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+AM437 platform.
+ - reg : Address and length of the register set for the device. It contains
+   the address of otghs_control for control-phy-otghs or power register
+   for other types.
+ - reg-names: should be otghs_control control-phy-otghs and power for
+   other types.
+
+omap_control_usb: omap-control-usb@4a002300 {
+compatible = ti,control-phy-otghs;
+reg = 0x4a00233c 0x4;
+reg-names = otghs_control;
+};
+
 OMAP USB2 PHY
 
 Required properties:
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt 
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index c495135..38b2fae 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -76,27 +76,3 @@ omap_dwc3 {
ranges;
 };
 
-OMAP CONTROL USB
-
-Required properties:
- - compatible: Should be one of
- ti,control-phy-otghs - if it has otghs_control mailbox register as on OMAP4.
- ti,control-phy-usb2 - if it has Power down bit in control_dev_conf register
-   e.g. USB2_PHY on OMAP5.
- ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
-   e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
-   DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
-   AM437 platform.
- - reg : Address and length of the register set for the device. It contains
-   the address of otghs_control for control-phy-otghs or power register
-   for other types.
- - reg-names: should be otghs_control control-phy-otghs and power for
-   other types.
-
-omap_control_usb: omap-control-usb@4a002300 {
-   compatible = ti,control-phy-otghs;
-   reg = 0x4a00233c 0x4;
-   reg-names = otghs_control;
-};
-- 
1.8.3.2

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[PATCH v2 01/13] phy: rename struct omap_control_usb to struct omap_control_phy

2014-03-06 Thread Roger Quadros
From: Kishon Vijay Abraham I kis...@ti.com

Rename struct omap_control_usb to struct omap_control_phy since it can
be used to control PHY of USB, SATA and PCIE. Also move the driver and
include files under *phy* and made the corresponding changes in the users
of phy-omap-control.

Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
 drivers/phy/Kconfig|  14 +-
 drivers/phy/Makefile   |   1 +
 drivers/{usb = }/phy/phy-omap-control.c   | 165 +++--
 drivers/phy/phy-omap-usb2.c|   8 +-
 drivers/phy/phy-ti-pipe3.c |   8 +-
 drivers/usb/musb/omap2430.c|   2 +-
 drivers/usb/phy/Kconfig|  10 --
 drivers/usb/phy/Makefile   |   1 -
 .../omap_control_usb.h = phy/omap_control_phy.h}  |  36 ++---
 9 files changed, 123 insertions(+), 122 deletions(-)
 rename drivers/{usb = }/phy/phy-omap-control.c (55%)
 rename include/linux/{usb/omap_control_usb.h = phy/omap_control_phy.h} (68%)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 1b607d7..fe8c009 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -31,12 +31,22 @@ config PHY_MVEBU_SATA
depends on OF
select GENERIC_PHY
 
+config OMAP_CONTROL_PHY
+   tristate OMAP CONTROL PHY Driver
+   help
+ Enable this to add support for the PHY part present in the control
+ module. This driver has API to power on the USB2 PHY and to write to
+ the mailbox. The mailbox is present only in omap4 and the register to
+ power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
+ additional register to power on USB3 PHY/SATA PHY/PCIE PHY
+ (PIPE3 PHY).
+
 config OMAP_USB2
tristate OMAP USB2 PHY Driver
depends on ARCH_OMAP2PLUS
depends on USB_PHY
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the transceiver that is part of SOC. This
  driver takes care of all the PHY functionality apart from comparator.
@@ -47,7 +57,7 @@ config TI_PIPE3
tristate TI PIPE3 PHY Driver
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  driver takes care of all the PHY functionality apart from comparator.
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ecf0d3f..8da05a8 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
 obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO)  += phy-exynos-dp-video.o
 obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)+= phy-exynos-mipi-video.o
 obj-$(CONFIG_PHY_MVEBU_SATA)   += phy-mvebu-sata.o
+obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
 obj-$(CONFIG_OMAP_USB2)+= phy-omap-usb2.o
 obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
 obj-$(CONFIG_TWL4030_USB)  += phy-twl4030-usb.o
diff --git a/drivers/usb/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
similarity index 55%
rename from drivers/usb/phy/phy-omap-control.c
rename to drivers/phy/phy-omap-control.c
index e725318..17fc200 100644
--- a/drivers/usb/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -1,5 +1,5 @@
 /*
- * omap-control-usb.c - The USB part of control module.
+ * omap-control-phy.c - The PHY part of control module.
  *
  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
  * This program is free software; you can redistribute it and/or modify
@@ -24,36 +24,36 @@
 #include linux/err.h
 #include linux/io.h
 #include linux/clk.h
-#include linux/usb/omap_control_usb.h
+#include linux/phy/omap_control_phy.h
 
 /**
- * omap_control_usb_phy_power - power on/off the phy using control module reg
+ * omap_control_phy_power - power on/off the phy using control module reg
  * @dev: the control module device
  * @on: 0 or 1, based on powering on or off the PHY
  */
-void omap_control_usb_phy_power(struct device *dev, int on)
+void omap_control_phy_power(struct device *dev, int on)
 {
u32 val;
unsigned long rate;
-   struct omap_control_usb *control_usb;
+   struct omap_control_phy *control_phy;
 
if (IS_ERR(dev) || !dev) {
pr_err(%s: invalid device\n, __func__);
return;
}
 
-   control_usb = dev_get_drvdata(dev);
-   if (!control_usb) {
-   dev_err(dev, %s: invalid control usb device\n, __func__);
+   control_phy = dev_get_drvdata(dev);
+   if (!control_phy) {
+   dev_err(dev, %s: invalid control phy device\n, __func__);
return;
}
 
-   if 

Re: usb modem not working on xhci host

2014-03-06 Thread Greg KH
On Thu, Mar 06, 2014 at 10:35:24PM +0800, vichy wrote:
 hi sarah:
  Can you send me the output of `sudo lsusb -v` for when the device is
  under EHCI and when it's under xHCI?  Also, please take a usbmon trace,
  as described by
  http://lxr.free-electrons.com/source/Documentation/usb/usbmon.txt
 
  Start the trace just before you plug the device in.  Take one trace when
  the device under EHCI, and one when it's under xHCI.
 Please reference the attachment
 
 
  Below is my host environment
 
  Which kernel are you running?
 Linux 3.13.0

Please try 3.13.5, as a number of known USB 3 bugs have been fixed in
there since 3.13.0

thanks,

greg k-h
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Re: xHCI regression in stable 3.13.5 with USB3 card reader (Bisected)

2014-03-06 Thread Sarah Sharp
[Adding Mathias.]

On Thu, Mar 06, 2014 at 12:27:59AM -0600, Robert Hancock wrote:
 On 05/03/14 11:17 PM, Robert Hancock wrote:
 I have a USB 3.0 multi-card reader device:
 
 Bus 004 Device 002: ID 05e3:0743 Genesys Logic, Inc.
 
 which seems to work fine in 3.13.4 (Fedora version kernel-3.13.4-200
 specifically) but fails in 3.13.5 (specifically kernel-3.13.5-202).
 Below is what I get in dmesg. Essentially there's a bunch of
 input/output errors making the reader mostly unusable.
 
 This is on an Intel Haswell machine with this controller:
 
 00:14.0 USB controller [0c03]: Intel Corporation 8 Series/C220 Series
 Chipset Family USB xHCI [8086:8c31] (rev 05)
 
 It looks like there were some XHCI commits that went into 3.13.5 so it
 seems likely one of those is the cause. I can try current git if there's
 anything in there that's likely to fix it. But it does seem like a
 regression got into the stable kernel in this respect.
 
 Bisecting between 3.13.4 and 3.13.5 gives me this:
 
 c8f44f98901994832ccecb87c3dd7900274b699a is the first bad commit
 commit c8f44f98901994832ccecb87c3dd7900274b699a
 Author: Sarah Sharp sarah.a.sh...@linux.intel.com
 Date:   Fri Jan 31 11:26:25 2014 -0800
 
 xhci 1.0: Limit arbitrarily-aligned scatter gather.

Yes, this is a known regression.  That commit should be reverted in
3.14-rc shortly, and the patch will be backported to stable kernels.
Mathias is taking over as xHCI maintainer, and he will queue the revert
patches to Greg shortly.

Sarah Sharp

 
 commit 247bf557273dd775505fb9240d2d152f4f20d304 upstream.
 
 xHCI 1.0 hosts have a set of requirements on how to align transfer
 buffers on the endpoint rings called TD fragment rules.  When the
 ax88179_178a driver added support for scatter gather in 3.12, with
 commit 804fad45411b48233b48003e33a78f290d227c8 USBNET: ax88179_178a:
 enable tso if usb host supports sg dma, it broke the device under xHCI
 1.0 hosts.  Under certain network loads, the device would see an
 unexpected short packet from the host, which would cause the device to
 stop sending ethernet packets, even through USB packets would still be
 sent.
 
 Commit 35773dac5f86 usb: xhci: Link TRB must not occur within a USB
 payload burst attempted to fix this.  It was a quick hack to partially
 implement the TD fragment rules.  However, it caused regressions in the
 usb-storage layer and userspace USB drivers using libusb.  The patches
 to attempt to fix this are too far reaching into the USB core, and we
 really need to implement the TD fragment rules correctly in the xHCI
 driver, instead of continuing to wallpaper over the issues.
 
 Disable arbitrarily-aligned scatter-gather in the xHCI driver for 1.0
 hosts.  Only the ax88179_178a driver checks the no_sg_constraint flag,
 so don't set it for 1.0 hosts.  This should not impact usb-storage or
 usbfs behavior, since they pass down max packet sized aligned sg-list
 entries (512 for USB 2.0 and 1024 for USB 3.0).
 
 Signed-off-by: Sarah Sharp sarah.a.sh...@linux.intel.com
 Tested-by: Mark Lord ml...@pobox.com
 Cc: David Laight david.lai...@aculab.com
 Cc: Bjørn Mork bj...@mork.no
 Cc: Freddy Xin fre...@asix.com.tw
 Cc: Ming Lei ming@canonical.com
 Signed-off-by: Greg Kroah-Hartman gre...@linuxfoundation.org
 
 
 
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Re: BUG: USB Reset-Resume Mechanism does not work for runtime resume

2014-03-06 Thread Alan Stern
On Thu, 6 Mar 2014, Peter Chen wrote:

 If the autosuspend supported device can't respond resume correctly, eg,
 after resume, it can't respond GET_STATUS correctly in this case, the
 .reset_resume interface is a must for class driver, it just like a
 workaround for broken hardware.

I agree completely.  Now you just need to convince the btusb
maintainer.  :-)

Alan Stern

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xhci port link Disable setting and logic disconnect

2014-03-06 Thread vichy
hi all:
below is the source code about setting xhci port to ss.disable state
Why we need to or PORT_PE at this time?
Spec didn't mention about to or PORT_PE before setting xhci port to
ss.disable state.
/* Disable port */
if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
xhci_dbg(xhci, Disable port %d\n, wIndex);
temp = xhci_port_state_to_neutral(temp);
/*
 * Clear all change bits, so that we get a new
 * connection event.
 */
temp |= PORT_CSC | PORT_PEC | PORT_WRC |
PORT_OCC | PORT_RC | PORT_PLC |
PORT_CEC;
xhci_writel(xhci, temp | PORT_PE,
port_array[wIndex]);
temp = xhci_readl(xhci, port_array[wIndex]);
break;
}

2. when I unplug some buggy device, I see even connect status as 0
xhci driver still try to warm reset, should we add connect status
determination in xhci for terminating warm reset earlier.
( I attach the log for your reference.

platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x2802f0
platform-xhci platform-xhci.0: Get port status returned 0x3002f0
hub 6-0:1.0: port 1 not reset yet, waiting 200ms
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x2802f0
platform-xhci platform-xhci.0: Get port status returned 0x3002f0
hub 6-0:1.0: port 1 not reset yet, waiting 200ms
hub 6-0:1.0: port_wait_reset: err = -16
hub 6-0:1.0: port 1 not enabled, trying reset again...
platform-xhci platform-xhci.0: set port reset, actual port 0 status  = 0x2802f0
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x2802f0
platform-xhci platform-xhci.0: Get port status returned 0x3002f0
hub 6-0:1.0: port 1 not reset yet, waiting 200ms


3. what is the difference between logic disconnect and real disconnect?
from the log, I see logic disconnect but I cannot tell the meaning of
this function.

Appreciate your kind help in advance,
VDLinux# [ 0][ 6392.390460] platform-xhci platform-xhci.0: Port Status Change Event for port 2
platform-xhci platform-xhci.0: handle_port_status: starting port polling.
hub 6-0:1.0: state 7 ports 1 chg  evt 0002
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x4012c1
platform-xhci platform-xhci.0: Get port status returned 0x4002c1
platform-xhci platform-xhci.0: clear port link state change, actual port 0 status  = 0x12c1
hub 6-0:1.0: warm reset port 1
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12c1
platform-xhci platform-xhci.0: Get port status returned 0x2c1
platform-xhci platform-xhci.0: xhci_hub_status_data: stopping port polling.
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12b1
platform-xhci platform-xhci.0: Get port status returned 0x2b1
hub 6-0:1.0: port 1 not warm reset yet, waiting 50ms
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms
hub 6-0:1.0: port_wait_reset: err = -16
hub 6-0:1.0: port 1 not enabled, trying warm reset again...
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms
platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms

VDLinux# 
VDLinux# [ 0][ 6393.943456] platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms

VDLinux# [ 0][ 6394.167464] platform-xhci platform-xhci.0: get port status, actual port 0 status  = 0x12f1
platform-xhci platform-xhci.0: Get port status returned 0x2f1
hub 6-0:1.0: port 1 not warm reset yet, waiting 200ms
hub 6-0:1.0: port_wait_reset: err = -16
hub 

Re: usb modem not working on xhci host

2014-03-06 Thread vichy
hi Greg:

2014-03-06 22:49 GMT+08:00 Greg KH gre...@linuxfoundation.org:
 On Thu, Mar 06, 2014 at 10:35:24PM +0800, vichy wrote:
 hi sarah:
  Can you send me the output of `sudo lsusb -v` for when the device is
  under EHCI and when it's under xHCI?  Also, please take a usbmon trace,
  as described by
  http://lxr.free-electrons.com/source/Documentation/usb/usbmon.txt
 
  Start the trace just before you plug the device in.  Take one trace when
  the device under EHCI, and one when it's under xHCI.
 Please reference the attachment

 
  Below is my host environment
 
  Which kernel are you running?
 Linux 3.13.0

 Please try 3.13.5, as a number of known USB 3 bugs have been fixed in
 there since 3.13.0
Sure!
BTW, would you please let me know what bug fixed in 3.13 for usb3?
is it related to modem?

appreciate your help,
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Re: [PATCH v2] staging: usbip: claim ports used by shared devices

2014-03-06 Thread Alan Stern
On Thu, 6 Mar 2014, Valentina Manea wrote:

 A device should not be able to be used concurrently both by
 the server and the client. Claiming the port used by the
 shared device ensures no interface drivers bind to it and
 that it is not usable from the server.
 
 Signed-off-by: Valentina Manea valentina.mane...@gmail.com
 ---
 Changes since v1:
 * add commit description
 * move struct dev_state definition back to usb/core/devio.c

For the changes to the USB core:

Acked-by: Alan Stern st...@rowland.harvard.edu

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USB 3 HDD / Pen Drive not working on 3.13.5

2014-03-06 Thread Nilesh Govindrajan
I'm unable to access USB 3 Pen drive / HDD on 3.13.5. The same works
on 3.13.4 without any problems.

The problem happens irrespective of whether the device is plugged in a
USB 3.0 port or a 2.0 port.

Motherboard: GA-B85M-D3H
CPU: i5-4670

Messages in dmesg -

[  124.985666] xhci_hcd :00:14.0: xHCI xhci_drop_endpoint called
with disabled ep 88022138b000
[  124.985667] xhci_hcd :00:14.0: xHCI xhci_drop_endpoint called
with disabled ep 88022138b040
[  135.091668] usb 2-6: reset SuperSpeed USB device number 3 using xhci_hcd
[  135.102898] xhci_hcd :00:14.0: xHCI xhci_drop_endpoint called
with disabled ep 88022138b000
[  135.102900] xhci_hcd :00:14.0: xHCI xhci_drop_endpoint called
with disabled ep 88022138b040
[  151.211415] usb 2-6: reset SuperSpeed USB device number 3 using xhci_hcd
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Re: Delivery Status Notification (Failure)

2014-03-06 Thread Alan Stern
On Thu, 6 Mar 2014, Jagdish Gedia wrote:

 Hi Alan,
 
 Thanks for you informative reply.
 I will try your suggestion. yes, i will not get more than one wakeup per 
 second.
 
 I have tried below things.
 My usb device is using the cdc-acm.c driver.
 
 inside cdc-acm.c file,
 
 static struct usb_device *usb_device;
 
 static int acm_probe(, )
 {
 usb_device = interface_to_usbdev(intf);
 ..
 }
 
 inside interrupt handler
 
 static irqhandle_t int_handler(..., ..)
 {
usb_lock_device(usb_device);
usb_remote_wakeup(usb_device);
usb_unlock_device(usb_device);
return IRQ_HANDLED;
 }
 
 but these things are not working. kernel is crashing when interrupt occurs.

Because you didn't do what I said: Call pm_request_resume.  Not 
usb_remote_wakeup.

 I have some other doubt also.
 
 1. If usb is runtime suspended and if global suspend happens , do i
 need to do anything special to wakeup the usb device?

No.

 2. How can i address particularly my usb device. right now, i am using
 usb_device = interface_to_usbdev(intf) to get pointer to my usb device
 inside probe function,

That's a perfectly good way to do it.  Lots of other drivers do the 
same thing.

  but probe function is getting called for every
 interface of the device. Is there any other way through which i can
 get the pointer to my usb device like i can traverse all the available
 usb device and on basis of vendor and product id i can address my usb
 device or by any other way?

You can't get the device pointer unless you have something to start 
from.  For example, if you already have an interface pointer then you 
can use interface_to_usbdev.

Alan Stern

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[PATCH v3 06/13] phy: ti-pipe3: Don't get 'wkupclk' and 'refclk' for SATA PHY

2014-03-06 Thread Roger Quadros
SATA PHY doesn't need 'wkupclk; and 'refclk' so don't
try to get them for SATA PHY.

Signed-off-by: Roger Quadros rog...@ti.com
---
v3 - Fixed checkpatch warning

 drivers/phy/phy-ti-pipe3.c | 23 ++-
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index f141237..f925f60 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -294,16 +294,21 @@ static int ti_pipe3_probe(struct platform_device *pdev)
 
phy-dev= pdev-dev;
 
-   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
-   if (IS_ERR(phy-wkupclk)) {
-   dev_err(pdev-dev, unable to get wkupclk\n);
-   return PTR_ERR(phy-wkupclk);
-   }
+   if (!of_device_is_compatible(node, ti,phy-pipe3-sata)) {
+   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
+   if (IS_ERR(phy-wkupclk)) {
+   dev_err(pdev-dev, unable to get wkupclk\n);
+   return PTR_ERR(phy-wkupclk);
+   }
 
-   phy-refclk = devm_clk_get(phy-dev, refclk);
-   if (IS_ERR(phy-refclk)) {
-   dev_err(pdev-dev, unable to get refclk\n);
-   return PTR_ERR(phy-refclk);
+   phy-refclk = devm_clk_get(phy-dev, refclk);
+   if (IS_ERR(phy-refclk)) {
+   dev_err(pdev-dev, unable to get refclk\n);
+   return PTR_ERR(phy-refclk);
+   }
+   } else {
+   phy-wkupclk = ERR_PTR(-ENODEV);
+   phy-refclk = ERR_PTR(-ENODEV);
}
 
phy-sys_clk = devm_clk_get(phy-dev, sysclk);
-- 
1.8.3.2

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Re: [PATCH v2 01/13] phy: rename struct omap_control_usb to struct omap_control_phy

2014-03-06 Thread Kishon Vijay Abraham I

Felipe,

On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:

From: Kishon Vijay Abraham I kis...@ti.com

Rename struct omap_control_usb to struct omap_control_phy since it can
be used to control PHY of USB, SATA and PCIE. Also move the driver and
include files under *phy* and made the corresponding changes in the users
of phy-omap-control.

Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
---
  drivers/phy/Kconfig|  14 +-
  drivers/phy/Makefile   |   1 +
  drivers/{usb = }/phy/phy-omap-control.c   | 165 +++--
  drivers/phy/phy-omap-usb2.c|   8 +-
  drivers/phy/phy-ti-pipe3.c |   8 +-
  drivers/usb/musb/omap2430.c|   2 +-
  drivers/usb/phy/Kconfig|  10 --
  drivers/usb/phy/Makefile   |   1 -


Hope you are fine with the changes in drivers/usb/? Can you give your 
Acked-by?


Regards
Kishon


  .../omap_control_usb.h = phy/omap_control_phy.h}  |  36 ++---
  9 files changed, 123 insertions(+), 122 deletions(-)
  rename drivers/{usb = }/phy/phy-omap-control.c (55%)
  rename include/linux/{usb/omap_control_usb.h = phy/omap_control_phy.h} (68%)

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 1b607d7..fe8c009 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -31,12 +31,22 @@ config PHY_MVEBU_SATA
depends on OF
select GENERIC_PHY

+config OMAP_CONTROL_PHY
+   tristate OMAP CONTROL PHY Driver
+   help
+ Enable this to add support for the PHY part present in the control
+ module. This driver has API to power on the USB2 PHY and to write to
+ the mailbox. The mailbox is present only in omap4 and the register to
+ power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
+ additional register to power on USB3 PHY/SATA PHY/PCIE PHY
+ (PIPE3 PHY).
+
  config OMAP_USB2
tristate OMAP USB2 PHY Driver
depends on ARCH_OMAP2PLUS
depends on USB_PHY
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the transceiver that is part of SOC. This
  driver takes care of all the PHY functionality apart from comparator.
@@ -47,7 +57,7 @@ config TI_PIPE3
tristate TI PIPE3 PHY Driver
depends on ARCH_OMAP2PLUS || COMPILE_TEST
select GENERIC_PHY
-   select OMAP_CONTROL_USB
+   select OMAP_CONTROL_PHY
help
  Enable this to support the PIPE3 PHY that is part of TI SOCs. This
  driver takes care of all the PHY functionality apart from comparator.
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index ecf0d3f..8da05a8 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_BCM_KONA_USB2_PHY) += phy-bcm-kona-usb2.o
  obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
  obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO)   += phy-exynos-mipi-video.o
  obj-$(CONFIG_PHY_MVEBU_SATA)  += phy-mvebu-sata.o
+obj-$(CONFIG_OMAP_CONTROL_PHY) += phy-omap-control.o
  obj-$(CONFIG_OMAP_USB2)   += phy-omap-usb2.o
  obj-$(CONFIG_TI_PIPE3)+= phy-ti-pipe3.o
  obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
diff --git a/drivers/usb/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
similarity index 55%
rename from drivers/usb/phy/phy-omap-control.c
rename to drivers/phy/phy-omap-control.c
index e725318..17fc200 100644
--- a/drivers/usb/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -1,5 +1,5 @@
  /*
- * omap-control-usb.c - The USB part of control module.
+ * omap-control-phy.c - The PHY part of control module.
   *
   * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
   * This program is free software; you can redistribute it and/or modify
@@ -24,36 +24,36 @@
  #include linux/err.h
  #include linux/io.h
  #include linux/clk.h
-#include linux/usb/omap_control_usb.h
+#include linux/phy/omap_control_phy.h

  /**
- * omap_control_usb_phy_power - power on/off the phy using control module reg
+ * omap_control_phy_power - power on/off the phy using control module reg
   * @dev: the control module device
   * @on: 0 or 1, based on powering on or off the PHY
   */
-void omap_control_usb_phy_power(struct device *dev, int on)
+void omap_control_phy_power(struct device *dev, int on)
  {
u32 val;
unsigned long rate;
-   struct omap_control_usb *control_usb;
+   struct omap_control_phy *control_phy;

if (IS_ERR(dev) || !dev) {
pr_err(%s: invalid device\n, __func__);
return;
}

-   control_usb = dev_get_drvdata(dev);
-   if (!control_usb) {
-   dev_err(dev, %s: invalid control usb device\n, 

Re: BUG: USB Reset-Resume Mechanism does not work for runtime resume

2014-03-06 Thread Oliver Neukum
On Thu, 2014-03-06 at 10:20 -0500, Alan Stern wrote:
 On Thu, 6 Mar 2014, Peter Chen wrote:
 
  If the autosuspend supported device can't respond resume correctly, eg,
  after resume, it can't respond GET_STATUS correctly in this case, the
  .reset_resume interface is a must for class driver, it just like a
  workaround for broken hardware.
 
 I agree completely.  Now you just need to convince the btusb
 maintainer.  :-)

If there's a need to reset the device, then we don't know for how
long it was unfunctional and the connection to the network is lost.
There's no point in resuming the device.

In theory we can do it, if the device was down anyway, but even then
no benefit is derived. If a btusb device used reset_resume(),
it would better be reenumerated anyway.

Regards
Oliver



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Re: [PATCH v2 02/13] phy: omap-control: Update DT binding information

2014-03-06 Thread Kishon Vijay Abraham I

Felipe,

On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:

Move omap-control binding information to the right location.

Signed-off-by: Roger Quadros rog...@ti.com
---
  Documentation/devicetree/bindings/phy/ti-phy.txt   | 25 ++


This patch is dependent on

Documentation: dt bindings: move ..usb/usb-phy.txt to
 ..phy/ti-phy.txt

which got merged in your tree. So can you take this patch also?
Acked-by: Kishon Vijay Abraham I kis...@ti.com

Regards
Kishon


  Documentation/devicetree/bindings/usb/omap-usb.txt | 24 -
  2 files changed, 25 insertions(+), 24 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index f671163..5c5b1b0 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -1,5 +1,30 @@
  TI PHY: DT DOCUMENTATION FOR PHYs in TI PLATFORMs

+OMAP CONTROL PHY
+
+Required properties:
+ - compatible: Should be one of
+ ti,control-phy-otghs - if it has otghs_control mailbox register as on OMAP4.
+ ti,control-phy-usb2 - if it has Power down bit in control_dev_conf register
+e.g. USB2_PHY on OMAP5.
+ ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
+e.g. USB3 PHY and SATA PHY on OMAP5.
+ ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+DRA7 platform.
+ ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+AM437 platform.
+ - reg : Address and length of the register set for the device. It contains
+   the address of otghs_control for control-phy-otghs or power register
+   for other types.
+ - reg-names: should be otghs_control control-phy-otghs and power for
+   other types.
+
+omap_control_usb: omap-control-usb@4a002300 {
+compatible = ti,control-phy-otghs;
+reg = 0x4a00233c 0x4;
+reg-names = otghs_control;
+};
+
  OMAP USB2 PHY

  Required properties:
diff --git a/Documentation/devicetree/bindings/usb/omap-usb.txt 
b/Documentation/devicetree/bindings/usb/omap-usb.txt
index c495135..38b2fae 100644
--- a/Documentation/devicetree/bindings/usb/omap-usb.txt
+++ b/Documentation/devicetree/bindings/usb/omap-usb.txt
@@ -76,27 +76,3 @@ omap_dwc3 {
ranges;
  };

-OMAP CONTROL USB
-
-Required properties:
- - compatible: Should be one of
- ti,control-phy-otghs - if it has otghs_control mailbox register as on OMAP4.
- ti,control-phy-usb2 - if it has Power down bit in control_dev_conf register
-   e.g. USB2_PHY on OMAP5.
- ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
-   e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
-   DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
-   AM437 platform.
- - reg : Address and length of the register set for the device. It contains
-   the address of otghs_control for control-phy-otghs or power register
-   for other types.
- - reg-names: should be otghs_control control-phy-otghs and power for
-   other types.
-
-omap_control_usb: omap-control-usb@4a002300 {
-   compatible = ti,control-phy-otghs;
-   reg = 0x4a00233c 0x4;
-   reg-names = otghs_control;
-};


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[PATCH v3] u_ether: move hardware transmit to RX workqueue

2014-03-06 Thread Weinn Jheng
In order to reduce the interrupt times in the embedded system,
a receiving workqueue is introduced.
This modification also enhanced the overall throughput as the
benefits of reducing interrupt occurrence.

Signed-off-by: Weinn Jheng clanlab.p...@gmail.com
Cc: David Brownell dbrown...@users.sourceforge.net
Cc: David S. Miller da...@davemloft.net
Cc: Stephen Hemminger shemmin...@vyatta.com
Cc: Felipe Balbi ba...@ti.com
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
---
Changes for v3:
   - Fix the From: and Signed-off-by: by Greg's remind.

Changes for v2:
   - Remove the whitespace trailer.
   - Reorganize the setup/destroy gether_wq work queue procedure
 into APIs gether_setup and gether_cleanup

 drivers/usb/gadget/u_ether.c | 111 +--
 1 file changed, 76 insertions(+), 35 deletions(-)

diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
index b7d4f82..506f16d 100644
--- a/drivers/usb/gadget/u_ether.c
+++ b/drivers/usb/gadget/u_ether.c
@@ -72,6 +72,7 @@ struct eth_dev {
struct sk_buff_head *list);
 
struct work_struct  work;
+   struct work_struct  rx_work;
 
unsigned long   todo;
 #defineWORK_RX_MEMORY  0
@@ -81,6 +82,8 @@ struct eth_dev {
u8  dev_mac[ETH_ALEN];
 };
 
+static struct workqueue_struct *gether_wq;
+
 /*-*/
 
 #define RX_EXTRA   20  /* bytes guarding against rx overflows */
@@ -253,18 +256,16 @@ enomem:
DBG(dev, rx submit -- %d\n, retval);
if (skb)
dev_kfree_skb_any(skb);
-   spin_lock_irqsave(dev-req_lock, flags);
-   list_add(req-list, dev-rx_reqs);
-   spin_unlock_irqrestore(dev-req_lock, flags);
}
return retval;
 }
 
 static void rx_complete(struct usb_ep *ep, struct usb_request *req)
 {
-   struct sk_buff  *skb = req-context, *skb2;
+   struct sk_buff  *skb = req-context;
struct eth_dev  *dev = ep-driver_data;
int status = req-status;
+   boolrx_queue = 0;
 
switch (status) {
 
@@ -288,30 +289,8 @@ static void rx_complete(struct usb_ep *ep, struct 
usb_request *req)
} else {
skb_queue_tail(dev-rx_frames, skb);
}
-   skb = NULL;
-
-   skb2 = skb_dequeue(dev-rx_frames);
-   while (skb2) {
-   if (status  0
-   || ETH_HLEN  skb2-len
-   || skb2-len  VLAN_ETH_FRAME_LEN) {
-   dev-net-stats.rx_errors++;
-   dev-net-stats.rx_length_errors++;
-   DBG(dev, rx length %d\n, skb2-len);
-   dev_kfree_skb_any(skb2);
-   goto next_frame;
-   }
-   skb2-protocol = eth_type_trans(skb2, dev-net);
-   dev-net-stats.rx_packets++;
-   dev-net-stats.rx_bytes += skb2-len;
-
-   /* no buffer copies needed, unless hardware can't
-* use skb buffers.
-*/
-   status = netif_rx(skb2);
-next_frame:
-   skb2 = skb_dequeue(dev-rx_frames);
-   }
+   if (!status)
+   rx_queue = 1;
break;
 
/* software-driven interface shutdown */
@@ -334,22 +313,20 @@ quiesce:
/* FALLTHROUGH */
 
default:
+   rx_queue = 1;
+   dev_kfree_skb_any(skb);
dev-net-stats.rx_errors++;
DBG(dev, rx status %d\n, status);
break;
}
 
-   if (skb)
-   dev_kfree_skb_any(skb);
-   if (!netif_running(dev-net)) {
 clean:
spin_lock(dev-req_lock);
list_add(req-list, dev-rx_reqs);
spin_unlock(dev-req_lock);
-   req = NULL;
-   }
-   if (req)
-   rx_submit(dev, req, GFP_ATOMIC);
+
+   if (rx_queue)
+   queue_work(gether_wq, dev-rx_work);
 }
 
 static int prealloc(struct list_head *list, struct usb_ep *ep, unsigned n)
@@ -414,16 +391,24 @@ static void rx_fill(struct eth_dev *dev, gfp_t gfp_flags)
 {
struct usb_request  *req;
unsigned long   flags;
+   int rx_counts = 0;
 
/* fill unused rxq slots with some skb */
spin_lock_irqsave(dev-req_lock, flags);
while (!list_empty(dev-rx_reqs)) {
+
+   if (++rx_counts  qlen(dev-gadget, dev-qmult))
+   break;
+
req = container_of(dev-rx_reqs.next,
   

Re: BUG: USB Reset-Resume Mechanism does not work for runtime resume

2014-03-06 Thread Alan Stern
On Thu, 6 Mar 2014, Oliver Neukum wrote:

   This is extremely tricky, almost academical a question.
   We cannot fall back to reset_resume() in this case without
   very bad consequences.
   If remote wakeup is needed, reset_resume() must not be used.
  
  The only alternative is to logically disconnect the device.  But this 
  conflicts with the persist_enabled flag.
 
 In error handling? It seems to me that persist_enabled is a declaration
 of a goal. What the consequences of reaching that
 goal should be is a legitimate question.
 
   It seems to me that the bug in this case is the fallback itself.
   From a design viewpoint is probably wrong the unbind a device
   in the runtime case. We'd better notify the driver in every case.
   If you unbind and rebind you just risk getting into a tight loop.
  
  In this case, turning off the persist flag might help:
  
  echo 0 /sys/bus/usb/devices/.../power/persist
 
 But in case remote wakeup is not requested the device
 should persist.

Then you're suggesting something like this in finish_port_resume()?

status = usb_get_status(udev, USB_RECIP_DEVICE, 0, devstatus);

-   /* If a normal resume failed, try doing a reset-resume */
-   if (status  !udev-reset_resume  udev-persist_enabled) {
+   /*
+* If a normal resume failed and remote wakeup is disabled,
+* try doing a reset-resume.
+*/
+   if (status  !udev-reset_resume  !udev-do_remote_wakeup 
+   udev-persist_enabled) {
dev_dbg(udev-dev, retry with reset-resume\n);
udev-reset_resume = 1;
goto retry_reset_resume;

Are there any wakeup-enabled devices that this will mess up?

Alan Stern

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Re: USB remote wakeup through gpio interrupt

2014-03-06 Thread Alan Stern
On Thu, 6 Mar 2014, Jagdish Gedia wrote:

 Hi Alan,
 
 As you have told, i have executed pm_request_resume() function from my
 interrupt handler, and it is waking up my USB device. I have
 implemented all this functionality in class driver(cdc-acm.c).
 but what is happening is after 2-3 times, ausosuspend is getting
 disable for my device. I want autosuspend to be enabled for usb device
 forever. Do pm_request_resume function causes this behavior?

No.  The various versions of pm_runtime_get will cause it, though, if 
they aren't balanced by some form of pm_runtime_put.

Alan Stern

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Re: [PATCH v2 04/13] phy: ti-pipe3: cleanup clock handling

2014-03-06 Thread Kishon Vijay Abraham I

Roger,

On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:

As this driver is no longer USB specific, use generic clock names.
- Use 'wkupclk', 'sysclk' and 'refclk' clock-names. Update DT binding info.
- Fix PLL_SD_SHIFT from 9 to 10
- Don't separate prepare/unprepare clock from enable/disable. This
ensures optimal power savings.

Update omap5 usb3_phy device tree node.

CC: Benoît Cousson bcous...@baylibre.com
CC: Tony Lindgren t...@atomide.com
Signed-off-by: Roger Quadros rog...@ti.com
---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 12 ++
  arch/arm/boot/dts/omap5.dtsi |  7 ++-
  drivers/phy/phy-ti-pipe3.c   | 55 


Here you have to split the patch. omap5.dtsi should be a separate patch 
to Tony. I could take only phy-ti-pipe3.c again since ti-phy.txt is only 
in Felipe's branch.


Regards
Kishon


  3 files changed, 46 insertions(+), 28 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 28e674b..8d13349 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -59,6 +59,12 @@ Required properties:
 filled in reg.
   - #phy-cells: determine the number of cells that should be given in the
 phandle while referencing this phy.
+ - clocks: a list of phandles and clock-specifier pairs, one for each entry in
+   clock-names.
+ - clock-names: should include:
+   * wkupclk - wakup clock.
+   * sysclk - system clock.
+   * refclk - reference clock.

  Optional properties:
   - ctrl-module : phandle of the control module used by PHY driver to power on
@@ -74,4 +80,10 @@ usb3phy@4a084400 {
reg-names = phy_rx, phy_tx, pll_ctrl;
ctrl-module = omap_control_usb;
#phy-cells = 0;
+   clocks = usb_phy_cm_clk32k,
+sys_clkin,
+usb_otg_ss_refclk960m;
+   clock-names =   wkupclk,
+   sysclk,
+   refclk;
  };
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 859a800..e47601a 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -778,7 +778,12 @@
  0x4a084800 0x64,
  0x4a084c00 0x40;
reg-names = phy_rx, phy_tx, pll_ctrl;
-   ctrl-module = omap_control_usb3phy;
+   clocks = usb_phy_cm_clk32k,
+sys_clkin,
+usb_otg_ss_refclk960m;
+   clock-names =   wkupclk,
+   sysclk,
+   refclk;
#phy-cells = 0;
};
};
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index fd029b1..211703c 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -45,7 +45,7 @@
  #define   PLL_SELFREQDCO_MASK 0x000E
  #define   PLL_SELFREQDCO_SHIFT0x1
  #define   PLL_SD_MASK 0x0003FC00
-#definePLL_SD_SHIFT0x9
+#definePLL_SD_SHIFT10
  #define   SET_PLL_GO  0x1
  #define   PLL_TICOPWDN0x1
  #define   PLL_LOCK0x2
@@ -72,7 +72,7 @@ struct ti_pipe3 {
struct device   *control_dev;
struct clk  *wkupclk;
struct clk  *sys_clk;
-   struct clk  *optclk;
+   struct clk  *refclk;
  };

  struct pipe3_dpll_map {
@@ -270,23 +270,21 @@ static int ti_pipe3_probe(struct platform_device *pdev)

phy-dev = pdev-dev;

-   phy-wkupclk = devm_clk_get(phy-dev, usb_phy_cm_clk32k);
+   phy-wkupclk = devm_clk_get(phy-dev, wkupclk);
if (IS_ERR(phy-wkupclk)) {
-   dev_err(pdev-dev, unable to get usb_phy_cm_clk32k\n);
+   dev_err(pdev-dev, unable to get wkupclk\n);
return PTR_ERR(phy-wkupclk);
}
-   clk_prepare(phy-wkupclk);

-   phy-optclk = devm_clk_get(phy-dev, usb_otg_ss_refclk960m);
-   if (IS_ERR(phy-optclk)) {
-   dev_err(pdev-dev, unable to get usb_otg_ss_refclk960m\n);
-   return PTR_ERR(phy-optclk);
+   phy-refclk = devm_clk_get(phy-dev, refclk);
+   if (IS_ERR(phy-refclk)) {
+   dev_err(pdev-dev, unable to get refclk\n);
+   return PTR_ERR(phy-refclk);
}
-   clk_prepare(phy-optclk);

-   phy-sys_clk = devm_clk_get(phy-dev, sys_clkin);
+   phy-sys_clk = devm_clk_get(phy-dev, sysclk);
if (IS_ERR(phy-sys_clk)) {
-   pr_err(%s: unable to get sys_clkin\n, __func__);
+   dev_err(pdev-dev, unable to get sysclk\n);
  

Re: [PATCH v2 05/13] phy: ti-pipe3: Add SATA DPLL support

2014-03-06 Thread Kishon Vijay Abraham I



On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:

USB and SATA DPLLs need different settings. Provide
the SATA DPLL settings and use the proper DPLL settings
based on device tree node's compatible_id.

Update the DT binding information.

Signed-off-by: Roger Quadros rog...@ti.com
---
  Documentation/devicetree/bindings/phy/ti-phy.txt |  3 +-
  drivers/phy/phy-ti-pipe3.c   | 76 +---


same here..

-Kishon

  2 files changed, 57 insertions(+), 22 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 8d13349..2c2d66a 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -53,7 +53,8 @@ usb2phy@4a0ad080 {
  TI PIPE3 PHY

  Required properties:
- - compatible: Should be ti,phy-usb3. ti,omap-usb3 is deprecated.
+ - compatible: Should be ti,phy-usb3 or ti,phy-pipe3-sata.
+   ti,omap-usb3 is deprecated.
   - reg : Address and length of the register set for the device.
   - reg-names: The names of the register addresses corresponding to the 
registers
 filled in reg.
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 211703c..f141237 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -66,6 +66,11 @@ struct pipe3_dpll_params {
u32 mf;
  };

+struct pipe3_dpll_map {
+   unsigned long rate;
+   struct pipe3_dpll_params params;
+};
+
  struct ti_pipe3 {
void __iomem*pll_ctrl_base;
struct device   *dev;
@@ -73,20 +78,27 @@ struct ti_pipe3 {
struct clk  *wkupclk;
struct clk  *sys_clk;
struct clk  *refclk;
+   struct pipe3_dpll_map   *dpll_map;
  };

-struct pipe3_dpll_map {
-   unsigned long rate;
-   struct pipe3_dpll_params params;
-};
-
-static struct pipe3_dpll_map dpll_map[] = {
+static struct pipe3_dpll_map dpll_map_usb[] = {
{1200, {1250, 5, 4, 20, 0} },   /* 12 MHz */
{1680, {3125, 20, 4, 20, 0} },  /* 16.8 MHz */
{1920, {1172, 8, 4, 20, 65537} },   /* 19.2 MHz */
{2000, {1000, 7, 4, 10, 0} },   /* 20 MHz */
{2600, {1250, 12, 4, 20, 0} },  /* 26 MHz */
{3840, {3125, 47, 4, 20, 92843} },  /* 38.4 MHz */
+   { },/* Terminator */
+};
+
+static struct pipe3_dpll_map dpll_map_sata[] = {
+   {1200, {1000, 7, 4, 6, 0} },/* 12 MHz */
+   {1680, {714, 7, 4, 6, 0} }, /* 16.8 MHz */
+   {1920, {625, 7, 4, 6, 0} }, /* 19.2 MHz */
+   {2000, {600, 7, 4, 6, 0} }, /* 20 MHz */
+   {2600, {461, 7, 4, 6, 0} }, /* 26 MHz */
+   {3840, {312, 7, 4, 6, 0} }, /* 38.4 MHz */
+   { },/* Terminator */
  };

  static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
@@ -100,15 +112,20 @@ static inline void ti_pipe3_writel(void __iomem *addr, 
unsigned offset,
__raw_writel(data, addr + offset);
  }

-static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
+static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(struct ti_pipe3 *phy)
  {
-   int i;
+   unsigned long rate;
+   struct pipe3_dpll_map *dpll_map = phy-dpll_map;

-   for (i = 0; i  ARRAY_SIZE(dpll_map); i++) {
-   if (rate == dpll_map[i].rate)
-   return dpll_map[i].params;
+   rate = clk_get_rate(phy-sys_clk);
+
+   for (; dpll_map-rate; dpll_map++) {
+   if (rate == dpll_map-rate)
+   return dpll_map-params;
}

+   dev_err(phy-dev, No DPLL configuration for %lu Hz SYS CLK\n, rate);
+
return NULL;
  }

@@ -182,16 +199,11 @@ static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
  static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
  {
u32 val;
-   unsigned long   rate;
struct pipe3_dpll_params *dpll_params;

-   rate = clk_get_rate(phy-sys_clk);
-   dpll_params = ti_pipe3_get_dpll_params(rate);
-   if (!dpll_params) {
-   dev_err(phy-dev,
- No DPLL configuration for %lu Hz SYS CLK\n, rate);
+   dpll_params = ti_pipe3_get_dpll_params(phy);
+   if (!dpll_params)
return -EINVAL;
-   }

val = ti_pipe3_readl(phy-pll_ctrl_base, PLL_CONFIGURATION1);
val = ~PLL_REGN_MASK;
@@ -244,6 +256,10 @@ static struct phy_ops ops = {
.owner  = THIS_MODULE,
  };

+#ifdef CONFIG_OF
+static const struct of_device_id ti_pipe3_id_table[];
+#endif
+
  static int ti_pipe3_probe(struct platform_device *pdev)
  {
struct ti_pipe3 *phy;
@@ -253,8 +269,10 @@ static int ti_pipe3_probe(struct platform_device *pdev)
struct device_node *node = pdev-dev.of_node;
 

Re: [PATCH v2 03/13] phy: omap-control: update dra7 and am437 usb2 bindings

2014-03-06 Thread Kishon Vijay Abraham I

Felipe,

On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:

The dra7-usb2 and am437-usb2 bindings have not yet been used.
Change them to be more elegant.

Signed-off-by: Roger Quadros rog...@ti.com
---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--


Here too..
Acked-by: Kishon Vijay Abraham I kis...@ti.com

Regards
Kishon

  drivers/phy/phy-omap-control.c   | 4 ++--
  2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 5c5b1b0..28e674b 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -9,9 +9,9 @@ Required properties:
  e.g. USB2_PHY on OMAP5.
   ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
  e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-dra7-usb2 - if it has power down register like USB2 PHY on
  DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-am437-usb2 - if it has power down register like USB2 PHY on
  AM437 platform.
   - reg : Address and length of the register set for the device. It contains
 the address of otghs_control for control-phy-otghs or power register
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
index 17fc200..a7e2d7f 100644
--- a/drivers/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -228,11 +228,11 @@ static const struct of_device_id 
omap_control_phy_id_table[] = {
.data = pipe3_data,
},
{
-   .compatible = ti,control-phy-dra7usb2,
+   .compatible = ti,control-phy-dra7-usb2,
.data = dra7usb2_data,
},
{
-   .compatible = ti,control-phy-am437usb2,
+   .compatible = ti,control-phy-am437-usb2,
.data = am437usb2_data,
},
{},


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Re: [PATCH 1/4] usb: chipidea: switch over to endpoint feature flags

2014-03-06 Thread Felipe Balbi
On Thu, Mar 06, 2014 at 08:55:55AM +, Peter Chen wrote:
 
 
  
  switch over to endpoint feature flags so we can drop naming conventions.
  
  Signed-off-by: Felipe Balbi ba...@ti.com
  ---
   drivers/usb/chipidea/udc.c | 7 +++
   1 file changed, 7 insertions(+)
  
  diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
  index 80de2f8..e80dc82 100644
  --- a/drivers/usb/chipidea/udc.c
  +++ b/drivers/usb/chipidea/udc.c
  @@ -1576,6 +1576,13 @@ static int init_eps(struct ci_hdrc *ci)
  
  hwep-ep.name  = hwep-name;
  hwep-ep.ops   = usb_ep_ops;
  +
  +   hwep-ep.has_bulk = true;
  +   hwep-ep.has_interrupt = true;
  +   hwep-ep.has_isochronous = true;
  +   hwep-ep.has_dir_in = (j == TX);
  +   hwep-ep.has_dir_out = (j == RX);
  +
  /*
 
 I find your usb: gadget: ep: add feature flags is at Linux-next,
 but not at greg's usb-next, does it need for 3.15?

I dropped it from v3.15, will send it for v3.16

-- 
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Re: [PATCH v2 01/13] phy: rename struct omap_control_usb to struct omap_control_phy

2014-03-06 Thread Felipe Balbi
On Thu, Mar 06, 2014 at 09:07:56PM +0530, Kishon Vijay Abraham I wrote:
 Felipe,
 
 On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:
 From: Kishon Vijay Abraham I kis...@ti.com
 
 Rename struct omap_control_usb to struct omap_control_phy since it can
 be used to control PHY of USB, SATA and PCIE. Also move the driver and
 include files under *phy* and made the corresponding changes in the users
 of phy-omap-control.
 
 Signed-off-by: Kishon Vijay Abraham I kis...@ti.com
 Signed-off-by: Roger Quadros rog...@ti.com
 ---
   drivers/phy/Kconfig|  14 +-
   drivers/phy/Makefile   |   1 +
   drivers/{usb = }/phy/phy-omap-control.c   | 165 
  +++--
   drivers/phy/phy-omap-usb2.c|   8 +-
   drivers/phy/phy-ti-pipe3.c |   8 +-
   drivers/usb/musb/omap2430.c|   2 +-
   drivers/usb/phy/Kconfig|  10 --
   drivers/usb/phy/Makefile   |   1 -
 
 Hope you are fine with the changes in drivers/usb/? Can you give your
 Acked-by?

sure thing:

Acked-by: Felipe Balbi ba...@ti.com

-- 
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Re: [PATCH v2 02/13] phy: omap-control: Update DT binding information

2014-03-06 Thread Felipe Balbi
On Thu, Mar 06, 2014 at 09:10:27PM +0530, Kishon Vijay Abraham I wrote:
 Felipe,
 
 On Thursday 06 March 2014 08:08 PM, Roger Quadros wrote:
 Move omap-control binding information to the right location.
 
 Signed-off-by: Roger Quadros rog...@ti.com
 ---
   Documentation/devicetree/bindings/phy/ti-phy.txt   | 25 
  ++
 
 This patch is dependent on
 
 Documentation: dt bindings: move ..usb/usb-phy.txt to
  ..phy/ti-phy.txt
 
 which got merged in your tree. So can you take this patch also?
 Acked-by: Kishon Vijay Abraham I kis...@ti.com

done

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Re: [PATCH v2 03/13] phy: omap-control: update dra7 and am437 usb2 bindings

2014-03-06 Thread Felipe Balbi
On Thu, Mar 06, 2014 at 04:38:39PM +0200, Roger Quadros wrote:
 The dra7-usb2 and am437-usb2 bindings have not yet been used.
 Change them to be more elegant.
 
 Signed-off-by: Roger Quadros rog...@ti.com
 ---
  Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--
  drivers/phy/phy-omap-control.c   | 4 ++--
  2 files changed, 4 insertions(+), 4 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
 b/Documentation/devicetree/bindings/phy/ti-phy.txt
 index 5c5b1b0..28e674b 100644
 --- a/Documentation/devicetree/bindings/phy/ti-phy.txt
 +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
 @@ -9,9 +9,9 @@ Required properties:
  e.g. USB2_PHY on OMAP5.
   ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
  e.g. USB3 PHY and SATA PHY on OMAP5.
 - ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
 + ti,control-phy-dra7-usb2 - if it has power down register like USB2 PHY on
  DRA7 platform.
 - ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
 + ti,control-phy-am437-usb2 - if it has power down register like USB2 PHY on
  AM437 platform.
   - reg : Address and length of the register set for the device. It contains
 the address of otghs_control for control-phy-otghs or power register

I can take the Documentation part (which I've just done) but...

 diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
 index 17fc200..a7e2d7f 100644
 --- a/drivers/phy/phy-omap-control.c
 +++ b/drivers/phy/phy-omap-control.c
 @@ -228,11 +228,11 @@ static const struct of_device_id 
 omap_control_phy_id_table[] = {
   .data = pipe3_data,
   },
   {
 - .compatible = ti,control-phy-dra7usb2,
 + .compatible = ti,control-phy-dra7-usb2,
   .data = dra7usb2_data,
   },
   {
 - .compatible = ti,control-phy-am437usb2,
 + .compatible = ti,control-phy-am437-usb2,
   .data = am437usb2_data,
   },
   {},

I don't have this file in my tree ;-)

-- 
balbi


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[PATCH v3] phy: omap-control: update dra7 and am437 usb2 Documentation bindings

2014-03-06 Thread Felipe Balbi
From: Roger Quadros rog...@ti.com

The dra7-usb2 and am437-usb2 bindings have not yet been used.
Change them to be more elegant.

Acked-by: Kishon Vijay Abraham I kis...@ti.com
Signed-off-by: Roger Quadros rog...@ti.com
Signed-off-by: Felipe Balbi ba...@ti.com
---

Here's updated patch with only Documentation. Tell me if it's ok to apply.

 Documentation/devicetree/bindings/phy/ti-phy.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt 
b/Documentation/devicetree/bindings/phy/ti-phy.txt
index 41dc132..8694aae 100644
--- a/Documentation/devicetree/bindings/phy/ti-phy.txt
+++ b/Documentation/devicetree/bindings/phy/ti-phy.txt
@@ -9,9 +9,9 @@ Required properties:
 e.g. USB2_PHY on OMAP5.
  ti,control-phy-pipe3 - if it has DPLL and individual Rx  Tx power control
 e.g. USB3 PHY and SATA PHY on OMAP5.
- ti,control-phy-dra7usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-dra7-usb2 - if it has power down register like USB2 PHY on
 DRA7 platform.
- ti,control-phy-am437usb2 - if it has power down register like USB2 PHY on
+ ti,control-phy-am437-usb2 - if it has power down register like USB2 PHY on
 AM437 platform.
  - reg : Address and length of the register set for the device. It contains
the address of otghs_control for control-phy-otghs or power register
-- 
1.9.0

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Re: [PATCH v3] u_ether: move hardware transmit to RX workqueue

2014-03-06 Thread Felipe Balbi
Hi,

On Thu, Mar 06, 2014 at 11:42:49PM +0800, Weinn Jheng wrote:
 In order to reduce the interrupt times in the embedded system,
 a receiving workqueue is introduced.
 This modification also enhanced the overall throughput as the
 benefits of reducing interrupt occurrence.
 
 Signed-off-by: Weinn Jheng clanlab.p...@gmail.com
 Cc: David Brownell dbrown...@users.sourceforge.net
 Cc: David S. Miller da...@davemloft.net

Dave, does this look ok from NAPI point of view ?

 Cc: Stephen Hemminger shemmin...@vyatta.com
 Cc: Felipe Balbi ba...@ti.com
 Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
 ---
 Changes for v3:
- Fix the From: and Signed-off-by: by Greg's remind.
 
 Changes for v2:
- Remove the whitespace trailer.
- Reorganize the setup/destroy gether_wq work queue procedure
  into APIs gether_setup and gether_cleanup
 
  drivers/usb/gadget/u_ether.c | 111 
 +--
  1 file changed, 76 insertions(+), 35 deletions(-)
 
 diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c
 index b7d4f82..506f16d 100644
 --- a/drivers/usb/gadget/u_ether.c
 +++ b/drivers/usb/gadget/u_ether.c
 @@ -72,6 +72,7 @@ struct eth_dev {
   struct sk_buff_head *list);
  
   struct work_struct  work;
 + struct work_struct  rx_work;
  
   unsigned long   todo;
  #define  WORK_RX_MEMORY  0
 @@ -81,6 +82,8 @@ struct eth_dev {
   u8  dev_mac[ETH_ALEN];
  };
  
 +static struct workqueue_struct   *gether_wq;
 +
  /*-*/
  
  #define RX_EXTRA 20  /* bytes guarding against rx overflows */
 @@ -253,18 +256,16 @@ enomem:
   DBG(dev, rx submit -- %d\n, retval);
   if (skb)
   dev_kfree_skb_any(skb);
 - spin_lock_irqsave(dev-req_lock, flags);
 - list_add(req-list, dev-rx_reqs);
 - spin_unlock_irqrestore(dev-req_lock, flags);
   }
   return retval;
  }
  
  static void rx_complete(struct usb_ep *ep, struct usb_request *req)
  {
 - struct sk_buff  *skb = req-context, *skb2;
 + struct sk_buff  *skb = req-context;
   struct eth_dev  *dev = ep-driver_data;
   int status = req-status;
 + boolrx_queue = 0;
  
   switch (status) {
  
 @@ -288,30 +289,8 @@ static void rx_complete(struct usb_ep *ep, struct 
 usb_request *req)
   } else {
   skb_queue_tail(dev-rx_frames, skb);
   }
 - skb = NULL;
 -
 - skb2 = skb_dequeue(dev-rx_frames);
 - while (skb2) {
 - if (status  0
 - || ETH_HLEN  skb2-len
 - || skb2-len  VLAN_ETH_FRAME_LEN) {
 - dev-net-stats.rx_errors++;
 - dev-net-stats.rx_length_errors++;
 - DBG(dev, rx length %d\n, skb2-len);
 - dev_kfree_skb_any(skb2);
 - goto next_frame;
 - }
 - skb2-protocol = eth_type_trans(skb2, dev-net);
 - dev-net-stats.rx_packets++;
 - dev-net-stats.rx_bytes += skb2-len;
 -
 - /* no buffer copies needed, unless hardware can't
 -  * use skb buffers.
 -  */
 - status = netif_rx(skb2);
 -next_frame:
 - skb2 = skb_dequeue(dev-rx_frames);
 - }
 + if (!status)
 + rx_queue = 1;
   break;
  
   /* software-driven interface shutdown */
 @@ -334,22 +313,20 @@ quiesce:
   /* FALLTHROUGH */
  
   default:
 + rx_queue = 1;
 + dev_kfree_skb_any(skb);
   dev-net-stats.rx_errors++;
   DBG(dev, rx status %d\n, status);
   break;
   }
  
 - if (skb)
 - dev_kfree_skb_any(skb);
 - if (!netif_running(dev-net)) {
  clean:
   spin_lock(dev-req_lock);
   list_add(req-list, dev-rx_reqs);
   spin_unlock(dev-req_lock);
 - req = NULL;
 - }
 - if (req)
 - rx_submit(dev, req, GFP_ATOMIC);
 +
 + if (rx_queue)
 + queue_work(gether_wq, dev-rx_work);
  }
  
  static int prealloc(struct list_head *list, struct usb_ep *ep, unsigned n)
 @@ -414,16 +391,24 @@ static void rx_fill(struct eth_dev *dev, gfp_t 
 gfp_flags)
  {
   struct usb_request  *req;
   unsigned long   flags;
 + int rx_counts = 0;
  
   /* fill unused rxq slots with some skb */
   spin_lock_irqsave(dev-req_lock, flags);
   while (!list_empty(dev-rx_reqs)) {
 +
 + if (++rx_counts  qlen(dev-gadget, dev-qmult))
 + 

Re: [PATCH 01/12] staging: usbip: userspace: migrate usbip_bind to libudev

2014-03-06 Thread Shuah Khan

On 03/04/2014 12:10 PM, Valentina Manea wrote:

This patch adds autoconf check for libudev and migrates
usbip_bind to the new library.

libsysfs will still be used until all userspace is modified.

Signed-off-by: Valentina Manea valentina.mane...@gmail.com
---
  drivers/staging/usbip/userspace/configure.ac   |   6 +
  .../staging/usbip/userspace/libsrc/usbip_common.h  |   9 ++
  drivers/staging/usbip/userspace/src/Makefile.am|   3 +-
  drivers/staging/usbip/userspace/src/sysfs_utils.c  |  36 +
  drivers/staging/usbip/userspace/src/sysfs_utils.h  |   8 ++
  drivers/staging/usbip/userspace/src/usbip_bind.c   | 149 +
  drivers/staging/usbip/userspace/src/utils.c|  51 +++
  7 files changed, 136 insertions(+), 126 deletions(-)
  create mode 100644 drivers/staging/usbip/userspace/src/sysfs_utils.c
  create mode 100644 drivers/staging/usbip/userspace/src/sysfs_utils.h

diff --git a/drivers/staging/usbip/userspace/configure.ac 
b/drivers/staging/usbip/userspace/configure.ac
index 0ee5d92..a5193c6 100644
--- a/drivers/staging/usbip/userspace/configure.ac
+++ b/drivers/staging/usbip/userspace/configure.ac
@@ -50,6 +50,12 @@ AC_CHECK_HEADER([sysfs/libsysfs.h],
  [AC_MSG_ERROR([Missing sysfs2 library!])])],
[AC_MSG_ERROR([Missing /usr/include/sysfs/libsysfs.h])])

+AC_CHECK_HEADER([libudev.h],
+   [AC_CHECK_LIB([udev], [udev_new],
+ [LIBS=$LIBS -ludev],
+ [AC_MSG_ERROR([Missing udev library!])])],
+   [AC_MSG_ERROR([Missing /usr/include/libudev.h])])
+
  # Checks for libwrap library.
  AC_MSG_CHECKING([whether to use the libwrap (TCP wrappers) library])
  AC_ARG_WITH([tcp-wrappers],
diff --git a/drivers/staging/usbip/userspace/libsrc/usbip_common.h 
b/drivers/staging/usbip/userspace/libsrc/usbip_common.h
index 2cb81b3..565ac78 100644
--- a/drivers/staging/usbip/userspace/libsrc/usbip_common.h
+++ b/drivers/staging/usbip/userspace/libsrc/usbip_common.h
@@ -29,6 +29,15 @@
  #define USBIP_HOST_DRV_NAME   usbip-host
  #define USBIP_VHCI_DRV_NAME   vhci_hcd

+/* sysfs constants */
+#define SYSFS_MNT_PATH /sys
+#define SYSFS_BUS_NAME bus
+#define SYSFS_BUS_TYPE usb
+#define SYSFS_DRIVERS_NAME drivers
+
+#define SYSFS_PATH_MAX 256
+#define SYSFS_BUS_ID_SIZE  32


I wish we have some global defines we could use.


+
  extern int usbip_use_syslog;
  extern int usbip_use_stderr;
  extern int usbip_use_debug ;
diff --git a/drivers/staging/usbip/userspace/src/Makefile.am 
b/drivers/staging/usbip/userspace/src/Makefile.am
index b4f8c4b..6c91bcb 100644
--- a/drivers/staging/usbip/userspace/src/Makefile.am
+++ b/drivers/staging/usbip/userspace/src/Makefile.am
@@ -6,7 +6,8 @@ sbin_PROGRAMS := usbip usbipd

  usbip_SOURCES := usbip.h utils.h usbip.c utils.c usbip_network.c \
 usbip_attach.c usbip_detach.c usbip_list.c \
-usbip_bind.c usbip_unbind.c usbip_port.c
+usbip_bind.c usbip_unbind.c usbip_port.c \
+sysfs_utils.c


  usbipd_SOURCES := usbip_network.h usbipd.c usbip_network.c
diff --git a/drivers/staging/usbip/userspace/src/sysfs_utils.c 
b/drivers/staging/usbip/userspace/src/sysfs_utils.c
new file mode 100644
index 000..2c362d1
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/sysfs_utils.c
@@ -0,0 +1,36 @@
+#include sys/types.h
+#include sys/stat.h
+#include fcntl.h
+#include errno.h
+
+#include sysfs_utils.h
+#include usbip_common.h
+
+int write_sysfs_attribute(const char *attr_path, const char *new_value,
+ size_t len)
+{
+   int fd;
+   int length;
+
+   if (attr_path == NULL || new_value == NULL || len == 0) {
+   dbg(Invalid values provided for attribute %s., attr_path);
+   errno = EINVAL;
+   return -1;
+   }
+
+   if ((fd = open(attr_path, O_WRONLY))  0) {
+   dbg(Error opening attribute %s., attr_path);
+   return -1;
+   }
+
+   length = write(fd, new_value, len);
+   if (length  0) {
+   dbg(Error writing to attribute %s., attr_path);
+   close(fd);
+   return -1;
+   }
+
+   close(fd);
+
+   return 0;
+}
diff --git a/drivers/staging/usbip/userspace/src/sysfs_utils.h 
b/drivers/staging/usbip/userspace/src/sysfs_utils.h
new file mode 100644
index 000..32ac1d1
--- /dev/null
+++ b/drivers/staging/usbip/userspace/src/sysfs_utils.h
@@ -0,0 +1,8 @@
+
+#ifndef __SYSFS_UTILS_H
+#define __SYSFS_UTILS_H
+
+int write_sysfs_attribute(const char *attr_path, const char *new_value,
+ size_t len);
+
+#endif
diff --git a/drivers/staging/usbip/userspace/src/usbip_bind.c 
b/drivers/staging/usbip/userspace/src/usbip_bind.c
index 8cfd2db..d122089 100644
--- a/drivers/staging/usbip/userspace/src/usbip_bind.c
+++ b/drivers/staging/usbip/userspace/src/usbip_bind.c
@@ -16,7 

Re: [PATCH] staging: usbip: userspace: increase version to 2.0

2014-03-06 Thread Greg KH
On Wed, Mar 05, 2014 at 11:30:06PM -0800, Andrew Grover wrote:
 On Wed, Mar 5, 2014 at 10:14 PM, Valentina Manea
 valentina.mane...@gmail.com wrote:
  On Tue, Mar 4, 2014 at 9:20 PM, Greg KH gre...@linuxfoundation.org wrote:
  On Tue, Mar 04, 2014 at 09:16:39PM +0200, Valentina Manea wrote:
  -AC_INIT([usbip-utils], [1.1.1], [linux-usb@vger.kernel.org])
  +AC_INIT([usbip-utils], [2.0], [linux-usb@vger.kernel.org])
 
  Why?
 
  What does this mean?  What warrents the version change?  Why have a
  version at all?
 
  This was part of an effort to refresh USB/IP by moving userspace out
  of kernel.git.
  Since some major changes have been made (libudev migration), Andy (cc'ed) 
  and me
  thought it was worth to be promoted to version 2.0.
 
 (sorry, resending in plain text mode so vger doesn't bounce (curse you
 gmail :-))
 
 Valentina did considerable work in moving usbip-utils from using the
 defunct libsysfs to libudev (well, part of systemd now it seems.) so
 some version bump seems appropriate, why not to 2.0? esp. as a
 heads-up to pkg maintainers - btw usbip-utils is already packaged for
 Debian, and I could probably see it in Fedora too, why not.
 
 As to why have a version at all, this is of course tied to whether
 usbip-utils will ever emerge from the belly of the whale and return to
 its own home. I think it should someday, if the concerns about
 long-term maintenance and interface stability can be addressed to your
 satisfaction. It would be considerable work to integrate it into the
 kernel build, and would need to be undone if it ever left kernel.git.

One big confusion this patch caused, is that it showed up on its own
before the libudev rewrite in my inbox.  So all I see is this patch
incrementing the version for no real reason.

Valentina, please always order all of your patches so I know which order
in which to apply them in.  I see a bunch of follow-on patches after
your larger series, what order should they be applied in?  Can you just
resend _all_ of these, and number them in the correct order in which
they need to be applied in, so I know exactly what to do here?

thanks,

greg k-h
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Re: [PATCH 03/12] staging: usbip: userspace: migrate usbip_unbind to libudev

2014-03-06 Thread Shuah Khan

On 03/04/2014 12:10 PM, Valentina Manea wrote:

This patch modifies usbip_unbind to use libudev.

Signed-off-by: Valentina Manea valentina.mane...@gmail.com
---
  drivers/staging/usbip/userspace/src/usbip_unbind.c | 92 +++---
  1 file changed, 29 insertions(+), 63 deletions(-)

diff --git a/drivers/staging/usbip/userspace/src/usbip_unbind.c 
b/drivers/staging/usbip/userspace/src/usbip_unbind.c
index cace878..4776068 100644
--- a/drivers/staging/usbip/userspace/src/usbip_unbind.c
+++ b/drivers/staging/usbip/userspace/src/usbip_unbind.c
@@ -16,7 +16,7 @@
   * along with this program. If not, see http://www.gnu.org/licenses/.
   */

-#include sysfs/libsysfs.h
+#include libudev.h

  #include errno.h
  #include stdio.h
@@ -27,6 +27,7 @@
  #include usbip_common.h
  #include utils.h
  #include usbip.h
+#include sysfs_utils.h

  static const char usbip_unbind_usage_string[] =
usbip unbind args\n
@@ -41,92 +42,57 @@ void usbip_unbind_usage(void)
  static int unbind_device(char *busid)
  {
char bus_type[] = usb;
-   struct sysfs_driver *usbip_host_drv;
-   struct sysfs_device *dev;
-   struct dlist *devlist;
-   int verified = 0;
int rc, ret = -1;

char attr_name[] = unbind;
-   char sysfs_mntpath[SYSFS_PATH_MAX];
char unbind_attr_path[SYSFS_PATH_MAX];
-   struct sysfs_attribute *unbind_attr;
-
-   /* verify the busid device is using usbip-host */
-   usbip_host_drv = sysfs_open_driver(bus_type, USBIP_HOST_DRV_NAME);
-   if (!usbip_host_drv) {
-   err(could not open %s driver: %s, USBIP_HOST_DRV_NAME,
-   strerror(errno));
-   return -1;
-   }

-   devlist = sysfs_get_driver_devices(usbip_host_drv);
-   if (!devlist) {
-   err(%s is not in use by any devices, USBIP_HOST_DRV_NAME);
-   goto err_close_usbip_host_drv;
-   }
+   struct udev *udev;
+   struct udev_device *dev;
+   const char *driver;

-   dlist_for_each_data(devlist, dev, struct sysfs_device) {
-   if (!strncmp(busid, dev-name, strlen(busid)) 
-   !strncmp(dev-driver_name, USBIP_HOST_DRV_NAME,
-strlen(USBIP_HOST_DRV_NAME))) {
-   verified = 1;
-   break;
-   }
-   }
+   /* Create libudev context. */
+   udev = udev_new();

-   if (!verified) {
-   err(device on busid %s is not using %s, busid,
-   USBIP_HOST_DRV_NAME);
-   goto err_close_usbip_host_drv;
+   /* Check whether the device with this bus ID exists. */
+   dev = udev_device_new_from_subsystem_sysname(udev, usb, busid);
+   if (!dev) {
+   err(Device with the specified bus ID does not exist.);
+   goto err_close_udev;
}

-   /*
-* NOTE: A read and write of an attribute value of the device busid
-* refers to must be done to start probing. That way a rebind of the
-* default driver for the device occurs.
-*
-* This seems very hackish and adds a lot of pointless code. I think it
-* should be done in the kernel by the driver after del_match_busid is
-* finished!
-*/
-
-   rc = sysfs_get_mnt_path(sysfs_mntpath, SYSFS_PATH_MAX);
-   if (rc  0) {
-   err(sysfs must be mounted: %s, strerror(errno));
-   return -1;
+   /* Check whether the device is using usbip-host driver. */
+   driver = udev_device_get_driver(dev);
+   if (!driver || strcmp(driver, usbip-host)) {
+   err(Device is not bound to usbip-host driver.);
+   goto err_close_udev;
}

+   /* Unbind device from driver. */
snprintf(unbind_attr_path, sizeof(unbind_attr_path), 
%s/%s/%s/%s/%s/%s,
-sysfs_mntpath, SYSFS_BUS_NAME, bus_type, SYSFS_DRIVERS_NAME,
+SYSFS_MNT_PATH, SYSFS_BUS_NAME, bus_type, SYSFS_DRIVERS_NAME,
 USBIP_HOST_DRV_NAME, attr_name);
+   dbg(unbind attribute path: %s, unbind_attr_path);


Could you please remove this debug message.



-   /* read a device attribute */
-   unbind_attr = sysfs_open_attribute(unbind_attr_path);
-   if (!unbind_attr) {
-   err(could not open %s/%s: %s, busid, attr_name,
-   strerror(errno));
-   return -1;
+   rc = write_sysfs_attribute(unbind_attr_path, busid, strlen(busid));
+   if (rc  0) {
+   dbg(Error unbinding device %s from driver., busid);


Could you please make this an err()


+   goto err_close_udev;
}

-   /* notify driver of unbind */
+   /* Notify driver of unbind. */
rc = modify_match_busid(busid, 0);
if (rc  0) {
err(unable to unbind device on %s, busid);
+   goto err_close_udev;
}

-   rc = sysfs_write_attribute(unbind_attr, busid,
-   

Re: [PATCH v5 10/14] usb: phy: msm: Use reset framework for LINK and PHY resets

2014-03-06 Thread Ivan T. Ivanov


On 03/05/14 14:34, Sergei Shtylyov wrote:
 Hello.
 

 --- a/drivers/usb/phy/phy-msm-usb.c
 +++ b/drivers/usb/phy/phy-msm-usb.c
 [...]
 @@ -235,12 +236,16 @@ static void ulpi_init(struct msm_otg *motg)

   static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
   {
 -int ret = 0;
 +int ret;

 -if (!motg-pdata-link_clk_reset)
 -return ret;
 +if (motg-pdata-link_clk_reset)
 +ret = motg-pdata-link_clk_reset(motg-clk, assert);
 +else
 +if (assert)
 
Kernel style assumes:
 
 else if (assert)

Thanks. will fix it.

Regards,
Ivan

 
 +ret = reset_control_assert(motg-link_rst);
 +else
 +ret = reset_control_deassert(motg-link_rst);

 [...]
 
 WBR, Sergei
 

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Re: OTG102/EzCapture2 no audio

2014-03-06 Thread David Woodfall

On (06/03/14 12:25), Clemens Ladisch clem...@ladisch.de put forth the 
proposition:

David Woodfall wrote:

Success. I used the second command mentioned on the linuxtv wiki:

mplayer tv:// -tv
driver=v4l2:device=/dev/video1:normid=8:alsa:adevice=hw.1:forceaudio:volume=80:immediatemode=0:width=720

Still no sound through arecord though.


It's probably necessary to configure the tuner correctly.


There isn't a tuner on this card. It's not a TV card, it's just a
video capture.

-Dave
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Re: MAX3421E Linux driver?

2014-03-06 Thread David Mosberger
On Mon, Mar 3, 2014 at 2:40 PM, Daniel Mack dan...@zonque.org wrote:

 1. Your patch has a large number of style issues, which
 scripts/checkpatch.pl will tell you more about.

Sure, Im not really at a point of worrying about style, but that's
easy enough to change.

 2. Is there any good reason for not using the regmap abstraction
 framework for the SPI layer? It has convenience functions for bit
 fiddling, a register cache and a nice debugging interface through
 debugfs, among other things. See include/linux/regmap.h.

I have looked at it only briefly but my impression is that it'd add a
lot of complexity and generality that is unnecessary for this case.
If somebody wanted to cook up a patch to show what it would look like
with regmap, I'd certainly be happy to look at it, though.

 Also, out of curiosity: which SPI master controller are you using in
 your setup? Is the whole thing actually fast enough for real-world
 applications? Which data rates are you able to get through on
 mass-storage devices for instance?

Yes, it's fast enough.  We just need 1Mbps at a reasonable CPU
utilization and that's what we're getting even now (no attempt to
optimize).

  --david
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Re: USB Host support for mx25

2014-03-06 Thread Eric Bénard
Hi Fabio,

Le Thu, 6 Mar 2014 07:23:30 -0300,
Fabio Estevam feste...@gmail.com a écrit :
 Let me know if you have some other suggestion.

That's because usbmisc is not fully implemented for i.MX25  35 as
USB_CTRL must be configured (for both i.MX25 and i.MX35).
Denis is working on this.

Eric
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Re: USB Host support for mx25

2014-03-06 Thread Alexander Shiyan
Hello.

I am not familiar with mx25, but can say some hints.

Четверг,  6 марта 2014, 7:23 -03:00 от Fabio Estevam feste...@gmail.com:
 On Thu, Mar 6, 2014 at 1:36 AM, Peter Chen peter.c...@freescale.com wrote:
 
  Do you have usbmisc node? usbmisc is not probed or its probe has failed.
 
 Thanks, Peter. usbmisc node was 'disabled' at imx25.dtsi. I removed
 the 'disabled' and now the probe goes a bit further:
 
 ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
 usbcore: registered new interface driver usb-storage
 53ff4400.usb supply vbus not found, using dummy regulator
 ci_hdrc ci_hdrc.0: doesn't support gadget
 ci_hdrc ci_hdrc.0: EHCI Host Controller
 ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1
 ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
 hub 1-0:1.0: USB hub found
 hub 1-0:1.0: 1 port detected
 
 usb 1-1: new low-speed USB device number 2 using ci_hdrc
 usb 1-1: device descriptor read/64, error -71
 usb 1-1: device descriptor read/64, error -71
 usb 1-1: new low-speed USB device number 3 using ci_hdrc
 usb 1-1: device descriptor read/64, error -71
 usb 1-1: device descriptor read/64, error -71
 usb 1-1: new low-speed USB device number 4 using ci_hdrc
 usb 1-1: device not accepting address 4, error -71
 ...
 usb 1-1: new low-speed USB device number 5 using ci_hdrc
 usb 1-1: device not accepting address 5, error -71
 hub 1-0:1.0: unable to enumerate USB device on port 1
 
 My changes now look like this:
 
 diff --git a/arch/arm/boot/dts/imx25-pdk.dts b/arch/arm/boot/dts/imx25-pdk.dts
 index 7a6d21f..6f17d11 100644
 --- a/arch/arm/boot/dts/imx25-pdk.dts
 +++ b/arch/arm/boot/dts/imx25-pdk.dts
 @@ -107,3 +107,8 @@
  fsl,uart-has-rtscts;
  status = okay;
  };
 +
 +usbhost1 {
 +phy_type = serial;
 +status = okay;
 +};
 diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
 index 32f760e..7fa123b 100644
 --- a/arch/arm/boot/dts/imx25.dtsi
 +++ b/arch/arm/boot/dts/imx25.dtsi
 @@ -482,13 +482,17 @@
  };
 
  usbphy1: usbphy@1 {
 -compatible = nop-usbphy;
 -status = disabled;
 +compatible = usb-nop-xceiv;
 +clocks = clks 0;

Dummy clk?

 +clock-names = main_clk;
 +status = okay;
  };
 
  usbphy2: usbphy@2 {
 -compatible = nop-usbphy;
 -status = disabled;
 +compatible = usb-nop-xceiv;
 +clocks = clks 0;
 +clock-names = main_clk;
 +status = okay;
  };
 
  usbotg: usb@53ff4000 {
 @@ -498,6 +502,7 @@
  clocks = clks 9, clks 70, clks 8;
  clock-names = ipg, ahb, per;

Why here three clk? Chipidea driver requires only one.

  fsl,usbmisc = usbmisc 0;
 +fsl,usbphy = usbphy1;
  status = disabled;
  };
 
 @@ -508,6 +513,7 @@
  clocks = clks 9, clks 70, clks 8;
  clock-names = ipg, ahb, per;
  fsl,usbmisc = usbmisc 1;
 +fsl,usbphy = usbphy2;
  status = disabled;
  };
 
 @@ -517,7 +523,6 @@
  clocks = clks 9, clks 70, clks 8;
  clock-names = ipg, ahb, per;
  reg = 0x53ff4600 0x00f;
 -status = disabled;
  };
 
  dryice@53ffc000 {
 
 Let me know if you have some other suggestion.

I have added support for i.MX27 recently. You can use this as an example
for i.MX25.
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=a2e502c214ae65a3e0871e6216f1bc105524d9ad
https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/?id=9089ce520f6fdcb3c921a12d24834197251bd56f

---


Renesas RCar device-tree USB series

2014-03-06 Thread Ben Dooks
This is a new series covering enabling the RCar series of SoCs USB
with device-tree based booting. It has been tested on the R8A7790
Lager board.

Improvements from the previous series include:

- mapping usb to the relevant phy by dt
- better use of existing pci of functions

Note, there is still an issue with the second gigabyte of memory on
the Lager, which with current kernels causes the system to abort on
startup. This series will only work if the top memory area is disabled.

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[PATCH 6/9] ARM: shmobile: lager.dts: add pci 0/1/2

2014-03-06 Thread Ben Dooks
Enable pci1 and pci2 nodes for USB controllers attached to the AHBPCI
bridge devices. Node pci0 is added for the moment, but not enabled as it
could be switched to usb-gadget mode later.

Signed-off-by: Ben Dooks ben.do...@codethink.co.uk
Reviewed-by: Ian Molton ian.mol...@codethink.co.uk
---
Cc: linux...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: Magnus Damm magnus.d...@gmail.com
Cc: Simon Horman ho...@verge.net.au
---
 arch/arm/boot/dts/r8a7790-lager.dts | 32 
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts 
b/arch/arm/boot/dts/r8a7790-lager.dts
index 26a9010..fd6851f 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -148,6 +148,21 @@
renesas,groups = qspi_ctrl, qspi_data4;
renesas,function = qspi;
};
+
+   usb0_pins: usb0 {
+   renesas,groups = usb0;
+   renesas,function = usb0;
+   };
+
+   usb1_pins: usb1 {
+   renesas,groups = usb1;
+   renesas,function = usb1;
+   };
+
+   usb2_pins: usb2 {
+   renesas,groups = usb2;
+   renesas,function = usb2;
+   };
 };
 
 mmcif1 {
@@ -214,3 +229,20 @@
cd-gpios = gpio3 22 GPIO_ACTIVE_LOW;
status = okay;
 };
+
+pci0 {
+   pinctrl-0 = usb0_pins;
+   pinctrl-names = default;
+};
+
+pci1 {
+   status = okay;
+   pinctrl-0 = usb1_pins;
+   pinctrl-names = default;
+};
+
+pci2 {
+   status = okay;
+   pinctrl-0 = usb2_pins;
+   pinctrl-names = default;
+};
-- 
1.9.0

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[PATCH 3/9] phy-rcar-usb-gen2: add device tree support

2014-03-06 Thread Ben Dooks
Add support for the phy-rcar-gen2-usb driver to be probed from device tree.

Signed-off-by: Ben Dooks ben.do...@codethink.co.uk
Reviewed-by: Ian Molton ian.mol...@codethink.co.uk
---
Fixes from v2:
- fix missed of_match_ptr()
- fix names of channel selection booleans
- updated and merged documentation for dt entries

Fixes from v2:
- fix missing of_if patch

Fixes from v1:
- use of_property_reasd-bool()
- remove unused of_id variable

Cc: Felipe Balbi ba...@ti.com
Cc: linux-usb@vger.kernel.org
Cc: linux...@vger.kernel.org
Cc: Magnus Damm magnus.d...@gmail.com
Cc: Simon Horman ho...@verge.net.au
Cc: devicet...@vger.kernel.org

Conflicts:
drivers/usb/phy/phy-rcar-gen2-usb.c
---
 .../bindings/usb/renesas,rcar-gen2-usb-phy.txt | 36 ++
 drivers/pci/host/pci-rcar-gen2.c   |  1 +
 drivers/usb/phy/phy-rcar-gen2-usb.c| 34 +---
 3 files changed, 66 insertions(+), 5 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/usb/renesas,rcar-gen2-usb-phy.txt

diff --git 
a/Documentation/devicetree/bindings/usb/renesas,rcar-gen2-usb-phy.txt 
b/Documentation/devicetree/bindings/usb/renesas,rcar-gen2-usb-phy.txt
new file mode 100644
index 000..5351a30
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/renesas,rcar-gen2-usb-phy.txt
@@ -0,0 +1,36 @@
+Renesas RCar gen2 USB PHY bindings
+--
+
+Bindings for the USB PHY block used in some Renesas SoCs.
+
+Required properties:
+ - compatible:  renesas,usb-phy-r8a7790 for the R8A7790 SoC
+   renesas,usb-phy-r8a7791 for the R8A7791 SoC
+ - reg : A single region to access device registers
+ - clocks : The reference to the clock to use for this block
+ - clock-names : The name for the clock at index 0 (must be usbhs)
+
+Optional properties:
+
+ - renesas,usb0-device: boolean, if present USB0 is connected to HS device
+   otherwise the USB0 is connected to OHCI/EHCI host.
+ - renesas,usb2-xhci: boolean, if present USB2 is connected to XHCI controller
+ otherwise the USB2 is connected to OHCI/EHCI host.
+
+
+Example device node for SoC dtsi file:
+
+   usbphy: usbphy@e6590100 {
+   compatible = renesas,usb-phy-r8a7790;
+   clocks = mstp7_clks R8A7790_CLK_HSUSB;
+   clock-names = usbhs;
+   reg =  0x0 0xe6590100 0x0 0x100;
+   status = disabled;
+   };
+
+Example board file:
+
+usbphy {
+   status = okay;
+};
+
diff --git a/drivers/pci/host/pci-rcar-gen2.c b/drivers/pci/host/pci-rcar-gen2.c
index 1216784..2595078 100644
--- a/drivers/pci/host/pci-rcar-gen2.c
+++ b/drivers/pci/host/pci-rcar-gen2.c
@@ -15,6 +15,7 @@
 #include linux/io.h
 #include linux/kernel.h
 #include linux/module.h
+#include linux/of.h
 #include linux/pci.h
 #include linux/of_pci.h
 #include linux/platform_device.h
diff --git a/drivers/usb/phy/phy-rcar-gen2-usb.c 
b/drivers/usb/phy/phy-rcar-gen2-usb.c
index 388d89f..8006c3c 100644
--- a/drivers/usb/phy/phy-rcar-gen2-usb.c
+++ b/drivers/usb/phy/phy-rcar-gen2-usb.c
@@ -15,6 +15,7 @@
 #include linux/module.h
 #include linux/platform_data/usb-rcar-gen2-phy.h
 #include linux/platform_device.h
+#include linux/of_device.h
 #include linux/spinlock.h
 #include linux/usb/otg.h
 
@@ -167,6 +168,15 @@ out:
spin_unlock_irqrestore(priv-lock, flags);
 }
 
+#ifdef CONFIG_OF
+static struct of_device_id rcar_gen2_usb_phy_ofmatch[] = {
+   { .compatible = renesas,usb-phy-r8a7790, },
+   { .compatible = renesas,usb-phy-r8a7791, },
+   { },
+};
+MODULE_DEVICE_TABLE(of, rcar_gen2_usb_phy_ofmatch);
+#endif
+
 static int rcar_gen2_usb_phy_probe(struct platform_device *pdev)
 {
struct device *dev = pdev-dev;
@@ -178,7 +188,7 @@ static int rcar_gen2_usb_phy_probe(struct platform_device 
*pdev)
int retval;
 
pdata = dev_get_platdata(dev);
-   if (!pdata) {
+   if (!pdata  !dev-of_node) {
dev_err(dev, No platform data\n);
return -EINVAL;
}
@@ -203,16 +213,29 @@ static int rcar_gen2_usb_phy_probe(struct platform_device 
*pdev)
spin_lock_init(priv-lock);
priv-clk = clk;
priv-base = base;
-   priv-ugctrl2 = pdata-chan0_pci ?
-   USBHS_UGCTRL2_USB0_PCI : USBHS_UGCTRL2_USB0_HS;
-   priv-ugctrl2 |= pdata-chan2_pci ?
-   USBHS_UGCTRL2_USB2_PCI : USBHS_UGCTRL2_USB2_SS;
priv-phy.dev = dev;
priv-phy.label = dev_name(dev);
priv-phy.init = rcar_gen2_usb_phy_init;
priv-phy.shutdown = rcar_gen2_usb_phy_shutdown;
priv-phy.set_suspend = rcar_gen2_usb_phy_set_suspend;
 
+   if (dev-of_node) {
+   if (of_property_read_bool(dev-of_node, renesas,usb0-device))
+   priv-ugctrl2 = USBHS_UGCTRL2_USB0_HS;
+   else
+   priv-ugctrl2 = 

[PATCH 7/9] ARM: shmobile: r8a7790.dtsi: add usbphy node

2014-03-06 Thread Ben Dooks
Add node for USB PHY driver to the base R8A7790 device tree include file.
It is up to the board file to enable and configure it as necessary.

Signed-off-by: Ben Dooks ben.do...@codethink.co.uk
Reviewed-by: Ian Molton ian.mol...@codethink.co.uk
---
Cc: devicet...@vger.kernel.org
Cc: Magnus Damm magnus.d...@gmail.com
Cc: Simon Horman ho...@verge.net.au
Cc: linux...@vger.kernel.org
---
 arch/arm/boot/dts/r8a7790.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 7325fee..4c03c46 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -802,4 +802,12 @@
#address-cells = 3;
#size-cells = 2;
};
+
+   usbphy: usbphy@e6590100 {
+   compatible = renesas,usb-phy-r8a7790;
+   clocks = mstp7_clks R8A7790_CLK_HSUSB;
+   clock-names = usbhs;
+   reg =  0x0 0xe6590100 0x0 0x100;
+   status = disabled;
+   };
 };
-- 
1.9.0

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[PATCH 4/9] usb: phy: check for of_node when getting phy

2014-03-06 Thread Ben Dooks
If the PHY is specified by usb-phy handle in the device tree, then
usb_get_phy_dev() should use the device tree specified PHY. This
fixes the issue where device-tree booted Renesas SoCs fail to find
the PHY for the USB controllers.

Signed-off-by: Ben Dooks ben.do...@codethink.co.uk
---
Cc: linux-usb@vger.kernel.org
Cc: Felipe Balbi ba...@ti.com
---
 drivers/usb/phy/phy.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c
index 8afa813..92b3c09 100644
--- a/drivers/usb/phy/phy.c
+++ b/drivers/usb/phy/phy.c
@@ -224,6 +224,29 @@ struct usb_phy *usb_get_phy_dev(struct device *dev, u8 
index)
struct usb_phy  *phy = NULL;
unsigned long   flags;
 
+   if (dev-of_node) {
+   struct device_node *node;
+
+   node = of_parse_phandle(dev-of_node, usb-phy, index);
+   if (!node) {
+   dev_dbg(dev, failed to get %s phandle\n,
+   dev-of_node-full_name);
+   return ERR_PTR(-ENODEV);
+   }
+
+   spin_lock_irqsave(phy_lock, flags);
+
+   phy = __of_usb_find_phy(node);
+   if (IS_ERR(phy) || !try_module_get(phy-dev-driver-owner)) {
+   phy = ERR_PTR(-EPROBE_DEFER);
+   of_node_put(node);
+   goto err0;
+   }
+
+   get_device(phy-dev);
+   goto err0;
+   }
+
spin_lock_irqsave(phy_lock, flags);
 
phy = __usb_find_phy_dev(dev, phy_bind_list, index);
-- 
1.9.0

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