Re: [linux-yocto] [kernel-cache][PATCH] arch/arm: add fragments to explicitly select 4/16/64 KB pages on arm64

[Ross Burton]

On 9 Jan 2024, at 22:29, Bruce Ashfield  wrote:
> 
> Which branches (kernels) did you want this for ? 6.1+ ?

6.1 onwards would be great, yes.

Ross

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[linux-yocto][v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g][PATCH] dts: Aptiv: Update 'Slew-Rates' from MSCR registers

[quanyang.wang via lists.yoctoproject.org]

From: Quanyang Wang 

This patch references to:

88132e3d1cf34c09aa00287a1ce29428d07d200e from
https://github.com/nxp-auto-linux/linux

We take into account FAST/1V8GPIO/3V3GPIO pads.

Signed-off-by: Quanyang Wang 
---
Hi Bruce,
Would you please help merge this patch to the branches:
v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g
v5.15/standard/nxp-sdk-5.15/nxp-s32g
Thanks,
Quanyang
---
 .../boot/dts/freescale/s32g274a-aptiv.dtsi| 100 +-
 .../boot/dts/freescale/s32gxxxa-cvc-fl.dtsi   |  86 +++
 2 files changed, 93 insertions(+), 93 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi 
b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
index fc4c16131f8dc..8b5544a2669e4 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
@@ -217,13 +217,13 @@ can0_pins: can0 {
can0_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can0_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can0_grp2 {
@@ -233,13 +233,13 @@ can0_grp2 {
can0_stb_grp0 {
pinmux = ;
bias-pull-up;
-   slew-rate = ;
+   slew-rate = ;
};
 
can0_en_grp0 {
pinmux = ;
bias-pull-up;
-   slew-rate = ;
+   slew-rate = ;
};
};
 
@@ -247,13 +247,13 @@ can1_pins: can1 {
can1_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can1_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can1_grp2 {
@@ -266,13 +266,13 @@ can2_pins: can2 {
can2_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can2_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can2_grp2 {
@@ -285,13 +285,13 @@ can3_pins: can3 {
can3_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can3_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can3_grp2 {
@@ -304,26 +304,26 @@ dspi1_pins: dspi1 {
dspi1_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
bias-pull-up;
};
 
dspi1_grp1 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1_grp2 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1_grp3 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
bias-pull-up;
};
 
@@ -337,13 +337,13 @@ dspi1slave_pins: dspi1slave {
dspi1slave_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1slave_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1slave_grp2 {
@@ -355,13 +355,13 @@ dspi1slave_grp2 {
dspi1slave_grp3 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1slave_grp4 {
pinmux = ;
input-enable;
-   slew-rate = ;
+