[linux-yocto] [PATCH] marvell-cn10xxx: enable NVME config for cn102xx
From: Ruiqiang Hao The Marvell cn102xx board has an NVME interface, so we should enable the NVME kernel configuration for this BSP. Signed-off-by: Ruiqiang Hao --- bsp/marvell-cn10xxx/marvell-cn10xxx.cfg | 4 1 file changed, 4 insertions(+) diff --git a/bsp/marvell-cn10xxx/marvell-cn10xxx.cfg b/bsp/marvell-cn10xxx/marvell-cn10xxx.cfg index a2f15050..878e95f2 100644 --- a/bsp/marvell-cn10xxx/marvell-cn10xxx.cfg +++ b/bsp/marvell-cn10xxx/marvell-cn10xxx.cfg @@ -173,6 +173,10 @@ CONFIG_ARM64_MPAM=y # MDIO device CONFIG_MDIO_DEVICE=y +# NVME +CONFIG_NVME_CORE=y +CONFIG_BLK_DEV_NVME=y + # Currently this driver only work for cn96xx, but it is set to 'm' by default. # So we have to disable it explicitly. # CONFIG_OCTEONTX_SERDES is not set -- 2.35.5 -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#13484): https://lists.yoctoproject.org/g/linux-yocto/message/13484 Mute This Topic: https://lists.yoctoproject.org/mt/103756433/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto] [yocto-kernel-cache yocto-6.1] enable NVME kernel config for marvell cn102xx
Hi Bruce, Please help to merge code into our linux-yocto repo. repo: yocto-kernel-cache branch: yocto-6.1 Thanks, Ruiqiang -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#13483): https://lists.yoctoproject.org/g/linux-yocto/message/13483 Mute This Topic: https://lists.yoctoproject.org/mt/103756432/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto] [yocto-kernel-cache][yocto-5.15][PATCH] aptiv-s32g: update to compatible with SDK BSP39
From: Quanyang Wang There are some new configs enabled in SDK BSP39 release, so update kernel cache to be compatible with SDK. Signed-off-by: Quanyang Wang --- Hi Bruce, Would you please help merge this patch to the branch: yocto-5.15 Thanks, Quanyang --- bsp/aptiv-s32g/aptiv-cvc.cfg | 8 1 file changed, 8 insertions(+) diff --git a/bsp/aptiv-s32g/aptiv-cvc.cfg b/bsp/aptiv-s32g/aptiv-cvc.cfg index 5f266fede3..64e6238b73 100644 --- a/bsp/aptiv-s32g/aptiv-cvc.cfg +++ b/bsp/aptiv-s32g/aptiv-cvc.cfg @@ -28,6 +28,9 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=y CONFIG_CPU_FREQ_GOV_USERSPACE=y CONFIG_CPU_FREQ_GOV_ONDEMAND=y CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_ARM_SCMI_CPUFREQ=y CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE=y # To keep align with SDK, unset the ARM_SCMI_POWER_DOMAIN config @@ -120,6 +123,7 @@ CONFIG_INPUT_UINPUT=y # Thermal CONFIG_THERMAL=y CONFIG_QORIQ_THERMAL=y +CONFIG_CPU_THERMAL=y # ADC CONFIG_IIO=y @@ -156,6 +160,10 @@ CONFIG_S32CC_WDT=y CONFIG_BLK_DEV_NVME=y CONFIG_NVME_TARGET=y CONFIG_NVMEM_S32CC_SIUL2=y +CONFIG_NVMEM_S32CC_OCOTP=y +CONFIG_NVMEM_S32CC_GPR=y +# CONFIG_NVMEM_SCMI is not set + # Regulator configuration CONFIG_REGULATOR=y -- 2.36.1 -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#13482): https://lists.yoctoproject.org/g/linux-yocto/message/13482 Mute This Topic: https://lists.yoctoproject.org/mt/103754324/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [linux-yocto] Trial merge of v5.15.146 v6.1.71 v6.1.72 for linux-yocto
In message: Trial merge of v5.15.146 v6.1.71 v6.1.72 for linux-yocto on 11/01/2024 Kevin Hao wrote: > Hi Bruce, > > This is a trial merge of the stable kernel v5.15.146 v6.1.71 v6.1.72 for the > following branches in the linux-yocto. > b5fbbdffbd1d v5.15/standard/sdkv5.10/axxia > 34c731e80124 v5.15/standard/preempt-rt/sdkv5.10/axxia > 78df6de45c41 v5.15/standard/base > c003aea6270f v5.15/standard/preempt-rt/base > acda83875cf7 v5.15/standard/cn-sdkv5.4/octeon > b565626a26a3 v5.15/standard/preempt-rt/cn-sdkv5.4/octeon > a3dcf258cbda v5.15/standard/cn-sdkv5.15/octeon > 7d89a56da9b7 v5.15/standard/preempt-rt/cn-sdkv5.15/octeon > ed0cc8da2e88 v5.15/standard/ti-sdk-5.10/ti-j72xx > e28b530e6247 v5.15/standard/preempt-rt/ti-sdk-5.10/ti-j72xx > ffe5852a2c7f v5.15/standard/nxp-sdk-5.15/nxp-soc > 81fea11e748b v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-soc > c3b0326a9836 v5.15/standard/bcm-2xxx-rpi > c599c658073f v5.15/standard/preempt-rt/bcm-2xxx-rpi > 56fe3933e51e v5.15/standard/nxp-sdk-5.15/nxp-s32g > 604ff2c32d51 v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g > 726eca2a66d9 v5.15/standard/intel-sdk-5.15/intel-socfpga > 6be2426ec014 v5.15/standard/preempt-rt/intel-sdk-5.15/intel-socfpga > 2db857672ddf v5.15/standard/x86 > cdb2d700d0d4 v5.15/standard/preempt-rt/x86 > 9a2c2745484a v5.15/standard/sdkv5.15/xlnx-soc >#Have textual conflicts > bb6eeb27272b v5.15/standard/preempt-rt/sdkv5.15/xlnx-soc >#Have textual conflicts > 487e6be1e796 v6.1/standard/sdkv5.10/axxia > 09ca58d30a61 v6.1/standard/preempt-rt/sdkv5.10/axxia > 65cb43829f54 v6.1/standard/base > 9b470c6b1a4a v6.1/standard/preempt-rt/base > 3d7f492abb3b v6.1/standard/ti-sdk-6.1/ti-j7xxx > 083c31589a50 v6.1/standard/preempt-rt/ti-sdk-6.1/ti-j7xxx > 43b4ace727bd v6.1/standard/nxp-sdk-6.1/nxp-soc >#Have textual conflicts > e19ab0994bf0 v6.1/standard/preempt-rt/nxp-sdk-6.1/nxp-soc >#Have textual conflicts > 01933fe845f3 v6.1/standard/cn-sdkv5.15/octeon >#Have textual conflicts > 81e3ecfaa788 v6.1/standard/preempt-rt/cn-sdkv5.15/octeon >#Have textual conflicts > 759be0248278 v6.1/standard/microchip-polarfire-soc > 963104e893a5 v6.1/standard/preempt-rt/microchip-polarfire-soc > a225b604b23e v6.1/standard/bcm-2xxx-rpi > 1b6aec075c14 v6.1/standard/preempt-rt/bcm-2xxx-rpi > b7ec6e79cb49 v6.1/standard/nxp-sdk-5.15/nxp-s32g > 8d09c3db19f5 v6.1/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g > 576be20178bb v6.1/standard/intel-sdk-6.1/intel-socfpga > eb99988e1dd2 v6.1/standard/preempt-rt/intel-sdk-6.1/intel-socfpga > c67028a29335 v6.1/standard/x86 > 239989bc7c91 v6.1/standard/preempt-rt/x86 > a578437b296a v6.1/standard/sdkv6.1/xlnx-soc >#Have textual conflicts > 3629413a658c v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc >#Have textual conflicts > > In this stable release, there are many bloody merge conflicts on the v6.1 > xlnx-soc > branches. These conflicts are caused by the similar changes in both stable > kernel > and SDK patches. We can resolve them by favoring the SDK version. All the > branches > have passed my build test. I have pushed all these branches to: > https://github.com/haokexin/linux Thanks Kevin, I've done the same -stable updates here and everything has passed the standard BSP build / boot tests. Bruce > > You can use this as a reference for the linux-yocto stable kernel bump. > > Thanks, > Kevin -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#13481): https://lists.yoctoproject.org/g/linux-yocto/message/13481 Mute This Topic: https://lists.yoctoproject.org/mt/103659660/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/leave/6687884/21656/624485779/xyzzy [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [linux-yocto][v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g][PATCH] dts: Aptiv: Update 'Slew-Rates' from MSCR registers
In message:
[linux-yocto][v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g][PATCH] dts:
Aptiv: Update 'Slew-Rates' from MSCR registers
on 10/01/2024 quanyang.w...@windriver.com wrote:
> From: Quanyang Wang
>
> This patch references to:
>
> 88132e3d1cf34c09aa00287a1ce29428d07d200e from
> https://github.com/nxp-auto-linux/linux
>
> We take into account FAST/1V8GPIO/3V3GPIO pads.
>
> Signed-off-by: Quanyang Wang
> ---
> Hi Bruce,
> Would you please help merge this patch to the branches:
> v5.15/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g
> v5.15/standard/nxp-sdk-5.15/nxp-s32g
merged.
Bruce
> Thanks,
> Quanyang
> ---
> .../boot/dts/freescale/s32g274a-aptiv.dtsi| 100 +-
> .../boot/dts/freescale/s32gxxxa-cvc-fl.dtsi | 86 +++
> 2 files changed, 93 insertions(+), 93 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
> b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
> index fc4c16131f8dc..8b5544a2669e4 100644
> --- a/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32g274a-aptiv.dtsi
> @@ -217,13 +217,13 @@ can0_pins: can0 {
> can0_grp0 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can0_grp1 {
> pinmux = ;
> input-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can0_grp2 {
> @@ -233,13 +233,13 @@ can0_grp2 {
> can0_stb_grp0 {
> pinmux = ;
> bias-pull-up;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can0_en_grp0 {
> pinmux = ;
> bias-pull-up;
> - slew-rate = ;
> + slew-rate = ;
> };
> };
>
> @@ -247,13 +247,13 @@ can1_pins: can1 {
> can1_grp0 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can1_grp1 {
> pinmux = ;
> input-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can1_grp2 {
> @@ -266,13 +266,13 @@ can2_pins: can2 {
> can2_grp0 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can2_grp1 {
> pinmux = ;
> input-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can2_grp2 {
> @@ -285,13 +285,13 @@ can3_pins: can3 {
> can3_grp0 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can3_grp1 {
> pinmux = ;
> input-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> can3_grp2 {
> @@ -304,26 +304,26 @@ dspi1_pins: dspi1 {
> dspi1_grp0 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> bias-pull-up;
> };
>
> dspi1_grp1 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> dspi1_grp2 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> dspi1_grp3 {
> pinmux = ;
> input-enable;
> - slew-rate = ;
> + slew-rate = ;
> bias-pull-up;
> };
>
> @@ -337,13 +337,13 @@ dspi1slave_pins: dspi1slave {
> dspi1slave_grp0 {
> pinmux = ;
> output-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> dspi1slave_grp1 {
> pinmux = ;
> input-enable;
> - slew-rate = ;
> + slew-rate = ;
> };
>
> dspi1slave_grp2 {
> @@ -355,13 +355,13 @@ dspi1slave_grp2 {
> dspi1slave_grp3 {
> pinmux =
