Embedded Linux

2005-02-22 Thread Gin








Dont know if anyone
has a good tool package in mind that I can use to develop an Embedded Linux. We
want a linux that is just enough to run the flash_rom program+usb support and
we hope it would be small enough so we can fit it into a Bios chip. Its all for the convenience of updating Bios in the future. As you image, we are closed to support
Linuxbios officially in our products.





gin








RE: Embedded Linux

2005-02-22 Thread Gin
If it's just about reading a file from usb and writing it to flash, you
might want to have a look at filo. It should be easy to integrate the
functionality of flash_rom into it, so you don't need a full blown
linux
system in flash. 

That will be a good idea if FILO can launch the flash_rom program but I
thought FILO is excepting a bootable image. 
So I guess the effort will be in How to make FILO run an executable?
Don't' know if I miss anything.

gin

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RE: It booted

2005-01-24 Thread Gin
wonderful news. Can you tell us more about your board? I can put it on
the 
web page if you want.

Yes, it's a server board with Intel E7501/ICH3-s. Details as below:
http://www.nexcom.com/product/nex/nex7220/

Actually i am going to port it to another board later, which we want to
use Linuxbios on. 


gin



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It booted

2005-01-20 Thread Gin








I just want to tell everyone
that my board now booted SMP/non-SMP kernel ok. The problem is the setting of
IOAPIC in ICH3. Thanks all for helping. 





gin








SMP linux

2005-01-18 Thread Gin








Ive been stuck at
this problem for a while. My linuxbios boots a NON-SMP kernel ok but not the
SMP one. 

The SMP kernel gets loaded
and run. When it tries to access an IDE drive, an IDE command timed out before anything
returns(kernel messages). My I/O APIC settings correspond
to the MP table. 



All ISA devices are mapped
to the I/O IOAPIC at 0xFEC0. But where do we set this I/O APIC up? How does
it know to route the IRQs to the local APIC?



Another question is, does linuxbios
setup the local APIC as Virtual Wire mode that via I/O APIC?





My board is similar to Tyan/s2735, does anyone get this booted with a SMP linux before??





many thinks,

gin












RE: SMP linux

2005-01-18 Thread Gin
 All ISA devices are mapped to the I/O IOAPIC at 0xFEC0. But where
do
 we set this I/O APIC up? How does it know to route the IRQs to the
local
 APIC?

Linux looks at the mptable.
I understand Linux looks at the mptable and looks for IOAPIC entries. 
  
I meant where in Linuxbios do we configure the IOAPIC at FEC0 or we
don't have to do anything? Linuxbios DOES do something to configure the
IOAPICs of P64H2.


Thank you,
gin




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RE: SMP linux

2005-01-18 Thread Gin
You are kidding. I put junk in the CVS server?
Didn't mean to be rude. I just want to be sure.

gin

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RE: problem with booting SMP linux kernel

2005-01-13 Thread Gin
I've adjusted my MP table to use the correct IRQs. But the IDE interrupt
is still lost. There is some message from linux kernel that I didn't
understand. Is there something wrong with my timer settings?


..MP-BIOS bug: 8254 timer not connected to IO-APIC
...trying to set up timer (IRQ0) through the 8259A ... 
. (found pin 0) ... failed.
...trying to set up timer as Virtual Wire IRQ... works. 
===


This is the last line where the kernel stops.
=
hda:4hda: dma_timer_expiry: dma status == 0x24
=


Does anyone have an idea?


gin







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Re: problem with booting SMP linux kernel

2005-01-13 Thread Gin
I've adjusted my MP table to use the correct IRQs. But the IDE interrupt
is still lost. There is some message from linux kernel that I didn't
understand. Is there something wrong with my timer settings?


..MP-BIOS bug: 8254 timer not connected to IO-APIC
...trying to set up timer (IRQ0) through the 8259A ... 
. (found pin 0) ... failed.
...trying to set up timer as Virtual Wire IRQ... works. 
===


This is the last line where the kernel stops.
=
hda:4hda: dma_timer_expiry: dma status == 0x24
=


Does anyone have an idea?


gin







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RE: problem with booting SMP linux kernel

2005-01-12 Thread Gin
bad mp table would be my guess.


I think the I/O APICs are incorrectly assigned to buses. From the kernel
messages, devices on bus 0 are transformed to high IRQs. 

Can anyone one confirm that the mptable.c under src/tyan/s2735 is a good
one to boot SMP linux kernel? I might need to manually construct the MP
table for my board according to a good one.


Thanks,
gin  

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mptable.c

2005-01-11 Thread Gin
Is there an utility help to generate mptable.c?
I thought I saw someone saying so. Is it usable?


gin



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irq_tables

2005-01-11 Thread Gin








Does linux
care the PCI IRQ tables created by LinuxBios? I thought
it only look at the MP-table.



gin 








problem with booting SMP linux kernel

2005-01-11 Thread Gin
The system failed when booting SMP linux kernel. It complains the IDE
lost interrupt. Things were working fine with the non-SMP linux kernel.
Has anyone seen it before?

Note that the SMP kernel image was stored in the IDE hard disk. So BIOS
was able to load the kernel to be executed. After Linux kernel took
control, somehow the interrupts was messed up. Here are the last few
messages over the console. 



===
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
hda: lost interrupt
hda: lost interrupt
hda: lost interrupt
hda: host protected area = 1
hda: 160086528 sectors (81964 MB) w/7936KiB Cache, CHS=158816/16/63,
UDMA(100)
hda: lost interrupt
hda: lost interrupt
ide-floppy driver 0.99.newide
Partition check:
 hda:4hda: dma_timer_expiry: dma status == 0x24  


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RE: Linux kernel in Rom

2005-01-10 Thread Gin
Here is my config file for a kernel version of linuxbios.
opteron_phase1_p4_noapic is a kernel that I ran mkelfImage on.

Ok. I will test on this config file.

I am trying to make my linux kernel image smaller as I want to embed it
with the ROM. Is there anyway you suggest to do this instead of using
the menuconfig in RedHat linux. I can only take out options provided in
the menu but the sometimes the dependency doesn't work that well. I get
compile errors later when make bzImage.


gin


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Linux kernel in Rom

2005-01-07 Thread Gin
What Options should I enable if I want to embed a linux kernel with
Linuxbios in Version2?
CONFIG_FS_STREAM?

What should I use as the Linuxbios payload? What file format should it
be?


gin



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fallback and normal image

2005-01-06 Thread Gin
The fallback image tries to load the normal image but if that
fails it'll take over and continue with the fallback image.

So I am guessing the 2 images are the same. Then why 2 exact the same
image? In case of damaged flash area?

I am asking this because I want to embed a linux kernel in the BIOS rom
to run Flash_and_Burn util (For convenience when updating Bios). There
probably won't be enough ROM space if I use both images.



gin  

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Etherboot and Linuxbios

2005-01-04 Thread Gin
Now my linuxbios found the ELF file created by Etherboot and tried to
jump to it. But it hangs afterward. 

This is the debug output from linuxbios. It loads 2 seg from the ELF
file. But in a objdump on the ELF file. There is only one seg and the
loading addr is different.

=
New segment addr 0x2 size 0x114c8 offset 0xb0 filesize 0x8c4c
Loading Segment: addr: 0x3ffd4000 memsz: 0x8000
filesz: 0x8000
Loading Segment: addr: 0x00028000 memsz: 0x94c8
filesz: 0x0c4c
Clearing Segment: addr: 0x00028c4c memsz: 0x887c
=
Program Header:
NOTE off0x0074 vaddr 0x0074 paddr 0x0074 align 2**0
 filesz 0x003c memsz 0x003c flags rwx
LOAD off0x00b0 vaddr 0x0002 paddr 0x0002 align 2**0
 filesz 0x8c4c memsz 0x000114c8 flags rwx

Sections:
Idx Name  Size  VMA   LMA   File off  Algn

=



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Etherboot and Linuxbios

2005-01-02 Thread Gin
Etherboot version used: 5.3.11

I am trying to build a Etherboot image to work with Linuxbios but got a
compile error. There are couple undefined references to some functions
due to the settings in the Config file. 

I commented out the PCBIOS option, and define the following. 

-DLINUXBIOS -DCONFIG_TSC_CURRTICKS  -DCONSOLE_SERIAL -DCOMCONSOLE=0x3f8
-DCOMPRESERVE -DCONFIG_PCI_DIRECT -DELF_IMAGE

-DPXE_IMAGE -DPXE_EXPORT


p.s The undefined reference is due to the undefined PCBIOS.


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flash rom utility

2004-12-29 Thread Gin








Is there a flash rom utility I can use to flash linuxbios to my EEPROM? Currently
I am WICE to do it. But I cant depend on a hardware device to update
bios.



gin








RE: PXE support

2004-12-28 Thread Gin

etherboot supports PXE. If you use etherboot as LB payload it should
work. Never tried this though since I can't really recognize an
advantage over the usual dhcp/tftpboot scenario. It's unlikely that you
are able to use any driver like code on the network adapters without
16bit bios.

I saw the Config options for PXE boot in Etherboot. Has anyone
successfully remote booted an image using PXE through Etherboot?

If so, what is the target name I should give to the makefile. I am not
sure how to build the file to use as the payload in Etherboot.


gin  

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Merry X'mas

2004-12-22 Thread Gin
Thanks for everyone's help this year. Wish you guys a wonderful holiday.

gin




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RE: No booting

2004-12-21 Thread Gin











I can never get any output from the com port. I have console
redirect running in grub, soI no that part is
running and good test point. 

Your
com port might not be turned on yet. Check your super IO. See if its the
same with what your code is based on.


















booting slow aftering mouting root

2004-12-19 Thread Gin
I compare 2 output of linux command pci
from both Linuxbios booted linux and a regular bios booted linux. 
There are no IRQ assignments for lots of devices including IDE
controller, SMBUS.
Does linuxbios assign IRQs at all in the code?


==
Linuxbios
==
Bus  0, device  31, function  1:
IDE interface: Intel Corp. 82801CA IDE U100 (rev 2).
  I/O at 0x3080 [0x308f].
  Non-prefetchable 32 bit memory at 0xfe601000 [0xfe6013ff].
  Bus  0, device  31, function  3:
SMBus: Intel Corp. 82801CA/CAM SMBus (rev 2).
  I/O at 0x3060 [0x307f].





=
regular bios 

Bus  0, device  31, function  1:
IDE interface: Intel Corp. 82801CA IDE U100 (rev 2).
  IRQ 12.
  I/O at 0xf000 [0xf00f].
  Non-prefetchable 32 bit memory at 0x3fff [0x3fff03ff].
Bus  0, device  31, function  3:
SMBus: Intel Corp. 82801CA/CAM SMBus (rev 2).
  IRQ 5.
  I/O at 0x500 [0x51f].


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irq_tables.c

2004-12-16 Thread Gin
You can only use getpir if you have a working bios.  Otherwise you
Will get junk.  

Oh..i got it. I do have a working bios. Thank God. And I generated the
irq_tables.c using getpir. It still doesn't help. 

One thing I did notice, it starts getting slow after mounting file
system. 

gin

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RE: booting slow

2004-12-15 Thread Gin
Seen this when interrupts in irq.c were wrong based on 
The motherboard.  In our case we'd use etherboot to
Load the kernel (which doesn't handle interrupts) then
Once kernel was loaded we'd see the problem.  This
Was fixed by fixing the irq table.

Thanks for the hint.
I am able to load the kernel now. It just executes commands very slowly.

One question for the irq_routing table(is that what you mean by irq.c?).
The getpir util generates a routing table by looking at the memory
config of my developing machine. How's it related to my target
machine? 

Any document I can reference? This link mentioned on irq_tables.c
http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM doesn't work.


gin

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RE: booting slow

2004-12-15 Thread Gin
It was easy to see when doing 
A cat /proc/interrupts and watching the offending interrupt configured
Wrong. Just increment like mad. 
 
This is the result of a cat /proc/interrupts. The interrupt increments
of timer and ide0 seem fine. I compared it with a normal bios boot. 


=

   CPU0
  0:5331065  XT-PIC  timer
  1:  0  XT-PIC  keyboard
  2:  0  XT-PIC  cascade
  4:  0  XT-PIC  serial
  5:  0  XT-PIC  usb-uhci
  8:  1  XT-PIC  rtc
 10:  0  XT-PIC  usb-uhci
 11:  0  XT-PIC  usb-uhci
 14:  22880  XT-PIC  ide0
NMI:  0
ERR:  0


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RE: booting slow

2004-12-14 Thread Gin
that's the interesting part. What happens is that once init is running
and 
things get a bit more formal, things start to slow down. There are lots
of 
causes we've found for this, but interrupts is typically  the big one.

The serial interrupt? Shouldn't it be easy like assigning it an irq? 
What other causes that you've found out? One possibility I can think of
is the cache. It was turned off.

gin

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booting slow

2004-12-13 Thread Gin
I got the keyboard controller problem fixed by enabling Keyboard
separately (Not through the PNP devices list). Since now the PNP devices
don't get enabled at all. For now it's ok because we need only serial
com port and keyboard. But I will love to have the code for SMSC if you
have one available. Thanks.


Now linux kernel boots fine except for one problem. It is extremely slow
after this line
Red Hat nash version 3.4.42 starting
It displays each character slowly including what I typed from the
keyboard(over serial console). It is very slow all the way to linux
command prompt. I think it might have something to do with the routing
table. I haven't changed much of mptable.c which is specific for another
board. I couldn't think of anything else.

gin
=
Red Hat nash version 3.4.42 starting
Loading jbd.o module
Loading ext3.o module
Mounting /proc filesystem
Creating block devices
Creating root device
Mounting root filesystem
Freeing unused kernel memory: 132k freed

INIT: version 2.84 booting

Welcome to RedEntering runlevel: 3
:
=
:


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RE: booting slow

2004-12-13 Thread Gin
This is our proprietary mobo. In case you want a quick glance,
http://www.nexcom.com/product/nex/nex7220/

North Bridge: E7501
South Bridge: ICH3 - S
SuperIO: SMSC(LPC47B27x)
I base on the code for tyan/s2735.

If it was the serial interrupt, why didn't it happen earlier? It starts
getting slow at certain point in the linux kernel.  

gin



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keyboard controller jammed

2004-12-11 Thread Gin
What is your southbridge (LPC) again ? I guess you
LPC bridge does not have scan_static_bus is its
device:scan_bus() method. 

I guess you are correct. So the PNP devices are there but didn't get
looped through. But that's in the chip_op of the LPC bridge. It should
be fixed in the code??
   
Ron,
I did change the board config file for my target board. Here is my
platform:
North Bridge: E7501
South Bridge: ICH3 - S
SuperIO: SMSC(LPC47B27x)

The code I am based on right now is ICH5 and Winbond w83627hf.
Some Dev ID of ICH5 and ICH3-s are different. LPC bridge is one of them.
Don't know if it matters?

Is there code for ICH3-s and SMSC superIO that I can use? Otherwise I
will need to modify from the code I have now. 


gin






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RE: keyboard controller jammed

2004-12-10 Thread Gin
I hope you did not modify static.c?
I did. I did change the dev_root chip_op to 0 otherwise it won't execute
the default root op.  
 
I don't know if the error is related to my superio. The superio on board
is not winbond w83627hf, which is the code is based on. So the pnp
devices are never enabled.  


In file /devices/root_device.c, scan_static_bus supposes to walk through
the device tree and enable the PNP devices. I put a printk message. I
don't think the PNP devices ever get initialized.


gin




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RE: keyboard controller jammed

2004-12-10 Thread Gin
I hope you did not modify static.c?
I did. I did change the dev_root chip_op to 0 otherwise it won't execute
the default root op.  
 
I don't know if the error is related to my superio. The superio on board
is not winbond w83627hf, which is the code is based on. So the pnp
devices are never enabled.  


In file /devices/root_device.c, scan_static_bus supposes to walk through
the device tree and enable the PNP devices. I put a printk message. I
don't think the PNP devices ever get initialized.


gin




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Linux kernel hangs

2004-12-09 Thread Gin








Linuxbios writes to the beginning
of the Memory for MP tables. Shouldnt those addresses be interrupt
vector table? It doesnt look it contains any pointers to an interrupt handler.
Who is the table for? Will Linux kernel reference it?

Linuxbios successfully loads
the payload FILO which brings up Linux kernel. But the kernel hangs while
waiting for a timer interrupt. See below. I guess the interrupt table is not correct.

==

Linux version 2.4.20-8
([EMAIL PROTECTED]) (gcc version 3.2.2
200

30222 (Red Hat Linux
3.2.2-5)) #1 Thu Mar 13 17:54:28 EST 2003

BIOS-provided physical RAM
map:

BIOS-e820: 0c88 -
000a (usable)

BIOS-e820: 0010 -
4000 (usable)

128MB
HIGHMEM available.

896MB
LOWMEM available.

hm,
page  reserved twice.

On node 0 totalpages: 262144

zone(0): 4096 pages.

zone(1): 225280 pages.

zone(2): 32768 pages.

Kernel command line: ro root=/dev/hda2 console=ttyS0,57600

Initializing CPU#0

Detected
1597.358 MHz processor.

Console: colour
dummy device 80x25

Calibrating delay loop...







The MP table is specific to Tyan/s2735
not my board. I should change it. We use intel
E7501/ICHs-3. But s2735 is ICH5. Dont know if it matters. 







gin








keyboard jammed

2004-12-09 Thread Gin








Forget
about the previous email. Actually I solved the problem of Calibrating delay
loop. The problem is that I used the device list in static.c as my onboard
devices and it was missing apic cluster. 



In
the board specific config file(under src/.), I noticed there is a
tree-like device list. See below. Should I make it exactly the same as my board? Would it
stop me from booting into linux kernel? Now I am getting another error. It
prints out keyboard controller jammed.

:

:gin

:===

#
sample config for tyan/s2735

chip
northbridge/intel/e7501


device pci_domain 0 on


device pci 0.0 on end

 device
pci 0.1 on end


device pci 2.0 on


chip southbridge/intel/i82870


device pci 1c.0 on end


device pci 1d.0 on end


device
pci 1e.0 on end


device pci 1f.0 on end


end


end


device pci 6.0 on end


chip southbridge/intel/i82801er


device pci 1d.0 on end


device pci 1d.1 on end


device pci 1d.2 on end


device pci 1d.3 on end


device pci 1d.7 on end


device pci 1e.0 on end


device
pci 1f.0 on


# device pci 8.0 end


chip superio/winbond/w83627hf


device pnp 2e.0 on # Floppy


io 0x60 = 0x3f0


irq 0x70 = 6


drq 0x74 = 2


end


device
pnp 2e.1 off
# Parallel Port


io 0x60 = 0x378


irq 0x70 = 7


end


device
pnp 2e.2 on
# Com1

:

:

:

===



Linux version 2.4.20-8
([EMAIL PROTECTED]) (gcc version 3.2.2 200

30222
(Red Hat Linux 3.2.2-5)) #1 Thu Mar 13 17:54:28
 EST 2003

BIOS-provided
physical RAM map:

BIOS-e820: 0c88 -
000a (usable)

BIOS-e820: 0010 -
4000 (usable)

128MB
HIGHMEM available.

896MB
LOWMEM available.

hm,
page  reserved twice.

On
node 0 totalpages: 262144

zone(0):
4096 pages.

zone(1):
225280 pages.

zone(2):
32768 pages.

Kernel
command line: ro root=/dev/hda2 console=ttyS0,57600

Initializing
CPU#0

Detected
1597.322 MHz processor.

Console:
colour dummy device 80x25

Calibrating
delay loop... 3185.04 BogoMIPS

Memory:
1027480k/1048576k available (1347k kernel code, 17508k reserved, 999k da

ta,
132k init, 131072k highmem)

Dentry
cache hash table entries: 131072 (order: 8, 1048576 bytes)

Inode
cache hash table entries: 65536 (order: 7, 524288 bytes)

Mount
cache hash table entries: 512 (order: 0, 4096 bytes)

Buffer-cache
hash table entries: 65536 (order: 6, 262144 bytes)

Page-cache
hash table entries: 262144 (order: 8, 1048576 bytes)

CPU:
Trace cache: 12K uops, L1 D cache: 8K

CPU:
L2 cache: 512K

Intel
machine check architecture supported.

Intel
machine check reporting enabled on CPU#0.

CPU:
Intel(R) Xeon(TM) CPU 1.60GHz stepping 07

Enabling
fast FPU save and restore... done.

Enabling
unmasked SIMD FPU exception support... done.

Checking
'hlt' instruction... OK.

POSIX
conformance testing by UNIFIX

mtrr:
v1.40 (20010327) Richard Gooch ([EMAIL PROTECTED])

mtrr:
detected mtrr type: Intel

PCI:
Using configuration type 1

PCI:
Probing PCI hardware

PCI:
Ignoring BAR0-3 of IDE controller 00:1f.1

PCI:
Unable to handle 64-bit address space for

PCI:
Unable to handle 64-bit address space for

Transparent
bridge - Intel Corp. 82801BA/CA/DB PCI Bridge

PCI:
Using IRQ router PIIX [8086/2480] at 00:1f.0

isapnp:
Scanning for PnP cards...

isapnp:
No Plug  Play device found

Linux
NET4.0 for Linux 2.4

Based
upon Swansea University Computer Society
NET3.039

Initializing
RT netlink socket

apm:
BIOS not found.

Starting
kswapd

allocated
32 pages and 32 bhs reserved for the highmem bounces

VFS:
Disk quotas vdquot_6.5.1

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).

pc_keyb:
controller jammed (0xFF).










RE: jump to boot code

2004-12-02 Thread Gin
Yes, when I tested the filo with Grub. I could see the messages over the
serial console. 

gin 

-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED] 
Sent: Thursday, December 02, 2004 11:29 PM
To: Gin
Cc: 'LinuxBIOS'
Subject: Re: jump to boot code

the problem is that your error messages are kind of ok. Did you build a 
filo with serial port only console?

ron

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RE: jump to boot code

2004-12-02 Thread Gin
This is the header of my payload Filo.elf. it does have the starting
address.


=
start address 0x001092e4

Program Header:
LOAD off0x00a0 vaddr 0x0010 paddr 0x0010 align 2**5
 filesz 0xd048 memsz 0x000270d0 flags rwx
LOAD off0xd100 vaddr 0x001270e0 paddr 0x001270e0 align 2**5
 filesz 0x0048 memsz 0x0048 flags rw-
NOTE off0x00c0 vaddr 0x00100020 paddr 0x00100020 align 2**5
 filesz 0x0088 memsz 0x0088 flags r--
==


-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Greg Watson
Sent: Thursday, December 02, 2004 10:57 PM
To: Gin
Cc: 'LinuxBIOS'
Subject: Re: jump to boot code

If you do an 'objdump -f' on the executable, what does it say is the 
start address? 0x1092e4 seems a bit strange.

Greg

On Dec 1, 2004, at 11:17 PM, Gin wrote:

 I tested my payload(FILO.elf) with linux loader Grub. It has no 
 problem at all. So something must go wrong when linuxbios jumps to the

 payload. FILO doesn't seem to run at all. No debug message over the 
 console.

  

 Don’t’ know if there is anyone familiar with ELF.

 This is the message over the console at the end.

 It seems that there are 2 segments in the ELF. In the end, linuxbios 
 jumps to an entry that looks like the in the middle of the first 
 segment.

  Does it look right?

  

  

 

  

 Found ELF candiate at offset 0

  

  (cleaned up) New segment addr 0x10 size 0x270f0 offset 0xa0 
 filesize 0xd068

  (cleaned up) New segment addr 0x127100 size 0x48 offset 0xd120 
 filesize 0x48

 Dropping non PT_LOAD segment

  

 Loading Segment: addr: 0x0010 memsz: 0x000270f0 
 filesz: 0x00 00d068

 Loading Segment: addr: 0x00127100 memsz: 0x0048 
 filesz: 0x00 48

  

 Jumping to boot code at 0x1092e4

  

 entry    = 0x001092e4

 lb_start = 0x4000

 lb_size  = 0x00024000

 adjust   = 0xfe5d8400

 buffer   = 0xfe5b8400

 elf_boot_notes = 0x00015680

 adjusted_boot_notes = 0xfe5eda80

  

  

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jump to boot code

2004-12-01 Thread Gin








This is the message I got in
the end. Linuxbios tries to load the ELF image. 

It seems that there are 2
segments in the ELF. In the end, linuxbios jumps to an entry that looks like
the in the middle of the first segment. 

Does it look right?

The FILO.elf
doesnt seem to load succeffully.



Gin





Found ELF candiate at offset 0



(cleaned up) New
segment addr 0x10 size
0x270f0 offset 0xa0 filesize 0xd068

(cleaned up) New
segment addr 0x127100 size
0x48 offset 0xd120 filesize 0x48

Dropping non PT_LOAD segment



Loading Segment: addr: 0x0010 memsz:
0x000270f0 filesz: 0x00 00d068

Loading Segment: addr: 0x00127100 memsz:
0x0048 filesz: 0x00 48



Jumping to boot code at
0x1092e4



entry
= 0x001092e4

lb_start = 0x4000

lb_size = 0x00024000

adjust =
0xfe5d8400

buffer =
0xfe5b8400

elf_boot_notes = 0x00015680

adjusted_boot_notes = 0xfe5eda80












irq routing table

2004-12-01 Thread Gin








If I have a wrong checksum
for my irq routing table, would that stops me from booting
successfully?

The question should be, does
the irq_routing table matter at all? Linuxbios runs
through till it jumps to the entry of payload. I am just trying to figure out
why.



Gin












jump to boot code

2004-12-01 Thread Gin








I tested my payload(FILO.elf) with linux loader Grub.
It has no problem at all. So something must go wrong when linuxbios jumps to
the payload. FILO doesn't seem to run at all. No debug message over the
console.



Dont know if there is anyone familiar with
ELF.

This is the message over the console at the end.

It seems that there are 2
segments in the ELF. In the end, linuxbios jumps to an entry that looks like the in the middle
of the first segment. 

Does it look right?









Found
ELF candiate at offset 0



(cleaned up) New segment addr 0x10
size 0x270f0 offset 0xa0 filesize 0xd068

(cleaned up) New segment addr 0x127100
size 0x48 offset 0xd120 filesize 0x48

Dropping
non PT_LOAD segment



Loading
Segment: addr: 0x0010 memsz: 0x000270f0 filesz: 0x00
00d068

Loading
Segment: addr: 0x00127100 memsz: 0x0048 filesz: 0x00
48



Jumping
to boot code at 0x1092e4



entry = 0x001092e4

lb_start
= 0x4000

lb_size = 0x00024000

adjust = 0xfe5d8400

buffer = 0xfe5b8400

elf_boot_notes
= 0x00015680

adjusted_boot_notes
= 0xfe5eda80












elfboot

2004-11-29 Thread Gin








I know its probably
been a while since you look into the elfboot code. 



In the elfboot.c

When it tries to build the
ELF segment list, it checks if the segment address is valid by walking through the
table of valid memory ranges. What is the reason to do this? Below is the code, the if  statement seems only guarantee that the new
addresses INTERSECT with the valid memory range, not fully contained. 











for(i = 0; i  mem_entries; i++) {

 uint64_t mstart, mend;

 uint32_t mtype;

 mtype = mem-map[i].type;

 mstart = mem-map[i].start;

 mend = mstart + mem-map[i].size;

 if ((mtype == LB_MEM_RAM)
 (start  mend)  (end  mstart))
{

 break;

 }



 }



 








jmp_to_elf_entry

2004-11-28 Thread Gin
I've got it to run to the point that it jumps to the ELF entry. My
payload is a FILO. 

What should I see after it jumps to the ELF entry? I guess the FILO
program will start to run, correct?

I have not got my VGA up, so I can't see if it really boots the ELF
entry successfully. Maybe that's what I should do.

Gin

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compile vga rom

2004-11-28 Thread Gin








I have an onboard VGA chip
that I want to use. Is there a way to compile the onboard VGA rom with the linuxbios? Or would it be easier to use a VGA
card?





Gin 








boot linux from an ide

2004-11-25 Thread Gin
I use FILO as the payload to boot from a Hard Disk, which has a
installed linux on it. I noticed if I enabled the ide stream. It tries
to read the ELF header from my IDE drive. But I thought the FILO payload
should be the one to load the image from the IDE drive. When does it
come in and play the role?
Anyone can explain the flow of booting if I try to load the INSTALLED
linux from a IDE drive. 


Gin

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boot from an ide

2004-11-25 Thread Gin Lin
I use FILO as the payload to boot from a Hard Disk, which has a installed 
linux on it. I noticed if I enabled the ide stream. It tries to read the ELF 
header from my IDE drive. But I thought the FILO payload should be the one 
to load the image from the IDE drive. When does it come in and play the 
role? Anyone can explain the flow of booting if I try to load the INSTALLED 
linux from a IDE drive. 


Gin

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could not find a bounce buffer

2004-11-25 Thread Gin
Yes, I think I need to set CONFIG_ROM_STREAM=1 in order to have it boot
from my FILO payload which then will go load the image in a IDE drive.
Thanks.

I got an error when it ties to get_bounce_buffer in elfboot, Don't know
if you have the same problem. I dumped out the mem entries info. Looks
like the 2 mem entries are all LB_MEM_TABLE(ram config tables to be kept
in). So there is no LB_MEM_RAM, (where everyone could use) to allocate
the bounce buffer from. 

Any idea?


===
Wrote the mp table end at: 0020 - 01f4
Wrote linuxbios table at: 0500 - 0be4  checksum 18e1

lb_size=0x2

mem_entries=2
mem entry1: type=0x10, start=0, size=0xc4c
mem entry2: type=0x10, start=0xf, size=0x400

Could not find a bounce buffer...
Cannot Load ELF Image
-===
-Original Message-
From: Greg Watson [mailto:[EMAIL PROTECTED] 
Sent: Thursday, November 25, 2004 11:43 PM
To: Gin
Cc: [EMAIL PROTECTED]
Subject: Re: boot linux from an ide

If FILO is a payload in flash, then you need to set CONFIG_ROM_STREAM=1 
and CONFIG_ROM_STREAM_START to the address you want to start looking 
for the payload ELF header (usually just after the LinuxBIOS image). 
CONFIG_IDE_STREAM is used to load a payload (such as FILO) from an 
attached IDE device. This is useful if the flash is not large enough to 
hold LinuxBIOS+payload, but is probably not what you are looking for. 
Sorry for the confusion.

Greg

On Nov 25, 2004, at 5:40 AM, Gin wrote:

 I use FILO as the payload to boot from a Hard Disk, which has a
 installed linux on it. I noticed if I enabled the ide stream. It tries
 to read the ELF header from my IDE drive. But I thought the FILO 
 payload
 should be the one to load the image from the IDE drive. When does it
 come in and play the role?
 Anyone can explain the flow of booting if I try to load the INSTALLED
 linux from a IDE drive.


 Gin

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RE: boot from ide

2004-11-18 Thread Gin
Thanks for the file. But would it work if I specify the ROM_IMAGE_SIZE
larger than 0x1?


-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Ronald G. Minnich
Sent: Thursday, November 18, 2004 11:11 PM
To: Gin
Cc: 'LinuxBIOS'
Subject: Re: boot from ide

Here is my filo-using config

# Sample config file for the Arima HDAMA

target hdama.filo
mainboard arima/hdama
option DEFAULT_CONSOLE_LOGLEVEL=5
option MAXIMUM_CONSOLE_LOGLEVEL=5


romimage normal
option USE_FALLBACK_IMAGE=0
option ROM_IMAGE_SIZE=0x1
option LINUXBIOS_EXTRA_VERSION=.0Normal
payload /opt/filo/normal/filo.elf
end

romimage fallback 
option USE_FALLBACK_IMAGE=1
option ROM_IMAGE_SIZE=0x1
option LINUXBIOS_EXTRA_VERSION=.0Fallback
payload /opt/filo/fallback/filo.elf
end

buildrom ./linuxbios.rom ROM_SIZE normal fallback

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ROM_IMAGE_SIZE

2004-11-18 Thread Gin
Not sure why this is happening. When I specify the ROM_IMAGE_SIZE to be
larger than 64k. The file linuxbios.strip is larger than linuxbios,
which is the file before the objcopy. This doesn't happen to the
rom_image_size that is 64k.
Here is the file size info. 

[EMAIL PROTECTED] fallback]# ls -l linuxbios*
-rwxr-xr-x1 root root   126425 Nov 19 11:28 linuxbios
-rw-r--r--1 root root   155892 Nov 19 11:28 linuxbios.a
-rw-r--r--1 root root39445 Nov 19 11:28 linuxbios.map
-rwxr-xr-x1 root root   149179 Nov 19 11:28 linuxbios_ram
-rwxr-xr-x1 root root77008 Nov 19 11:28
linuxbios_ram.bin
-rw-r--r--1 root root13331 Nov 19 11:28
linuxbios_ram.map
-rw-r--r--1 root root36353 Nov 19 11:28
linuxbios_ram.nrv2b
-rw-r--r--1 root root   114373 Nov 19 11:28 linuxbios_ram.o
-rw-r--r--1 root root36353 Nov 19 11:28
linuxbios_ram.rom
-rw-r--r--1 root root   262144 Nov 19 09:58 linuxbios.rom
-rwxr-xr-x1 root root   131087 Nov 19 11:28 linuxbios.strip
-rw-r--r--1 root root 4872 Nov 17 19:19
linuxbios_table.o


Gin
 

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boot from ide

2004-11-17 Thread Gin
Hello, 
I've got my linuxbios run to the point it tries to load the image from
an IDE drive. I use FILO as the payload. 

1. What do I have to add in the Config.lb file to make it use filo? I
know CONFIG_FS_STREAM should be set to true. What else?

2. I remembered linuxbios supports ROM image size larger than 64K now.
But when got compiler errors when specifies it as 128K. Do I miss
anything?


Gin  

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Re: boot from ide

2004-11-17 Thread Gin
Thanks, 
I got an error while specifying the fall back rom image size of larger
than 64K. See below: 

1. When ROM_IMAGE_SIZE = 0x2000
./buildrom linuxbios.strip linuxbios.rom /opt/filo/fallback/filo.elf
0x2 0x4
linuxbios image is 131087 bytes; only 131072 allowed
Linuxbios input file larger than allowed size!
: Success
make: *** [linuxbios.rom] Error 2

2.When ROM_IMAGE_SIZE = 0x3000
./buildrom linuxbios.strip linuxbios.rom /opt/filo/fallback/filo.elf
0x3 0x4
linuxbios image is 196623 bytes; only 196608 allowed
Linuxbios input file larger than allowed size!
: Success
make: *** [linuxbios.rom] Error 2 

-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Greg Watson
Sent: Thursday, November 18, 2004 10:21 AM
To: Gin
Cc: 'LinuxBIOS'
Subject: Re: boot from ide

Actually, don't set CONFIG_FS_STREAM if you're using Filo as a payload. 
Use the CONFIG_IDE_STREAM instead.

Greg

On Nov 17, 2004, at 7:05 PM, Gin wrote:

 Hello,
 I've got my linuxbios run to the point it tries to load the image from
 an IDE drive. I use FILO as the payload.

 1. What do I have to add in the Config.lb file to make it use filo? I
 know CONFIG_FS_STREAM should be set to true. What else?

 2. I remembered linuxbios supports ROM image size larger than 64K now.
 But when got compiler errors when specifies it as 128K. Do I miss
 anything?


 Gin

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RE: Tyan/s2735

2004-11-14 Thread Gin
Thanks Steven,
Do you think you will have time testing this on V2 tree? I've been
working on that code base and keep having problems with it. 

Gin

-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Steven James
Sent: Monday, November 15, 2004 4:31 AM
To: Gin
Cc: [EMAIL PROTECTED]
Subject: Re: Tyan/s2735

Greetings,

I have successfully used the v1 code on that board. Things have been in
flux since then, and I haven't had time to test a recent CVS checkout or
the v2 tree.

G'day,
sjames


On Thu, 11 Nov 2004, Gin wrote:

 Steven,
 Thanks for the info. I've got the ram up by filling the some values in
 North Bridge(I reference a regular bios).

 I have an essential question about the code base for Tyan/s2735. Has
it
 ever successfully built and run on that board? I have to make sure the
 code I am currently building our board on is good.

 Thanks

 -Original Message-
 From: [EMAIL PROTECTED]
 [mailto:[EMAIL PROTECTED] On Behalf Of Steven James
 Sent: Friday, November 05, 2004 10:40 PM
 To: Gin Lin
 Cc: [EMAIL PROTECTED]
 Subject: Re: ram init

 Greetings,

 It's been a while since I've looked at it, but when I last looked, it
 did
 sometimes need power cycled to restart. I worked around that by making
 the
 kernel reboot by writing 0x0e to port 0xcf9. That causes the
southbridge
 to do a 3 second power off.

 G'day,
 sjames



 On Fri, 5 Nov 2004, Gin Lin wrote:

  Does anyone know if the raminit.c under intel/E7501 is stable
enough?
 I am
  having a problem with the system reseting when it jumps to the first
 address
  in the ram. Could the procedures of writing NorthBrige registers
have
  problems?
 
  thanks,
  Gin
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 |  |  |||
 by Linux Labs International, Inc.
Steven James, CTO

 55 Marietta Street
 Suite 1830
 Atlanta, Ga 30303
 866 824 9737 support

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|  |  |||
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55 Marietta Street
Suite 1830
Atlanta, Ga 30303
866 824 9737 support

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ram_check

2004-11-14 Thread Gin








I have a question with the
ram. Dont know if anyone has heard the same problem before. I ran the ram_check
procedure and it reports that there are always 4 bytes out of every 64 bytes
that reads zero. I think thats why I can run the code in the ram but it
gets reset in the in different places.





Gin 








Tyan/s2735

2004-11-10 Thread Gin
Steven,
Thanks for the info. I've got the ram up by filling the some values in
North Bridge(I reference a regular bios).

I have an essential question about the code base for Tyan/s2735. Has it
ever successfully built and run on that board? I have to make sure the
code I am currently building our board on is good.

Thanks   

-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of Steven James
Sent: Friday, November 05, 2004 10:40 PM
To: Gin Lin
Cc: [EMAIL PROTECTED]
Subject: Re: ram init

Greetings,

It's been a while since I've looked at it, but when I last looked, it
did
sometimes need power cycled to restart. I worked around that by making
the
kernel reboot by writing 0x0e to port 0xcf9. That causes the southbridge
to do a 3 second power off.

G'day,
sjames



On Fri, 5 Nov 2004, Gin Lin wrote:

 Does anyone know if the raminit.c under intel/E7501 is stable enough?
I am
 having a problem with the system reseting when it jumps to the first
address
 in the ram. Could the procedures of writing NorthBrige registers have
 problems?

 thanks,
 Gin
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|  |  |||
by Linux Labs International, Inc.
   Steven James, CTO

55 Marietta Street
Suite 1830
Atlanta, Ga 30303
866 824 9737 support

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ram init

2004-11-04 Thread Gin Lin
Does anyone know if the raminit.c under intel/E7501 is stable enough? I am 
having a problem with the system reseting when it jumps to the first address 
in the ram. Could the procedures of writing NorthBrige registers have 
problems?

thanks,
Gin  
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PXE support

2004-10-31 Thread Gin
Hello,
It seems like linuxbios supports PXE. Can anyone tell me how it works if
you have experience with it? Thanks

Gin

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fallback and normal image

2004-10-28 Thread Gin
I could build an image now. Thanks all. 
I am curious about how fallback image and normal image are used. It
looks like in the normal image, it always jumps to the Protected_start.
I don't think it should be the start when the system boots up since it
will be in real-mode. So which image should I use? 

Regards,
Gin

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RE: linux kernel patch

2004-10-15 Thread Gin
Ron, 
Thanks for the email. I downloaded the freebios2 version. It looks much
cleaner. Good work. Currently we are looking for a proper mainboard
among our products to run linuxbios on. I don't know the specific
chipset but we tend to use Intel solution on our products. Is there any
suggestion for us to pick a chipset/cpu model? We hope to build a more
stable machine at the first time. 

I happened to have a old board(440GX). As I can't wait for they to pick
a mainboard, I decide to try linuxbios on this one first. 
Can I build the linuxbios image from the new source- freebios2? Would
that work as the included directories might have been changed in the new
source?  

For the new source(freebios2)
1. Do we need a Config file for each mainboard to run? Does it work(the
building process)like the old way or it has been changed?
2. Is any document of how to build linuxbios on the new source? 


Regards,
Gin
-Original Message-
From: Ronald G. Minnich [mailto:[EMAIL PROTECTED] 
Sent: Thursday, October 14, 2004 11:32 PM
To: Gin
Cc: [EMAIL PROTECTED]
Subject: Re: linux kernel patch 

we don't patch kernels any more. Just ignore anything about kernel 
patches.

What's the hardware in question ?What chipset? We're happy to help.

ron

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linux kernel patch

2004-10-14 Thread Gin








Hello Ron,

I dont know if you are still working on
this project since its 2004 now. I just
finished a presentation of Linuxbios at work. We are
highly interested in getting linuxbios running on our
systems(we design motherboards). I have a question
about the way you do the kernel patch. If the patch is to initialize the uninitialized hardware in order to run linux.
Then why didnt we add it into the C code. Let it become part of linuxbios rom image? Furthermore,
why do you have different patches for different linux
kernel versions? 

Sorry if the questions are too basic. We just started
trying to get it built. 



Thanks,

Gin








RE: linux kernel patch

2004-10-14 Thread Gin
Hello David,
Thanks for your quick response. Do you know where I can get the latest
linuxbios source code(freebios2)? Call me crazy, but I couldn't seem
able to find it through SourceForge.
http://sourceforge.net/

thanks,
Gin
  

-Original Message-
From: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] On Behalf Of David Hendricks
Sent: Thursday, October 14, 2004 4:08 PM
To: [EMAIL PROTECTED]
Subject: Re: linux kernel patch

We appreciate your interest in the project! As I recall, the patches
were just something for some SiS chipset support in older LinuxBIOS
versions (freebios1). Since then, LinuxBIOS has advanced to include more
generic chipset support that does not require kernel patches.

The current LinuxBIOS (freebios2) will work without patches to your
kernel.

On Thu, 14 Oct 2004 15:34:13 +0800
Gin [EMAIL PROTECTED] wrote:

 Hello Ron,
 I don't' know if you are still working on this project since it's 2004
 now. I just finished a presentation of Linuxbios at work. We are
 highly interested in getting linuxbios running on our systems(we
 design motherboards). I have a question about the way you do the
 kernel patch. If the patch is to initialize the uninitialized hardware
 in order to run linux. Then why didn't we add it into the C code. Let
 it become part of linuxbios rom image? Furthermore, why do you have
 different patches for different linux kernel versions?   
 Sorry if the questions are too basic. We just started trying to get it
 built. 
  
 Thanks,
 Gin
 
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