Re: [PATCH] pata_of_platform: Move electra-ide support over to new framework
Olof Johansson writes: FWIW I'm presuming this work will go via a powerpc tree not libata... Generally that's not the case, but here it's largely an arch-specific work. Ok, that works. I was thinking of letting this patch go through libata, and do the removal through the powerpc merge path. But I can do both through powerpc. Are you going to send me a patch to do this addition plus the removal of the old stuff, or do you want me to merge this patch as is? Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: tiny login
pjmaiya schrieb: hi, - don't cross-post - don't post HTML to the lists I am using tiny login provided by montavista. Binaries already obtained from tool provided from montavista. We are able to add only 10 users. But I need to add more than 10 users. Tried to contact montavista for support? ;-) I have already downloaded free open source for tinylogin (tinylogin-1.4). Can we modifiy this source code of this version and support users more than 10?? If yes, can somebody inform step to build tiny login and installation method. Well, you propably want to understand the advantage of open source software first. You can (depending on the license) change the code according to your needs... Read: http://tldp.org/HOWTO/Software-Building-HOWTO.html If you have questions, please tell exactly, where you have a problem. $ wget http://tinylogin.busybox.net/downloads/tinylogin-1.4.tar.bz2 $ tar xvf tinylogin-1.4.tar.bz2 $ cd tinylogin-1.4 $ make works like a charm. A quick look into login.c says: // login defines #define TIMEOUT 60 #define FAIL_DELAY3 #define EMPTY_USERNAME_COUNT10 ... which looks quite promising! Ask the busybox guys for details since this is off-topic here. Regards, Clemens Koller __ RD Imaging Devices Anagramm GmbH Rupert-Mayer-Straße 45/1 Linhof Werksgelände D-81379 München Tel.089-741518-50 Fax 089-741518-19 http://www.anagramm-technology.com ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
More patches added to for-2.6.25 and master branches of powerpc.git
Andre Detsch (1):
[POWERPC] cell: safer of_has_vicinity routine
Balbir Singh (1):
[POWERPC] Fake NUMA emulation for PowerPC
Benjamin Herrenschmidt (20):
[POWERPC] pci32: Remove bogus alignment message
[POWERPC] pci32: Use generic pci_assign_unassign_resources
[POWERPC] pci32: Remove PowerMac P2P bridge IO hack
[POWERPC] pci32: Add flags modifying the PCI code behaviour
[POWERPC] pci32: Remove obsolete PowerMac bus number hack
[POWERPC] pci32: Add platform option to enable /proc PCI domains
[POWERPC] Merge pcibios_resource_to_bus/bus_to_resource
[POWERPC] Merge PCI resource fixups
[POWERPC] Merge PCI resource allocation assignment
[POWERPC] fix iSeries PCI resource management
[POWERPC] Updates/fixes to 32 bits pcibios_enable_device()
[POWERPC] Merge 32 and 64 bits pcibios_enable_device
[POWERPC] Fixup powermac enable device hook
[POWERPC] Clear pci_probe_only on 64 bits PowerMac
[POWERPC] Various fixes to pcibios_enable_device()
[POWERPC] Enable self-view of the HT host bridge on PowerMac G5
[POWERPC] Improve resource setup of PowerMac G5 HT bridge
[POWERPC] Fixup skipping of PowerMac PCI-PCI bridge closed resources
[POWERPC] Disable PCI IO/Mem on a device when resources can't be allocated
[POWERPC] Fix PCI IRQ fallback code to not map IRQ 0
Bob Nelson (1):
[POWERPC] OProfile: fix cbe pm signal routing problem
Cyrill Gorcunov (1):
[POWERPC] CHRP: Fix possible NULL pointer dereference
David Gibson (2):
[POWERPC] Merge dtc upstream source
[POWERPC] Use embedded dtc in kernel builds
Grant Likely (1):
[POWERPC] Add machine initcall macros
Ishizaki Kou (3):
[POWERPC] cell: add missing '\n'
[POWERPC] Cleanup calling mmio_nvram_init
[POWERPC] celleb: Split machine definition
Jeremy Kerr (6):
[POWERPC] cell: export force_sig_info()
[POWERPC] cell: handle kernel SLB setup in spu_base.c
[POWERPC] cell: use spu_load_slb for SLB setup
[POWERPC] cell: add spu_64k_pages_available() check
[POWERPC] cell: handle SPE kernel mappings that cross segment boundaries
[POWERPC] cell: catch errors from sysfs_create_group()
Jochen Friedrich (2):
[POWERPC] Add support for PORTA and PORTB odr registers
[POWERPC] Move CPM command handling into the cpm drivers
Johannes Berg (3):
[POWERPC] adb: Replace sleep notifier with platform driver suspend/resume
hooks
[POWERPC] via-pmu: Kill sleep notifiers completely
[POWERPC] powermac: Use generic suspend code
Jon Loeliger (3):
[POWERPC] 8xxx: Convert #include of asm/of_{platform, device}.h into
linux/of_{platform, device}.h.
[POWERPC] 86xx: Add aliases node to 8641hpcn DTS file.
[POWERPC] cell: Convert #include of asm/of_{platform, device}.h into
linux/of_{platform, device}.h.
Julia Lawall (3):
[POWERPC] arch/ppc: Remove an unnecessary pci_dev_put
[POWERPC] arch/powerpc: Add missing of_node_put
[POWERPC] cell/cbe_regs.c: Add missing of_node_put
Kevin Corry (1):
[POWERPC] perfmon2: make pm_interval register read/write
Kumar Gala (5):
[POWERPC] Add SPRN for Embedded registers specified in PowerISA 2.04
[POWERPC] Emulate isel (Integer Select) instruction
[POWERPC] FSL: I2C device tree cleanups
[POWERPC] FSL: enet device tree cleanups
[POWERPC] FSL: Added aliases node to device trees
Li Yang (5):
[POWERPC] add e300c4 entry to cputable
[POWERPC] ipic: add new interrupts introduced by new chip
[POWERPC] 83xx: Add platform support for MPC837x MDS board
[POWERPC] 83xx: Add MPC837x MDS default kernel configuration
[POWERPC] ipic: ack only for edge interrupts
Li Zefan (1):
[POWERPC] Don't cast a struct pointer to list_head pointer
Lucas Woods (2):
[POWERPC] arch/powerpc: Remove duplicate includes
[POWERPC] arch/ppc: Remove duplicate includes
Michael Ellerman (1):
[POWERPC] Implement pci_set_dma_mask() in terms of the dma_ops
Milton Miller (6):
[POWERPC] Push down or eliminate smp_processor_id calls in xics code
[POWERPC] init_decrementer_clockevent can be static __init
[POWERPC] Use __get_cpu_var in time.c
[POWERPC] Timer interrupt: use a struct for two per_cpu varables
[POWERPC] Depend on -initialized in calc_steal_time
[POWERPC] Optimize account_system_vtime
Olof Johansson (3):
[POWERPC] MPIC: Minor optimization of ipi handler
[POWERPC] pasemi: Implement MSI support
[POWERPC] holly.c: Remove unnecessary include of linux/ide.h
Paul Mackerras (5):
[POWERPC] Convert media-bay.c to use the kthread API
[POWERPC] Convert adb.c to use kthread API and not spin on ADB requests
[POWERPC] Convert therm_pm72.c to use the kthread API
[POWERPC] Convert therm_windtunnel.c to use the kthread API
[POWERPC] Fix sleep on powerbook 3400
Scott Wood
[PATCH -mm 14/43] powerpc user_regset gpr
This implements user_regset-style accessors for the powerpc general registers.
In the future these functions will be the only place that needs to understand
the user_regset layout (core dump format) and how it maps to the internal
representation of user thread state.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 91 ++
1 files changed, 91 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 4edc118..e493fc0 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -119,6 +119,97 @@ int ptrace_put_reg(struct task_struct *task, int regno,
unsigned long data)
return -EIO;
}
+static int gpr_get(struct task_struct *target, const struct user_regset
*regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ if (target-thread.regs == NULL)
+ return -EIO;
+
+ CHECK_FULL_REGS(target-thread.regs);
+
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.regs,
+ 0, offsetof(struct pt_regs, msr));
+ if (!ret) {
+ unsigned long msr = get_user_msr(target);
+ ret = user_regset_copyout(pos, count, kbuf, ubuf, msr,
+ offsetof(struct pt_regs, msr),
+ offsetof(struct pt_regs, msr) +
+ sizeof(msr));
+ }
+
+ BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
+offsetof(struct pt_regs, msr) + sizeof(long));
+
+ if (!ret)
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.regs-orig_gpr3,
+ offsetof(struct pt_regs, orig_gpr3),
+ sizeof(struct pt_regs));
+ if (!ret)
+ ret = user_regset_copyout_zero(pos, count, kbuf, ubuf,
+ sizeof(struct pt_regs), -1);
+
+ return ret;
+}
+
+static int gpr_set(struct task_struct *target, const struct user_regset
*regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ unsigned long reg;
+ int ret;
+
+ if (target-thread.regs == NULL)
+ return -EIO;
+
+ CHECK_FULL_REGS(target-thread.regs);
+
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+target-thread.regs,
+0, PT_MSR * sizeof(reg));
+
+ if (!ret count 0) {
+ ret = user_regset_copyin(pos, count, kbuf, ubuf, reg,
+PT_MSR * sizeof(reg),
+(PT_MSR + 1) * sizeof(reg));
+ if (!ret)
+ ret = set_user_msr(target, reg);
+ }
+
+ BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
+offsetof(struct pt_regs, msr) + sizeof(long));
+
+ if (!ret)
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+target-thread.regs-orig_gpr3,
+PT_ORIG_R3 * sizeof(reg),
+(PT_MAX_PUT_REG + 1) * sizeof(reg));
+
+ if (PT_MAX_PUT_REG + 1 PT_TRAP !ret)
+ ret = user_regset_copyin_ignore(
+ pos, count, kbuf, ubuf,
+ (PT_MAX_PUT_REG + 1) * sizeof(reg),
+ PT_TRAP * sizeof(reg));
+
+ if (!ret count 0) {
+ ret = user_regset_copyin(pos, count, kbuf, ubuf, reg,
+PT_TRAP * sizeof(reg),
+(PT_TRAP + 1) * sizeof(reg));
+ if (!ret)
+ ret = set_user_trap(target, reg);
+ }
+
+ if (!ret)
+ ret = user_regset_copyin_ignore(
+ pos, count, kbuf, ubuf,
+ (PT_TRAP + 1) * sizeof(reg), -1);
+
+ return ret;
+}
static int fpr_get(struct task_struct *target, const struct user_regset
*regset,
unsigned int pos, unsigned int count,
--
1.5.3.6
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[PATCH -mm 19/43] powerpc core dump cleanup
Remove some dead code we no longer need now that the
user_regset interfaces are doing all these jobs.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/process.c | 48 -
include/asm-powerpc/elf.h | 46 ---
2 files changed, 0 insertions(+), 94 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index b9d8837..9c2983c 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -104,17 +104,6 @@ void enable_kernel_fp(void)
}
EXPORT_SYMBOL(enable_kernel_fp);
-int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
-{
- if (!tsk-thread.regs)
- return 0;
- flush_fp_to_thread(current);
-
- memcpy(fpregs, tsk-thread.fpr[0], sizeof(*fpregs));
-
- return 1;
-}
-
#ifdef CONFIG_ALTIVEC
void enable_kernel_altivec(void)
{
@@ -148,35 +137,6 @@ void flush_altivec_to_thread(struct task_struct *tsk)
preempt_enable();
}
}
-
-int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
-{
- /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
-* separately, see below */
- const int nregs = ELF_NVRREG - 2;
- elf_vrreg_t *reg;
- u32 *dest;
-
- if (tsk == current)
- flush_altivec_to_thread(tsk);
-
- reg = (elf_vrreg_t *)vrregs;
-
- /* copy the 32 vr registers */
- memcpy(reg, tsk-thread.vr[0], nregs * sizeof(*reg));
- reg += nregs;
-
- /* copy the vscr */
- memcpy(reg, tsk-thread.vscr, sizeof(*reg));
- reg++;
-
- /* vrsave is stored in the high 32bit slot of the final 128bits */
- memset(reg, 0, sizeof(*reg));
- dest = (u32 *)reg;
- *dest = tsk-thread.vrsave;
-
- return 1;
-}
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
@@ -209,14 +169,6 @@ void flush_spe_to_thread(struct task_struct *tsk)
preempt_enable();
}
}
-
-int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
-{
- flush_spe_to_thread(current);
- /* We copy u32 evr[32] + u64 acc + u32 spefscr - 35 */
- memcpy(evrregs, current-thread.evr[0], sizeof(u32) * 35);
- return 1;
-}
#endif /* CONFIG_SPE */
#ifndef CONFIG_SMP
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index 9080d85..fe309b4 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -178,52 +178,6 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
#define ELF_ET_DYN_BASE (0x2000)
-/*
- * Our registers are always unsigned longs, whether we're a 32 bit
- * process or 64 bit, on either a 64 bit or 32 bit kernel.
- *
- * This macro relies on elf_regs[i] having the right type to truncate to,
- * either u32 or u64. It defines the body of the elf_core_copy_regs
- * function, either the native one with elf_gregset_t elf_regs or
- * the 32-bit one with elf_gregset_t32 elf_regs.
- */
-#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
- int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
- (size_t)ELF_NGREG);\
- for (i = 0; i nregs; i++) \
- elf_regs[i] = ((unsigned long *) regs)[i]; \
- memset(elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))
-
-/* Common routine for both 32-bit and 64-bit native processes */
-static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
- struct pt_regs *regs)
-{
- PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
-}
-#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
-
-static inline int dump_task_regs(struct task_struct *tsk,
-elf_gregset_t *elf_regs)
-{
- struct pt_regs *regs = tsk-thread.regs;
- if (regs)
- ppc_elf_core_copy_regs(*elf_regs, regs);
-
- return 1;
-}
-#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
-
-extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
-#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
-
-typedef elf_vrregset_t elf_fpxregset_t;
-
-#ifdef CONFIG_ALTIVEC
-extern int dump_task_altivec(struct task_struct *, elf_vrregset_t *vrregs);
-#define ELF_CORE_COPY_XFPREGS(tsk, regs) dump_task_altivec(tsk, regs)
-#define ELF_CORE_XFPREG_TYPE NT_PPC_VMX
-#endif
-
#endif /* __KERNEL__ */
/* ELF_HWCAP yields a mask that user programs can use to figure out what
--
1.5.3.6
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[PATCH -mm 13/43] powerpc ptrace special regs
This isolates the ptrace code for the special-case registers msr and trap
from the ptrace-layout dispatch code. This should inline away completely.
It cleanly separates the low-level machine magic that has to be done for
deep reasons, from the superficial details of the ptrace interface.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 45 --
1 files changed, 30 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 8c25b00..4edc118 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -60,20 +60,38 @@
#define PT_MAX_PUT_REG PT_CCR
#endif
+static unsigned long get_user_msr(struct task_struct *task)
+{
+ return task-thread.regs-msr | task-thread.fpexc_mode;
+}
+
+static int set_user_msr(struct task_struct *task, unsigned long msr)
+{
+ task-thread.regs-msr = ~MSR_DEBUGCHANGE;
+ task-thread.regs-msr |= msr MSR_DEBUGCHANGE;
+ return 0;
+}
+
+/*
+ * We prevent mucking around with the reserved area of trap
+ * which are used internally by the kernel.
+ */
+static int set_user_trap(struct task_struct *task, unsigned long trap)
+{
+ task-thread.regs-trap = trap 0xfff0;
+ return 0;
+}
+
/*
* Get contents of register REGNO in task TASK.
*/
unsigned long ptrace_get_reg(struct task_struct *task, int regno)
{
- unsigned long tmp = 0;
-
if (task-thread.regs == NULL)
return -EIO;
- if (regno == PT_MSR) {
- tmp = ((unsigned long *)task-thread.regs)[PT_MSR];
- return tmp | task-thread.fpexc_mode;
- }
+ if (regno == PT_MSR)
+ return get_user_msr(task);
if (regno (sizeof(struct pt_regs) / sizeof(unsigned long)))
return ((unsigned long *)task-thread.regs)[regno];
@@ -89,15 +107,12 @@ int ptrace_put_reg(struct task_struct *task, int regno,
unsigned long data)
if (task-thread.regs == NULL)
return -EIO;
- if (regno = PT_MAX_PUT_REG || regno == PT_TRAP) {
- if (regno == PT_MSR)
- data = (data MSR_DEBUGCHANGE)
- | (task-thread.regs-msr ~MSR_DEBUGCHANGE);
- /* We prevent mucking around with the reserved area of trap
-* which are used internally by the kernel
-*/
- if (regno == PT_TRAP)
- data = 0xfff0;
+ if (regno == PT_MSR)
+ return set_user_msr(task, data);
+ if (regno == PT_TRAP)
+ return set_user_trap(task, data);
+
+ if (regno = PT_MAX_PUT_REG) {
((unsigned long *)task-thread.regs)[regno] = data;
return 0;
}
--
1.5.3.6
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[PATCH -mm 17/43] powerpc CORE_DUMP_USE_REGSET
This switches powerpc to using the user_regset-based code for ELF core dumps. The core dumps come out exactly the same either way, except that the NT_PPC_VMX note is now omitted for any thread that never touched its Altivec registers (thread_struct.vr_used). Signed-off-by: Roland McGrath [EMAIL PROTECTED] --- include/asm-powerpc/elf.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h index 6bd07ef..fd9bf8b 100644 --- a/include/asm-powerpc/elf.h +++ b/include/asm-powerpc/elf.h @@ -167,6 +167,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; #define elf_check_arch(x) ((x)-e_machine == ELF_ARCH) #define USE_ELF_CORE_DUMP +#define CORE_DUMP_USE_REGSET #define ELF_EXEC_PAGESIZE PAGE_SIZE /* This is the location that an ET_DYN program is loaded if exec'ed. Typical -- 1.5.3.6 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH -mm 20/43] powerpc SPE core dump
This makes the SPE register data appear in ELF core dumps,
using the new n_type value NT_PPC_SPE (0x101). This new
note type is not used by any consumers of core files yet,
but support can be added. I don't even have any hardware
with SPE capabilities, so I've never seen such a note.
But this demonstrates how simple it is to export register
information in core dumps when the user_regset style is
used for the low-level code.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c |2 +-
include/linux/elf.h |1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index e961e10..0231e7d 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -642,7 +642,7 @@ static const struct user_regset compat_regsets[] = {
#endif
#ifdef CONFIG_SPE
[REGSET_SPE] = {
- .n = 35,
+ .core_note_type = NT_PPC_SPE, .n = 35,
.size = sizeof(u32), .align = sizeof(u32),
.active = evr_active, .get = evr_get, .set = evr_set
},
diff --git a/include/linux/elf.h b/include/linux/elf.h
index 576e83b..ba268b2 100644
--- a/include/linux/elf.h
+++ b/include/linux/elf.h
@@ -355,6 +355,7 @@ typedef struct elf64_shdr {
#define NT_AUXV6
#define NT_PRXFPREG 0x46e62b7f /* copied from
gdb5.1/include/elf/common.h */
#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
+#define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
/* Note header in a PT_NOTE section */
--
1.5.3.6
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[PATCH -mm 22/43] powerpc ptrace generic peekdata/pokedata
Now that ptrace_request handles these, we can drop some more boilerplate.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 12
1 files changed, 0 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index eb27bd9..3e228d6 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -697,12 +697,6 @@ long arch_ptrace(struct task_struct *child, long request,
long addr, long data)
int ret = -EPERM;
switch (request) {
- /* when I and D space are separate, these will need to be fixed. */
- case PTRACE_PEEKTEXT: /* read word at location addr. */
- case PTRACE_PEEKDATA:
- ret = generic_ptrace_peekdata(child, addr, data);
- break;
-
/* read the word at location addr in the USER area. */
case PTRACE_PEEKUSR: {
unsigned long index, tmp;
@@ -730,12 +724,6 @@ long arch_ptrace(struct task_struct *child, long request,
long addr, long data)
break;
}
- /* If I and D space are separate, this will have to be fixed. */
- case PTRACE_POKETEXT: /* write the word at location addr. */
- case PTRACE_POKEDATA:
- ret = generic_ptrace_pokedata(child, addr, data);
- break;
-
/* write the word at location addr in the USER area */
case PTRACE_POKEUSR: {
unsigned long index;
--
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[PATCH -mm 21/43] powerpc ptrace user_regset
This replaces all the code for powerpc PTRACE_*REGS* requests with
simple calls to copy_regset_from_user and copy_regset_to_user. All
the ptrace formats are either the whole corresponding user_regset
format (core dump format) or a leading subset of it, so we can get
rid of all the remaining embedded knowledge of both those layouts
and of the internal data structures they correspond to. Only the
user_reget accessors need to implement that.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 234 +++---
1 files changed, 59 insertions(+), 175 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 0231e7d..eb27bd9 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -237,24 +237,6 @@ static int fpr_set(struct task_struct *target, const
struct user_regset *regset,
target-thread.fpr, 0, -1);
}
-static int get_fpregs(void __user *data, struct task_struct *task,
- int has_fpscr)
-{
- unsigned int count = has_fpscr ? 33 : 32;
- if (!access_ok(VERIFY_WRITE, data, count * sizeof(double)))
- return -EFAULT;
- return fpr_get(task, NULL, 0, count * sizeof(double), NULL, data);
-}
-
-static int set_fpregs(void __user *data, struct task_struct *task,
- int has_fpscr)
-{
- unsigned int count = has_fpscr ? 33 : 32;
- if (!access_ok(VERIFY_READ, data, count * sizeof(double)))
- return -EFAULT;
- return fpr_set(task, NULL, 0, count * sizeof(double), NULL, data);
-}
-
#ifdef CONFIG_ALTIVEC
/*
@@ -339,31 +321,6 @@ static int vr_set(struct task_struct *target, const struct
user_regset *regset,
return ret;
}
-
-/*
- * Get contents of AltiVec register state in task TASK
- */
-static int get_vrregs(unsigned long __user *data, struct task_struct *task)
-{
- if (!access_ok(VERIFY_WRITE, data,
- 33 * sizeof(vector128) + sizeof(u32)))
- return -EFAULT;
-
- return vr_get(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32),
- NULL, data);
-}
-
-/*
- * Write contents of AltiVec register state into task TASK.
- */
-static int set_vrregs(struct task_struct *task, unsigned long __user *data)
-{
- if (!access_ok(VERIFY_READ, data, 33 * sizeof(vector128) + sizeof(u32)))
- return -EFAULT;
-
- return vr_set(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32),
- NULL, data);
-}
#endif /* CONFIG_ALTIVEC */
#ifdef CONFIG_SPE
@@ -430,28 +387,6 @@ static int evr_set(struct task_struct *target, const
struct user_regset *regset,
return ret;
}
-
-/*
- * Get contents of SPE register state in task TASK.
- */
-static int get_evrregs(unsigned long __user *data, struct task_struct *task)
-{
- if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(u32)))
- return -EFAULT;
-
- return evr_get(task, NULL, 0, 35 * sizeof(u32), NULL, data);
-}
-
-/*
- * Write contents of SPE register state into task TASK.
- */
-static int set_evrregs(struct task_struct *task, unsigned long *data)
-{
- if (!access_ok(VERIFY_READ, data, 35 * sizeof(u32)))
- return -EFAULT;
-
- return evr_set(task, NULL, 0, 35 * sizeof(u32), NULL, data);
-}
#endif /* CONFIG_SPE */
@@ -732,55 +667,29 @@ void ptrace_disable(struct task_struct *child)
static long arch_ptrace_old(struct task_struct *child, long request, long addr,
long data)
{
- int ret = -EPERM;
-
- switch(request) {
- case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
- int i;
- unsigned long *reg = ((unsigned long *)child-thread.regs)[0];
- unsigned long __user *tmp = (unsigned long __user *)addr;
-
- CHECK_FULL_REGS(child-thread.regs);
- for (i = 0; i 32; i++) {
- ret = put_user(*reg, tmp);
- if (ret)
- break;
- reg++;
- tmp++;
- }
- break;
- }
-
- case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
- int i;
- unsigned long *reg = ((unsigned long *)child-thread.regs)[0];
- unsigned long __user *tmp = (unsigned long __user *)addr;
-
- CHECK_FULL_REGS(child-thread.regs);
- for (i = 0; i 32; i++) {
- ret = get_user(*reg, tmp);
- if (ret)
- break;
- reg++;
- tmp++;
- }
- break;
- }
-
- case PPC_PTRACE_GETFPREGS: { /* Get FPRs 0 - 31. */
- flush_fp_to_thread(child);
- ret = get_fpregs((void __user *)addr, child, 0);
- break;
- }
-
-
[PATCH -mm 24/43] powerpc compat_sys_ptrace
This replaces powerpc's compat_sys_ptrace with a compat_arch_ptrace and
enables the new generic definition of compat_sys_ptrace instead.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace32.c | 33 +
include/asm-powerpc/ptrace.h |2 ++
2 files changed, 7 insertions(+), 28 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 6612304..0f6eea0 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -85,33 +85,13 @@ static long compat_ptrace_old(struct task_struct *child,
long request,
return ret;
}
-long compat_sys_ptrace(int request, int pid, unsigned long addr,
- unsigned long data)
+long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
+ compat_ulong_t caddr, compat_ulong_t cdata)
{
- struct task_struct *child;
+ unsigned long addr = caddr;
+ unsigned long data = cdata;
int ret;
- lock_kernel();
- if (request == PTRACE_TRACEME) {
- ret = ptrace_traceme();
- goto out;
- }
-
- child = ptrace_get_task_struct(pid);
- if (IS_ERR(child)) {
- ret = PTR_ERR(child);
- goto out;
- }
-
- if (request == PTRACE_ATTACH) {
- ret = ptrace_attach(child);
- goto out_tsk;
- }
-
- ret = ptrace_check_attach(child, request == PTRACE_KILL);
- if (ret 0)
- goto out_tsk;
-
switch (request) {
/*
* Read 4 bytes of the other process' storage
@@ -375,9 +355,6 @@ long compat_sys_ptrace(int request, int pid, unsigned long
addr,
ret = compat_ptrace_request(child, request, addr, data);
break;
}
-out_tsk:
- put_task_struct(child);
-out:
- unlock_kernel();
+
return ret;
}
diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h
index 3063363..a8cb00c 100644
--- a/include/asm-powerpc/ptrace.h
+++ b/include/asm-powerpc/ptrace.h
@@ -55,6 +55,8 @@ struct pt_regs {
#ifdef __powerpc64__
+#define __ARCH_WANT_COMPAT_SYS_PTRACE
+
#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
/* Size of dummy stack frame allocated when calling signal handler. */
--
1.5.3.6
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[PATCH -mm 18/43] powerpc compat_binfmt_elf
This switches the CONFIG_PPC64 support for 32-bit ELF to use the generic
fs/compat_binfmt_elf.c implementation instead of our own binfmt_elf32.c.
Since so much is the same between 32/64, there is only one macro we have to
define to make the generic support work out of the box.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/Makefile |3 +-
arch/powerpc/kernel/binfmt_elf32.c | 69
include/asm-powerpc/elf.h |1 +
3 files changed, 3 insertions(+), 70 deletions(-)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 615ed96..2cbe58a 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -17,11 +17,12 @@ obj-y := semaphore.o
cputable.o ptrace.o syscalls.o \
init_task.o process.o systbl.o idle.o \
signal.o
obj-y += vdso32/
-obj-$(CONFIG_PPC64)+= setup_64.o binfmt_elf32.o sys_ppc32.o \
+obj-$(CONFIG_PPC64)+= setup_64.o sys_ppc32.o \
signal_64.o ptrace32.o \
paca.o cpu_setup_ppc970.o \
cpu_setup_pa6t.o \
firmware.o sysfs.o nvram_64.o
+obj-$(CONFIG_PPC64)+= ../../../fs/compat_binfmt_elf.o
obj-$(CONFIG_PPC64)+= vdso64/
obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
diff --git a/arch/powerpc/kernel/binfmt_elf32.c
b/arch/powerpc/kernel/binfmt_elf32.c
deleted file mode 100644
index 1d45d77..000
--- a/arch/powerpc/kernel/binfmt_elf32.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * binfmt_elf32.c: Support 32-bit PPC ELF binaries on Power3 and followons.
- * based on the SPARC64 version.
- * Copyright (C) 1995, 1996, 1997, 1998 David S. Miller([EMAIL
PROTECTED])
- * Copyright (C) 1995, 1996, 1997, 1998 Jakub Jelinek ([EMAIL PROTECTED])
- *
- * Copyright (C) 2000,2001 Ken Aaker ([EMAIL PROTECTED]), IBM Corp
- * Copyright (C) 2001 Anton Blanchard ([EMAIL PROTECTED]), IBM
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include asm/processor.h
-#include linux/module.h
-#include linux/compat.h
-#include linux/elfcore-compat.h
-
-#undef ELF_ARCH
-#undef ELF_CLASS
-#define ELF_CLASS ELFCLASS32
-#define ELF_ARCH EM_PPC
-
-#undef elfhdr
-#undef elf_phdr
-#undef elf_note
-#undef elf_addr_t
-#define elfhdr elf32_hdr
-#define elf_phdr elf32_phdr
-#define elf_note elf32_note
-#define elf_addr_t Elf32_Off
-
-#define elf_prstatus compat_elf_prstatus
-#define elf_prpsinfo compat_elf_prpsinfo
-
-#define elf_core_copy_regs compat_elf_core_copy_regs
-static inline void compat_elf_core_copy_regs(compat_elf_gregset_t *elf_regs,
-struct pt_regs *regs)
-{
- PPC_ELF_CORE_COPY_REGS((*elf_regs), regs);
-}
-
-#define elf_core_copy_task_regs compat_elf_core_copy_task_regs
-static int compat_elf_core_copy_task_regs(struct task_struct *tsk,
- compat_elf_gregset_t *elf_regs)
-{
- struct pt_regs *regs = tsk-thread.regs;
- if (regs)
- compat_elf_core_copy_regs(elf_regs, regs);
- return 1;
-}
-
-#include linux/time.h
-
-#undef cputime_to_timeval
-#define cputime_to_timeval cputime_to_compat_timeval
-static __inline__ void
-cputime_to_compat_timeval(const cputime_t cputime, struct compat_timeval
*value)
-{
- unsigned long jiffies = cputime_to_jiffies(cputime);
- value-tv_usec = (jiffies % HZ) * (100L / HZ);
- value-tv_sec = jiffies / HZ;
-}
-
-#define init_elf_binfmt init_elf32_binfmt
-
-#include ../../../fs/binfmt_elf.c
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index fd9bf8b..9080d85 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -165,6 +165,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
* This is used to ensure we don't load something for the wrong architecture.
*/
#define elf_check_arch(x) ((x)-e_machine == ELF_ARCH)
+#define compat_elf_check_arch(x) ((x)-e_machine == EM_PPC)
#define USE_ELF_CORE_DUMP
#define CORE_DUMP_USE_REGSET
--
1.5.3.6
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[PATCH -mm 25/43] powerpc ptrace32 user_regset
This cleans up the 32-bit ptrace syscall support to use user_regset calls
to get at the register data for PTRACE_*REGS* calls.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace32.c | 96 ++-
1 files changed, 25 insertions(+), 71 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 0f6eea0..4c1de6a 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -24,6 +24,7 @@
#include linux/smp_lock.h
#include linux/errno.h
#include linux/ptrace.h
+#include linux/regset.h
#include linux/user.h
#include linux/security.h
#include linux/signal.h
@@ -46,43 +47,21 @@
static long compat_ptrace_old(struct task_struct *child, long request,
long addr, long data)
{
- int ret = -EPERM;
-
- switch(request) {
- case PPC_PTRACE_GETREGS: { /* Get GPRs 0 - 31. */
- int i;
- unsigned long *reg = ((unsigned long *)child-thread.regs)[0];
- unsigned int __user *tmp = (unsigned int __user *)addr;
-
- CHECK_FULL_REGS(child-thread.regs);
- for (i = 0; i 32; i++) {
- ret = put_user(*reg, tmp);
- if (ret)
- break;
- reg++;
- tmp++;
- }
- break;
- }
-
- case PPC_PTRACE_SETREGS: { /* Set GPRs 0 - 31. */
- int i;
- unsigned long *reg = ((unsigned long *)child-thread.regs)[0];
- unsigned int __user *tmp = (unsigned int __user *)addr;
-
- CHECK_FULL_REGS(child-thread.regs);
- for (i = 0; i 32; i++) {
- ret = get_user(*reg, tmp);
- if (ret)
- break;
- reg++;
- tmp++;
- }
- break;
+ switch (request) {
+ case PPC_PTRACE_GETREGS:/* Get GPRs 0 - 31. */
+ return copy_regset_to_user(child,
+ task_user_regset_view(current), 0,
+ 0, 32 * sizeof(compat_long_t),
+ compat_ptr(data));
+
+ case PPC_PTRACE_SETREGS:/* Set GPRs 0 - 31. */
+ return copy_regset_from_user(child,
+task_user_regset_view(current), 0,
+0, 32 * sizeof(compat_long_t),
+compat_ptr(data));
}
- }
- return ret;
+ return -EPERM;
}
long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
@@ -291,42 +270,17 @@ long compat_arch_ptrace(struct task_struct *child,
compat_long_t request,
break;
}
- case PTRACE_GETREGS: { /* Get all pt_regs from the child. */
- int ui;
- if (!access_ok(VERIFY_WRITE, (void __user *)data,
- PT_REGS_COUNT * sizeof(int))) {
- ret = -EIO;
- break;
- }
- CHECK_FULL_REGS(child-thread.regs);
- ret = 0;
- for (ui = 0; ui PT_REGS_COUNT; ui ++) {
- ret |= __put_user(ptrace_get_reg(child, ui),
- (unsigned int __user *) data);
- data += sizeof(int);
- }
- break;
- }
-
- case PTRACE_SETREGS: { /* Set all gp regs in the child. */
- unsigned long tmp;
- int ui;
- if (!access_ok(VERIFY_READ, (void __user *)data,
- PT_REGS_COUNT * sizeof(int))) {
- ret = -EIO;
- break;
- }
- CHECK_FULL_REGS(child-thread.regs);
- ret = 0;
- for (ui = 0; ui PT_REGS_COUNT; ui ++) {
- ret = __get_user(tmp, (unsigned int __user *) data);
- if (ret)
- break;
- ptrace_put_reg(child, ui, tmp);
- data += sizeof(int);
- }
- break;
- }
+ case PTRACE_GETREGS:/* Get all pt_regs from the child. */
+ return copy_regset_to_user(
+ child, task_user_regset_view(current), 0,
+ 0, PT_REGS_COUNT * sizeof(compat_long_t),
+ compat_ptr(data));
+
+ case PTRACE_SETREGS:/* Set all gp regs in the child. */
+ return copy_regset_from_user(
+ child, task_user_regset_view(current), 0,
+ 0, PT_REGS_COUNT * sizeof(compat_long_t),
+
[PATCH -mm 23/43] powerpc compat_ptrace_request
This removes some duplicated code by calling the new generic
compat_ptrace_request from powerpc's compat_sys_ptrace.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace32.c | 34 ++
1 files changed, 2 insertions(+), 32 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index fea6206..6612304 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -27,6 +27,7 @@
#include linux/user.h
#include linux/security.h
#include linux/signal.h
+#include linux/compat.h
#include asm/uaccess.h
#include asm/page.h
@@ -112,20 +113,6 @@ long compat_sys_ptrace(int request, int pid, unsigned long
addr,
goto out_tsk;
switch (request) {
- /* when I and D space are separate, these will need to be fixed. */
- case PTRACE_PEEKTEXT: /* read word at location addr. */
- case PTRACE_PEEKDATA: {
- unsigned int tmp;
- int copied;
-
- copied = access_process_vm(child, addr, tmp, sizeof(tmp), 0);
- ret = -EIO;
- if (copied != sizeof(tmp))
- break;
- ret = put_user(tmp, (u32 __user *)data);
- break;
- }
-
/*
* Read 4 bytes of the other process' storage
* data is a pointer specifying where the user wants the
@@ -225,19 +212,6 @@ long compat_sys_ptrace(int request, int pid, unsigned long
addr,
break;
}
- /* If I and D space are separate, this will have to be fixed. */
- case PTRACE_POKETEXT: /* write the word at location addr. */
- case PTRACE_POKEDATA: {
- unsigned int tmp;
- tmp = data;
- ret = 0;
- if (access_process_vm(child, addr, tmp, sizeof(tmp), 1)
- == sizeof(tmp))
- break;
- ret = -EIO;
- break;
- }
-
/*
* Write 4 bytes into the other process' storage
* data is the 4 bytes that the user wants written
@@ -337,10 +311,6 @@ long compat_sys_ptrace(int request, int pid, unsigned long
addr,
break;
}
- case PTRACE_GETEVENTMSG:
- ret = put_user(child-ptrace_message, (unsigned int __user *)
data);
- break;
-
case PTRACE_GETREGS: { /* Get all pt_regs from the child. */
int ui;
if (!access_ok(VERIFY_WRITE, (void __user *)data,
@@ -402,7 +372,7 @@ long compat_sys_ptrace(int request, int pid, unsigned long
addr,
break;
default:
- ret = ptrace_request(child, request, addr, data);
+ ret = compat_ptrace_request(child, request, addr, data);
break;
}
out_tsk:
--
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[PATCH -mm 15/43] powerpc user_regset_view
This provides the task_user_regset_view entry point and support for all the
native-mode (64 on CONFIG_PPC64, 32 on CONFIG_PPC32) thread register state.
This will enable generic machine-independent code to access user-mode
threads' registers for debugging and dumping.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/Makefile |2 +
arch/powerpc/kernel/ptrace.c | 52 ++
2 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index ca51f0c..615ed96 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -2,6 +2,8 @@
# Makefile for the linux kernel.
#
+CFLAGS_ptrace.o+= -DUTS_MACHINE='$(UTS_MACHINE)'
+
ifeq ($(CONFIG_PPC64),y)
EXTRA_CFLAGS += -mno-minimal-toc
endif
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index e493fc0..b32ac5f 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -455,6 +455,58 @@ static int set_evrregs(struct task_struct *task, unsigned
long *data)
#endif /* CONFIG_SPE */
+/*
+ * These are our native regset flavors.
+ */
+enum powerpc_regset {
+ REGSET_GPR,
+ REGSET_FPR,
+#ifdef CONFIG_ALTIVEC
+ REGSET_VMX,
+#endif
+#ifdef CONFIG_SPE
+ REGSET_SPE,
+#endif
+};
+
+static const struct user_regset native_regsets[] = {
+ [REGSET_GPR] = {
+ .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
+ .size = sizeof(long), .align = sizeof(long),
+ .get = gpr_get, .set = gpr_set
+ },
+ [REGSET_FPR] = {
+ .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
+ .size = sizeof(double), .align = sizeof(double),
+ .get = fpr_get, .set = fpr_set
+ },
+#ifdef CONFIG_ALTIVEC
+ [REGSET_VMX] = {
+ .core_note_type = NT_PPC_VMX, .n = 34,
+ .size = sizeof(vector128), .align = sizeof(vector128),
+ .active = vr_active, .get = vr_get, .set = vr_set
+ },
+#endif
+#ifdef CONFIG_SPE
+ [REGSET_SPE] = {
+ .n = 35,
+ .size = sizeof(u32), .align = sizeof(u32),
+ .active = evr_active, .get = evr_get, .set = evr_set
+ },
+#endif
+};
+
+static const struct user_regset_view user_ppc_native_view = {
+ .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
+ .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+ return user_ppc_native_view;
+}
+
+
void user_enable_single_step(struct task_struct *task)
{
struct pt_regs *regs = task-thread.regs;
--
1.5.3.6
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[PATCH -mm 16/43] powerpc user_regset compat
This extends task_user_regset_view CONFIG_PPC64 with support for the 32-bit
view of register state, compatible with what a CONFIG_PPC32 kernel provides.
This will enable generic machine-independent code to access user-mode
threads' registers for debugging and dumping.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 158 ++
1 files changed, 158 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index b32ac5f..e961e10 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -501,8 +501,166 @@ static const struct user_regset_view user_ppc_native_view
= {
.regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
};
+#ifdef CONFIG_PPC64
+#include linux/compat.h
+
+static int gpr32_get(struct task_struct *target,
+const struct user_regset *regset,
+unsigned int pos, unsigned int count,
+void *kbuf, void __user *ubuf)
+{
+ const unsigned long *regs = target-thread.regs-gpr[0];
+ compat_ulong_t *k = kbuf;
+ compat_ulong_t __user *u = ubuf;
+ compat_ulong_t reg;
+
+ if (target-thread.regs == NULL)
+ return -EIO;
+
+ CHECK_FULL_REGS(target-thread.regs);
+
+ pos /= sizeof(reg);
+ count /= sizeof(reg);
+
+ if (kbuf)
+ for (; count 0 pos PT_MSR; --count)
+ *k++ = regs[pos++];
+ else
+ for (; count 0 pos PT_MSR; --count)
+ if (__put_user((compat_ulong_t) regs[pos++], u++))
+ return -EFAULT;
+
+ if (count 0 pos == PT_MSR) {
+ reg = get_user_msr(target);
+ if (kbuf)
+ *k++ = reg;
+ else if (__put_user(reg, u++))
+ return -EFAULT;
+ ++pos;
+ --count;
+ }
+
+ if (kbuf)
+ for (; count 0 pos PT_REGS_COUNT; --count)
+ *k++ = regs[pos++];
+ else
+ for (; count 0 pos PT_REGS_COUNT; --count)
+ if (__put_user((compat_ulong_t) regs[pos++], u++))
+ return -EFAULT;
+
+ pos *= sizeof(reg);
+ count *= sizeof(reg);
+ return user_regset_copyout_zero(pos, count, kbuf, ubuf,
+ PT_REGS_COUNT * sizeof(reg), -1);
+}
+
+static int gpr32_set(struct task_struct *target,
+const struct user_regset *regset,
+unsigned int pos, unsigned int count,
+const void *kbuf, const void __user *ubuf)
+{
+ unsigned long *regs = target-thread.regs-gpr[0];
+ const compat_ulong_t *k = kbuf;
+ const compat_ulong_t __user *u = ubuf;
+ compat_ulong_t reg;
+
+ if (target-thread.regs == NULL)
+ return -EIO;
+
+ CHECK_FULL_REGS(target-thread.regs);
+
+ pos /= sizeof(reg);
+ count /= sizeof(reg);
+
+ if (kbuf)
+ for (; count 0 pos PT_MSR; --count)
+ regs[pos++] = *k++;
+ else
+ for (; count 0 pos PT_MSR; --count) {
+ if (__get_user(reg, u++))
+ return -EFAULT;
+ regs[pos++] = reg;
+ }
+
+
+ if (count 0 pos == PT_MSR) {
+ if (kbuf)
+ reg = *k++;
+ else if (__get_user(reg, u++))
+ return -EFAULT;
+ set_user_msr(target, reg);
+ ++pos;
+ --count;
+ }
+
+ if (kbuf)
+ for (; count 0 pos = PT_MAX_PUT_REG; --count)
+ regs[pos++] = *k++;
+ else
+ for (; count 0 pos = PT_MAX_PUT_REG; --count) {
+ if (__get_user(reg, u++))
+ return -EFAULT;
+ regs[pos++] = reg;
+ }
+
+ if (count 0 pos == PT_TRAP) {
+ if (kbuf)
+ reg = *k++;
+ else if (__get_user(reg, u++))
+ return -EFAULT;
+ set_user_trap(target, reg);
+ ++pos;
+ --count;
+ }
+
+ pos *= sizeof(reg);
+ count *= sizeof(reg);
+ return user_regset_copyin_ignore(pos, count, kbuf, ubuf,
+(PT_TRAP + 1) * sizeof(reg), -1);
+}
+
+/*
+ * These are the regset flavors matching the CONFIG_PPC32 native set.
+ */
+static const struct user_regset compat_regsets[] = {
+ [REGSET_GPR] = {
+ .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
+ .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
+ .get = gpr32_get, .set = gpr32_set
+ },
+ [REGSET_FPR] =
[PATCH -mm 11/43] powerpc user_regset altivec
This implements user_regset-style accessors for the powerpc Altivec data,
and rewrites the existing ptrace code in terms of those calls.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 112 +-
1 files changed, 78 insertions(+), 34 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index f1ce646..7cdf35a 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -22,6 +22,7 @@
#include linux/errno.h
#include linux/ptrace.h
#include linux/regset.h
+#include linux/elf.h
#include linux/user.h
#include linux/security.h
#include linux/signal.h
@@ -163,30 +164,87 @@ static int set_fpregs(void __user *data, struct
task_struct *task,
* (combined (32- and 64-bit) gdb.
*/
+static int vr_active(struct task_struct *target,
+const struct user_regset *regset)
+{
+ flush_altivec_to_thread(target);
+ return target-thread.used_vr ? regset-n : 0;
+}
+
+static int vr_get(struct task_struct *target, const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
+
+ flush_altivec_to_thread(target);
+
+ BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
+offsetof(struct thread_struct, vr[32]));
+
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.vr, 0,
+ 33 * sizeof(vector128));
+ if (!ret) {
+ /*
+* Copy out only the low-order word of vrsave.
+*/
+ union {
+ elf_vrreg_t reg;
+ u32 word;
+ } vrsave;
+ memset(vrsave, 0, sizeof(vrsave));
+ vrsave.word = target-thread.vrsave;
+ ret = user_regset_copyout(pos, count, kbuf, ubuf, vrsave,
+ 33 * sizeof(vector128), -1);
+ }
+
+ return ret;
+}
+
+static int vr_set(struct task_struct *target, const struct user_regset *regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ flush_altivec_to_thread(target);
+
+ BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
+offsetof(struct thread_struct, vr[32]));
+
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+target-thread.vr, 0, 33 * sizeof(vector128));
+ if (!ret count 0) {
+ /*
+* We use only the first word of vrsave.
+*/
+ union {
+ elf_vrreg_t reg;
+ u32 word;
+ } vrsave;
+ memset(vrsave, 0, sizeof(vrsave));
+ vrsave.word = target-thread.vrsave;
+ ret = user_regset_copyin(pos, count, kbuf, ubuf, vrsave,
+33 * sizeof(vector128), -1);
+ if (!ret)
+ target-thread.vrsave = vrsave.word;
+ }
+
+ return ret;
+}
+
/*
* Get contents of AltiVec register state in task TASK
*/
static int get_vrregs(unsigned long __user *data, struct task_struct *task)
{
- unsigned long regsize;
-
- /* copy AltiVec registers VR[0] .. VR[31] */
- regsize = 32 * sizeof(vector128);
- if (copy_to_user(data, task-thread.vr, regsize))
- return -EFAULT;
- data += (regsize / sizeof(unsigned long));
-
- /* copy VSCR */
- regsize = 1 * sizeof(vector128);
- if (copy_to_user(data, task-thread.vscr, regsize))
+ if (!access_ok(VERIFY_WRITE, data,
+ 33 * sizeof(vector128) + sizeof(u32)))
return -EFAULT;
- data += (regsize / sizeof(unsigned long));
- /* copy VRSAVE */
- if (put_user(task-thread.vrsave, (u32 __user *)data))
- return -EFAULT;
-
- return 0;
+ return vr_get(task, NULL, 0, 33 * sizeof(vector128) + sizeof(u32),
+ NULL, data);
}
/*
@@ -194,25 +252,11 @@ static int get_vrregs(unsigned long __user *data, struct
task_struct *task)
*/
static int set_vrregs(struct task_struct *task, unsigned long __user *data)
{
- unsigned long regsize;
-
- /* copy AltiVec registers VR[0] .. VR[31] */
- regsize = 32 * sizeof(vector128);
- if (copy_from_user(task-thread.vr, data, regsize))
- return -EFAULT;
- data += (regsize / sizeof(unsigned long));
-
- /* copy VSCR */
- regsize = 1 * sizeof(vector128);
- if (copy_from_user(task-thread.vscr, data, regsize))
- return -EFAULT;
- data += (regsize / sizeof(unsigned long));
-
- /* copy VRSAVE */
- if (get_user(task-thread.vrsave, (u32 __user *)data))
+
[PATCH -mm 12/43] powerpc user_regset spe
This implements user_regset-style accessors for the powerpc SPE data,
and rewrites the existing ptrace code in terms of those calls.
Signed-off-by: Roland McGrath [EMAIL PROTECTED]
---
arch/powerpc/kernel/ptrace.c | 90 ++---
1 files changed, 57 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 7cdf35a..8c25b00 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -272,55 +272,79 @@ static int set_vrregs(struct task_struct *task, unsigned
long __user *data)
* }
*/
-/*
- * Get contents of SPE register state in task TASK.
- */
-static int get_evrregs(unsigned long *data, struct task_struct *task)
+static int evr_active(struct task_struct *target,
+ const struct user_regset *regset)
{
- int i;
+ flush_spe_to_thread(target);
+ return target-thread.used_spe ? regset-n : 0;
+}
- if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long)))
- return -EFAULT;
+static int evr_get(struct task_struct *target, const struct user_regset
*regset,
+ unsigned int pos, unsigned int count,
+ void *kbuf, void __user *ubuf)
+{
+ int ret;
- /* copy SPEFSCR */
- if (__put_user(task-thread.spefscr, data[34]))
- return -EFAULT;
+ flush_spe_to_thread(target);
- /* copy SPE registers EVR[0] .. EVR[31] */
- for (i = 0; i 32; i++, data++)
- if (__put_user(task-thread.evr[i], data))
- return -EFAULT;
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.evr,
+ 0, sizeof(target-thread.evr));
- /* copy ACC */
- if (__put_user64(task-thread.acc, (unsigned long long *)data))
- return -EFAULT;
+ BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
+offsetof(struct thread_struct, spefscr));
- return 0;
+ if (!ret)
+ ret = user_regset_copyout(pos, count, kbuf, ubuf,
+ target-thread.acc,
+ sizeof(target-thread.evr), -1);
+
+ return ret;
+}
+
+static int evr_set(struct task_struct *target, const struct user_regset
*regset,
+ unsigned int pos, unsigned int count,
+ const void *kbuf, const void __user *ubuf)
+{
+ int ret;
+
+ flush_spe_to_thread(target);
+
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+target-thread.evr,
+0, sizeof(target-thread.evr));
+
+ BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
+offsetof(struct thread_struct, spefscr));
+
+ if (!ret)
+ ret = user_regset_copyin(pos, count, kbuf, ubuf,
+target-thread.acc,
+sizeof(target-thread.evr), -1);
+
+ return ret;
}
/*
- * Write contents of SPE register state into task TASK.
+ * Get contents of SPE register state in task TASK.
*/
-static int set_evrregs(struct task_struct *task, unsigned long *data)
+static int get_evrregs(unsigned long __user *data, struct task_struct *task)
{
- int i;
-
- if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long)))
+ if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(u32)))
return -EFAULT;
- /* copy SPEFSCR */
- if (__get_user(task-thread.spefscr, data[34]))
- return -EFAULT;
+ return evr_get(task, NULL, 0, 35 * sizeof(u32), NULL, data);
+}
- /* copy SPE registers EVR[0] .. EVR[31] */
- for (i = 0; i 32; i++, data++)
- if (__get_user(task-thread.evr[i], data))
- return -EFAULT;
- /* copy ACC */
- if (__get_user64(task-thread.acc, (unsigned long long*)data))
+/*
+ * Write contents of SPE register state into task TASK.
+ */
+static int set_evrregs(struct task_struct *task, unsigned long *data)
+{
+ if (!access_ok(VERIFY_READ, data, 35 * sizeof(u32)))
return -EFAULT;
- return 0;
+ return evr_set(task, NULL, 0, 35 * sizeof(u32), NULL, data);
}
#endif /* CONFIG_SPE */
--
1.5.3.6
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[PATCH/.24] [NET] fs_enet: check for phydev existence in the ethtool handlers
Otherwise oops will happen if ethernet device has not been opened:
Unable to handle kernel paging request for data at address 0x014c
Faulting instruction address: 0xc016f7f0
Oops: Kernel access of bad area, sig: 11 [#1]
MPC85xx
NIP: c016f7f0 LR: c01722a0 CTR:
REGS: c79ddc70 TRAP: 0300 Not tainted (2.6.24-rc3-g820a386b)
MSR: 00029000 EE,ME CR: 20004428 XER: 2000
DEAR: 014c, ESR:
TASK = c789f5e0[999] 'snmpd' THREAD: c79dc000
GPR00: c01aceb8 c79ddd20 c789f5e0 c79ddd3c c79ddd64
GPR08: c7845b60 c79dde3c c01ace80 20004422 200249fc 02a0 100da728
GPR16: 100c 20022078 0009 200220e0 bfc85558
GPR24: c79ddd3c c02e0e70 c022fc64 c7845800 bfc85498
NIP [c016f7f0] phy_ethtool_gset+0x0/0x4c
LR [c01722a0] fs_get_settings+0x18/0x28
Call Trace:
[c79ddd20] [c79dde38] 0xc79dde38 (unreliable)
[c79ddd30] [c01aceb8] dev_ethtool+0x294/0x11ec
[c79dde30] [c01aaa44] dev_ioctl+0x454/0x6a8
[c79ddeb0] [c019b9d4] sock_ioctl+0x84/0x230
[c79dded0] [c007ded8] do_ioctl+0x34/0x8c
[c79ddee0] [c007dfbc] vfs_ioctl+0x8c/0x41c
[c79ddf10] [c007e38c] sys_ioctl+0x40/0x74
[c79ddf40] [c000d4c0] ret_from_syscall+0x0/0x3c
Instruction dump:
8163 800b0030 2f80 419e0010 7c0803a6 4e800021 7c691b78 80010014
7d234b78 38210010 7c0803a6 4e800020 8003014c 7c6b1b78 3860 90040004
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
drivers/net/fs_enet/fs_enet-main.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fs_enet/fs_enet-main.c
b/drivers/net/fs_enet/fs_enet-main.c
index f2a4d39..23fddc3 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -897,14 +897,21 @@ static void fs_get_regs(struct net_device *dev, struct
ethtool_regs *regs,
static int fs_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
struct fs_enet_private *fep = netdev_priv(dev);
+
+ if (!fep-phydev)
+ return -ENODEV;
+
return phy_ethtool_gset(fep-phydev, cmd);
}
static int fs_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
struct fs_enet_private *fep = netdev_priv(dev);
- phy_ethtool_sset(fep-phydev, cmd);
- return 0;
+
+ if (!fep-phydev)
+ return -ENODEV;
+
+ return phy_ethtool_sset(fep-phydev, cmd);
}
static int fs_nway_reset(struct net_device *dev)
--
1.5.2.2
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[PATCH] IB/ehca: Forward event client-reregister-required to registered clients
This patch allows ehca to forward event client-reregister-required to
registered clients. Such one event is generated by the switch eg. after
its reboot.
Signed-off-by: Hoang-Nam Nguyen [EMAIL PROTECTED]
---
drivers/infiniband/hw/ehca/ehca_irq.c | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c
b/drivers/infiniband/hw/ehca/ehca_irq.c
index 3f617b2..4c734ec 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.c
+++ b/drivers/infiniband/hw/ehca/ehca_irq.c
@@ -62,6 +62,7 @@
#define NEQE_PORT_NUMBER EHCA_BMASK_IBM( 8, 15)
#define NEQE_PORT_AVAILABILITY EHCA_BMASK_IBM(16, 16)
#define NEQE_DISRUPTIVEEHCA_BMASK_IBM(16, 16)
+#define NEQE_SPECIFIC_EVENTEHCA_BMASK_IBM(16, 23)
#define ERROR_DATA_LENGTH EHCA_BMASK_IBM(52, 63)
#define ERROR_DATA_TYPEEHCA_BMASK_IBM( 0, 7)
@@ -354,6 +355,7 @@ static void parse_ec(struct ehca_shca *shca, u64 eqe)
{
u8 ec = EHCA_BMASK_GET(NEQE_EVENT_CODE, eqe);
u8 port = EHCA_BMASK_GET(NEQE_PORT_NUMBER, eqe);
+ u8 spec_event;
switch (ec) {
case 0x30: /* port availability change */
@@ -394,6 +396,16 @@ static void parse_ec(struct ehca_shca *shca, u64 eqe)
case 0x33: /* trace stopped */
ehca_err(shca-ib_device, Traced stopped.);
break;
+ case 0x34: /* util async event */
+ spec_event = EHCA_BMASK_GET(NEQE_SPECIFIC_EVENT, eqe);
+ if (spec_event == 0x80) /* client reregister required */
+ dispatch_port_event(shca, port,
+ IB_EVENT_CLIENT_REREGISTER,
+ client reregister req.);
+ else
+ ehca_warn(shca-ib_device, Unknown util async
+ event %x on port %x, spec_event, port);
+ break;
default:
ehca_err(shca-ib_device, Unknown event code: %x on %s.,
ec, shca-ib_device.name);
--
1.5.2
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Re: [PATCH] pata_of_platform: Move electra-ide support over to new framework
On Thu, Dec 20, 2007 at 02:53:46PM +1100, Paul Mackerras wrote: Olof Johansson writes: FWIW I'm presuming this work will go via a powerpc tree not libata... Generally that's not the case, but here it's largely an arch-specific work. Ok, that works. I was thinking of letting this patch go through libata, and do the removal through the powerpc merge path. But I can do both through powerpc. Are you going to send me a patch to do this addition plus the removal of the old stuff, or do you want me to merge this patch as is? Yes, I will once the series it depends on has been sorted out and is picked up somewhere, since it depends on it. -Olof ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
Olof Johansson wrote:
+static struct of_device_id mpc8610_ids[] = {
+{ .type = soc, },
+{}
Please scan based on compatible instead of device_type.
I was just following the example from another board file. However, the 'soc'
node in the device tree does not have a compatible property, so I don't how to
change this.
+config SND_SOC_MPC8610
+bool ALSA SoC support for the MPC8610 SOC
+depends on SND_SOC # MPC8610_HPCD
+default y #if MPC8610
+help
+ Say Y if you want to add support for codecs attached to the SSI
+ device on an MPC8610.
Don't default configs to 'y'. Also, what's with the commented-out
dependencies and if?
Sorry, that was a development change that I forgot to put back. The y #
should be deleted.
+ * ssi_stx_phys: bus address of SSI STX register
+ * ssi_srx_phys: bus address of SSI SRX register
+ * dma_channel: pointer to the DMA channel's registers
+ * irq: IRQ for this DMA channel
+ * assigned: set to 1 if that DMA channel is assigned to a substream
+ */
This goes for the whole patch: You've got good documentation, but it's
not in docbook format. Please reformat it since it should be a pretty
simple thing to do.
Ok.
+static int fsl_dma_new(struct snd_card *card, struct snd_soc_codec_dai *dai,
+struct snd_pcm *pcm)
+{
+static u64 fsl_dma_dmamask = 0x;
+int ret;
+
+if (!card-dev-dma_mask)
+card-dev-dma_mask = fsl_dma_dmamask;
I haven't read how your channel allocation works, but providing a
pointer to a local static variable is a bit fishy no matter what.
I just copied this code from another module. All the ALSA drivers do this,
but I'll look into it and see if it can't be done different. I make no
promises, though!
Do you ever anticipate having other dma users on the system, such as
memcpy offload? You'll probably need allocation support for channels
when that day comes (I ended up writing a simple library for dma channel
management for that very reason on my platform).
Yes, I plan on updating this driver to work with the standard Freescale Elo
device driver, but that will have to wait until that code is in the kernel and
stabilized. The SSI is limited in which DMA channels it can use, anyway.
--
Timur Tabi
Linux Kernel Developer @ Freescale
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Re: [alsa-devel] [PATCH] ASoC drivers for the Freescale MPC8610 SoC
At Thu, 20 Dec 2007 08:24:35 -0600,
Timur Tabi wrote:
+static int fsl_dma_new(struct snd_card *card, struct snd_soc_codec_dai
*dai,
+ struct snd_pcm *pcm)
+{
+ static u64 fsl_dma_dmamask = 0x;
+ int ret;
+
+ if (!card-dev-dma_mask)
+ card-dev-dma_mask = fsl_dma_dmamask;
I haven't read how your channel allocation works, but providing a
pointer to a local static variable is a bit fishy no matter what.
I just copied this code from another module. All the ALSA drivers do this,
All? No, only a few...
For PCI, usually pci_set_dma_mask() and pci_set_consistent_dma_mask()
are used, of course.
Takashi
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Re: [PATCH 4/5] Convert PowerPC MPC i2c to of_platform_driver from platform_driver
On 12/20/07, David Gibson [EMAIL PROTECTED] wrote: On Wed, Dec 19, 2007 at 11:41:44PM -0500, Jon Smirl wrote: Convert MPC i2c driver from being a platform_driver to an open firmware version. Error returns were improved. Routine names were changed from fsl_ to mpc_ to make them match the file name. In discussions BenH and I have had, we've actually concluded that moving this from platform drivers to of_platform drives is not actually a good idea. In fact we're planning to move away from of_platform devices and drivers and instead develop a framework for instantiating platform devices or i2c devices or whatever devices from the device tree nodes. I have to work with what is in the kernel tree so this patch is based the current kernel. A lot of time and testing has going into all the revisions of this patch. It has been posted in various forms for the last month and a half. As for platform vs of_platform, IMHO of_platform should have been derived from platform instead of being an unrelated structure. In the current scheme of unrelated structures it makes more sense to use one or the other and not mix them. I am in agreement with Olof that if and when a new scheme is adopted the drivers should be converted then. In my local builds I have disabled platform and use only of_platform. An of_platform only system works fine and is capable of instantiating everything from the device tree as this patch illustrates. Once this patch goes in I'll post another series that shows how I went of_platform only on mpc5200. Everyone seems to be focusing on a small piece of driver initialization code and ignoring the much more complicated part which implements dynamic i2c driver loading. It's the complicated part of the code that needs review. Ben, I know we talked about not putting the alias names into their own namespace. But the i2c people don't want to move onto the standard kernel aliasing scheme for other platforms and asked for #ifdef powerpc. In version 15 I removed the cross platform support and made everything powerpc specific. . -- Jon Smirl [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [RFC] Xilinx SystemACE: Add media hotplug support
On 12/20/07, Andy Whitcroft [EMAIL PROTECTED] wrote: On Wed, Dec 19, 2007 at 11:23:48PM -0700, Grant Likely wrote: + /* Make the sysace device 'live' */ + if (ace-fsm_state != ACE_FSM_STATE_INVALIDATE_MEDIA); + add_disk(ace-gd); checkpatch.pl reports the above if as suspect due to the trailing ;. Looks wrong to me too. Ah, good catch. Thanks. g. -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. [EMAIL PROTECTED] (403) 399-0195 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: More patches added to for-2.6.25 and master branches of powerpc.git
On Thu, Dec 20, 2007 at 10:00:05PM +1100, Paul Mackerras wrote: Scott Wood (5): [POWERPC] 8xx: Convert mpc866ads to the new device binding. [POWERPC] 83xx: mpc834x_mds: Fix whitespace and call of_platform_bus_probe(). [POWERPC] 83xx: mpc8313erdb: Fix whitespace. [POWERPC] wrapper: Rename offset in offset_devp() [POWERPC] wrapper: Treat NULL as root node in devp_offset; add devp_offset_find() How about this power management patchset? http://patchwork.ozlabs.org/linuxppc/patch?id=15502 -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[DTC PATCH 1/2] Add yyerrorf() for formatted error messages.
Signed-off-by: Scott Wood [EMAIL PROTECTED]
---
dtc-parser.y | 16
srcpos.h |1 +
2 files changed, 17 insertions(+), 0 deletions(-)
diff --git a/dtc-parser.y b/dtc-parser.y
index 002ea7f..4a0181d 100644
--- a/dtc-parser.y
+++ b/dtc-parser.y
@@ -318,6 +318,22 @@ void yyerror (char const *s)
fname, yylloc.first_line, s);
}
+void yyerrorf(char const *s, ...)
+{
+ const char *fname = srcpos_filename_for_num(yylloc.filenum);
+ va_list va;
+ va_start(va, s);
+
+ if (strcmp(fname, -) == 0)
+ fname = stdin;
+
+ fprintf(stderr, %s:%d , fname, yylloc.first_line);
+ vfprintf(stderr, s, va);
+ fprintf(stderr, \n);
+
+ va_end(va);
+}
+
unsigned long long eval_literal(const char *s, int base, int bits)
{
unsigned long long val;
diff --git a/srcpos.h b/srcpos.h
index ce7ab5b..e59c788 100644
--- a/srcpos.h
+++ b/srcpos.h
@@ -63,6 +63,7 @@ typedef struct YYLTYPE {
extern void yyerror(char const *);
+extern void yyerrorf(char const *, ...) __attribute__((format(printf, 1, 2)));
extern int srcpos_filenum;
--
1.5.3
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Re: [alsa-devel] [PATCH] ASoC drivers for the Freescale MPC8610 SoC
Takashi Iwai wrote: All? No, only a few... For PCI, usually pci_set_dma_mask() and pci_set_consistent_dma_mask() are used, of course. Hmm, ok I was wrong. I took this code from the ASoC at91 driver. Unfortunately, I don't understand what this code is trying to do. The AT91 driver isn't documented, so I don't even know if I need it. Can someone explain what all this is? What's the alternative to using a static global? -- Timur Tabi Linux kernel developer at Freescale ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v3 2/2] mpc82xx: Embedded Planet EP8248E support
This board is also resold by Freescale under the names
QUICCStart MPC8248 Evaluation System and CWH-PPC-8248N-VE.
Signed-off-by: Scott Wood [EMAIL PROTECTED]
---
Resent with dts-v1 and aliases.
arch/powerpc/boot/Makefile |3 +-
arch/powerpc/boot/dts/ep8248e.dts | 205
arch/powerpc/boot/ep8248e.c| 55 ++
arch/powerpc/boot/wrapper |2 +-
arch/powerpc/configs/ep8248e_defconfig | 864
arch/powerpc/platforms/82xx/Kconfig| 13 +
arch/powerpc/platforms/82xx/Makefile |1 +
arch/powerpc/platforms/82xx/ep8248e.c | 325
include/asm-powerpc/mpc8260.h |1 +
9 files changed, 1467 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/boot/dts/ep8248e.dts
create mode 100644 arch/powerpc/boot/ep8248e.c
create mode 100644 arch/powerpc/configs/ep8248e_defconfig
create mode 100644 arch/powerpc/platforms/82xx/ep8248e.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 9dfadc0..57bee27 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -58,7 +58,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c
holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c
\
- fixed-head.S ep88xc.c cuboot-hpc2.c redboot-8xx.c
+ fixed-head.S ep88xc.c cuboot-hpc2.c redboot-8xx.c ep8248e.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -190,6 +190,7 @@ ifneq ($(CONFIG_DEVICE_TREE),)
image-$(CONFIG_PPC_8xx)+= cuImage.8xx
image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
image-$(CONFIG_8260) += cuImage.pq2
+image-$(CONFIG_EP8248E)+= zImage.ep8248e
image-$(CONFIG_PPC_MPC52xx)+= cuImage.52xx
image-$(CONFIG_PPC_83xx) += cuImage.83xx
image-$(CONFIG_PPC_85xx) += cuImage.85xx
diff --git a/arch/powerpc/boot/dts/ep8248e.dts
b/arch/powerpc/boot/dts/ep8248e.dts
new file mode 100644
index 000..f5b058c
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep8248e.dts
@@ -0,0 +1,205 @@
+/*
+ * Device Tree for the Embedded Planet EP8248E board running PlanetCore.
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+ model = EP8248E;
+ compatible = fsl,ep8248e;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ aliases {
+ planetcore-SMC1 = smc1;
+ planetcore-SCC1 = scc1;
+ enet0 = eth0;
+ enet1 = eth1;
+ serial0 = smc1;
+ serial1 = scc1;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 32;
+ i-cache-line-size = 32;
+ d-cache-size = 16384;
+ i-cache-size = 16384;
+ timebase-frequency = 0;
+ clock-frequency = 0;
+ };
+ };
+
+ localbus {
+ compatible = fsl,mpc8248-localbus,
+fsl,pq2-localbus,
+simple-bus;
+ #address-cells = 2;
+ #size-cells = 1;
+ reg = 0xf0010100 0x40;
+
+ ranges = 0 0 0xfc00 0x0400
+ 1 0 0xfa00 0x8000;
+
+ [EMAIL PROTECTED],380 {
+ compatible = cfi-flash;
+ reg = 0 0x380 0x80;
+ bank-width = 4;
+ device-width = 2;
+ };
+
+ [EMAIL PROTECTED],0 {
+ #address-cells = 2;
+ #size-cells = 1;
+ reg = 1 0 0x10;
+ compatible = fsl,ep8248e-bcsr;
+ ranges;
+
+ mdio {
+ device_type = mdio;
+ compatible = fsl,ep8248e-mdio-bitbang;
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 1 8 1;
+
+ PHY0: [EMAIL PROTECTED] {
+ interrupt-parent = PIC;
+ reg = 0;
+
[PATCH 0/4] arch/powerpc support for SBC8560 board
The following four patches add support for the Wind River SBC8560 board onto the powerpc branch. The patches are as follows: 1) Add basic support for Wind River SBC8560 as powerpc This adds in the basic platform support file -- closely matching that which exists for the MPC8560ADS board. b/arch/powerpc/platforms/85xx/Kconfig | 11 - b/arch/powerpc/platforms/85xx/Makefile |1 b/arch/powerpc/platforms/85xx/sbc8560.c | 303 +++- 2) Make support for the CPM2 optional on 8560 based boards Since the SBC8560 has a 16550 compatible UART on board, there really is no direct requirement for any of the CPM functionality to be forced on all the time. This allows you to turn off the CPM2 support for this board. b/arch/powerpc/platforms/85xx/Kconfig |4 ++-- b/arch/powerpc/platforms/Kconfig |5 ++--- 3) Add device tree source for Wind River SBC8560 board This is probably the most interesting part of the group, given that the board doesn't use the CPM2 to provide the serial console. I've made a duart dts entry that is kind of similar to what is done for the tsi108 on the mpc7448/hpc-ii board, and made sure that the serial had their parent marked as soc (found out the hard way that UARTs were ignored as possible consoles unless they were soc or tsi108 children...) b/arch/powerpc/boot/dts/sbc8560.dts | 203 +++- 4) Add default .config file for Wind River SBC8560 b/arch/powerpc/configs/sbc8560_defconfig | 765 ++- This config gives basic serial console and ethernet support for doing an NFS root setup. The SBC8560 can be used as a PCI host when put into a suitable backplane, and the FCC ports can be used for eth2/eth3 if the board is fitted with a daughtercard with a couple Broadcom PHY, but at the moment these features aren't enabled/tested as they weren't on the board I was using. I'd quickly spun together a u-boot 1.2.0 for testing this -- since that was the quickest route to getting a powerpc capable version. I'll see what can be done for getting a u-boot 1.3.1 patchset out so the local-mac-address vs address thing in the dtb isn't an issue. Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/4] CPM2: Make support for the CPM2 optional on 8560 based boards
Currently there is no way to disable the CPM2 support. Some boards, like the SBC8560 have their own external UART and don't have any direct dependencies on the CPM for a serial console or anything else. Signed-off-by: Paul Gortmaker [EMAIL PROTECTED] --- arch/powerpc/platforms/85xx/Kconfig |4 ++-- arch/powerpc/platforms/Kconfig |4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 0eb497b..33d3bea 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -13,6 +13,7 @@ config MPC8560_ADS bool Freescale MPC8560 ADS select DEFAULT_UIMAGE select PPC_CPM_NEW_BINDING + select CPM2 help This option enables support for the MPC 8560 ADS board @@ -41,7 +42,7 @@ config MPC85xx_DS config SBC8560 bool Wind River SBC8560 select DEFAULT_UIMAGE - select PPC_CPM_NEW_BINDING + select PPC_CPM_NEW_BINDING if CPM2 help This option enables support for the Wind River SBC8560 board @@ -55,7 +56,6 @@ config MPC8540 config MPC8560 bool - select CPM2 default y if MPC8560_ADS || SBC8560 config MPC85xx diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index ea22cad..d355dd6 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -272,8 +272,8 @@ config QUICC_ENGINE for a machine with a QE coprocessor. config CPM2 - bool - default n + bool Enable support for the CPM2 (Communications Processor Module) + depends on MPC8560 || 8260 select CPM select PPC_LIB_RHEAP help -- 1.5.0.rc1.gf4b6c ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 3/4] sbc8560: Add device tree source for Wind River SBC8560 board
This adds the device tree source for the Wind River SBC8560 board. The
biggest difference between this and the MPC8560ADS reference platform
is the use of an external 16550 compatible UART instead of the CPM2.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/sbc8560.dts | 202 +
1 files changed, 202 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8560.dts
b/arch/powerpc/boot/dts/sbc8560.dts
new file mode 100644
index 000..85fc488
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -0,0 +1,202 @@
+/*
+ * SBC8560 Device Tree Source
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = SBC8560;
+ compatible = SBC8560;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 20; // 32 bytes
+ i-cache-line-size = 20; // 32 bytes
+ d-cache-size = 8000; // L1, 32K
+ i-cache-size = 8000; // L1, 32K
+ timebase-frequency = 0; // From uboot
+ bus-frequency = 0;
+ clock-frequency = 0;
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 2000;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
+ device_type = soc;
+ ranges = 0 ff70 0010;
+ reg = ff70 0010;
+ bus-frequency = 0;
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,8560-memory-controller;
+ reg = 2000 1000;
+ interrupt-parent = mpic;
+ interrupts = 12 2;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,8560-l2-cache-controller;
+ reg = 2 1000;
+ cache-line-size = 20; // 32 bytes
+ cache-size = 4; // L2, 256K
+ interrupt-parent = mpic;
+ interrupts = 10 2;
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = i2c;
+ compatible = fsl-i2c;
+ reg = 3000 100;
+ interrupts = 2b 2;
+ interrupt-parent = mpic;
+ dfsrr;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = mdio;
+ compatible = gianfar;
+ reg = 24520 20;
+ phy0: [EMAIL PROTECTED] {
+ interrupt-parent = mpic;
+ interrupts = 6 1;
+ reg = 19;
+ device_type = ethernet-phy;
+ };
+ phy1: [EMAIL PROTECTED] {
+ interrupt-parent = mpic;
+ interrupts = 7 1;
+ reg = 1a;
+ device_type = ethernet-phy;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = network;
+ model = TSEC;
+ compatible = gianfar;
+ reg = 24000 1000;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = 1d 2 1e 2 22 2;
+ interrupt-parent = mpic;
+ phy-handle = phy0;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = network;
+ model = TSEC;
+ compatible = gianfar;
+ reg = 25000 1000;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = 23 2 24 2 28 2;
+ interrupt-parent = mpic;
+
Re: [PATCH 1/3] ps3: vuart: fix error path locking
On Tue, 2007-12-18 at 19:04 -0800, Geoff Levand wrote: Unfortunately there wasn't enough context in the patch to see that there is a down() earlier in the routine, and that the patch does indeed remove an incorrectly placed down(). Here is the entire routine, marked with what the patch removes. Andrew have you had a chance to review this? Daniel ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/4] sbc8560: add basic support for Wind River SBC8560 as powerpc
This adds the basic support for the Wind River SBC8560 board, implemented
as powerpc. It closely follows the implementation of the MPC8560ADS.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
---
arch/powerpc/platforms/85xx/Kconfig | 11 +-
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/sbc8560.c | 302 +
3 files changed, 312 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/Kconfig
b/arch/powerpc/platforms/85xx/Kconfig
index 7748a3a..0eb497b 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -38,6 +38,13 @@ config MPC85xx_DS
help
This option enables support for the MPC85xx DS (MPC8544 DS) board
+config SBC8560
+ bool Wind River SBC8560
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ help
+ This option enables support for the Wind River SBC8560 board
+
endchoice
config MPC8540
@@ -49,7 +56,7 @@ config MPC8540
config MPC8560
bool
select CPM2
- default y if MPC8560_ADS
+ default y if MPC8560_ADS || SBC8560
config MPC85xx
bool
@@ -59,4 +66,4 @@ config MPC85xx
select FSL_PCI if PCI
select SERIAL_8250_SHARE_IRQ if SERIAL_8250
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
- || MPC85xx_MDS || MPC85xx_DS
+ || MPC85xx_MDS || MPC85xx_DS || SBC8560
diff --git a/arch/powerpc/platforms/85xx/Makefile
b/arch/powerpc/platforms/85xx/Makefile
index 5eca920..c3f4d01 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
+obj-$(CONFIG_SBC8560) += sbc8560.o
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c
b/arch/powerpc/platforms/85xx/sbc8560.c
new file mode 100644
index 000..6aef38b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -0,0 +1,302 @@
+/*
+ * Wind River SBC8560 setup and early boot code.
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * By Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include linux/stddef.h
+#include linux/kernel.h
+#include linux/pci.h
+#include linux/kdev_t.h
+#include linux/delay.h
+#include linux/seq_file.h
+#include linux/of_platform.h
+
+#include asm/system.h
+#include asm/time.h
+#include asm/machdep.h
+#include asm/pci-bridge.h
+#include asm/mpic.h
+#include mm/mmu_decl.h
+#include asm/udbg.h
+
+#include sysdev/fsl_soc.h
+#include sysdev/fsl_pci.h
+
+#ifdef CONFIG_CPM2
+#include asm/cpm2.h
+#include sysdev/cpm2_pic.h
+#endif
+
+#ifdef CONFIG_PCI
+static int sbc8560_exclude_device(struct pci_controller *hose,
+ u_char bus, u_char devfn)
+{
+ if (bus == 0 PCI_SLOT(devfn) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ else
+ return PCIBIOS_SUCCESSFUL;
+}
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_CPM2
+
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) = 0) {
+ generic_handle_irq(cascade_irq);
+ }
+ desc-chip-eoi(irq);
+}
+
+#endif /* CONFIG_CPM2 */
+
+static void __init sbc8560_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np = NULL;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(np, open-pic);
+
+ if (np == NULL) {
+ printk(KERN_ERR Could not find open-pic node\n);
+ return;
+ }
+
+ if(of_address_to_resource(np, 0, r)) {
+ printk(KERN_ERR Could not map mpic register space\n);
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, OpenPIC );
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, fsl,cpm2-pic);
+ if (np == NULL) {
+ printk(KERN_ERR PIC init: can not find fsl,cpm2-pic node\n);
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ cpm2_pic_init(np);
+ set_irq_chained_handler(irq, cpm2_cascade);
+#endif
+}
+
+/*
+ * Setup the architecture
+ */
+#ifdef CONFIG_CPM2
+struct cpm_pin {
+ int port, pin,
[PATCH 1/2] [POWERPC] Update MPC8610 HPCD to support audio drivers
Update the MPC8610 HPCD files to support the audio driver. Update
booting-without-of.txt with information on the SSI device.
Signed-off-by: Timur Tabi [EMAIL PROTECTED]
---
This patch applies on top of
git://git.kernel.org/pub/scm/linux/kernel/git/perex/alsa.git.
Documentation/powerpc/booting-without-of.txt | 40 ++
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 107
arch/powerpc/configs/mpc8610_hpcd_defconfig | 171 +-
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 19 +++
4 files changed, 334 insertions(+), 3 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt
b/Documentation/powerpc/booting-without-of.txt
index e9a3cb1..826af91 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -53,6 +53,7 @@ Table of Contents
j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
l) Xilinx IP cores
+ p) Freescale Synchronous Serial Interface
VII - Specifying interrupt information for devices
1) interrupts property
@@ -2514,6 +2515,45 @@ platforms are moved over to use the
flattened-device-tree model.
Requred properties:
- current-speed : Baud rate of uartlite
+p) Freescale Synchronous Serial Interface
+
+ The SSI is a serial device that communicates with audio codecs. It can
+ be programmed in AC97, I2S, left-justified, or right-justified modes.
+
+ Required properties:
+ - compatible : compatible list, containing fsl,ssi
+ - cell-index : the SSI, 0 = SSI1, 1 = SSI2, and so on
+ - reg : offset and length of the register set for the device
+ - interrupts : a b where a is the interrupt number and b is a
+field that represents an encoding of the sense and
+ level information for the interrupt. This should be
+ encoded based on the information in section 2)
+ depending on the type of interrupt controller you
+ have.
+ - interrupt-parent : the phandle for the interrupt controller that
+services interrupts for this device.
+ - fsl,mode: the operating mode for the SSI interface
+ i2s-slave - I2S mode, SSI is clock slave
+ i2s-master - I2S mode, SSI is clock master
+ lj-slave - left-justified mode, SSI is clock slave
+ lj-master - l.j. mode, SSI is clock master
+ rj-slave - right-justified mode, SSI is clock
slave
+ rj-master - r.j., SSI is clock master
+ ac97-slave - AC97 mode, SSI is clock slave
+ ac97-master - AC97 mode, SSI is clock master
+
+ Optional properties:
+ - codec : child node that defines an audio codec connected
+ to this SSI
+
+ Child 'codec' node required properties:
+ - compatible : compatible list, contains the name of the codec
+
+ Child 'codec' node optional properties:
+ - bus-frequency : The frequency of the input clock, which typically
+comes from an on-board dedicated oscillator.
+
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 966edf1..974acc3 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -103,6 +103,113 @@
reg = e 1000;
fsl,has-rstcr;
};
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,ssi;
+ cell-index = 0;
+ reg = 16000 100;
+ interrupt-parent = mpic;
+ interrupts = 3e 2;
+ fsl,mode = i2s-slave;
+ codec {
+ compatible = cirrus,cs4270;
+ /* MCLK source is a stand-alone oscillator */
+ bus-frequency = bb8000;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,ssi;
+ cell-index = 1;
+ reg = 16100 100;
+ interrupt-parent = mpic;
+ interrupts = 3f 2;
+ };
+
+[EMAIL PROTECTED] {
+#address-cells = 1;
+#size-cells = 1;
+compatible = fsl,mpc8610-dma, fsl,eloplus-dma;
+cell-index = 0;
+reg = 21300 4; /* DMA
[PATCH 0/2] ASoC drivers for the Freescale MPC8610 SoC
These patches add ALSA SoC device drivers for the Freescale MPC8610 SoC and the MPC8610-HPCD reference board. The first patch updates some files in arch/powerpc and booting-without-of.txt. The second patch adds the new audio driver files to sound/soc. Both must be applied in order to avoid a build break. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/3] ps3: vuart: fix error path locking
On Thu, 20 Dec 2007 11:32:25 -0800 Daniel Walker [EMAIL PROTECTED] wrote: On Tue, 2007-12-18 at 19:04 -0800, Geoff Levand wrote: Unfortunately there wasn't enough context in the patch to see that there is a down() earlier in the routine, and that the patch does indeed remove an incorrectly placed down(). Here is the entire routine, marked with what the patch removes. Andrew have you had a chance to review this? Confused. I did review it: http://lkml.org/lkml/2007/12/18/384 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/3] ps3: vuart: fix error path locking
On Thu, 2007-12-20 at 12:06 -0800, Andrew Morton wrote: On Thu, 20 Dec 2007 11:32:25 -0800 Daniel Walker [EMAIL PROTECTED] wrote: On Tue, 2007-12-18 at 19:04 -0800, Geoff Levand wrote: Unfortunately there wasn't enough context in the patch to see that there is a down() earlier in the routine, and that the patch does indeed remove an incorrectly placed down(). Here is the entire routine, marked with what the patch removes. Andrew have you had a chance to review this? Confused. I did review it: http://lkml.org/lkml/2007/12/18/384 Yeah, but Geoff countered http://lkml.org/lkml/2007/12/18/409 Do you still think the patch is wrong, given the whole function? Daniel ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v2 0/4] device_type/compatible cleanups
Hi all,
Here is the second version.
Changes since v1:
- Device tree lookup changes should be backward compatible with
older dtbs;
- Few of_put_node() cleanups;
- cell-index property added to spi nodes;
- cpm-muram{,-data} added as an addition to qe-muram{,-data}.
Thanks,
--
Anton Vorontsov
email: [EMAIL PROTECTED]
backup email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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Re: [PATCH 11/20] [POWERPC] Wire up PCI on Bamboo board
Benjamin Herrenschmidt wrote:
On Wed, 2007-12-19 at 16:34 +0300, Valentine Barshak wrote:
--- linux-work.orig/arch/powerpc/boot/dts/bamboo.dts2007-12-10
15:56:59.0 +1100
+++ linux-work/arch/powerpc/boot/dts/bamboo.dts 2007-12-10
16:39:51.0 +1100
@@ -239,10 +239,48 @@
zmii-channel = 1;
};
};
+
+ PCI0: [EMAIL PROTECTED] {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb440ep-pci, ibm,plb-pci;
+ primary;
+ reg = 0 eec0 8 /* Config space access */
+ 0 eed8 4 /* IACK */
+ 0 eed8 4 /* Special cycle */
+ 0 ef48 40; /* Internal registers */
Why ef48 here? IIRC, the docs say it should be ef40, while
ef400040 - ef4f are reserved and can mirror local registers.
Dunno... probably a typo, though it worked :-) I'll fix it up.
Just checked the ppc440ep user manual again.
Special cycle/IACK registers are at 0xeed0 instead of 0xeed8.
Looks like the same typo as in the internal registers.
It works because all these registers are mirrored at 0x8 offset
(though it's claimed to be a reserved region).
Thanks,
Valentine.
Ben.
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[PATCH v2 1/4] [POWERPC] qe_lib and users: get rid of device_type and model
Now we're searching for fsl,qe, fsl,qe-muram, fsl,qe-muram-data.
Per http://ozlabs.org/pipermail/linuxppc-dev/2007-December/048388.html
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc832x_mds.dts |7 ---
arch/powerpc/boot/dts/mpc832x_rdb.dts |7 ---
arch/powerpc/boot/dts/mpc836x_mds.dts |7 ---
arch/powerpc/boot/dts/mpc8568mds.dts |7 ---
arch/powerpc/sysdev/fsl_soc.c |5 -
arch/powerpc/sysdev/qe_lib/qe.c | 16 +---
6 files changed, 33 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts
b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 26ac467..588d658 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -175,18 +175,19 @@
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
- device_type = qe;
- model = QE;
+ compatible = fsl,qe;
ranges = 0 e010 0010;
reg = e010 480;
brg-frequency = 0;
bus-frequency = BCD3D80;
[EMAIL PROTECTED] {
- device_type = muram;
+ compatible = fsl,qe-muram, fsl,cpm-muram;
ranges = 0 0001 4000;
[EMAIL PROTECTED] {
+ compatible = fsl,qe-muram-data,
+fsl,cpm-muram-data;
reg = 0 4000;
};
};
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts
b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 10ff7aa..719f375 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -165,18 +165,19 @@
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
- device_type = qe;
- model = QE;
+ compatible = fsl,qe;
ranges = 0 e010 0010;
reg = e010 480;
brg-frequency = 0;
bus-frequency = BCD3D80;
[EMAIL PROTECTED] {
- device_type = muram;
+ compatible = fsl,qe-muram, fsl,cpm-muram;
ranges = 0 0001 4000;
[EMAIL PROTECTED] {
+ compatible = fsl,qe-muram-data,
+fsl,cpm-muram-data;
reg = 0 4000;
};
};
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts
b/arch/powerpc/boot/dts/mpc836x_mds.dts
index fd841b2..8d7124e 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -206,18 +206,19 @@
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
- device_type = qe;
- model = QE;
+ compatible = fsl,qe;
ranges = 0 e010 0010;
reg = e010 480;
brg-frequency = 0;
bus-frequency = 179A7B00;
[EMAIL PROTECTED] {
- device_type = muram;
+ device_type = fsl,qe-muram, fsl,cpm-muram;
ranges = 0 0001 c000;
[EMAIL PROTECTED]
+ device_type = fsl,qe-muram-data,
+ fsl,cpm-muram-data;
reg = 0 c000;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts
b/arch/powerpc/boot/dts/mpc8568mds.dts
index 5818a7c..89add8d 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -283,18 +283,19 @@
[EMAIL PROTECTED] {
#address-cells = 1;
#size-cells = 1;
- device_type = qe;
- model = QE;
+ compatible = fsl,qe;
ranges = 0 e008 0004;
reg = e008 480;
brg-frequency = 0;
bus-frequency = 179A7B00;
[EMAIL PROTECTED] {
- device_type = muram;
+ compatible = fsl,qe-muram, fsl,cpm-muram;
ranges = 0 0001 c000;
[EMAIL PROTECTED]
+ compatible = fsl,qe-muram-data,
+fsl,cpm-muram-data;
reg = 0 c000;
};
};
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 4baad80..60d9c4e 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -1226,7 +1226,10 @@
[PATCH v2 2/4] [POWERPC][NET] ucc_geth_mii and users: get rid of device_type
device_type property is bogus, thus use proper compatible.
Also change compatible property to fsl,ucc-mdio.
Per http://ozlabs.org/pipermail/linuxppc-dev/2007-December/048388.html
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc832x_mds.dts |3 +--
arch/powerpc/boot/dts/mpc832x_rdb.dts |3 +--
arch/powerpc/boot/dts/mpc836x_mds.dts |3 +--
arch/powerpc/boot/dts/mpc8568mds.dts |2 +-
drivers/net/ucc_geth_mii.c|3 +++
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts
b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 588d658..8844d30 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -255,8 +255,7 @@
#address-cells = 1;
#size-cells = 0;
reg = 2320 18;
- device_type = mdio;
- compatible = ucc_geth_phy;
+ compatible = fsl,ucc-mdio;
phy3: [EMAIL PROTECTED] {
interrupt-parent = ipic ;
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts
b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 719f375..a7a2e45 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -236,8 +236,7 @@
#address-cells = 1;
#size-cells = 0;
reg = 3120 18;
- device_type = mdio;
- compatible = ucc_geth_phy;
+ compatible = fsl,ucc-mdio;
phy00:[EMAIL PROTECTED] {
interrupt-parent = pic;
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts
b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 8d7124e..5f0b427 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -288,8 +288,7 @@
#address-cells = 1;
#size-cells = 0;
reg = 2120 18;
- device_type = mdio;
- compatible = ucc_geth_phy;
+ compatible = fsl,ucc-mdio;
phy0: [EMAIL PROTECTED] {
interrupt-parent = ipic ;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts
b/arch/powerpc/boot/dts/mpc8568mds.dts
index 89add8d..ea70010 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -356,7 +356,7 @@
#address-cells = 1;
#size-cells = 0;
reg = 2120 18;
- compatible = ucc_geth_phy;
+ compatible = fsl,ucc-mdio;
/* These are the same PHYs as on
* gianfar's MDIO bus */
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index df884f0..e3ba14a 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -256,6 +256,9 @@ static struct of_device_id uec_mdio_match[] = {
.type = mdio,
.compatible = ucc_geth_phy,
},
+ {
+ .compatible = fsl,ucc-mdio,
+ },
{},
};
--
1.5.2.2
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[PATCH v2 3/4] [POWERPC][SPI] use brg-frequency for SPI in QE
In case of QE we can use brg-frequency (which is qeclk/2).
Thus no need to divide sysclk in the spi_mpc83xx.
This patch also adds code to use get_brgfreq() on QE chips.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/sysdev/fsl_soc.c | 37 -
drivers/spi/spi_mpc83xx.c |6 +-
2 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 60d9c4e..f04d5cc 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -66,7 +66,7 @@ phys_addr_t get_immrbase(void)
EXPORT_SYMBOL(get_immrbase);
-#if defined(CONFIG_CPM2) || defined(CONFIG_8xx)
+#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
static u32 brgfreq = -1;
@@ -91,6 +91,11 @@ u32 get_brgfreq(void)
/* Legacy device binding -- will go away when no users are left. */
node = of_find_node_by_type(NULL, cpm);
+ if (!node)
+ node = of_find_compatible_node(NULL, NULL, fsl,qe);
+ if (!node)
+ node = of_find_node_by_type(NULL, qe);
+
if (node) {
prop = of_get_property(node, brg-frequency, size);
if (prop size == 4)
@@ -1223,22 +1228,26 @@ int __init fsl_spi_init(struct spi_board_info
*board_infos,
{
struct device_node *np;
unsigned int i;
- const u32 *sysclk;
+ u32 sysclk;
/* SPI controller is either clocked from QE or SoC clock */
- np = of_find_compatible_node(NULL, NULL, fsl,qe);
- if (!np)
- np = of_find_node_by_type(NULL, qe);
+ sysclk = get_brgfreq();
+ if (sysclk == -1) {
+ const u32 *prop;
- if (!np)
np = of_find_node_by_type(NULL, soc);
+ if (!np)
+ return -ENODEV;
- if (!np)
- return -ENODEV;
+ prop = of_get_property(np, bus-frequency, NULL);
+ if (!prop) {
+ of_node_put(np);
+ return -ENODEV;
+ }
- sysclk = of_get_property(np, bus-frequency, NULL);
- if (!sysclk)
- return -ENODEV;
+ sysclk = *prop;
+ of_node_put(np);
+ }
for (np = NULL, i = 1;
(np = of_find_compatible_node(np, spi, fsl_spi)) != NULL;
@@ -1255,7 +1264,7 @@ int __init fsl_spi_init(struct spi_board_info
*board_infos,
memset(res, 0, sizeof(res));
- pdata.sysclk = *sysclk;
+ pdata.sysclk = sysclk;
prop = of_get_property(np, reg, NULL);
if (!prop)
@@ -1299,10 +1308,12 @@ int __init fsl_spi_init(struct spi_board_info
*board_infos,
if (ret)
goto unreg;
- continue;
+ goto next;
unreg:
platform_device_del(pdev);
err:
+next:
+ of_node_put(np);
continue;
}
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index 4580b9c..04f7cd9 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -436,11 +436,7 @@ static int __init mpc83xx_spi_probe(struct platform_device
*dev)
mpc83xx_spi-qe_mode = pdata-qe_mode;
mpc83xx_spi-get_rx = mpc83xx_spi_rx_buf_u8;
mpc83xx_spi-get_tx = mpc83xx_spi_tx_buf_u8;
-
- if (mpc83xx_spi-qe_mode)
- mpc83xx_spi-spibrg = pdata-sysclk / 2;
- else
- mpc83xx_spi-spibrg = pdata-sysclk;
+ mpc83xx_spi-spibrg = pdata-sysclk;
mpc83xx_spi-rx_shift = 0;
mpc83xx_spi-tx_shift = 0;
--
1.5.2.2
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[PATCH v2 4/4] [POWERPC] fsl_spi_init and users: stop using device_type = spi
..also rename fsl_spi to fsl,spi and add cell-index property.
Per http://ozlabs.org/pipermail/linuxppc-dev/2007-December/048388.html
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc8313erdb.dts|4 ++--
arch/powerpc/boot/dts/mpc832x_mds.dts|8
arch/powerpc/boot/dts/mpc832x_rdb.dts|8
arch/powerpc/boot/dts/mpc8349emitx.dts |4 ++--
arch/powerpc/boot/dts/mpc8349emitxgp.dts |4 ++--
arch/powerpc/boot/dts/mpc834x_mds.dts|4 ++--
arch/powerpc/boot/dts/mpc836x_mds.dts|8
arch/powerpc/boot/dts/mpc8568mds.dts |8
arch/powerpc/sysdev/fsl_soc.c| 23 +--
9 files changed, 41 insertions(+), 30 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts
b/arch/powerpc/boot/dts/mpc8313erdb.dts
index c5b6665..a0492b6 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -82,8 +82,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 0;
+ compatible = fsl,spi;
reg = 7000 1000;
interrupts = 10 8;
interrupt-parent = ipic ;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts
b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 8844d30..36ecd39 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -193,8 +193,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 0;
+ compatible = fsl,spi;
reg = 4c0 40;
interrupts = 2;
interrupt-parent = qeic ;
@@ -202,8 +202,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 1;
+ compatible = fsl,spi;
reg = 500 40;
interrupts = 1;
interrupt-parent = qeic ;
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts
b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index a7a2e45..ce63b13 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -183,8 +183,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 0;
+ compatible = fsl,spi;
reg = 4c0 40;
interrupts = 2;
interrupt-parent = qeic;
@@ -192,8 +192,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 1;
+ compatible = fsl,spi;
reg = 500 40;
interrupts = 1;
interrupt-parent = qeic;
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts
b/arch/powerpc/boot/dts/mpc8349emitx.dts
index e354f26..f8fc5f6 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -82,8 +82,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 0;
+ compatible = fsl,spi;
reg = 7000 1000;
interrupts = 10 8;
interrupt-parent = ipic ;
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index ebdf0b7..50c 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -80,8 +80,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 0;
+ compatible = fsl,spi;
reg = 7000 1000;
interrupts = 10 8;
interrupt-parent = ipic ;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts
b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 0ba13eb..6ed36a1 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -93,8 +93,8 @@
};
[EMAIL PROTECTED] {
- device_type = spi;
- compatible = fsl_spi;
+ cell-index = 0;
+ compatible = fsl,spi;
reg = 7000
[PATCH 4/4] sbc8560: Add default .config file for Wind River SBC8560
This is a suitable .config file for building the WRS SBC8560 kernel to be used for NFS root via one of the TSEC interfaces and with serial console via the 16550 compatible UART on the board. Signed-off-by: Paul Gortmaker [EMAIL PROTECTED] --- arch/powerpc/configs/sbc8560_defconfig | 764 1 files changed, 764 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/configs/sbc8560_defconfig b/arch/powerpc/configs/sbc8560_defconfig new file mode 100644 index 000..5d13e22 --- /dev/null +++ b/arch/powerpc/configs/sbc8560_defconfig @@ -0,0 +1,764 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.24-rc4 +# Wed Dec 19 15:46:40 2007 +# +# CONFIG_PPC64 is not set + +# +# Processor support +# +# CONFIG_6xx is not set +CONFIG_PPC_85xx=y +# CONFIG_PPC_8xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_E200 is not set +CONFIG_85xx=y +CONFIG_E500=y +CONFIG_BOOKE=y +CONFIG_FSL_BOOKE=y +# CONFIG_PHYS_64BIT is not set +CONFIG_SPE=y +# CONFIG_PPC_MM_SLICES is not set +CONFIG_PPC32=y +CONFIG_WORD_SIZE=32 +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_IRQ_PER_CPU=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_ARCH_HAS_ILOG2_U32=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +# CONFIG_ARCH_NO_VIRT_TO_BUS is not set +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +CONFIG_OF=y +CONFIG_PPC_UDBG_16550=y +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +CONFIG_GENERIC_BUG=y +CONFIG_DEFAULT_UIMAGE=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +CONFIG_DEFCONFIG_LIST=/lib/modules/$UNAME_RELEASE/.config + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION= +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FAIR_USER_SCHED=y +# CONFIG_FAIR_CGROUP_SCHED is not set +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE= +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_ANON_INODES=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_MODULES is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set +# CONFIG_BLK_DEV_BSG is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED=anticipatory + +# +# Platform support +# +# CONFIG_PPC_MPC52xx is not set +# CONFIG_PPC_MPC5200 is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PQ2ADS is not set +# CONFIG_MPC8540_ADS is not set +# CONFIG_MPC8560_ADS is not set +# CONFIG_MPC85xx_CDS is not set +# CONFIG_MPC85xx_MDS is not set +# CONFIG_MPC85xx_DS is not set +CONFIG_SBC8560=y +CONFIG_MPC8560=y +CONFIG_MPC85xx=y +CONFIG_MPIC=y +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_CPM2 is not set +# CONFIG_FSL_ULI1575 is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_300 is not set +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +CONFIG_BINFMT_MISC=y +# CONFIG_MATH_EMULATION is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y
Re: Oops: Kernel access of bad area
Christian Kujau wrote: Hi, I started some x11 application (here: firefox) through an ssh connection on a remote host and it crashed somehow. OK, no biggie, killed the application and be done with it. However, I noticed that the load of the machine is now constantly at 7. It's an iBook G4, has nothing to do, disks, cpu, netwokr is idle and load is usually 1. Now it's not slow to work or anyhow sluggish, but only the load is at 7 after the application crashed. When I looked into dmesg I saw: [84983.750977] Unable to handle kernel paging request for data at address 0x4815d000 [84983.751046] Faulting instruction address: 0xc0012090 [84983.751157] Oops: Kernel access of bad area, sig: 11 [#1] [84983.751178] PREEMPT PowerMac [84983.751214] Modules linked in: nls_iso8859_15 nls_cp850 vfat fat isofs nls_base zlib_inflate radeon drm snd_powermac snd_pcm snd_timer snd soundcore snd_page_alloc fuse firewire_ohci firewire_core crc_itu_t ide_cd cdrom ssb bcm43xx rng_core ieee80211softmac uninorth_agp ieee80211 ieee80211_crypt agpgart [84983.751750] NIP: c0012090 LR: c00165fc CTR: 0080 [84983.751786] REGS: cea65b30 TRAP: 0300 Not tainted (2.6.24-rc5) [84983.751805] MSR: 9032 EE,ME,IR,DR CR: 24822282 XER: [84983.751946] DAR: 4815d000, DSISR: 4000 [84983.751965] TASK = ee372670[9138] 'firefox-bin' THREAD: cea64000 [84983.751984] GPR00: e62b3a00 cea65be0 ee372670 4815d000 0080 1bc0c181 4815d000 [84983.752148] GPR08: 00010008 e62b3a00 c045f000 24822288 1002ea3c cea67690 ce954000 [84983.752315] GPR16: c042 c03f6400 cea65cac cea65ca8 c044 ce974480 c07d7180 ceba2280 [84983.752468] GPR24: e62b3a00 e62b3a50 4815d000 0574 ceba2280 4815d000 1bc0c181 c07d7180 [84983.752665] NIP [c0012090] __flush_dcache_icache+0x14/0x40 [84983.752716] LR [c00165fc] update_mmu_cache+0x11c/0x120 Better to include the full stack trace in such reports, but here it is: NIP [c0012090] __flush_dcache_icache+0x14/0x40 LR [c00165fc] update_mmu_cache+0x11c/0x120 Call Trace: [cea65be0] [ce8c1000] 0xce8c1000 (unreliable) [cea65c00] [c0075868] handle_mm_fault+0x39c/0x7f8 [cea65c50] [c0075dec] get_user_pages+0x128/0x398 [cea65ca0] [c00c5e18] elf_core_dump+0xb64/0xc28 [cea65d40] [c0091e64] do_coredump+0x754/0x788 [cea65e50] [c003cb20] get_signal_to_deliver+0x2dc/0x3fc [cea65e80] [c000a678] do_signal+0x48/0x28c [cea65f40] [c0012cb4] do_user_signal+0x74/0xc4 --- Exception: c00 at 0xfd36ea4 LR = 0x10012018 Instruction dump: 4d820020 7c8903a6 7c001bac 38630020 4200fff8 7c0004ac 4e800020 6000 54630026 38800080 7c8903a6 7c661b78 7c00186c 38630020 4200fff8 7c0004ac So it looks like the kernel oopsed while firefox was dumping core, yuck. This is the first time that this happened on this iBook, and it was not reproducible so far (well, it happened just a few minutes ago). Is this something to worry about? Or should I file this under well, shit happens? It's a real bug. Hopefully someone on the list can help... ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
On 12/19/07, Timur Tabi [EMAIL PROTECTED] wrote:
+static struct of_device_id mpc8610_ids[] = {
+ { .type = soc, },
+ {}
+};
+
+static int __init mpc8610_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc86xx_hpcd))
+ return 0;
+
+ /* Without this call, the SSI device driver won't get probed. */
+ of_platform_bus_probe(NULL, mpc8610_ids, NULL);
+
+ return 0;
+}
+device_initcall(mpc8610_declare_of_platform_devices);
How is of_platform_bus_probe() supposed to be called? mpc5200/virtex
call it with three NULLs. Is it necessary to name all of the buses in
a of_device_id? If it's not necessary to list the buses the
of_platform_bus_probe() call could be moved to common code.
Are these buses?
{ .compatible = ibm,plb4, },
{ .compatible = ibm,opb, },
{ .compatible = ibm,ebc, },
Could of_platform_bus_probe() be simplified? No one uses the first and
third parameters.
--
Jon Smirl
[EMAIL PROTECTED]
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Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
Jon Smirl wrote:
How is of_platform_bus_probe() supposed to be called? mpc5200/virtex
call it with three NULLs. Is it necessary to name all of the buses in
a of_device_id? If it's not necessary to list the buses the
of_platform_bus_probe() call could be moved to common code.
I added the above code because it is the only way I could get my SSI nodes to
be
probed. If there's a better way to do it, I'm all ears. I just copied that
code from the mpc836x_mds.c platform file.
Are these buses?
{ .compatible = ibm,plb4, },
{ .compatible = ibm,opb, },
{ .compatible = ibm,ebc, },
I have no idea.
Could of_platform_bus_probe() be simplified? No one uses the first and
third parameters.
Maybe, but that's not a discussion for this thread!
--
Timur Tabi
Linux kernel developer at Freescale
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Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
On Thu, Dec 20, 2007 at 08:24:35AM -0600, Timur Tabi wrote:
Olof Johansson wrote:
+static struct of_device_id mpc8610_ids[] = {
+ { .type = soc, },
+ {}
Please scan based on compatible instead of device_type.
I was just following the example from another board file. However, the 'soc'
node in the device tree does not have a compatible property, so I don't how
to
change this.
Then add an appropriate compatible entry to it, please.
Do you ever anticipate having other dma users on the system, such as
memcpy offload? You'll probably need allocation support for channels
when that day comes (I ended up writing a simple library for dma channel
management for that very reason on my platform).
Yes, I plan on updating this driver to work with the standard Freescale Elo
device driver, but that will have to wait until that code is in the kernel
and
stabilized. The SSI is limited in which DMA channels it can use, anyway.
Ok.
-Olof
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Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
Olof Johansson wrote: I was just following the example from another board file. However, the 'soc' node in the device tree does not have a compatible property, so I don't how to change this. Then add an appropriate compatible entry to it, please. None of the SOC nodes in any DTS have a compatible entry. I understand the issue, but you're asking me to fix a larger problem, one that is beyond the scope of this patch. You're saying that *all* SOC needs are incorrectly defined and need to be probed differently. -- Timur Tabi Linux kernel developer at Freescale ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
On 12/20/07, Timur Tabi [EMAIL PROTECTED] wrote:
Jon Smirl wrote:
How is of_platform_bus_probe() supposed to be called? mpc5200/virtex
call it with three NULLs. Is it necessary to name all of the buses in
a of_device_id? If it's not necessary to list the buses the
of_platform_bus_probe() call could be moved to common code.
I added the above code because it is the only way I could get my SSI nodes to
be
probed. If there's a better way to do it, I'm all ears. I just copied that
code from the mpc836x_mds.c platform file.
mpc5200 does it like this:
of_platform_bus_probe(NULL, NULL, NULL);
No need for the ids.
Are these buses?
{ .compatible = ibm,plb4, },
{ .compatible = ibm,opb, },
{ .compatible = ibm,ebc, },
I have no idea.
Could of_platform_bus_probe() be simplified? No one uses the first and
third parameters.
Maybe, but that's not a discussion for this thread!
--
Timur Tabi
Linux kernel developer at Freescale
--
Jon Smirl
[EMAIL PROTECTED]
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Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
Timur Tabi wrote: Olof Johansson wrote: I was just following the example from another board file. However, the 'soc' node in the device tree does not have a compatible property, so I don't how to change this. Then add an appropriate compatible entry to it, please. None of the SOC nodes in any DTS have a compatible entry. Not quite true; ep88xc, mpc8272ads, and pq2fads have them. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
Timur Tabi wrote: Jon Smirl wrote: mpc5200 does it like this: of_platform_bus_probe(NULL, NULL, NULL); I think that tells the OF base code to probe everything in the device tree, which is probably overkill. I think fsl_soc.c covers most of the device tree, but the SSI is not defined in fsl_soc.c. Not quite; it tells it to use a built-in list of bus matches. Most of which are device_type-based, FWIW. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [spi-devel-general] [PATCH v2 3/4] [POWERPC][SPI] use brg-frequency for SPI in QE
On Thursday 20 December 2007, Anton Vorontsov wrote: In case of QE we can use brg-frequency (which is qeclk/2). Thus no need to divide sysclk in the spi_mpc83xx. This patch also adds code to use get_brgfreq() on QE chips. Signed-off-by: Anton Vorontsov [EMAIL PROTECTED] --- arch/powerpc/sysdev/fsl_soc.c | 37 - drivers/spi/spi_mpc83xx.c | 6 +- 2 files changed, 25 insertions(+), 18 deletions(-) For the SPI parts: Acked-by: David Brownell [EMAIL PROTECTED] Though it all looks a bit confusing to me, and I wonder if the OF docs would make it less so. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
On 12/20/07, Scott Wood [EMAIL PROTECTED] wrote:
Timur Tabi wrote:
Jon Smirl wrote:
mpc5200 does it like this:
of_platform_bus_probe(NULL, NULL, NULL);
I think that tells the OF base code to probe everything in the device tree,
which is probably overkill. I think fsl_soc.c covers most of the device
tree,
but the SSI is not defined in fsl_soc.c.
Not quite; it tells it to use a built-in list of bus matches. Most of
which are device_type-based, FWIW.
Here's the default. Using NULL would work.
static struct of_device_id of_default_bus_ids[] = {
{ .type = soc, },
{ .compatible = soc, },
{ .type = spider, },
{ .type = axon, },
{ .type = plb5, },
{ .type = plb4, },
{ .type = opb, },
{ .type = ebc, },
{},
};
-Scott
--
Jon Smirl
[EMAIL PROTECTED]
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Re: [PATCH 1/4] sbc8560: add basic support for Wind River SBC8560 as powerpc
Hi Paul,
Just a couple of comments.
On Thu, 20 Dec 2007 09:54:29 -0500 Paul Gortmaker [EMAIL PROTECTED] wrote:
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) = 0) {
+ generic_handle_irq(cascade_irq);
+ }
The braces are unnecessary.
+static void __init sbc8560_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np = NULL;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(np, open-pic);
+
+ if (np == NULL) {
We often say if (!np) and leave out the blank line above.
+ if(of_address_to_resource(np, 0, r)) {
^
Put a space here.
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, fsl,cpm2-pic);
+ if (np == NULL) {
+ printk(KERN_ERR PIC init: can not find fsl,cpm2-pic node\n);
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ cpm2_pic_init(np);
Need an of_node_pit(np) - cpm2_pic_init() does its own of_node_get.
+static struct cpm_pin sbc8560_pins[] = {
const?
--
Cheers,
Stephen Rothwell[EMAIL PROTECTED]
http://www.canb.auug.org.au/~sfr/
pgpNxS42SAQNy.pgp
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Re: More patches added to for-2.6.25 and master branches of powerpc.git
Paulus,
Can you take the crash shutdown hook patches as well?
http://patchwork.ozlabs.org/linuxppc/patch?person=414id=15546
http://patchwork.ozlabs.org/linuxppc/patch?person=414id=15547
Mikey
In message [EMAIL PROTECTED] you wrote:
Andre Detsch (1):
[POWERPC] cell: safer of_has_vicinity routine
Balbir Singh (1):
[POWERPC] Fake NUMA emulation for PowerPC
Benjamin Herrenschmidt (20):
[POWERPC] pci32: Remove bogus alignment message
[POWERPC] pci32: Use generic pci_assign_unassign_resources
[POWERPC] pci32: Remove PowerMac P2P bridge IO hack
[POWERPC] pci32: Add flags modifying the PCI code behaviour
[POWERPC] pci32: Remove obsolete PowerMac bus number hack
[POWERPC] pci32: Add platform option to enable /proc PCI domains
[POWERPC] Merge pcibios_resource_to_bus/bus_to_resource
[POWERPC] Merge PCI resource fixups
[POWERPC] Merge PCI resource allocation assignment
[POWERPC] fix iSeries PCI resource management
[POWERPC] Updates/fixes to 32 bits pcibios_enable_device()
[POWERPC] Merge 32 and 64 bits pcibios_enable_device
[POWERPC] Fixup powermac enable device hook
[POWERPC] Clear pci_probe_only on 64 bits PowerMac
[POWERPC] Various fixes to pcibios_enable_device()
[POWERPC] Enable self-view of the HT host bridge on PowerMac G5
[POWERPC] Improve resource setup of PowerMac G5 HT bridge
[POWERPC] Fixup skipping of PowerMac PCI-PCI bridge closed resource
s
[POWERPC] Disable PCI IO/Mem on a device when resources can't be alloca
ted
[POWERPC] Fix PCI IRQ fallback code to not map IRQ 0
Bob Nelson (1):
[POWERPC] OProfile: fix cbe pm signal routing problem
Cyrill Gorcunov (1):
[POWERPC] CHRP: Fix possible NULL pointer dereference
David Gibson (2):
[POWERPC] Merge dtc upstream source
[POWERPC] Use embedded dtc in kernel builds
Grant Likely (1):
[POWERPC] Add machine initcall macros
Ishizaki Kou (3):
[POWERPC] cell: add missing '\n'
[POWERPC] Cleanup calling mmio_nvram_init
[POWERPC] celleb: Split machine definition
Jeremy Kerr (6):
[POWERPC] cell: export force_sig_info()
[POWERPC] cell: handle kernel SLB setup in spu_base.c
[POWERPC] cell: use spu_load_slb for SLB setup
[POWERPC] cell: add spu_64k_pages_available() check
[POWERPC] cell: handle SPE kernel mappings that cross segment boundarie
s
[POWERPC] cell: catch errors from sysfs_create_group()
Jochen Friedrich (2):
[POWERPC] Add support for PORTA and PORTB odr registers
[POWERPC] Move CPM command handling into the cpm drivers
Johannes Berg (3):
[POWERPC] adb: Replace sleep notifier with platform driver suspend/resu
me hooks
[POWERPC] via-pmu: Kill sleep notifiers completely
[POWERPC] powermac: Use generic suspend code
Jon Loeliger (3):
[POWERPC] 8xxx: Convert #include of asm/of_{platform, device}.h into li
nux/of_{platform, device}.h.
[POWERPC] 86xx: Add aliases node to 8641hpcn DTS file.
[POWERPC] cell: Convert #include of asm/of_{platform, device}.h into li
nux/of_{platform, device}.h.
Julia Lawall (3):
[POWERPC] arch/ppc: Remove an unnecessary pci_dev_put
[POWERPC] arch/powerpc: Add missing of_node_put
[POWERPC] cell/cbe_regs.c: Add missing of_node_put
Kevin Corry (1):
[POWERPC] perfmon2: make pm_interval register read/write
Kumar Gala (5):
[POWERPC] Add SPRN for Embedded registers specified in PowerISA 2.04
[POWERPC] Emulate isel (Integer Select) instruction
[POWERPC] FSL: I2C device tree cleanups
[POWERPC] FSL: enet device tree cleanups
[POWERPC] FSL: Added aliases node to device trees
Li Yang (5):
[POWERPC] add e300c4 entry to cputable
[POWERPC] ipic: add new interrupts introduced by new chip
[POWERPC] 83xx: Add platform support for MPC837x MDS board
[POWERPC] 83xx: Add MPC837x MDS default kernel configuration
[POWERPC] ipic: ack only for edge interrupts
Li Zefan (1):
[POWERPC] Don't cast a struct pointer to list_head pointer
Lucas Woods (2):
[POWERPC] arch/powerpc: Remove duplicate includes
[POWERPC] arch/ppc: Remove duplicate includes
Michael Ellerman (1):
[POWERPC] Implement pci_set_dma_mask() in terms of the dma_ops
Milton Miller (6):
[POWERPC] Push down or eliminate smp_processor_id calls in xics code
[POWERPC] init_decrementer_clockevent can be static __init
[POWERPC] Use __get_cpu_var in time.c
[POWERPC] Timer interrupt: use a struct for two per_cpu varables
[POWERPC] Depend on -initialized in calc_steal_time
[POWERPC] Optimize account_system_vtime
Olof Johansson (3):
[POWERPC] MPIC: Minor optimization of ipi handler
[POWERPC] pasemi: Implement MSI support
[POWERPC] holly.c: Remove unnecessary include of
patch pci-fix-bus-resource-assignment-on-32-bits-with-64b-resources.patch added to gregkh-2.6 tree
This is a note to let you know that I've just added the patch titled
Subject: PCI: Fix bus resource assignment on 32 bits with 64b resources
to my gregkh-2.6 tree. Its filename is
pci-fix-bus-resource-assignment-on-32-bits-with-64b-resources.patch
This tree can be found at
http://www.kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/patches/
From [EMAIL PROTECTED] Sun Dec 9 22:32:23 2007
From: Benjamin Herrenschmidt [EMAIL PROTECTED]
Date: Mon, 10 Dec 2007 17:32:15 +1100
Subject: PCI: Fix bus resource assignment on 32 bits with 64b resources
To: Greg Kroah-Hartman [EMAIL PROTECTED]
Cc: [EMAIL PROTECTED], linuxppc-dev@ozlabs.org, [EMAIL PROTECTED]
Message-ID: [EMAIL PROTECTED]
The current pci_assign_unassigned_resources() code doesn't work properly
on 32 bits platforms with 64 bits resources. The main reason is the use
of unsigned long in various places instead of resource_size_t.
This fixes it, along with some tricks to avoid casting to 64 bits on
platforms that don't need it in every printk around.
This is a pre-requisite for making powerpc use the generic code instead of
its own half-useful implementation.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Signed-off-by: Greg Kroah-Hartman [EMAIL PROTECTED]
---
drivers/pci/setup-bus.c | 64 ++--
include/linux/pci.h |4 +--
2 files changed, 42 insertions(+), 26 deletions(-)
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -89,8 +89,9 @@ void pci_setup_cardbus(struct pci_bus *b
* The IO resource is allocated a range twice as large as it
* would normally need. This allows us to set both IO regs.
*/
- printk( IO window: %08lx-%08lx\n,
- region.start, region.end);
+ printk(KERN_INFO IO window: 0x%08lx-0x%08lx\n,
+ (unsigned long)region.start,
+ (unsigned long)region.end);
pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
region.start);
pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
@@ -99,8 +100,9 @@ void pci_setup_cardbus(struct pci_bus *b
pcibios_resource_to_bus(bridge, region, bus-resource[1]);
if (bus-resource[1]-flags IORESOURCE_IO) {
- printk( IO window: %08lx-%08lx\n,
- region.start, region.end);
+ printk(KERN_INFO IO window: 0x%08lx-0x%08lx\n,
+ (unsigned long)region.start,
+ (unsigned long)region.end);
pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
region.start);
pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
@@ -109,8 +111,9 @@ void pci_setup_cardbus(struct pci_bus *b
pcibios_resource_to_bus(bridge, region, bus-resource[2]);
if (bus-resource[2]-flags IORESOURCE_MEM) {
- printk( PREFETCH window: %08lx-%08lx\n,
- region.start, region.end);
+ printk(KERN_INFO PREFETCH window: 0x%08lx-0x%08lx\n,
+ (unsigned long)region.start,
+ (unsigned long)region.end);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
region.start);
pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
@@ -119,8 +122,9 @@ void pci_setup_cardbus(struct pci_bus *b
pcibios_resource_to_bus(bridge, region, bus-resource[3]);
if (bus-resource[3]-flags IORESOURCE_MEM) {
- printk( MEM window: %08lx-%08lx\n,
- region.start, region.end);
+ printk(KERN_INFO MEM window: 0x%08lx-0x%08lx\n,
+ (unsigned long)region.start,
+ (unsigned long)region.end);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
region.start);
pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
@@ -145,7 +149,7 @@ pci_setup_bridge(struct pci_bus *bus)
{
struct pci_dev *bridge = bus-self;
struct pci_bus_region region;
- u32 l, io_upper16;
+ u32 l, bu, lu, io_upper16;
DBG(KERN_INFO PCI: Bridge: %s\n, pci_name(bridge));
@@ -159,7 +163,8 @@ pci_setup_bridge(struct pci_bus *bus)
/* Set up upper 16 bits of I/O base/limit. */
io_upper16 = (region.end 0x) | (region.start 16);
DBG(KERN_INFO IO window: %04lx-%04lx\n,
- region.start, region.end);
+ (unsigned long)region.start,
+ (unsigned long)region.end);
}
else {
/* Clear upper 16 bits of I/O base/limit. */
@@ -180,8 +185,9 @@ pci_setup_bridge(struct pci_bus *bus)
if (bus-resource[1]-flags
patch pci-fix-warning-in-setup-res.c-on-32-bit-platforms-with-64-bit-resources.patch added to gregkh-2.6 tree
This is a note to let you know that I've just added the patch titled Subject: PCI: Fix warning in setup-res.c on 32-bit platforms with 64-bit resources to my gregkh-2.6 tree. Its filename is pci-fix-warning-in-setup-res.c-on-32-bit-platforms-with-64-bit-resources.patch This tree can be found at http://www.kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/patches/ From [EMAIL PROTECTED] Sun Dec 9 22:32:23 2007 From: Benjamin Herrenschmidt [EMAIL PROTECTED] Date: Mon, 10 Dec 2007 17:32:16 +1100 Subject: PCI: Fix warning in setup-res.c on 32-bit platforms with 64-bit resources To: Greg Kroah-Hartman [EMAIL PROTECTED] Cc: [EMAIL PROTECTED], linuxppc-dev@ozlabs.org, [EMAIL PROTECTED] Message-ID: [EMAIL PROTECTED] This adds appropriate casts to avoid a warning and print the correct values in pr_debug. Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] Signed-off-by: Greg Kroah-Hartman [EMAIL PROTECTED] --- drivers/pci/setup-res.c |6 -- 1 file changed, 4 insertions(+), 2 deletions(-) --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -51,10 +51,12 @@ pci_update_resource(struct pci_dev *dev, pcibios_resource_to_bus(dev, region, res); - pr_debug( got res [%llx:%llx] bus [%lx:%lx] flags %lx for + pr_debug( got res [%llx:%llx] bus [%llx:%llx] flags %lx for BAR %d of %s\n, (unsigned long long)res-start, (unsigned long long)res-end, -region.start, region.end, res-flags, resno, pci_name(dev)); +(unsigned long long)region.start, +(unsigned long long)region.end, +(unsigned long)res-flags, resno, pci_name(dev)); new = region.start | (res-flags PCI_REGION_FLAG_MASK); if (res-flags IORESOURCE_IO) Patches currently in gregkh-2.6 which might be from [EMAIL PROTECTED] are bad/battery-class-driver.patch driver/adb-convert-from-class_device-to-device.patch driver/kobject-convert-hvc_console-to-use-kref-not-kobject.patch driver/kobject-convert-hvcs-to-use-kref-not-kobject.patch driver/kobject-convert-icom-to-use-kref-not-kobject.patch pci/pci-fix-bus-resource-assignment-on-32-bits-with-64b-resources.patch pci/pci-fix-warning-in-setup-res.c-on-32-bit-platforms-with-64-bit-resources.patch usb/usb-remove-ohci-useless-masking-unmasking-of-wdh-interrupt.patch ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/4] sbc8560: add basic support for Wind River SBC8560 as powerpc
On Dec 20, 2007, at 8:54 AM, Paul Gortmaker wrote:
This adds the basic support for the Wind River SBC8560 board,
implemented
as powerpc. It closely follows the implementation of the MPC8560ADS.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
---
arch/powerpc/platforms/85xx/Kconfig | 11 +-
arch/powerpc/platforms/85xx/Makefile |1 +
arch/powerpc/platforms/85xx/sbc8560.c | 302
+
3 files changed, 312 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/
platforms/85xx/Kconfig
index 7748a3a..0eb497b 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -38,6 +38,13 @@ config MPC85xx_DS
help
This option enables support for the MPC85xx DS (MPC8544 DS) board
+config SBC8560
+ bool Wind River SBC8560
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ help
+ This option enables support for the Wind River SBC8560 board
+
endchoice
config MPC8540
@@ -49,7 +56,7 @@ config MPC8540
config MPC8560
bool
select CPM2
- default y if MPC8560_ADS
+ default y if MPC8560_ADS || SBC8560
config MPC85xx
bool
@@ -59,4 +66,4 @@ config MPC85xx
select FSL_PCI if PCI
select SERIAL_8250_SHARE_IRQ if SERIAL_8250
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
- || MPC85xx_MDS || MPC85xx_DS
+ || MPC85xx_MDS || MPC85xx_DS || SBC8560
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/
platforms/85xx/Makefile
index 5eca920..c3f4d01 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
+obj-$(CONFIG_SBC8560) += sbc8560.o
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/
platforms/85xx/sbc8560.c
new file mode 100644
index 000..6aef38b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -0,0 +1,302 @@
+/*
+ * Wind River SBC8560 setup and early boot code.
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * By Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * Based largely on the MPC8560ADS support - Copyright 2005
Freescale Inc.
+ *
+ * This program is free software; you can redistribute it and/or
modify it
+ * under the terms of the GNU General Public License as
published by the
+ * Free Software Foundation; either version 2 of the License, or
(at your
+ * option) any later version.
+ */
+
+#include linux/stddef.h
+#include linux/kernel.h
+#include linux/pci.h
+#include linux/kdev_t.h
+#include linux/delay.h
+#include linux/seq_file.h
+#include linux/of_platform.h
+
+#include asm/system.h
+#include asm/time.h
+#include asm/machdep.h
+#include asm/pci-bridge.h
+#include asm/mpic.h
+#include mm/mmu_decl.h
+#include asm/udbg.h
+
+#include sysdev/fsl_soc.h
+#include sysdev/fsl_pci.h
+
+#ifdef CONFIG_CPM2
+#include asm/cpm2.h
+#include sysdev/cpm2_pic.h
+#endif
+
+#ifdef CONFIG_PCI
+static int sbc8560_exclude_device(struct pci_controller *hose,
+u_char bus, u_char devfn)
+{
+ if (bus == 0 PCI_SLOT(devfn) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ else
+ return PCIBIOS_SUCCESSFUL;
+}
do you really need to exclude the PHB itself? I've fixed this for FSL
PHBs so I don't believe you need this anymore.
+#endif /* CONFIG_PCI */
+
- k
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Re: [PATCH 0/4] arch/powerpc support for SBC8560 board
Can we get ride of sbc85xx in arch/ppc with these patches? - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v2 3/4] [POWERPC][SPI] use brg-frequency for SPI in QE
On Thu, Dec 20, 2007 at 11:33:22PM +0300, Anton Vorontsov wrote:
In case of QE we can use brg-frequency (which is qeclk/2).
Thus no need to divide sysclk in the spi_mpc83xx.
This patch also adds code to use get_brgfreq() on QE chips.
Signed-off-by: Anton Vorontsov [EMAIL PROTECTED]
---
[...]
@@ -91,6 +91,11 @@ u32 get_brgfreq(void)
/* Legacy device binding -- will go away when no users are left. */
node = of_find_node_by_type(NULL, cpm);
+ if (!node)
+ node = of_find_compatible_node(NULL, NULL, fsl,qe);
+ if (!node)
+ node = of_find_node_by_type(NULL, qe);
+
if (node) {
prop = of_get_property(node, brg-frequency, size);
I beg your pardon, truly. I just tested this on MPC8323E-RDB. No,
older u-boots doesn't have brg-frequency. So, I must add
of_get_property() for bus-frequency in case of failing
brg-frequency. :-/
I also found few glitches in `fsl_spi_init and users: stop using
device_type = spi' patch, regarding of_node_put(). Heh,
of_find_compatible_node() _puts_ `from' argument by itself, which
is not obvious at all.
I'll attach updated patches, with David's Acked-by on SPI driver
part. Other patches seem to be fine though.
Thanks,
p.s. dropping spi-devel list, because only powerpc stuff
affected.
--
Anton Vorontsov
email: [EMAIL PROTECTED]
backup email: [EMAIL PROTECTED]
irc://irc.freenode.net/bd2
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Re: [PATCH 3/4] sbc8560: Add device tree source for Wind River SBC8560 board
On Dec 20, 2007, at 8:54 AM, Paul Gortmaker wrote:
This adds the device tree source for the Wind River SBC8560 board.
The
biggest difference between this and the MPC8560ADS reference platform
is the use of an external 16550 compatible UART instead of the CPM2.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/sbc8560.dts | 202
+
1 files changed, 202 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/
dts/sbc8560.dts
new file mode 100644
index 000..85fc488
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -0,0 +1,202 @@
+/*
+ * SBC8560 Device Tree Source
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * This program is free software; you can redistribute it and/or
modify it
+ * under the terms of the GNU General Public License as
published by the
+ * Free Software Foundation; either version 2 of the License, or
(at your
+ * option) any later version.
+ */
+
can you look at converting this to a dts-v1 format.
+
+/ {
+ model = SBC8560;
+ compatible = SBC8560;
+ #address-cells = 1;
+ #size-cells = 1;
add aliases.
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 20; // 32 bytes
+ i-cache-line-size = 20; // 32 bytes
+ d-cache-size = 8000; // L1, 32K
+ i-cache-size = 8000; // L1, 32K
+ timebase-frequency = 0; // From uboot
+ bus-frequency = 0;
+ clock-frequency = 0;
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 2000;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
+ device_type = soc;
+ ranges = 0 ff70 0010;
+ reg = ff70 0010;
+ bus-frequency = 0;
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,8560-memory-controller;
+ reg = 2000 1000;
+ interrupt-parent = mpic;
+ interrupts = 12 2;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,8560-l2-cache-controller;
+ reg = 2 1000;
+ cache-line-size = 20; // 32 bytes
+ cache-size = 4; // L2, 256K
+ interrupt-parent = mpic;
+ interrupts = 10 2;
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = i2c;
+ compatible = fsl-i2c;
+ reg = 3000 100;
+ interrupts = 2b 2;
+ interrupt-parent = mpic;
+ dfsrr;
+ };
See updates for i2c controllers in the for-2.6.25 branch.
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = mdio;
+ compatible = gianfar;
seem updates to mdio in for-2.6.25 branch.
+ reg = 24520 20;
+ phy0: [EMAIL PROTECTED] {
+ interrupt-parent = mpic;
+ interrupts = 6 1;
+ reg = 19;
+ device_type = ethernet-phy;
+ };
+ phy1: [EMAIL PROTECTED] {
+ interrupt-parent = mpic;
+ interrupts = 7 1;
+ reg = 1a;
+ device_type = ethernet-phy;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = network;
+ model = TSEC;
+ compatible = gianfar;
+ reg = 24000 1000;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = 1d 2 1e 2 22 2;
+ interrupt-parent = mpic;
+ phy-handle = phy0;
see updates to enet nodes.
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = network;
+ model = TSEC;
+ compatible
Re: patch pci-fix-bus-resource-assignment-on-32-bits-with-64b-resources.patch added to gregkh-2.6 tree
The current pci_assign_unassigned_resources() code doesn't work properly on 32 bits platforms with 64 bits resources. The main reason is the use of unsigned long in various places instead of resource_size_t. This fixes it, along with some tricks to avoid casting to 64 bits on platforms that don't need it in every printk around. Can you still edit the changelog ? If yes, please remove that sentence since the latest version (which you put in your tree) doesn't actually have those tricks anymore as per discussion on the list... Sorry about that. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 0/4] arch/powerpc support for SBC8560 board
3) Add device tree source for Wind River SBC8560 board This is probably the most interesting part of the group, given that the board doesn't use the CPM2 to provide the serial console. I've made a duart dts entry that is kind of similar to what is done for the tsi108 on the mpc7448/hpc-ii board, and made sure that the serial had their parent marked as soc (found out the hard way that UARTs were ignored as possible consoles unless they were soc or tsi108 children...) b/arch/powerpc/boot/dts/sbc8560.dts | 203 ++ +- we need to figure out to fix this so we don't need the parent marked as 'soc'. Out of interest how exactly are the duart's wired on the 8560. Are they off localbus? I'd quickly spun together a u-boot 1.2.0 for testing this -- since that was the quickest route to getting a powerpc capable version. I'll see what can be done for getting a u-boot 1.3.1 patchset out so the local-mac- address vs address thing in the dtb isn't an issue. Probably should add a boot wrapper to work with old non-device tree aware u-boots. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 0/5] Version 17, series to add device tree naming to i2c
Are there any other objections to this patch? If not, can it be targeted for 2.6.25? On 12/19/07, Jon Smirl [EMAIL PROTECTED] wrote: Since copying i2c-mpc.c to maintain support for the ppc architecture seems to be an issue; instead rework i2c-mpc.c to use CONFIG_PPC_MERGE #ifdefs to support both the ppc and powerpc architecture. When ppc is deleted in six months these #ifdefs will need to be removed. Another rework of the i2c for powerpc device tree patch. This version implements standard alias naming only on the powerpc platform and only for the device tree names. The old naming mechanism of i2c_client.name,driver_name is left in place and not changed for non-powerpc platforms. This patch is fully capable of dynamically loading the i2c modules. You can modprobe in the i2c-mpc driver and the i2c modules described in the device tree will be automatically loaded. Modules also work if compiled in. The follow on patch to module-init-tools is also needed since the i2c subsystem has never implemented dynamic loading. The following series implements standard linux module aliasing for i2c modules on arch=powerpc. It then converts the mpc i2c driver from being a platform driver to an open firmware one. I2C device names are picked up from the device tree. Module aliasing is used to translate from device tree names into to linux kernel names. Several i2c drivers are updated to use the new aliasing. -- Jon Smirl [EMAIL PROTECTED] -- To unsubscribe from this list: send the line unsubscribe linux-kernel in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ -- Jon Smirl [EMAIL PROTECTED] ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 0/4] arch/powerpc support for SBC8560 board
Kumar Gala wrote: Can we get ride of sbc85xx in arch/ppc with these patches? - k That was the plan, yes. P. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 3/4] sbc8560: Add device tree source for Wind River SBC8560 board
On Thu, Dec 20, 2007 at 09:54:31AM -0500, Paul Gortmaker wrote:
This adds the device tree source for the Wind River SBC8560 board. The
biggest difference between this and the MPC8560ADS reference platform
is the use of an external 16550 compatible UART instead of the CPM2.
Signed-off-by: Paul Gortmaker [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/sbc8560.dts | 202
+
1 files changed, 202 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8560.dts
b/arch/powerpc/boot/dts/sbc8560.dts
new file mode 100644
index 000..85fc488
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -0,0 +1,202 @@
+/*
+ * SBC8560 Device Tree Source
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = SBC8560;
+ compatible = SBC8560;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 20; // 32 bytes
+ i-cache-line-size = 20; // 32 bytes
+ d-cache-size = 8000; // L1, 32K
+ i-cache-size = 8000; // L1, 32K
+ timebase-frequency = 0; // From uboot
+ bus-frequency = 0;
+ clock-frequency = 0;
+ 32-bit;
Drop the 32-bit. It was created in analogy with the 64-bit
property, but nothing ever actually specified it.
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 2000;
+ };
+
+ [EMAIL PROTECTED] {
I believe we're trying to call these [EMAIL PROTECTED] now rather than
[EMAIL PROTECTED].
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
+ device_type = soc;
+ ranges = 0 ff70 0010;
+ reg = ff70 0010;
+ bus-frequency = 0;
This should be clock-frequency not bus-frequency although I don't
know if you can fix this within your code, or if it's a pre-existing
brokenness.
[snip]
+ [EMAIL PROTECTED] {
+ device_type = i2c;
Drop this device_type.
+ compatible = fsl-i2c;
+ reg = 3000 100;
+ interrupts = 2b 2;
+ interrupt-parent = mpic;
+ dfsrr;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = mdio;
+ compatible = gianfar;
And this one, and change the compatible. The gianfar driver has
recently been updated to change this.
[snip]
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 0;
+ device_type = network;
+ model = TSEC;
+ compatible = gianfar;
Likewise here.
+ reg = 24000 1000;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = 1d 2 1e 2 22 2;
+ interrupt-parent = mpic;
+ phy-handle = phy0;
+ };
[snip]
+ mpic: [EMAIL PROTECTED] {
+ clock-frequency = 0;
The mpic has a clock-frequency??
+ interrupt-controller;
+ #address-cells = 0;
Should have #size-cells = 0 too.
+ #interrupt-cells = 2;
+ reg = 4 4;
+ built-in;
+ compatible = chrp,open-pic;
+ device_type = open-pic;
+ big-endian;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = fsl,mpc8560-guts;
+ reg = e 1000;
+ fsl,has-rstcr;
+ };
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
This is neither an interrupt-controller nor an interrupt-nexus, so it
shouldn't have #interrupt-cells.
+ device_type = soc;// console checks for this!
!? If console checks this (whatever that means), then console is
doing crap...
This is clearly *not* a SoC, and should have a proper
Re: [PATCH] ASoC drivers for the Freescale MPC8610 SoC
On Thu, Dec 20, 2007 at 06:13:31PM -0500, Jon Smirl wrote: On 12/20/07, Scott Wood [EMAIL PROTECTED] wrote: Timur Tabi wrote: Jon Smirl wrote: mpc5200 does it like this: of_platform_bus_probe(NULL, NULL, NULL); I think that tells the OF base code to probe everything in the device tree, which is probably overkill. I think fsl_soc.c covers most of the device tree, but the SSI is not defined in fsl_soc.c. Not quite; it tells it to use a built-in list of bus matches. Most of which are device_type-based, FWIW. Here's the default. Using NULL would work. It might work, but using the default list is discouraged. Pass an explicit list of match ids for the buses you need to scan instead (and use compatible to match them, not device_type). -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [DTC PATCH 1/2] Add yyerrorf() for formatted error messages.
On Thu, Dec 20, 2007 at 10:48:23AM -0600, Scott Wood wrote: Signed-off-by: Scott Wood [EMAIL PROTECTED] No need for a new function. If yyerror() is defined as a varargs function it's still compatible with bison's built-in usage. Oh, and while you're at it, you can kill off the bogus prototype for yyerror() in treesource.c -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: patch pci-fix-bus-resource-assignment-on-32-bits-with-64b-resources.patch added to gregkh-2.6 tree
On Fri, Dec 21, 2007 at 10:56:13AM +1100, Benjamin Herrenschmidt wrote: The current pci_assign_unassigned_resources() code doesn't work properly on 32 bits platforms with 64 bits resources. The main reason is the use of unsigned long in various places instead of resource_size_t. This fixes it, along with some tricks to avoid casting to 64 bits on platforms that don't need it in every printk around. Can you still edit the changelog ? Yes I can. If yes, please remove that sentence since the latest version (which you put in your tree) doesn't actually have those tricks anymore as per discussion on the list... Ok, now done, thanks. greg k-h ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [RESEND DTC PATCH 2/2] Add support for binary includes.
On Thu, Dec 20, 2007 at 01:52:59PM -0600, Scott Wood wrote:
A property's data can be populated with a file's contents
as follows:
node {
prop = /bin-include/ path/to/data;
};
I'd be inclined to use /incbin/ rather than /bin-include/. It's only
slightly less obvious, but it's then the same as the gas pseudo-op as
well as being a little briefer.
Search paths are not yet implemented; non-absolute lookups are relative to
the directory from which dtc was invoked.
Hrm. I think that's a bit too bogus. Although it's rather more work
to implement, I think we have to make relative paths relative to the
location of the dts file until search paths are implemented.
Signed-off-by: Scott Wood [EMAIL PROTECTED]
---
Apologies if you get this twice, but AFAICT the original got eaten by our
mail server.
dtc-lexer.l |6 ++
dtc-parser.y | 26 ++
dtc.h|1 +
3 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/dtc-lexer.l b/dtc-lexer.l
index c811b22..1f3e6d6 100644
--- a/dtc-lexer.l
+++ b/dtc-lexer.l
@@ -190,6 +190,12 @@ static int dts_version; /* = 0 */
return DT_PROPNODENAME;
}
+/bin-include/ {
+ yylloc.filenum = srcpos_filenum;
+ yylloc.first_line = yylineno;
+ DPRINT(Binary Include\n);
+ return DT_BININCLUDE;
+ }
*[[:space:]]+ /* eat whitespace */
diff --git a/dtc-parser.y b/dtc-parser.y
index 4a0181d..c7ed715 100644
--- a/dtc-parser.y
+++ b/dtc-parser.y
@@ -21,6 +21,8 @@
%locations
%{
+#include sys/stat.h
+
#include dtc.h
#include srcpos.h
@@ -58,6 +60,7 @@ extern struct boot_info *the_boot_info;
%token data DT_STRING
%token labelref DT_LABEL
%token labelref DT_REF
+%token DT_BININCLUDE
%type data propdata
%type data propdataprefix
@@ -196,6 +199,29 @@ propdata:
{
$$ = data_add_marker($1, REF_PATH, $2);
}
+ | propdataprefix DT_BININCLUDE DT_STRING
+ {
+ struct stat st;
+ FILE *f;
+ int fd;
+
+ f = fopen($3.val, rb);
+ if (!f) {
+ yyerrorf(Cannot open file \%s\: %s,
+ $3.val, strerror(errno));
+ YYERROR;
Hrm. I'm not sure that being unable to open the file should cause a
*parse* error which is what YYERROR will do. Probably better to print
an error message, but let the parsing continue, with the property
value being as though the file were empty.
+ }
+
+ fd = fileno(f);
+ if (fstat(fd, st) 0) {
+ yyerrorf(Cannot stat file \%s\: %s,
+ $3.val, strerror(errno));
+ YYERROR;
+ }
I'm also not sure that stat()ing the file is a good way to get the
size. This requires that the included file be a regular file with a
sane st_size value, and I can imagine cases where it might be useful
to incbin from a /dev node or other special file. Obviosuly
implementing that will require work to data_copy_file().
Actually, I think the way to go here would be to have two variants of
the incbin directive: one which takes just a filename and includes
the whole file contents, another which takes a filename and a number
and includes just the first N bytes of the file.
+ $$ = data_merge($1, data_copy_file(f, st.st_size));
+ fclose(f);
+ }
| propdata DT_LABEL
{
$$ = data_add_marker($1, LABEL, $2);
diff --git a/dtc.h b/dtc.h
index 9b89689..87b5bb1 100644
--- a/dtc.h
+++ b/dtc.h
@@ -138,6 +138,7 @@ struct data data_grow_for(struct data d, int xlen);
struct data data_copy_mem(const char *mem, int len);
struct data data_copy_escape_string(const char *s, int len);
struct data data_copy_file(FILE *f, size_t len);
+struct data data_bin_include(const char *filename);
This looks like a hangover from an earlier version.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [PATCH v3 2/2] mpc82xx: Embedded Planet EP8248E support
On Thu, Dec 20, 2007 at 11:45:24AM -0600, Scott Wood wrote:
This board is also resold by Freescale under the names
QUICCStart MPC8248 Evaluation System and CWH-PPC-8248N-VE.
Signed-off-by: Scott Wood [EMAIL PROTECTED]
[snip]
+ [EMAIL PROTECTED],0 {
+ #address-cells = 2;
+ #size-cells = 1;
+ reg = 1 0 0x10;
+ compatible = fsl,ep8248e-bcsr;
+ ranges;
+
+ mdio {
+ device_type = mdio;
Shouldn't have this device_type.
+ compatible = fsl,ep8248e-mdio-bitbang;
+ #address-cells = 1;
+ #size-cells = 0;
+ reg = 1 8 1;
+
+ PHY0: [EMAIL PROTECTED] {
+ interrupt-parent = PIC;
+ reg = 0;
+ device_type = ethernet-phy;
+ };
+
+ PHY1: [EMAIL PROTECTED] {
+ interrupt-parent = PIC;
+ reg = 1;
+ device_type = ethernet-phy;
+ };
+ };
+ };
+ };
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Enable RTC for Ebony and Walnut
This patch extends the Ebony and Walnut platform code to instantiate
the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip
found on both those boards. The patch uses a helper function to scan
the device tree and instantiate the appropriate platform_device based
on it, so it should be easy to extend for other boards which have mmio
mapped RTC chips.
Along with this, the device tree binding for the ds1743 chips is
tweaked, based on the existing DS1385 OF binding found at:
http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt
Although that document covers the NVRAM portion of the chip, whereas
here we're interested in the RTC portion, so it's not entirely clear
if that's a good model.
This implements only RTC class driver support - that is /dev/rtc0, not
/dev/rtc, and the low-level get/set time callbacks remain
unimplemented. That means in order to get at the clock you will
either need a modified version of hwclock which will look at
/dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc.
Signed-off-by: David Gibson [EMAIL PROTECTED]
Index: working-2.6/arch/powerpc/boot/dts/ebony.dts
===
--- working-2.6.orig/arch/powerpc/boot/dts/ebony.dts2007-10-22
13:55:49.0 +1000
+++ working-2.6/arch/powerpc/boot/dts/ebony.dts 2007-12-21 13:11:34.0
+1100
@@ -150,9 +150,10 @@
};
};
- [EMAIL PROTECTED],0 {
+ [EMAIL PROTECTED],0 {
/* NVRAM RTC */
- compatible = ds1743;
+ compatible = ds1743-nvram;
+ #bytes = 2000;
reg = 1 0 2000;
};
Index: working-2.6/arch/powerpc/platforms/44x/ebony.c
===
--- working-2.6.orig/arch/powerpc/platforms/44x/ebony.c 2007-12-10
10:52:44.0 +1100
+++ working-2.6/arch/powerpc/platforms/44x/ebony.c 2007-12-21
13:11:34.0 +1100
@@ -18,6 +18,7 @@
#include linux/init.h
#include linux/of_platform.h
+#include linux/rtc.h
#include asm/machdep.h
#include asm/prom.h
@@ -40,6 +41,7 @@ static int __init ebony_device_probe(voi
return 0;
of_platform_bus_probe(NULL, ebony_of_bus, NULL);
+ of_instantiate_rtc();
return 0;
}
Index: working-2.6/arch/powerpc/platforms/Kconfig
===
--- working-2.6.orig/arch/powerpc/platforms/Kconfig 2007-12-10
10:52:44.0 +1100
+++ working-2.6/arch/powerpc/platforms/Kconfig 2007-12-21 13:11:34.0
+1100
@@ -315,6 +315,9 @@ config FSL_ULI1575
config CPM
bool
+config OF_RTC
+ bool
+
source arch/powerpc/sysdev/bestcomm/Kconfig
endmenu
Index: working-2.6/arch/powerpc/sysdev/Makefile
===
--- working-2.6.orig/arch/powerpc/sysdev/Makefile 2007-12-21
13:11:32.0 +1100
+++ working-2.6/arch/powerpc/sysdev/Makefile2007-12-21 13:11:34.0
+1100
@@ -27,6 +27,7 @@ obj-$(CONFIG_PPC_I8259) += i8259.o
obj-$(CONFIG_PPC_83xx) += ipic.o
obj-$(CONFIG_4xx) += uic.o
obj-$(CONFIG_XILINX_VIRTEX)+= xilinx_intc.o
+obj-$(CONFIG_OF_RTC) += of_rtc.o
endif
# Temporary hack until we have migrated to asm-powerpc
Index: working-2.6/arch/powerpc/sysdev/of_rtc.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ working-2.6/arch/powerpc/sysdev/of_rtc.c2007-12-21 13:11:34.0
+1100
@@ -0,0 +1,59 @@
+/*
+ * Instantiate mmio-mapped RTC chips based on device tree information
+ *
+ * Copyright 2007 David Gibson [EMAIL PROTECTED], IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include linux/kernel.h
+#include linux/of.h
+#include linux/init.h
+#include asm/of_platform.h
+
+static struct {
+ char *compatible;
+ char *plat_name;
+} of_rtc_table[] = {
+ { ds1743-nvram, rtc-ds1742 },
+};
+
+void __init of_instantiate_rtc(void)
+{
+ struct device_node *node;
+ int err;
+ int i;
+
+ for (i = 0; i ARRAY_SIZE(of_rtc_table); i++) {
+ char *compatible = of_rtc_table[i].compatible;
+ char *plat_name = of_rtc_table[i].plat_name;
+
+ for_each_compatible_node(node, NULL, compatible) {
+ struct resource *res;
+
+
[DTC PATCH 2/2] Add support for binary includes.
A property's data can be populated with a file's contents
as follows:
node {
prop = /bin-include/ path/to/data;
};
Search paths are not yet implemented; non-absolute lookups are relative to
the directory from which dtc was invoked.
Signed-off-by: Scott Wood [EMAIL PROTECTED]
---
dtc-lexer.l |6 ++
dtc-parser.y | 26 ++
dtc.h|1 +
3 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/dtc-lexer.l b/dtc-lexer.l
index c811b22..1f3e6d6 100644
--- a/dtc-lexer.l
+++ b/dtc-lexer.l
@@ -190,6 +190,12 @@ static int dts_version; /* = 0 */
return DT_PROPNODENAME;
}
+/bin-include/{
+ yylloc.filenum = srcpos_filenum;
+ yylloc.first_line = yylineno;
+ DPRINT(Binary Include\n);
+ return DT_BININCLUDE;
+ }
*[[:space:]]+/* eat whitespace */
diff --git a/dtc-parser.y b/dtc-parser.y
index 4a0181d..c7ed715 100644
--- a/dtc-parser.y
+++ b/dtc-parser.y
@@ -21,6 +21,8 @@
%locations
%{
+#include sys/stat.h
+
#include dtc.h
#include srcpos.h
@@ -58,6 +60,7 @@ extern struct boot_info *the_boot_info;
%token data DT_STRING
%token labelref DT_LABEL
%token labelref DT_REF
+%token DT_BININCLUDE
%type data propdata
%type data propdataprefix
@@ -196,6 +199,29 @@ propdata:
{
$$ = data_add_marker($1, REF_PATH, $2);
}
+ | propdataprefix DT_BININCLUDE DT_STRING
+ {
+ struct stat st;
+ FILE *f;
+ int fd;
+
+ f = fopen($3.val, rb);
+ if (!f) {
+ yyerrorf(Cannot open file \%s\: %s,
+$3.val, strerror(errno));
+ YYERROR;
+ }
+
+ fd = fileno(f);
+ if (fstat(fd, st) 0) {
+ yyerrorf(Cannot stat file \%s\: %s,
+$3.val, strerror(errno));
+ YYERROR;
+ }
+
+ $$ = data_merge($1, data_copy_file(f, st.st_size));
+ fclose(f);
+ }
| propdata DT_LABEL
{
$$ = data_add_marker($1, LABEL, $2);
diff --git a/dtc.h b/dtc.h
index 9b89689..87b5bb1 100644
--- a/dtc.h
+++ b/dtc.h
@@ -138,6 +138,7 @@ struct data data_grow_for(struct data d, int xlen);
struct data data_copy_mem(const char *mem, int len);
struct data data_copy_escape_string(const char *s, int len);
struct data data_copy_file(FILE *f, size_t len);
+struct data data_bin_include(const char *filename);
struct data data_append_data(struct data d, const void *p, int len);
struct data data_insert_at_marker(struct data d, struct marker *m,
--
1.5.3
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Re: [PATCH 0/4] arch/powerpc support for SBC8560 board
In message: Re: [PATCH 0/4] arch/powerpc support for SBC8560 board on 20/12/2007 Kumar Gala wrote: 3) Add device tree source for Wind River SBC8560 board This is probably the most interesting part of the group, given that the board doesn't use the CPM2 to provide the serial console. I've made a duart dts entry that is kind of similar to what is done for the tsi108 on the mpc7448/hpc-ii board, and made sure that the serial had their parent marked as soc (found out the hard way that UARTs were ignored as possible consoles unless they were soc or tsi108 children...) b/arch/powerpc/boot/dts/sbc8560.dts | 203 +++- we need to figure out to fix this so we don't need the parent marked as 'soc'. Here is my interpretation of what is happening here -- we come in via find_legacy_serial_ports() to pick a console port. It grabs chosen to get np stdout, and then checks the parent of the 16550 compat ports against the following, requiring at least one of them to match: parent-type == soc ? add_legacy_soc_port() parent-type == isa ? add_legacy_isa_port() parent-type == tsi-bridge ? add_legacy_soc_port() parent-type == opb ? add_legacy_soc_port() No match means no serial console, it seems. I figured that parent == soc was the lesser lie to choose from, but I'm open to an alternate approach that is less apt to make David go ewww (an understandable reaction...). Out of interest how exactly are the duart's wired on the 8560. Are they off localbus? The board has a bunch of stuff hanging off of CS5 -- an RTC, a 7 segment display, an EEPROM, some BCSR-like registers, and of course the two UARTs which are supposed to be 16C2550. According to TFM, an EPM7128 PLD is responsible for mashing/sub-decoding this all onto/off of CS5. CS3 and CS4 are the LB-SDRAM. I'd quickly spun together a u-boot 1.2.0 for testing this -- since that was the quickest route to getting a powerpc capable version. I'll see what can be done for getting a u-boot 1.3.1 patchset out so the local-mac-address vs address thing in the dtb isn't an issue. Probably should add a boot wrapper to work with old non-device tree aware u-boots. Something to consider, sure -- but I figured working towards a more up to date u-boot is something people would see more of a future for and more of an interest in. Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] [POWERPC] Add EHEA and EHCA as modules in the ppc64_defconfig
Signed-off-by: Stephen Rothwell [EMAIL PROTECTED] --- arch/powerpc/configs/ppc64_defconfig |8 +--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig index 5760b9f..7695a4c 100644 --- a/arch/powerpc/configs/ppc64_defconfig +++ b/arch/powerpc/configs/ppc64_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit # Linux kernel version: 2.6.24-rc4 -# Thu Dec 6 16:49:07 2007 +# Fri Dec 21 14:47:29 2007 # CONFIG_PPC64=y @@ -211,7 +211,7 @@ CONFIG_MMIO_NVRAM=y CONFIG_MPIC_U3_HT_IRQS=y CONFIG_MPIC_BROKEN_REGREAD=y CONFIG_IBMVIO=y -# CONFIG_IBMEBUS is not set +CONFIG_IBMEBUS=y # CONFIG_PPC_MPC106 is not set CONFIG_PPC_970_NAP=y CONFIG_PPC_INDIRECT_IO=y @@ -375,7 +375,7 @@ CONFIG_INET_TUNNEL=y CONFIG_INET_XFRM_MODE_TRANSPORT=y CONFIG_INET_XFRM_MODE_TUNNEL=y CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set +CONFIG_INET_LRO=m CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set @@ -929,6 +929,7 @@ CONFIG_SPIDER_NET=m CONFIG_NETDEV_1=y # CONFIG_CHELSIO_T1 is not set # CONFIG_CHELSIO_T3 is not set +CONFIG_EHEA=m # CONFIG_IXGBE is not set CONFIG_IXGB=m # CONFIG_IXGB_NAPI is not set @@ -1558,6 +1559,7 @@ CONFIG_INFINIBAND_ADDR_TRANS=y CONFIG_INFINIBAND_MTHCA=m CONFIG_INFINIBAND_MTHCA_DEBUG=y # CONFIG_INFINIBAND_IPATH is not set +CONFIG_INFINIBAND_EHCA=m # CONFIG_INFINIBAND_AMSO1100 is not set # CONFIG_MLX4_INFINIBAND is not set CONFIG_INFINIBAND_IPOIB=m -- 1.5.3.7 -- Cheers, Stephen Rothwell[EMAIL PROTECTED] http://www.canb.auug.org.au/~sfr/ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 0/4] arch/powerpc support for SBC8560 board
On Thu, Dec 20, 2007 at 10:38:15PM -0500, Paul Gortmaker wrote: In message: Re: [PATCH 0/4] arch/powerpc support for SBC8560 board on 20/12/2007 Kumar Gala wrote: 3) Add device tree source for Wind River SBC8560 board This is probably the most interesting part of the group, given that the board doesn't use the CPM2 to provide the serial console. I've made a duart dts entry that is kind of similar to what is done for the tsi108 on the mpc7448/hpc-ii board, and made sure that the serial had their parent marked as soc (found out the hard way that UARTs were ignored as possible consoles unless they were soc or tsi108 children...) b/arch/powerpc/boot/dts/sbc8560.dts | 203 +++- we need to figure out to fix this so we don't need the parent marked as 'soc'. Here is my interpretation of what is happening here -- we come in via find_legacy_serial_ports() to pick a console port. It grabs chosen to get np stdout, and then checks the parent of the 16550 compat ports against the following, requiring at least one of them to match: parent-type == soc ? add_legacy_soc_port() parent-type == isa ? add_legacy_isa_port() parent-type == tsi-bridge ? add_legacy_soc_port() parent-type == opb ? add_legacy_soc_port() No match means no serial console, it seems. Not necessarily. If the port is picked up by the of_serial driver it should work. The drawback is that the console will be initialized rather late by this method. I figured that parent == soc was the lesser lie to choose from, but I'm open to an alternate approach that is less apt to make David go ewww (an understandable reaction...). Lying in the device tree like this is just bad. Adding another case to legacy_serial for your specific case would be ugly but infinitely preferable to mislabelling the node with type doc. -- David Gibson| I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] [POWERPC] The builtin matches for ibmebus.c can be __initdata
Signed-off-by: Stephen Rothwell [EMAIL PROTECTED]
---
arch/powerpc/kernel/ibmebus.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 72fd871..caae49f 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -52,7 +52,7 @@ static struct device ibmebus_bus_device = { /* fake parent
device */
struct bus_type ibmebus_bus_type;
/* These devices will automatically be added to the bus during init */
-static struct of_device_id builtin_matches[] = {
+static struct of_device_id __initdata builtin_matches[] = {
{ .compatible = IBM,lhca },
{ .compatible = IBM,lhea },
{},
--
1.5.3.7
--
Cheers,
Stephen Rothwell[EMAIL PROTECTED]
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[PATCH] [POWERPC] constify the of_device_id passed to of_platform_bus_probe
This will allow us to declare const all the statically declared arrrays
of these.
Signed-off-by: Stephen Rothwell [EMAIL PROTECTED]
---
arch/powerpc/kernel/of_platform.c |8
include/asm-powerpc/of_platform.h |2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/of_platform.c
b/arch/powerpc/kernel/of_platform.c
index 79c04d1..de36e23 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -40,7 +40,7 @@
* a bus type in the list
*/
-static struct of_device_id of_default_bus_ids[] = {
+static const struct of_device_id of_default_bus_ids[] = {
{ .type = soc, },
{ .compatible = soc, },
{ .type = spider, },
@@ -100,8 +100,8 @@ EXPORT_SYMBOL(of_platform_device_create);
* @matches: match table, NULL to use the default, OF_NO_DEEP_PROBE to
* disallow recursive creation of child busses
*/
-static int of_platform_bus_create(struct device_node *bus,
- struct of_device_id *matches,
+static int of_platform_bus_create(const struct device_node *bus,
+ const struct of_device_id *matches,
struct device *parent)
{
struct device_node *child;
@@ -137,7 +137,7 @@ static int of_platform_bus_create(struct device_node *bus,
*/
int of_platform_bus_probe(struct device_node *root,
- struct of_device_id *matches,
+ const struct of_device_id *matches,
struct device *parent)
{
struct device_node *child;
diff --git a/include/asm-powerpc/of_platform.h
b/include/asm-powerpc/of_platform.h
index d20a4cd..1bce5ef 100644
--- a/include/asm-powerpc/of_platform.h
+++ b/include/asm-powerpc/of_platform.h
@@ -32,7 +32,7 @@ extern struct of_device *of_platform_device_create(struct
device_node *np,
#define OF_NO_DEEP_PROBE ((struct of_device_id *)-1)
extern int of_platform_bus_probe(struct device_node *root,
-struct of_device_id *matches,
+const struct of_device_id *matches,
struct device *parent);
extern struct of_device *of_find_device_by_phandle(phandle ph);
--
1.5.3.7
--
Cheers,
Stephen Rothwell[EMAIL PROTECTED]
http://www.canb.auug.org.au/~sfr/
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[PATCH] [POWERPC] pointers marked as __iomem do not need to be volatile
Fixes this warning:
arch/powerpc/platforms/powermac/pci.c: In function 'u3_ht_cfg_access':
arch/powerpc/platforms/powermac/pci.c:354: warning: return discards qualifiers
from pointer target type
arch/powerpc/platforms/powermac/pci.c:358: warning: return discards qualifiers
from pointer target type
Signed-off-by: Stephen Rothwell [EMAIL PROTECTED]
---
include/asm-powerpc/pci-bridge.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index f7ed2b6..a6ea49e 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -75,8 +75,8 @@ struct pci_controller {
#endif
struct pci_ops *ops;
- volatile unsigned int __iomem *cfg_addr;
- volatile void __iomem *cfg_data;
+ unsigned int __iomem *cfg_addr;
+ void __iomem *cfg_data;
#ifndef CONFIG_PPC64
/*
--
1.5.3.7
--
Cheers,
Stephen Rothwell[EMAIL PROTECTED]
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[PATCH] [POWERPC] Make non-PCI build work again
Maple and pasemi both require PCI as does CONFIG_OF_PLATFORM_PCI. The default setting of CONFIG_ISA_DMA_API is set to match the protection around the relevant routines in asm/dma.h. I also had to remove the PMAC platform from the combined build. The precis is that to build a 64 bit kernel with no PCI, you can only include pSeries and iSeries. Signed-off-by: Stephen Rothwell [EMAIL PROTECTED] --- arch/powerpc/Kconfig |3 ++- arch/powerpc/platforms/maple/Kconfig |1 + arch/powerpc/platforms/pasemi/Kconfig |1 + 3 files changed, 4 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 232c298..d40844f 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -160,6 +160,7 @@ config PPC_DCR config PPC_OF_PLATFORM_PCI bool + depends on PCI depends on PPC64 # not supported on 32 bits yet default n @@ -417,7 +418,7 @@ endmenu config ISA_DMA_API bool - default y + default !PPC_ISERIES || PCI menu Bus options diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig index f7c95eb..a6467a5 100644 --- a/arch/powerpc/platforms/maple/Kconfig +++ b/arch/powerpc/platforms/maple/Kconfig @@ -1,6 +1,7 @@ config PPC_MAPLE depends on PPC_MULTIPLATFORM PPC64 bool Maple 970FX Evaluation Board + select PCI select MPIC select U3_DART select MPIC_U3_HT_IRQS diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig index 2f4dd6e..b3458a1 100644 --- a/arch/powerpc/platforms/pasemi/Kconfig +++ b/arch/powerpc/platforms/pasemi/Kconfig @@ -3,6 +3,7 @@ config PPC_PASEMI bool PA Semi SoC-based platforms default n select MPIC + select PCI select PPC_UDBG_16550 select PPC_NATIVE select MPIC_BROKEN_REGREAD -- 1.5.3.7 -- Cheers, Stephen Rothwell[EMAIL PROTECTED] http://www.canb.auug.org.au/~sfr/ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/21] [POWERPC] Reworking machine check handling and Fix 440/440A
This adds a cputable function pointer for the CPU-side machine
check handling. The semantic is still the same as the old one,
the one in ppc_md. overrides the one in cputable, though
ultimately we'll want to change that so the CPU gets first.
This removes CONFIG_440A which was a problem for multiplatform
kernels and instead fixes up the IVOR at runtime from a setup_cpu
function. The A version of the machine check also tweaks the
regs-trap value to differenciate the 2 versions at the C level.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/kernel/cpu_setup_44x.S |9 +++
arch/powerpc/kernel/cputable.c | 105
arch/powerpc/kernel/head_44x.S | 14 +++-
arch/powerpc/kernel/head_booke.h|2
arch/powerpc/kernel/traps.c | 62 -
arch/powerpc/platforms/44x/Kconfig |5 -
arch/ppc/kernel/traps.c | 98 ++---
include/asm-powerpc/cputable.h | 13
include/asm-powerpc/ptrace.h|3 -
include/asm-powerpc/reg_booke.h |3 -
include/asm-ppc/reg_booke.h |2
11 files changed, 258 insertions(+), 58 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/cpu_setup_44x.S2007-10-15
11:19:35.0 +1000
+++ linux-merge/arch/powerpc/kernel/cpu_setup_44x.S 2007-12-20
11:35:40.0 +1100
@@ -23,11 +23,20 @@ _GLOBAL(__setup_cpu_440epx)
mflrr4
bl __init_fpu_44x
bl __plb_disable_wrp
+ bl __fixup_440A_mcheck
mtlrr4
blr
_GLOBAL(__setup_cpu_440grx)
b __plb_disable_wrp
+_GLOBAL(__setup_cpu_440gx)
+_GLOBAL(__setup_cpu_440spe)
+ b __fixup_440A_mcheck
+ /* Temporary fixup for arch/ppc until we kill the whole thing */
+#ifndef CONFIG_PPC_MERGE
+_GLOBAL(__fixup_440A_mcheck)
+ blr
+#endif
/* enable APU between CPU and FPU */
_GLOBAL(__init_fpu_44x)
Index: linux-merge/arch/powerpc/kernel/cputable.c
===
--- linux-merge.orig/arch/powerpc/kernel/cputable.c 2007-12-20
11:34:43.0 +1100
+++ linux-merge/arch/powerpc/kernel/cputable.c 2007-12-20 11:35:40.0
+1100
@@ -33,7 +33,9 @@ EXPORT_SYMBOL(cur_cpu_spec);
#ifdef CONFIG_PPC32
extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -85,6 +87,7 @@ static struct cpu_spec __initdata cpu_sp
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = ppc64/power3,
.oprofile_type = PPC_OPROFILE_RS64,
+ .machine_check = machine_check_generic,
.platform = power3,
},
{ /* Power3+ */
@@ -99,6 +102,7 @@ static struct cpu_spec __initdata cpu_sp
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = ppc64/power3,
.oprofile_type = PPC_OPROFILE_RS64,
+ .machine_check = machine_check_generic,
.platform = power3,
},
{ /* Northstar */
@@ -113,6 +117,7 @@ static struct cpu_spec __initdata cpu_sp
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = ppc64/rs64,
.oprofile_type = PPC_OPROFILE_RS64,
+ .machine_check = machine_check_generic,
.platform = rs64,
},
{ /* Pulsar */
@@ -127,6 +132,7 @@ static struct cpu_spec __initdata cpu_sp
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = ppc64/rs64,
.oprofile_type = PPC_OPROFILE_RS64,
+ .machine_check = machine_check_generic,
.platform = rs64,
},
{ /* I-star */
@@ -141,6 +147,7 @@ static struct cpu_spec __initdata cpu_sp
.pmc_type = PPC_PMC_IBM,
.oprofile_cpu_type = ppc64/rs64,
.oprofile_type = PPC_OPROFILE_RS64,
+ .machine_check = machine_check_generic,
.platform = rs64,
},
{ /* S-star */
@@ -155,6 +162,7 @@ static struct cpu_spec __initdata cpu_sp
.pmc_type = PPC_PMC_IBM,
[PATCH 2/21] [POWERPC] Improve support for 4xx indirect DCRs
Accessing indirect DCRs is done via a pair of address/data DCRs.
Such accesses are thus inherently racy, vs. interrupts, preemption
and possibly SMP if 4xx SMP cores are ever used.
This updates the mfdcri/mtdcri macros in dcr-native.h (which were
so far unused) to use a spinlock.
In addition, add some common definitions to a new dcr-regs.h file.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
include/asm-powerpc/dcr-native.h | 30 ++--
include/asm-powerpc/dcr-regs.h | 71 +++
2 files changed, 91 insertions(+), 10 deletions(-)
--- linux-merge.orig/include/asm-powerpc/dcr-native.h 2007-12-14
15:48:56.0 +1100
+++ linux-merge/include/asm-powerpc/dcr-native.h2007-12-14
15:49:41.0 +1100
@@ -22,6 +22,8 @@
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
+#include linux/spinlock.h
+
typedef struct {
unsigned int base;
} dcr_host_t;
@@ -55,20 +57,28 @@ do {
\
} while (0)
/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
-#define mfdcri(base, reg) \
-({ \
- mtdcr(base ## _CFGADDR, base ## _ ## reg); \
- mfdcr(base ## _CFGDATA);\
+extern spinlock_t dcr_ind_lock;
+
+#define mfdcri(base, reg) \
+({ \
+ unsigned long flags;\
+ unsigned int val; \
+ spin_lock_irqsave(dcr_ind_lock, flags);\
+ mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg); \
+ val = mfdcr(DCRN_ ## base ## _CONFIG_DATA); \
+ spin_unlock_irqrestore(dcr_ind_lock, flags); \
+ val;\
})
-#define mtdcri(base, reg, data)\
-do { \
- mtdcr(base ## _CFGADDR, base ## _ ## reg); \
- mtdcr(base ## _CFGDATA, data); \
+#define mtdcri(base, reg, data)\
+do { \
+ unsigned long flags;\
+ spin_lock_irqsave(dcr_ind_lock, flags);\
+ mtdcr(DCRN_ ## base ## _CONFIG_ADDR, reg); \
+ mtdcr(DCRN_ ## base ## _CONFIG_DATA, data); \
+ spin_unlock_irqrestore(dcr_ind_lock, flags); \
} while (0)
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_DCR_NATIVE_H */
-
-
Index: linux-merge/include/asm-powerpc/dcr-regs.h
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-merge/include/asm-powerpc/dcr-regs.h 2007-12-14 15:49:41.0
+1100
@@ -0,0 +1,71 @@
+/*
+ * Common DCR / SDR / CPR register definitions used on various IBM/AMCC
+ * 4xx processors
+ *
+ *Copyright 2007 Benjamin Herrenschmidt, IBM Corp
+ * [EMAIL PROTECTED]
+ *
+ * Mostly lifted from asm-ppc/ibm4xx.h by
+ *
+ *Copyright (c) 1999 Grant Erickson [EMAIL PROTECTED]
+ *
+ */
+
+#ifndef __DCR_REGS_H__
+#define __DCR_REGS_H__
+
+/*
+ * Most DCRs used for controlling devices such as the MAL, DMA engine,
+ * etc... are obtained for the device tree.
+ *
+ * The definitions in this files are fixed DCRs and indirect DCRs that
+ * are commonly used outside of specific drivers or refer to core
+ * common registers that may occasionally have to be tweaked outside
+ * of the driver main register set
+ */
+
+/* CPRs (440GX and 440SP/440SPe) */
+#define DCRN_CPR0_CONFIG_ADDR 0xc
+#define DCRN_CPR0_CONFIG_DATA 0xd
+
+/* SDRs (440GX and 440SP/440SPe) */
+#define DCRN_SDR0_CONFIG_ADDR 0xe
+#define DCRN_SDR0_CONFIG_DATA 0xf
+
+#define SDR0_PFC0 0x4100
+#define SDR0_PFC1 0x4101
+#define SDR0_PFC1_EPS 0x1c0
+#define SDR0_PFC1_EPS_SHIFT22
+#define SDR0_PFC1_RMII 0x0200
+#define SDR0_MFR 0x4300
+#define SDR0_MFR_TAH0 0x8000 /* TAHOE0 Enable */
+#define SDR0_MFR_TAH1 0x4000 /* TAHOE1 Enable */
+#define SDR0_MFR_PCM 0x1000 /* PPC440GP irq compat mode */
+#define SDR0_MFR_ECS 0x0800 /* EMAC int clk */
+#define SDR0_MFR_T0TXFL0x0008
+#define SDR0_MFR_T0TXFH0x0004
+#define SDR0_MFR_T1TXFL0x0002
+#define SDR0_MFR_T1TXFH0x0001
+#define SDR0_MFR_E0TXFL0x8000
+#define SDR0_MFR_E0TXFH0x4000
+#define SDR0_MFR_E0RXFL0x2000
+#define SDR0_MFR_E0RXFH0x1000
+#define SDR0_MFR_E1TXFL0x0800
+#define SDR0_MFR_E1TXFH0x0400
+#define SDR0_MFR_E1RXFL0x0200
+#define SDR0_MFR_E1RXFH
[PATCH 4/21] [POWERPC] 4xx PLB to PCI 2.x support
This adds to the previous patch the support for the 4xx PCI 2.x
bridges.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This version implement the basic support for the 405GP bridge,
I haven't yet looked at differences that other implementations
may have for the PCI 2.x part.
arch/powerpc/sysdev/ppc4xx_pci.c | 180 ++-
arch/powerpc/sysdev/ppc4xx_pci.h | 19
2 files changed, 198 insertions(+), 1 deletion(-)
--- linux-merge.orig/arch/powerpc/sysdev/ppc4xx_pci.c 2007-12-14
15:49:42.0 +1100
+++ linux-merge/arch/powerpc/sysdev/ppc4xx_pci.c2007-12-14
15:49:43.0 +1100
@@ -21,6 +21,36 @@ static int dma_offset_set;
/* Move that to a useable header */
extern unsigned long total_memory;
+static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev)
+{
+ struct pci_controller *hose;
+ int i;
+
+ if (dev-devfn != 0 || dev-bus-self != NULL)
+ return;
+
+ hose = pci_bus_to_host(dev-bus);
+ if (hose == NULL)
+ return;
+
+ if (!of_device_is_compatible(hose-dn, ibm,plb-pciex)
+ !of_device_is_compatible(hose-dn, ibm,plb-pcix)
+ !of_device_is_compatible(hose-dn, ibm,plb-pci))
+ return;
+
+ /* Hide the PCI host BARs from the kernel as their content doesn't
+* fit well in the resource management
+*/
+ for (i = 0; i DEVICE_COUNT_RESOURCE; i++) {
+ dev-resource[i].start = dev-resource[i].end = 0;
+ dev-resource[i].flags = 0;
+ }
+
+ printk(KERN_INFO PCI: Hiding 4xx host bridge resources %s\n,
+ pci_name(dev));
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, fixup_ppc4xx_pci_bridge);
+
static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose,
void __iomem *reg,
struct resource *res)
@@ -126,9 +156,157 @@ static int __init ppc4xx_parse_dma_range
/*
* 4xx PCI 2.x part
*/
+
+static void __init ppc4xx_configure_pci_PMMs(struct pci_controller *hose,
+void __iomem *reg)
+{
+ u32 la, ma, pcila, pciha;
+ int i, j;
+
+ /* Setup outbound memory windows */
+ for (i = j = 0; i 3; i++) {
+ struct resource *res = hose-mem_resources[i];
+
+ /* we only care about memory windows */
+ if (!(res-flags IORESOURCE_MEM))
+ continue;
+ if (j 2) {
+ printk(KERN_WARNING %s: Too many ranges\n,
+ hose-dn-full_name);
+ break;
+ }
+
+ /* Calculate register values */
+ la = res-start;
+#ifdef CONFIG_RESOURCES_64BIT
+ pciha = (res-start - hose-pci_mem_offset) 32;
+ pcila = (res-start - hose-pci_mem_offset) 0xu;
+#else
+ pciha = 0;
+ pcila = res-start - hose-pci_mem_offset;
+#endif
+
+ ma = res-end + 1 - res-start;
+ if (!is_power_of_2(ma) || ma 0x1000 || ma 0xu) {
+ printk(KERN_WARNING %s: Resource out of range\n,
+ hose-dn-full_name);
+ continue;
+ }
+ ma = (0xu ilog2(ma)) | 0x1;
+ if (res-flags IORESOURCE_PREFETCH)
+ ma |= 0x2;
+
+ /* Program register values */
+ writel(la, reg + PCIL0_PMM0LA + (0x10 * j));
+ writel(pcila, reg + PCIL0_PMM0PCILA + (0x10 * j));
+ writel(pciha, reg + PCIL0_PMM0PCIHA + (0x10 * j));
+ writel(ma, reg + PCIL0_PMM0MA + (0x10 * j));
+ j++;
+ }
+}
+
+static void __init ppc4xx_configure_pci_PTMs(struct pci_controller *hose,
+void __iomem *reg,
+const struct resource *res)
+{
+ resource_size_t size = res-end - res-start + 1;
+ u32 sa;
+
+ /* Calculate window size */
+ sa = (0xu ilog2(size)) | 1;
+ sa |= 0x1;
+
+ /* RAM is always at 0 local for now */
+ writel(0, reg + PCIL0_PTM1LA);
+ writel(sa, reg + PCIL0_PTM1MS);
+
+ /* Map on PCI side */
+ early_write_config_dword(hose, hose-first_busno, 0,
+PCI_BASE_ADDRESS_1, res-start);
+ early_write_config_dword(hose, hose-first_busno, 0,
+PCI_BASE_ADDRESS_2, 0x);
+ early_write_config_word(hose, hose-first_busno, 0,
+ PCI_COMMAND, 0x0006);
+}
+
static void __init ppc4xx_probe_pci_bridge(struct device_node *np)
{
/* NYI */
+ struct resource rsrc_cfg;
+ struct resource rsrc_reg;
+ struct resource dma_window;
+ struct pci_controller
[PATCH 5/21] [POWERPC] 4xx PLB to PCI Express support
This adds to the previous 2 patches the support for the 4xx PCI Express
cells as found in the 440SPe revA, revB and 405EX.
Unfortunately, due to significant differences between these, and other
interesting features of those pieces of HW, the code isn't as simple
as it is for PCI and PCI-X and some of the functions differ significantly
between the 3 implementations. Thus, not only this code can only support
those 3 implementations for now and will refuse to operate on any other,
but there are added ifdef's to avoid the bloat of building a fairly large
amount of code on platforms that don't need it.
Also, this code currently only supports fully initializing root complex
nodes, not endpoint. Some more code will have to be lifted from the
arch/ppc implementation to add the endpoint support, though it's mostly
differences in memory mapping, and the question on how to represent
endpoint mode PCI in the device-tree is thus open.
Many thanks to Stefan Roese for testing fixing up the 405EX bits !
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Signed-off-by: Stefan Roese [EMAIL PROTECTED]
---
arch/powerpc/Kconfig |1
arch/powerpc/sysdev/Kconfig |8
arch/powerpc/sysdev/ppc4xx_pci.c | 994 ++-
arch/powerpc/sysdev/ppc4xx_pci.h | 242 +
4 files changed, 1227 insertions(+), 18 deletions(-)
--- linux-merge.orig/arch/powerpc/sysdev/ppc4xx_pci.c 2007-12-14
15:49:43.0 +1100
+++ linux-merge/arch/powerpc/sysdev/ppc4xx_pci.c2007-12-14
15:49:43.0 +1100
@@ -3,16 +3,31 @@
*
* Copyright 2007 Ben. Herrenschmidt [EMAIL PROTECTED], IBM Corp.
*
+ * Most PCI Express code is coming from Stefan Roese implementation for
+ * arch/ppc in the Denx tree, slightly reworked by me.
+ *
+ * Copyright 2007 DENX Software Engineering, Stefan Roese [EMAIL PROTECTED]
+ *
+ * Some of that comes itself from a previous implementation for 440SPE only
+ * by Roland Dreier:
+ *
+ * Copyright (c) 2005 Cisco Systems. All rights reserved.
+ * Roland Dreier [EMAIL PROTECTED]
+ *
*/
#include linux/kernel.h
#include linux/pci.h
#include linux/init.h
#include linux/of.h
+#include linux/bootmem.h
+#include linux/delay.h
#include asm/io.h
#include asm/pci-bridge.h
#include asm/machdep.h
+#include asm/dcr.h
+#include asm/dcr-regs.h
#include ppc4xx_pci.h
@@ -21,6 +36,17 @@ static int dma_offset_set;
/* Move that to a useable header */
extern unsigned long total_memory;
+#define U64_TO_U32_LOW(val)((u32)((val) 0xULL))
+#define U64_TO_U32_HIGH(val) ((u32)((val) 32))
+
+#ifdef CONFIG_RESOURCES_64BIT
+#define RES_TO_U32_LOW(val)U64_TO_U32_LOW(val)
+#define RES_TO_U32_HIGH(val) U64_TO_U32_HIGH(val)
+#else
+#define RES_TO_U32_LOW(val)(val)
+#define RES_TO_U32_HIGH(val) (0)
+#endif
+
static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev)
{
struct pci_controller *hose;
@@ -178,13 +204,8 @@ static void __init ppc4xx_configure_pci_
/* Calculate register values */
la = res-start;
-#ifdef CONFIG_RESOURCES_64BIT
- pciha = (res-start - hose-pci_mem_offset) 32;
- pcila = (res-start - hose-pci_mem_offset) 0xu;
-#else
- pciha = 0;
- pcila = res-start - hose-pci_mem_offset;
-#endif
+ pciha = RES_TO_U32_HIGH(res-start - hose-pci_mem_offset);
+ pcila = RES_TO_U32_LOW(res-start - hose-pci_mem_offset);
ma = res-end + 1 - res-start;
if (!is_power_of_2(ma) || ma 0x1000 || ma 0xu) {
@@ -333,16 +354,10 @@ static void __init ppc4xx_configure_pcix
}
/* Calculate register values */
-#ifdef CONFIG_RESOURCES_64BIT
- lah = res-start 32;
- lal = res-start 0xu;
- pciah = (res-start - hose-pci_mem_offset) 32;
- pcial = (res-start - hose-pci_mem_offset) 0xu;
-#else
- lah = pciah = 0;
- lal = res-start;
- pcial = res-start - hose-pci_mem_offset;
-#endif
+ lah = RES_TO_U32_HIGH(res-start);
+ lal = RES_TO_U32_LOW(res-start);
+ pciah = RES_TO_U32_HIGH(res-start - hose-pci_mem_offset);
+ pcial = RES_TO_U32_LOW(res-start - hose-pci_mem_offset);
sa = res-end + 1 - res-start;
if (!is_power_of_2(sa) || sa 0x10 ||
sa 0xu) {
@@ -492,20 +507,963 @@ static void __init ppc4xx_probe_pcix_bri
iounmap(reg);
}
+#ifdef CONFIG_PPC4xx_PCI_EXPRESS
+
/*
* 4xx PCI-Express part
+ *
+ * We support 3 parts currently based on the compatible property:
+ *
+ * ibm,plb-pciex-440speA
+ * ibm,plb-pciex-440speB
+ * ibm,plb-pciex-405ex
+ *
+ * Anything else will be rejected for now as they are all subtly
+ * different unfortunately.
+ *
*/
+
+#define MAX_PCIE_BUS_MAPPED0x10
+
[PATCH 6/21] [POWERPC] PCI support for 4xx Ebony board
This wires up the 4xx PCI support device tree bits for
440GP based Ebony platform.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/ebony.dts| 41 -
arch/powerpc/platforms/44x/Kconfig |1
2 files changed, 37 insertions(+), 5 deletions(-)
--- linux-merge.orig/arch/powerpc/boot/dts/ebony.dts2007-12-21
14:10:34.0 +1100
+++ linux-merge/arch/powerpc/boot/dts/ebony.dts 2007-12-21 14:11:51.0
+1100
@@ -284,12 +284,43 @@
};
- PCIX0: [EMAIL PROTECTED] {
+ PCIX0: [EMAIL PROTECTED] {
device_type = pci;
- /* FIXME */
- reg = 2 0ec0 8
- 2 0ec8 f0
- 2 0ec80100 fc;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb440gp-pcix, ibm,plb-pcix;
+ primary;
+ reg = 2 0ec0 8 /* Config space access */
+ 0 0 0/* no IACK cycles */
+ 2 0ed0 4 /* Special cycles */
+ 2 0ec8 f0/* Internal registers */
+ 2 0ec80100 fc; /* Internal messaging registers
*/
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed
+*/
+ ranges = 0200 0 8000 0003 8000 0
8000
+ 0100 0 0002 0800 0
0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 4200 0 0 0 0 0 8000;
+
+ /* Ebony has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = f800 0 0 0;
+ interrupt-map =
+ /* IDSEL 1 */
+ 0800 0 0 0 UIC0 17 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 UIC0 18 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 UIC0 19 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 UIC0 1a 8
+ ;
};
};
Index: linux-merge/arch/powerpc/platforms/44x/Kconfig
===
--- linux-merge.orig/arch/powerpc/platforms/44x/Kconfig 2007-12-21
14:12:05.0 +1100
+++ linux-merge/arch/powerpc/platforms/44x/Kconfig 2007-12-21
14:12:09.0 +1100
@@ -11,6 +11,7 @@ config EBONY
depends on 44x
default y
select 440GP
+ select PCI
help
This option enables support for the IBM PPC440GP evaluation board.
___
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[PATCH 7/21] [POWERPC] Add early udbg support for 40x processors
This adds some basic real mode based early udbg support for 40x
in order to debug things more easily
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/Kconfig.debug | 13 +++
arch/powerpc/kernel/misc_32.S | 39 +
arch/powerpc/kernel/udbg.c |3 ++
arch/powerpc/kernel/udbg_16550.c | 33 +++
arch/powerpc/platforms/Kconfig.cputype |1
include/asm-powerpc/udbg.h |1
6 files changed, 90 insertions(+)
--- linux-merge.orig/arch/powerpc/Kconfig.debug 2007-12-14 15:48:56.0
+1100
+++ linux-merge/arch/powerpc/Kconfig.debug 2007-12-14 15:49:44.0
+1100
@@ -227,6 +227,14 @@ config PPC_EARLY_DEBUG_44x
Select this to enable early debugging for IBM 44x chips via the
inbuilt serial port.
+config PPC_EARLY_DEBUG_40x
+ bool Early serial debugging for IBM/AMCC 40x CPUs
+ depends on 40x
+ help
+ Select this to enable early debugging for IBM 40x chips via the
+ inbuilt serial port. This works on chips with a 16550 compatible
+ UART. Xilinx chips with uartlite cannot use this option.
+
config PPC_EARLY_DEBUG_CPM
bool Early serial debugging for Freescale CPM-based serial ports
depends on SERIAL_CPM
@@ -248,6 +256,11 @@ config PPC_EARLY_DEBUG_44x_PHYSHIGH
depends on PPC_EARLY_DEBUG_44x
default 0x1
+config PPC_EARLY_DEBUG_40x_PHYSADDR
+ hex Early debug UART physical address
+ depends on PPC_EARLY_DEBUG_40x
+ default 0xef600300
+
config PPC_EARLY_DEBUG_CPM_ADDR
hex CPM UART early debug transmit descriptor address
depends on PPC_EARLY_DEBUG_CPM
Index: linux-merge/arch/powerpc/kernel/misc_32.S
===
--- linux-merge.orig/arch/powerpc/kernel/misc_32.S 2007-12-14
15:48:56.0 +1100
+++ linux-merge/arch/powerpc/kernel/misc_32.S 2007-12-14 15:49:44.0
+1100
@@ -206,6 +206,45 @@ _GLOBAL(_nmask_and_or_msr)
isync
blr /* Done */
+#ifdef CONFIG_40x
+
+/*
+ * Do an IO access in real mode
+ */
+_GLOBAL(real_readb)
+ mfmsr r7
+ ori r0,r7,MSR_DR
+ xorir0,r0,MSR_DR
+ sync
+ mtmsr r0
+ sync
+ isync
+ lbz r3,0(r3)
+ sync
+ mtmsr r7
+ sync
+ isync
+ blr
+
+ /*
+ * Do an IO access in real mode
+ */
+_GLOBAL(real_writeb)
+ mfmsr r7
+ ori r0,r7,MSR_DR
+ xorir0,r0,MSR_DR
+ sync
+ mtmsr r0
+ sync
+ isync
+ stb r3,0(r4)
+ sync
+ mtmsr r7
+ sync
+ isync
+ blr
+
+#endif /* CONFIG_40x */
/*
* Flush MMU TLB
Index: linux-merge/arch/powerpc/kernel/udbg.c
===
--- linux-merge.orig/arch/powerpc/kernel/udbg.c 2007-12-14 15:48:56.0
+1100
+++ linux-merge/arch/powerpc/kernel/udbg.c 2007-12-14 15:49:44.0
+1100
@@ -54,6 +54,9 @@ void __init udbg_early_init(void)
#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
/* PPC44x debug */
udbg_init_44x_as1();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_40x)
+ /* PPC40x debug */
+ udbg_init_40x_realmode();
#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
udbg_init_cpm();
#endif
Index: linux-merge/arch/powerpc/kernel/udbg_16550.c
===
--- linux-merge.orig/arch/powerpc/kernel/udbg_16550.c 2007-12-14
15:48:56.0 +1100
+++ linux-merge/arch/powerpc/kernel/udbg_16550.c2007-12-14
15:49:44.0 +1100
@@ -225,3 +225,36 @@ void __init udbg_init_44x_as1(void)
udbg_getc = udbg_44x_as1_getc;
}
#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_40x
+static void udbg_40x_real_putc(char c)
+{
+ if (udbg_comport) {
+ while ((real_readb(udbg_comport-lsr) LSR_THRE) == 0)
+ /* wait for idle */;
+ real_writeb(c, udbg_comport-thr); eieio();
+ if (c == '\n')
+ udbg_40x_real_putc('\r');
+ }
+}
+
+static int udbg_40x_real_getc(void)
+{
+ if (udbg_comport) {
+ while ((real_readb(udbg_comport-lsr) LSR_DR) == 0)
+ ; /* wait for char */
+ return real_readb(udbg_comport-rbr);
+ }
+ return -1;
+}
+
+void __init udbg_init_40x_realmode(void)
+{
+ udbg_comport = (struct NS16550 __iomem *)
+ CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
+
+ udbg_putc = udbg_40x_real_putc;
+ udbg_getc = udbg_40x_real_getc;
+ udbg_getc_poll = NULL;
+}
+#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
Index: linux-merge/include/asm-powerpc/udbg.h
===
---
[PATCH 8/21] [POWERPC] EP405 boards support for arch/powerpc
Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD
comes from a device-tree property, PCI is working to the point where
I can see the video card, USB device, and south bridge.
This should work with both EP405 and EP405PC.
I've not totally figured out how IRQs are wired on this hardware
though, thus at this stage, expect only USB interrupts working,
pretty much the same as what arch/ppc did.
Also, the flash, nvram, rtc and temp control still have to be wired.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
Note about IRQ routing: The doc is very obscure in that area.
I _think_ the SB interrupt on the CPLD is actually the Windond's
8259 output and the NB interrupt is the PCI_A...PCI_D mux in
there (which can be implemented as a cascaded controller) but
I haven't sorted that out yet. If anybody from Embedded Planet
is around, I could use some advice there.
If my deductions are correct, then we would need to wire up the
8259 driver to SB, which should be trivial provided I stick the
windbond bridge in the device-tree, or at least part of it,
and probably implement a cascaded controller for the PCI IRQ
A...D mux thingy, which should also be trivial.
Note also that it tends to lockup during the transition from
the boot wrapper to the kernel, before udbg is started. I didn't
have a RiscWatch at hand so I haven't yet been able to track that
down. It's random though, quite weird. Maybe some stale TLB entries
or cache content that isn't cleared properly...
arch/powerpc/boot/4xx.c | 55 +-
arch/powerpc/boot/4xx.h |1
arch/powerpc/boot/Makefile |3
arch/powerpc/boot/dts/ep405.dts | 221
arch/powerpc/boot/ep405.c| 74 ++
arch/powerpc/boot/treeboot-walnut.c | 49 -
arch/powerpc/boot/wrapper|2
arch/powerpc/configs/ep405_defconfig | 951 +++
arch/powerpc/platforms/40x/Kconfig | 22
arch/powerpc/platforms/40x/Makefile |1
arch/powerpc/platforms/40x/ep405.c | 124
11 files changed, 1437 insertions(+), 66 deletions(-)
--- linux-merge.orig/arch/powerpc/boot/Makefile 2007-12-21 14:19:24.0
+1100
+++ linux-merge/arch/powerpc/boot/Makefile 2007-12-21 14:19:46.0
+1100
@@ -58,7 +58,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c
\
- fixed-head.S ep88xc.c cuboot-hpc2.c
+ fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -189,6 +189,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
ifneq ($(CONFIG_DEVICE_TREE),)
image-$(CONFIG_PPC_8xx)+= cuImage.8xx
image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
+image-$(CONFIG_EP405) += zImage.ep405
image-$(CONFIG_8260) += cuImage.pq2
image-$(CONFIG_PPC_MPC52xx)+= cuImage.52xx
image-$(CONFIG_PPC_83xx) += cuImage.83xx
Index: linux-merge/arch/powerpc/boot/ep405.c
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-merge/arch/powerpc/boot/ep405.c 2007-12-21 14:19:46.0
+1100
@@ -0,0 +1,74 @@
+/*
+ * Embedded Planet EP405 with PlanetCore firmware
+ *
+ * (c) Benjamin Herrenschmidt [EMAIL PROTECTED], IBM Corp,\
+ *
+ * Based on ep88xc.c by
+ *
+ * Scott Wood [EMAIL PROTECTED]
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include ops.h
+#include stdio.h
+#include planetcore.h
+#include dcr.h
+#include 4xx.h
+#include io.h
+
+static char *table;
+static u64 mem_size;
+
+static void platform_fixups(void)
+{
+ u64 val;
+ void *nvrtc;
+
+ dt_fixup_memory(0, mem_size);
+ planetcore_set_mac_addrs(table);
+
+ if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, val)) {
+ printf(No PlanetCore crystal frequency key.\r\n);
+ return;
+ }
+ ibm405gp_fixup_clocks(val, 0xa8c000);
+ ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
+ ibm4xx_fixup_ebc_ranges(/plb/ebc);
+
+ if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, val)) {
+ printf(No PlanetCore NVRAM size key.\r\n);
+ return;
+ }
+ nvrtc = finddevice(/plb/ebc/[EMAIL PROTECTED],20);
+ if (nvrtc != NULL) {
+ u32 reg[3] = { 4, 0x20, 0};
+ getprop(nvrtc, reg, reg, 3);
+ reg[2] = (val 10) 0x;
+
[PATCH 9/21] [POWERPC] Add PCI to Walnut platform
This wires up the 4xx PCI support device-tree bits for the
405GP based Walnut platform.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
This one is untested, haven't had time to dig my walnut and put it
back into working condition. Josh, can you verify that IRQs are
working (routing is correct ?) Thanks !
arch/powerpc/boot/dts/walnut.dts | 39 +
arch/powerpc/platforms/40x/Kconfig |1
2 files changed, 40 insertions(+)
--- linux-merge.orig/arch/powerpc/boot/dts/walnut.dts 2007-12-21
14:10:33.0 +1100
+++ linux-merge/arch/powerpc/boot/dts/walnut.dts2007-12-21
14:12:36.0 +1100
@@ -190,6 +190,45 @@
virtual-reg = f035;
};
};
+
+ PCI0: [EMAIL PROTECTED] {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb405gp-pci, ibm,plb-pci;
+ primary;
+ reg = eec0 8 /* Config space access */
+ eed8 4 /* IACK */
+ eed8 4 /* Special cycle */
+ ef48 40;/* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed. Chip supports a second
+* IO range but we don't use it for now
+*/
+ ranges = 0200 0 8000 8000 0 2000
+ 0100 0 e800 0 0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 4200 0 0 0 0 8000;
+
+ /* Walnut has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = f800 0 0 0;
+ interrupt-map =
+ /* IDSEL 1 */
+ 0800 0 0 0 UIC0 1c 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 UIC0 1d 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 UIC0 1e 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 UIC0 1f 8
+ ;
+ };
};
chosen {
Index: linux-merge/arch/powerpc/platforms/40x/Kconfig
===
--- linux-merge.orig/arch/powerpc/platforms/40x/Kconfig 2007-12-21
14:12:52.0 +1100
+++ linux-merge/arch/powerpc/platforms/40x/Kconfig 2007-12-21
14:12:55.0 +1100
@@ -59,6 +59,7 @@ config WALNUT
depends on 40x
default y
select 405GP
+ select PCI
help
This option enables support for the IBM PPC405GP evaluation board.
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[PATCH 10/21] [POWERPC] Base support for 440GX Taishan eval board
From: Hugh Blemings [EMAIL PROTECTED] This patch adds base support for the AMCC Taishan 440GX evaluation board. Signed-off-by: Hugh Blemings [EMAIL PROTECTED] Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] --- arch/powerpc/Kconfig.debug |6 arch/powerpc/boot/Makefile |5 arch/powerpc/boot/cuboot-taishan.c | 56 ++ arch/powerpc/boot/dts/taishan.dts | 375 +++ arch/powerpc/configs/taishan_defconfig | 787 + arch/powerpc/platforms/44x/Kconfig | 14 arch/powerpc/platforms/44x/Makefile|1 arch/powerpc/platforms/44x/taishan.c | 74 +++ 8 files changed, 1316 insertions(+), 2 deletions(-) --- linux-merge.orig/arch/powerpc/boot/Makefile 2007-12-21 14:20:00.0 +1100 +++ linux-merge/arch/powerpc/boot/Makefile 2007-12-21 14:20:04.0 +1100 @@ -37,8 +37,10 @@ BOOTCFLAGS += -I$(obj) -I$(srctree)/$(ob $(obj)/4xx.o: BOOTCFLAGS += -mcpu=440 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=440 +$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 + zlib := inffast.c inflate.c inftrees.c zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h zliblinuxheader := zlib.h zconf.h zutil.h @@ -58,7 +60,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ - fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c + fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(addprefix $(obj)/, $(src-boot)) @@ -199,6 +201,7 @@ image-$(CONFIG_EBONY) += treeImage.ebo image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo image-$(CONFIG_SEQUOIA)+= cuImage.sequoia image-$(CONFIG_WALNUT) += treeImage.walnut +image-$(CONFIG_TAISHAN)+= cuImage.taishan endif # For 32-bit powermacs, build the COFF and miboot images Index: linux-merge/arch/powerpc/Kconfig.debug === --- linux-merge.orig/arch/powerpc/Kconfig.debug 2007-12-21 14:20:00.0 +1100 +++ linux-merge/arch/powerpc/Kconfig.debug 2007-12-21 14:20:04.0 +1100 @@ -225,7 +225,8 @@ config PPC_EARLY_DEBUG_44x depends on 44x help Select this to enable early debugging for IBM 44x chips via the - inbuilt serial port. + inbuilt serial port. If you enable this, ensure you set + PPC_EARLY_DEBUG_44x_PHYSLOW below to suit your target board. config PPC_EARLY_DEBUG_40x bool Early serial debugging for IBM/AMCC 40x CPUs @@ -250,6 +251,9 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW hex Low 32 bits of early debug UART physical address depends on PPC_EARLY_DEBUG_44x default 0x4200 + help + You probably want 0x4200 for ebony boards and + 0x4300 for taishan config PPC_EARLY_DEBUG_44x_PHYSHIGH hex EPRN of early debug UART physical address Index: linux-merge/arch/powerpc/platforms/44x/Kconfig === --- linux-merge.orig/arch/powerpc/platforms/44x/Kconfig 2007-12-21 14:20:00.0 +1100 +++ linux-merge/arch/powerpc/platforms/44x/Kconfig 2007-12-21 14:20:04.0 +1100 @@ -23,6 +23,16 @@ config SEQUOIA help This option enables support for the AMCC PPC440EPX evaluation board. +config TAISHAN + bool Taishan + depends on 44x + default n + select 440GX + select PCI + help + This option enables support for the AMCC PPC440GX Taishan + evaluation board. + #config LUAN # bool Luan # depends on 44x @@ -59,6 +69,10 @@ config 440GP config 440GX bool +select IBM_NEW_EMAC_EMAC4 + select IBM_NEW_EMAC_RGMII +select IBM_NEW_EMAC_ZMII #test only +select IBM_NEW_EMAC_TAH #test only config 440SP bool Index: linux-merge/arch/powerpc/platforms/44x/Makefile === --- linux-merge.orig/arch/powerpc/platforms/44x/Makefile2007-12-21 14:20:00.0 +1100 +++ linux-merge/arch/powerpc/platforms/44x/Makefile 2007-12-21 14:20:04.0 +1100 @@ -1,4 +1,5 @@ obj-$(CONFIG_44x) := misc_44x.o obj-$(CONFIG_EBONY)+= ebony.o +obj-$(CONFIG_TAISHAN) += taishan.o obj-$(CONFIG_BAMBOO) += bamboo.o obj-$(CONFIG_SEQUOIA) += sequoia.o Index: linux-merge/arch/powerpc/platforms/44x/taishan.c === --- /dev/null 1970-01-01 00:00:00.0 + +++
[PATCH 11/21] [POWERPC] Wire up PCI on Bamboo board
This adds the device-tree bits call to ppc4xx_pci_find_bridges()
to make PCI work on the Bamboo board
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/bamboo.dts | 40 -
arch/powerpc/platforms/44x/Kconfig |1
2 files changed, 40 insertions(+), 1 deletion(-)
--- linux-merge.orig/arch/powerpc/boot/dts/bamboo.dts 2007-12-21
14:10:33.0 +1100
+++ linux-merge/arch/powerpc/boot/dts/bamboo.dts2007-12-21
14:13:20.0 +1100
@@ -239,10 +239,48 @@
zmii-channel = 1;
};
};
+
+ PCI0: [EMAIL PROTECTED] {
+ device_type = pci;
+ #interrupt-cells = 1;
+ #size-cells = 2;
+ #address-cells = 3;
+ compatible = ibm,plb440ep-pci, ibm,plb-pci;
+ primary;
+ reg = 0 eec0 8 /* Config space access */
+ 0 eed0 4 /* IACK */
+ 0 eed0 4 /* Special cycle */
+ 0 ef40 40; /* Internal registers */
+
+ /* Outbound ranges, one memory and one IO,
+* later cannot be changed. Chip supports a second
+* IO range but we don't use it for now
+*/
+ ranges = 0200 0 a000 0 a000 0 2000
+ 0100 0 0 e800 0 0001;
+
+ /* Inbound 2GB range starting at 0 */
+ dma-ranges = 4200 0 0 0 0 0 8000;
+
+ /* Bamboo has all 4 IRQ pins tied together per slot */
+ interrupt-map-mask = f800 0 0 0;
+ interrupt-map =
+ /* IDSEL 1 */
+ 0800 0 0 0 UIC0 1c 8
+
+ /* IDSEL 2 */
+ 1000 0 0 0 UIC0 1b 8
+
+ /* IDSEL 3 */
+ 1800 0 0 0 UIC0 1a 8
+
+ /* IDSEL 4 */
+ 2000 0 0 0 UIC0 19 8
+ ;
+ };
};
chosen {
linux,stdout-path = /plb/opb/[EMAIL PROTECTED];
- bootargs = console=ttyS0,115200;
};
};
Index: linux-merge/arch/powerpc/platforms/44x/Kconfig
===
--- linux-merge.orig/arch/powerpc/platforms/44x/Kconfig 2007-12-21
14:13:33.0 +1100
+++ linux-merge/arch/powerpc/platforms/44x/Kconfig 2007-12-21
14:13:38.0 +1100
@@ -3,6 +3,7 @@ config BAMBOO
depends on 44x
default n
select 440EP
+ select PCI
help
This option enables support for the IBM PPC440EP evaluation board.
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[PATCH 12/21] [POWERPC] Wire up 440EP USB controlle support to Bamboo board
This adds the definition of the on-chip OHCI controller to the
Bamboo board's device-tree. This is enough to get it probed and
working, though a separate patch fixing a bug in the OHCI driver
is needed to make it reliable.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/bamboo.dts |7 +++
1 file changed, 7 insertions(+)
--- linux-merge.orig/arch/powerpc/boot/dts/bamboo.dts 2007-12-14
15:49:47.0 +1100
+++ linux-merge/arch/powerpc/boot/dts/bamboo.dts2007-12-14
15:49:48.0 +1100
@@ -238,6 +238,13 @@
zmii-device = ZMII0;
zmii-channel = 1;
};
+
+ [EMAIL PROTECTED] {
+ compatible = ohci-be;
+ reg = ef601000 80;
+ interrupts = 8 1 9 1;
+ interrupt-parent = UIC1 ;
+ };
};
PCI0: [EMAIL PROTECTED] {
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[PATCH 13/21] [POWERPC] Adds decoding of 440SPE memory size to boot wrapper library
This adds a function to the bootwrapper 4xx library to decode memory
size on 440SPE processors.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/4xx.c | 85 +---
arch/powerpc/boot/4xx.h |3 -
arch/powerpc/boot/bamboo.c |2
arch/powerpc/boot/cuboot-taishan.c |2
arch/powerpc/boot/dcr.h | 10 +++-
arch/powerpc/boot/ebony.c |2
arch/powerpc/boot/treeboot-walnut.c |2
7 files changed, 85 insertions(+), 21 deletions(-)
--- linux-merge.orig/arch/powerpc/boot/4xx.c2007-12-21 14:19:46.0
+1100
+++ linux-merge/arch/powerpc/boot/4xx.c 2007-12-21 14:21:16.0 +1100
@@ -22,16 +22,14 @@
#include dcr.h
/* Read the 4xx SDRAM controller to get size of system memory. */
-void ibm4xx_fixup_memsize(void)
+void ibm4xx_sdram_fixup_memsize(void)
{
int i;
unsigned long memsize, bank_config;
memsize = 0;
for (i = 0; i ARRAY_SIZE(sdram_bxcr); i++) {
- mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
- bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
-
+ bank_config = SDRAM0_READ(sdram_bxcr[i]);
if (bank_config SDRAM_CONFIG_BANK_ENABLE)
memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
}
@@ -39,6 +37,69 @@ void ibm4xx_fixup_memsize(void)
dt_fixup_memory(0, memsize);
}
+/* Read the 440SPe MQ controller to get size of system memory. */
+#define DCRN_MQ0_B0BAS 0x40
+#define DCRN_MQ0_B1BAS 0x41
+#define DCRN_MQ0_B2BAS 0x42
+#define DCRN_MQ0_B3BAS 0x43
+
+static u64 ibm440spe_decode_bas(u32 bas)
+{
+ u64 base = ((u64)(bas 0xFFE0u)) 2;
+
+ /* open coded because I'm paranoid about invalid values */
+ switch ((bas 4) 0xFFF) {
+ case 0:
+ return 0;
+ case 0xffc:
+ return base + 0x00080ull;
+ case 0xff8:
+ return base + 0x00100ull;
+ case 0xff0:
+ return base + 0x00200ull;
+ case 0xfe0:
+ return base + 0x00400ull;
+ case 0xfc0:
+ return base + 0x00800ull;
+ case 0xf80:
+ return base + 0x01000ull;
+ case 0xf00:
+ return base + 0x02000ull;
+ case 0xe00:
+ return base + 0x04000ull;
+ case 0xc00:
+ return base + 0x08000ull;
+ case 0x800:
+ return base + 0x1ull;
+ }
+ printf(Memory BAS value 0x%08x unsupported !\n, bas);
+ return 0;
+}
+
+void ibm440spe_fixup_memsize(void)
+{
+ u64 banktop, memsize = 0;
+
+ /* Ultimately, we should directly construct the memory node
+* so we are able to handle holes in the memory address space
+*/
+ banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B0BAS));
+ if (banktop memsize)
+ memsize = banktop;
+ banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B1BAS));
+ if (banktop memsize)
+ memsize = banktop;
+ banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B2BAS));
+ if (banktop memsize)
+ memsize = banktop;
+ banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B3BAS));
+ if (banktop memsize)
+ memsize = banktop;
+
+ dt_fixup_memory(0, memsize);
+}
+
+
/* 4xx DDR1/2 Denali memory controller support */
/* DDR0 registers */
#define DDR0_022
@@ -77,19 +138,13 @@ void ibm4xx_fixup_memsize(void)
#define DDR_GET_VAL(val, mask, shift) (((val) (shift)) (mask))
-static inline u32 mfdcr_sdram0(u32 reg)
-{
-mtdcr(DCRN_SDRAM0_CFGADDR, reg);
-return mfdcr(DCRN_SDRAM0_CFGDATA);
-}
-
void ibm4xx_denali_fixup_memsize(void)
{
u32 val, max_cs, max_col, max_row;
u32 cs, col, row, bank, dpath;
unsigned long memsize;
- val = mfdcr_sdram0(DDR0_02);
+ val = SDRAM0_READ(DDR0_02);
if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
fatal(DDR controller is not initialized\n);
@@ -99,7 +154,7 @@ void ibm4xx_denali_fixup_memsize(void)
max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
/* get CS value */
- val = mfdcr_sdram0(DDR0_10);
+ val = SDRAM0_READ(DDR0_10);
val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
cs = 0;
@@ -115,7 +170,7 @@ void ibm4xx_denali_fixup_memsize(void)
fatal(DDR wrong CS configuration\n);
/* get data path bytes */
- val = mfdcr_sdram0(DDR0_14);
+ val = SDRAM0_READ(DDR0_14);
if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
dpath = 8; /* 64 bits */
@@ -123,7 +178,7 @@ void ibm4xx_denali_fixup_memsize(void)
dpath = 4; /* 32 bits */
/* get address pins (rows) */
- val = mfdcr_sdram0(DDR0_42);
+
[PATCH 14/21] [POWERPC] Add mfspr/mtspr inline macros to 4xx bootwrapper
The 4xx bootwrapper occasionally needs to access SPR registers,
this adds mfspr/mtspr wrappers to it.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
===
arch/powerpc/boot/reg.h |8
1 file changed, 8 insertions(+)
--- linux-merge.orig/arch/powerpc/boot/reg.h2007-12-14 15:48:54.0
+1100
+++ linux-merge/arch/powerpc/boot/reg.h 2007-12-14 15:49:49.0 +1100
@@ -16,6 +16,14 @@ static inline u32 mfpvr(void)
return pvr;
}
+#define __stringify_1(x) #x
+#define __stringify(x) __stringify_1(x)
+
+#define mfspr(rn) ({unsigned long rval; \
+ asm volatile(mfspr %0, __stringify(rn) \
+ : =r (rval)); rval; })
+#define mtspr(rn, v) asm volatile(mtspr __stringify(rn) ,%0 : : r (v))
+
register void *__stack_pointer asm(r1);
#define get_sp() (__stack_pointer)
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[PATCH 15/21] [POWERPC] Adds 44x CPR0 accessors to boot wrapper
This adds macros to the boot wrapper to access the CPR
registers from the boot wrappers.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/dcr.h | 27 +++
1 file changed, 27 insertions(+)
--- linux-merge.orig/arch/powerpc/boot/dcr.h2007-12-14 15:49:48.0
+1100
+++ linux-merge/arch/powerpc/boot/dcr.h 2007-12-14 15:49:49.0 +1100
@@ -147,4 +147,31 @@ static const unsigned long sdram_bxcr[]
#define DCRN_405_CPC0_CR0 0xb1
#define DCRN_405_CPC0_CR1 0xb2
+
+/* 440GX Clock control etc */
+
+
+#define DCRN_CPR0_CLKUPD 0x020
+#define DCRN_CPR0_PLLC 0x040
+#define DCRN_CPR0_PLLD 0x060
+#define DCRN_CPR0_PRIMAD 0x080
+#define DCRN_CPR0_PRIMBD 0x0a0
+#define DCRN_CPR0_OPBD 0x0c0
+#define DCRN_CPR0_PERD 0x0e0
+#define DCRN_CPR0_MALD 0x100
+
+/* CPRs read/write helper macros - based off include/asm-ppc/ibm44x.h */
+
+#define DCRN_CPR0_CFGADDR 0xc
+#define DCRN_CPR0_CFGDATA 0xd
+
+#define CPR0_READ(offset) ({\
+ mtdcr(DCRN_CPR0_CFGADDR, offset); \
+ mfdcr(DCRN_CPR0_CFGDATA); })
+#define CPR0_WRITE(offset, data) ({\
+ mtdcr(DCRN_CPR0_CFGADDR, offset); \
+ mtdcr(DCRN_CPR0_CFGDATA, data); })
+
+
+
#endif /* _PPC_BOOT_DCR_H_ */
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[PATCH 16/21] [POWERPC] Rework 4xx clock probing in boot wrapper
This reworks the boot wrapper library function that probes
the chip clocks. Better separate the base function that is
used on 440GX,SPe,EP,... from the uart fixups as those need
different device-tree path on different processors.
Also, rework the function itself based on the arch/ppc code
from Eugene Surovegin which I find more readable, and which
handles one more bypass case. Also handle the subtle difference
between 440EP/EPx and 440SPe/GX, on the former, PerClk is derived
from the PLB clock while on the later, it's derived from the OPB.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/boot/4xx.c| 272 +++--
arch/powerpc/boot/4xx.h| 11 +
arch/powerpc/boot/bamboo.c |2
arch/powerpc/boot/cuboot-sequoia.c |2
arch/powerpc/boot/cuboot-taishan.c |4
arch/powerpc/boot/dcr.h| 17 ++
arch/powerpc/boot/ebony.c | 60
7 files changed, 233 insertions(+), 135 deletions(-)
--- linux-merge.orig/arch/powerpc/boot/4xx.c2007-12-14 15:49:48.0
+1100
+++ linux-merge/arch/powerpc/boot/4xx.c 2007-12-14 15:49:50.0 +1100
@@ -275,89 +275,225 @@ void ibm4xx_fixup_ebc_ranges(const char
setprop(devp, ranges, ranges, (p - ranges) * sizeof(u32));
}
-#define SPRN_CCR1 0x378
-void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
+/* Calculate 440GP clocks */
+void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
{
- u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
- u32 reg;
- u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
-
- mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
- reg = mfdcr(DCRN_CPR0_DATA);
- tmp = (reg 0x000F) 16;
- fwdva = tmp ? tmp : 16;
- tmp = (reg 0x0700) 8;
- fwdvb = tmp ? tmp : 8;
- tmp = (reg 0x1F00) 24;
- fbdv = tmp ? tmp : 32;
- lfbdv = (reg 0x007F);
-
- mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
- reg = mfdcr(DCRN_CPR0_DATA);
- tmp = (reg 0x0300) 24;
- opbdv0 = tmp ? tmp : 4;
-
- mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
- reg = mfdcr(DCRN_CPR0_DATA);
- tmp = (reg 0x0700) 24;
- perdv0 = tmp ? tmp : 8;
-
- mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
- reg = mfdcr(DCRN_CPR0_DATA);
- tmp = (reg 0x0700) 24;
- prbdv0 = tmp ? tmp : 8;
-
- mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
- reg = mfdcr(DCRN_CPR0_DATA);
- tmp = (reg 0x0300) 24;
- spcid0 = tmp ? tmp : 4;
-
- /* Calculate M */
- mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
- reg = mfdcr(DCRN_CPR0_DATA);
- tmp = (reg 0x0300) 24;
- if (tmp == 0) { /* PLL output */
- tmp = (reg 0x2000) 29;
- if (!tmp) /* PLLOUTA */
- m = fbdv * lfbdv * fwdva;
+ u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
+ u32 cr0 = mfdcr(DCRN_CPC0_CR0);
+ u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
+ u32 opdv = CPC0_SYS0_OPDV(sys0);
+ u32 epdv = CPC0_SYS0_EPDV(sys0);
+
+ if (sys0 CPC0_SYS0_BYPASS) {
+ /* Bypass system PLL */
+ cpu = plb = sys_clk;
+ } else {
+ if (sys0 CPC0_SYS0_EXTSL)
+ /* PerClk */
+ m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
else
- m = fbdv * lfbdv * fwdvb;
+ /* CPU clock */
+ m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
+ cpu = sys_clk * m / CPC0_SYS0_FWDVA(sys0);
+ plb = sys_clk * m / CPC0_SYS0_FWDVB(sys0);
}
- else if (tmp == 1) /* CPU output */
- m = fbdv * fwdva;
+
+ opb = plb / opdv;
+ ebc = opb / epdv;
+
+ /* FIXME: Check if this is for all 440GP, or just Ebony */
+ if ((mfpvr() 0xffff) == 0x4440)
+ /* Rev. B 440GP, use external system clock */
+ tb = sys_clk;
else
- m = perdv0 * opbdv0 * fwdvb;
+ /* Rev. C 440GP, errata force us to use internal clock */
+ tb = cpu;
- vco = (m * sysclk) + (m 1);
- cpu = vco / fwdva;
- plb = vco / fwdvb / prbdv0;
- opb = plb / opbdv0;
- ebc = plb / perdv0;
+ if (cr0 CPC0_CR0_U0EC)
+ /* External UART clock */
+ uart0 = ser_clk;
+ else
+ /* Internal UART clock */
+ uart0 = plb / CPC0_CR0_UDIV(cr0);
- /* FIXME */
- uart0 = ser_clk;
+ if (cr0 CPC0_CR0_U1EC)
+ /* External UART clock */
+ uart1 = ser_clk;
+ else
+ /* Internal UART clock */
+ uart1 = plb / CPC0_CR0_UDIV(cr0);
+
+ printf(PPC440GP: SysClk = %dMHz (%x)\n\r,
+ (sys_clk + 50) / 100, sys_clk);
+
+ dt_fixup_cpu_clocks(cpu, tb, 0);
[PATCH 17/21] [POWERPC] Base support for 440SPe Katmai eval board
This adds base support for the Katmai board, including PCI-X and
PCI-Express (but no RTC, nvram, etc... yet).
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
Acked-by: Stefan Roese [EMAIL PROTECTED]
---
As for Taishan, the bootwrapper code can be simplified. In fact,
we probably don't need to probe clocks memsize off the chip and
just trust what uboot tells us.
arch/powerpc/boot/Makefile|5
arch/powerpc/boot/cuboot-katmai.c | 56 ++
arch/powerpc/boot/dts/katmai.dts | 392
arch/powerpc/configs/katmai_defconfig | 789 ++
arch/powerpc/platforms/44x/Kconfig| 14
arch/powerpc/platforms/44x/Makefile |3
arch/powerpc/platforms/44x/katmai.c | 63 ++
7 files changed, 1320 insertions(+), 2 deletions(-)
--- linux-merge.orig/arch/powerpc/platforms/44x/Kconfig 2007-12-21
14:20:11.0 +1100
+++ linux-merge/arch/powerpc/platforms/44x/Kconfig 2007-12-21
14:21:23.0 +1100
@@ -34,6 +34,16 @@ config TAISHAN
This option enables support for the AMCC PPC440GX Taishan
evaluation board.
+config KATMAI
+ bool Katmai
+ depends on 44x
+ default n
+ select 440SPe
+ select PCI
+ select PPC4xx_PCI_EXPRESS
+ help
+ This option enables support for the AMCC PPC440SPe evaluation board.
+
#config LUAN
# bool Luan
# depends on 44x
@@ -78,6 +88,10 @@ config 440GX
config 440SP
bool
+config 440SPe
+select IBM_NEW_EMAC_EMAC4
+ bool
+
# 44x errata/workaround config symbols, selected by the CPU models above
config IBM440EP_ERR42
bool
Index: linux-merge/arch/powerpc/platforms/44x/Makefile
===
--- linux-merge.orig/arch/powerpc/platforms/44x/Makefile2007-12-21
14:20:04.0 +1100
+++ linux-merge/arch/powerpc/platforms/44x/Makefile 2007-12-21
14:21:23.0 +1100
@@ -1,5 +1,6 @@
obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY)+= ebony.o
obj-$(CONFIG_TAISHAN) += taishan.o
-obj-$(CONFIG_BAMBOO) += bamboo.o
+obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_SEQUOIA) += sequoia.o
+obj-$(CONFIG_KATMAI) += katmai.o
Index: linux-merge/arch/powerpc/boot/dts/katmai.dts
===
--- /dev/null 1970-01-01 00:00:00.0 +
+++ linux-merge/arch/powerpc/boot/dts/katmai.dts2007-12-21
14:34:45.0 +1100
@@ -0,0 +1,392 @@
+/*
+ * Device Tree Source for AMCC Katmai eval board
+ *
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Benjamin Herrenschmidt [EMAIL PROTECTED]
+ *
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Josh Boyer [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = 2;
+ #size-cells = 1;
+ model = amcc,katmai;
+ compatible = amcc,katmai;
+ dcr-parent = /cpus/PowerPC,[EMAIL PROTECTED];
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ clock-frequency = 0; /* Filled in by zImage */
+ timebase-frequency = 0; /* Filled in by zImage */
+ i-cache-line-size = 20;
+ d-cache-line-size = 20;
+ i-cache-size = 2;
+ d-cache-size = 2;
+ dcr-controller;
+ dcr-access-method = native;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0 0 0; /* Filled in by zImage */
+ };
+
+ UIC0: interrupt-controller0 {
+ compatible = ibm,uic-440spe,ibm,uic;
+ interrupt-controller;
+ cell-index = 0;
+ dcr-reg = 0c0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = ibm,uic-440spe,ibm,uic;
+ interrupt-controller;
+ cell-index = 1;
+ dcr-reg = 0d0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = 1e 4 1f 4; /* cascade */
+ interrupt-parent = UIC0;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = ibm,uic-440spe,ibm,uic;
+ interrupt-controller;
+ cell-index = 2;
+ dcr-reg = 0e0 009;
+ #address-cells = 0;
+ #size-cells = 0;
+ #interrupt-cells = 2;
+ interrupts = a 4 b 4; /* cascade */
[PATCH 18/21] [POWERPC] bamboo: remove bogus ranges property in EBC node
This removes a bogus empty ranges property in the EBC device node of the Bamboo board device-tree. The ranges property will be created by the boot wrapper, there is no need to have an empty property there, and that causes recent dtc to complain. Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED] --- arch/powerpc/boot/dts/bamboo.dts |1 - 1 file changed, 1 deletion(-) --- linux-merge.orig/arch/powerpc/boot/dts/bamboo.dts 2007-12-21 14:35:23.0 +1100 +++ linux-merge/arch/powerpc/boot/dts/bamboo.dts2007-12-21 14:35:25.0 +1100 @@ -126,7 +126,6 @@ #address-cells = 2; #size-cells = 1; clock-frequency = 0; /* Filled in by zImage */ - ranges; interrupts = 5 1; interrupt-parent = UIC1; }; ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 19/21] [POWERPC] 4xx PCI-E Link setup improvements
This improves the way the 4xx PCI-E code handles checking for a link
and adds explicit testing of CRS result codes on config space accesses.
This should make it more reliable.
Also, bridges with no link are now still created, though config space
accesses beyond the root complex are filtered. This is one step toward
eventually supporting hotplug.
Signed-off-by: Benjamin Herrenschmidt [EMAIL PROTECTED]
---
arch/powerpc/sysdev/ppc4xx_pci.c | 222 +++
arch/powerpc/sysdev/ppc4xx_pci.h |2
2 files changed, 134 insertions(+), 90 deletions(-)
--- linux-merge.orig/arch/powerpc/sysdev/ppc4xx_pci.c 2007-12-18
11:21:49.0 +1100
+++ linux-merge/arch/powerpc/sysdev/ppc4xx_pci.c2007-12-19
15:45:19.0 +1100
@@ -16,6 +16,8 @@
*
*/
+#undef DEBUG
+
#include linux/kernel.h
#include linux/pci.h
#include linux/init.h
@@ -531,10 +533,13 @@ struct ppc4xx_pciex_port
struct device_node *node;
unsigned intindex;
int endpoint;
+ int link;
+ int has_ibpre;
unsigned intsdr_base;
dcr_host_t dcrs;
struct resource cfg_space;
struct resource utl_regs;
+ void __iomem*utl_base;
};
static struct ppc4xx_pciex_port *ppc4xx_pciex_ports;
@@ -706,29 +711,44 @@ static int ppc440spe_pciex_init_port_hw(
return 0;
}
-static int ppc440speA_pciex_init_utl(struct ppc4xx_pciex_port *port)
+static int ppc440speA_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
+{
+ return ppc440spe_pciex_init_port_hw(port);
+}
+
+static int ppc440speB_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
{
- void __iomem *utl_base;
+ int rc = ppc440spe_pciex_init_port_hw(port);
+
+ port-has_ibpre = 1;
+
+ return rc;
+}
+static int ppc440speA_pciex_init_utl(struct ppc4xx_pciex_port *port)
+{
/* XXX Check what that value means... I hate magic */
dcr_write(port-dcrs, DCRO_PEGPL_SPECIAL, 0x68782800);
- utl_base = ioremap(port-utl_regs.start, 0x100);
- BUG_ON(utl_base == NULL);
-
/*
* Set buffer allocations and then assert VRB and TXE.
*/
- out_be32(utl_base + PEUTL_OUTTR, 0x0800);
- out_be32(utl_base + PEUTL_INTR,0x0200);
- out_be32(utl_base + PEUTL_OPDBSZ, 0x1000);
- out_be32(utl_base + PEUTL_PBBSZ, 0x5300);
- out_be32(utl_base + PEUTL_IPHBSZ, 0x0800);
- out_be32(utl_base + PEUTL_IPDBSZ, 0x1000);
- out_be32(utl_base + PEUTL_RCIRQEN, 0x00f0);
- out_be32(utl_base + PEUTL_PCTL,0x80800066);
+ out_be32(port-utl_base + PEUTL_OUTTR, 0x0800);
+ out_be32(port-utl_base + PEUTL_INTR,0x0200);
+ out_be32(port-utl_base + PEUTL_OPDBSZ, 0x1000);
+ out_be32(port-utl_base + PEUTL_PBBSZ, 0x5300);
+ out_be32(port-utl_base + PEUTL_IPHBSZ, 0x0800);
+ out_be32(port-utl_base + PEUTL_IPDBSZ, 0x1000);
+ out_be32(port-utl_base + PEUTL_RCIRQEN, 0x00f0);
+ out_be32(port-utl_base + PEUTL_PCTL,0x80800066);
- iounmap(utl_base);
+ return 0;
+}
+
+static int ppc440speB_pciex_init_utl(struct ppc4xx_pciex_port *port)
+{
+ /* Report CRS to the operating system */
+ out_be32(port-utl_base + PEUTL_PBCTL,0x0800);
return 0;
}
@@ -736,14 +756,15 @@ static int ppc440speA_pciex_init_utl(str
static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
{
.core_init = ppc440spe_pciex_core_init,
- .port_init_hw = ppc440spe_pciex_init_port_hw,
+ .port_init_hw = ppc440speA_pciex_init_port_hw,
.setup_utl = ppc440speA_pciex_init_utl,
};
static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata =
{
.core_init = ppc440spe_pciex_core_init,
- .port_init_hw = ppc440spe_pciex_init_port_hw,
+ .port_init_hw = ppc440speB_pciex_init_port_hw,
+ .setup_utl = ppc440speB_pciex_init_utl,
};
@@ -821,30 +842,21 @@ static int ppc405ex_pciex_init_port_hw(s
static int ppc405ex_pciex_init_utl(struct ppc4xx_pciex_port *port)
{
- void __iomem *utl_base;
-
dcr_write(port-dcrs, DCRO_PEGPL_SPECIAL, 0x0);
- utl_base = ioremap(port-utl_regs.start, 0x100);
- BUG_ON(utl_base == NULL);
-
/*
* Set buffer allocations and then assert VRB and TXE.
*/
- out_be32(utl_base + PEUTL_OUTTR, 0x0200);
- out_be32(utl_base + PEUTL_INTR,0x0200);
- out_be32(utl_base + PEUTL_OPDBSZ, 0x0400);
- out_be32(utl_base + PEUTL_PBBSZ, 0x2100);
- out_be32(utl_base + PEUTL_IPHBSZ, 0x0200);
- out_be32(utl_base + PEUTL_IPDBSZ, 0x0400);
- out_be32(utl_base + PEUTL_RCIRQEN, 0x00f0);
- out_be32(utl_base + PEUTL_PCTL,0x80800066);
-
