Re: [PATCH 07/10] KVM: PPC: Add PAPR hypercall code for PR mode

2011-08-12 Thread David Gibson 
On Fri, Aug 12, 2011 at 07:38:54AM +0200, Alexander Graf wrote:
 
 Am 12.08.2011 um 05:35 schrieb David Gibson da...@gibson.dropbear.id.au:
 
  On Tue, Aug 09, 2011 at 06:31:45PM +0200, Alexander Graf wrote:
  When running a PAPR guest, we need to handle a few hypercalls in kernel 
  space,
  most prominently the page table invalidation (to sync the shadows).
  
  So this patch adds handling for a few PAPR hypercalls to PR mode KVM. I 
  tried
  to share the code with HV mode, but it ended up being a lot easier this way
  around, as the two differ too much in those details.
  
  Are these strictly necessary, or just an optimization?  Because you're
  using the space allocated by qemu for the guest hash table, it seems
  to be you could just let h_enter fall through to qemu which will put
  the right thing into the guest hash table which you can then walk in
  the kernel translation code.
 
 Every time a PTE can be invalidated, we need to do so in kvm to keep
 the SPT in sync. IIRC h_enter can evict/overwrite a previous entry,
 so we need to handle it in kvm as well :). Removal definitely needs
 to happin in-kernel.

True.  I think you could actually delay this invalidation until the
guest issues the tlbie, but it's probably not worth it.

-- 
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david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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Re: [PATCH 09/10] KVM: PPC: Support SC1 hypercalls for PAPR in PR mode

2011-08-12 Thread David Gibson 
On Fri, Aug 12, 2011 at 07:35:42AM +0200, Alexander Graf wrote:
 
 Am 12.08.2011 um 05:33 schrieb David Gibson da...@gibson.dropbear.id.au:
 
  On Tue, Aug 09, 2011 at 06:31:47PM +0200, Alexander Graf wrote:
  PAPR defines hypercalls as SC1 instructions. Using these, the guest 
  modifies
  page tables and does other privileged operations that it wouldn't be 
  allowed
  to do in supervisor mode.
  
  This patch adds support for PR KVM to trap these instructions and route 
  them
  through the same PAPR hypercall interface that we already use for HV style
  KVM.
  
  This will work on a powermac or bare metal host.  Unfortunately, it's
  not enough on a pSeries LPAR host - the sc 1 instruction from the
  guest problem state will go direct to the hypervisor, which will
  return an error rather than trapping to the guest kernel.
  
  The only way around this I can see is for qemu to search for and patch
  up sc 1 instructions to something else.  Obviously that would also
  need some kernel support, and probably a capability to let it know if
  it's necessary.
 
 Well I'd like to keep Qemu out of the patching business, so the
 guest kernel would have to patch itself.

Well sure, but guest patching itself means it can't run existing
kernels.  I thought qemu already patched a few things, ugly though
that approach is.

 But yes, PHyP guests can't
 run this target yet :). I'll take a stab at that too, but one
 continent at a time! ;)

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david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
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Re: [PATCH 09/10] KVM: PPC: Support SC1 hypercalls for PAPR in PR mode

2011-08-12 Thread Alexander Graf 

Am 12.08.2011 um 09:43 schrieb David Gibson da...@gibson.dropbear.id.au:

 On Fri, Aug 12, 2011 at 07:35:42AM +0200, Alexander Graf wrote:
 
 Am 12.08.2011 um 05:33 schrieb David Gibson da...@gibson.dropbear.id.au:
 
 On Tue, Aug 09, 2011 at 06:31:47PM +0200, Alexander Graf wrote:
 PAPR defines hypercalls as SC1 instructions. Using these, the guest 
 modifies
 page tables and does other privileged operations that it wouldn't be 
 allowed
 to do in supervisor mode.
 
 This patch adds support for PR KVM to trap these instructions and route 
 them
 through the same PAPR hypercall interface that we already use for HV style
 KVM.
 
 This will work on a powermac or bare metal host.  Unfortunately, it's
 not enough on a pSeries LPAR host - the sc 1 instruction from the
 guest problem state will go direct to the hypervisor, which will
 return an error rather than trapping to the guest kernel.
 
 The only way around this I can see is for qemu to search for and patch
 up sc 1 instructions to something else.  Obviously that would also
 need some kernel support, and probably a capability to let it know if
 it's necessary.
 
 Well I'd like to keep Qemu out of the patching business, so the
 guest kernel would have to patch itself.
 
 Well sure, but guest patching itself means it can't run existing
 kernels.  I thought qemu already patched a few things, ugly though
 that approach is.

Nope, qemu doesn't patch guest code by itself. The only time the guest kernel 
doesn't patch itself is the TPR acceleration for Windows - because we can't 
modify the guest here.

I also don't think it's that important to support older Linux guests if it 
means we need to patch the guest from the outside :). If you really need to use 
PHyP, just run a newer guest kernel or -M mac99.

One thing I agree with though is that we should fail the CAP enable if we run 
on broken hypervisors.

Alex

 
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Re: [PATCH 07/10] KVM: PPC: Add PAPR hypercall code for PR mode

2011-08-12 Thread Alexander Graf 

Am 12.08.2011 um 09:43 schrieb David Gibson da...@gibson.dropbear.id.au:

 On Fri, Aug 12, 2011 at 07:38:54AM +0200, Alexander Graf wrote:
 
 Am 12.08.2011 um 05:35 schrieb David Gibson da...@gibson.dropbear.id.au:
 
 On Tue, Aug 09, 2011 at 06:31:45PM +0200, Alexander Graf wrote:
 When running a PAPR guest, we need to handle a few hypercalls in kernel 
 space,
 most prominently the page table invalidation (to sync the shadows).
 
 So this patch adds handling for a few PAPR hypercalls to PR mode KVM. I 
 tried
 to share the code with HV mode, but it ended up being a lot easier this way
 around, as the two differ too much in those details.
 
 Are these strictly necessary, or just an optimization?  Because you're
 using the space allocated by qemu for the guest hash table, it seems
 to be you could just let h_enter fall through to qemu which will put
 the right thing into the guest hash table which you can then walk in
 the kernel translation code.
 
 Every time a PTE can be invalidated, we need to do so in kvm to keep
 the SPT in sync. IIRC h_enter can evict/overwrite a previous entry,
 so we need to handle it in kvm as well :). Removal definitely needs
 to happin in-kernel.
 
 True.  I think you could actually delay this invalidation until the
 guest issues the tlbie, but it's probably not worth it.

Well, since we need to have HTAB modification code in kvm for PR either way, 
I'd rather have all of it at the same place :)

Alex
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Re: [PATCH v11 3/6] flexcan: Fix up fsl-flexcan device tree binding.

2011-08-12 Thread Robin Holt 
On Thu, Aug 11, 2011 at 10:53:43AM -0600, Grant Likely wrote:
 On Thu, Aug 11, 2011 at 10:07 AM, Robin Holt h...@sgi.com wrote:
  +- compatible : Should be fsl,processor-flexcan and fsl,flexcan
 
 Don't do this.  fsl,flexcan is far too generic.  Be specific to the
 soc part number or the ip core implementation version.

I don't have any crumbs to go with here.  There is nothing in the
documentation I have found to indicate what this is or should be.
I looked at the documentation for the P1010 processor and there is nothing
in there which I noticed that indicates what I could possibly use other
than flexcan.  They don't even indicate the registers are equivalent or
identical to their i.MX implementations for i.MX25 and i.MX35.  The only
thing they call it is flexcan.  I have asked our local freescale rep and
he said There is no 'chip', it is just flexcan.  flexcan is flexcan.
His tone was such that I got the feeling he thought the question was
crazy as flexcan is flexcan.

  -Can Engine Clock Source
  -       There are two sources for CAN clock
  -       - Platform Clock  It represents the bus clock
  -       - Oscillator Clock
  +  An implementation should also claim any of the following compatibles
  +  that it is fully backwards compatible with:
 
  -       Peripheral Clock (PLL)
  -       --
  -                    |
  -                   -                 -
  -                   |       |CPI Clock        | Prescaler |       Sclock
  -                   |       || (1.. 256) |
  -                   -                 -
  -                     |  |
  -       --  -CLK_SRC
  -       Oscillator Clock
  +  - fsl,p1010-flexcan
 
  -- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
  -                            the peripheral clock. PLL clock is fed to the
  -                            prescaler to generate the Serial Clock 
  (Sclock).
  -                            Valid values are oscillator and platform
  -                            oscillator: CAN engine clock source is 
  oscillator clock.
  -                            platform The CAN engine clock source is the 
  bus clock
  -                            (platform clock).
  +- reg : Offset and length of the register set for this device
  +- interrupts : Interrupt tuple for this device
 
  -- fsl,flexcan-clock-divider : for the reference and system clock, an 
  additional
  -                             clock divider can be specified.
  -- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
  +Example:
 
  -Note:
  -       - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
  -       - P1010 does not have oscillator as the Clock Source.So the default
  -         Clock Source is platform clock.
  -Examples:
  -
  -       can0@1c000 {
  -               compatible = fsl,flexcan-v1.0;
  -               reg = 0x1c000 0x1000;
  -               interrupts = 48 0x2;
  -               interrupt-parent = mpic;
  -               fsl,flexcan-clock-source = platform;
  -               fsl,flexcan-clock-divider = 2;
  -               clock-frequency = fixed by u-boot;
  -       };
  +  can@1c000 {
  +          compatible = fsl,p1010-flexcan, fsl,flexcan;
  +          reg = 0x1c000 0x1000;
  +          interrupts = 48 0x2;
  +          interrupt-parent = mpic;
  +  };
 
 The diffstat for this patch looks too big because the whitespace has
 changed.  Try to restrict whitespace changes so that the patch is
 friendly to reviewers.

Reworked the best I can.  That reduced the diffstat by 3 lines.

Robin
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[PATCH v12 0/6] flexcan/powerpc: Add support for powerpc flexcan (freescale p1010)

2011-08-12 Thread Robin Holt 
With all the patches applied, my p1010rdb works for communicating between
its two can ports and also can communicate with an external PSOC.
I have done no testing beyond compile testing for an arm system as I
have no access to an arm based system.

With the latest version, changes to the arch tree really only reflect
changes in the drivers/net/can tree.  I, therefore, believe it is
probably best to route them through David S. Miller's netdev tree.
Wolfgang and Kumar, does that seem correct to you?

Thanks,
Robin Holt
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[PATCH v12 1/6] flexcan: Remove #include mach/clock.h

2011-08-12 Thread Robin Holt 
powerpc does not have a mach-/clock.h.  When testing, I found neither
arm nor powerpc needed the mach/clock.h at all so I removed it.

Signed-off-by: Robin Holt h...@sgi.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de
Acked-by: Wolfgang Grandegger w...@grandegger.com
Cc: U Bhaskar-B22300 b22...@freescale.com
Cc: socketcan-c...@lists.berlios.de
Cc: net...@vger.kernel.org
Cc: PPC list linuxppc-dev@lists.ozlabs.org
---
 drivers/net/can/flexcan.c |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 1767811..586b2cd 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -35,8 +35,6 @@
 #include linux/module.h
 #include linux/platform_device.h
 
-#include mach/clock.h
-
 #define DRV_NAME   flexcan
 
 /* 8 for RX fifo and 2 error handling */
-- 
1.7.2.1

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[PATCH v12 2/6] flexcan: Abstract off read/write for big/little endian.

2011-08-12 Thread Robin Holt 
Make flexcan driver handle register reads in the appropriate endianess.
This was a basic search and replace and then define some inlines.

Signed-off-by: Robin Holt h...@sgi.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de
Acked-by: Wolfgang Grandegger w...@grandegger.com
Cc: U Bhaskar-B22300 b22...@freescale.com
Cc: socketcan-c...@lists.berlios.de
Cc: net...@vger.kernel.org
Cc: PPC list linuxppc-dev@lists.ozlabs.org
---
 drivers/net/can/flexcan.c |  140 ++--
 1 files changed, 83 insertions(+), 57 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 586b2cd..68cbe52 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -190,6 +190,31 @@ static struct can_bittiming_const flexcan_bittiming_const 
= {
 };
 
 /*
+ * Abstract off the read/write for arm versus ppc.
+ */
+#if defined(__BIG_ENDIAN)
+static inline u32 flexcan_read(void __iomem *addr)
+{
+   return in_be32(addr);
+}
+
+static inline void flexcan_write(u32 val, void __iomem *addr)
+{
+   out_be32(addr, val);
+}
+#else
+static inline u32 flexcan_read(void __iomem *addr)
+{
+   return readl(addr);
+}
+
+static inline void flexcan_write(u32 val, void __iomem *addr)
+{
+   writel(val, addr);
+}
+#endif
+
+/*
  * Swtich transceiver on or off
  */
 static void flexcan_transceiver_switch(const struct flexcan_priv *priv, int on)
@@ -210,9 +235,9 @@ static inline void flexcan_chip_enable(struct flexcan_priv 
*priv)
struct flexcan_regs __iomem *regs = priv-base;
u32 reg;
 
-   reg = readl(regs-mcr);
+   reg = flexcan_read(regs-mcr);
reg = ~FLEXCAN_MCR_MDIS;
-   writel(reg, regs-mcr);
+   flexcan_write(reg, regs-mcr);
 
udelay(10);
 }
@@ -222,9 +247,9 @@ static inline void flexcan_chip_disable(struct flexcan_priv 
*priv)
struct flexcan_regs __iomem *regs = priv-base;
u32 reg;
 
-   reg = readl(regs-mcr);
+   reg = flexcan_read(regs-mcr);
reg |= FLEXCAN_MCR_MDIS;
-   writel(reg, regs-mcr);
+   flexcan_write(reg, regs-mcr);
 }
 
 static int flexcan_get_berr_counter(const struct net_device *dev,
@@ -232,7 +257,7 @@ static int flexcan_get_berr_counter(const struct net_device 
*dev,
 {
const struct flexcan_priv *priv = netdev_priv(dev);
struct flexcan_regs __iomem *regs = priv-base;
-   u32 reg = readl(regs-ecr);
+   u32 reg = flexcan_read(regs-ecr);
 
bec-txerr = (reg  0)  0xff;
bec-rxerr = (reg  8)  0xff;
@@ -266,15 +291,15 @@ static int flexcan_start_xmit(struct sk_buff *skb, struct 
net_device *dev)
 
if (cf-can_dlc  0) {
u32 data = be32_to_cpup((__be32 *)cf-data[0]);
-   writel(data, regs-cantxfg[FLEXCAN_TX_BUF_ID].data[0]);
+   flexcan_write(data, regs-cantxfg[FLEXCAN_TX_BUF_ID].data[0]);
}
if (cf-can_dlc  3) {
u32 data = be32_to_cpup((__be32 *)cf-data[4]);
-   writel(data, regs-cantxfg[FLEXCAN_TX_BUF_ID].data[1]);
+   flexcan_write(data, regs-cantxfg[FLEXCAN_TX_BUF_ID].data[1]);
}
 
-   writel(can_id, regs-cantxfg[FLEXCAN_TX_BUF_ID].can_id);
-   writel(ctrl, regs-cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
+   flexcan_write(can_id, regs-cantxfg[FLEXCAN_TX_BUF_ID].can_id);
+   flexcan_write(ctrl, regs-cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl);
 
kfree_skb(skb);
 
@@ -462,8 +487,8 @@ static void flexcan_read_fifo(const struct net_device *dev,
struct flexcan_mb __iomem *mb = regs-cantxfg[0];
u32 reg_ctrl, reg_id;
 
-   reg_ctrl = readl(mb-can_ctrl);
-   reg_id = readl(mb-can_id);
+   reg_ctrl = flexcan_read(mb-can_ctrl);
+   reg_id = flexcan_read(mb-can_id);
if (reg_ctrl  FLEXCAN_MB_CNT_IDE)
cf-can_id = ((reg_id  0)  CAN_EFF_MASK) | CAN_EFF_FLAG;
else
@@ -473,12 +498,12 @@ static void flexcan_read_fifo(const struct net_device 
*dev,
cf-can_id |= CAN_RTR_FLAG;
cf-can_dlc = get_can_dlc((reg_ctrl  16)  0xf);
 
-   *(__be32 *)(cf-data + 0) = cpu_to_be32(readl(mb-data[0]));
-   *(__be32 *)(cf-data + 4) = cpu_to_be32(readl(mb-data[1]));
+   *(__be32 *)(cf-data + 0) = cpu_to_be32(flexcan_read(mb-data[0]));
+   *(__be32 *)(cf-data + 4) = cpu_to_be32(flexcan_read(mb-data[1]));
 
/* mark as read */
-   writel(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, regs-iflag1);
-   readl(regs-timer);
+   flexcan_write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, regs-iflag1);
+   flexcan_read(regs-timer);
 }
 
 static int flexcan_read_frame(struct net_device *dev)
@@ -514,17 +539,17 @@ static int flexcan_poll(struct napi_struct *napi, int 
quota)
 * The error bits are cleared on read,
 * use saved value from irq handler.
 */
-   reg_esr = readl(regs-esr) | priv-reg_esr;
+   reg_esr = flexcan_read(regs-esr) | priv-reg_esr;
 
/* handle state changes */
work_done +=

[PATCH v12 3/6] flexcan: Fix up fsl-flexcan device tree binding.

2011-08-12 Thread Robin Holt 
This patch cleans up the documentation of the device-tree binding for
the Flexcan devices on Freescale's PowerPC and ARM cores. Extra
properties are not used by the driver so we are removing them.

Signed-off-by: Robin Holt h...@sgi.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de,
To: Wolfgang Grandegger w...@grandegger.com,
To: U Bhaskar-B22300 b22...@freescale.com
To: Scott Wood scottw...@freescale.com
To: Grant Likely grant.lik...@secretlab.ca
To: Kumar Gala ga...@kernel.crashing.org
Cc: socketcan-c...@lists.berlios.de,
Cc: net...@vger.kernel.org,
Cc: PPC list linuxppc-dev@lists.ozlabs.org
Cc: devicetree-disc...@lists.ozlabs.org
---
 .../devicetree/bindings/net/can/fsl-flexcan.txt|   61 
 arch/powerpc/boot/dts/p1010rdb.dts |   10 +---
 arch/powerpc/boot/dts/p1010si.dtsi |   10 +--
 3 files changed, 17 insertions(+), 64 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 1a729f0..80a78a9 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -1,61 +1,22 @@
-CAN Device Tree Bindings
-
-2011 Freescale Semiconductor, Inc.
+Flexcan CAN contoller on Freescale's ARM and PowerPC system-on-a-chip (SOC).
 
-fsl,flexcan-v1.0 nodes

-In addition to the required compatible-, reg- and interrupt-properties, you can
-also specify which clock source shall be used for the controller.
+Required properties:
 
-CPI Clock- Can Protocol Interface Clock
-   This CLK_SRC bit of CTRL(control register) selects the clock source to
-   the CAN Protocol Interface(CPI) to be either the peripheral clock
-   (driven by the PLL) or the crystal oscillator clock. The selected clock
-   is the one fed to the prescaler to generate the Serial Clock (Sclock).
-   The PRESDIV field of CTRL(control register) controls a prescaler that
-   generates the Serial Clock (Sclock), whose period defines the
-   time quantum used to compose the CAN waveform.
+- compatible : Should be fsl,processor-flexcan and fsl,flexcan
 
-Can Engine Clock Source
-   There are two sources for CAN clock
-   - Platform Clock  It represents the bus clock
-   - Oscillator Clock
+  An implementation should also claim any of the following compatibles
+  that it is fully backwards compatible with:
 
-   Peripheral Clock (PLL)
-   --
-|
-   - -
-   |   |CPI Clock| Prescaler |   Sclock
-   |   || (1.. 256) |
-   - -
- |  |
-   --  -CLK_SRC
-   Oscillator Clock
+  - fsl,p1010-flexcan
 
-- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
-the peripheral clock. PLL clock is fed to the
-prescaler to generate the Serial Clock (Sclock).
-Valid values are oscillator and platform
-oscillator: CAN engine clock source is 
oscillator clock.
-platform The CAN engine clock source is the bus 
clock
-(platform clock).
+- reg : Offset and length of the register set for this device
+- interrupts : Interrupt tuple for this device
 
-- fsl,flexcan-clock-divider : for the reference and system clock, an additional
- clock divider can be specified.
-- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
+Example:
 
-Note:
-   - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
-   - P1010 does not have oscillator as the Clock Source.So the default
- Clock Source is platform clock.
-Examples:
-
-   can0@1c000 {
-   compatible = fsl,flexcan-v1.0;
+   can@1c000 {
+   compatible = fsl,p1010-flexcan, fsl,flexcan;
reg = 0x1c000 0x1000;
interrupts = 48 0x2;
interrupt-parent = mpic;
-   fsl,flexcan-clock-source = platform;
-   fsl,flexcan-clock-divider = 2;
-   clock-frequency = fixed by u-boot;
};
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts 
b/arch/powerpc/boot/dts/p1010rdb.dts
index 6b33b73..d6c669c 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -23,6 +23,8 @@
ethernet2 = enet2;
pci0 = pci0;
pci1 = pci1;
+   can0 = can0;
+   can1 = can1;
};
 
memory {
@@ -169,14 +171,6 @@
};
};
 
-   can0@1c000 {
-

[PATCH v12 4/6] flexcan: Add of_match to platform_device definition.

2011-08-12 Thread Robin Holt 
On powerpc, the OpenFirmware devices are not matched without specifying
an of_match array.  Introduce that array as that is used for matching
on the Freescale P1010 processor.

Signed-off-by: Robin Holt h...@sgi.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de
Acked-by: Wolfgang Grandegger w...@grandegger.com
Cc: U Bhaskar-B22300 b22...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: socketcan-c...@lists.berlios.de
Cc: net...@vger.kernel.org
Cc: PPC list linuxppc-dev@lists.ozlabs.org
Cc: devicetree-disc...@lists.ozlabs.org
---
 drivers/net/can/flexcan.c |   13 -
 1 files changed, 12 insertions(+), 1 deletions(-)

diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 68cbe52..662f832 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -1027,8 +1027,19 @@ static int __devexit flexcan_remove(struct 
platform_device *pdev)
return 0;
 }
 
+static struct of_device_id flexcan_of_match[] = {
+   {
+   .compatible = fsl,flexcan,
+   },
+   {},
+};
+
 static struct platform_driver flexcan_driver = {
-   .driver.name = DRV_NAME,
+   .driver = {
+   .name = DRV_NAME,
+   .owner = THIS_MODULE,
+   .of_match_table = flexcan_of_match,
+   },
.probe = flexcan_probe,
.remove = __devexit_p(flexcan_remove),
 };
-- 
1.7.2.1

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[PATCH v12 5/6] flexcan: Prefer device tree clock frequency if available.

2011-08-12 Thread Robin Holt 
If our CAN device's device tree node has a clock-frequency property,
then use that value for the can devices clock frequency.  If not, fall
back to asking the platform/mach code for the clock frequency associated
with the flexcan device.

Signed-off-by: Robin Holt h...@sgi.com
To: Kumar Gala ga...@kernel.crashing.org
To: Wolfgang Grandegger w...@grandegger.com,
To: Marc Kleine-Budde m...@pengutronix.de,
To: U Bhaskar-B22300 b22...@freescale.com
To: Scott Wood scottw...@freescale.com
To: Grant Likely grant.lik...@secretlab.ca
Cc: socketcan-c...@lists.berlios.de,
Cc: net...@vger.kernel.org,
Cc: PPC list linuxppc-dev@lists.ozlabs.org
Cc: devicetree-disc...@lists.ozlabs.org
---
 .../devicetree/bindings/net/can/fsl-flexcan.txt|2 +
 drivers/net/can/flexcan.c  |   34 ++-
 2 files changed, 27 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt 
b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 80a78a9..80313db 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -11,6 +11,7 @@ Required properties:
 
 - reg : Offset and length of the register set for this device
 - interrupts : Interrupt tuple for this device
+- clock-frequency : The oscillator frequency driving the flexcan device
 
 Example:
 
@@ -19,4 +20,5 @@ Example:
reg = 0x1c000 0x1000;
interrupts = 48 0x2;
interrupt-parent = mpic;
+   clock-frequency = 2; // filled in by bootloader
};
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index 662f832..f5fd3f8 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -33,6 +33,7 @@
 #include linux/kernel.h
 #include linux/list.h
 #include linux/module.h
+#include linux/of.h
 #include linux/platform_device.h
 
 #define DRV_NAME   flexcan
@@ -925,16 +926,29 @@ static int __devinit flexcan_probe(struct platform_device 
*pdev)
struct net_device *dev;
struct flexcan_priv *priv;
struct resource *mem;
-   struct clk *clk;
+   struct clk *clk = NULL;
void __iomem *base;
resource_size_t mem_size;
int err, irq;
+   u32 clock_freq = 0;
+
+   if (pdev-dev.of_node) {
+   const u32 *clock_freq_p;
 
-   clk = clk_get(pdev-dev, NULL);
-   if (IS_ERR(clk)) {
-   dev_err(pdev-dev, no clock defined\n);
-   err = PTR_ERR(clk);
-   goto failed_clock;
+   clock_freq_p = of_get_property(pdev-dev.of_node,
+   clock-frequency, NULL);
+   if (clock_freq_p)
+   clock_freq = *clock_freq_p;
+   }
+
+   if (!clock_freq) {
+   clk = clk_get(pdev-dev, NULL);
+   if (IS_ERR(clk)) {
+   dev_err(pdev-dev, no clock defined\n);
+   err = PTR_ERR(clk);
+   goto failed_clock;
+   }
+   clock_freq = clk_get_rate(clk);
}
 
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -967,7 +981,7 @@ static int __devinit flexcan_probe(struct platform_device 
*pdev)
dev-flags |= IFF_ECHO; /* we support local echo in hardware */
 
priv = netdev_priv(dev);
-   priv-can.clock.freq = clk_get_rate(clk);
+   priv-can.clock.freq = clock_freq;
priv-can.bittiming_const = flexcan_bittiming_const;
priv-can.do_set_mode = flexcan_set_mode;
priv-can.do_get_berr_counter = flexcan_get_berr_counter;
@@ -1002,7 +1016,8 @@ static int __devinit flexcan_probe(struct platform_device 
*pdev)
  failed_map:
release_mem_region(mem-start, mem_size);
  failed_get:
-   clk_put(clk);
+   if (clk)
+   clk_put(clk);
  failed_clock:
return err;
 }
@@ -1020,7 +1035,8 @@ static int __devexit flexcan_remove(struct 
platform_device *pdev)
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
release_mem_region(mem-start, resource_size(mem));
 
-   clk_put(priv-clk);
+   if (priv-clk)
+   clk_put(priv-clk);
 
free_candev(dev);
 
-- 
1.7.2.1

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[PATCH v12 6/6] powerpc: Add flexcan device support for p1010rdb.

2011-08-12 Thread Robin Holt 
Allow the p1010 processor to select the flexcan network driver.

Signed-off-by: Robin Holt h...@sgi.com
Acked-by: Marc Kleine-Budde m...@pengutronix.de,
Acked-by: Wolfgang Grandegger w...@grandegger.com,
Cc: U Bhaskar-B22300 b22...@freescale.com
Cc: socketcan-c...@lists.berlios.de,
Cc: net...@vger.kernel.org,
Cc: PPC list linuxppc-dev@lists.ozlabs.org
Cc: Kumar Gala ga...@kernel.crashing.org
---
 arch/powerpc/Kconfig |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 6926b61..47682b6 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -656,6 +656,8 @@ config SBUS
 
 config FSL_SOC
bool
+   select HAVE_CAN_FLEXCAN if NET  CAN
+   select PPC_CLOCK if CAN_FLEXCAN
 
 config FSL_PCI
bool
-- 
1.7.2.1

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RE: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc

2011-08-12 Thread Zang Roy-R61911 


 -Original Message-
 From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-ow...@vger.kernel.org]
 On Behalf Of Anton Vorontsov
 Sent: Friday, July 22, 2011 18:15 PM
 To: Zang Roy-R61911
 Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; akpm@linux-
 foundation.org; Xu Lei-B33228; Kumar Gala
 Subject: Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl 
 esdhc
 
 On Fri, Jul 22, 2011 at 06:15:17PM +0800, Roy Zang wrote:
 [...]
  if (host-version = SDHCI_SPEC_200) {
  -   ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
  -   ctrl = ~SDHCI_CTRL_DMA_MASK;
  -   if ((host-flags  SDHCI_REQ_USE_DMA) 
  -   (host-flags  SDHCI_USE_ADMA))
  -   ctrl |= SDHCI_CTRL_ADMA32;
  -   else
  -   ctrl |= SDHCI_CTRL_SDMA;
  -   sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
  +   if (host-quirks  SDHCI_QUIRK_QORIQ_PROCTL_WEIRD) {
  +#define ESDHCI_PROCTL_DMAS_MASK0x0300
  +#define ESDHCI_PROCTL_ADMA32   0x0200
  +#define ESDHCI_PROCTL_SDMA 0x
  +   ctrl = sdhci_readl(host, SDHCI_HOST_CONTROL);
  +   ctrl = ~ESDHCI_PROCTL_DMAS_MASK;
  +   if ((host-flags  SDHCI_REQ_USE_DMA) 
  +   (host-flags  SDHCI_USE_ADMA))
  +   ctrl |= ESDHCI_PROCTL_ADMA32;
  +   else
  +   ctrl |= ESDHCI_PROCTL_SDMA;
  +   sdhci_writel(host, ctrl, SDHCI_HOST_CONTROL);
  +   } else {
  +   ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
  +   ctrl = ~SDHCI_CTRL_DMA_MASK;
  +   if ((host-flags  SDHCI_REQ_USE_DMA) 
  +   (host-flags  SDHCI_USE_ADMA))
  +   ctrl |= SDHCI_CTRL_ADMA32;
  +   else
  +   ctrl |= SDHCI_CTRL_SDMA;
  +   sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 
 We try to not pollute generic sdhci.c driver with chip-specific
 quirks.
 
 Maybe you can do the fixups via IO accessors? Or by introducing
 some additional sdhci op?
Anton,
thanks for the comment, as we discussed, the original code use 8 bit byte 
operation,
while in fact, on some powerpc platform, 32 bit operation is needed. 
should it be possible fixed by adding some wrapper in IO accessors or introduce 
additional sdhci op?
Please advice more. 
Thanks.
Roy
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[PATCH] PS3: Fixed Coding Style Issues in ps3av.c

2011-08-12 Thread Venkatram Tummala 
Fixed a coding style issue

Signed-off-by: Venkatram Tummala venkatram...@gmail.com
---
 drivers/ps3/ps3av.c |   21 -
 1 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/drivers/ps3/ps3av.c b/drivers/ps3/ps3av.c
index a409fa0..e6d1a3d 100644
--- a/drivers/ps3/ps3av.c
+++ b/drivers/ps3/ps3av.c
@@ -26,7 +26,7 @@
 #include linux/fb.h
 #include linux/slab.h
 
-#include asm/firmware.h
+#include linux/firmware.h
 #include asm/ps3av.h
 #include asm/ps3.h
 
@@ -338,7 +338,7 @@ int ps3av_do_pkt(u32 cid, u16 send_len, size_t usr_buf_size,
mutex_unlock(ps3av-mutex);
return 0;
 
-  err:
+err:
mutex_unlock(ps3av-mutex);
printk(KERN_ERR %s: failed cid:%x res:%d\n, __func__, cid, res);
return res;
@@ -477,7 +477,6 @@ int ps3av_set_audio_mode(u32 ch, u32 fs, u32 word_bits, u32 
format, u32 source)
 
return 0;
 }
-
 EXPORT_SYMBOL_GPL(ps3av_set_audio_mode);
 
 static int ps3av_set_videomode(void)
@@ -501,7 +500,8 @@ static void ps3av_set_videomode_packet(u32 id)
 
video_mode = video_mode_table[id  PS3AV_MODE_MASK];
 
-   avb_param.num_of_video_pkt = PS3AV_AVB_NUM_VIDEO;   /* num of head 
*/
+   /* num of head */
+   avb_param.num_of_video_pkt = PS3AV_AVB_NUM_VIDEO;
avb_param.num_of_audio_pkt = 0;
avb_param.num_of_av_video_pkt = ps3av-av_hw_conf.num_of_hdmi +
ps3av-av_hw_conf.num_of_avmulti;
@@ -590,8 +590,8 @@ static void ps3avd(struct work_struct *work)
 #define SHIFT_VESA 8
 
 static const struct {
-   unsigned mask : 19;
-   unsigned id :  4;
+   unsigned mask:19;
+   unsigned id:4;
 } ps3av_preferred_modes[] = {
{ PS3AV_RESBIT_WUXGA   SHIFT_VESA, PS3AV_MODE_WUXGA   },
{ PS3AV_RESBIT_1920x1080P  SHIFT_60,   PS3AV_MODE_1080P60 },
@@ -667,7 +667,8 @@ static enum ps3av_mode_num ps3av_hdmi_get_id(struct 
ps3av_info_monitor *info)
return id;
 }
 
-static void ps3av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info 
*monitor_info)
+static void ps3av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info 
*
+   monitor_info)
 {
const struct ps3av_info_monitor *info = monitor_info-info;
const struct ps3av_info_audio *audio = info-audio;
@@ -870,21 +871,18 @@ int ps3av_set_video_mode(int id)
 
return 0;
 }
-
 EXPORT_SYMBOL_GPL(ps3av_set_video_mode);
 
 int ps3av_get_auto_mode(void)
 {
return ps3av_auto_videomode(ps3av-av_hw_conf);
 }
-
 EXPORT_SYMBOL_GPL(ps3av_get_auto_mode);
 
 int ps3av_get_mode(void)
 {
return ps3av ? ps3av-ps3av_mode : 0;
 }
-
 EXPORT_SYMBOL_GPL(ps3av_get_mode);
 
 /* get resolution by video_mode */
@@ -902,7 +900,6 @@ int ps3av_video_mode2res(u32 id, u32 *xres, u32 *yres)
*yres = video_mode_table[id].y;
return 0;
 }
-
 EXPORT_SYMBOL_GPL(ps3av_video_mode2res);
 
 /* mute */
@@ -911,7 +908,6 @@ int ps3av_video_mute(int mute)
return ps3av_set_av_video_mute(mute ? PS3AV_CMD_MUTE_ON
: PS3AV_CMD_MUTE_OFF);
 }
-
 EXPORT_SYMBOL_GPL(ps3av_video_mute);
 
 /* mute analog output only */
@@ -935,7 +931,6 @@ int ps3av_audio_mute(int mute)
return ps3av_set_audio_mute(mute ? PS3AV_CMD_MUTE_ON
 : PS3AV_CMD_MUTE_OFF);
 }
-
 EXPORT_SYMBOL_GPL(ps3av_audio_mute);
 
 static int __devinit ps3av_probe(struct ps3_system_bus_device *dev)
-- 
1.7.0.4

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Re: [PATCH 2/2 v2] eSDHC: Fix errors when booting kernel with fsl esdhc

2011-08-12 Thread Anton Vorontsov 
Hello,

On Fri, Aug 12, 2011 at 09:44:26AM +, Zang Roy-R61911 wrote:
[...]
  We try to not pollute generic sdhci.c driver with chip-specific
  quirks.
  
  Maybe you can do the fixups via IO accessors? Or by introducing
  some additional sdhci op?
 Anton,
 thanks for the comment, as we discussed, the original code use 8 bit byte 
 operation,
 while in fact, on some powerpc platform, 32 bit operation is needed. 
 should it be possible fixed by adding some wrapper in IO accessors or 
 introduce additional sdhci op?

I would do it in the IO accessors.

Thanks,

-- 
Anton Vorontsov
Email: cbouatmai...@gmail.com
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[PATCH] powerpc/p1023rds: Fix the error of bank-width of nor flash

2011-08-12 Thread Chunhe Lan 
In the p1023rds, a physical bus of nor flash is 16 bits width.
The bank-width is width (in bytes) of the bus width. So, the
value of bank-width of nor flash is not one, and it should be
two.

Signed-off-by: Chunhe Lan chunhe@freescale.com
---
 arch/powerpc/boot/dts/p1023rds.dts |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/boot/dts/p1023rds.dts 
b/arch/powerpc/boot/dts/p1023rds.dts
index bfa96aa..d9b7767 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -387,7 +387,7 @@
#size-cells = 1;
compatible = cfi-flash;
reg = 0x0 0x0 0x0200;
-   bank-width = 1;
+   bank-width = 2;
device-width = 1;
partition@0 {
label = ramdisk;
-- 
1.5.6.5


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Re: [PATCH v12 5/6] flexcan: Prefer device tree clock frequency if available.

2011-08-12 Thread Wolfgang Grandegger 
On 08/12/2011 10:45 AM, Robin Holt wrote:
 If our CAN device's device tree node has a clock-frequency property,
 then use that value for the can devices clock frequency.  If not, fall
 back to asking the platform/mach code for the clock frequency associated
 with the flexcan device.
 
 Signed-off-by: Robin Holt h...@sgi.com
 To: Kumar Gala ga...@kernel.crashing.org
 To: Wolfgang Grandegger w...@grandegger.com,
 To: Marc Kleine-Budde m...@pengutronix.de,
 To: U Bhaskar-B22300 b22...@freescale.com
 To: Scott Wood scottw...@freescale.com
 To: Grant Likely grant.lik...@secretlab.ca
 Cc: socketcan-c...@lists.berlios.de,
 Cc: net...@vger.kernel.org,
 Cc: PPC list linuxppc-dev@lists.ozlabs.org
 Cc: devicetree-disc...@lists.ozlabs.org

Acked-by: Wolfgang Grandegger w...@grandegger.com

From the Socket-CAN point of view, this and the other patches can go in.
Thanks for your effort.

Wolfgang.
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