Re: [PATCH v6 02/17] dts: mpc512x: introduce dt-bindings/clock/ header

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:22 +0100
Gerhard Sittig  wrote:

> introduce a dt-bindings/ header file for MPC512x clocks,
> providing symbolic identifiers for those SoC clocks which
> clients will reference from their device tree nodes
> 
> Cc: Rob Herring 
> Cc: Pawel Moll 
> Cc: Mark Rutland 
> Cc: Stephen Warren 
> Cc: Ian Campbell 
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Mike Turquette# for v3: w/o bdlc, PSC 
> ipg
> Signed-off-by: Gerhard Sittig 
> ---
>  include/dt-bindings/clock/mpc512x-clock.h |   69 
> +
>  1 file changed, 69 insertions(+)
>  create mode 100644 include/dt-bindings/clock/mpc512x-clock.h

applied to next. Thanks!

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Re: [PATCH v6 03/17] dts: mpc512x: add clock related device tree specs

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:23 +0100
Gerhard Sittig  wrote:

> this addresses the clock driver aka provider's side of clocks
> - introduce a 'clocks' subtree with an 'osc' node for the crystal
>   or oscillator SoC input (fixed frequency)
> - the 'clock@f00' clock-control-module node references the 'osc' for
>   its input, and is another provider for all the clocks which the
>   CCM component manages
> - prepare for future references to clocks from peripheral nodes
>   by means of the <&clks ID> syntax and symbolic ID names which a
>   header file provides
> - provide default values with 33MHz oscillator frequency in the
>   common include (the 66MHz IPS bus already was there), and add
>   override values for the ifm AC14xx board which deviates from
>   the reference design (25MHz xtal, 80MHz IPS bus)
> 
> Cc: Rob Herring 
> Cc: Pawel Moll 
> Cc: Mark Rutland 
> Cc: Stephen Warren 
> Cc: Ian Campbell 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
> Reviewed-by: Mike Turquette  # for v3, before &osc
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/boot/dts/ac14xx.dts   |7 +++
>  arch/powerpc/boot/dts/mpc5121.dtsi |   18 +-
>  2 files changed, 24 insertions(+), 1 deletion(-)

applied to next. Thanks!

Anatolij
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Re: [PATCH v6 04/17] clk: mpc512x: introduce COMMON_CLK for MPC512x (disabled)

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:24 +0100
Gerhard Sittig  wrote:

> this change implements a clock driver for the MPC512x PowerPC platform
> which follows the COMMON_CLK approach and uses common clock drivers
> shared with other platforms
> 
> this driver implements the publicly announced set of clocks (those
> listed in the dt-bindings header file), as well as generates additional
> 'struct clk' items where the SoC hardware cannot easily get mapped to
> the common primitives (shared code) of the clock API, or requires
> "intermediate clock nodes" to represent clocks that have both gates and
> dividers
> 
> the previous PPC_CLOCK implementation is kept in place and remains
> active for the moment, the newly introduced CCF clock driver will
> receive additional support for backwards compatibility in a subsequent
> patch before it gets enabled and will replace the PPC_CLOCK approach
> 
> some of the clock items get pre-enabled in the clock driver to not have
> them automatically disabled by the underlying clock subsystem because of
> their being unused -- this approach is desirable because
> - some of the clocks are useful to have for diagnostics and information
>   despite their not getting claimed by any drivers (CPU, internal and
>   external RAM, internal busses, boot media)
> - some of the clocks aren't claimed by their peripheral drivers yet,
>   either because of missing driver support or because device tree specs
>   aren't available yet (but the workarounds will get removed as the
>   drivers get adjusted and the device tree provides the clock specs)
> 
> clkdev registration provides "alias names" for few clock items
> - to not break those peripheral drivers which encode their component
>   index into the name that is used for clock lookup (UART, SPI, USB)
> - to not break those drivers which use names for the clock lookup which
>   were encoded in the previous PPC_CLOCK implementation (NFC, VIU, CAN)
> this workaround will get removed as these drivers get adjusted after
> device tree based clock lookup has become available
> 
> the COMMON_CLK implementation copes with device trees which lack an
> oscillator node (backwards compat), the REF clock is then derived from
> the IPS bus frequency and multiplier values fetched from hardware
> 
> Cc: Mike Turquette 
> Cc: Anatolij Gustschin 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/platforms/512x/Makefile  |4 +-
>  arch/powerpc/platforms/512x/clock-commonclk.c |  798 
> +
>  include/linux/clk-provider.h  |   16 +
>  3 files changed, 817 insertions(+), 1 deletion(-)
>  create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c

applied to next. Thanks!

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Re: [PATCH v6 05/17] clk: mpc512x: add backwards compat to the CCF code

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:25 +0100
Gerhard Sittig  wrote:

> extend the recently added COMMON_CLK platform support for MPC512x such
> that it works with incomplete device tree data which lacks clock specs
> 
> Cc: Mike Turquette 
> Cc: Anatolij Gustschin 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/platforms/512x/clock-commonclk.c |  173 
> -
>  1 file changed, 172 insertions(+), 1 deletion(-)

moved node macro definitions out of the function body and applied
to next. Thanks!

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Re: [PATCH v6 06/17] dts: mpc512x: add clock specs for client lookups

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:26 +0100
Gerhard Sittig  wrote:

> this addresses the client side of device tree based clock lookups
> 
> add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
> mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
> mpc5121.dtsi include
> 
> Cc: Rob Herring 
> Cc: Pawel Moll 
> Cc: Mark Rutland 
> Cc: Stephen Warren 
> Cc: Ian Campbell 
> Cc: devicet...@vger.kernel.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Reviewed-by: Mike Turquette# for v3: w/o bdlc, PSC 
> ipg
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/boot/dts/mpc5121.dtsi |   95 
> 
>  1 file changed, 95 insertions(+)

applied to next. Thanks!

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Re: [PATCH v6 07/17] clk: mpc5xxx: switch to COMMON_CLK, retire PPC_CLOCK

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:27 +0100
Gerhard Sittig  wrote:

> the setup before the change was
> - arch/powerpc/Kconfig had the PPC_CLOCK option, off by default
> - depending on the PPC_CLOCK option the arch/powerpc/kernel/clock.c file
>   was built, which implements the clk.h API but always returns -ENOSYS
>   unless a platform registers specific callbacks
> - the MPC52xx platform selected PPC_CLOCK but did not register any
>   callbacks, thus all clk.h API calls keep resulting in -ENOSYS errors
>   (which is OK, all peripheral drivers deal with the situation)
> - the MPC512x platform selected PPC_CLOCK and registered specific
>   callbacks implemented in arch/powerpc/platforms/512x/clock.c, thus
>   provided real support for the clock API
> - no other powerpc platform did select PPC_CLOCK
> 
> the situation after the change is
> - the MPC512x platform implements the COMMON_CLK interface, and thus the
>   PPC_CLOCK approach in arch/powerpc/platforms/512x/clock.c has become
>   obsolete
> - the MPC52xx platform still lacks genuine support for the clk.h API
>   while this is not a change against the previous situation (the error
>   code returned from COMMON_CLK stubs differs but every call still
>   results in an error)
> - with all references gone, the arch/powerpc/kernel/clock.c wrapper and
>   the PPC_CLOCK option have become obsolete, as did the clk_interface.h
>   header file
> 
> the switch from PPC_CLOCK to COMMON_CLK is done for all platforms within
> the same commit such that multiplatform kernels (the combination of 512x
> and 52xx within one executable) keep working
> 
> Cc: Mike Turquette 
> Cc: Anatolij Gustschin 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/Kconfig |5 -
>  arch/powerpc/include/asm/clk_interface.h |   20 -
>  arch/powerpc/kernel/Makefile |1 -
>  arch/powerpc/kernel/clock.c  |   82 
>  arch/powerpc/platforms/512x/Kconfig  |2 +-
>  arch/powerpc/platforms/512x/Makefile |1 -
>  arch/powerpc/platforms/512x/clock.c  |  754 
> --
>  arch/powerpc/platforms/52xx/Kconfig  |2 +-
>  8 files changed, 2 insertions(+), 865 deletions(-)
>  delete mode 100644 arch/powerpc/include/asm/clk_interface.h
>  delete mode 100644 arch/powerpc/kernel/clock.c
>  delete mode 100644 arch/powerpc/platforms/512x/clock.c

applied to next. Thanks!

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Re: [PATCH v6 08/17] spi: mpc512x: adjust to OF based clock lookup

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:28 +0100
Gerhard Sittig  wrote:

> after device tree based clock lookup became available, the peripheral
> driver need no longer construct clock names which include the PSC index,
> remove the "psc%d_mclk" template and unconditionally use 'mclk'
> 
> acquire and release the 'ipg' clock item for register access as well
> 
> Cc: Mark Brown 
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Gerhard Sittig 
> ---
>  drivers/spi/spi-mpc512x-psc.c |   26 ++
>  1 file changed, 18 insertions(+), 8 deletions(-)

applied to next. Thanks!

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Re: [PATCH v6 09/17] serial: mpc512x: adjust for OF based clock lookup

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:29 +0100
Gerhard Sittig  wrote:

> after device tree based clock lookup became available, the peripheral
> driver need no longer construct clock names which include the PSC index,
> remove the "psc%d_mclk" template and unconditionally use 'mclk'
> 
> acquire and release the "ipg" clock item for register access as well
> 
> Cc: Greg Kroah-Hartman 
> Cc: Jiri Slaby 
> Cc: linux-ser...@vger.kernel.org
> Acked-by: Greg Kroah-Hartman  # for v4
> Signed-off-by: Gerhard Sittig 
> ---
> Greg, the difference since v4 of this patch is that v4 took the 'mclk'
> and 'ipg' clock items in reverse order, and thus potentially obfuscated
> the adjusted name for 'mclk' -- the updated version of the patch is
> identical in content but cleaner diff-wise
> 
> ---
>  drivers/tty/serial/mpc52xx_uart.c |   40 
> -
>  1 file changed, 35 insertions(+), 5 deletions(-)

applied to next. Thanks!

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Re: [PATCH v6 10/17] serial: mpc512x: setup the PSC FIFO clock as well

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:30 +0100
Gerhard Sittig  wrote:

> prepare and enable the FIFO clock upon PSC FIFO initialization,
> check for and propagage errors when enabling the PSC FIFO clock,
> disable and unprepare the FIFO clock upon PSC FIFO uninitialization
> 
> devm_{get,put}_clk() doesn't apply here, as the SoC provides a
> single FIFO component which is shared among several PSC components,
> thus the FIFO isn't associated with a device (while the PSCs are)
> 
> provide a fallback clock lookup approach in case the OF based clock
> lookup for the PSC FIFO fails, this allows for successful operation in
> the presence of an outdated device tree which lacks clock specs
> 
> Cc: Greg Kroah-Hartman 
> Cc: Jiri Slaby 
> Cc: linux-ser...@vger.kernel.org
> Acked-by: Greg Kroah-Hartman  # for v4
> Signed-off-by: Gerhard Sittig 
> ---
> Greg, the addition since v4 is the clk_get_sys() call for the 'ipg'
> clock item (backwards compat for device trees w/o clock specs)
> 
> ---
>  drivers/tty/serial/mpc52xx_uart.c |   50 
> -
>  1 file changed, 44 insertions(+), 6 deletions(-)

applied to next. Thanks!

Anatolij
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Re: [PATCH v6 11/17] USB: fsl-mph-dr-of: adjust for OF based clock lookup

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:31 +0100
Gerhard Sittig  wrote:

> after device tree based clock lookup became available, the peripheral
> driver need no longer construct clock names which include the component
> index -- remove the "usb%d_clk" template, always use "ipg" instead
> 
> Cc: Greg Kroah-Hartman 
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Gerhard Sittig 
> ---
>  drivers/usb/host/fsl-mph-dr-of.c |   13 +
>  1 file changed, 1 insertion(+), 12 deletions(-)

applied to next. Thanks!

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Re: [PATCH v6 12/17] mtd: mpc5121_nfc: adjust for OF based clock lookup

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:32 +0100
Gerhard Sittig  wrote:

> after device tree based clock lookup became available, the NAND
> flash driver need no longer use the previous global "nfc_clk" name,
> but should use the "ipg" clock name specific to the OF node
> 
> Cc: David Woodhouse 
> Cc: Artem Bityutskiy 
> Cc: linux-...@lists.infradead.org
> Signed-off-by: Gerhard Sittig 
> ---
>  drivers/mtd/nand/mpc5121_nfc.c |2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

applied to next. Thanks!

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Re: [PATCH v6 13/17] [media] fsl-viu: adjust for OF based clock lookup

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:33 +0100
Gerhard Sittig  wrote:

> after device tree based clock lookup became available, the VIU driver
> need no longer use the previous global "viu_clk" name, but should use
> the "ipg" clock name specific to the OF node
> 
> Cc: Mauro Carvalho Chehab 
> Cc: linux-me...@vger.kernel.org
> Signed-off-by: Gerhard Sittig 
> ---
>  drivers/media/platform/fsl-viu.c |2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

applied to next. Thanks!

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Re: [PATCH v6 14/17] net: can: mscan: adjust to common clock support for mpc512x

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:34 +0100
Gerhard Sittig  wrote:

> implement a .get_clock() callback for the MPC512x platform which uses
> the common clock infrastructure (eliminating direct access to the clock
> control registers from within the CAN network driver), and provide the
> corresponding .put_clock() callback to release resources after use
> 
> acquire both the clock items for register access ("ipg") as well as for
> wire communication ("can")
> 
> keep the previous implementation of MPC512x support in place during
> migration, this results in a readable diff of the change
> 
> this change is neutral to the MPC5200 platform
> 
> Cc: Wolfgang Grandegger 
> Cc: Marc Kleine-Budde 
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Gerhard Sittig 
> ---
>  drivers/net/can/mscan/mpc5xxx_can.c |  179 
> +++
>  1 file changed, 179 insertions(+)

applied to next. Thanks!

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Re: [PATCH v6 15/17] net: can: mscan: remove non-CCF code for MPC512x

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:35 +0100
Gerhard Sittig  wrote:

> transition to the common clock framework has completed and the PPC_CLOCK
> is no longer available for the MPC512x platform, remove the now obsolete
> code path of the mpc5xxx mscan driver which accessed clock control module
> registers directly
> 
> Cc: Wolfgang Grandegger 
> Cc: Marc Kleine-Budde 
> Cc: linux-...@vger.kernel.org
> Signed-off-by: Gerhard Sittig 
> ---
>  drivers/net/can/mscan/mpc5xxx_can.c |  141 
> ---
>  1 file changed, 141 deletions(-)

applied to next. Thanks!

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Re: [PATCH v6 16/17] powerpc/mpc512x: improve DIU related clock setup

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:36 +0100
Gerhard Sittig  wrote:

> adapt the DIU clock initialization to the COMMON_CLK approach:
> device tree based clock lookup, prepare and unprepare for clocks,
> work with frequencies not dividers, call the appropriate clk_*()
> routines and don't access CCM registers
> 
> the "best clock" determination now completely relies on the
> platform's clock driver to pick a frequency close to what the
> caller requests, and merely checks whether the desired frequency
> was met (fits the tolerance of the monitor)
> 
> this approach shall succeed upon first try in the usual case,
> will test a few less desirable yet acceptable frequencies in
> edge cases, and will fallback to "best effort" if none of the
> previously tried frequencies pass the test
> 
> provide a fallback clock lookup approach in case the OF based clock
> lookup for the DIU fails, this allows for successful operation in
> the presence of an outdated device tree which lacks clock specs
> 
> Cc: Anatolij Gustschin 
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/platforms/512x/mpc512x_shared.c |  169 
> ++
>  1 file changed, 92 insertions(+), 77 deletions(-)

applied to next. Thanks!

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Re: [PATCH] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB

2013-12-07 Thread christophe leroy


Le 06/12/2013 20:09, Scott Wood a écrit :

On Wed, 2013-11-27 at 12:04 +0100, Christophe Leroy wrote:

Today, the only way to load kernels whose size is greater than 8Mbytes is to
activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
limited to 8Mbytes. This patch sets up 24 Mbytes of initial memory regardless
of whether CONFIG_PIN_TLB is active or not. It allows to load "big" kernels
(for instance when activating CONFIG_LOCKDEP_SUPPORT) without having
to activate CONFIG_PIN_TLB.

So, what happens on boards with less than 24M memory present?  Even if
you avoid explicitly referencing those addresses, what if there is a
speculative access -- or does 8xx not do that?

-Scott



Function setup_initial_memory_limit() in mm/init_32.c defines the limits 
based on the parameters given by the bootloader.
As far as I know, the 8xx doesn't do speculative access just because an 
area is loaded in a TLB Entry.


Christophe

---
Ce courrier électronique ne contient aucun virus ou logiciel malveillant parce 
que la protection avast! Antivirus est active.
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Re: [PATCH v6 17/17] clk: mpc512x: remove migration support workarounds

2013-12-07 Thread Anatolij Gustschin
On Sat, 30 Nov 2013 23:51:37 +0100
Gerhard Sittig  wrote:

> this change removes workarounds which have become obsolete after
> migration to common clock support has completed
> - remove clkdev registration calls (compatibility clock item aliases)
>   after all peripheral drivers were adjusted for device tree based
>   clock lookup
> - remove pre-enable workarounds after all peripheral drivers were
>   adjusted to acquire their respective clock items
> 
> workarounds for these clock items get removed:  FEC (ethernet), I2C,
> PSC (UART, SPI), PSC FIFO, USB, NFC (NAND flash), VIU (video capture),
> BDLC (CAN), CAN MCLK, DIU (video output)
> 
> these clkdev registered names won't be provided any longer by the
> MPC512x platform's clock driver:  "psc%d_mclk", "mscan%d_mclk",
> "usb%d_clk", "nfc_clk", "viu_clk", "sys_clk", "ref_clk"
> 
> the pre-enable workaround for PCI remains, but depends on the presence
> of PCI related device tree nodes (disables the PCI clock in the absence
> of PCI nodes, keeps the PCI clock enabled in the presence of nodes) --
> moving clock acquisition into the peripheral driver isn't possible for
> PCI because its initialization takes place before the platform clock
> driver gets initialized, thus the clock provider isn't available then
> 
> Cc: Mike Turquette 
> Cc: Anatolij Gustschin 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Signed-off-by: Gerhard Sittig 
> ---
>  arch/powerpc/platforms/512x/clock-commonclk.c |   50 
> -
>  1 file changed, 16 insertions(+), 34 deletions(-)

applied to next. Thanks!

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Re: [PATCH] powernv: fix VFIO support with PHB3

2013-12-07 Thread Thadeu Lima de Souza Cascardo
On Sat, Dec 07, 2013 at 11:58:44AM +1100, Alexey Kardashevskiy wrote:
> On 12/06/2013 11:21 PM, Thadeu Lima de Souza Cascardo wrote:
> > I have recently found out that no iommu_groups could be found under
> > /sys/ on a P8. That prevents PCI passthrough from working.
> > 
> > During my investigation, I found out there seems to be a missing
> > iommu_register_group for PHB3. The following patch seems to fix the
> > problem. After applying it, I see iommu_groups under
> > /sys/kernel/iommu_groups/, and can also bind vfio-pci to an adapter,
> > which gives me a device at /dev/vfio/.
> > 
> > Signed-off-by: Thadeu Lima de Souza Cascardo 
> > ---
> >  arch/powerpc/platforms/powernv/pci-ioda.c |1 +
> >  1 files changed, 1 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
> > b/arch/powerpc/platforms/powernv/pci-ioda.c
> > index 084cdfa..2c6d173 100644
> > --- a/arch/powerpc/platforms/powernv/pci-ioda.c
> > +++ b/arch/powerpc/platforms/powernv/pci-ioda.c
> > @@ -720,6 +720,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb 
> > *phb,
> > tbl->it_type = TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE;
> > }
> > iommu_init_table(tbl, phb->hose->node);
> > +   iommu_register_group(tbl, pci_domain_nr(pe->pbus), pe->pe_number);
> >  
> > if (pe->pdev)
> > set_iommu_table_base(&pe->pdev->dev, tbl);
> 
> 
> This does not seem absolutely right - normally set_iommu_table_base() is
> replaced with set_iommu_table_base_and_group() or you will not see some
> devices in a group and this may make VFIO unhappy.

Alexey,

Your patch "[PATCH v9] PPC: POWERNV: move iommu_add_device earlier" is
not upstream yet. It calls set_iommu_table_base_and_group properly.
However, without calling iommu_register_group, there is no group to add
the device to.

Compare to pnv_pci_ioda_setup_dma_pe which calls iommu_register_group
too. My patch fixes this discrepancy between IODA and IODA2.

Regards.
Cascardo.

> 
> But - if every single device gets assigned to some group, then we can push
> this to Frobisher and let people test in on power8.
> 
> 
> 
> -- 
> Alexey

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questions: second of the 2 pcie controllers does not scan the bus.

2013-12-07 Thread Ruchika


Any ideas/pointers anyone ?
Thank you
On 12/6/2013 6:48 PM, Ruchika wrote:


Hi,
I am working with an p4080 based board. I am trying to get 2 PCIE
controllers probed properly.

In uboot I have no problems scanning and discovering what is connected
to both controllers/PCI bridges.

For both PCIE1/2 uboot sets up the Primary, secondary and Subordinate
bus numbers to 0,1,1 respectively.

When linux boots up and probes the controllers, PCIE1 is probed and the
bridge scanned properly but PCIE2 is probed at the bridge but not
attempted a scan.
I see this message
"pci 0001:02:00.0: bridge configuration invalid ([bus 01-01]),
reconfiguring
"

I updated uboot to set the secondary and subordinate numbers to 2 (left
the primary number to 0) and a subsequent kernel boot scanned the bus
for PCIE2 successfully.
I found these numbers to be very critical since the device tree blob
(bus-range) for pci is also based off these.

I'd like to get a good fix rather than the uboot hack and get better
understanding of the problem. If there are any pointers someone could
provide it would be awesome.

Thank you
Regards
Ruchika




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Re: [PATCH] powerpc: Fix PTE page address mismatch in pgtable ctor/dtor

2013-12-07 Thread Hong H. Pham

There is a typo in the v2 patch, please disregard it.  The v3 patch with
the correction will follow.

Thanks,
Hong

On 12/06/2013 11:15 AM, Hong H. Pham wrote:

Hi Aneesh,

On 12/06/2013 05:38 AM, Aneesh Kumar K.V wrote:


can you also specifiy the config details here. ie, 4K page size functions
are broken ?


My PPC64 config has SMP and 4K page size enabled.  I re-tested with 64K page 
size,
and the problem is not present.

I have added a note that this problem affects only PPC32 and PPC64 SMP kernels.
On PPC64, the problem is limited to 4K page size.


make it closer to what it was before,

pgtable_page_dtor(table);
pgtable_free_tlb(tlb, page_address(table), 0);

This is what we had before

-static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage,
- unsigned long address)
-{
-   tlb_flush_pgtable(tlb, address);
-   pgtable_page_dtor(ptepage);
-   pgtable_free_tlb(tlb, page_address(ptepage), 0);
-}


-aneesh



Done.

Thanks,
Hong

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[PATCH v3] powerpc: Fix PTE page address mismatch in pgtable ctor/dtor

2013-12-07 Thread Hong H. Pham
From: "Hong H. Pham" 

In pte_alloc_one(), pgtable_page_ctor() is passed an address that has
not been converted by page_address() to the newly allocated PTE page.

When the PTE is freed, __pte_free_tlb() calls pgtable_page_dtor()
with an address to the PTE page that has been converted by page_address().
The mismatch in the PTE's page address causes pgtable_page_dtor() to access
invalid memory, so resources for that PTE (such as the page lock) is not
properly cleaned up.

On PPC32, only SMP kernels are affected.

On PPC64, only SMP kernels with 4K page size are affected.

This bug was introduced by commit d614bb041209fd7cb5e4b35e11a7b2f6ee8f62b8
"powerpc: Move the pte free routines from common header".

On a preempt-rt kernel, a spinlock is dynamically allocated for each
PTE in pgtable_page_ctor().  When the PTE is freed, calling
pgtable_page_dtor() with a mismatched page address causes a memory leak,
as the pointer to the PTE's spinlock is bogus.

On mainline, there isn't any immediately obvious symptoms, but the
problem still exists here.

Fixes: d614bb041209fd7c "powerpc: Move the pte free routes from common header"
Cc: Paul Mackerras 
Cc: Aneesh Kumar K.V 
Cc: Benjamin Herrenschmidt 
Cc: linux-stable  # v3.10+
Signed-off-by: Hong H. Pham 
---
 arch/powerpc/include/asm/pgalloc-32.h | 6 ++
 arch/powerpc/include/asm/pgalloc-64.h | 6 ++
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/pgalloc-32.h 
b/arch/powerpc/include/asm/pgalloc-32.h
index 27b2386..842846c 100644
--- a/arch/powerpc/include/asm/pgalloc-32.h
+++ b/arch/powerpc/include/asm/pgalloc-32.h
@@ -84,10 +84,8 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
  unsigned long address)
 {
-   struct page *page = page_address(table);
-
tlb_flush_pgtable(tlb, address);
-   pgtable_page_dtor(page);
-   pgtable_free_tlb(tlb, page, 0);
+   pgtable_page_dtor(table);
+   pgtable_free_tlb(tlb, page_address(table), 0);
 }
 #endif /* _ASM_POWERPC_PGALLOC_32_H */
diff --git a/arch/powerpc/include/asm/pgalloc-64.h 
b/arch/powerpc/include/asm/pgalloc-64.h
index f65e27b..256d6f8 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -144,11 +144,9 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
 static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
  unsigned long address)
 {
-   struct page *page = page_address(table);
-
tlb_flush_pgtable(tlb, address);
-   pgtable_page_dtor(page);
-   pgtable_free_tlb(tlb, page, 0);
+   pgtable_page_dtor(table);
+   pgtable_free_tlb(tlb, page_address(table), 0);
 }
 
 #else /* if CONFIG_PPC_64K_PAGES */
-- 
1.8.3.2

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Re: [PATCH v3] powerpc: Fix PTE page address mismatch in pgtable ctor/dtor

2013-12-07 Thread Benjamin Herrenschmidt
On Sat, 2013-12-07 at 09:06 -0500, Hong H. Pham wrote:

> diff --git a/arch/powerpc/include/asm/pgalloc-32.h 
> b/arch/powerpc/include/asm/pgalloc-32.h
> index 27b2386..842846c 100644
> --- a/arch/powerpc/include/asm/pgalloc-32.h
> +++ b/arch/powerpc/include/asm/pgalloc-32.h
> @@ -84,10 +84,8 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb,
>  static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
> unsigned long address)
>  {
> - struct page *page = page_address(table);
> -
>   tlb_flush_pgtable(tlb, address);
> - pgtable_page_dtor(page);
> - pgtable_free_tlb(tlb, page, 0);
> + pgtable_page_dtor(table);
> + pgtable_free_tlb(tlb, page_address(table), 0);
>  }

Ok so your description of the problem confused me a bit, but I see that
in the !64K page, pgtable_t is already a struct page so yes, the
page_address() call here is bogus.

However, I also noticed that in the 64k page case, we don't call the dto
at all. Is that a problem ?

Also, Aneesh, shouldn't we just fix the disconnect here and have
pgtable_t always be the same type ? The way this is now is confusing
and error prone...

>  #endif /* _ASM_POWERPC_PGALLOC_32_H */
> diff --git a/arch/powerpc/include/asm/pgalloc-64.h 
> b/arch/powerpc/include/asm/pgalloc-64.h
> index f65e27b..256d6f8 100644
> --- a/arch/powerpc/include/asm/pgalloc-64.h
> +++ b/arch/powerpc/include/asm/pgalloc-64.h
> @@ -144,11 +144,9 @@ static inline void pgtable_free_tlb(struct mmu_gather 
> *tlb,
>  static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
> unsigned long address)
>  {
> - struct page *page = page_address(table);
> -
>   tlb_flush_pgtable(tlb, address);
> - pgtable_page_dtor(page);
> - pgtable_free_tlb(tlb, page, 0);
> + pgtable_page_dtor(table);
> + pgtable_free_tlb(tlb, page_address(table), 0);
>  }
>  
>  #else /* if CONFIG_PPC_64K_PAGES */

Ben.


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Re: [PATCH v3] powerpc: Fix PTE page address mismatch in pgtable ctor/dtor

2013-12-07 Thread Benjamin Herrenschmidt
On Sun, 2013-12-08 at 07:27 +1100, Benjamin Herrenschmidt wrote:
> On Sat, 2013-12-07 at 09:06 -0500, Hong H. Pham wrote:
> 
> > diff --git a/arch/powerpc/include/asm/pgalloc-32.h 
> > b/arch/powerpc/include/asm/pgalloc-32.h
> > index 27b2386..842846c 100644
> > --- a/arch/powerpc/include/asm/pgalloc-32.h
> > +++ b/arch/powerpc/include/asm/pgalloc-32.h
> > @@ -84,10 +84,8 @@ static inline void pgtable_free_tlb(struct mmu_gather 
> > *tlb,
> >  static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
> >   unsigned long address)
> >  {
> > -   struct page *page = page_address(table);
> > -
> > tlb_flush_pgtable(tlb, address);
> > -   pgtable_page_dtor(page);
> > -   pgtable_free_tlb(tlb, page, 0);
> > +   pgtable_page_dtor(table);
> > +   pgtable_free_tlb(tlb, page_address(table), 0);
> >  }
> 
> Ok so your description of the problem confused me a bit, but I see that
> in the !64K page, pgtable_t is already a struct page so yes, the
> page_address() call here is bogus.
> 
> However, I also noticed that in the 64k page case, we don't call the dto
> at all. Is that a problem ?

Actually we do, just elsewhere... ignore the above.

> Also, Aneesh, shouldn't we just fix the disconnect here and have
> pgtable_t always be the same type ? The way this is now is confusing
> and error prone...
> 
> >  #endif /* _ASM_POWERPC_PGALLOC_32_H */
> > diff --git a/arch/powerpc/include/asm/pgalloc-64.h 
> > b/arch/powerpc/include/asm/pgalloc-64.h
> > index f65e27b..256d6f8 100644
> > --- a/arch/powerpc/include/asm/pgalloc-64.h
> > +++ b/arch/powerpc/include/asm/pgalloc-64.h
> > @@ -144,11 +144,9 @@ static inline void pgtable_free_tlb(struct mmu_gather 
> > *tlb,
> >  static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
> >   unsigned long address)
> >  {
> > -   struct page *page = page_address(table);
> > -
> > tlb_flush_pgtable(tlb, address);
> > -   pgtable_page_dtor(page);
> > -   pgtable_free_tlb(tlb, page, 0);
> > +   pgtable_page_dtor(table);
> > +   pgtable_free_tlb(tlb, page_address(table), 0);
> >  }
> >  
> >  #else /* if CONFIG_PPC_64K_PAGES */
> 
> Ben.
> 
> 
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Re: [PATCH] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB

2013-12-07 Thread Benjamin Herrenschmidt
On Sat, 2013-12-07 at 10:39 +0100, christophe leroy wrote:
> Function setup_initial_memory_limit() in mm/init_32.c defines the
> limits 
> based on the parameters given by the bootloader.
> As far as I know, the 8xx doesn't do speculative access just because
> an area is loaded in a TLB Entry.

Speculative accesses are ... speculative :-) The address used for such
an access can be anything really. So yes, architecturally, powerpc
processors can access *anything* speculatively just because there's a
valid non-garded translation.

Whether the 8xx does it at all, I don't know. 44x originally did but
that was so buggy that we had to force G on all mappings (until later
versions of the core just burned the feature out). Pretty much all other
powerpc's do it.

Cheers,
Ben.


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