Re: [PATCH 7/7] cxl: Add psl9 specific code
On 02/02/17 04:30, Christophe Lombard wrote: The new Coherent Accelerator Interface Architecture, level 2, for the IBM POWER9 brings new content and features: - POWER9 Service Layer - Registers - Radix mode - Process element entry - Dedicated-Shared Process Programming Model - Translation Fault Handling - CAPP - Memory Context ID If a valid mm_struct is found the memory context id is used for each transaction associated with the process handle. The PSL uses the context ID to find the corresponding process element. Signed-off-by: Christophe Lombard Patch needs rebasing, see: https://github.com/ajdlinux/linux/commit/642ec862c7074c19765a2dd385dc5fd1751104b4 -- Andrew Donnellan OzLabs, ADL Canberra andrew.donnel...@au1.ibm.com IBM Australia Limited
Re: [PATCH 5/7] cxl: Rename some psl8 specific functions
On 02/02/17 04:30, Christophe Lombard wrote:
Rename a few functions, changing the '_psl' suffix to '_psl8', to make
clear that the implementation is psl8 specific.
Those functions will have an equivalent implementation for the psl9 in
a later patch.
Signed-off-by: Christophe Lombard
This patch needs rebasing, I've done it at:
https://github.com/ajdlinux/linux/commit/ff6837cfae79d51829db824e4b914c9f1e76a9c1
Possibly could be squashed into the previous patch, but imho it's fine
as is.
Reviewed-by: Andrew Donnellan
@@ -873,26 +873,25 @@ struct cxl_irq_info {
};
void cxl_assign_psn_space(struct cxl_context *ctx);
-int cxl_invalidate_all_psl(struct cxl *adapter);
-irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info
*irq_info);
-irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info
*irq_info);
+int cxl_invalidate_all_psl8(struct cxl *adapter);
+irqreturn_t cxl_irq_psl8(int irq, struct cxl_context *ctx, struct cxl_irq_info
*irq_info);
+irqreturn_t cxl_fail_irq_psl8(struct cxl_afu *afu, struct cxl_irq_info
*irq_info);
int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler,
void *cookie, irq_hw_number_t *dest_hwirq,
unsigned int *dest_virq, const char *name);
int cxl_check_error(struct cxl_afu *afu);
int cxl_afu_slbia(struct cxl_afu *afu);
-int cxl_tlb_slb_invalidate(struct cxl *adapter);
This isn't a rename. :)
--
Andrew Donnellan OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com IBM Australia Limited
Re: [PATCH 4/7] cxl: Update implementation service layer
On 02/02/17 04:30, Christophe Lombard wrote:
The service layer API (in cxl.h) lists some low-level functions whose
implementation is different on PSL8, PSL9 and XSL. Each
environment implements its own functions, and the common code uses
them through function pointers, defined in cxl_service_layer_ops.
Signed-off-by: Christophe Lombard
The commit message could explain a bit more clearly what's actually
being changed.
This patch needs to be rebased, see:
https://github.com/ajdlinux/linux/commit/ff21009bb0bac317410005c3a736e5021868cb99
Otherwise the patch seems fine.
Reviewed-by: Andrew Donnellan
---
drivers/misc/cxl/cxl.h | 33 ++
drivers/misc/cxl/debugfs.c | 16 +++
drivers/misc/cxl/guest.c | 2 +-
drivers/misc/cxl/irq.c | 2 +-
drivers/misc/cxl/native.c | 50 +++---
drivers/misc/cxl/pci.c | 47 +--
6 files changed, 97 insertions(+), 53 deletions(-)
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index e53ce9d..96d89cb 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -550,13 +550,23 @@ struct cxl_context {
struct mm_struct *mm;
};
+struct cxl_irq_info;
+
struct cxl_service_layer_ops {
int (*adapter_regs_init)(struct cxl *adapter, struct pci_dev *dev);
+ int (*invalidate_all)(struct cxl *adapter);
int (*afu_regs_init)(struct cxl_afu *afu);
+ int (*sanitise_afu_regs)(struct cxl_afu *afu);
int (*register_serr_irq)(struct cxl_afu *afu);
void (*release_serr_irq)(struct cxl_afu *afu);
- void (*debugfs_add_adapter_sl_regs)(struct cxl *adapter, struct dentry
*dir);
- void (*debugfs_add_afu_sl_regs)(struct cxl_afu *afu, struct dentry
*dir);
+ irqreturn_t (*handle_interrupt)(int irq, struct cxl_context *ctx,
struct cxl_irq_info *irq_info);
+ irqreturn_t (*fail_irq)(struct cxl_afu *afu, struct cxl_irq_info
*irq_info);
+ int (*activate_dedicated_process)(struct cxl_afu *afu);
+ int (*attach_afu_directed)(struct cxl_context *ctx, u64 wed, u64 amr);
+ int (*attach_dedicated_process)(struct cxl_context *ctx, u64 wed, u64
amr);
+ void (*update_dedicated_ivtes)(struct cxl_context *ctx);
+ void (*debugfs_add_adapter_regs)(struct cxl *adapter, struct dentry
*dir);
+ void (*debugfs_add_afu_regs)(struct cxl_afu *afu, struct dentry *dir);
void (*psl_irq_dump_registers)(struct cxl_context *ctx);
void (*err_irq_dump_registers)(struct cxl *adapter);
void (*debugfs_stop_trace)(struct cxl *adapter);
@@ -800,6 +810,11 @@ int afu_register_irqs(struct cxl_context *ctx, u32 count);
void afu_release_irqs(struct cxl_context *ctx, void *cookie);
void afu_irq_name_free(struct cxl_context *ctx);
+int cxl_attach_afu_directed_psl(struct cxl_context *ctx, u64 wed, u64 amr);
+int cxl_activate_dedicated_process_psl(struct cxl_afu *afu);
+int cxl_attach_dedicated_process_psl(struct cxl_context *ctx, u64 wed, u64
amr);
+void cxl_update_dedicated_ivtes_psl(struct cxl_context *ctx);
+
int cxl_debugfs_init(void);
void cxl_debugfs_exit(void);
int cxl_debugfs_adapter_add(struct cxl *adapter);
@@ -858,7 +873,9 @@ struct cxl_irq_info {
};
void cxl_assign_psn_space(struct cxl_context *ctx);
-irqreturn_t cxl_irq(int irq, struct cxl_context *ctx, struct cxl_irq_info
*irq_info);
+int cxl_invalidate_all_psl(struct cxl *adapter);
+irqreturn_t cxl_irq_psl(int irq, struct cxl_context *ctx, struct cxl_irq_info
*irq_info);
+irqreturn_t cxl_fail_irq_psl(struct cxl_afu *afu, struct cxl_irq_info
*irq_info);
int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler,
void *cookie, irq_hw_number_t *dest_hwirq,
unsigned int *dest_virq, const char *name);
@@ -870,12 +887,12 @@ int cxl_data_cache_flush(struct cxl *adapter);
int cxl_afu_disable(struct cxl_afu *afu);
int cxl_psl_purge(struct cxl_afu *afu);
-void cxl_debugfs_add_adapter_psl_regs(struct cxl *adapter, struct dentry *dir);
-void cxl_debugfs_add_adapter_xsl_regs(struct cxl *adapter, struct dentry *dir);
-void cxl_debugfs_add_afu_psl_regs(struct cxl_afu *afu, struct dentry *dir);
-void cxl_native_psl_irq_dump_regs(struct cxl_context *ctx);
+void cxl_debugfs_add_adapter_regs_psl(struct cxl *adapter, struct dentry *dir);
+void cxl_debugfs_add_adapter_regs_xsl(struct cxl *adapter, struct dentry *dir);
+void cxl_debugfs_add_afu_regs_psl(struct cxl_afu *afu, struct dentry *dir);
+void cxl_native_irq_dump_regs_psl(struct cxl_context *ctx);
void cxl_native_err_irq_dump_regs(struct cxl *adapter);
-void cxl_stop_trace(struct cxl *cxl);
+void cxl_stop_trace_psl(struct cxl *cxl);
int cxl_pci_vphb_add(struct cxl_afu *afu);
void cxl_pci_vphb_remove(struct cxl_afu *afu);
void cxl_release_mapping(struct cxl_context *ctx);
diff --git a/drivers/misc/cxl/debugfs.c b/drivers/misc/cxl/debugfs.c
index 9c06ac8..4848ebf 100644
--- a/d
Re: [PATCH 1/5] selftests: Fix selftests build to just build, not run tests
Shuah Khan writes: > Hi Bamovar, > > Your original series badly broke the selftest build. I can no longer > build individual tests. For example: > > cd breakpoints/ > shuah@shuah-XPS-13-9350:/lkml/linux_4.11/tools/testing/selftests/breakpoints$ > make > gcc breakpoint_test.c -o /breakpoint_test > /usr/bin/ld: cannot open output file /breakpoint_test: Permission denied > collect2: error: ld returned 1 exit status > ../lib.mk:54: recipe for target '/breakpoint_test' failed > make: *** [/breakpoint_test] Error 1 I also got a report of that just yesterday. You can do: $ cd tools/testing/selftests ; make TARGETS=breakpoints But it's not ideal. > commit a8ba798bc8ec663cf02e80b0dd770324de9bafd9 > Author: bamvor.zhangj...@huawei.com > Date: Tue Nov 29 19:55:52 2016 +0800 > > selftests: enable O and KBUILD_OUTPUT > > I believe the above patch is one of the suspects. Michael fixed > some of the problems in this patch and others he sent. It is that patch which caused it yes. > At the moment individual tests will not build. > tools/testing/selftests/x86$ make > Makefile:44: warning: overriding recipe for target 'clean' > ../lib.mk:51: warning: ignoring old recipe for target 'clean' > gcc -m64 -o /single_step_syscall_64 -O2 -g -std=gnu99 -pthread -Wall > single_step_syscall.c -lrt -ldl > /usr/bin/ld: cannot open output file /single_step_syscall_64: Permission > denied > collect2: error: ld returned 1 exit status > Makefile:50: recipe for target '/single_step_syscall_64' failed > make: *** [/single_step_syscall_64] Error 1 > > > My guess is OUTPUT doesn't resolve in individual builds from the test > directory. > We have to get this fixed for 4.11-rc1 Yeah, OUTPUT is passed down from the top-level Makefile. > Simply Reverting a8ba798bc8ec663cf02e80b0dd770324de9bafd9 doesn't work. > Michael's patches depend on this. So anyway, please let me know if you > can fix this quickly. I am going to be trying a few things today as well. This seems to work, but needs some testing with and without OUTPUT set. Basically if OUTPUT is not set, assume the current directory. It should only take effect when someone builds from an individual directory, because if you build from the top level OUTPUT is already set. diff --git a/tools/testing/selftests/lib.mk b/tools/testing/selftests/lib.mk index ce96d80ad64f..9087fa949e82 100644 --- a/tools/testing/selftests/lib.mk +++ b/tools/testing/selftests/lib.mk @@ -2,6 +2,8 @@ # Makefile can operate with or without the kbuild infrastructure. CC := $(CROSS_COMPILE)gcc +OUTPUT ?= $(PWD) + TEST_GEN_PROGS := $(patsubst %,$(OUTPUT)/%,$(TEST_GEN_PROGS)) TEST_GEN_FILES := $(patsubst %,$(OUTPUT)/%,$(TEST_GEN_FILES)) cheers
[PATCH kernel] powerpc/powernv: Fix clobbered MSR
If CONFIG_DEBUG_INFO_SPLIT is not set but CONFIG_DEBUG_INFO is,
the kernel makefile just adds "-g" and the scripts/gcc-goto.sh test for
the "asm goto ("" entry)" support succedes and adds
-DCC_HAVE_ASM_GOTO to KBUILD_CFLAGS/KBUILD_AFLAGS. This effectively
makes OPAL_BRANCH() a noop (or something similar).
With CONFIG_DEBUG_INFO_SPLIT=y, the makefile adds "-gsplit-dwarf" which
somehow makes the scripts/gcc-goto.sh test fail and not have
CC_HAVE_ASM_GOTO defined so the alternative OPAL_BRANCH() is used
and this particular chunk clobbers r12 where the parenting code -
OPAL_CALL() - stores MSR; as the result, the kernel oops'es right after
early_setup() because of broken MSR.
This replaces r12 with r11 which is overwritten right after
OPAL_BRANCH(opal_tracepoint_entry) anyway.
I used gcc 5.4.1 20161205 built from sha1 ffadbf3ae29.
Fixes: ab9bad0ead9a ("powerpc/powernv: Remove separate entry for OPAL real mode
calls")
Suggested-by: Paul Mackerras
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/opal-wrappers.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S
b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 6693f75e93d1..da8a0f7a035c 100644
--- a/arch/powerpc/platforms/powernv/opal-wrappers.S
+++ b/arch/powerpc/platforms/powernv/opal-wrappers.S
@@ -39,8 +39,8 @@ opal_tracepoint_refcount:
BEGIN_FTR_SECTION; \
b 1f; \
END_FTR_SECTION(0, 1); \
- ld r12,opal_tracepoint_refcount@toc(r2); \
- cmpdi r12,0; \
+ ld r11,opal_tracepoint_refcount@toc(r2); \
+ cmpdi r11,0; \
bne-LABEL; \
1:
--
2.11.0
Re: [PATCH v2] powerpc: A new cache geometry aux vectors
Paul Clarke writes: > On 02/02/2017 12:22 AM, Benjamin Herrenschmidt wrote: >> This adds AUX vectors for the L1I,D, L2 and L3 cache levels >> providing for each cache level the size of the cache in bytes >> and the geometry (line size and number of ways). >> >> We chose to not use the existing alpha/sh definition which >> packs all the information in a single entry per cache level as >> it is too restricted to represent some of the geometries used >> on POWER. >> >> Signed-off-by: Benjamin Herrenschmidt >> --- >> >> v2. Remove some leftovers and fix 32-bit build >> >> Paul, can you test & ack this please ? It replaces the last patch of >> my previous series (the rest is identical). > > Sorry for the delay on this, I totally missed this e-mail until this week. > > I tested this with the Power Functional Simulator (a.k.a. Mambo), with > a fairly recent 4.9 kernel from the powerpc git tree. You mean 4.9 plus this patch? > Using Mambo-P8, I see what I expect for cache line size, but associativity is > 0: > AT_L1I_CACHESIZE: 32768 (0x8000) > AT_L1I_CACHEGEOMETRY: associativity 0; line size 128 > AT_L1D_CACHESIZE: 32768 (0x8000) > AT_L1D_CACHEGEOMETRY: associativity 0; line size 128 > AT_L2_CACHESIZE: 524288 (0x8) > AT_L2_CACHEGEOMETRY: associativity 0; line size 128 > AT_L3_CACHESIZE: 8388608 (0x80) > AT_L3_CACHEGEOMETRY: associativity 0; line size 128 > > ...shouldn't associativity be 8 for all levels? Yes. I fixed it in v3: http://patchwork.ozlabs.org/patch/723576/ Which is now merged in Linus tree, so please test that. Can you try the test program I wrote (which may also have bugs): http://patchwork.ozlabs.org/patch/724418/ cheers
[Patch v5] powerpc/powernv: add hdat attribute to sysfs
The HDAT data area is consumed by skiboot and turned into a device-tree.
In some cases we would like to look directly at the HDAT, so this patch
adds a sysfs node to allow it to be viewed. This is not possible through
/dev/mem as it is reserved memory which is stopped by the /dev/mem filter.
This patch also adds sysfs nodes for all properties in the device-tree
under /ibm,opal/firmware/exports.
Signed-off-by: Matt Brown
---
Changes between v4 and v5:
- all properties under /ibm,opal/firmware/exports in the device-tree
are now added as new sysfs nodes
- the new sysfs nodes are now placed under /opal/exports
- added a generic read function for all exported attributes
---
arch/powerpc/platforms/powernv/opal.c | 84 +++
1 file changed, 84 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index 2822935..fbb8264 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -36,6 +36,9 @@
/* /sys/firmware/opal */
struct kobject *opal_kobj;
+/* /sys/firmware/opal/exports */
+struct kobject *opal_export_kobj;
+
struct opal {
u64 base;
u64 entry;
@@ -604,6 +607,82 @@ static void opal_export_symmap(void)
pr_warn("Error %d creating OPAL symbols file\n", rc);
}
+
+static int opal_exports_sysfs_init(void)
+{
+ opal_export_kobj = kobject_create_and_add("exports", opal_kobj);
+ if (!opal_export_kobj) {
+ pr_warn("kobject_create_and_add opal_exports failed\n");
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static ssize_t export_attr_read(struct file *fp, struct kobject *kobj,
+struct bin_attribute *bin_attr, char *buf,
+loff_t off, size_t count)
+{
+ return memory_read_from_buffer(buf, count, &off, bin_attr->private,
+ bin_attr->size);
+}
+
+static struct bin_attribute *exported_attrs;
+/*
+ * opal_export_attrs: creates a sysfs node for each property listed in
+ * the device-tree under /ibm,opal/firmware/exports/
+ * All new sysfs nodes are created under /opal/exports/.
+ * This allows for reserved memory regions (e.g. HDAT) to be read.
+ * The new sysfs nodes are only readable by root.
+ */
+static void opal_export_attrs(void)
+{
+ const __be64 *syms;
+ unsigned int size;
+ struct device_node *fw;
+ struct property *prop;
+ int rc;
+ int attr_count = 0;
+ int n = 0;
+
+ fw = of_find_node_by_path("/ibm,opal/firmware/exports");
+ if (!fw)
+ return;
+
+ for (prop = fw->properties; prop != NULL; prop = prop->next)
+ attr_count++;
+
+ if (attr_count > 2)
+ exported_attrs = kmalloc(sizeof(exported_attrs)*(attr_count-2),
+ __GFP_IO | __GFP_FS);
+
+
+ for_each_property_of_node(fw, prop) {
+
+ syms = of_get_property(fw, prop->name, &size);
+
+ if (!strcmp(prop->name, "name") ||
+ !strcmp(prop->name, "phandle"))
+ continue;
+
+ if (!syms || size != 2 * sizeof(__be64))
+ continue;
+
+ (exported_attrs+n)->attr.name = prop->name;
+ (exported_attrs+n)->attr.mode = 0400;
+ (exported_attrs+n)->read = export_attr_read;
+ (exported_attrs+n)->private = __va(be64_to_cpu(syms[0]));
+ (exported_attrs+n)->size = be64_to_cpu(syms[1]);
+
+ rc = sysfs_create_bin_file(opal_export_kobj, exported_attrs+n);
+ if (rc)
+ pr_warn("Error %d creating OPAL %s file\n", rc,
+ prop->name);
+ n++;
+ }
+
+}
+
static void __init opal_dump_region_init(void)
{
void *addr;
@@ -742,6 +821,11 @@ static int __init opal_init(void)
opal_msglog_sysfs_init();
}
+ rc = opal_exports_sysfs_init();
+ if (rc == 0) {
+ /* Export all properties */
+ opal_export_attrs();
+ }
/* Initialize platform devices: IPMI backend, PRD & flash interface */
opal_pdev_init("ibm,opal-ipmi");
opal_pdev_init("ibm,opal-flash");
--
2.9.3
Re: [PATCH] powerpc/perf: Add PROBENOP macro for debug
On Sun, Feb 19, 2017 at 01:28:34AM +0530, Madhavan Srinivasan wrote: > From PowerISA v2.07, architecture provides a special NOP > instruction called "Probe-Nop" defined as "and 0,0,0". > This form of "and" is reserved for use exclusively by the > Performance Monitor. > > Usage example: > > Add PROBENOP() macro to __tlbie() in hash_native_64.c to > verify the number of TLBIE. Power8 provides "PM_TLBIE_FIN" > PMU event (r30058) to count "tlbie finished". > > Power8 PMU event "PM_PROBE_NOP_DISP" (r40014) counts the > "ProbeNops dispatched". > > With modified kernel booted, output from perf: > > # ./perf stat -e r30058,r40014 ls > > Performance counter stats for 'ls': > > 7 r30058 > 7 r40014 > >0.003296959 seconds time elapsed > > Macro comes handy when want to count specific instructions > which may or may not have a PMU event. > > Signed-off-by: Madhavan Srinivasan > --- Acked-by: Balbir Singh
Re: [PATCH 1/5] powerpc/smp: use cpu_to_chip_id() to find siblings
On Thu, Mar 02, 2017 at 11:49:16AM +1100, Oliver O'Halloran wrote: > To determine which logical CPUs are on the same core the kernel uses the > ibm,chipid property from the device tree node associated with that cpu. > The lookup for this this information is currently open coded in both > traverse_siblings() and traverse_siblings_chip_id(). This patch replaces > these manual lookups with the existing cpu_to_chip_id() function. > > Signed-off-by: Oliver O'Halloran > --- Looks like a nice cleanup Balbir
Re: [RESEND-RFC v2 3/3] cxl: Reset freeze counters before adapter PERST for flashing new image
On 01/03/17 22:24, Vaibhav Jain wrote:
The patch resets the freeze counter on eeh_pe struct for PHB
associated with the cxl pci adapter. This would enable re-flashing of
the cxl-adapter beyond the default limit of 5.
Signed-off-by: Vaibhav Jain
Reviewed-by: Andrew Donnellan
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Changed new variable names inline with eeh code nomenclature.
- Removed the dev_info logging the PHB being reset. The log message is now
moved to eeh_handle_normal_event()
In eeh_pe_reset_freeze_counter() to be precise.
---
drivers/misc/cxl/pci.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index ce54dab..7960fd64 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include "cxl.h"
#include
@@ -1231,6 +1232,8 @@ static void cxl_pci_remove_afu(struct cxl_afu *afu)
int cxl_pci_reset(struct cxl *adapter)
{
struct pci_dev *dev = to_pci_dev(adapter->dev.parent);
+ struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
+ struct eeh_pe *pe = eeh_dev_to_pe(edev);
int rc;
if (adapter->perst_same_image) {
@@ -1244,6 +1247,17 @@ int cxl_pci_reset(struct cxl *adapter)
/* the adapter is about to be reset, so ignore errors */
cxl_data_cache_flush(adapter);
+ /* If loading a new image, reset freeze counters for the PHB
+* associated with the adapter.
+*/
+ if (pe && adapter->perst_loads_image) {
+ /* Find the pe associated with the device PHB */
+ while (pe->parent != NULL && (pe->type & EEH_PE_PHB) == 0)
+ pe = pe->parent;
+
+ eeh_pe_reset_freeze_counter(pe);
+ }
+
/* pcie_warm_reset requests a fundamental pci reset which includes a
* PERST assert/deassert. PERST triggers a loading of the image
* if "user" or "factory" is selected in sysfs */
--
Andrew Donnellan OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com IBM Australia Limited
Re: [RESEND-RFC v2 2/3] powerpc/eeh: Introduce function eeh_pe_reset_freeze_counter()
On 01/03/17 22:24, Vaibhav Jain wrote:
This patch introduces function eeh_pe_reset_freeze_counter() which can
be used to reset the PE's freeze count variable outside eeh code. This
is useful for devices that can acquire a different personality after
a PERST event (e.g FPGA Adapters). Presently an existing freeze
count for an adapter with personality N will be taken into account
when the adapter acquired personality N+1.
By calling eeh_pe_reset_freeze_counter() drivers can reset the freeze
counter for an adapter once it has acquired a new personality and
ideally wont be plagued by the failures similar to the one before.
Signed-off-by: Vaibhav Jain
LGTM
Reviewed-by: Andrew Donnellan
---
Change-log:
v1 -> v2
* Changes as suggested by Russell Currey:
- Suffixed function names with '()'
- Rephrased the description comment for functon eeh_pe_reset_freeze_counter()
- Inserted logging for PHB and PE number inside eeh_pe_reset_freeze_counter()
* Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to
avoid adding a header dependency to 'pci-bridge.h'. The function is
now marked as an exported gpl symbol.
---
arch/powerpc/include/asm/eeh.h | 5 +
arch/powerpc/kernel/eeh_pe.c | 17 +
2 files changed, 22 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 68806be..8dcfb88 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -266,6 +266,9 @@ struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
int eeh_add_to_parent_pe(struct eeh_dev *edev);
int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
int eeh_pe_update_freeze_counter(struct eeh_pe *pe);
+
+void eeh_pe_reset_freeze_counter(struct eeh_pe *pe);
+
void *eeh_pe_traverse(struct eeh_pe *root,
eeh_traverse_func fn, void *flag);
void *eeh_pe_dev_traverse(struct eeh_pe *root,
@@ -339,6 +342,8 @@ static inline int eeh_check_failure(const volatile void
__iomem *token)
return 0;
}
+static inline void eeh_pe_reset_freeze_counter(struct eeh_pe *pe) { }
+
#define eeh_dev_check_failure(x) (0)
static inline void eeh_addr_cache_build(void) { }
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index d367c16..75c781f 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -504,6 +504,23 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
}
/**
+ * eeh_pe_reset_freeze_counter - Resets the PE freeze counter
+ * @pe: EEH PE
+ *
+ * This function is useful while re-configuring an FPGA adapter
+ * as its about to acquire new a personality and you don't want
+ * freeze count to be carry forwarded. As such calling this function
+ * for regular pci devices might be a bad idea.
+ */
+void eeh_pe_reset_freeze_counter(struct eeh_pe *pe)
+{
+ pr_info("Resetting freeze count for PHB#%x-PE#%x\n",
+ pe->phb->global_number, pe->addr);
+ pe->freeze_count = 0;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_reset_freeze_counter);
+
+/**
* eeh_pe_update_freeze_counter - Update PE's frozen time stamp
* and freeze counter
* @pe: EEH PE
--
Andrew Donnellan OzLabs, ADL Canberra
andrew.donnel...@au1.ibm.com IBM Australia Limited
Re: [RESEND-RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
On 01/03/17 22:24, Vaibhav Jain wrote: This patch introduces a new function eeh_pe_update_freeze_counter() replacing existing function eeh_pe_update_time_stamp(). The new function also manages the value of reeze_count along with tstamp to track the number of times the PE roze in last one hour and if the freeze_count > eeh_max_freezes then eports an error(-ENOTRECOVERABLE) to indicate that the PE should be ermanently disabled. This patch should not introduce any behavioral change. Signed-off-by: Vaibhav Jain Thanks for addressing Russell's comments. Per Guilherme, your commit message is missing a few letters, a couple of minor style points below, otherwise: Reviewed-by: Andrew Donnellan /** - * eeh_pe_update_time_stamp - Update PE's frozen time stamp + * eeh_pe_update_freeze_counter - Update PE's frozen time stamp + * and freeze counter * @pe: EEH PE * - * We have time stamp for each PE to trace its time of getting - * frozen in last hour. The function should be called to update - * the time stamp on first error of the specific PE. On the other - * handle, we needn't account for errors happened in last hour. + * We have a freeze counter and time stamp for each PE to trace + * number of times the PE was frozen in the last hour. This function + * updates the PE's freeze counter and returns an error if its greater it's + * than eeh_max_freezes. The function should be called to once every + * time a specific PE freezes. "The function should be called every time the PE freezes" -- Andrew Donnellan OzLabs, ADL Canberra andrew.donnel...@au1.ibm.com IBM Australia Limited
[PATCH 5/5] powerpc/smp: Add Power9 scheduler topology
In previous generations of Power processors each core had a private L2
cache. The Power9 processor has a slightly different architecture where
the L2 cache is shared among pairs of cores rather than being completely
private.
Making the scheduler aware of this cache sharing allows the scheduler to
make more intelligent migration decisions. When one core in the pair is
overloaded tasks can be migrated to its paired core to improve throughput
without cache-refilling penality typically associated with task
migration.
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/kernel/smp.c | 44
1 file changed, 40 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 5571f30ff72d..5e1811b24415 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -673,7 +673,7 @@ static struct device_node *cpu_to_l2cache(int cpu)
return cache;
}
-static bool update_core_mask_by_l2(int cpu, bool onlining)
+static bool update_mask_by_l2(int cpu, bool onlining, struct cpumask
*(*mask_fn)(int))
{
const struct cpumask *mask = onlining ? cpu_online_mask :
cpu_present_mask;
struct device_node *l2_cache, *np;
@@ -689,7 +689,7 @@ static bool update_core_mask_by_l2(int cpu, bool onlining)
continue;
if (np == l2_cache)
- set_cpus_related(cpu, i, onlining, cpu_core_mask);
+ set_cpus_related(cpu, i, onlining, mask_fn);
of_node_put(np);
}
@@ -724,10 +724,17 @@ static void update_cpu_masks(int cpu, bool onlining)
update_thread_mask(cpu, onlining);
+ /* we need the l2 cache mask for the power9 scheduler topology */
+ if (cpu_has_feature(CPU_FTR_ARCH_300))
+ update_mask_by_l2(cpu, onlining, cpu_cache_mask);
+
+ /* now build the core mask */
+ set_cpus_related(cpu, cpu, onlining, cpu_core_mask);
+
if (update_core_mask_by_chip_id(cpu, onlining))
return;
- if (update_core_mask_by_l2(cpu, onlining))
+ if (update_mask_by_l2(cpu, onlining, cpu_core_mask))
return;
/* if all else fails duplicate the sibling mask */
@@ -805,6 +812,32 @@ static struct sched_domain_topology_level
powerpc_topology[] = {
{ NULL, },
};
+
+/* P9 has a slightly odd architecture where two, four thread cores share an L2
+ * cache. For highly threaded workloads it makes sense to try and keep tasks
+ * inside the pair for better cache utilisation so the scheduler needs to be
+ * aware of this. */
+static int powerpc_shared_cache_flags(void)
+{
+ return SD_SHARE_PKG_RESOURCES | SD_PREFER_SIBLING;
+}
+
+/* this is kind of gross, but passing cpu_cache_mask directly
+ * causes the build to fail due to incompatible pointer types */
+static inline const struct cpumask *cpu_cache_mask_c(int cpu)
+{
+ return cpu_cache_mask(cpu);
+}
+
+static struct sched_domain_topology_level power9_topology[] = {
+#ifdef CONFIG_SCHED_SMT
+ { cpu_smt_mask, powerpc_smt_flags, SD_INIT_NAME(SMT) },
+#endif
+ { cpu_cache_mask_c, powerpc_shared_cache_flags, SD_INIT_NAME(CACHE) },
+ { cpu_cpu_mask, SD_INIT_NAME(DIE) },
+ { NULL, },
+};
+
void __init smp_cpus_done(unsigned int max_cpus)
{
cpumask_var_t old_mask;
@@ -829,7 +862,10 @@ void __init smp_cpus_done(unsigned int max_cpus)
dump_numa_cpu_topology();
- set_sched_topology(powerpc_topology);
+ if (cpu_has_feature(CPU_FTR_ARCH_300))
+ set_sched_topology(power9_topology);
+ else
+ set_sched_topology(powerpc_topology);
}
--
2.9.3
[PATCH 4/5] powerpc/smp: add cpu_cache_mask
Traditionally we have only ever tracked which CPUs are in the same core
(cpu_sibling_mask) and on the same die (cpu_core_mask). For Power9 we
need to be aware of which CPUs share cache with each other so this patch
adds cpu_cache_mask and the underlying cpu_cache_map variable to track
this.
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/include/asm/smp.h | 6 ++
arch/powerpc/kernel/smp.c | 5 +
2 files changed, 11 insertions(+)
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 32db16d2e7ad..a7fc3a105d61 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -94,6 +94,7 @@ static inline void set_hard_smp_processor_id(int cpu, int
phys)
#endif
DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
+DECLARE_PER_CPU(cpumask_var_t, cpu_cache_map);
DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
static inline struct cpumask *cpu_sibling_mask(int cpu)
@@ -106,6 +107,11 @@ static inline struct cpumask *cpu_core_mask(int cpu)
return per_cpu(cpu_core_map, cpu);
}
+static inline struct cpumask *cpu_cache_mask(int cpu)
+{
+ return per_cpu(cpu_cache_map, cpu);
+}
+
extern int cpu_to_core_id(int cpu);
/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 3922cace927e..5571f30ff72d 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -72,9 +72,11 @@ static DEFINE_PER_CPU(int, cpu_state) = { 0 };
struct thread_info *secondary_ti;
DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
+DEFINE_PER_CPU(cpumask_var_t, cpu_cache_map);
DEFINE_PER_CPU(cpumask_var_t, cpu_core_map);
EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
+EXPORT_PER_CPU_SYMBOL(cpu_cache_map);
EXPORT_PER_CPU_SYMBOL(cpu_core_map);
/* SMP operations for this machine */
@@ -415,6 +417,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
for_each_possible_cpu(cpu) {
zalloc_cpumask_var_node(&per_cpu(cpu_sibling_map, cpu),
GFP_KERNEL, cpu_to_node(cpu));
+ zalloc_cpumask_var_node(&per_cpu(cpu_cache_map, cpu),
+ GFP_KERNEL, cpu_to_node(cpu));
zalloc_cpumask_var_node(&per_cpu(cpu_core_map, cpu),
GFP_KERNEL, cpu_to_node(cpu));
/*
@@ -428,6 +432,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
}
cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
+ cpumask_set_cpu(boot_cpuid, cpu_cache_mask(boot_cpuid));
cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
if (smp_ops && smp_ops->probe)
--
2.9.3
[PATCH 3/5] powerpc/smp: Add update_cpu_masks()
When adding and removing a CPU from the system the per-cpu masks that
are used by the scheduler to construct scheduler domains need to be updated
to account for the cpu entering or exiting the system. Currently logic this
is open-coded for the thread sibling mask and shared for the core mask.
This patch moves all the logic for rebuilding these masks into a single
function and simplifies the logic which determines which CPUs are within
a "core".
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/kernel/smp.c | 90 ---
1 file changed, 54 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 1c531887ca51..3922cace927e 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -630,14 +630,20 @@ int cpu_first_thread_of_core(int core)
}
EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
-static void traverse_siblings_chip_id(int cpu, bool add, int chipid)
+static bool update_core_mask_by_chip_id(int cpu, bool add)
{
const struct cpumask *mask = add ? cpu_online_mask : cpu_present_mask;
+ int chipid = cpu_to_chip_id(cpu);
int i;
+ if (chipid == -1)
+ return false;
+
for_each_cpu(i, mask)
if (cpu_to_chip_id(i) == chipid)
set_cpus_related(cpu, i, add, cpu_core_mask);
+
+ return true;
}
/* Must be called when no change can occur to cpu_present_mask,
@@ -662,42 +668,72 @@ static struct device_node *cpu_to_l2cache(int cpu)
return cache;
}
-static void traverse_core_siblings(int cpu, bool add)
+static bool update_core_mask_by_l2(int cpu, bool onlining)
{
+ const struct cpumask *mask = onlining ? cpu_online_mask :
cpu_present_mask;
struct device_node *l2_cache, *np;
- const struct cpumask *mask;
- int chip_id;
int i;
- /* threads that share a chip-id are considered siblings (same die) */
- chip_id = cpu_to_chip_id(cpu);
-
- if (chip_id >= 0) {
- traverse_siblings_chip_id(cpu, add, chip_id);
- return;
- }
-
- /* if the chip-id fails then group siblings by the L2 cache */
l2_cache = cpu_to_l2cache(cpu);
- mask = add ? cpu_online_mask : cpu_present_mask;
+ if (l2_cache == NULL)
+ return false;
+
for_each_cpu(i, mask) {
np = cpu_to_l2cache(i);
if (!np)
continue;
if (np == l2_cache)
- set_cpus_related(cpu, i, add, cpu_core_mask);
+ set_cpus_related(cpu, i, onlining, cpu_core_mask);
of_node_put(np);
}
of_node_put(l2_cache);
+
+ return true;
+}
+
+static void update_thread_mask(int cpu, bool onlining)
+{
+ int base = cpu_first_thread_sibling(cpu);
+ int i;
+
+ pr_info("CPUDEBUG: onlining cpu %d, base %d, thread_per_core %d",
+ cpu, base, threads_per_core);
+
+ for (i = 0; i < threads_per_core; i++) {
+ /* Threads are onlined one by one. By the final time this
+* function is called for the core the sibling mask for each
+* thread will be complete, but we need to ensure that offline
+* threads aren't touched before they run start_secondary() */
+ if (onlining && cpu_is_offline(base + i) && (cpu != base + i))
+ continue;
+
+ set_cpus_related(cpu, base + i, onlining, cpu_sibling_mask);
+ }
+}
+
+static void update_cpu_masks(int cpu, bool onlining)
+{
+ int i;
+
+ update_thread_mask(cpu, onlining);
+
+ if (update_core_mask_by_chip_id(cpu, onlining))
+ return;
+
+ if (update_core_mask_by_l2(cpu, onlining))
+ return;
+
+ /* if all else fails duplicate the sibling mask */
+ for_each_cpu(i, cpu_sibling_mask(cpu))
+ set_cpus_related(cpu, i, onlining, cpu_core_mask);
}
/* Activate a secondary processor. */
void start_secondary(void *unused)
{
unsigned int cpu = smp_processor_id();
- int i, base;
atomic_inc(&init_mm.mm_count);
current->active_mm = &init_mm;
@@ -721,19 +757,7 @@ void start_secondary(void *unused)
vdso_getcpu_init();
#endif
/* Update sibling maps */
- base = cpu_first_thread_sibling(cpu);
- for (i = 0; i < threads_per_core; i++) {
- if (cpu_is_offline(base + i) && (cpu != base + i))
- continue;
- set_cpus_related(cpu, base + i, true, cpu_sibling_mask);
-
- /* cpu_core_map should be a superset of
-* cpu_sibling_map even if we don't have cache
-* information, so update the former here, too.
-*/
- set_cpus_related(cpu, base + i, true, cpu_core_mask);
- }
- traverse_core_siblings(cpu, t
[PATCH 2/5] powerpc/smp: add set_cpus_related()
Add a helper function for updating the per-cpu core and sibling thread
cpumasks. This helper just sets (or clears) the relevant bit in the
cpumasks each CPU. This is open-coded in several places inside the
mask setup code so moving it into a seperate function is a sensible
cleanup.
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/kernel/smp.c | 61 ---
1 file changed, 31 insertions(+), 30 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index dfe0e1d9cd06..1c531887ca51 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -377,6 +377,25 @@ static void smp_store_cpu_info(int id)
#endif
}
+/*
+ * Relationships between CPUs are maintained in a set of per-cpu cpumasks. We
+ * need to ensure that they are kept consistant between CPUs when they are
+ * changed.
+ *
+ * This is slightly tricky since the core mask must be a strict superset of
+ * the sibling mask.
+ */
+static void set_cpus_related(int i, int j, bool related, struct cpumask
*(*relation_fn)(int))
+{
+ if (related) {
+ cpumask_set_cpu(i, relation_fn(j));
+ cpumask_set_cpu(j, relation_fn(i));
+ } else {
+ cpumask_clear_cpu(i, relation_fn(j));
+ cpumask_clear_cpu(j, relation_fn(i));
+ }
+}
+
void __init smp_prepare_cpus(unsigned int max_cpus)
{
unsigned int cpu;
@@ -616,17 +635,9 @@ static void traverse_siblings_chip_id(int cpu, bool add,
int chipid)
const struct cpumask *mask = add ? cpu_online_mask : cpu_present_mask;
int i;
- for_each_cpu(i, mask) {
- if (cpu_to_chip_id(i) == chipid) {
- if (add) {
- cpumask_set_cpu(cpu, cpu_core_mask(i));
- cpumask_set_cpu(i, cpu_core_mask(cpu));
- } else {
- cpumask_clear_cpu(cpu, cpu_core_mask(i));
- cpumask_clear_cpu(i, cpu_core_mask(cpu));
- }
- }
- }
+ for_each_cpu(i, mask)
+ if (cpu_to_chip_id(i) == chipid)
+ set_cpus_related(cpu, i, add, cpu_core_mask);
}
/* Must be called when no change can occur to cpu_present_mask,
@@ -666,23 +677,17 @@ static void traverse_core_siblings(int cpu, bool add)
return;
}
- /* if the chip-id fails then threads which share L2 cache are */
-
+ /* if the chip-id fails then group siblings by the L2 cache */
l2_cache = cpu_to_l2cache(cpu);
mask = add ? cpu_online_mask : cpu_present_mask;
for_each_cpu(i, mask) {
np = cpu_to_l2cache(i);
if (!np)
continue;
- if (np == l2_cache) {
- if (add) {
- cpumask_set_cpu(cpu, cpu_core_mask(i));
- cpumask_set_cpu(i, cpu_core_mask(cpu));
- } else {
- cpumask_clear_cpu(cpu, cpu_core_mask(i));
- cpumask_clear_cpu(i, cpu_core_mask(cpu));
- }
- }
+
+ if (np == l2_cache)
+ set_cpus_related(cpu, i, add, cpu_core_mask);
+
of_node_put(np);
}
of_node_put(l2_cache);
@@ -720,15 +725,13 @@ void start_secondary(void *unused)
for (i = 0; i < threads_per_core; i++) {
if (cpu_is_offline(base + i) && (cpu != base + i))
continue;
- cpumask_set_cpu(cpu, cpu_sibling_mask(base + i));
- cpumask_set_cpu(base + i, cpu_sibling_mask(cpu));
+ set_cpus_related(cpu, base + i, true, cpu_sibling_mask);
/* cpu_core_map should be a superset of
* cpu_sibling_map even if we don't have cache
* information, so update the former here, too.
*/
- cpumask_set_cpu(cpu, cpu_core_mask(base + i));
- cpumask_set_cpu(base + i, cpu_core_mask(cpu));
+ set_cpus_related(cpu, base + i, true, cpu_core_mask);
}
traverse_core_siblings(cpu, true);
@@ -818,10 +821,8 @@ int __cpu_disable(void)
/* Update sibling maps */
base = cpu_first_thread_sibling(cpu);
for (i = 0; i < threads_per_core && base + i < nr_cpu_ids; i++) {
- cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i));
- cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu));
- cpumask_clear_cpu(cpu, cpu_core_mask(base + i));
- cpumask_clear_cpu(base + i, cpu_core_mask(cpu));
+ set_cpus_related(cpu, base + i, false, cpu_sibling_mask);
+ set_cpus_related(cpu, base + i, false, cpu_core_mask);
}
traverse_core_siblings(cpu, false);
--
2.9.3
[PATCH 1/5] powerpc/smp: use cpu_to_chip_id() to find siblings
To determine which logical CPUs are on the same core the kernel uses the
ibm,chipid property from the device tree node associated with that cpu.
The lookup for this this information is currently open coded in both
traverse_siblings() and traverse_siblings_chip_id(). This patch replaces
these manual lookups with the existing cpu_to_chip_id() function.
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/kernel/smp.c | 39 +--
1 file changed, 13 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 893bd7f79be6..dfe0e1d9cd06 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -613,19 +613,11 @@ EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
static void traverse_siblings_chip_id(int cpu, bool add, int chipid)
{
- const struct cpumask *mask;
- struct device_node *np;
- int i, plen;
- const __be32 *prop;
+ const struct cpumask *mask = add ? cpu_online_mask : cpu_present_mask;
+ int i;
- mask = add ? cpu_online_mask : cpu_present_mask;
for_each_cpu(i, mask) {
- np = of_get_cpu_node(i, NULL);
- if (!np)
- continue;
- prop = of_get_property(np, "ibm,chip-id", &plen);
- if (prop && plen == sizeof(int) &&
- of_read_number(prop, 1) == chipid) {
+ if (cpu_to_chip_id(i) == chipid) {
if (add) {
cpumask_set_cpu(cpu, cpu_core_mask(i));
cpumask_set_cpu(i, cpu_core_mask(cpu));
@@ -634,7 +626,6 @@ static void traverse_siblings_chip_id(int cpu, bool add,
int chipid)
cpumask_clear_cpu(i, cpu_core_mask(cpu));
}
}
- of_node_put(np);
}
}
@@ -664,23 +655,19 @@ static void traverse_core_siblings(int cpu, bool add)
{
struct device_node *l2_cache, *np;
const struct cpumask *mask;
- int i, chip, plen;
- const __be32 *prop;
+ int chip_id;
+ int i;
- /* First see if we have ibm,chip-id properties in cpu nodes */
- np = of_get_cpu_node(cpu, NULL);
- if (np) {
- chip = -1;
- prop = of_get_property(np, "ibm,chip-id", &plen);
- if (prop && plen == sizeof(int))
- chip = of_read_number(prop, 1);
- of_node_put(np);
- if (chip >= 0) {
- traverse_siblings_chip_id(cpu, add, chip);
- return;
- }
+ /* threads that share a chip-id are considered siblings (same die) */
+ chip_id = cpu_to_chip_id(cpu);
+
+ if (chip_id >= 0) {
+ traverse_siblings_chip_id(cpu, add, chip_id);
+ return;
}
+ /* if the chip-id fails then threads which share L2 cache are */
+
l2_cache = cpu_to_l2cache(cpu);
mask = add ? cpu_online_mask : cpu_present_mask;
for_each_cpu(i, mask) {
--
2.9.3
[PATCH] uapi: fix another asm/shmbuf.h userspace compilation error
Replace size_t with __kernel_size_t to fix asm/shmbuf.h userspace
compilation errors like this:
/usr/include/asm-generic/shmbuf.h:28:2: error: unknown type name 'size_t'
size_t shm_segsz; /* size of segment (bytes) */
x32 is the only architecture where sizeof(size_t) is less than
sizeof(__kernel_size_t), but as the kernel treats shm_segsz field as
__kernel_size_t anyway, UAPI should follow. Thanks to little-endiannes
of x32 and 64-bit alignment of the field following shm_segsz, this
change doesn't break ABI, and the difference doesn't manifest itself
easily.
Signed-off-by: Dmitry V. Levin
---
include/uapi/asm-generic/shmbuf.h | 2 +-
arch/alpha/include/uapi/asm/shmbuf.h | 2 +-
arch/avr32/include/uapi/asm/shmbuf.h | 2 +-
arch/frv/include/uapi/asm/shmbuf.h | 2 +-
arch/ia64/include/uapi/asm/shmbuf.h| 2 +-
arch/m32r/include/uapi/asm/shmbuf.h| 2 +-
arch/mips/include/uapi/asm/shmbuf.h| 2 +-
arch/mn10300/include/uapi/asm/shmbuf.h | 2 +-
arch/powerpc/include/uapi/asm/shmbuf.h | 2 +-
arch/s390/include/uapi/asm/shmbuf.h| 2 +-
arch/sparc/include/uapi/asm/shmbuf.h | 2 +-
arch/xtensa/include/uapi/asm/shmbuf.h | 4 ++--
12 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/include/uapi/asm-generic/shmbuf.h
b/include/uapi/asm-generic/shmbuf.h
index 2a6d508..0756934 100644
--- a/include/uapi/asm-generic/shmbuf.h
+++ b/include/uapi/asm-generic/shmbuf.h
@@ -25,7 +25,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_t shm_atime; /* last attach time */
#if __BITS_PER_LONG != 64
unsigned long __unused1;
diff --git a/arch/alpha/include/uapi/asm/shmbuf.h
b/arch/alpha/include/uapi/asm/shmbuf.h
index 6156099..e32ed1f 100644
--- a/arch/alpha/include/uapi/asm/shmbuf.h
+++ b/arch/alpha/include/uapi/asm/shmbuf.h
@@ -14,7 +14,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_t shm_atime; /* last attach time */
__kernel_time_t shm_dtime; /* last detach time */
__kernel_time_t shm_ctime; /* last change time */
diff --git a/arch/avr32/include/uapi/asm/shmbuf.h
b/arch/avr32/include/uapi/asm/shmbuf.h
index c8e5234..2804f25 100644
--- a/arch/avr32/include/uapi/asm/shmbuf.h
+++ b/arch/avr32/include/uapi/asm/shmbuf.h
@@ -15,7 +15,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_t shm_atime; /* last attach time */
unsigned long __unused1;
__kernel_time_t shm_dtime; /* last detach time */
diff --git a/arch/frv/include/uapi/asm/shmbuf.h
b/arch/frv/include/uapi/asm/shmbuf.h
index 943746c..2af199f 100644
--- a/arch/frv/include/uapi/asm/shmbuf.h
+++ b/arch/frv/include/uapi/asm/shmbuf.h
@@ -15,7 +15,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_t shm_atime; /* last attach time */
unsigned long __unused1;
__kernel_time_t shm_dtime; /* last detach time */
diff --git a/arch/ia64/include/uapi/asm/shmbuf.h
b/arch/ia64/include/uapi/asm/shmbuf.h
index ca81d77e..8e35495 100644
--- a/arch/ia64/include/uapi/asm/shmbuf.h
+++ b/arch/ia64/include/uapi/asm/shmbuf.h
@@ -14,7 +14,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_t shm_atime; /* last attach time */
__kernel_time_t shm_dtime; /* last detach time */
__kernel_time_t shm_ctime; /* last change time */
diff --git a/arch/m32r/include/uapi/asm/shmbuf.h
b/arch/m32r/include/uapi/asm/shmbuf.h
index 714de6e..fa36b9e 100644
--- a/arch/m32r/include/uapi/asm/shmbuf.h
+++ b/arch/m32r/include/uapi/asm/shmbuf.h
@@ -15,7 +15,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
- size_t shm_segsz; /* size of segment (bytes) */
+ __kernel_size_t shm_segsz; /* size of segment (bytes) */
__kernel_time_
[PATCH 3/3] uapi: fix asm/shmbuf.h userspace compilation errors
Include to fix asm/shmbuf.h userspace compilation errors like this: /usr/include/asm-generic/shmbuf.h:26:20: error: field 'shm_perm' has incomplete type struct ipc64_perm shm_perm; /* operation perms */ /usr/include/asm-generic/shmbuf.h:28:2: error: unknown type name '__kernel_time_t' __kernel_time_t shm_atime; /* last attach time */ /usr/include/asm-generic/shmbuf.h:32:2: error: unknown type name '__kernel_time_t' __kernel_time_t shm_dtime; /* last detach time */ /usr/include/asm-generic/shmbuf.h:36:2: error: unknown type name '__kernel_time_t' __kernel_time_t shm_ctime; /* last change time */ /usr/include/asm-generic/shmbuf.h:40:2: error: unknown type name '__kernel_pid_t' __kernel_pid_t shm_cpid; /* pid of creator */ /usr/include/asm-generic/shmbuf.h:41:2: error: unknown type name '__kernel_pid_t' __kernel_pid_t shm_lpid; /* pid of last operator */ /usr/include/asm-generic/shmbuf.h:42:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t shm_nattch; /* no. of current attaches */ /usr/include/asm-generic/shmbuf.h:43:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused4; /usr/include/asm-generic/shmbuf.h:44:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused5; /usr/include/asm-generic/shmbuf.h:48:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t shmmax; /usr/include/asm-generic/shmbuf.h:49:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t shmmin; /usr/include/asm-generic/shmbuf.h:50:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t shmmni; /usr/include/asm-generic/shmbuf.h:51:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t shmseg; /usr/include/asm-generic/shmbuf.h:52:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t shmall; /usr/include/asm-generic/shmbuf.h:53:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused1; /usr/include/asm-generic/shmbuf.h:54:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused2; /usr/include/asm-generic/shmbuf.h:55:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused3; /usr/include/asm-generic/shmbuf.h:56:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused4; Signed-off-by: Dmitry V. Levin --- include/uapi/asm-generic/shmbuf.h | 1 + arch/alpha/include/uapi/asm/shmbuf.h | 2 ++ arch/avr32/include/uapi/asm/shmbuf.h | 2 ++ arch/frv/include/uapi/asm/shmbuf.h | 2 ++ arch/ia64/include/uapi/asm/shmbuf.h| 2 ++ arch/m32r/include/uapi/asm/shmbuf.h| 2 ++ arch/mips/include/uapi/asm/shmbuf.h| 2 ++ arch/mn10300/include/uapi/asm/shmbuf.h | 2 ++ arch/parisc/include/uapi/asm/shmbuf.h | 1 + arch/powerpc/include/uapi/asm/shmbuf.h | 2 ++ arch/s390/include/uapi/asm/shmbuf.h| 2 ++ arch/sparc/include/uapi/asm/shmbuf.h | 2 ++ arch/xtensa/include/uapi/asm/shmbuf.h | 2 ++ 13 files changed, 24 insertions(+) diff --git a/include/uapi/asm-generic/shmbuf.h b/include/uapi/asm-generic/shmbuf.h index 7e9fb2f..2a6d508 100644 --- a/include/uapi/asm-generic/shmbuf.h +++ b/include/uapi/asm-generic/shmbuf.h @@ -1,6 +1,7 @@ #ifndef __ASM_GENERIC_SHMBUF_H #define __ASM_GENERIC_SHMBUF_H +#include #include /* diff --git a/arch/alpha/include/uapi/asm/shmbuf.h b/arch/alpha/include/uapi/asm/shmbuf.h index 37ee84f..6156099 100644 --- a/arch/alpha/include/uapi/asm/shmbuf.h +++ b/arch/alpha/include/uapi/asm/shmbuf.h @@ -1,6 +1,8 @@ #ifndef _ALPHA_SHMBUF_H #define _ALPHA_SHMBUF_H +#include + /* * The shmid64_ds structure for alpha architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/avr32/include/uapi/asm/shmbuf.h b/arch/avr32/include/uapi/asm/shmbuf.h index b94cf8b..c8e5234 100644 --- a/arch/avr32/include/uapi/asm/shmbuf.h +++ b/arch/avr32/include/uapi/asm/shmbuf.h @@ -1,6 +1,8 @@ #ifndef _UAPI__ASM_AVR32_SHMBUF_H #define _UAPI__ASM_AVR32_SHMBUF_H +#include + /* * The shmid64_ds structure for i386 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/frv/include/uapi/asm/shmbuf.h b/arch/frv/include/uapi/asm/shmbuf.h index 4c6e711..943746c 100644 --- a/arch/frv/include/uapi/asm/shmbuf.h +++ b/arch/frv/include/uapi/asm/shmbuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_SHMBUF_H #define _ASM_SHMBUF_H +#include + /* * The shmid64_ds structure for FR-V architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/ia64/include/uapi/asm/shmbuf.h b/arch/ia64/include/uapi/asm/shmbuf.h index 585002a..ca81d77e 100644 --- a/arch/ia64/include/uapi/asm/shmbuf.h +++ b/arch/ia64/include/uapi/asm/shmbuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_IA64_SHMBUF_H #define _ASM_IA64_SHMBUF_H +#include + /* * The shmid64_ds structure for IA-64 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/m32r/include/uapi/asm/shmbuf.h b/arch/
[PATCH 2/3] uapi: fix asm/sembuf.h userspace compilation errors
Include to fix asm/sembuf.h userspace compilation errors like this: /usr/include/asm/sembuf.h:14:20: error: field 'sem_perm' has incomplete type struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ /usr/include/asm/sembuf.h:15:2: error: unknown type name '__kernel_time_t' __kernel_time_t sem_otime; /* last semop time */ /usr/include/asm/sembuf.h:16:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused1; /usr/include/asm/sembuf.h:17:2: error: unknown type name '__kernel_time_t' __kernel_time_t sem_ctime; /* last change time */ /usr/include/asm/sembuf.h:18:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused2; /usr/include/asm/sembuf.h:19:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t sem_nsems; /* no. of semaphores in array */ /usr/include/asm/sembuf.h:20:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused3; /usr/include/asm/sembuf.h:21:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused4; Signed-off-by: Dmitry V. Levin --- include/uapi/asm-generic/sembuf.h | 1 + arch/alpha/include/uapi/asm/sembuf.h | 2 ++ arch/avr32/include/uapi/asm/sembuf.h | 2 ++ arch/frv/include/uapi/asm/sembuf.h | 2 ++ arch/ia64/include/uapi/asm/sembuf.h| 2 ++ arch/m32r/include/uapi/asm/sembuf.h| 2 ++ arch/mips/include/uapi/asm/sembuf.h| 2 ++ arch/mn10300/include/uapi/asm/sembuf.h | 2 ++ arch/parisc/include/uapi/asm/sembuf.h | 1 + arch/powerpc/include/uapi/asm/sembuf.h | 2 ++ arch/s390/include/uapi/asm/sembuf.h| 2 ++ arch/sparc/include/uapi/asm/sembuf.h | 2 ++ arch/x86/include/uapi/asm/sembuf.h | 2 ++ arch/xtensa/include/uapi/asm/sembuf.h | 1 + 14 files changed, 25 insertions(+) diff --git a/include/uapi/asm-generic/sembuf.h b/include/uapi/asm-generic/sembuf.h index 4cb2c13..1d910d7 100644 --- a/include/uapi/asm-generic/sembuf.h +++ b/include/uapi/asm-generic/sembuf.h @@ -1,6 +1,7 @@ #ifndef __ASM_GENERIC_SEMBUF_H #define __ASM_GENERIC_SEMBUF_H +#include #include /* diff --git a/arch/alpha/include/uapi/asm/sembuf.h b/arch/alpha/include/uapi/asm/sembuf.h index 7b38b15..b6bdd5f 100644 --- a/arch/alpha/include/uapi/asm/sembuf.h +++ b/arch/alpha/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _ALPHA_SEMBUF_H #define _ALPHA_SEMBUF_H +#include + /* * The semid64_ds structure for alpha architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/avr32/include/uapi/asm/sembuf.h b/arch/avr32/include/uapi/asm/sembuf.h index 6c6f7cf..ec4ddd6 100644 --- a/arch/avr32/include/uapi/asm/sembuf.h +++ b/arch/avr32/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _UAPI__ASM_AVR32_SEMBUF_H #define _UAPI__ASM_AVR32_SEMBUF_H +#include + /* * The semid64_ds structure for AVR32 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/frv/include/uapi/asm/sembuf.h b/arch/frv/include/uapi/asm/sembuf.h index 164b127..0d73641 100644 --- a/arch/frv/include/uapi/asm/sembuf.h +++ b/arch/frv/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_SEMBUF_H #define _ASM_SEMBUF_H +#include + /* * The semid64_ds structure for FR-V architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/ia64/include/uapi/asm/sembuf.h b/arch/ia64/include/uapi/asm/sembuf.h index 1340fbc..2e218b0 100644 --- a/arch/ia64/include/uapi/asm/sembuf.h +++ b/arch/ia64/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_IA64_SEMBUF_H #define _ASM_IA64_SEMBUF_H +#include + /* * The semid64_ds structure for IA-64 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/m32r/include/uapi/asm/sembuf.h b/arch/m32r/include/uapi/asm/sembuf.h index c9873d6..58ad1f8 100644 --- a/arch/m32r/include/uapi/asm/sembuf.h +++ b/arch/m32r/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_M32R_SEMBUF_H #define _ASM_M32R_SEMBUF_H +#include + /* * The semid64_ds structure for m32r architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/mips/include/uapi/asm/sembuf.h b/arch/mips/include/uapi/asm/sembuf.h index e1085ac..a55ab3c 100644 --- a/arch/mips/include/uapi/asm/sembuf.h +++ b/arch/mips/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_SEMBUF_H #define _ASM_SEMBUF_H +#include + /* * The semid64_ds structure for the MIPS architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/mn10300/include/uapi/asm/sembuf.h b/arch/mn10300/include/uapi/asm/sembuf.h index 301f3f9..3529f55 100644 --- a/arch/mn10300/include/uapi/asm/sembuf.h +++ b/arch/mn10300/include/uapi/asm/sembuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_SEMBUF_H #define _ASM_SEMBUF_H +#include + /* * The semid64_ds structure for MN10300 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/parisc/i
[PATCH 1/3] uapi: fix asm/msgbuf.h userspace compilation errors
Include to fix asm/msgbuf.h userspace compilation errors like this: /usr/include/asm-generic/msgbuf.h:25:20: error: field 'msg_perm' has incomplete type struct ipc64_perm msg_perm; /usr/include/asm-generic/msgbuf.h:26:2: error: unknown type name '__kernel_time_t' __kernel_time_t msg_stime; /* last msgsnd time */ /usr/include/asm-generic/msgbuf.h:30:2: error: unknown type name '__kernel_time_t' __kernel_time_t msg_rtime; /* last msgrcv time */ /usr/include/asm-generic/msgbuf.h:34:2: error: unknown type name '__kernel_time_t' __kernel_time_t msg_ctime; /* last change time */ /usr/include/asm-generic/msgbuf.h:38:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t msg_cbytes; /* current number of bytes on queue */ /usr/include/asm-generic/msgbuf.h:39:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t msg_qnum; /* number of messages in queue */ /usr/include/asm-generic/msgbuf.h:40:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t msg_qbytes; /* max number of bytes on queue */ /usr/include/asm-generic/msgbuf.h:41:2: error: unknown type name '__kernel_pid_t' __kernel_pid_t msg_lspid; /* pid of last msgsnd */ /usr/include/asm-generic/msgbuf.h:42:2: error: unknown type name '__kernel_pid_t' __kernel_pid_t msg_lrpid; /* last receive pid */ /usr/include/asm-generic/msgbuf.h:43:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused4; /usr/include/asm-generic/msgbuf.h:44:2: error: unknown type name '__kernel_ulong_t' __kernel_ulong_t __unused5; Signed-off-by: Dmitry V. Levin --- include/uapi/asm-generic/msgbuf.h | 1 + arch/alpha/include/uapi/asm/msgbuf.h | 2 ++ arch/avr32/include/uapi/asm/msgbuf.h | 2 ++ arch/frv/include/uapi/asm/msgbuf.h | 2 ++ arch/ia64/include/uapi/asm/msgbuf.h| 2 ++ arch/m32r/include/uapi/asm/msgbuf.h| 2 ++ arch/mips/include/uapi/asm/msgbuf.h| 1 + arch/mn10300/include/uapi/asm/msgbuf.h | 2 ++ arch/parisc/include/uapi/asm/msgbuf.h | 1 + arch/powerpc/include/uapi/asm/msgbuf.h | 2 ++ arch/s390/include/uapi/asm/msgbuf.h| 2 ++ arch/sparc/include/uapi/asm/msgbuf.h | 2 ++ arch/xtensa/include/uapi/asm/msgbuf.h | 2 ++ 13 files changed, 23 insertions(+) diff --git a/include/uapi/asm-generic/msgbuf.h b/include/uapi/asm-generic/msgbuf.h index f55ecc4..f3c3b43 100644 --- a/include/uapi/asm-generic/msgbuf.h +++ b/include/uapi/asm-generic/msgbuf.h @@ -1,6 +1,7 @@ #ifndef __ASM_GENERIC_MSGBUF_H #define __ASM_GENERIC_MSGBUF_H +#include #include /* * generic msqid64_ds structure. diff --git a/arch/alpha/include/uapi/asm/msgbuf.h b/arch/alpha/include/uapi/asm/msgbuf.h index 9849650..8de899a 100644 --- a/arch/alpha/include/uapi/asm/msgbuf.h +++ b/arch/alpha/include/uapi/asm/msgbuf.h @@ -1,6 +1,8 @@ #ifndef _ALPHA_MSGBUF_H #define _ALPHA_MSGBUF_H +#include + /* * The msqid64_ds structure for alpha architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/avr32/include/uapi/asm/msgbuf.h b/arch/avr32/include/uapi/asm/msgbuf.h index 9eae6ef..45cdffb 100644 --- a/arch/avr32/include/uapi/asm/msgbuf.h +++ b/arch/avr32/include/uapi/asm/msgbuf.h @@ -1,6 +1,8 @@ #ifndef _UAPI__ASM_AVR32_MSGBUF_H #define _UAPI__ASM_AVR32_MSGBUF_H +#include + /* * The msqid64_ds structure for i386 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/frv/include/uapi/asm/msgbuf.h b/arch/frv/include/uapi/asm/msgbuf.h index 97ceb55..92d6656 100644 --- a/arch/frv/include/uapi/asm/msgbuf.h +++ b/arch/frv/include/uapi/asm/msgbuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_MSGBUF_H #define _ASM_MSGBUF_H +#include + /* * The msqid64_ds structure for FR-V architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/ia64/include/uapi/asm/msgbuf.h b/arch/ia64/include/uapi/asm/msgbuf.h index 6c64c0d..9a31b60 100644 --- a/arch/ia64/include/uapi/asm/msgbuf.h +++ b/arch/ia64/include/uapi/asm/msgbuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_IA64_MSGBUF_H #define _ASM_IA64_MSGBUF_H +#include + /* * The msqid64_ds structure for IA-64 architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/m32r/include/uapi/asm/msgbuf.h b/arch/m32r/include/uapi/asm/msgbuf.h index 0d5a877..4786c0c 100644 --- a/arch/m32r/include/uapi/asm/msgbuf.h +++ b/arch/m32r/include/uapi/asm/msgbuf.h @@ -1,6 +1,8 @@ #ifndef _ASM_M32R_MSGBUF_H #define _ASM_M32R_MSGBUF_H +#include + /* * The msqid64_ds structure for m32r architecture. * Note extra padding because this structure is passed back and forth diff --git a/arch/mips/include/uapi/asm/msgbuf.h b/arch/mips/include/uapi/asm/msgbuf.h index df849e8..c84a388 100644 --- a/arch/mips/include/uapi/asm/msgbuf.h +++ b/arch/mips/include/uapi/asm/msgbuf.h @@ -1,6 +1,7 @@ #ifndef _ASM_MSGBUF_H #define _ASM_MSGBUF_H +#include /* * The msqid64_ds structure for the MIPS architecture. diff --gi
[PATCH v2] uapi: fix asm/signal.h userspace compilation errors
Replace size_t with __kernel_size_t to fix asm/signal.h userspace
compilation errors like this:
/usr/include/asm-generic/signal.h:116:2: error: unknown type name 'size_t'
size_t ss_size;
This change is not applicable to x86 port because x32 is the only
architecture where sizeof(size_t) < sizeof(__kernel_size_t).
Signed-off-by: Dmitry V. Levin
---
v2: create a separate patch for x86,
replace size_t with __kernel_size_t instead of including .
include/uapi/asm-generic/signal.h | 2 +-
arch/alpha/include/uapi/asm/signal.h | 2 +-
arch/arm/include/uapi/asm/signal.h | 2 +-
arch/avr32/include/uapi/asm/signal.h | 2 +-
arch/cris/include/uapi/asm/signal.h| 2 +-
arch/h8300/include/uapi/asm/signal.h | 2 +-
arch/ia64/include/uapi/asm/signal.h| 2 +-
arch/m32r/include/uapi/asm/signal.h| 2 +-
arch/m68k/include/uapi/asm/signal.h| 2 +-
arch/mips/include/uapi/asm/signal.h| 2 +-
arch/mn10300/include/uapi/asm/signal.h | 2 +-
arch/parisc/include/uapi/asm/signal.h | 2 +-
arch/powerpc/include/uapi/asm/signal.h | 2 +-
arch/s390/include/uapi/asm/signal.h| 2 +-
arch/sparc/include/uapi/asm/signal.h | 2 +-
arch/xtensa/include/uapi/asm/signal.h | 2 +-
16 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/include/uapi/asm-generic/signal.h
b/include/uapi/asm-generic/signal.h
index 3094618..6bbcdfa 100644
--- a/include/uapi/asm-generic/signal.h
+++ b/include/uapi/asm-generic/signal.h
@@ -113,7 +113,7 @@ struct sigaction {
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
#endif /* __ASSEMBLY__ */
diff --git a/arch/alpha/include/uapi/asm/signal.h
b/arch/alpha/include/uapi/asm/signal.h
index dd4ca4bc..16a2217 100644
--- a/arch/alpha/include/uapi/asm/signal.h
+++ b/arch/alpha/include/uapi/asm/signal.h
@@ -113,7 +113,7 @@ struct sigaction {
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
/* sigstack(2) is deprecated, and will be withdrawn in a future version
diff --git a/arch/arm/include/uapi/asm/signal.h
b/arch/arm/include/uapi/asm/signal.h
index 33073bd..859f2de 100644
--- a/arch/arm/include/uapi/asm/signal.h
+++ b/arch/arm/include/uapi/asm/signal.h
@@ -113,7 +113,7 @@ struct sigaction {
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
diff --git a/arch/avr32/include/uapi/asm/signal.h
b/arch/avr32/include/uapi/asm/signal.h
index ffe8c77..46af348 100644
--- a/arch/avr32/include/uapi/asm/signal.h
+++ b/arch/avr32/include/uapi/asm/signal.h
@@ -115,7 +115,7 @@ struct sigaction {
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
#endif /* _UAPI__ASM_AVR32_SIGNAL_H */
diff --git a/arch/cris/include/uapi/asm/signal.h
b/arch/cris/include/uapi/asm/signal.h
index ce42fa7..02149d2 100644
--- a/arch/cris/include/uapi/asm/signal.h
+++ b/arch/cris/include/uapi/asm/signal.h
@@ -109,7 +109,7 @@ struct sigaction {
typedef struct sigaltstack {
void *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
diff --git a/arch/h8300/include/uapi/asm/signal.h
b/arch/h8300/include/uapi/asm/signal.h
index af3a6c3..0b1825d 100644
--- a/arch/h8300/include/uapi/asm/signal.h
+++ b/arch/h8300/include/uapi/asm/signal.h
@@ -108,7 +108,7 @@ struct sigaction {
typedef struct sigaltstack {
void *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
diff --git a/arch/ia64/include/uapi/asm/signal.h
b/arch/ia64/include/uapi/asm/signal.h
index c0ea285..04604da 100644
--- a/arch/ia64/include/uapi/asm/signal.h
+++ b/arch/ia64/include/uapi/asm/signal.h
@@ -113,7 +113,7 @@ struct siginfo;
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
diff --git a/arch/m32r/include/uapi/asm/signal.h
b/arch/m32r/include/uapi/asm/signal.h
index 54acacb..a7f5c0b 100644
--- a/arch/m32r/include/uapi/asm/signal.h
+++ b/arch/m32r/include/uapi/asm/signal.h
@@ -110,7 +110,7 @@ struct sigaction {
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
diff --git a/arch/m68k/include/uapi/asm/signal.h
b/arch/m68k/include/uapi/asm/signal.h
index cba6f85..387fddc 100644
--- a/arch/m68k/include/uapi/asm/signal.h
+++ b/arch/m68k/include/uapi/asm/signal.h
@@ -106,7 +106,7 @@ struct sigaction {
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
- size_t ss_size;
+ __kernel_size_t ss_size;
} stack_t;
#endif /* _UAPI_M68K_SIGNAL_H */
diff --git a/arch/mips/include/uapi/asm/s
Re: [RESEND-RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
On Wed, 2017-03-01 at 21:56 +0530, Vaibhav Jain wrote: > Thanks for reviewing the patch !! > > "Guilherme G. Piccoli" writes: > > > > Not sure why, but many of the words in commit message are missing their > > first letter. See, for example: > > reeze_count, roze, eports, ermanently > > Thanks for pointing this out. Will fix this in the subsequent patch > revision. > > > > /** > > > - * eeh_pe_update_time_stamp - Update PE's frozen time stamp > > > + * eeh_pe_update_freeze_counter - Update PE's frozen time stamp > > > + * and freeze counter > > > * @pe: EEH PE > > > * > > > - * We have time stamp for each PE to trace its time of getting > > > - * frozen in last hour. The function should be called to update > > > - * the time stamp on first error of the specific PE. On the other > > > - * handle, we needn't account for errors happened in last hour. > > > > s/handle/hand? "On the other hand..." > > Thats part of original comment which this patch is replacing. It's still worth fixing. Maybe "On the other hand, we don't need to account for errors that happened in the last hour." I really need to get around to fixing up a lot of these old comments...
[PATCH] module: set __jump_table alignment to 8
For powerpc the __jump_table section in modules is not aligned, this
causes a WARN_ON() splat when loading a module containing a __jump_table.
Strict alignment became necessary with commit 3821fd35b58d
("jump_label: Reduce the size of struct static_key"), currently in
linux-next, which uses the two least significant bits of pointers to
__jump_table elements.
Fix by forcing __jump_table to 8, which is the same alignment used for
this section in the kernel proper.
Signed-off-by: David Daney
Tested-by: Sachin Sant
---
scripts/module-common.lds | 2 ++
1 file changed, 2 insertions(+)
diff --git a/scripts/module-common.lds b/scripts/module-common.lds
index 73a2c7d..53234e8 100644
--- a/scripts/module-common.lds
+++ b/scripts/module-common.lds
@@ -19,4 +19,6 @@ SECTIONS {
. = ALIGN(8);
.init_array 0 : { *(SORT(.init_array.*)) *(.init_array) }
+
+ __jump_table0 : ALIGN(8) { KEEP(*(__jump_table)) }
}
--
2.9.3
Re: [PATCH] jump_label: align jump_entry table to at least 4-bytes
On 03/01/2017 12:02 PM, Jason Baron wrote: On 03/01/2017 11:40 AM, David Daney wrote: On 02/28/2017 10:34 PM, Michael Ellerman wrote: Jason Baron writes: ... I also checked all the other .ko files and they were properly aligned. So I think this should hopefully work, and I like that its not a per-arch fix. Sachin, sorry to bother you again, but I'm hoping you can try David's latest patch to scripts/module-common.lds, just to test in your setup. It does fix the problem. I was reproducing with crc_t10dif: [ 695.890552] [ cut here ] [ 695.890709] WARNING: CPU: 15 PID: 3019 at ../kernel/jump_label.c:287 static_key_set_entries+0x74/0xa0 [ 695.890710] Modules linked in: crc_t10dif(+) crct10dif_generic crct10dif_common ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 xt_addrtype iptable_filter ip_tables xt_conntrack x_tables nf_nat nf_conntrack bridge stp llc dm_thin_pool dm_persistent_data dm_bio_prison dm_bufio libcrc32c kvm virtio_balloon binfmt_misc autofs4 virtio_net virtio_pci virtio_ring virtio Which had: [21] __jump_table PROGBITS 0004e8 18 00 WA 0 0 1 And now has: [18] __jump_table PROGBITS 0004d0 18 00 WA 0 0 8 And all other modules have an alignment of 8 on __jump_table, as expected. I'm inclined to merge a version of the balign patch for powerpc anyway, just to be on the safe side. I guess the old code was coping fine with the unaligned keys, but it still makes me nervous. The original "balign patch" has a couple of problems: 1) 4-byte alignment is not sufficient for 64-bit kernels 2) It is redundant if the linker script patch is accepted. The linker script patch seems reasonable to me. Maybe its worth adding a comment that the alignment is necessary because the core jump_label makes use of the 2 lsb bits of its __jump_table pointer due to commit: 3821fd3 jump_label: Reduce the size of struct static_key Also, in the comment it says that it fixes an oops. We hit a WARN_ON() not an oops, although bad things are likely to happen when the branch is updated. OK, I guess I will send a proper patch e-mail with an updated changelog with the improvements you suggest. Thanks, David.
Re: [PATCH v2] powerpc: A new cache geometry aux vectors
On 02/02/2017 12:22 AM, Benjamin Herrenschmidt wrote: This adds AUX vectors for the L1I,D, L2 and L3 cache levels providing for each cache level the size of the cache in bytes and the geometry (line size and number of ways). We chose to not use the existing alpha/sh definition which packs all the information in a single entry per cache level as it is too restricted to represent some of the geometries used on POWER. Signed-off-by: Benjamin Herrenschmidt --- v2. Remove some leftovers and fix 32-bit build Paul, can you test & ack this please ? It replaces the last patch of my previous series (the rest is identical). Sorry for the delay on this, I totally missed this e-mail until this week. I tested this with the Power Functional Simulator (a.k.a. Mambo), with a fairly recent 4.9 kernel from the powerpc git tree. Using Mambo-P8, I see what I expect for cache line size, but associativity is 0: AT_L1I_CACHESIZE: 32768 (0x8000) AT_L1I_CACHEGEOMETRY: associativity 0; line size 128 AT_L1D_CACHESIZE: 32768 (0x8000) AT_L1D_CACHEGEOMETRY: associativity 0; line size 128 AT_L2_CACHESIZE: 524288 (0x8) AT_L2_CACHEGEOMETRY: associativity 0; line size 128 AT_L3_CACHESIZE: 8388608 (0x80) AT_L3_CACHEGEOMETRY: associativity 0; line size 128 ...shouldn't associativity be 8 for all levels? Using Mambo-P9, I don't get any cache sizes, and only L1 geometries, and no associativity: AT_L1I_CACHEGEOMETRY: associativity 0; line size 128 AT_L1D_CACHEGEOMETRY: associativity 0; line size 128 PC
Re: [PATCH] jump_label: align jump_entry table to at least 4-bytes
On 03/01/2017 11:40 AM, David Daney wrote: > On 02/28/2017 10:34 PM, Michael Ellerman wrote: >> Jason Baron writes: >> ... >>> I also checked all the other .ko files and they were properly aligned. >>> So I think this should hopefully work, and I like that its not a >>> per-arch fix. >>> >>> Sachin, sorry to bother you again, but I'm hoping you can try David's >>> latest patch to scripts/module-common.lds, just to test in your setup. >> >> It does fix the problem. >> >> I was reproducing with crc_t10dif: >> >> [ 695.890552] [ cut here ] >> [ 695.890709] WARNING: CPU: 15 PID: 3019 at >> ../kernel/jump_label.c:287 static_key_set_entries+0x74/0xa0 >> [ 695.890710] Modules linked in: crc_t10dif(+) crct10dif_generic >> crct10dif_common ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat >> nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 xt_addrtype >> iptable_filter ip_tables xt_conntrack x_tables nf_nat nf_conntrack >> bridge stp llc dm_thin_pool dm_persistent_data dm_bio_prison dm_bufio >> libcrc32c kvm virtio_balloon binfmt_misc autofs4 virtio_net virtio_pci >> virtio_ring virtio >> >> Which had: >> >> [21] __jump_table PROGBITS 0004e8 >> 18 00 WA 0 0 1 >> >> >> And now has: >> >> [18] __jump_table PROGBITS 0004d0 >> 18 00 WA 0 0 8 >> >> And all other modules have an alignment of 8 on __jump_table, as >> expected. >> >> I'm inclined to merge a version of the balign patch for powerpc anyway, >> just to be on the safe side. I guess the old code was coping fine with >> the unaligned keys, but it still makes me nervous. > > > The original "balign patch" has a couple of problems: > > 1) 4-byte alignment is not sufficient for 64-bit kernels > > 2) It is redundant if the linker script patch is accepted. > > The linker script patch seems reasonable to me. Maybe its worth adding a comment that the alignment is necessary because the core jump_label makes use of the 2 lsb bits of its __jump_table pointer due to commit: 3821fd3 jump_label: Reduce the size of struct static_key Also, in the comment it says that it fixes an oops. We hit a WARN_ON() not an oops, although bad things are likely to happen when the branch is updated. Thanks, -Jason
Re: [PATCH 1/5] selftests: Fix selftests build to just build, not run tests
On 02/13/2017 07:09 PM, Michael Ellerman wrote:
> Michael Ellerman writes:
>
>> In commit 88baa78d1f31 ("selftests: remove duplicated all and clean
>> target"), the "all" target was removed from individual Makefiles and
>> added to lib.mk.
>>
>> However the "all" target was added to lib.mk *after* the existing
>> "runtests" target. This means "runtests" becomes the first (default)
>> target for most of our Makefiles.
> ...
>>
>> Fix it by moving the "all" target to the start of lib.mk, making it the
>> default target.
>>
>> Fixes: 88baa78d1f31 ("selftests: remove duplicated all and clean target")
>> Signed-off-by: Michael Ellerman
>
> Hi Shuah,
>
> Can you please merge this series into linux-next?
>
> The selftests are badly broken otherwise.
>
> cheers
>
Hi Bamovar,
Your original series badly broke the selftest build. I can no longer
build individual tests. For example:
cd breakpoints/
shuah@shuah-XPS-13-9350:/lkml/linux_4.11/tools/testing/selftests/breakpoints$
make
gcc breakpoint_test.c -o /breakpoint_test
/usr/bin/ld: cannot open output file /breakpoint_test: Permission denied
collect2: error: ld returned 1 exit status
../lib.mk:54: recipe for target '/breakpoint_test' failed
make: *** [/breakpoint_test] Error 1
commit a8ba798bc8ec663cf02e80b0dd770324de9bafd9
Author: bamvor.zhangj...@huawei.com
Date: Tue Nov 29 19:55:52 2016 +0800
selftests: enable O and KBUILD_OUTPUT
I believe the above patch is one of the suspects. Michael fixed
some of the problems in this patch and others he sent.
At the moment individual tests will not build.
tools/testing/selftests/x86$ make
Makefile:44: warning: overriding recipe for target 'clean'
../lib.mk:51: warning: ignoring old recipe for target 'clean'
gcc -m64 -o /single_step_syscall_64 -O2 -g -std=gnu99 -pthread -Wall
single_step_syscall.c -lrt -ldl
/usr/bin/ld: cannot open output file /single_step_syscall_64: Permission denied
collect2: error: ld returned 1 exit status
Makefile:50: recipe for target '/single_step_syscall_64' failed
make: *** [/single_step_syscall_64] Error 1
My guess is OUTPUT doesn't resolve in individual builds from the test directory.
We have to get this fixed for 4.11-rc1
Simply Reverting a8ba798bc8ec663cf02e80b0dd770324de9bafd9 doesn't work.
Michael's patches depend on this. So anyway, please let me know if you
can fix this quickly. I am going to be trying a few things today as well.
thanks,
-- Shuah
Re: [RESEND-RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
On 03/01/2017 01:26 PM, Vaibhav Jain wrote: > > Thanks for reviewing the patch !! Yw =) > > "Guilherme G. Piccoli" writes: >> >> Not sure why, but many of the words in commit message are missing their >> first letter. See, for example: >> reeze_count, roze, eports, ermanently > Thanks for pointing this out. Will fix this in the subsequent patch > revision. > >>> /** >>> - * eeh_pe_update_time_stamp - Update PE's frozen time stamp >>> + * eeh_pe_update_freeze_counter - Update PE's frozen time stamp >>> + * and freeze counter >>> * @pe: EEH PE >>> * >>> - * We have time stamp for each PE to trace its time of getting >>> - * frozen in last hour. The function should be called to update >>> - * the time stamp on first error of the specific PE. On the other >>> - * handle, we needn't account for errors happened in last hour. >> >> s/handle/hand? "On the other hand..." > Thats part of original comment which this patch is replacing. .hehehe How didn't I notice? Sorry, my bad!
Re: [PATCH] jump_label: align jump_entry table to at least 4-bytes
On 02/28/2017 10:34 PM, Michael Ellerman wrote: Jason Baron writes: ... I also checked all the other .ko files and they were properly aligned. So I think this should hopefully work, and I like that its not a per-arch fix. Sachin, sorry to bother you again, but I'm hoping you can try David's latest patch to scripts/module-common.lds, just to test in your setup. It does fix the problem. I was reproducing with crc_t10dif: [ 695.890552] [ cut here ] [ 695.890709] WARNING: CPU: 15 PID: 3019 at ../kernel/jump_label.c:287 static_key_set_entries+0x74/0xa0 [ 695.890710] Modules linked in: crc_t10dif(+) crct10dif_generic crct10dif_common ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 xt_addrtype iptable_filter ip_tables xt_conntrack x_tables nf_nat nf_conntrack bridge stp llc dm_thin_pool dm_persistent_data dm_bio_prison dm_bufio libcrc32c kvm virtio_balloon binfmt_misc autofs4 virtio_net virtio_pci virtio_ring virtio Which had: [21] __jump_table PROGBITS 0004e8 18 00 WA 0 0 1 And now has: [18] __jump_table PROGBITS 0004d0 18 00 WA 0 0 8 And all other modules have an alignment of 8 on __jump_table, as expected. I'm inclined to merge a version of the balign patch for powerpc anyway, just to be on the safe side. I guess the old code was coping fine with the unaligned keys, but it still makes me nervous. The original "balign patch" has a couple of problems: 1) 4-byte alignment is not sufficient for 64-bit kernels 2) It is redundant if the linker script patch is accepted. cheers ___ linux-arm-kernel mailing list linux-arm-ker...@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Re: [RESEND-RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
Thanks for reviewing the patch !! "Guilherme G. Piccoli" writes: > > Not sure why, but many of the words in commit message are missing their > first letter. See, for example: > reeze_count, roze, eports, ermanently Thanks for pointing this out. Will fix this in the subsequent patch revision. >> /** >> - * eeh_pe_update_time_stamp - Update PE's frozen time stamp >> + * eeh_pe_update_freeze_counter - Update PE's frozen time stamp >> + * and freeze counter >> * @pe: EEH PE >> * >> - * We have time stamp for each PE to trace its time of getting >> - * frozen in last hour. The function should be called to update >> - * the time stamp on first error of the specific PE. On the other >> - * handle, we needn't account for errors happened in last hour. > > s/handle/hand? "On the other hand..." Thats part of original comment which this patch is replacing. -- Vaibhav Jain Linux Technology Center, IBM India Pvt. Ltd.
Re: [PATCH] uapi: fix asm/signal.h userspace compilation errors
On Sun, Feb 26, 2017 at 2:01 AM, Dmitry V. Levin wrote: > Include (guarded by #ifndef __KERNEL__) to fix asm/signal.h > userspace compilation errors like this: > > /usr/include/asm/signal.h:126:2: error: unknown type name 'size_t' > size_t ss_size; > > As no uapi header provides a definition of size_t, inclusion > of seems to be the most conservative fix available. > > On the kernel side size_t is typedef'ed to __kernel_size_t, so > an alternative fix would be to change the type of sigaltstack.ss_size > from size_t to __kernel_size_t for all architectures except those where > sizeof(size_t) < sizeof(__kernel_size_t), namely, x32 and mips n32. > > On x32 and mips n32, however, #include seems to be the most > straightforward way to obtain the definition for sigaltstack.ss_size's > type. > > Signed-off-by: Dmitry V. Levin I'm not sure if this is the best fix. We generally should not include one standard header from another standard header. Would it be possible to use __kernel_size_t instead of size_t? Arnd
Re: [PATCH v3 1/2] powerpc: split ftrace bits into a separate file
On 2017/02/28 09:11AM, Steven Rostedt wrote: > On Tue, 28 Feb 2017 15:04:15 +1100 > Michael Ellerman wrote: > > kernel/trace/ftrace.c more obvious. > > > > I don't know if it's really worth keeping the names the same across > > arches, especially as we already have: > > > > arch/arm64/kernel/entry-ftrace.S > > arch/arm/kernel/entry-ftrace.S > > arch/blackfin/kernel/ftrace-entry.S > > arch/metag/kernel/ftrace_stub.S > > > > But we can rename it if you feel strongly about it. > > Hmm, perhaps "entry-ftrace.S" would be the better name. I never liked > the "mcount.S" name. Ok, just to be sure I get this right -- do you want me to name the powerpc files entry_ftrace_64.S (and subsequently to a slightly long entry_ftrace_64_mprofile.S), or rename the x86 mcount* files? Or both? Thanks for the review, - Naveen
Re: [PATCH v2 3.5/5] trace/kprobes: Add back warning about offset in return probes
On 2017/02/27 11:52AM, Steven Rostedt (VMware) wrote:
> Let's not remove the warning about offsets and return probes when the
> offset is invalid.
Good point!
Thanks, Steve!
>
> Signed-off-by: Steven Rostedt (VMware)
Acked-by: Naveen N. Rao
> ---
> diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c
> index 3f4f788..f626235 100644
> --- a/kernel/trace/trace_kprobe.c
> +++ b/kernel/trace/trace_kprobe.c
> @@ -695,6 +695,11 @@ static int create_trace_kprobe(int argc, char **argv)
> pr_info("Failed to parse symbol.\n");
> return ret;
> }
> + if (offset && is_return &&
> + !arch_function_offset_within_entry(offset)) {
> + pr_info("Given offset is not valid for return
> probe.\n");
> + return -EINVAL;
> + }
> }
> argc -= 2; argv += 2;
>
>
Re: [PATCH v2 4/5] perf: kretprobes: offset from reloc_sym if kernel supports it
On 2017/02/25 08:55AM, Masami Hiramatsu wrote: > On Fri, 24 Feb 2017 17:11:03 -0300 > Arnaldo Carvalho de Melo wrote: > > > Em Sat, Feb 25, 2017 at 02:29:17AM +0900, Masami Hiramatsu escreveu: > > > On Fri, 24 Feb 2017 00:46:08 +0530 > > > "Naveen N. Rao" wrote: > > > > Thanks. I hope that's an Ack for this patchset? > > > > > > OK, for 1/5, 2/5, 3/5, and 5/5; > > > > > > Acked-by: Masami Hiramatsu > > > > > > And could you make v4 series including all patches? (Not only updates) > > > > So, to make progress I processed these: > > > > [acme@jouet linux]$ git log --oneline -3 > > eb55608340b7 perf probe: Generalize probe event file open routine > > 859d718fac06 trace/kprobes: Allow return probes with offsets and absolute > > addresses > > a10489121c81 kretprobes: Ensure probe location is at function entry > > [acme@jouet linux]$ > > > > Waiting for Naveen to react to these last minute considerations from > > Masami and for the Ack from the PPC guys about "[PATCH v2 2/5] powerpc: > > kretprobes: override default function entry offset". Thanks Arnaldo! Sorry, couldn't get to this sooner as I was off for a day... I see that you've picked up 3 of the patches and Ananth/Michael have acked the powerpc patch. I will post the remaining ones tonight/tomorrow. > > Thanks Arnaldo!! > > Naveen, please update your ppc and perf patches and send it to Arnaldo. > I'm happy to review it. Sure thanks, I'll work on those tonight/tomorrow. - Naveen
Re: [PATCH v3 1/2] perf: probe: generalize probe event file open routine
On 2017/02/25 01:46AM, Masami Hiramatsu wrote: > On Thu, 23 Feb 2017 17:07:23 +0530 > "Naveen N. Rao" wrote: > > > ...into a generic function for opening trace files. > > Even if it repeats subject, please write complete description... Agh, ok sure. I will try to curb my urge to not type too much :) > > Patch itself is OK to me. Thanks for the review on this series! - Naveen
Re: [PATCH v3 2/2] perf: kretprobes: offset from reloc_sym if kernel supports it
On 2017/02/25 02:12AM, Masami Hiramatsu wrote:
> On Thu, 23 Feb 2017 17:07:24 +0530
> "Naveen N. Rao" wrote:
>
> > We indicate support for accepting sym+offset with kretprobes through a
> > line in ftrace README. Parse the same to identify support and choose the
> > appropriate format for kprobe_events.
> >
> > Signed-off-by: Naveen N. Rao
> > ---
> > tools/perf/util/probe-event.c | 49
> > ---
> > tools/perf/util/probe-event.h | 2 ++
> > 2 files changed, 44 insertions(+), 7 deletions(-)
> >
> > diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
> > index 35f5b7b7715c..dd6b9ce0eef3 100644
> > --- a/tools/perf/util/probe-event.c
> > +++ b/tools/perf/util/probe-event.c
> > @@ -737,6 +737,43 @@ post_process_module_probe_trace_events(struct
> > probe_trace_event *tevs,
> > return ret;
> > }
> >
> > +bool is_kretprobe_offset_supported(void)
> > +{
> > + FILE *fp;
> > + char *buf = NULL;
> > + size_t len = 0;
> > + bool target_line = false;
> > + static int supported = -1;
> > + int fd;
> > +
> > + if (supported >= 0)
> > + return !!supported;
> > +
> > + fd = open_trace_file("README", false);
> > + if (fd < 0)
> > + return false;
> > +
> > + fp = fdopen(fd, "r");
> > + if (!fp) {
> > + close(fd);
> > + return false;
> > + }
> > +
> > + while (getline(&buf, &len, fp) > 0) {
> > + target_line = !!strstr(buf, "place (kretprobe): ");
> > + if (!target_line)
> > + continue;
> > + supported = 1;
> > + }
> > + if (supported == -1)
> > + supported = 0;
> > +
> > + fclose(fp);
> > + free(buf);
> > +
> > + return !!supported;
> > +}
>
> Hmm, I think you can do more than that.
> Can you reuse probe_type_is_available() to scan README?
> I think we can have something like scan_ftrace_readme() in probe-file.c
> to scan all the options and cache the results.
>
> probe_type_is_available() and kreprobe_offset_is_available()
> just returns cached result or scan it in first call.(I would like to
> ask you to do it in probe-file.c too)
Ok sure, that makes sense. I see that we only ever care about support
for hex type, so I will add a separate routine to only look for that and
the newly added kretprobe offset support.
- Naveen
Re: [RESEND-RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
Hi Vaibhav, nice patch! Some comments below:
On 03/01/2017 08:24 AM, Vaibhav Jain wrote:
> This patch introduces a new function eeh_pe_update_freeze_counter()
> replacing existing function eeh_pe_update_time_stamp(). The new
> function also manages the value of reeze_count along with tstamp to
> track the number of times the PE roze in last one hour and if the
> freeze_count > eeh_max_freezes then eports an error(-ENOTRECOVERABLE)
> to indicate that the PE should be ermanently disabled.
Not sure why, but many of the words in commit message are missing their
first letter. See, for example:
reeze_count, roze, eports, ermanently
>
> This patch should not introduce any behavioral change.
>
> Signed-off-by: Vaibhav Jain
> ---
> Change-log:
>
> v1 -> v2
> Changes as suggested by Russell Currey:
> - Suffixed function names with '()'
> - Dropped '<0' conditional check inside eeh_handle_normal_event()
> - Rephrased the comment for function eeh_pe_update_freeze_counter()
> - Brace-wrapped a single line statement at end of
> eeh_pe_update_freeze_counter()
> ---
> arch/powerpc/include/asm/eeh.h | 2 +-
> arch/powerpc/kernel/eeh_driver.c | 20 +++--
> arch/powerpc/kernel/eeh_pe.c | 47
> +++-
> 3 files changed, 36 insertions(+), 33 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
> index 8e37b71..68806be 100644
> --- a/arch/powerpc/include/asm/eeh.h
> +++ b/arch/powerpc/include/asm/eeh.h
> @@ -265,7 +265,7 @@ struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
> struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
> int eeh_add_to_parent_pe(struct eeh_dev *edev);
> int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
> -void eeh_pe_update_time_stamp(struct eeh_pe *pe);
> +int eeh_pe_update_freeze_counter(struct eeh_pe *pe);
> void *eeh_pe_traverse(struct eeh_pe *root,
> eeh_traverse_func fn, void *flag);
> void *eeh_pe_dev_traverse(struct eeh_pe *root,
> diff --git a/arch/powerpc/kernel/eeh_driver.c
> b/arch/powerpc/kernel/eeh_driver.c
> index b948871..8a088ea 100644
> --- a/arch/powerpc/kernel/eeh_driver.c
> +++ b/arch/powerpc/kernel/eeh_driver.c
> @@ -739,10 +739,9 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
> return;
> }
>
> - eeh_pe_update_time_stamp(pe);
> - pe->freeze_count++;
> - if (pe->freeze_count > eeh_max_freezes)
> - goto excess_failures;
> + /* Update freeze counters and see if we have tripped max-freeze limit */
> + if (eeh_pe_update_freeze_counter(pe))
> + goto perm_error;
> pr_warn("EEH: This PCI device has failed %d times in the last hour\n",
> pe->freeze_count);
>
> @@ -872,19 +871,6 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
>
> return;
>
> -excess_failures:
> - /*
> - * About 90% of all real-life EEH failures in the field
> - * are due to poorly seated PCI cards. Only 10% or so are
> - * due to actual, failed cards.
> - */
> - pr_err("EEH: PHB#%x-PE#%x has failed %d times in the\n"
> -"last hour and has been permanently disabled.\n"
> -"Please try reseating or replacing it.\n",
> - pe->phb->global_number, pe->addr,
> - pe->freeze_count);
> - goto perm_error;
> -
> hard_fail:
> pr_err("EEH: Unable to recover from failure from PHB#%x-PE#%x.\n"
> "Please try reseating or replacing it\n",
> diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
> index cc4b206..d367c16 100644
> --- a/arch/powerpc/kernel/eeh_pe.c
> +++ b/arch/powerpc/kernel/eeh_pe.c
> @@ -504,30 +504,47 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
> }
>
> /**
> - * eeh_pe_update_time_stamp - Update PE's frozen time stamp
> + * eeh_pe_update_freeze_counter - Update PE's frozen time stamp
> + * and freeze counter
> * @pe: EEH PE
> *
> - * We have time stamp for each PE to trace its time of getting
> - * frozen in last hour. The function should be called to update
> - * the time stamp on first error of the specific PE. On the other
> - * handle, we needn't account for errors happened in last hour.
s/handle/hand? "On the other hand..."
Thanks,
Guilherme
> + * We have a freeze counter and time stamp for each PE to trace
> + * number of times the PE was frozen in the last hour. This function
> + * updates the PE's freeze counter and returns an error if its greater
> + * than eeh_max_freezes. The function should be called to once every
> + * time a specific PE freezes.
> */
> -void eeh_pe_update_time_stamp(struct eeh_pe *pe)
> +int eeh_pe_update_freeze_counter(struct eeh_pe *pe)
> {
> struct timeval tstamp;
>
> - if (!pe) return;
> + if (!pe)
> + return -EINVAL;
> +
> + do_gettimeofday(&tstamp);
> + if (pe->freeze_count <= 0 || tstamp.tv_sec - pe->tstamp.tv_sec > 3600) {
> + pe->tstamp = tstamp;
> +
[PATCH v3 2/2] crypto: vmx - Use skcipher for xts fallback
Signed-off-by: Paulo Flabiano Smorigo
---
drivers/crypto/vmx/aes_xts.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/crypto/vmx/aes_xts.c b/drivers/crypto/vmx/aes_xts.c
index 24353ec3..6adc929 100644
--- a/drivers/crypto/vmx/aes_xts.c
+++ b/drivers/crypto/vmx/aes_xts.c
@@ -28,11 +28,12 @@
#include
#include
#include
+#include
#include "aesp8-ppc.h"
struct p8_aes_xts_ctx {
- struct crypto_blkcipher *fallback;
+ struct crypto_skcipher *fallback;
struct aes_key enc_key;
struct aes_key dec_key;
struct aes_key tweak_key;
@@ -41,7 +42,7 @@ struct p8_aes_xts_ctx {
static int p8_aes_xts_init(struct crypto_tfm *tfm)
{
const char *alg;
- struct crypto_blkcipher *fallback;
+ struct crypto_skcipher *fallback;
struct p8_aes_xts_ctx *ctx = crypto_tfm_ctx(tfm);
if (!(alg = crypto_tfm_alg_name(tfm))) {
@@ -49,8 +50,8 @@ static int p8_aes_xts_init(struct crypto_tfm *tfm)
return -ENOENT;
}
- fallback =
- crypto_alloc_blkcipher(alg, 0, CRYPTO_ALG_NEED_FALLBACK);
+ fallback = crypto_alloc_skcipher(alg, 0,
+ CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
if (IS_ERR(fallback)) {
printk(KERN_ERR
"Failed to allocate transformation for '%s': %ld\n",
@@ -58,11 +59,11 @@ static int p8_aes_xts_init(struct crypto_tfm *tfm)
return PTR_ERR(fallback);
}
printk(KERN_INFO "Using '%s' as fallback implementation.\n",
- crypto_tfm_alg_driver_name((struct crypto_tfm *) fallback));
+ crypto_skcipher_driver_name(fallback));
- crypto_blkcipher_set_flags(
+ crypto_skcipher_set_flags(
fallback,
- crypto_blkcipher_get_flags((struct crypto_blkcipher *)tfm));
+ crypto_skcipher_get_flags((struct crypto_skcipher *)tfm));
ctx->fallback = fallback;
return 0;
@@ -73,7 +74,7 @@ static void p8_aes_xts_exit(struct crypto_tfm *tfm)
struct p8_aes_xts_ctx *ctx = crypto_tfm_ctx(tfm);
if (ctx->fallback) {
- crypto_free_blkcipher(ctx->fallback);
+ crypto_free_skcipher(ctx->fallback);
ctx->fallback = NULL;
}
}
@@ -98,7 +99,7 @@ static int p8_aes_xts_setkey(struct crypto_tfm *tfm, const u8
*key,
pagefault_enable();
preempt_enable();
- ret += crypto_blkcipher_setkey(ctx->fallback, key, keylen);
+ ret += crypto_skcipher_setkey(ctx->fallback, key, keylen);
return ret;
}
@@ -113,15 +114,14 @@ static int p8_aes_xts_crypt(struct blkcipher_desc *desc,
struct blkcipher_walk walk;
struct p8_aes_xts_ctx *ctx =
crypto_tfm_ctx(crypto_blkcipher_tfm(desc->tfm));
- struct blkcipher_desc fallback_desc = {
- .tfm = ctx->fallback,
- .info = desc->info,
- .flags = desc->flags
- };
if (in_interrupt()) {
- ret = enc ? crypto_blkcipher_encrypt(&fallback_desc, dst, src,
nbytes) :
-crypto_blkcipher_decrypt(&fallback_desc, dst, src,
nbytes);
+ SKCIPHER_REQUEST_ON_STACK(req, ctx->fallback);
+ skcipher_request_set_tfm(req, ctx->fallback);
+ skcipher_request_set_callback(req, desc->flags, NULL, NULL);
+ skcipher_request_set_crypt(req, src, dst, nbytes, desc->info);
+ ret = enc? crypto_skcipher_encrypt(req) :
crypto_skcipher_decrypt(req);
+ skcipher_request_zero(req);
} else {
preempt_disable();
pagefault_disable();
--
2.9.3
[PATCH v3 1/2] crypto: vmx - Use skcipher for cbc fallback
Signed-off-by: Paulo Flabiano Smorigo
---
drivers/crypto/vmx/aes_cbc.c | 47 ++--
1 file changed, 24 insertions(+), 23 deletions(-)
diff --git a/drivers/crypto/vmx/aes_cbc.c b/drivers/crypto/vmx/aes_cbc.c
index 94ad5c0..72a26eb 100644
--- a/drivers/crypto/vmx/aes_cbc.c
+++ b/drivers/crypto/vmx/aes_cbc.c
@@ -27,11 +27,12 @@
#include
#include
#include
+#include
#include "aesp8-ppc.h"
struct p8_aes_cbc_ctx {
- struct crypto_blkcipher *fallback;
+ struct crypto_skcipher *fallback;
struct aes_key enc_key;
struct aes_key dec_key;
};
@@ -39,7 +40,7 @@ struct p8_aes_cbc_ctx {
static int p8_aes_cbc_init(struct crypto_tfm *tfm)
{
const char *alg;
- struct crypto_blkcipher *fallback;
+ struct crypto_skcipher *fallback;
struct p8_aes_cbc_ctx *ctx = crypto_tfm_ctx(tfm);
if (!(alg = crypto_tfm_alg_name(tfm))) {
@@ -47,8 +48,9 @@ static int p8_aes_cbc_init(struct crypto_tfm *tfm)
return -ENOENT;
}
- fallback =
- crypto_alloc_blkcipher(alg, 0, CRYPTO_ALG_NEED_FALLBACK);
+ fallback = crypto_alloc_skcipher(alg, 0,
+ CRYPTO_ALG_ASYNC | CRYPTO_ALG_NEED_FALLBACK);
+
if (IS_ERR(fallback)) {
printk(KERN_ERR
"Failed to allocate transformation for '%s': %ld\n",
@@ -56,11 +58,12 @@ static int p8_aes_cbc_init(struct crypto_tfm *tfm)
return PTR_ERR(fallback);
}
printk(KERN_INFO "Using '%s' as fallback implementation.\n",
- crypto_tfm_alg_driver_name((struct crypto_tfm *) fallback));
+ crypto_skcipher_driver_name(fallback));
+
- crypto_blkcipher_set_flags(
+ crypto_skcipher_set_flags(
fallback,
- crypto_blkcipher_get_flags((struct crypto_blkcipher *)tfm));
+ crypto_skcipher_get_flags((struct crypto_skcipher *)tfm));
ctx->fallback = fallback;
return 0;
@@ -71,7 +74,7 @@ static void p8_aes_cbc_exit(struct crypto_tfm *tfm)
struct p8_aes_cbc_ctx *ctx = crypto_tfm_ctx(tfm);
if (ctx->fallback) {
- crypto_free_blkcipher(ctx->fallback);
+ crypto_free_skcipher(ctx->fallback);
ctx->fallback = NULL;
}
}
@@ -91,7 +94,7 @@ static int p8_aes_cbc_setkey(struct crypto_tfm *tfm, const u8
*key,
pagefault_enable();
preempt_enable();
- ret += crypto_blkcipher_setkey(ctx->fallback, key, keylen);
+ ret += crypto_skcipher_setkey(ctx->fallback, key, keylen);
return ret;
}
@@ -103,15 +106,14 @@ static int p8_aes_cbc_encrypt(struct blkcipher_desc *desc,
struct blkcipher_walk walk;
struct p8_aes_cbc_ctx *ctx =
crypto_tfm_ctx(crypto_blkcipher_tfm(desc->tfm));
- struct blkcipher_desc fallback_desc = {
- .tfm = ctx->fallback,
- .info = desc->info,
- .flags = desc->flags
- };
if (in_interrupt()) {
- ret = crypto_blkcipher_encrypt(&fallback_desc, dst, src,
- nbytes);
+ SKCIPHER_REQUEST_ON_STACK(req, ctx->fallback);
+ skcipher_request_set_tfm(req, ctx->fallback);
+ skcipher_request_set_callback(req, desc->flags, NULL, NULL);
+ skcipher_request_set_crypt(req, src, dst, nbytes, desc->info);
+ ret = crypto_skcipher_encrypt(req);
+ skcipher_request_zero(req);
} else {
preempt_disable();
pagefault_disable();
@@ -144,15 +146,14 @@ static int p8_aes_cbc_decrypt(struct blkcipher_desc *desc,
struct blkcipher_walk walk;
struct p8_aes_cbc_ctx *ctx =
crypto_tfm_ctx(crypto_blkcipher_tfm(desc->tfm));
- struct blkcipher_desc fallback_desc = {
- .tfm = ctx->fallback,
- .info = desc->info,
- .flags = desc->flags
- };
if (in_interrupt()) {
- ret = crypto_blkcipher_decrypt(&fallback_desc, dst, src,
- nbytes);
+ SKCIPHER_REQUEST_ON_STACK(req, ctx->fallback);
+ skcipher_request_set_tfm(req, ctx->fallback);
+ skcipher_request_set_callback(req, desc->flags, NULL, NULL);
+ skcipher_request_set_crypt(req, src, dst, nbytes, desc->info);
+ ret = crypto_skcipher_decrypt(req);
+ skcipher_request_zero(req);
} else {
preempt_disable();
pagefault_disable();
--
2.9.3
[RESEND-RFC v2 2/3] powerpc/eeh: Introduce function eeh_pe_reset_freeze_counter()
This patch introduces function eeh_pe_reset_freeze_counter() which can
be used to reset the PE's freeze count variable outside eeh code. This
is useful for devices that can acquire a different personality after
a PERST event (e.g FPGA Adapters). Presently an existing freeze
count for an adapter with personality N will be taken into account
when the adapter acquired personality N+1.
By calling eeh_pe_reset_freeze_counter() drivers can reset the freeze
counter for an adapter once it has acquired a new personality and
ideally wont be plagued by the failures similar to the one before.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
* Changes as suggested by Russell Currey:
- Suffixed function names with '()'
- Rephrased the description comment for functon eeh_pe_reset_freeze_counter()
- Inserted logging for PHB and PE number inside eeh_pe_reset_freeze_counter()
* Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to
avoid adding a header dependency to 'pci-bridge.h'. The function is
now marked as an exported gpl symbol.
---
arch/powerpc/include/asm/eeh.h | 5 +
arch/powerpc/kernel/eeh_pe.c | 17 +
2 files changed, 22 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 68806be..8dcfb88 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -266,6 +266,9 @@ struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
int eeh_add_to_parent_pe(struct eeh_dev *edev);
int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
int eeh_pe_update_freeze_counter(struct eeh_pe *pe);
+
+void eeh_pe_reset_freeze_counter(struct eeh_pe *pe);
+
void *eeh_pe_traverse(struct eeh_pe *root,
eeh_traverse_func fn, void *flag);
void *eeh_pe_dev_traverse(struct eeh_pe *root,
@@ -339,6 +342,8 @@ static inline int eeh_check_failure(const volatile void
__iomem *token)
return 0;
}
+static inline void eeh_pe_reset_freeze_counter(struct eeh_pe *pe) { }
+
#define eeh_dev_check_failure(x) (0)
static inline void eeh_addr_cache_build(void) { }
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index d367c16..75c781f 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -504,6 +504,23 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
}
/**
+ * eeh_pe_reset_freeze_counter - Resets the PE freeze counter
+ * @pe: EEH PE
+ *
+ * This function is useful while re-configuring an FPGA adapter
+ * as its about to acquire new a personality and you don't want
+ * freeze count to be carry forwarded. As such calling this function
+ * for regular pci devices might be a bad idea.
+ */
+void eeh_pe_reset_freeze_counter(struct eeh_pe *pe)
+{
+ pr_info("Resetting freeze count for PHB#%x-PE#%x\n",
+ pe->phb->global_number, pe->addr);
+ pe->freeze_count = 0;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_reset_freeze_counter);
+
+/**
* eeh_pe_update_freeze_counter - Update PE's frozen time stamp
* and freeze counter
* @pe: EEH PE
--
2.9.3
[RESEND-RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
This patch introduces a new function eeh_pe_update_freeze_counter()
replacing existing function eeh_pe_update_time_stamp(). The new
function also manages the value of reeze_count along with tstamp to
track the number of times the PE roze in last one hour and if the
freeze_count > eeh_max_freezes then eports an error(-ENOTRECOVERABLE)
to indicate that the PE should be ermanently disabled.
This patch should not introduce any behavioral change.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Suffixed function names with '()'
- Dropped '<0' conditional check inside eeh_handle_normal_event()
- Rephrased the comment for function eeh_pe_update_freeze_counter()
- Brace-wrapped a single line statement at end of
eeh_pe_update_freeze_counter()
---
arch/powerpc/include/asm/eeh.h | 2 +-
arch/powerpc/kernel/eeh_driver.c | 20 +++--
arch/powerpc/kernel/eeh_pe.c | 47 +++-
3 files changed, 36 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 8e37b71..68806be 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -265,7 +265,7 @@ struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
int eeh_add_to_parent_pe(struct eeh_dev *edev);
int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
-void eeh_pe_update_time_stamp(struct eeh_pe *pe);
+int eeh_pe_update_freeze_counter(struct eeh_pe *pe);
void *eeh_pe_traverse(struct eeh_pe *root,
eeh_traverse_func fn, void *flag);
void *eeh_pe_dev_traverse(struct eeh_pe *root,
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index b948871..8a088ea 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -739,10 +739,9 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
return;
}
- eeh_pe_update_time_stamp(pe);
- pe->freeze_count++;
- if (pe->freeze_count > eeh_max_freezes)
- goto excess_failures;
+ /* Update freeze counters and see if we have tripped max-freeze limit */
+ if (eeh_pe_update_freeze_counter(pe))
+ goto perm_error;
pr_warn("EEH: This PCI device has failed %d times in the last hour\n",
pe->freeze_count);
@@ -872,19 +871,6 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
return;
-excess_failures:
- /*
-* About 90% of all real-life EEH failures in the field
-* are due to poorly seated PCI cards. Only 10% or so are
-* due to actual, failed cards.
-*/
- pr_err("EEH: PHB#%x-PE#%x has failed %d times in the\n"
- "last hour and has been permanently disabled.\n"
- "Please try reseating or replacing it.\n",
- pe->phb->global_number, pe->addr,
- pe->freeze_count);
- goto perm_error;
-
hard_fail:
pr_err("EEH: Unable to recover from failure from PHB#%x-PE#%x.\n"
"Please try reseating or replacing it\n",
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index cc4b206..d367c16 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -504,30 +504,47 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
}
/**
- * eeh_pe_update_time_stamp - Update PE's frozen time stamp
+ * eeh_pe_update_freeze_counter - Update PE's frozen time stamp
+ * and freeze counter
* @pe: EEH PE
*
- * We have time stamp for each PE to trace its time of getting
- * frozen in last hour. The function should be called to update
- * the time stamp on first error of the specific PE. On the other
- * handle, we needn't account for errors happened in last hour.
+ * We have a freeze counter and time stamp for each PE to trace
+ * number of times the PE was frozen in the last hour. This function
+ * updates the PE's freeze counter and returns an error if its greater
+ * than eeh_max_freezes. The function should be called to once every
+ * time a specific PE freezes.
*/
-void eeh_pe_update_time_stamp(struct eeh_pe *pe)
+int eeh_pe_update_freeze_counter(struct eeh_pe *pe)
{
struct timeval tstamp;
- if (!pe) return;
+ if (!pe)
+ return -EINVAL;
+
+ do_gettimeofday(&tstamp);
+ if (pe->freeze_count <= 0 || tstamp.tv_sec - pe->tstamp.tv_sec > 3600) {
+ pe->tstamp = tstamp;
+ pe->freeze_count = 1;
+
+ } else if (pe->freeze_count >= eeh_max_freezes) {
+ pe->freeze_count++;
+ /*
+* About 90% of all real-life EEH failures in the field
+* are due to poorly seated PCI cards. Only 10% or so are
+* due to actual, failed cards.
+*/
+ pr_err("EEH: PHB#%x-PE#%x has failed %d times in the\n"
+ "last
[RESEND-RFC v2 0/3] cxl: Reset freeze counter for the adapter before PERST
Resend: Update the Cc recipients list. v2 changes: * Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to avoid adding a header dependency to 'pci-bridge.h'. The function is now marked as an exported gpl symbol. * Incorporated changes as suggested by Russell Currey: - Inserted logging for PHB and PE number inside eeh_pe_reset_freeze_counter() - Suffixed all the function names used in comments/patch-descriptions with '()' - Removed an un-needed conditional check of '<0' in eeh_handle_normal_event() - Rephrased the function comment for eeh_pe_update_freeze_counter() and eeh_pe_reset_freeze_counter() - Brace-wrapped a single line statement at end of eeh_pe_update_freeze_counter() v1: Presently to flash a cxl adapter with a new FPGA image a warm pcie reset is requested on the adapter, once the bitstream is loaded to card flash memory. This issues a pci-fundamental reset to the card slot signaling the card controller to reconfigure the fpga with the new bitstream. However pci-fundamental reset of the slot also results in a fenced PHB that raises an eeh event triggering the core eeh flow. The core eeh also maintains a counter named freeze_count for each PE inside struct eeh_pe. The counter is incremented every time an eeh error is reported on the PE domain and if the counter reaches the threshold limit, the device is permanently disabled. The threshold limit is enforced by the variable eeh_max_freeze variable that can be manipulated via debugfs. This creates problem for cxl adapters as: * This puts a limit on number of times a fpga image can be re-flashed which is by default 5-time/Hour. * Since after each reset the adapter can potentially acquire a new personality, the freeze_count of older fpga image shouldn't be carried over to newer image. To fix these problems the proposed patch-set introduces a new function named eeh_pe_reset_freeze_counter that resets freeze counter for the eeh_pe struct. This function can then be called by the cxl module before issuing a pci-fundamental reset to the card slot for loading the new fpga image. Test Runs == * Without the patchset: # for i in $(seq 0 6); do echo 1 > /sys/class/cxl/card0/reset; sleep 20; done bash: /sys/class/cxl/card0/reset: No such file or directory # dmesg ... EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... EEH: PHB#22-PE#0 has failed 2 times in the last hour ... EEH: PHB#22-PE#0 has failed 3 times in the last hour ... EEH: PHB#22-PE#0 has failed 4 times in the last hour ... EEH: PHB#22-PE#0 has failed 5 times in the last hour ... EEH: PHB#22-PE#0 has failed 6 times in the last hour and has been permanently disabled. * With the patchset: # for i in $(seq 0 6); do echo 1 > /sys/class/cxl/card0/reset; sleep 20; done # dmesg ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour --- Vaibhav Jain (3): powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count powerpc/eeh: Introduce function eeh_pe_reset_freeze_counter() cxl: Reset freeze counters before adapter PERST for flashing new image arch/powerpc/include/asm/eeh.h | 7 - arch/powerpc/kernel/eeh_driver.c | 20 ++--- arch/powerpc/kernel/eeh_pe.c | 64 ++-- drivers/misc/cxl/pci.c | 14 + 4 files changed, 72 insertions(+), 33 deletions(-) -- 2.9.3
[RESEND-RFC v2 3/3] cxl: Reset freeze counters before adapter PERST for flashing new image
The patch resets the freeze counter on eeh_pe struct for PHB
associated with the cxl pci adapter. This would enable re-flashing of
the cxl-adapter beyond the default limit of 5.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Changed new variable names inline with eeh code nomenclature.
- Removed the dev_info logging the PHB being reset. The log message is now
moved to eeh_handle_normal_event()
---
drivers/misc/cxl/pci.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index ce54dab..7960fd64 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include "cxl.h"
#include
@@ -1231,6 +1232,8 @@ static void cxl_pci_remove_afu(struct cxl_afu *afu)
int cxl_pci_reset(struct cxl *adapter)
{
struct pci_dev *dev = to_pci_dev(adapter->dev.parent);
+ struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
+ struct eeh_pe *pe = eeh_dev_to_pe(edev);
int rc;
if (adapter->perst_same_image) {
@@ -1244,6 +1247,17 @@ int cxl_pci_reset(struct cxl *adapter)
/* the adapter is about to be reset, so ignore errors */
cxl_data_cache_flush(adapter);
+ /* If loading a new image, reset freeze counters for the PHB
+* associated with the adapter.
+*/
+ if (pe && adapter->perst_loads_image) {
+ /* Find the pe associated with the device PHB */
+ while (pe->parent != NULL && (pe->type & EEH_PE_PHB) == 0)
+ pe = pe->parent;
+
+ eeh_pe_reset_freeze_counter(pe);
+ }
+
/* pcie_warm_reset requests a fundamental pci reset which includes a
* PERST assert/deassert. PERST triggers a loading of the image
* if "user" or "factory" is selected in sysfs */
--
2.9.3
[RFC v2 0/3] cxl: Reset freeze counter for the adapter before PERST
v2 changes: * Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to avoid adding a header dependency to 'pci-bridge.h'. The function is now marked as an exported gpl symbol. * Incorporated changes as suggested by Russell Currey: - Inserted logging for PHB and PE number inside eeh_pe_reset_freeze_counter() - Suffixed all the function names used in comments/patch-descriptions with '()' - Removed an un-needed conditional check of '<0' in eeh_handle_normal_event() - Rephrased the function comment for eeh_pe_update_freeze_counter() and eeh_pe_reset_freeze_counter() - Brace-wrapped a single line statement at end of eeh_pe_update_freeze_counter() v1: Presently to flash a cxl adapter with a new FPGA image a warm pcie reset is requested on the adapter, once the bitstream is loaded to card flash memory. This issues a pci-fundamental reset to the card slot signaling the card controller to reconfigure the fpga with the new bitstream. However pci-fundamental reset of the slot also results in a fenced PHB that raises an eeh event triggering the core eeh flow. The core eeh also maintains a counter named freeze_count for each PE inside struct eeh_pe. The counter is incremented every time an eeh error is reported on the PE domain and if the counter reaches the threshold limit, the device is permanently disabled. The threshold limit is enforced by the variable eeh_max_freeze variable that can be manipulated via debugfs. This creates problem for cxl adapters as: * This puts a limit on number of times a fpga image can be re-flashed which is by default 5-time/Hour. * Since after each reset the adapter can potentially acquire a new personality, the freeze_count of older fpga image shouldn't be carried over to newer image. To fix these problems the proposed patch-set introduces a new function named eeh_pe_reset_freeze_counter that resets freeze counter for the eeh_pe struct. This function can then be called by the cxl module before issuing a pci-fundamental reset to the card slot for loading the new fpga image. Test Runs == * Without the patchset: # for i in $(seq 0 6); do echo 1 > /sys/class/cxl/card0/reset; sleep 20; done bash: /sys/class/cxl/card0/reset: No such file or directory # dmesg ... EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... EEH: PHB#22-PE#0 has failed 2 times in the last hour ... EEH: PHB#22-PE#0 has failed 3 times in the last hour ... EEH: PHB#22-PE#0 has failed 4 times in the last hour ... EEH: PHB#22-PE#0 has failed 5 times in the last hour ... EEH: PHB#22-PE#0 has failed 6 times in the last hour and has been permanently disabled. * With the patchset: # for i in $(seq 0 6); do echo 1 > /sys/class/cxl/card0/reset; sleep 20; done # dmesg ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour ... cxl-pci 0022:01:00.0: Resetting freeze counters for the PHB EEH: Fenced PHB#22 detected, location: N/A EEH: PHB#22-PE#0 has failed 1 times in the last hour --- Vaibhav Jain (3): powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count powerpc/eeh: Introduce function eeh_pe_reset_freeze_counter() cxl: Reset freeze counters before adapter PERST for flashing new image arch/powerpc/include/asm/eeh.h | 7 - arch/powerpc/kernel/eeh_driver.c | 20 ++--- arch/powerpc/kernel/eeh_pe.c | 64 ++-- drivers/misc/cxl/pci.c | 14 + 4 files changed, 72 insertions(+), 33 deletions(-) -- 2.9.3
[RFC v2 2/3] powerpc/eeh: Introduce function eeh_pe_reset_freeze_counter()
This patch introduces function eeh_pe_reset_freeze_counter() which can
be used to reset the PE's freeze count variable outside eeh code. This
is useful for devices that can acquire a different personality after
a PERST event (e.g FPGA Adapters). Presently an existing freeze
count for an adapter with personality N will be taken into account
when the adapter acquired personality N+1.
By calling eeh_pe_reset_freeze_counter() drivers can reset the freeze
counter for an adapter once it has acquired a new personality and
ideally wont be plagued by the failures similar to the one before.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
* Changes as suggested by Russell Currey:
- Suffixed function names with '()'
- Rephrased the description comment for functon eeh_pe_reset_freeze_counter()
- Inserted logging for PHB and PE number inside eeh_pe_reset_freeze_counter()
* Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to
avoid adding a header dependency to 'pci-bridge.h'. The function is
now marked as an exported gpl symbol.
---
arch/powerpc/include/asm/eeh.h | 5 +
arch/powerpc/kernel/eeh_pe.c | 17 +
2 files changed, 22 insertions(+)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 68806be..8dcfb88 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -266,6 +266,9 @@ struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
int eeh_add_to_parent_pe(struct eeh_dev *edev);
int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
int eeh_pe_update_freeze_counter(struct eeh_pe *pe);
+
+void eeh_pe_reset_freeze_counter(struct eeh_pe *pe);
+
void *eeh_pe_traverse(struct eeh_pe *root,
eeh_traverse_func fn, void *flag);
void *eeh_pe_dev_traverse(struct eeh_pe *root,
@@ -339,6 +342,8 @@ static inline int eeh_check_failure(const volatile void
__iomem *token)
return 0;
}
+static inline void eeh_pe_reset_freeze_counter(struct eeh_pe *pe) { }
+
#define eeh_dev_check_failure(x) (0)
static inline void eeh_addr_cache_build(void) { }
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index d367c16..75c781f 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -504,6 +504,23 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
}
/**
+ * eeh_pe_reset_freeze_counter - Resets the PE freeze counter
+ * @pe: EEH PE
+ *
+ * This function is useful while re-configuring an FPGA adapter
+ * as its about to acquire new a personality and you don't want
+ * freeze count to be carry forwarded. As such calling this function
+ * for regular pci devices might be a bad idea.
+ */
+void eeh_pe_reset_freeze_counter(struct eeh_pe *pe)
+{
+ pr_info("Resetting freeze count for PHB#%x-PE#%x\n",
+ pe->phb->global_number, pe->addr);
+ pe->freeze_count = 0;
+}
+EXPORT_SYMBOL_GPL(eeh_pe_reset_freeze_counter);
+
+/**
* eeh_pe_update_freeze_counter - Update PE's frozen time stamp
* and freeze counter
* @pe: EEH PE
--
2.9.3
[RFC v2 1/3] powerpc/eeh: Refactor eeh_pe_update_time_stamp() to update freeze_count
This patch introduces a new function eeh_pe_update_freeze_counter()
replacing existing function eeh_pe_update_time_stamp(). The new
function also manages the value of reeze_count along with tstamp to
track the number of times the PE roze in last one hour and if the
freeze_count > eeh_max_freezes then eports an error(-ENOTRECOVERABLE)
to indicate that the PE should be ermanently disabled.
This patch should not introduce any behavioral change.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Suffixed function names with '()'
- Dropped '<0' conditional check inside eeh_handle_normal_event()
- Rephrased the comment for function eeh_pe_update_freeze_counter()
- Brace-wrapped a single line statement at end of
eeh_pe_update_freeze_counter()
---
arch/powerpc/include/asm/eeh.h | 2 +-
arch/powerpc/kernel/eeh_driver.c | 20 +++--
arch/powerpc/kernel/eeh_pe.c | 47 +++-
3 files changed, 36 insertions(+), 33 deletions(-)
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 8e37b71..68806be 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -265,7 +265,7 @@ struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
int eeh_add_to_parent_pe(struct eeh_dev *edev);
int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
-void eeh_pe_update_time_stamp(struct eeh_pe *pe);
+int eeh_pe_update_freeze_counter(struct eeh_pe *pe);
void *eeh_pe_traverse(struct eeh_pe *root,
eeh_traverse_func fn, void *flag);
void *eeh_pe_dev_traverse(struct eeh_pe *root,
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index b948871..8a088ea 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -739,10 +739,9 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
return;
}
- eeh_pe_update_time_stamp(pe);
- pe->freeze_count++;
- if (pe->freeze_count > eeh_max_freezes)
- goto excess_failures;
+ /* Update freeze counters and see if we have tripped max-freeze limit */
+ if (eeh_pe_update_freeze_counter(pe))
+ goto perm_error;
pr_warn("EEH: This PCI device has failed %d times in the last hour\n",
pe->freeze_count);
@@ -872,19 +871,6 @@ static void eeh_handle_normal_event(struct eeh_pe *pe)
return;
-excess_failures:
- /*
-* About 90% of all real-life EEH failures in the field
-* are due to poorly seated PCI cards. Only 10% or so are
-* due to actual, failed cards.
-*/
- pr_err("EEH: PHB#%x-PE#%x has failed %d times in the\n"
- "last hour and has been permanently disabled.\n"
- "Please try reseating or replacing it.\n",
- pe->phb->global_number, pe->addr,
- pe->freeze_count);
- goto perm_error;
-
hard_fail:
pr_err("EEH: Unable to recover from failure from PHB#%x-PE#%x.\n"
"Please try reseating or replacing it\n",
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index cc4b206..d367c16 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -504,30 +504,47 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
}
/**
- * eeh_pe_update_time_stamp - Update PE's frozen time stamp
+ * eeh_pe_update_freeze_counter - Update PE's frozen time stamp
+ * and freeze counter
* @pe: EEH PE
*
- * We have time stamp for each PE to trace its time of getting
- * frozen in last hour. The function should be called to update
- * the time stamp on first error of the specific PE. On the other
- * handle, we needn't account for errors happened in last hour.
+ * We have a freeze counter and time stamp for each PE to trace
+ * number of times the PE was frozen in the last hour. This function
+ * updates the PE's freeze counter and returns an error if its greater
+ * than eeh_max_freezes. The function should be called to once every
+ * time a specific PE freezes.
*/
-void eeh_pe_update_time_stamp(struct eeh_pe *pe)
+int eeh_pe_update_freeze_counter(struct eeh_pe *pe)
{
struct timeval tstamp;
- if (!pe) return;
+ if (!pe)
+ return -EINVAL;
+
+ do_gettimeofday(&tstamp);
+ if (pe->freeze_count <= 0 || tstamp.tv_sec - pe->tstamp.tv_sec > 3600) {
+ pe->tstamp = tstamp;
+ pe->freeze_count = 1;
+
+ } else if (pe->freeze_count >= eeh_max_freezes) {
+ pe->freeze_count++;
+ /*
+* About 90% of all real-life EEH failures in the field
+* are due to poorly seated PCI cards. Only 10% or so are
+* due to actual, failed cards.
+*/
+ pr_err("EEH: PHB#%x-PE#%x has failed %d times in the\n"
+ "last
[RFC v2 3/3] cxl: Reset freeze counters before adapter PERST for flashing new image
The patch resets the freeze counter on eeh_pe struct for PHB
associated with the cxl pci adapter. This would enable re-flashing of
the cxl-adapter beyond the default limit of 5.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Changed new variable names inline with eeh code nomenclature.
- Removed the dev_info logging the PHB being reset. The log message is now
moved to eeh_handle_normal_event()
---
drivers/misc/cxl/pci.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index ce54dab..7960fd64 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -22,6 +22,7 @@
#include
#include
#include
+#include
#include "cxl.h"
#include
@@ -1231,6 +1232,8 @@ static void cxl_pci_remove_afu(struct cxl_afu *afu)
int cxl_pci_reset(struct cxl *adapter)
{
struct pci_dev *dev = to_pci_dev(adapter->dev.parent);
+ struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
+ struct eeh_pe *pe = eeh_dev_to_pe(edev);
int rc;
if (adapter->perst_same_image) {
@@ -1244,6 +1247,17 @@ int cxl_pci_reset(struct cxl *adapter)
/* the adapter is about to be reset, so ignore errors */
cxl_data_cache_flush(adapter);
+ /* If loading a new image, reset freeze counters for the PHB
+* associated with the adapter.
+*/
+ if (pe && adapter->perst_loads_image) {
+ /* Find the pe associated with the device PHB */
+ while (pe->parent != NULL && (pe->type & EEH_PE_PHB) == 0)
+ pe = pe->parent;
+
+ eeh_pe_reset_freeze_counter(pe);
+ }
+
/* pcie_warm_reset requests a fundamental pci reset which includes a
* PERST assert/deassert. PERST triggers a loading of the image
* if "user" or "factory" is selected in sysfs */
--
2.9.3
Re: [PATCH] powerpc: booke: fix boot crash due to null hugepd
Scott Wood writes:
> On Tue, 2017-02-28 at 14:55 +, Laurentiu Tudor wrote:
>> On 02/17/2017 02:18 PM, Aneesh Kumar K.V wrote:
>> > laurentiu.tu...@nxp.com writes:
>> > > From: Laurentiu Tudor
>> > >
>> > > On 32-bit book-e machines, hugepd_ok() does not take
>> > > into account null hugepd values, causing this crash at boot:
>> > >
>> > > Unable to handle kernel paging request for data at address 0x8000
>> > > Faulting instruction address: 0xc00182a8
>> > > Oops: Kernel access of bad area, sig: 11 [#1]
>> > > SMP NR_CPUS=24
>> > > CoreNet Generic
>> > > Modules linked in:
>> > > CPU: 1 PID: 1 Comm: swapper/0 Tainted: GW 4.10.0-rc8-
>> > > 00016-g69b1f87 #11
>> > > task: e505 task.stack: e5058000
>> > > NIP: c00182a8 LR: c001829c CTR: 7ffe
>> > > REGS: e5059c50 TRAP: 0300 Tainted: GW(4.10.0-rc8-
>> > > 00016-g69b1f87)
>> > > MSR: 00021002
>> > > CR: 88428e82 XER:
>> > > DEAR: 8000 ESR:
>> > > GPR00: c0107510 e5059d00 e505 8000 bff1 e5059d0c e5059d08
>> > > 2017
>> > > GPR08: 28428e82 c00027d0
>> > >
>> > > GPR16: 88a28e82 2000 48422e82 88a28e84
>> > > dd004000
>> > > GPR24: e5059e38 bff1 dd004000 0001 00029002
>> > > bff1
>> > > NIP [c00182a8] follow_huge_addr+0x38/0xf0
>> > > LR [c001829c] follow_huge_addr+0x2c/0xf0
>> > > Call Trace:
>> > > [e5059d00] [e5059d00] 0xe5059d00 (unreliable)
>> > > [e5059d20] [c0107510] follow_page_mask+0x40/0x3c0
>> > > [e5059d80] [c0107958] __get_user_pages+0xc8/0x420
>> > > [e5059de0] [c010817c] get_user_pages_remote+0x8c/0x230
>> > > [e5059e30] [c013f170] copy_strings+0x110/0x3a0
>> > > [e5059ea0] [c013f42c] copy_strings_kernel+0x2c/0x50
>> > > [e5059ec0] [c0141324] do_execveat_common+0x474/0x620
>> > > [e5059f10] [c01414fc] do_execve+0x2c/0x40
>> > > [e5059f20] [c0001f68] try_to_run_init_process+0x18/0x60
>> > > [e5059f30] [c000289c] kernel_init+0xcc/0x120
>> > > [e5059f40] [c000f1e8] ret_from_kernel_thread+0x5c/0x64
>> > > Instruction dump:
>> > > bfc10018 7c9f2378 90010024 7fc000a6 7c000146 80630020 38a1000c 38c10008
>> > > 4bfff869 2c03 41c20090 81210008 <8143> 81630004 3860ffea
>> > > 2f89
>> > > ---[ end trace 4bf94e15fd9fa824 ]---
>> >
>> > Which code path is that. That null should be filtered by the if
>> > (pmd_none(pmd)) check in find_linux_pte_or_hugepte right ?
>> The crash happens when __find_linux_pte_or_hugepte() calls hugepd_ok(),
>> on this line [1]. It's triggered when __find_linux_pte_or_hugepte() is
>> first called, when the kernel tries to spawn the init process. The input
>> effective address (ea arg) is bff1. This is the call stack:
>
> What is the pmd value? There's a pmd_none() check before that line.
It's a pgd, so a pgd_none() check.
But that does nothing because this is 32-bit, 4K PAGE_SIZE, which uses
pgtable-nopmd.h and pgtable-nopud.h, so pgd_none() is just:
int pgd_none(pgd_t pgd) { return 0; }
> That said, regardless of what's going wrong here, it would be simpler and more
> robust if is_hugepd() returned false for empty ptes rather than assuming the
> caller explicitly checked pmd_none().
Yeah, in fact it has to, because of the above.
So Laurentiu's patch is pretty much the correct fix.
cheers
