what is the state about "[v2] ppc64 boot: Wait for boot cpu to show up if nr_cpus limit is about to hit"
Hi, I can not find the history about: https://patchwork.ozlabs.org/patch/577193/ Can we have this patch? Thanks, Pingfan
Re: [PATCH v3] powerpc: Avoid signed to unsigned conversion in set_thread_tidr()
Sukadev Bhattiprolu writes: > We can eliminate the 'else' and be consistent with existing code, if > we check for error (i.e rc < 0) and return rc. assign_thread_tidr() will > not return 0, but even if it did, setting the register and thread.tidr > to 0 should not be a problem. Thanks for the suggestion Sukadev. I have sent out a v4 at http://patchwork.ozlabs.org/patch/841937/ with the update. -- Vaibhav Jain Linux Technology Center, IBM India Pvt. Ltd.
[PATCH v4] powerpc: Avoid signed to unsigned conversion in set_thread_tidr()
There is an unsafe signed to unsigned conversion in set_thread_tidr()
that may cause an error value to be assigned to SPRN_TIDR register and
used as thread-id.
The issue happens as assign_thread_tidr() returns an int and
thread.tidr is an unsigned-long. So a negative error code returned
from assign_thread_tidr() will fail the error check and gets assigned
as tidr as a large positive value.
To fix this the patch assigns the return value of assign_thread_tidr()
to a temporary int and assigns it to thread.tidr iff its '> 0'.
The patch shouldn't impact the calling convention of set_thread_tidr()
i.e all -ve return-values are error codes and a return value of '0'
indicates success.
Fixes: ec233ede4c86("powerpc: Add support for setting SPRN_TIDR")
Signed-off-by: Vaibhav Jain
---
Changelog:
v4 -> Simplified the code flow [Sukadev]
v3 -> Updated the patch to not impact the calling convention [Mpe, Christophe]
v2 -> * Update the patch description to document the calling
convention of set_thread_tidr(). [Mpe]
* Fix a tidr allocation leak.
---
arch/powerpc/kernel/process.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index bfdd783e3916..d205b52e3850 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1569,16 +1569,19 @@ void arch_release_task_struct(struct task_struct *t)
*/
int set_thread_tidr(struct task_struct *t)
{
+ int rc;
+
if (!cpu_has_feature(CPU_FTR_ARCH_300))
return -EINVAL;
if (t != current)
return -EINVAL;
- t->thread.tidr = assign_thread_tidr();
- if (t->thread.tidr < 0)
- return t->thread.tidr;
+ rc = assign_thread_tidr();
+ if (rc < 0)
+ return rc;
+ t->thread.tidr = rc;
mtspr(SPRN_TIDR, t->thread.tidr);
return 0;
--
2.14.3
Re: [PATCH v3] powerpc: Avoid signed to unsigned conversion in set_thread_tidr()
Vaibhav Jain [vaib...@linux.vnet.ibm.com] wrote:
> There is an unsafe signed to unsigned conversion in set_thread_tidr()
> that may cause an error value to be assigned to SPRN_TIDR register and
> used as thread-id.
Thanks for fixing this. I have a comment below
>
> The issue happens as assign_thread_tidr() returns an int and
> thread.tidr is an unsigned-long. So a negative error code returned
> from assign_thread_tidr() will fail the error check and gets assigned
> as tidr as a large positive value.
>
> To fix this the patch assigns the return value of assign_thread_tidr()
> to a temporary int and assigns it to thread.tidr iff its '> 0'.
>
> The patch shouldn't impact the calling convention of set_thread_tidr()
> i.e all -ve return-values are error codes and a return value of '0'
> indicates success.
>
> Fixes: ec233ede4c86("powerpc: Add support for setting SPRN_TIDR")
> Signed-off-by: Vaibhav Jain
>
> ---
> Changelog:
>
> v3 -> Updated the patch to not impact the calling convention [Mpe,
> Christophe]
>
> v2 ->* Update the patch description to document the calling
> convention of set_thread_tidr(). [Mpe]
> * Fix a tidr allocation leak.
> ---
> arch/powerpc/kernel/process.c | 17 ++---
> 1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
> index bfdd783e3916..9fb69211a3d4 100644
> --- a/arch/powerpc/kernel/process.c
> +++ b/arch/powerpc/kernel/process.c
> @@ -1569,19 +1569,22 @@ void arch_release_task_struct(struct task_struct *t)
> */
> int set_thread_tidr(struct task_struct *t)
> {
> + int rc;
> +
> if (!cpu_has_feature(CPU_FTR_ARCH_300))
> return -EINVAL;
>
> if (t != current)
> return -EINVAL;
>
> - t->thread.tidr = assign_thread_tidr();
> - if (t->thread.tidr < 0)
> - return t->thread.tidr;
> -
> - mtspr(SPRN_TIDR, t->thread.tidr);
> -
> - return 0;
> + rc = assign_thread_tidr();
> + if (rc > 0) {
> + t->thread.tidr = rc;
> + mtspr(SPRN_TIDR, t->thread.tidr);
> + return 0;
> + } else {
> + return rc;
> + }
We can eliminate the 'else' and be consistent with existing code, if
we check for error (i.e rc < 0) and return rc. assign_thread_tidr() will
not return 0, but even if it did, setting the register and thread.tidr
to 0 should not be a problem.
Sukadev
[PATCH] powerpc/fsl_pci: Fix ptr_ret.cocci warnings
arch/powerpc/sysdev/fsl_pci.c:1307:1-3: WARNING: PTR_ERR_OR_ZERO can be used Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR Generated by: scripts/coccinelle/api/ptr_ret.cocci Signed-off-by: Vasyl Gomonovych --- arch/powerpc/sysdev/fsl_pci.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 22d98057f773..e5afc3a9b533 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -1304,10 +1304,8 @@ static int add_err_dev(struct platform_device *pdev) pdev->resource, pdev->num_resources, &pd, sizeof(pd)); - if (IS_ERR(errdev)) - return PTR_ERR(errdev); - return 0; + return PTR_ERR_OR_ZERO(errdev); } static int fsl_pci_probe(struct platform_device *pdev) -- 1.9.1
[PATCH v4 2/2] ASoC: fsl_ssi: add 20-bit sample format for AC'97 and use it for capture
When testing AC'97 capture on UDOO board (currently the only user of
fsl_ssi driver in the AC'97 mode) it become obvious that there is a massive
distortion above certain, small input signal.
This problem has been traced to silicon errata ERR003778:
"In AC97, 16-bit mode, received data is shifted by 4-bit locations" that
has "No fix scheduled".
This errata suggests a workaround of doing a 4-bit shift back in SDMA
script for this specific operation mode, however our SDMA scripts are
shared between various SoC peripherals so we can't really modify them.
There is a simple way to avoid this problem, however, that is to disallow
recording in 16-bit mode and only support it in AC'97-native 20-bit mode.
We have to use a 4-byte format for this since SSI FIFOs do not allow 3-byte
accesses (and these aren't supported by imx-sdma driver anyway).
With this change the capture distortion is gone.
We can also add this format as an additional one supported for playback,
using this opportunity to make sure that we use CPU-endian-native formats
in AC'97 mode as we already do in I2S mode.
There is no problem in using different bit widths in playback and capture
in AC'97 mode so allow this, too.
Signed-off-by: Maciej S. Szmigiero
---
Changes from v1: Adapt format name to changes in the first patch from
this series.
Changes from v2, v3: None.
sound/soc/fsl/fsl_ssi.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 20ef09e1a395..c350117c8e31 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -1278,14 +1278,15 @@ static struct snd_soc_dai_driver fsl_ssi_ac97_dai = {
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_8000_48000,
- .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .formats = SNDRV_PCM_FMTBIT_S16 | SNDRV_PCM_FMTBIT_S20,
},
.capture = {
.stream_name = "AC97 Capture",
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_48000,
- .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ /* 16-bit capture is broken (errata ERR003778) */
+ .formats = SNDRV_PCM_FMTBIT_S20,
},
.ops = &fsl_ssi_dai_ops,
};
@@ -1557,11 +1558,12 @@ static int fsl_ssi_probe(struct platform_device *pdev)
/* Are the RX and the TX clocks locked? */
if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) {
- if (!fsl_ssi_is_ac97(ssi_private))
+ if (!fsl_ssi_is_ac97(ssi_private)) {
ssi_private->cpu_dai_drv.symmetric_rates = 1;
+ ssi_private->cpu_dai_drv.symmetric_samplebits = 1;
+ }
ssi_private->cpu_dai_drv.symmetric_channels = 1;
- ssi_private->cpu_dai_drv.symmetric_samplebits = 1;
}
/* Determine the FIFO depth. */
[PATCH v4 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S,U}20
This format is similar to existing SNDRV_PCM_FORMAT_{S,U}20_3 that keep
20-bit PCM samples in 3 bytes, however i.MX6 platform SSI FIFO does not
allow 3-byte accesses (including DMA) so a 4-byte (more conventional)
format is needed for it.
Signed-off-by: Maciej S. Szmigiero
---
Changes from v1: Drop "_4" suffix from these formats since they aren't
non-standard ones, use empty format slots starting from format number 25
for them, add information that they are LSB justified formats.
Changes from v2: Adapt a comment in sound/core/pcm_misc.c so it still
refers to the same sample formats as before.
Changes from v3: Make the comment style in include/uapi/sound/asound.h
match the style of comments at other sample formats.
Corresponding alsa-lib changes will be posted as soon as this patch is
merged on the kernel side, to keep alsa-lib and kernel synchronized.
include/sound/pcm.h | 8
include/sound/soc-dai.h | 2 ++
include/uapi/sound/asound.h | 9 +
sound/core/pcm_misc.c | 19 ++-
4 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 24febf9e177c..e054c583d3b3 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -169,6 +169,10 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_IMA_ADPCM _SNDRV_PCM_FMTBIT(IMA_ADPCM)
#define SNDRV_PCM_FMTBIT_MPEG _SNDRV_PCM_FMTBIT(MPEG)
#define SNDRV_PCM_FMTBIT_GSM _SNDRV_PCM_FMTBIT(GSM)
+#define SNDRV_PCM_FMTBIT_S20_LE_SNDRV_PCM_FMTBIT(S20_LE)
+#define SNDRV_PCM_FMTBIT_U20_LE_SNDRV_PCM_FMTBIT(U20_LE)
+#define SNDRV_PCM_FMTBIT_S20_BE_SNDRV_PCM_FMTBIT(S20_BE)
+#define SNDRV_PCM_FMTBIT_U20_BE_SNDRV_PCM_FMTBIT(U20_BE)
#define SNDRV_PCM_FMTBIT_SPECIAL _SNDRV_PCM_FMTBIT(SPECIAL)
#define SNDRV_PCM_FMTBIT_S24_3LE _SNDRV_PCM_FMTBIT(S24_3LE)
#define SNDRV_PCM_FMTBIT_U24_3LE _SNDRV_PCM_FMTBIT(U24_3LE)
@@ -202,6 +206,8 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_FLOAT SNDRV_PCM_FMTBIT_FLOAT_LE
#define SNDRV_PCM_FMTBIT_FLOAT64 SNDRV_PCM_FMTBIT_FLOAT64_LE
#define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE
+#define SNDRV_PCM_FMTBIT_S20 SNDRV_PCM_FMTBIT_S20_LE
+#define SNDRV_PCM_FMTBIT_U20 SNDRV_PCM_FMTBIT_U20_LE
#endif
#ifdef SNDRV_BIG_ENDIAN
#define SNDRV_PCM_FMTBIT_S16 SNDRV_PCM_FMTBIT_S16_BE
@@ -213,6 +219,8 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_FLOAT SNDRV_PCM_FMTBIT_FLOAT_BE
#define SNDRV_PCM_FMTBIT_FLOAT64 SNDRV_PCM_FMTBIT_FLOAT64_BE
#define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE
+#define SNDRV_PCM_FMTBIT_S20 SNDRV_PCM_FMTBIT_S20_BE
+#define SNDRV_PCM_FMTBIT_U20 SNDRV_PCM_FMTBIT_U20_BE
#endif
struct snd_pcm_file {
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index 58acd00cae19..d970879944fc 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -102,6 +102,8 @@ struct snd_compr_stream;
SNDRV_PCM_FMTBIT_S16_BE |\
SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S20_3BE |\
+ SNDRV_PCM_FMTBIT_S20_LE |\
+ SNDRV_PCM_FMTBIT_S20_BE |\
SNDRV_PCM_FMTBIT_S24_3LE |\
SNDRV_PCM_FMTBIT_S24_3BE |\
SNDRV_PCM_FMTBIT_S32_LE |\
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index c227ccba60ae..07d61583fd02 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -214,6 +214,11 @@ typedef int __bitwise snd_pcm_format_t;
#defineSNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
#defineSNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
#defineSNDRV_PCM_FORMAT_GSM((__force snd_pcm_format_t) 24)
+#defineSNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25) /* in
four bytes, LSB justified */
+#defineSNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26) /* in
four bytes, LSB justified */
+#defineSNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27) /* in
four bytes, LSB justified */
+#defineSNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28) /* in
four bytes, LSB justified */
+/* gap in the numbering for a future standard linear format */
#defineSNDRV_PCM_FORMAT_SPECIAL((__force snd_pcm_format_t) 31)
#defineSNDRV_PCM_FORMAT_S24_3LE((__force snd_pcm_format_t) 32)
/* in three bytes */
#defineSNDRV_PCM_FORMAT_S24_3BE((__force snd_pcm_format_t) 33)
/* in three bytes */
@@ -248,6 +253,8 @@ typedef int __bitwise snd_pcm_format_t;
#defineSNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
#defineSNDRV_PCM_FORMAT_FLOAT64SNDRV_PCM_FORMAT_FLOAT64_LE
#define
Re: [PATCH v2 00/10] posix_clocks: Prepare syscalls for 64 bit time_t conversion
>> I decided against using LEGACY_TIME_SYSCALLS to conditionally compile
>> legacy time syscalls such as sys_nanosleep because this will need to
>> enclose compat_sys_nanosleep as well. So, defining it as
>>
>> config LEGACY_TIME_SYSCALLS
>> def_bool 64BIT || !64BIT_TIME
>>
>> will not include compat_sys_nanosleep. We will instead need a new config to
>> exclusively mark legacy syscalls.
>
> Do you mean we would need to do this separately for native and compat
> syscalls, and have yet another option, like LEGACY_TIME_SYSCALLS
> and LEGACY_TIME_COMPAT_SYSCALLS, to cover all cases? I would
> think that CONFIG_COMPAT_32BIT_TIME handles all the compat versions,
> while CONFIG_LEGACY_TIME_SYSCALLS handles all the native ones.
I meant sys_nanosleep would be covered by LEGACY_TIME_SYSCALLS, but
compat_sys_nanosleep would be covered by CONFIG_COMPAT_32BIT_TIME
along with other compat syscalls.
So, if we define the LEGACY_TIME_SYSCALLS as
"This controls the compilation of the following system calls:
time, stime, gettimeofday, settimeofday, adjtimex, nanosleep,
alarm, getitimer,
setitimer, select, utime, utimes, futimesat, and
{old,new}{l,f,}stat{,64}.
These all pass 32-bit time_t arguments on 32-bit architectures and
are replaced by other interfaces (e.g. posix timers and clocks, statx).
C libraries implementing 64-bit time_t in 32-bit architectures have to
implement the handles by wrapping around the newer interfaces.
New architectures should not explicitly enable this."
This would not be really true as compat interfaces have nothing to do
with this config.
I was proposing that we could have LEGACY_TIME_SYSCALLS config, but
then have all these "deprecated" syscalls be enclosed within this,
compat or not.
This will also mean that we will have to come up representing these
syscalls in the syscall header files.
This can be a separate patch and this series can be merged as is if
everyone agrees.
-Deepa
Re: [PATCH v2 00/10] posix_clocks: Prepare syscalls for 64 bit time_t conversion
On Mon, Nov 27, 2017 at 8:30 PM, Deepa Dinamani wrote: > The series is a preparation series for individual architectures > to use 64 bit time_t syscalls in compat and 32 bit emulation modes. > > This is a follow up to the series Arnd Bergmann posted: > https://sourceware.org/ml/libc-alpha/2015-05/msg00070.html [1] > > Big picture is as per the lwn article: > https://lwn.net/Articles/643234/ [2] > > The series is directed at converting posix clock syscalls: > clock_gettime, clock_settime, clock_getres and clock_nanosleep > to use a new data structure __kernel_timespec at syscall boundaries. > __kernel_timespec maintains 64 bit time_t across all execution modes. > > vdso will be handled as part of each architecture when they enable > support for 64 bit time_t. > > The compat syscalls are repurposed to provide backward compatibility > by using them as native syscalls as well for 32 bit architectures. > They will continue to use timespec at syscall boundaries. > > CONFIG_64_BIT_TIME controls whether the syscalls use __kernel_timespec > or timespec at syscall boundaries. > > The series does the following: > 1. Enable compat syscalls on 32 bit architectures. > 2. Add a new __kernel_timespec type to be used as the data structure >for all the new syscalls. > 3. Add new config CONFIG_64BIT_TIME(intead of the CONFIG_COMPAT_TIME in >[1] and [2] to switch to new definition of __kernel_timespec. It is >the same as struct timespec otherwise. > 4. Add new CONFIG_32BIT_TIME to conditionally compile compat syscalls. > > * Changes since v1: > * Introduce CONFIG_32BIT_TIME > * Fixed zeroing out of higher order bits of tv_nsec > * Included Arnd's changes to fix up use of compat headers Very nice. I think it would be good to get this into linux-next soon so we can build on top of this. I have submitted most other y2038 patches today that don't depend on either this or one of my other patches. There is one patch that I want to do but haven't imlpemented yet, to merge get_timespec64() and compat_get_timespec() into one function that take a bunch of flags (check nanosecond, nano/microsecond, zero upper half of nanoseconds, 32-bit or 64-bit wide), since I found a few functions that need more than one of these, and they don't all need the same combinations. My patch will certainly conflict with yours, as your touch the same functions, but that's fine. If you end up doing another version of the series though, it might be better to move the compat accessors into kernel/time/time.c along with the native functions, that should make it easier to consolidate them later. > I decided against using LEGACY_TIME_SYSCALLS to conditionally compile > legacy time syscalls such as sys_nanosleep because this will need to > enclose compat_sys_nanosleep as well. So, defining it as > > config LEGACY_TIME_SYSCALLS > def_bool 64BIT || !64BIT_TIME > > will not include compat_sys_nanosleep. We will instead need a new config to > exclusively mark legacy syscalls. Do you mean we would need to do this separately for native and compat syscalls, and have yet another option, like LEGACY_TIME_SYSCALLS and LEGACY_TIME_COMPAT_SYSCALLS, to cover all cases? I would think that CONFIG_COMPAT_32BIT_TIME handles all the compat versions, while CONFIG_LEGACY_TIME_SYSCALLS handles all the native ones. Arnd
Re: [alsa-devel] [PATCH v3 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20
On 27.11.2017 21:28, Takashi Iwai wrote: > On Mon, 27 Nov 2017 00:09:47 +0100, > Maciej S. Szmigiero wrote: >> diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h >> index 58acd00cae19..d970879944fc 100644 >> --- a/include/sound/soc-dai.h >> +++ b/include/sound/soc-dai.h >> @@ -102,6 +102,8 @@ struct snd_compr_stream; >> SNDRV_PCM_FMTBIT_S16_BE |\ >> SNDRV_PCM_FMTBIT_S20_3LE |\ >> SNDRV_PCM_FMTBIT_S20_3BE |\ >> + SNDRV_PCM_FMTBIT_S20_LE |\ >> + SNDRV_PCM_FMTBIT_S20_BE |\ >> SNDRV_PCM_FMTBIT_S24_3LE |\ >> SNDRV_PCM_FMTBIT_S24_3BE |\ >> SNDRV_PCM_FMTBIT_S32_LE |\ > > Is it really safe to include them unconditionally...? This define is used as a template of supported formats only in ASoC AC'97 CODECs. A list of effective supported sample formats will be calculated as an intersection of CODEC and CPU-supported formats (and DMA controller-supported bit widths). This means that as long as ASoC CPUs don't add these sample formats to their list of supported formats they should not be offered as supported by any sound card. Also, we already have similar SNDRV_PCM_FMTBIT_S20_3 formats in this define. >> diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h >> index c227ccba60ae..7385024041d2 100644 >> --- a/include/uapi/sound/asound.h >> +++ b/include/uapi/sound/asound.h >> @@ -214,6 +214,11 @@ typedef int __bitwise snd_pcm_format_t; >> #define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22) >> #define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23) >> #define SNDRV_PCM_FORMAT_GSM((__force snd_pcm_format_t) 24) >> +#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25) /* \ >> */ >> +#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26) /* | >> */ >> +#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27) /* | in >> four bytes, */ >> +#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28) /* / >> LSB justified */ > > This style of comments is unusual, so I prefer rather a dumb style, > even don't mind repeating the same text in each line. They'll be over > 80 chars in anyway, so ignore what checkpatch complains. OK, will change it to the repetitive style then in a respin. > thanks, > > Takashi > Thanks, Maciej
Re: [PATCH 1/4] 44x/fsp2: add fsp2 headers
On Mon, 2017-11-27 at 15:58 +1100, Alistair Popple wrote: > Hi Ivan, > > Does it make sense to have these in a seperate include file? From what I could > see these defines were only used in fsp2.c so you could just put them directly > in there. Or at least have an fsp2.h next to fsp2.c rather than include/asm... > - Alistair > > On Thursday, 2 November 2017 4:07:03 PM AEDT Ivan Mikhaylov wrote: > > * add cmu, plbX, l2 register definitions > > > > Signed-off-by: Ivan Mikhaylov > > --- > > arch/powerpc/include/asm/fsp2_reg.h | 272 > > +++ > > 1 files changed, 272 insertions(+), 0 deletions(-) > > create mode 100644 arch/powerpc/include/asm/fsp2_reg.h > > > > diff --git a/arch/powerpc/include/asm/fsp2_reg.h > > b/arch/powerpc/include/asm/fsp2_reg.h > > new file mode 100644 > > index 000..9e1d527 > > --- /dev/null > > +++ b/arch/powerpc/include/asm/fsp2_reg.h > > @@ -0,0 +1,272 @@ > > +#ifndef _ASM_POWERPC_FSP_DCR_H_ > > +#define _ASM_POWERPC_FSP_DCR_H_ > > +#ifdef __KERNEL__ > > +#include > > + > > +#define DCRN_CMU_ADDR 0x00C /* Chip management unic addr */ > > +#define DCRN_CMU_DATA 0x00D /* Chip management unic data */ > > + > > +/* PLB4 Arbiter */ > > +#define DCRN_PLB4_PCBI 0x010 /* PLB Crossbar ID/Rev Register > > */ > > +#define DCRN_PLB4_P0ACR0x011 /* PLB0 Arbiter Control > > Register */ > > +#define DCRN_PLB4_P0ESRL 0x012 /* PLB0 Error Status Register Low */ > > +#define DCRN_PLB4_P0ESRH 0x013 /* PLB0 Error Status Register High */ > > +#define DCRN_PLB4_P0EARL 0x014 /* PLB0 Error Address Register Low */ > > +#define DCRN_PLB4_P0EARH 0x015 /* PLB0 Error Address Register High */ > > +#define DCRN_PLB4_P0ESRLS 0x016 /* PLB0 Error Status Register Low Set*/ > > +#define DCRN_PLB4_P0ESRHS 0x017 /* PLB0 Error Status Register High */ > > +#define DCRN_PLB4_PCBC 0x018 /* PLB Crossbar Control > > Register */ > > +#define DCRN_PLB4_P1ACR0x019 /* PLB1 Arbiter Control > > Register */ > > +#define DCRN_PLB4_P1ESRL 0x01A /* PLB1 Error Status Register Low */ > > +#define DCRN_PLB4_P1ESRH 0x01B /* PLB1 Error Status Register High */ > > +#define DCRN_PLB4_P1EARL 0x01C /* PLB1 Error Address Register Low */ > > +#define DCRN_PLB4_P1EARH 0x01D /* PLB1 Error Address Register High */ > > +#define DCRN_PLB4_P1ESRLS 0x01E /* PLB1 Error Status Register Low Set*/ > > +#define DCRN_PLB4_P1ESRHS 0x01F /*PLB1 Error Status Register High Set*/ > > + > > +/* PLB4/OPB bridge 0, 1, 2, 3 */ > > +#define DCRN_PLB4OPB0_BASE 0x020 > > +#define DCRN_PLB4OPB1_BASE 0x030 > > +#define DCRN_PLB4OPB2_BASE 0x040 > > +#define DCRN_PLB4OPB3_BASE 0x050 > > + > > +#define PLB4OPB_GESR0 0x0 /* Error status 0: Master Dev > > 0-3 */ > > +#define PLB4OPB_GEAR 0x2 /* Error Address Register */ > > +#define PLB4OPB_GEARU 0x3 /* Error Upper Address Register > > */ > > +#define PLB4OPB_GESR1 0x4 /* Error Status 1: Master Dev > > 4-7 */ > > +#define PLB4OPB_GESR2 0xC /* Error Status 2: Master Dev > > 8-11 */ > > + > > +/* PLB4-to-AHB Bridge */ > > +#define DCRN_PLB4AHB_BASE 0x400 > > +#define DCRN_PLB4AHB_SEUAR (DCRN_PLB4AHB_BASE + 1) > > +#define DCRN_PLB4AHB_SELAR (DCRN_PLB4AHB_BASE + 2) > > +#define DCRN_PLB4AHB_ESR (DCRN_PLB4AHB_BASE + 3) > > +#define DCRN_AHBPLB4_ESR (DCRN_PLB4AHB_BASE + 8) > > +#define DCRN_AHBPLB4_EAR (DCRN_PLB4AHB_BASE + 9) > > + > > +/* PLB6 Controller */ > > +#define DCRN_PLB6_BASE 0x1300 > > +#define DCRN_PLB6_CR0 (DCRN_PLB6_BASE) > > +#define DCRN_PLB6_ERR (DCRN_PLB6_BASE + 0x0B) > > +#define DCRN_PLB6_HD (DCRN_PLB6_BASE + 0x0E) > > +#define DCRN_PLB6_SHD (DCRN_PLB6_BASE + 0x10) > > + > > +/* PLB4-to-PLB6 Bridge */ > > +#define DCRN_PLB4PLB6_BASE 0x1320 > > +#define DCRN_PLB4PLB6_ESR (DCRN_PLB4PLB6_BASE + 1) > > +#define DCRN_PLB4PLB6_EARH (DCRN_PLB4PLB6_BASE + 3) > > +#define DCRN_PLB4PLB6_EARL (DCRN_PLB4PLB6_BASE + 4) > > + > > +/* PLB6-to-PLB4 Bridge */ > > +#define DCRN_PLB6PLB4_BASE 0x1350 > > +#define DCRN_PLB6PLB4_ESR (DCRN_PLB6PLB4_BASE + 1) > > +#define DCRN_PLB6PLB4_EARH (DCRN_PLB6PLB4_BASE + 3) > > +#define DCRN_PLB6PLB4_EARL (DCRN_PLB6PLB4_BASE + 4) > > + > > +/* PLB6-to-MCIF Bridge */ > > +#define DCRN_PLB6MCIF_BASE 0x1380 > > +#define DCRN_PLB6MCIF_BESR0(DCRN_PLB6MCIF_BASE + 0) > > +#define DCRN_PLB6MCIF_BESR1(DCRN_PLB6MCIF_BASE + 1) > > +#define DCRN_PLB6MCIF_BEARL(DCRN_PLB6MCIF_BASE + 2) > > +#define DCRN_PLB6MCIF_BEARH(DCRN_PLB6MCIF_BASE + 3) > > + > > +/* Configuration Logic Registers */ > > +#define DCRN_CONF_BASE 0x1400 > > +#define DCRN_CONF_FIR_RWC (DCRN_CONF_BASE + 0x3A) > > +#define DCRN_CONF_EIR_RS (DCRN_CONF_BASE + 0x3E) > > +#define DCRN_CONF_RPERR0 (DCRN_CONF_BASE + 0x4D) > > +#define DCRN_CONF
Re: [PATCH V7 3/3] hotplug/cpu: Fix crash with memoryless nodes
See below.
On 11/20/2017 10:50 AM, Nathan Fontenot wrote:
> On 11/16/2017 11:28 AM, Michael Bringmann wrote:
>> On powerpc systems with shared configurations of CPUs and memory and
>> memoryless nodes at boot, an event ordering problem was observed on
>> a SLES12 build platforms with the hot-add of CPUs to the memoryless
>> nodes.
>>
>> * The most common error occurred when the memory SLAB driver attempted
>> to reference the memoryless node to which a CPU was being added
>> before the kernel had finished initializing all of the data structures
>> for the CPU and exited 'device_online' under DLPAR/hot-add.
>>
>> Normally the memoryless node would be initialized through the call
>> path device_online ... arch_update_cpu_topology ... find_cpu_nid
>> ... try_online_node. This patch ensures that the powerpc node will
>> be initialized as early as possible, even if it was memoryless and
>> CPU-less at the point when we are trying to hot-add a new CPU to it.
>>
>> Signed-off-by: Michael Bringmann
>> ---
>> Changes in V7:
>> -- Make function find_cpu_nid() externally visible/usable so that
>> it may be used from hotplug-cpu.c
>> ---
>> arch/powerpc/mm/numa.c |3 ++-
>> arch/powerpc/platforms/pseries/hotplug-cpu.c |3 +++
>> 2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
>> index 163f4cc..d6d4f7c 100644
>> --- a/arch/powerpc/mm/numa.c
>> +++ b/arch/powerpc/mm/numa.c
>> @@ -1310,7 +1310,7 @@ static long vphn_get_associativity(unsigned long cpu,
>> return rc;
>> }
>>
>> -static inline int find_cpu_nid(int cpu)
>> +int find_cpu_nid(int cpu)
>> {
>> __be32 associativity[VPHN_ASSOC_BUFSIZE] = {0};
>> int new_nid;
>> @@ -1343,6 +1343,7 @@ static inline int find_cpu_nid(int cpu)
>> #endif
>> }
>>
>> +printk(KERN_INFO "%s:%d cpu %d nid %d\n", __FUNCTION__, __LINE__, cpu,
>> new_nid);
>
> This seems like a more likely pr_debug statement.
Yes. Changed.
>> return new_nid;
>> }
>>
>> diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> b/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> index a7d14aa7..df8c732 100644
>> --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> @@ -340,6 +340,8 @@ static void pseries_remove_processor(struct device_node
>> *np)
>> cpu_maps_update_done();
>> }
>>
>> +extern int find_cpu_nid(int cpu);
>> +
>> static int dlpar_online_cpu(struct device_node *dn)
>> {
>> int rc = 0;
>> @@ -364,6 +366,7 @@ static int dlpar_online_cpu(struct device_node *dn)
>> != CPU_STATE_OFFLINE);
>> cpu_maps_update_done();
>> timed_topology_update(1);
>> +find_cpu_nid(cpu);
>
> We don't use the returned node from this call, so I'm not sure why it gets
> called. Perhaps its the possible call to try_online_node() that may get called
> in find_cpu_nid(), if so perhpas naming the routine something slightly
> different would be good, like find_and_online_cpu_nid?
The function find_cpu_nid() gets called here for its operations to ensure that
the node is online and initialized during the 'device_online()' operation for
the new CPU that immediately follows. As I tried to explain in the patch
description, I ran into a case during the SLES12 SP3 backport test where failure
to initialize/online the node early on led to a crash in the memory SLAB driver.
I don't know why that driver was being called so early, but ensuring that the
node was setup as early as possible provided the simplest and smallest patch.
As all of the functionality had been placed in the function 'find_cpu_nid' in
'numa.c' during a previous patch, I reused it here. Though I did not need
the actual node Id during the call dlpar_online_cpu().
Yes, I can provide a separate calling interface named 'find_and_online_cpu_nid'
for the call from 'dlpar_online_cpu'. They would both do the same operations.
Or I could just use the new name for the current implementation of
'find_cpu_nid',
instead, and migrate that name to the previous patches.
If I don't hear any further remarks on this point, I will implement/migrate
the function name 'find_and_online_cpu_nid' in the next version of this patch.
>
> -Nathan
Michael
>> rc = device_online(get_cpu_device(cpu));
>> if (rc)
>> goto out;
>>
>
>
--
Michael W. Bringmann
Linux Technology Center
IBM Corporation
Tie-Line 363-5196
External: (512) 286-5196
Cell: (512) 466-0650
m...@linux.vnet.ibm.com
Re: [alsa-devel] [PATCH v3 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20
On Mon, 27 Nov 2017 00:09:47 +0100, Maciej S. Szmigiero wrote: > diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h > index 58acd00cae19..d970879944fc 100644 > --- a/include/sound/soc-dai.h > +++ b/include/sound/soc-dai.h > @@ -102,6 +102,8 @@ struct snd_compr_stream; > SNDRV_PCM_FMTBIT_S16_BE |\ > SNDRV_PCM_FMTBIT_S20_3LE |\ > SNDRV_PCM_FMTBIT_S20_3BE |\ > +SNDRV_PCM_FMTBIT_S20_LE |\ > +SNDRV_PCM_FMTBIT_S20_BE |\ > SNDRV_PCM_FMTBIT_S24_3LE |\ > SNDRV_PCM_FMTBIT_S24_3BE |\ > SNDRV_PCM_FMTBIT_S32_LE |\ Is it really safe to include them unconditionally...? > diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h > index c227ccba60ae..7385024041d2 100644 > --- a/include/uapi/sound/asound.h > +++ b/include/uapi/sound/asound.h > @@ -214,6 +214,11 @@ typedef int __bitwise snd_pcm_format_t; > #define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22) > #define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23) > #define SNDRV_PCM_FORMAT_GSM((__force snd_pcm_format_t) 24) > +#define SNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25) /* \ > */ > +#define SNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26) /* | > */ > +#define SNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27) /* | in > four bytes, */ > +#define SNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28) /* / > LSB justified */ This style of comments is unusual, so I prefer rather a dumb style, even don't mind repeating the same text in each line. They'll be over 80 chars in anyway, so ignore what checkpatch complains. > +/* gap in the numbering for a future standard linear format */ This comment is good. thanks, Takashi
Re: RESEND [PATCH V7 2/3] poserpc/initnodes: Ensure nodes initialized for hotplug
See below. On 11/20/2017 10:45 AM, Nathan Fontenot wrote: > On 11/16/2017 11:27 AM, Michael Bringmann wrote: >> On powerpc systems which allow 'hot-add' of CPU, it may occur that >> the new resources are to be inserted into nodes that were not used >> for memory resources at bootup. Many different configurations of >> PowerPC resources may need to be supported depending upon the >> environment. Important characteristics of the nodes and operating >> environment include: >> >> * Dedicated vs. shared resources. Shared resources require > > this should be shared CPUs require...since shared CPUs have their > affinity set to node 0 at boot and when hot-added. Patch description updated to include this modification. >> information such as the VPHN hcall for CPU assignment to nodes. >> Associativity decisions made based on dedicated resource rules, >> such as associativity properties in the device tree, may vary >> from decisions made using the values returned by the VPHN hcall. >> * memoryless nodes at boot. Nodes need to be defined as 'possible' >> at boot for operation with other code modules. Previously, the >> powerpc code would limit the set of possible nodes to those which >> have memory assigned at boot, and were thus online. Subsequent >> add/remove of CPUs or memory would only work with this subset of >> possible nodes. >> * memoryless nodes with CPUs at boot. Due to the previous restriction >> on nodes, nodes that had CPUs but no memory were being collapsed >> into other nodes that did have memory at boot. In practice this >> meant that the node assignment presented by the runtime kernel >> differed from the affinity and associativity attributes presented >> by the device tree or VPHN hcalls. Nodes that might be known to >> the pHyp were not 'possible' in the runtime kernel because they did >> not have memory at boot. >> >> This patch fixes some problems encountered at runtime with >> configurations that support memory-less nodes, or that hot-add CPUs >> into nodes that are memoryless during system execution after boot. >> The problems of interest include, >> >> * Nodes known to powerpc to be memoryless at boot, but to have >> CPUs in them are allowed to be 'possible' and 'online'. Memory >> allocations for those nodes are taken from another node that does >> have memory until and if memory is hot-added to the node. >> * Nodes which have no resources assigned at boot, but which may still >> be referenced subsequently by affinity or associativity attributes, >> are kept in the list of 'possible' nodes for powerpc. Hot-add of >> memory or CPUs to the system can reference these nodes and bring >> them online instead of redirecting the references to one of the set >> of nodes known to have memory at boot. >> >> Note that this software operates under the context of CPU hotplug. >> We are not doing memory hotplug in this code, but rather updating >> the kernel's CPU topology (i.e. arch_update_cpu_topology / >> numa_update_cpu_topology). We are initializing a node that may be >> used by CPUs or memory before it can be referenced as invalid by a >> CPU hotplug operation. CPU hotplug operations are protected by a >> range of APIs including cpu_maps_update_begin/cpu_maps_update_done, >> cpus_read/write_lock / cpus_read/write_unlock, device locks, and more. >> Memory hotplug operations, including try_online_node, are protected >> by mem_hotplug_begin/mem_hotplug_done, device locks, and more. In >> the case of CPUs being hot-added to a previously memoryless node, the >> try_online_node operation occurs wholly within the CPU locks with no >> overlap. Using HMC hot-add/hot-remove operations, we have been able >> to add and remove CPUs to any possible node without failures. HMC >> operations involve a degree self-serialization, though. > > This may be able to be stated as simply saying that cpu hotplug operations > are serialized with the device_hotplug_lock. > >> >> Signed-off-by: Michael Bringmann >> --- >> Changes in V6: >> -- Add some needed node initialization to runtime code that maps >> CPUs based on VPHN associativity >> -- Add error checks and alternate recovery for compile flag >> CONFIG_MEMORY_HOTPLUG >> -- Add alternate node selection recovery for !CONFIG_MEMORY_HOTPLUG >> -- Add more information to the patch introductory text >> --- >> arch/powerpc/mm/numa.c | 51 >> ++-- >> 1 file changed, 40 insertions(+), 11 deletions(-) >> >> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c >> index 334a1ff..163f4cc 100644 >> --- a/arch/powerpc/mm/numa.c >> +++ b/arch/powerpc/mm/numa.c >> @@ -551,7 +551,7 @@ static int numa_setup_cpu(unsigned long lcpu) >> nid = of_node_to_nid_single(cpu); >> >> out_present: >> -if (nid < 0 || !node_online(nid)) >> +if (nid < 0 || !node_possible(nid)) >> nid = first_online_node; >> >> map_cpu_to_node(lcpu,
Re: [PATCH V7 1/3] powerpc/nodes: Ensure enough nodes avail for operations
See below.
On 11/22/2017 05:17 AM, Michael Ellerman wrote:
> Nathan Fontenot writes:
>> On 11/16/2017 11:24 AM, Michael Bringmann wrote:
> ...
>>> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
>>> index eb604b3..334a1ff 100644
>>> --- a/arch/powerpc/mm/numa.c
>>> +++ b/arch/powerpc/mm/numa.c
>>> @@ -892,6 +892,37 @@ static void __init setup_node_data(int nid, u64
>>> start_pfn, u64 end_pfn)
>>> NODE_DATA(nid)->node_spanned_pages = spanned_pages;
>>> }
>>>
>>> +static void __init find_possible_nodes(void)
>>> +{
>>> + struct device_node *rtas;
>>> + u32 numnodes, i;
>>> +
>>> + if (min_common_depth <= 0)
>>> + return;
>>> +
>>> + rtas = of_find_node_by_path("/rtas");
>>> + if (!rtas)
>>> + return;
>>> +
>>> + if (of_property_read_u32_index(rtas,
>>> + "ibm,max-associativity-domains",
>>> + min_common_depth, &numnodes))
>>> + goto out;
>>> +
>>> + pr_info("numa: Nodes = %d (mcd = %d)\n", numnodes,
>>> + min_common_depth);
>>
>> numa.c already has a pr_fmt define, no need to pre-pend "numa:" to the
>> information message.
>
> And in fact no need to print that out here at all, it's covered
> elsewhere. So just drop that pr_info() entirely.
>
> cheers
>
>
Okay. pr_info() removed.
--
Michael W. Bringmann
Linux Technology Center
IBM Corporation
Tie-Line 363-5196
External: (512) 286-5196
Cell: (512) 466-0650
m...@linux.vnet.ibm.com
Re: [PATCH V7 1/3] powerpc/nodes: Ensure enough nodes avail for operations
See below.
On 11/20/2017 10:33 AM, Nathan Fontenot wrote:
>
>
> On 11/16/2017 11:24 AM, Michael Bringmann wrote:
>> On powerpc systems which allow 'hot-add' of CPU or memory resources,
>> it may occur that the new resources are to be inserted into nodes
>> that were not used for these resources at bootup. In the kernel,
>> any node that is used must be defined and initialized. These empty
>> nodes may occur when,
>>
>> * Dedicated vs. shared resources. Shared resources require
>> information such as the VPHN hcall for CPU assignment to nodes.
>> Associativity decisions made based on dedicated resource rules,
>> such as associativity properties in the device tree, may vary
>> from decisions made using the values returned by the VPHN hcall.
>> * memoryless nodes at boot. Nodes need to be defined as 'possible'
>> at boot for operation with other code modules. Previously, the
>> powerpc code would limit the set of possible nodes to those which
>> have memory assigned at boot, and were thus online. Subsequent
>> add/remove of CPUs or memory would only work with this subset of
>> possible nodes.
>> * memoryless nodes with CPUs at boot. Due to the previous restriction
>> on nodes, nodes that had CPUs but no memory were being collapsed
>> into other nodes that did have memory at boot. In practice this
>> meant that the node assignment presented by the runtime kernel
>> differed from the affinity and associativity attributes presented
>> by the device tree or VPHN hcalls. Nodes that might be known to
>> the pHyp were not 'possible' in the runtime kernel because they did
>> not have memory at boot.
>>
>> This patch ensures that sufficient nodes are defined to support
>> configuration requirements after boot, as well as at boot. This
>> patch set fixes a couple of problems.
>>
>> * Nodes known to powerpc to be memoryless at boot, but to have
>> CPUs in them are allowed to be 'possible' and 'online'. Memory
>> allocations for those nodes are taken from another node that does
>> have memory until and if memory is hot-added to the node.
>> * Nodes which have no resources assigned at boot, but which may still
>> be referenced subsequently by affinity or associativity attributes,
>> are kept in the list of 'possible' nodes for powerpc. Hot-add of
>> memory or CPUs to the system can reference these nodes and bring
>> them online instead of redirecting to one of the set of nodes that
>> were known to have memory at boot.
>>
>> This patch extracts the value of the lowest domain level (number of
>> allocable resources) from the device tree property
>> "ibm,max-associativity-domains" to use as the maximum number of nodes
>> to setup as possibly available in the system. This new setting will
>> override the instruction,
>>
>> nodes_and(node_possible_map, node_possible_map, node_online_map);
>>
>> presently seen in the function arch/powerpc/mm/numa.c:initmem_init().
>>
>> If the "ibm,max-associativity-domains" property is not present at boot,
>> no operation will be performed to define or enable additional nodes, or
>> enable the above 'nodes_and()'.
>>
>> Signed-off-by: Michael Bringmann
>> ---
>> Changes in V6:
>> -- Remove some node initialization/allocation from boot setup
>> to later in runtime to try to limit memory needs early on
>> -- Augment descriptive documentation for patch
>> ---
>> arch/powerpc/mm/numa.c | 40 +---
>> 1 file changed, 37 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
>> index eb604b3..334a1ff 100644
>> --- a/arch/powerpc/mm/numa.c
>> +++ b/arch/powerpc/mm/numa.c
>> @@ -892,6 +892,37 @@ static void __init setup_node_data(int nid, u64
>> start_pfn, u64 end_pfn)
>> NODE_DATA(nid)->node_spanned_pages = spanned_pages;
>> }
>>
>> +static void __init find_possible_nodes(void)
>> +{
>> +struct device_node *rtas;
>> +u32 numnodes, i;
>> +
>> +if (min_common_depth <= 0)
>> +return;
>> +
>> +rtas = of_find_node_by_path("/rtas");
>> +if (!rtas)
>> +return;
>> +
>> +if (of_property_read_u32_index(rtas,
>> +"ibm,max-associativity-domains",
>> +min_common_depth, &numnodes))
>> +goto out;
>> +
>> +pr_info("numa: Nodes = %d (mcd = %d)\n", numnodes,
>> +min_common_depth);
>
> numa.c already has a pr_fmt define, no need to pre-pend "numa:" to the
> information message.
>
> -Nathan
Okay.
>
>> +
>> +for (i = 0; i < numnodes; i++) {
>> +if (!node_possible(i)) {
>> +setup_node_data(i, 0, 0);
>> +node_set(i, node_possible_map);
>> +}
>> +}
>> +
>> +out:
>> +of_node_put(rtas);
>> +}
>> +
>> void __init initmem_init(void)
>> {
>> int nid, cpu;
>> @@ -905,12 +936,15 @@ void __init initmem_init(void)
>> memblock_dump_all();
>>
>>
Re: [PATCH V2 3/3] postmigration/memory: Associativity & ibm,dynamic-memory-v2
Okay. We can discuss that tomorrow.
On 11/20/2017 10:14 AM, Nathan Fontenot wrote:
> We may want to wait on this patch. I have been working on patches to separate
> the LMB information from the device tree property format. Once those patches
> are acceptable we can use a common routine for affinity updates.
>
> -Nathan
>
> On 11/16/2017 11:51 AM, Michael Bringmann wrote:
>> postmigration/memory: Now apply changes to the associativity of memory
>> blocks described by the 'ibm,dynamic-memory-v2' property regarding
>> the topology of LPARS in Post Migration events.
>>
>> * Extend the previous work done for the 'ibm,associativity-lookup-array'
>> to apply to either property 'ibm,dynamic-memory' or
>> 'ibm,dynamic-memory-v2', whichever is present.
>> * Add new code to parse the 'ibm,dynamic-memory-v2' property looking
>> for differences in block 'assignment', associativity indexes per
>> block, and any other difference currently known.
>>
>> When block differences are recognized, the memory block may be removed,
>> added, or updated depending upon the state of the new device tree
>> property and differences from the migrated value of the property.
>>
>> Signed-off-by: Michael Bringmann
>> ---
>> Changes in V2:
>> -- Remove unnecessary spacing changes from patch.
>> -- Improve patch description.
>> ---
>> arch/powerpc/include/asm/prom.h | 12 ++
>> arch/powerpc/platforms/pseries/hotplug-memory.c | 169
>> ++-
>> 2 files changed, 172 insertions(+), 9 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/prom.h
>> b/arch/powerpc/include/asm/prom.h
>> index 825bd59..e16ef0f 100644
>> --- a/arch/powerpc/include/asm/prom.h
>> +++ b/arch/powerpc/include/asm/prom.h
>> @@ -92,6 +92,18 @@ struct of_drconf_cell {
>> u32 flags;
>> };
>>
>> +/* The of_drconf_cell_v2 struct defines the layout of the LMB array
>> + * specified in the device tree property
>> + * ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory-v2
>> + */
>> +struct of_drconf_cell_v2 {
>> +u32 num_seq_lmbs;
>> +u64 base_address;
>> +u32 drc_index;
>> +u32 aa_index;
>> +u32 flags;
>> +} __attribute__((packed));
>> +
>> #define DRCONF_MEM_ASSIGNED 0x0008
>> #define DRCONF_MEM_AI_INVALID 0x0040
>> #define DRCONF_MEM_RESERVED 0x0080
>> diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c
>> b/arch/powerpc/platforms/pseries/hotplug-memory.c
>> index b37e6ad..bf9687b 100644
>> --- a/arch/powerpc/platforms/pseries/hotplug-memory.c
>> +++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
>> @@ -1171,14 +1171,111 @@ static int pseries_update_drconf_memory(struct
>> of_reconfig_data *pr)
>> return rc;
>> }
>>
>> +static inline int pseries_memory_v2_find_drc(u32 drc_index,
>> +u64 *base_addr, unsigned long memblock_size,
>> +struct of_drconf_cell_v2 **drmem,
>> +struct of_drconf_cell_v2 *last_drmem)
>> +{
>> +struct of_drconf_cell_v2 *dm = (*drmem);
>> +
>> +while (dm < last_drmem) {
>> +if ((be32_to_cpu(dm->drc_index) <= drc_index) &&
>> +(drc_index <= (be32_to_cpu(dm->drc_index)+
>> +be32_to_cpu(dm->num_seq_lmbs)-1))) {
>> +int offset = drc_index - be32_to_cpu(dm->drc_index);
>> +(*base_addr) = be64_to_cpu(dm->base_address) +
>> +(offset * memblock_size);
>> +break;
>> +} else if (drc_index > (be32_to_cpu(dm->drc_index)+
>> +be32_to_cpu(dm->num_seq_lmbs)-1)) {
>> +dm++;
>> +(*drmem) = dm;
>> +} else if (be32_to_cpu(dm->drc_index) > drc_index) {
>> +return -1;
>> +}
>> +}
>> +
>> +return 0;
>> +}
>> +
>> +static int pseries_update_drconf_memory_v2(struct of_reconfig_data *pr)
>> +{
>> +struct of_drconf_cell_v2 *new_drmem, *old_drmem, *last_old_drmem;
>> +unsigned long memblock_size;
>> +u32 new_entries, old_entries;
>> +u64 old_base_addr;
>> +__be32 *p;
>> +int i, rc = 0;
>> +
>> +if (rtas_hp_event)
>> +return 0;
>> +
>> +memblock_size = pseries_memory_block_size();
>> +if (!memblock_size)
>> +return -EINVAL;
>> +
>> +/* The first int of the property is the number of lmb's
>> + * described by the property. This is followed by an array
>> + * of of_drconf_cell_v2 entries. Get the number of entries
>> + * and skip to the array of of_drconf_cell_v2's.
>> + */
>> +p = (__be32 *) pr->old_prop->value;
>> +if (!p)
>> +return -EINVAL;
>> +old_entries = be32_to_cpu(*p++);
>> +old_drmem = (struct of_drconf_cell_v2 *)p;
>> +last_old_drmem = old_drmem +
>> +(sizeof(struct of_drconf_cell_v2) * old_entries);
>> +
>> +p = (__be32 *)pr->prop->value;
>> +
Re: [PATCH V2 1/3] hotplug/mobility: Apply assoc updates for Post Migration Topo
See below.
On 11/20/2017 10:04 AM, Nathan Fontenot wrote:
> On 11/16/2017 11:50 AM, Michael Bringmann wrote:
>> hotplug/mobility: Recognize more changes to the associativity of
>> memory blocks described by the 'ibm,dynamic-memory' and 'cpu'
>> properties when processing the topology of LPARS in Post Migration
>> events. Previous efforts only recognized whether a memory block's
>> assignment had changed in the property. Changes here include:
>>
>> * Checking the aa_index values of the old/new properties and 'readd'
>> any block for which the setting has changed.
>> * Checking for changes in cpus and submitting 'readd' ops for them.
>> * Creating some common support routines for the submission of memory
>> or cpu 'readd' operations.
>>
>> Signed-off-by: Michael Bringmann
>> ---
>> Changes in V2:
>> -- Try to improve patch header documentation.
>> ---
>> arch/powerpc/platforms/pseries/hotplug-cpu.c| 64
>> +++
>> arch/powerpc/platforms/pseries/hotplug-memory.c |6 ++
>> arch/powerpc/platforms/pseries/mobility.c | 47 +
>> arch/powerpc/platforms/pseries/pseries.h|2 +
>> 4 files changed, 109 insertions(+), 10 deletions(-)
>>
>> diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> b/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> index fadb95e..d127c3a 100644
>> --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
>> @@ -634,6 +634,27 @@ static int dlpar_cpu_remove_by_index(u32 drc_index)
>> return rc;
>> }
>>
>> +static int dlpar_cpu_readd_by_index(u32 drc_index)
>> +{
>> +int rc = 0;
>> +
>> +pr_info("Attempting to update CPU, drc index %x\n", drc_index);
>> +
>> +if (dlpar_cpu_remove_by_index(drc_index))
>> +rc = -EINVAL;
>> +else if (dlpar_cpu_add(drc_index))
>> +rc = -EINVAL;
>> +
>> +if (rc)
>> +pr_info("Failed to update cpu at drc_index %lx\n",
>> +(unsigned long int)drc_index);
>> +else
>> +pr_info("CPU at drc_index %lx was updated\n",
>> +(unsigned long int)drc_index);
>> +
>> +return rc;
>> +}
>> +
>> static int find_dlpar_cpus_to_remove(u32 *cpu_drcs, int cpus_to_remove)
>> {
>> struct device_node *dn;
>> @@ -824,6 +845,9 @@ int dlpar_cpu(struct pseries_hp_errorlog *hp_elog)
>> else
>> rc = -EINVAL;
>> break;
>> +case PSERIES_HP_ELOG_ACTION_READD:
>> +rc = dlpar_cpu_readd_by_index(drc_index);
>> +break;
>> default:
>> pr_err("Invalid action (%d) specified\n", hp_elog->action);
>> rc = -EINVAL;
>> @@ -874,6 +898,42 @@ static ssize_t dlpar_cpu_release(const char *buf,
>> size_t count)
>>
>> #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
>>
>> +static int pseries_update_drconf_cpu(struct of_reconfig_data *pr)
>
> I think we can drop the 'drconf' piece from this function name.
>
> I'm think you got that from the memory routines that use drconf, which
> is really short for dynamic reconfiguration. This was used to state the
> routine worked on memory represented in the dynamic-reconfiguration
> properties.
Okay.
>
>> +{
>> +u32 old_entries, new_entries;
>> +__be32 *p, *old_assoc, *new_assoc;
>> +
>> +if (strcmp(pr->dn->type, "cpu"))
>> +return 0;
>> +
>> +/* The first int of the property is the number of domains's
>> + * described. This is followed by an array of level values.
>> + */
>> +p = (__be32 *) pr->old_prop->value;
>> +if (!p)
>> +return -EINVAL;
>> +old_entries = be32_to_cpu(*p++);
>> +old_assoc = p;
>> +
>> +p = (__be32 *)pr->prop->value;
>> +if (!p)
>> +return -EINVAL;
>> +new_entries = be32_to_cpu(*p++);
>> +new_assoc = p;
>> +
>> +if (old_entries == new_entries) {
>> +int sz = old_entries * sizeof(int);
>> +
>> +if (!memcmp(old_assoc, new_assoc, sz))
>> +pseries_cpu_readd_by_index(pr->dn->phandle);
>> +
>> +} else {
>> +pseries_cpu_readd_by_index(pr->dn->phandle);
>> +}
>> +
>> +return 0;
>> +}
>> +
>> static int pseries_smp_notifier(struct notifier_block *nb,
>> unsigned long action, void *data)
>> {
>> @@ -887,6 +947,10 @@ static int pseries_smp_notifier(struct notifier_block
>> *nb,
>> case OF_RECONFIG_DETACH_NODE:
>> pseries_remove_processor(rd->dn);
>> break;
>> +case OF_RECONFIG_UPDATE_PROPERTY:
>> +if (!strcmp(rd->prop->name, "ibm,associativity"))
>> +err = pseries_update_drconf_cpu(rd);
>> +break;
>> }
>> return notifier_from_errno(err);
>> }
>> diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c
>> b/arch/powerpc/platforms/pseries/hotplug-memory.c
>> index 1d48ab4..c61cfc6 100644
>> --- a/arch/powerpc/pl
[PATCH v2 02/10] include: Move compat_timespec/ timeval to compat_time.h
All the current architecture specific defines for these
are the same. Refactor these common defines to a common
header file.
The new common linux/compat_time.h is also useful as it
will eventually be used to hold all the defines that
are needed for compat time types that support non y2038
safe types. New architectures need not have to define these
new types as they will only use new y2038 safe syscalls.
This file can be deleted after y2038 when we stop supporting
non y2038 safe syscalls.
The patch also requires an operation similar to:
git grep "asm/compat\.h" | cut -d ":" -f 1 | xargs -n 1 sed -i -e
"s%asm/compat.h%linux/compat.h%g"
Cc: a...@kernel.org
Cc: b...@kernel.crashing.org
Cc: borntrae...@de.ibm.com
Cc: catalin.mari...@arm.com
Cc: cmetc...@mellanox.com
Cc: coh...@redhat.com
Cc: da...@davemloft.net
Cc: del...@gmx.de
Cc: de...@driverdev.osuosl.org
Cc: gerald.schae...@de.ibm.com
Cc: gre...@linuxfoundation.org
Cc: heiko.carst...@de.ibm.com
Cc: hoepp...@linux.vnet.ibm.com
Cc: h...@zytor.com
Cc: j...@parisc-linux.org
Cc: j...@linux.vnet.ibm.com
Cc: linux-ker...@vger.kernel.org
Cc: linux-m...@linux-mips.org
Cc: linux-par...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-s...@vger.kernel.org
Cc: mark.rutl...@arm.com
Cc: mi...@redhat.com
Cc: m...@ellerman.id.au
Cc: ober...@linux.vnet.ibm.com
Cc: oprofile-l...@lists.sf.net
Cc: pau...@samba.org
Cc: pet...@infradead.org
Cc: r...@linux-mips.org
Cc: rost...@goodmis.org
Cc: r...@kernel.org
Cc: schwidef...@de.ibm.com
Cc: seb...@linux.vnet.ibm.com
Cc: sparcli...@vger.kernel.org
Cc: s...@linux.vnet.ibm.com
Cc: ubr...@linux.vnet.ibm.com
Cc: will.dea...@arm.com
Cc: x...@kernel.org
Signed-off-by: Arnd Bergmann
Signed-off-by: Deepa Dinamani
Acked-by: Steven Rostedt (VMware)
---
arch/arm64/include/asm/compat.h | 11 ---
arch/arm64/include/asm/stat.h | 1 +
arch/arm64/kernel/hw_breakpoint.c | 1 -
arch/arm64/kernel/perf_regs.c | 2 +-
arch/arm64/kernel/process.c | 1 -
arch/mips/include/asm/compat.h| 11 ---
arch/mips/kernel/signal32.c | 2 +-
arch/parisc/include/asm/compat.h | 11 ---
arch/powerpc/include/asm/compat.h | 11 ---
arch/powerpc/kernel/asm-offsets.c | 2 +-
arch/powerpc/oprofile/backtrace.c | 2 +-
arch/s390/hypfs/hypfs_sprp.c | 1 -
arch/s390/include/asm/compat.h| 11 ---
arch/s390/include/asm/elf.h | 3 +--
arch/s390/kvm/priv.c | 1 -
arch/s390/pci/pci_clp.c | 1 -
arch/sparc/include/asm/compat.h | 11 ---
arch/tile/include/asm/compat.h| 11 ---
arch/x86/events/core.c| 2 +-
arch/x86/include/asm/compat.h | 11 ---
arch/x86/include/asm/ftrace.h | 2 +-
arch/x86/include/asm/sys_ia32.h | 2 +-
arch/x86/kernel/sys_x86_64.c | 2 +-
drivers/s390/block/dasd_ioctl.c | 1 -
drivers/s390/char/fs3270.c| 1 -
drivers/s390/char/sclp_ctl.c | 1 -
drivers/s390/char/vmcp.c | 1 -
drivers/s390/cio/chsc_sch.c | 1 -
drivers/s390/net/qeth_core_main.c | 2 +-
drivers/staging/pi433/pi433_if.c | 2 +-
include/linux/compat.h| 1 +
include/linux/compat_time.h | 19 +++
32 files changed, 32 insertions(+), 110 deletions(-)
create mode 100644 include/linux/compat_time.h
diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
index a3c7f271ad4c..977b5064afc1 100644
--- a/arch/arm64/include/asm/compat.h
+++ b/arch/arm64/include/asm/compat.h
@@ -34,7 +34,6 @@
typedef u32compat_size_t;
typedef s32compat_ssize_t;
-typedef s32compat_time_t;
typedef s32compat_clock_t;
typedef s32compat_pid_t;
typedef u16__compat_uid_t;
@@ -66,16 +65,6 @@ typedef u32 compat_ulong_t;
typedef u64compat_u64;
typedef u32compat_uptr_t;
-struct compat_timespec {
- compat_time_t tv_sec;
- s32 tv_nsec;
-};
-
-struct compat_timeval {
- compat_time_t tv_sec;
- s32 tv_usec;
-};
-
struct compat_stat {
#ifdef __AARCH64EB__
short st_dev;
diff --git a/arch/arm64/include/asm/stat.h b/arch/arm64/include/asm/stat.h
index 15e35598ac40..eab738019707 100644
--- a/arch/arm64/include/asm/stat.h
+++ b/arch/arm64/include/asm/stat.h
@@ -20,6 +20,7 @@
#ifdef CONFIG_COMPAT
+#include
#include
/*
diff --git a/arch/arm64/kernel/hw_breakpoint.c
b/arch/arm64/kernel/hw_breakpoint.c
index 749f81779420..bfa2b78cf0e3 100644
--- a/arch/arm64/kernel/hw_breakpoint.c
+++ b/arch/arm64/kernel/hw_breakpoint.c
@@ -29,7 +29,6 @@
#include
#include
-#include
#include
#include
#include
diff --git a/arch/arm64/kernel/perf_regs.c b/arch/arm64/kernel/perf_regs.c
index 1d091d048d04..929fc369d0be 100644
--- a/arch/arm64/kernel/perf_regs.c
+++ b/arch/arm64/kernel/perf_regs.c
@@ -5,7 +5,7 @@
#include
#include
-#include
+#include
#include
#include
[PATCH v2 00/10] posix_clocks: Prepare syscalls for 64 bit time_t conversion
The series is a preparation series for individual architectures to use 64 bit time_t syscalls in compat and 32 bit emulation modes. This is a follow up to the series Arnd Bergmann posted: https://sourceware.org/ml/libc-alpha/2015-05/msg00070.html [1] Big picture is as per the lwn article: https://lwn.net/Articles/643234/ [2] The series is directed at converting posix clock syscalls: clock_gettime, clock_settime, clock_getres and clock_nanosleep to use a new data structure __kernel_timespec at syscall boundaries. __kernel_timespec maintains 64 bit time_t across all execution modes. vdso will be handled as part of each architecture when they enable support for 64 bit time_t. The compat syscalls are repurposed to provide backward compatibility by using them as native syscalls as well for 32 bit architectures. They will continue to use timespec at syscall boundaries. CONFIG_64_BIT_TIME controls whether the syscalls use __kernel_timespec or timespec at syscall boundaries. The series does the following: 1. Enable compat syscalls on 32 bit architectures. 2. Add a new __kernel_timespec type to be used as the data structure for all the new syscalls. 3. Add new config CONFIG_64BIT_TIME(intead of the CONFIG_COMPAT_TIME in [1] and [2] to switch to new definition of __kernel_timespec. It is the same as struct timespec otherwise. 4. Add new CONFIG_32BIT_TIME to conditionally compile compat syscalls. * Changes since v1: * Introduce CONFIG_32BIT_TIME * Fixed zeroing out of higher order bits of tv_nsec * Included Arnd's changes to fix up use of compat headers I decided against using LEGACY_TIME_SYSCALLS to conditionally compile legacy time syscalls such as sys_nanosleep because this will need to enclose compat_sys_nanosleep as well. So, defining it as config LEGACY_TIME_SYSCALLS def_bool 64BIT || !64BIT_TIME will not include compat_sys_nanosleep. We will instead need a new config to exclusively mark legacy syscalls. Deepa Dinamani (10): compat: Make compat helpers independent of CONFIG_COMPAT include: Move compat_timespec/ timeval to compat_time.h compat: enable compat_get/put_timespec64 always arch: introduce CONFIG_64BIT_TIME arch: Introduce CONFIG_COMPAT_32BIT_TIME posix-clocks: Make compat syscalls depend on CONFIG_COMPAT_32BIT_TIME include: Add new y2038 safe __kernel_timespec fix get_timespec64() for y2038 safe compat interfaces change time types to new y2038 safe __kernel_* types nanosleep: change time types to safe __kernel_* types arch/Kconfig | 18 +++ arch/arm64/include/asm/compat.h| 11 arch/arm64/include/asm/stat.h | 1 + arch/arm64/kernel/hw_breakpoint.c | 1 - arch/arm64/kernel/perf_regs.c | 2 +- arch/arm64/kernel/process.c| 1 - arch/mips/include/asm/compat.h | 11 arch/mips/kernel/signal32.c| 2 +- arch/parisc/include/asm/compat.h | 11 arch/powerpc/include/asm/compat.h | 11 arch/powerpc/kernel/asm-offsets.c | 2 +- arch/powerpc/oprofile/backtrace.c | 2 +- arch/s390/hypfs/hypfs_sprp.c | 1 - arch/s390/include/asm/compat.h | 11 arch/s390/include/asm/elf.h| 3 +- arch/s390/kvm/priv.c | 1 - arch/s390/pci/pci_clp.c| 1 - arch/sparc/include/asm/compat.h| 11 arch/tile/include/asm/compat.h | 11 arch/x86/events/core.c | 2 +- arch/x86/include/asm/compat.h | 11 arch/x86/include/asm/ftrace.h | 2 +- arch/x86/include/asm/sys_ia32.h| 2 +- arch/x86/kernel/sys_x86_64.c | 2 +- drivers/s390/block/dasd_ioctl.c| 1 - drivers/s390/char/fs3270.c | 1 - drivers/s390/char/sclp_ctl.c | 1 - drivers/s390/char/vmcp.c | 1 - drivers/s390/cio/chsc_sch.c| 1 - drivers/s390/net/qeth_core_main.c | 2 +- drivers/staging/pi433/pi433_if.c | 2 +- include/linux/compat.h | 11 ++-- include/linux/compat_time.h| 23 + include/linux/restart_block.h | 7 +-- include/linux/syscalls.h | 12 ++--- include/linux/time.h | 4 +- include/linux/time64.h | 10 +++- include/uapi/asm-generic/posix_types.h | 1 + include/uapi/linux/time.h | 7 +++ kernel/Makefile| 2 +- kernel/compat.c| 92 ++ kernel/time/hrtimer.c | 10 ++-- kernel/time/posix-stubs.c | 12 +++-- kernel/time/posix-timers.c | 24 ++--- kernel/time/time.c | 10 +++- 45 files changed, 175 insertions(+), 190 deletions(-) create mode 100644 include/linux/compat_time.h base-commit: b0a84f19a5161418d4360cd57603e94ed489915e -- 2.14.1 Cc: a...@kernel.org Cc: b...@kernel.crashing.org Cc: borntrae...@de.ibm.com Cc:
Re: Subject: [PATCH V4 3/4] hotplug/drc-info: Add code to search ibm,drc-info property
See below.
On 11/20/2017 09:38 AM, Nathan Fontenot wrote:
> On 11/16/2017 02:11 PM, Michael Bringmann wrote:
>> rpadlpar_core.c: Provide parallel routines to search the older device-
>> tree properties ("ibm,drc-indexes", "ibm,drc-names", "ibm,drc-types"
>> and "ibm,drc-power-domains"), or the new property "ibm,drc-info".
>>
>> The interface to examine the DRC information is changed from a "get"
>> function that returns values for local verification elsewhere, to a
>> "check" function that validates the 'name' and/or 'type' of a device
>> node. This update hides the format of the underlying device-tree
>> properties, and concentrates the value checks into a single function
>> without requiring the user to verify whether a search was successful.
>>
>> Signed-off-by: Michael Bringmann
>> ---
>> Changes in V4:
>> -- Rename of_one_drc_info to of_read_drc_info_cell
>> -- Fix some spacing within arguments
>> ---
>> drivers/pci/hotplug/rpadlpar_core.c | 13 ++--
>> drivers/pci/hotplug/rpaphp.h|4 +
>> drivers/pci/hotplug/rpaphp_core.c | 110
>> +++
>> 3 files changed, 92 insertions(+), 35 deletions(-)
>>
>> diff --git a/drivers/pci/hotplug/rpadlpar_core.c
>> b/drivers/pci/hotplug/rpadlpar_core.c
>> index a3449d7..fc01d7d 100644
>> --- a/drivers/pci/hotplug/rpadlpar_core.c
>> +++ b/drivers/pci/hotplug/rpadlpar_core.c
>> @@ -27,6 +27,7 @@
>> #include
>> #include
>> #include
>> +#include
>>
>> #include "../pci.h"
>> #include "rpaphp.h"
>> @@ -44,15 +45,14 @@ static struct device_node *find_vio_slot_node(char
>> *drc_name)
>> {
>> struct device_node *parent = of_find_node_by_name(NULL, "vdevice");
>> struct device_node *dn = NULL;
>> -char *name;
>> int rc;
>>
>> if (!parent)
>> return NULL;
>>
>> while ((dn = of_get_next_child(parent, dn))) {
>> -rc = rpaphp_get_drc_props(dn, NULL, &name, NULL, NULL);
>> -if ((rc == 0) && (!strcmp(drc_name, name)))
>> +rc = rpaphp_check_drc_props(dn, drc_name, NULL);
>> +if (rc == 0)
>> break;
>> }
>>
>> @@ -64,15 +64,12 @@ static struct device_node *find_php_slot_pci_node(char
>> *drc_name,
>>char *drc_type)
>> {
>> struct device_node *np = NULL;
>> -char *name;
>> -char *type;
>> int rc;
>>
>> while ((np = of_find_node_by_name(np, "pci"))) {
>> -rc = rpaphp_get_drc_props(np, NULL, &name, &type, NULL);
>> +rc = rpaphp_check_drc_props(np, drc_name, drc_type);
>> if (rc == 0)
>> -if (!strcmp(drc_name, name) && !strcmp(drc_type, type))
>> -break;
>> +break;
>> }
>>
>> return np;
>> diff --git a/drivers/pci/hotplug/rpaphp.h b/drivers/pci/hotplug/rpaphp.h
>> index 7db024e..8db5f2e 100644
>> --- a/drivers/pci/hotplug/rpaphp.h
>> +++ b/drivers/pci/hotplug/rpaphp.h
>> @@ -91,8 +91,8 @@ struct slot {
>>
>> /* rpaphp_core.c */
>> int rpaphp_add_slot(struct device_node *dn);
>> -int rpaphp_get_drc_props(struct device_node *dn, int *drc_index,
>> -char **drc_name, char **drc_type, int *drc_power_domain);
>> +int rpaphp_check_drc_props(struct device_node *dn, char *drc_name,
>> +char *drc_type);
>>
>> /* rpaphp_slot.c */
>> void dealloc_slot_struct(struct slot *slot);
>> diff --git a/drivers/pci/hotplug/rpaphp_core.c
>> b/drivers/pci/hotplug/rpaphp_core.c
>> index 1e29aba..0a3b5f5 100644
>> --- a/drivers/pci/hotplug/rpaphp_core.c
>> +++ b/drivers/pci/hotplug/rpaphp_core.c
>> @@ -30,6 +30,7 @@
>> #include
>> #include
>> #include
>> +#include
>> #include/* for eeh_add_device() */
>> #include/* rtas_call */
>> #include /* for pci_controller */
>> @@ -196,25 +197,21 @@ static int get_children_props(struct device_node *dn,
>> const int **drc_indexes,
>> return 0;
>> }
>>
>> -/* To get the DRC props describing the current node, first obtain it's
>> - * my-drc-index property. Next obtain the DRC list from it's parent. Use
>> - * the my-drc-index for correlation, and obtain the requested properties.
>> +
>> +/* Verify the existence of 'drc_name' and/or 'drc_type' within the
>> + * current node. First obtain it's my-drc-index property. Next,
>> + * obtain the DRC info from it's parent. Use the my-drc-index for
>> + * correlation, and obtain/validate the requested properties.
>> */
>> -int rpaphp_get_drc_props(struct device_node *dn, int *drc_index,
>> -char **drc_name, char **drc_type, int *drc_power_domain)
>> +
>> +static int rpaphp_check_drc_props_v1(struct device_node *dn, char *drc_name,
>> +char *drc_type, unsigned int my_index)
>> {
>> +char *name_tmp, *type_tmp;
>> const int *indexes, *names;
>> const int *types, *domains;
>> -const unsigned int *my_index;
>> -char *name_tmp, *type_tmp;
>>
Re: [PATCH V4 2/4] pseries/drc-info: Search DRC properties for CPU indexes
See below.
On 11/20/2017 09:35 AM, Nathan Fontenot wrote:
> On 11/16/2017 02:11 PM, Michael Bringmann wrote:
>> pseries/drc-info: Provide parallel routines to convert between
>> drc_index and CPU numbers at runtime, using the older device-tree
>> properties ("ibm,drc-indexes", "ibm,drc-names", "ibm,drc-types"
>> and "ibm,drc-power-domains"), or the new property "ibm,drc-info".
>>
>> Signed-off-by: Michael Bringmann
>> ---
>> Changes in V4:
>> -- Rename of_one_drc_info to of_read_drc_info_cell
>> -- Fix some spacing within expressions
>> -- Make some style corrections
>> ---
>> arch/powerpc/include/asm/prom.h | 15 +++
>> arch/powerpc/platforms/pseries/of_helpers.c | 60 ++
>> arch/powerpc/platforms/pseries/pseries_energy.c | 138
>> ++-
>> 3 files changed, 185 insertions(+), 28 deletions(-)
>>
...
>> +
>> +value = info->value;
>> +value = (void *)of_prop_next_u32(info, value,
>> +&num_set_entries);
>
> Missed this the first time, but setting value twice seems a bit odd.
> This should be able to be collapsed into;
>
> value = (void *)of_prop_next_u32(info, NULL, &num_set_entries);
Okay
>
>> +if (!value)
>> +goto err_of_node_put;
>> +
>> +for (j = 0; j < num_set_entries; j++) {
>> +
>> +of_read_drc_info_cell(&info, &value, &drc);
>> +if (strncmp(drc.drc_type, "CPU", 3))
>> +goto err;
>> +
>> +if (thread_index < drc.last_drc_index)
>> +break;
>> +
>> +WARN_ON(((thread_index - drc.drc_index_start) %
>> +drc.sequential_inc) != 0);
>
> The WARN_ON that you have here, and in the code below, really fell like they
> should be in of_read_drc_info_cell. These are checks on reading the info in
> the drc-info property.
Remove unnecessary WARN_ON() checks.
>
>> +}
>> +
>> +ret = drc.drc_index_start + (thread_index * drc.sequential_inc);
>> +} else {
>> +const __be32 *indexes;
>> +
>> +indexes = of_get_property(dn, "ibm,drc-indexes", NULL);
>> +if (indexes == NULL)
>> +goto err_of_node_put;
>> +
>> +/*
>> + * The first element indexes[0] is the number of drc_indexes
>> + * returned in the list. Hence thread_index+1 will get the
>> + * drc_index corresponding to core number thread_index.
>> + */
>> +WARN_ON(thread_index > indexes[0]);
>> +ret = indexes[thread_index + 1];
>> +}
>> +
>> rc = 0;
>>
>> err_of_node_put:
>> @@ -72,34 +111,77 @@ static int drc_index_to_cpu(u32 drc_index)
>> {
>> struct device_node *dn = NULL;
>> const int *indexes;
>> -int i, cpu = 0;
>> +int thread_index = 0, cpu = 0;
>> int rc = 1;
>>
>> dn = of_find_node_by_path("/cpus");
>> if (dn == NULL)
>> goto err;
>> -indexes = of_get_property(dn, "ibm,drc-indexes", NULL);
>> -if (indexes == NULL)
>> -goto err_of_node_put;
>> -/*
>> - * First element in the array is the number of drc_indexes
>> - * returned. Search through the list to find the matching
>> - * drc_index and get the core number
>> - */
>> -for (i = 0; i < indexes[0]; i++) {
>> -if (indexes[i + 1] == drc_index)
>> +
>> +if (firmware_has_feature(FW_FEATURE_DRC_INFO)) {
>> +struct property *info = NULL;
>> +struct of_drc_info drc;
>> +int j;
>> +u32 num_set_entries;
>> +const __be32 *value;
>> +
>> +info = of_find_property(dn, "ibm,drc-info", NULL);
>> +if (info == NULL)
>> +goto err_of_node_put;
>> +
>> +value = info->value;
>> +value = (void *)of_prop_next_u32(info, value,
>> +&num_set_entries);
Okay.
>
> Same here as mentioned above.
>
> -Nathan
>
>> +if (!value)
>> +goto err_of_node_put;
>> +
>> +for (j = 0; j < num_set_entries; j++) {
>> +
>> +of_read_drc_info_cell(&info, &value, &drc);
>> +if (strncmp(drc.drc_type, "CPU", 3))
>> +goto err;
>> +
>> +WARN_ON(drc_index < drc.drc_index_start);
>> +WARN_ON(((drc_index - drc.drc_index_start) %
>> +drc.sequential_inc) != 0);
>> +
>> +if (drc_index > drc.last_drc_index) {
>> +cpu += drc.num_sequential_elems;
>> +continue;
>> +}
>> +cpu += ((drc_index - drc.drc_index_start) /
>> +drc.sequential_inc);
Applied "ASoC: fsl_ssi: serialize AC'97 register access operations" to the asoc tree
The patch
ASoC: fsl_ssi: serialize AC'97 register access operations
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From b880b8056b31288323745a13930bc45cf4c86e9d Mon Sep 17 00:00:00 2001
From: "Maciej S. Szmigiero"
Date: Mon, 20 Nov 2017 23:16:07 +0100
Subject: [PATCH] ASoC: fsl_ssi: serialize AC'97 register access operations
AC'97 register access operations (both read and write) on SSI use a one,
shared set of SSI registers for AC'97 register address and data.
This means that only one such access is possible at a time and so all these
operations need to be serialized.
Since an AC'97 register access operation in this driver takes 100us+ let's
use a mutex for this.
Use this opportunity to also change a default value returned from AC'97
register read function from -1 to 0, since that's what AC'97 specs require
to be returned when unknown / undefined registers are read.
Signed-off-by: Maciej S. Szmigiero
Signed-off-by: Mark Brown
---
sound/soc/fsl/fsl_ssi.c | 26 ++
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index c3a83ed0297e..424bafaf51ef 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -38,6 +38,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -265,6 +266,8 @@ struct fsl_ssi_private {
u32 fifo_watermark;
u32 dma_maxburst;
+
+ struct mutex ac97_reg_lock;
};
/*
@@ -1260,11 +1263,13 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97,
unsigned short reg,
if (reg > 0x7f)
return;
+ mutex_lock(&fsl_ac97_data->ac97_reg_lock);
+
ret = clk_prepare_enable(fsl_ac97_data->clk);
if (ret) {
pr_err("ac97 write clk_prepare_enable failed: %d\n",
ret);
- return;
+ goto ret_unlock;
}
lreg = reg << 12;
@@ -1278,6 +1283,9 @@ static void fsl_ssi_ac97_write(struct snd_ac97 *ac97,
unsigned short reg,
udelay(100);
clk_disable_unprepare(fsl_ac97_data->clk);
+
+ret_unlock:
+ mutex_unlock(&fsl_ac97_data->ac97_reg_lock);
}
static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97,
@@ -1285,16 +1293,18 @@ static unsigned short fsl_ssi_ac97_read(struct snd_ac97
*ac97,
{
struct regmap *regs = fsl_ac97_data->regs;
- unsigned short val = -1;
+ unsigned short val = 0;
u32 reg_val;
unsigned int lreg;
int ret;
+ mutex_lock(&fsl_ac97_data->ac97_reg_lock);
+
ret = clk_prepare_enable(fsl_ac97_data->clk);
if (ret) {
pr_err("ac97 read clk_prepare_enable failed: %d\n",
ret);
- return -1;
+ goto ret_unlock;
}
lreg = (reg & 0x7f) << 12;
@@ -1309,6 +1319,8 @@ static unsigned short fsl_ssi_ac97_read(struct snd_ac97
*ac97,
clk_disable_unprepare(fsl_ac97_data->clk);
+ret_unlock:
+ mutex_unlock(&fsl_ac97_data->ac97_reg_lock);
return val;
}
@@ -1569,6 +1581,7 @@ static int fsl_ssi_probe(struct platform_device *pdev)
}
if (fsl_ssi_is_ac97(ssi_private)) {
+ mutex_init(&ssi_private->ac97_reg_lock);
ret = snd_soc_set_ac97_ops_of_reset(&fsl_ssi_ac97_ops, pdev);
if (ret) {
dev_err(&pdev->dev, "could not set AC'97 ops\n");
@@ -1663,6 +1676,9 @@ static int fsl_ssi_probe(struct platform_device *pdev)
snd_soc_set_ac97_ops(NULL);
error_ac97_ops:
+ if (fsl_ssi_is_ac97(ssi_private))
+ mutex_destroy(&ssi_private->ac97_reg_lock);
+
if (ssi_private->soc->imx)
fsl_ssi_imx_clean(pdev, ssi_private);
@@ -1681,8 +1697,10 @@ static int fsl_ssi_remove(struct platform_device *pdev)
if (ssi_private->soc->imx)
fsl_ssi_imx_clean(pdev, ssi_private);
- if (fsl_ssi_is_ac97(ssi_private))
+ if (fsl_ssi_is_ac97(ssi_private)) {
snd_soc_set_ac97_ops(NULL);
+ mutex_destroy(&ssi_private->ac97_reg_lock);
+ }
Applied "ASoC: fsl_ssi: AC'97 ops need regmap, clock and cleaning up on failure" to the asoc tree
The patch
ASoC: fsl_ssi: AC'97 ops need regmap, clock and cleaning up on failure
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 695b78b548d8a26288f041e907ff17758df9e1d5 Mon Sep 17 00:00:00 2001
From: "Maciej S. Szmigiero"
Date: Mon, 20 Nov 2017 23:14:55 +0100
Subject: [PATCH] ASoC: fsl_ssi: AC'97 ops need regmap, clock and cleaning up
on failure
AC'97 ops (register read / write) need SSI regmap and clock, so they have
to be set after them.
We also need to set these ops back to NULL if we fail the probe.
Signed-off-by: Maciej S. Szmigiero
Acked-by: Nicolin Chen
Signed-off-by: Mark Brown
Cc: sta...@vger.kernel.org
---
sound/soc/fsl/fsl_ssi.c | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index f2f51e06e22c..c3a83ed0297e 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -1458,12 +1458,6 @@ static int fsl_ssi_probe(struct platform_device *pdev)
sizeof(fsl_ssi_ac97_dai));
fsl_ac97_data = ssi_private;
-
- ret = snd_soc_set_ac97_ops_of_reset(&fsl_ssi_ac97_ops, pdev);
- if (ret) {
- dev_err(&pdev->dev, "could not set AC'97 ops\n");
- return ret;
- }
} else {
/* Initialize this copy of the CPU DAI driver structure */
memcpy(&ssi_private->cpu_dai_drv, &fsl_ssi_dai_template,
@@ -1574,6 +1568,14 @@ static int fsl_ssi_probe(struct platform_device *pdev)
return ret;
}
+ if (fsl_ssi_is_ac97(ssi_private)) {
+ ret = snd_soc_set_ac97_ops_of_reset(&fsl_ssi_ac97_ops, pdev);
+ if (ret) {
+ dev_err(&pdev->dev, "could not set AC'97 ops\n");
+ goto error_ac97_ops;
+ }
+ }
+
ret = devm_snd_soc_register_component(&pdev->dev, &fsl_ssi_component,
&ssi_private->cpu_dai_drv, 1);
if (ret) {
@@ -1657,6 +1659,10 @@ static int fsl_ssi_probe(struct platform_device *pdev)
fsl_ssi_debugfs_remove(&ssi_private->dbg_stats);
error_asoc_register:
+ if (fsl_ssi_is_ac97(ssi_private))
+ snd_soc_set_ac97_ops(NULL);
+
+error_ac97_ops:
if (ssi_private->soc->imx)
fsl_ssi_imx_clean(pdev, ssi_private);
--
2.15.0
Applied "ASoC: fsl_ssi: remove duplicated flag setting in fsl_ssi_setup_reg_vals()" to the asoc tree
The patch
ASoC: fsl_ssi: remove duplicated flag setting in fsl_ssi_setup_reg_vals()
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
Thanks,
Mark
>From 74231295c67ada29a4566272d8ac4886d09f3e83 Mon Sep 17 00:00:00 2001
From: "Maciej S. Szmigiero"
Date: Mon, 20 Nov 2017 23:12:01 +0100
Subject: [PATCH] ASoC: fsl_ssi: remove duplicated flag setting in
fsl_ssi_setup_reg_vals()
We don't need to set CCSR_SSI_SIER_RFF0_EN / CCSR_SSI_SIER_TFE0_EN bits
in reg->rx.sier / reg->tx.sier variables in a non-AC'97 mode considering we
had just initialized these variables to these very values unconditionally a
few lines earlier.
Signed-off-by: Maciej S. Szmigiero
Acked-by: Nicolin Chen
Signed-off-by: Mark Brown
---
sound/soc/fsl/fsl_ssi.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 424bafaf51ef..9e97a0529f37 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -600,9 +600,7 @@ static void fsl_ssi_setup_reg_vals(struct fsl_ssi_private
*ssi_private)
if (!fsl_ssi_is_ac97(ssi_private)) {
reg->rx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_RE;
- reg->rx.sier |= CCSR_SSI_SIER_RFF0_EN;
reg->tx.scr = CCSR_SSI_SCR_SSIEN | CCSR_SSI_SCR_TE;
- reg->tx.sier |= CCSR_SSI_SIER_TFE0_EN;
}
if (ssi_private->use_dma) {
--
2.15.0
Re: [PATCH v3 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20
On 27.11.2017 18:40, Takashi Sakamoto wrote: (..) > > Looks good to me. > > Reviewed-by: Takashi Sakamoto Thanks. > In next time to post any of your v2 patchset, it's better to add commenters > of v1 patchset to CC list, so that your patch reaches the person who has > practical interests in it. Will do it the next time. > Thanks > > Takashi Sakamoto Best regards, Maciej Szmigiero
Re: [PATCH v2 1/2] powerpc/pci: convert to use for_each_pci_bridge() helper
On Thu, Nov 23, 2017 at 11:48:18PM +1100, Michael Ellerman wrote:
> Bjorn Helgaas writes:
>
> > On Fri, Nov 10, 2017 at 07:52:29PM +0200, Andy Shevchenko wrote:
> >> ...which makes code slightly cleaner.
> >>
> >> Requires: d43f59ce6c50 ("PCI: Add for_each_pci_bridge() helper")
> >
> > Requires: 24a0c654d7d6 ("PCI: Add for_each_pci_bridge() helper")
> >
> > (My fault, I rebased that commit before sending it to Linus.)
> >
> >> Acked-by: Michael Ellerman
> >
> > These don't depend on anything in the PCI core, so they could go
> > either via my tree or the powerpc tree. Since you acked this,
> > Michael, I corrected the SHA1 above and put these both on my pci/misc
> > branch.
>
> Thanks. That's aiming for 4.16 I assume?
Right.
Re: [PATCH v3 1/2] ALSA: pcm: add SNDRV_PCM_FORMAT_{S, U}20
On Nov 27 2017 08:09, Maciej S. Szmigiero wrote:
This format is similar to existing SNDRV_PCM_FORMAT_{S,U}20_3 that keep
20-bit PCM samples in 3 bytes, however i.MX6 platform SSI FIFO does not
allow 3-byte accesses (including DMA) so a 4-byte (more conventional)
format is needed for it.
Signed-off-by: Maciej S. Szmigiero
---
Changes from v1: Drop "_4" suffix from these formats since they aren't
non-standard ones, use empty format slots starting from format number 25
for them, add information that they are LSB justified formats.
Changes from v2: Adapt a comment in sound/core/pcm_misc.c so it still
refers to the same sample formats as before.
Corresponding alsa-lib changes will be posted as soon as this patch is
merged on the kernel side, to keep alsa-lib and kernel synchronized.
include/sound/pcm.h | 8
include/sound/soc-dai.h | 2 ++
include/uapi/sound/asound.h | 9 +
sound/core/pcm_misc.c | 19 ++-
4 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/include/sound/pcm.h b/include/sound/pcm.h
index 24febf9e177c..e054c583d3b3 100644
--- a/include/sound/pcm.h
+++ b/include/sound/pcm.h
@@ -169,6 +169,10 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_IMA_ADPCM_SNDRV_PCM_FMTBIT(IMA_ADPCM)
#define SNDRV_PCM_FMTBIT_MPEG _SNDRV_PCM_FMTBIT(MPEG)
#define SNDRV_PCM_FMTBIT_GSM _SNDRV_PCM_FMTBIT(GSM)
+#define SNDRV_PCM_FMTBIT_S20_LE_SNDRV_PCM_FMTBIT(S20_LE)
+#define SNDRV_PCM_FMTBIT_U20_LE_SNDRV_PCM_FMTBIT(U20_LE)
+#define SNDRV_PCM_FMTBIT_S20_BE_SNDRV_PCM_FMTBIT(S20_BE)
+#define SNDRV_PCM_FMTBIT_U20_BE_SNDRV_PCM_FMTBIT(U20_BE)
#define SNDRV_PCM_FMTBIT_SPECIAL _SNDRV_PCM_FMTBIT(SPECIAL)
#define SNDRV_PCM_FMTBIT_S24_3LE _SNDRV_PCM_FMTBIT(S24_3LE)
#define SNDRV_PCM_FMTBIT_U24_3LE _SNDRV_PCM_FMTBIT(U24_3LE)
@@ -202,6 +206,8 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_FLOATSNDRV_PCM_FMTBIT_FLOAT_LE
#define SNDRV_PCM_FMTBIT_FLOAT64 SNDRV_PCM_FMTBIT_FLOAT64_LE
#define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE
+#define SNDRV_PCM_FMTBIT_S20 SNDRV_PCM_FMTBIT_S20_LE
+#define SNDRV_PCM_FMTBIT_U20 SNDRV_PCM_FMTBIT_U20_LE
#endif
#ifdef SNDRV_BIG_ENDIAN
#define SNDRV_PCM_FMTBIT_S16 SNDRV_PCM_FMTBIT_S16_BE
@@ -213,6 +219,8 @@ struct snd_pcm_ops {
#define SNDRV_PCM_FMTBIT_FLOATSNDRV_PCM_FMTBIT_FLOAT_BE
#define SNDRV_PCM_FMTBIT_FLOAT64 SNDRV_PCM_FMTBIT_FLOAT64_BE
#define SNDRV_PCM_FMTBIT_IEC958_SUBFRAME SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE
+#define SNDRV_PCM_FMTBIT_S20 SNDRV_PCM_FMTBIT_S20_BE
+#define SNDRV_PCM_FMTBIT_U20 SNDRV_PCM_FMTBIT_U20_BE
#endif
struct snd_pcm_file {
diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h
index 58acd00cae19..d970879944fc 100644
--- a/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@ -102,6 +102,8 @@ struct snd_compr_stream;
SNDRV_PCM_FMTBIT_S16_BE |\
SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S20_3BE |\
+ SNDRV_PCM_FMTBIT_S20_LE |\
+ SNDRV_PCM_FMTBIT_S20_BE |\
SNDRV_PCM_FMTBIT_S24_3LE |\
SNDRV_PCM_FMTBIT_S24_3BE |\
SNDRV_PCM_FMTBIT_S32_LE |\
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
index c227ccba60ae..7385024041d2 100644
--- a/include/uapi/sound/asound.h
+++ b/include/uapi/sound/asound.h
@@ -214,6 +214,11 @@ typedef int __bitwise snd_pcm_format_t;
#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
#define SNDRV_PCM_FORMAT_GSM((__force snd_pcm_format_t) 24)
+#defineSNDRV_PCM_FORMAT_S20_LE ((__force snd_pcm_format_t) 25) /* \
*/
+#defineSNDRV_PCM_FORMAT_S20_BE ((__force snd_pcm_format_t) 26) /* |
*/
+#defineSNDRV_PCM_FORMAT_U20_LE ((__force snd_pcm_format_t) 27) /* | in
four bytes, */
+#defineSNDRV_PCM_FORMAT_U20_BE ((__force snd_pcm_format_t) 28) /* /
LSB justified */
+/* gap in the numbering for a future standard linear format */
#define SNDRV_PCM_FORMAT_SPECIAL((__force snd_pcm_format_t) 31)
#define SNDRV_PCM_FORMAT_S24_3LE((__force snd_pcm_format_t) 32)
/* in three bytes */
#define SNDRV_PCM_FORMAT_S24_3BE((__force snd_pcm_format_t) 33)
/* in three bytes */
@@ -248,6 +253,8 @@ typedef int __bitwise snd_pcm_format_t;
#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
#define SNDRV_PCM_FORMAT_FLOAT64SNDRV_PCM_FORMAT_FLOAT64_LE
#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME
SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
+
Re: [PATCH v2 1/2] powerpc: Avoid signed to unsigned conversion in set_thread_tidr()
Michael Ellerman writes: > Success == 0 > >> +return rc; > > Success == +ve TIDR > >> } > > cheers > Thanks for reviewing the patch Mpe, I have updated the patch and sent a v3 with the fix that shouldn't impact the calling convention. -- Vaibhav Jain Linux Technology Center, IBM India Pvt. Ltd.
[PATCH v3] powerpc: Avoid signed to unsigned conversion in set_thread_tidr()
There is an unsafe signed to unsigned conversion in set_thread_tidr()
that may cause an error value to be assigned to SPRN_TIDR register and
used as thread-id.
The issue happens as assign_thread_tidr() returns an int and
thread.tidr is an unsigned-long. So a negative error code returned
from assign_thread_tidr() will fail the error check and gets assigned
as tidr as a large positive value.
To fix this the patch assigns the return value of assign_thread_tidr()
to a temporary int and assigns it to thread.tidr iff its '> 0'.
The patch shouldn't impact the calling convention of set_thread_tidr()
i.e all -ve return-values are error codes and a return value of '0'
indicates success.
Fixes: ec233ede4c86("powerpc: Add support for setting SPRN_TIDR")
Signed-off-by: Vaibhav Jain
---
Changelog:
v3 -> Updated the patch to not impact the calling convention [Mpe, Christophe]
v2 -> * Update the patch description to document the calling
convention of set_thread_tidr(). [Mpe]
* Fix a tidr allocation leak.
---
arch/powerpc/kernel/process.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index bfdd783e3916..9fb69211a3d4 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1569,19 +1569,22 @@ void arch_release_task_struct(struct task_struct *t)
*/
int set_thread_tidr(struct task_struct *t)
{
+ int rc;
+
if (!cpu_has_feature(CPU_FTR_ARCH_300))
return -EINVAL;
if (t != current)
return -EINVAL;
- t->thread.tidr = assign_thread_tidr();
- if (t->thread.tidr < 0)
- return t->thread.tidr;
-
- mtspr(SPRN_TIDR, t->thread.tidr);
-
- return 0;
+ rc = assign_thread_tidr();
+ if (rc > 0) {
+ t->thread.tidr = rc;
+ mtspr(SPRN_TIDR, t->thread.tidr);
+ return 0;
+ } else {
+ return rc;
+ }
}
#endif /* CONFIG_PPC64 */
--
2.14.3
Re: [PATCH 1/2] powerpc: Avoid signed to unsigned conversion in set_thread_tidr()
Michael Ellerman writes: > Vaibhav Jain writes: > >> Thanks Mpe for reviewing the patch >> >> Michael Ellerman writes: >> To fix this the patch assigns the return value of assign_thread_tidr() to a temporary int and assigns it to thread.tidr iff its '> 0'. >>> >>> .. and changes the calling convention of the function. >>> >>> Now it returns -ve error values, or a +ve TIDR value when it succeeds, >>> or possibly 0 if that's returned by assign_thread_tidr(). >>> >>> Which I'm not sure you meant to do. If you did, you should at least >>> document it. >> >> Yes this is intentional and this was supposed to be the calling >> convention of set_thread_tidr() in first place. At-least that what I >> gather from subsequent cxl patch to add its support >> http://patchwork.ozlabs.org/patch/840719/ > > That's not at all what I gather from that patch. > > + /* Assign a unique TIDR (thread id) for the current thread */ > + rc = set_thread_tidr(current); > + if (!rc) > + ctx->tid = current->thread.tidr; > > That expects 0 on success, anything else is an error. > > Which is what set_thread_tidr() currently implements, and is the most > common calling convention in kernel code. > > Please don't change that as part of an unrelated fix. > > If you want to change the calling convention, send a patch to do that > and only that. > > cheers > Agreed Mpe, checked with Christophe and he too echoed similar inputs. I will update my v2 patch by not causing a change to he call convention. -- Vaibhav Jain Linux Technology Center, IBM India Pvt. Ltd.
[PATCH V3 13/29] powerpc/powermac: deprecate pci_get_bus_and_slot()
pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as where a PCI device is present. This restricts the device drivers to be reused for other domain numbers. Getting ready to remove pci_get_bus_and_slot() function in favor of pci_get_domain_bus_and_slot(). Hard-code the domain number as 0 to match the previous behavior. Signed-off-by: Sinan Kaya --- drivers/macintosh/via-pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c index c4c2b3b..3e8b3b6 100644 --- a/drivers/macintosh/via-pmu.c +++ b/drivers/macintosh/via-pmu.c @@ -1799,7 +1799,7 @@ static int powerbook_sleep_grackle(void) struct adb_request req; struct pci_dev *grackle; - grackle = pci_get_bus_and_slot(0, 0); + grackle = pci_get_domain_bus_and_slot(0, 0, 0); if (!grackle) return -ENODEV; -- 1.9.1
[PATCH V3 02/29] powerpc/PCI: deprecate pci_get_bus_and_slot()
pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
where a PCI device is present. This restricts the device drivers to be
reused for other domain numbers.
Getting ready to remove pci_get_bus_and_slot() function in favor of
pci_get_domain_bus_and_slot().
Use pci_get_domain_bus_and_slot() with a domain number of 0 as the code
is not ready to consume multiple domains and existing code used domain
number 0.
Signed-off-by: Sinan Kaya
---
arch/powerpc/kernel/pci_32.c | 3 ++-
arch/powerpc/platforms/powermac/feature.c | 2 +-
arch/powerpc/sysdev/mv64x60_pci.c | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 1d817f4..85ad2f7 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -96,7 +96,8 @@
reg = of_get_property(node, "reg", NULL);
if (!reg)
continue;
- dev = pci_get_bus_and_slot(pci_bus, ((reg[0] >> 8) & 0xff));
+ dev = pci_get_domain_bus_and_slot(0, pci_bus,
+ ((reg[0] >> 8) & 0xff));
if (!dev || !dev->subordinate) {
pci_dev_put(dev);
continue;
diff --git a/arch/powerpc/platforms/powermac/feature.c
b/arch/powerpc/platforms/powermac/feature.c
index 9e3f39d..ed8b166 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -829,7 +829,7 @@ static long core99_scc_enable(struct device_node *node,
long param, long value)
if (value) {
if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
- pdev = pci_get_bus_and_slot(pbus, pid);
+ pdev = pci_get_domain_bus_and_slot(0, pbus, pid);
if (pdev == NULL)
return 0;
rc = pci_enable_device(pdev);
diff --git a/arch/powerpc/sysdev/mv64x60_pci.c
b/arch/powerpc/sysdev/mv64x60_pci.c
index d52b3b8..6fe9104 100644
--- a/arch/powerpc/sysdev/mv64x60_pci.c
+++ b/arch/powerpc/sysdev/mv64x60_pci.c
@@ -37,7 +37,7 @@ static ssize_t mv64x60_hs_reg_read(struct file *filp, struct
kobject *kobj,
if (count < MV64X60_VAL_LEN_MAX)
return -EINVAL;
- phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+ phb = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
if (!phb)
return -ENODEV;
pci_read_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, &v);
@@ -61,7 +61,7 @@ static ssize_t mv64x60_hs_reg_write(struct file *filp, struct
kobject *kobj,
if (sscanf(buf, "%i", &v) != 1)
return -EINVAL;
- phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+ phb = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
if (!phb)
return -ENODEV;
pci_write_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, v);
--
1.9.1
[PATCH] KVM: PPC: Book3S HV: check for XIVE device before executing the XICS hcalls
When QEMU is started with the option kernel_irqchip=òff, the kvm XICS
hcalls are being used even though a kvm XICS device has not been
created on the host, resulting quickly in a failure and a broken
guest.
The test checking if there is a XIVE device in the VM before executing
the XICS hcalls is missing from the recent XICS-over-XIVE glue.
Signed-off-by: Cédric Le Goater
---
arch/powerpc/kvm/book3s_xive_template.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_xive_template.c
b/arch/powerpc/kvm/book3s_xive_template.c
index c7a5deadd1cc..7aa4e02df97c 100644
--- a/arch/powerpc/kvm/book3s_xive_template.c
+++ b/arch/powerpc/kvm/book3s_xive_template.c
@@ -276,11 +276,15 @@ static u32 GLUE(X_PFX,scan_interrupts)(struct
kvmppc_xive_vcpu *xc,
X_STATIC unsigned long GLUE(X_PFX,h_xirr)(struct kvm_vcpu *vcpu)
{
struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
+ struct kvmppc_xive *xive = vcpu->kvm->arch.xive;
u8 old_cppr;
u32 hirq;
pr_devel("H_XIRR\n");
+ if (!xive)
+ return H_TOO_HARD;
+
xc->GLUE(X_STAT_PFX,h_xirr)++;
/* First collect pending bits from HW */
@@ -335,11 +339,15 @@ X_STATIC unsigned long GLUE(X_PFX,h_xirr)(struct kvm_vcpu
*vcpu)
X_STATIC unsigned long GLUE(X_PFX,h_ipoll)(struct kvm_vcpu *vcpu, unsigned
long server)
{
struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
+ struct kvmppc_xive *xive = vcpu->kvm->arch.xive;
u8 pending = xc->pending;
u32 hirq;
pr_devel("H_IPOLL(server=%ld)\n", server);
+ if (!xive)
+ return H_TOO_HARD;
+
xc->GLUE(X_STAT_PFX,h_ipoll)++;
/* Grab the target VCPU if not the current one */
@@ -388,8 +396,12 @@ static void GLUE(X_PFX,push_pending_to_hw)(struct
kvmppc_xive_vcpu *xc)
X_STATIC int GLUE(X_PFX,h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr)
{
struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
+ struct kvmppc_xive *xive = vcpu->kvm->arch.xive;
u8 old_cppr;
+ if (!xive)
+ return H_TOO_HARD;
+
pr_devel("H_CPPR(cppr=%ld)\n", cppr);
xc->GLUE(X_STAT_PFX,h_cppr)++;
@@ -435,6 +447,9 @@ X_STATIC int GLUE(X_PFX,h_eoi)(struct kvm_vcpu *vcpu,
unsigned long xirr)
u16 src;
int rc = 0;
+ if (!xive)
+ return H_TOO_HARD;
+
pr_devel("H_EOI(xirr=%08lx)\n", xirr);
xc->GLUE(X_STAT_PFX,h_eoi)++;
@@ -532,9 +547,13 @@ X_STATIC int GLUE(X_PFX,h_ipi)(struct kvm_vcpu *vcpu,
unsigned long server,
unsigned long mfrr)
{
struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
+ struct kvmppc_xive *xive = vcpu->kvm->arch.xive;
pr_devel("H_IPI(server=%08lx,mfrr=%ld)\n", server, mfrr);
+ if (!xive)
+ return H_TOO_HARD;
+
xc->GLUE(X_STAT_PFX,h_ipi)++;
/* Find target */
--
2.13.6
[PATCH 2/2] powerpc: mpic_timer: avoid struct timeval
In an effort to remove all instances of 'struct timeval'
from the kernel, I'm changing the powerpc mpic_timer interface
to use plain seconds instead. There is only one user of this
interface, and that doesn't use the microseconds portion, so
the code gets noticeably simpler in the process.
Signed-off-by: Arnd Bergmann
---
arch/powerpc/include/asm/mpic_timer.h | 8 ++---
arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c | 16 -
arch/powerpc/sysdev/mpic_timer.c| 55 ++---
3 files changed, 21 insertions(+), 58 deletions(-)
diff --git a/arch/powerpc/include/asm/mpic_timer.h
b/arch/powerpc/include/asm/mpic_timer.h
index 0e23cd4ac8aa..13e6702ec458 100644
--- a/arch/powerpc/include/asm/mpic_timer.h
+++ b/arch/powerpc/include/asm/mpic_timer.h
@@ -29,17 +29,17 @@ struct mpic_timer {
#ifdef CONFIG_MPIC_TIMER
struct mpic_timer *mpic_request_timer(irq_handler_t fn, void *dev,
- const struct timeval *time);
+ time64_t time);
void mpic_start_timer(struct mpic_timer *handle);
void mpic_stop_timer(struct mpic_timer *handle);
-void mpic_get_remain_time(struct mpic_timer *handle, struct timeval *time);
+void mpic_get_remain_time(struct mpic_timer *handle, time64_t *time);
void mpic_free_timer(struct mpic_timer *handle);
#else
struct mpic_timer *mpic_request_timer(irq_handler_t fn, void *dev,
- const struct timeval *time) { return NULL; }
+ time64_t time) { return NULL; }
void mpic_start_timer(struct mpic_timer *handle) { }
void mpic_stop_timer(struct mpic_timer *handle) { }
-void mpic_get_remain_time(struct mpic_timer *handle, struct timeval *time) { }
+void mpic_get_remain_time(struct mpic_timer *handle, time64_t *time) { }
void mpic_free_timer(struct mpic_timer *handle) { }
#endif
diff --git a/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c
b/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c
index 1707bf04dec6..94278e8af192 100644
--- a/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c
+++ b/arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c
@@ -56,17 +56,16 @@ static ssize_t fsl_timer_wakeup_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
- struct timeval interval;
- int val = 0;
+ time64_t interval = 0;
mutex_lock(&sysfs_lock);
if (fsl_wakeup->timer) {
mpic_get_remain_time(fsl_wakeup->timer, &interval);
- val = interval.tv_sec + 1;
+ interval++;
}
mutex_unlock(&sysfs_lock);
- return sprintf(buf, "%d\n", val);
+ return sprintf(buf, "%lld\n", interval);
}
static ssize_t fsl_timer_wakeup_store(struct device *dev,
@@ -74,11 +73,10 @@ static ssize_t fsl_timer_wakeup_store(struct device *dev,
const char *buf,
size_t count)
{
- struct timeval interval;
+ time64_t interval;
int ret;
- interval.tv_usec = 0;
- if (kstrtol(buf, 0, &interval.tv_sec))
+ if (kstrtoll(buf, 0, &interval))
return -EINVAL;
mutex_lock(&sysfs_lock);
@@ -89,13 +87,13 @@ static ssize_t fsl_timer_wakeup_store(struct device *dev,
fsl_wakeup->timer = NULL;
}
- if (!interval.tv_sec) {
+ if (!interval) {
mutex_unlock(&sysfs_lock);
return count;
}
fsl_wakeup->timer = mpic_request_timer(fsl_mpic_timer_irq,
- fsl_wakeup, &interval);
+ fsl_wakeup, interval);
if (!fsl_wakeup->timer) {
mutex_unlock(&sysfs_lock);
return -EINVAL;
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c
index a418579591be..87e7c42777a8 100644
--- a/arch/powerpc/sysdev/mpic_timer.c
+++ b/arch/powerpc/sysdev/mpic_timer.c
@@ -47,9 +47,6 @@
#define MAX_TICKS_CASCADE (~0U)
#define TIMER_OFFSET(num) (1 << (TIMERS_PER_GROUP - 1 - num))
-/* tv_usec should be less than ONE_SECOND, otherwise use tv_sec */
-#define ONE_SECOND 100
-
struct timer_regs {
u32 gtccr;
u32 res0[3];
@@ -90,51 +87,23 @@ static struct cascade_priv cascade_timer[] = {
static LIST_HEAD(timer_group_list);
static void convert_ticks_to_time(struct timer_group_priv *priv,
- const u64 ticks, struct timeval *time)
+ const u64 ticks, time64_t *time)
{
- u64 tmp_sec;
-
- time->tv_sec = (__kernel_time_t)div_u64(ticks, priv->timerfreq);
- tmp_sec = (u64)time->tv_sec * (u64)priv->timerfreq;
-
- time->tv_usec = 0;
-
- if (tmp_sec <= ticks)
- time->tv_usec = (__kernel_suseconds_t)
- div_u64((ticks - tmp_sec) * 100, priv->timerfreq);
-
- return;
+ *time = (u64)div_u64(ticks, priv->timerfr
[PATCH 1/2] spufs: use timespec64 for timestamps
The switch log prints the tv_sec portion of timespec as a 32-bit
number, while overflows in 2106. It also uses the timespec type,
which is safe on 64-bit architectures, but deprecated because
it causes overflows in 2038 elsewhere.
This changes it to timespec64 and printing a 64-bit number for
consistency.
Signed-off-by: Arnd Bergmann
---
arch/powerpc/platforms/cell/spufs/file.c | 6 +++---
arch/powerpc/platforms/cell/spufs/spufs.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/cell/spufs/file.c
b/arch/powerpc/platforms/cell/spufs/file.c
index 5ffcdeb1eb17..94139135be9c 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -2375,8 +2375,8 @@ static int switch_log_sprint(struct spu_context *ctx,
char *tbuf, int n)
p = ctx->switch_log->log + ctx->switch_log->tail % SWITCH_LOG_BUFSIZE;
- return snprintf(tbuf, n, "%u.%09u %d %u %u %llu\n",
- (unsigned int) p->tstamp.tv_sec,
+ return snprintf(tbuf, n, "%llu.%09u %d %u %u %llu\n",
+ (unsigned long long) p->tstamp.tv_sec,
(unsigned int) p->tstamp.tv_nsec,
p->spu_id,
(unsigned int) p->type,
@@ -2499,7 +2499,7 @@ void spu_switch_log_notify(struct spu *spu, struct
spu_context *ctx,
struct switch_log_entry *p;
p = ctx->switch_log->log + ctx->switch_log->head;
- ktime_get_ts(&p->tstamp);
+ ktime_get_ts64(&p->tstamp);
p->timebase = get_tb();
p->spu_id = spu ? spu->number : -1;
p->type = type;
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h
b/arch/powerpc/platforms/cell/spufs/spufs.h
index 5e59f80e95db..5d85c689c2e9 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -69,7 +69,7 @@ struct switch_log {
unsigned long head;
unsigned long tail;
struct switch_log_entry {
- struct timespec tstamp;
+ struct timespec64 tstamp;
s32 spu_id;
u32 type;
u32 val;
--
2.9.0
Re: [PATCH] cxl: Add support for ASB_Notify on POWER9
Le 27/11/2017 à 05:03, Michael Ellerman a écrit : christophe lombard writes: Le 24/11/2017 à 14:02, Benjamin Herrenschmidt a écrit : On Fri, 2017-11-24 at 11:14 +0100, christophe lombard wrote: To my knowledge, there is no property (or similar), somewhere, that indicating that the TIDR is supported or not. For the time being, if I am not wrong, the only check we have, is this condition in the function set_thread_tidr(struct task_struct *t): if (!cpu_has_feature(CPU_FTR_ARCH_300)) return -EINVAL; Christophe Then we need to fix that Ben. You are right. We will insert a checking in the cxl driver to allow updating the TIDR if a P9 is present. This will be in the patch V2. Thanks A cxl_is_power9() check should be fine. When the check fails you should return an error code that can be distinguished and interpreted correctly by userspace, ie. not EINVAL. That implies if the program calls with a different set of arguments the call might succeed, which is not true. Either ENODEV or ENXIO would be best I think. cheers This is what I had in mind about the function cxl_is_power9() and I am agree with the return codes. Thanks for your help. Christophe
