Re: [PATCH 4/7] Device tree for MPC5121 ADS
On Tue, Jan 08, 2008 at 09:01:30AM -0700, John Rigby wrote:
Bare minimum tree containing only
what is currently supported.
[snip]
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 20; // 32 bytes
+ i-cache-line-size = 20; // 32 bytes
+ d-cache-size = 8000; // L1, 32K
+ i-cache-size = 8000; // L1, 32K
+ ref-frequency = 3ef1480; // 66MHz ref clock
+ timebase-frequency = 2f34f60; // 49.5MHz (396MHz/8)
makes time tick correctly
+ bus-frequency = bcd3d80; // 198MHz csb bus
+ clock-frequency = 179a7b00; // 396MHz ppc core ??
+ 32-bit;
The 32-bit property was only ever added by mistake. Drop it.
[snip]
+ [EMAIL PROTECTED] {
+ device_type = board-control;
No device_type here. But you should have a compatible property.
[snip]
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
+ device_type = soc;
+ ranges = 0 8000 40;
+ reg = 8000 40;
+ ref-frequency = 3ef1480; // 66MHz ref
What the hell is ref-frequency? Unfortunately, you have to work with
existing broken practice for SoC nodes here, but the principle clock
frequency for any device should always be encoded in a property called
clock-frequency.
[snip]
+ ipic: [EMAIL PROTECTED] {
Should be [EMAIL PROTECTED]
+ interrupt-controller;
+ #address-cells = 0;
+ #interrupt-cells = 2;
+ reg = c00 100;
+ built-in;
+ device_type = ipic;
Drop this device_type. Should have a compatible value instead.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[PATCH 4/7] Device tree for MPC5121 ADS
Bare minimum tree containing only
what is currently supported.
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc5121ads.dts | 102 ++
1 files changed, 102 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc5121ads.dts
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
new file mode 100644
index 000..26471ff
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -0,0 +1,102 @@
+/*
+ * MPC5121E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = MPC5121ADS;
+ compatible = MPC5121ADS;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 20; // 32 bytes
+ i-cache-line-size = 20; // 32 bytes
+ d-cache-size = 8000; // L1, 32K
+ i-cache-size = 8000; // L1, 32K
+ ref-frequency = 3ef1480; // 66MHz ref clock
+ timebase-frequency = 2f34f60; // 49.5MHz (396MHz/8)
makes time tick correctly
+ bus-frequency = bcd3d80; // 198MHz csb bus
+ clock-frequency = 179a7b00; // 396MHz ppc core ??
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 1000; // 256MB at 0
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = board-control;
+ reg = 8200 8000;
+ };
+
+ [EMAIL PROTECTED] {
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
+ device_type = soc;
+ ranges = 0 8000 40;
+ reg = 8000 40;
+ ref-frequency = 3ef1480; // 66MHz ref
+ bus-frequency = 5e69ec0; // 99MHz ips ref
+
+ // IPIC
+ // interrupts cell = intr #, sense
+ // sense values match linux IORESOURCE_IRQ_* defines:
+ // sense == 8: Level, low assertion
+ // sense == 2: Edge, high-to-low change
+ //
+ ipic: [EMAIL PROTECTED] {
+ interrupt-controller;
+ #address-cells = 0;
+ #interrupt-cells = 2;
+ reg = c00 100;
+ built-in;
+ device_type = ipic;
+ };
+
+ // 512x PSCs are not 52xx PSCs compatible
+ // PSC3 serial port A aka ttyPSC0
+ [EMAIL PROTECTED] {
+ device_type = serial;
+ compatible = mpc512x-psc-uart;
+ port-number = 0; // Logical port assignment
+ cell-index = 3;
+ reg = 11300 100;
+ interrupts = 28 8; // actually the fifo irq
+ interrupt-parent = ipic ;
+ };
+
+ // PSC4 serial port B aka ttyPSC1
+ [EMAIL PROTECTED] {
+ device_type = serial;
+ compatible = mpc512x-psc-uart;
+ port-number = 1; // Logical port assignment
+ cell-index = 4;
+ reg = 11400 100;
+ interrupts = 28 8; // actually the fifo irq
+ interrupt-parent = ipic ;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = mpc512x-pscsfifo;
+ reg = 11f00 100;
+ interrupts = 28 8;
+ interrupt-parent = ipic ;
+ };
+ };
+};
--
1.5.3.5.726.g41a7a
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Re: [PATCH 4/7] Device tree for MPC5121 ADS
Comments below.
On 1/8/08, John Rigby [EMAIL PROTECTED] wrote:
Bare minimum tree containing only
what is currently supported.
Signed-off-by: John Rigby [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/mpc5121ads.dts | 102
++
1 files changed, 102 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc5121ads.dts
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
new file mode 100644
index 000..26471ff
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -0,0 +1,102 @@
+/*
+ * MPC5121E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = MPC5121ADS;
+ compatible = MPC5121ADS;
fsl, mpc5121ads (drop the caps and use the fsl, prefix)
+ #address-cells = 1;
+ #size-cells = 1;
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,[EMAIL PROTECTED] {
+ device_type = cpu;
+ reg = 0;
+ d-cache-line-size = 20; // 32 bytes
+ i-cache-line-size = 20; // 32 bytes
+ d-cache-size = 8000; // L1, 32K
+ i-cache-size = 8000; // L1, 32K
+ ref-frequency = 3ef1480; // 66MHz ref clock
+ timebase-frequency = 2f34f60; // 49.5MHz (396MHz/8)
makes time tick correctly
+ bus-frequency = bcd3d80; // 198MHz csb bus
+ clock-frequency = 179a7b00; // 396MHz ppc core ??
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 1000; // 256MB at 0
+ };
+
+ [EMAIL PROTECTED] {
+ device_type = board-control;
+ reg = 8200 8000;
+ };
+
+ [EMAIL PROTECTED] {
[EMAIL PROTECTED]
soccpu@addr is no longer recommended.
+ #address-cells = 1;
+ #size-cells = 1;
+ #interrupt-cells = 2;
+ device_type = soc;
- Drop device_type property
- add: compatible = fsl,mpc5121-immr;
+ ranges = 0 8000 40;
+ reg = 8000 40;
+ ref-frequency = 3ef1480; // 66MHz ref
+ bus-frequency = 5e69ec0; // 99MHz ips ref
+
+ // IPIC
+ // interrupts cell = intr #, sense
+ // sense values match linux IORESOURCE_IRQ_* defines:
+ // sense == 8: Level, low assertion
+ // sense == 2: Edge, high-to-low change
+ //
+ ipic: [EMAIL PROTECTED] {
+ interrupt-controller;
+ #address-cells = 0;
+ #interrupt-cells = 2;
+ reg = c00 100;
+ built-in;
+ device_type = ipic;
+ };
+
+ // 512x PSCs are not 52xx PSCs compatible
+ // PSC3 serial port A aka ttyPSC0
+ [EMAIL PROTECTED] {
+ device_type = serial;
+ compatible = mpc512x-psc-uart;
Specify the *exact* version in compatible first. You can add generic
forms after that if you like, but the first entry should always be
exact (as per the generic names recommended practice). It should be:
compatible = fsl,mpc5121-psc-uart.
Also, make sure all compatible properties have the 'fsl,' prefix.
+ port-number = 0; // Logical port assignment
+ cell-index = 3;
+ reg = 11300 100;
+ interrupts = 28 8; // actually the fifo irq
+ interrupt-parent = ipic ;
+ };
+
+ // PSC4 serial port B aka ttyPSC1
+ [EMAIL PROTECTED] {
+ device_type = serial;
+ compatible = mpc512x-psc-uart;
+ port-number = 1; // Logical port assignment
Drop port-number. Aliases will be used instead.
+ cell-index = 4;
+ reg = 11400 100;
+ interrupts = 28 8; // actually the fifo irq
+ interrupt-parent = ipic ;
+ };
+
+ [EMAIL PROTECTED] {
+ compatible = mpc512x-pscsfifo;
+ reg = 11f00 100;
+ interrupts = 28 8;
+
Re: [PATCH 4/7] Device tree for MPC5121 ADS
On Tue, Jan 08, 2008 at 09:01:30AM -0700, John Rigby wrote:
+ [EMAIL PROTECTED] {
+ device_type = board-control;
+ reg = 8200 8000;
+ };
Should be:
[EMAIL PROTECTED] {
compatible = fsl,mpc5121ads-cpld;
reg = 8200 8000;
};
+ ref-frequency = 3ef1480; // 66MHz ref
+ bus-frequency = 5e69ec0; // 99MHz ips ref
Please specify these in decimal rather than hex (using the d# prefix, or
better yet /dts-v1/).
+ // IPIC
+ // interrupts cell = intr #, sense
+ // sense values match linux IORESOURCE_IRQ_* defines:
+ // sense == 8: Level, low assertion
+ // sense == 2: Edge, high-to-low change
+ //
+ ipic: [EMAIL PROTECTED] {
+ interrupt-controller;
+ #address-cells = 0;
+ #interrupt-cells = 2;
+ reg = c00 100;
+ built-in;
+ device_type = ipic;
+ };
Remove built-in.
-Scott
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