Re: AMCC PPC460EX Canyonlands does not see PCIe end point with only non-prefetchable memory (both 2.6.27.7 and -next)
On Fri, 2008-11-28 at 11:54 +0100, Leon Woestenberg wrote: I found out that re-programming the end point FPGA again *just* after *uboot* read it, and before Linux kernel has started, makes the end point appear properly. Either u-boot leaves the end point in bad state, or the root complex reset also requires an end point reset. (or a third option I could not think of yet). I think you are getting a reset yes, maybe your FPGA loses its programming or something similar ? I'll pick this up on ppc and u-boot mailing list with new info, especially with the ppc4xx maintainers. CC me, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: AMCC PPC460EX Canyonlands does not see PCIe end point with only non-prefetchable memory (both 2.6.27.7 and -next)
Hello all, On Wed, Nov 26, 2008 at 7:26 PM, Leon Woestenberg [EMAIL PROTECTED] wrote: On Wed, Nov 26, 2008 at 4:25 PM, Leon Woestenberg [EMAIL PROTECTED] wrote: The non-detected end point boot: pci 0001:80:00.0: scanning behind bridge, config bf8180, pass 0 PCI: Scanning bus 0001:81 PCI: Fixups for bus 0001:81 Progress on this issue: I found out that re-programming the end point FPGA again *just* after *uboot* read it, and before Linux kernel has started, makes the end point appear properly. Either u-boot leaves the end point in bad state, or the root complex reset also requires an end point reset. (or a third option I could not think of yet). I'll pick this up on ppc and u-boot mailing list with new info, especially with the ppc4xx maintainers. Consider this thread closed. Thanks for ignoring my ranting :-) Regards, -- Leon ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: AMCC PPC460EX Canyonlands does not see PCIe end point with only non-prefetchable memory (both 2.6.27.7 and -next)
Hello, I enabled more DEBUG output, the online files have been updated. Snippets: The detected end point boot: pci 0001:80:00.0: scanning behind bridge, config bf8180, pass 0 PCI: Scanning bus 0001:81 pci 0001:81:00.0: found [1a0b:5331] class 00ff00 header type 00 pci 0001:81:00.0: reg 10 64bit mmio: [0xb800-0xb8ff] pci 0001:81:00.0: reg 18 32bit mmio: [0xb900-0xb903] pci 0001:81:00.0: calling pcibios_fixup_resources+0x0/0xec pci 0001:81:00.0: calling fixup_ppc4xx_pci_bridge+0x0/0x154 pci 0001:81:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force' PCI: Fixups for bus 0001:81 The non-detected end point boot: pci 0001:80:00.0: scanning behind bridge, config bf8180, pass 0 PCI: Scanning bus 0001:81 PCI: Fixups for bus 0001:81 Regards, -- Leon ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
