Re: machine check in kernel for a mpc870 board

2010-07-02 Thread Scott Wood
On Fri, 2 Jul 2010 12:16:11 -0700
Shawn Jin  wrote:

> >> The chipselect? Isn't it just the child-bus-addr? BTW, do we have
> >> to define the #address-cells to 2? 1 is not enough?
> >
> > The first cell of the child bus address is the chip select, the
> > second cell is the offset into the chip select.
> 
> I see. So the #address-sells of 2 doesn't necessarily indicate the
> address is 64 bits?

Well, there's 64 bits of data, but it doesn't mean that it's one 64-bit
integer.

> Different processors can interpret it differently?

Different device tree bus types can -- though in this case it translates
to an ordinary CPU address using the standand ranges property.

> Where can I find such info? Is there any doc on this?

Documentation/powerpc/dts-bindings/fsl/lbc.txt

> I have a question on the serial settings. Why does it locate at 0xa80?
> According to MPC885RM.pdf, the SMC1's registers start from 0xa82. 

I suppose the interpretation was that the register block starts at
0xa80, and the first register within that block is at 0xa82 -- though
the manual seems to actually lump those two reserved bytes in with the
previous section.

> What does the reg property specify here for SMC1, the first set of <0xa80
> 0x10> and the 2nd <0x3e80 0x40>?

>From Documentation/powerpc/dts-bindings/fsl/cpm.txt:
> - reg : Unless otherwise specified, the first resource represents the  
> scc/fcc/ucc registers, and the second represents the device's
> parameter RAM region (if it has one).

-Scott
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Re: machine check in kernel for a mpc870 board

2010-07-02 Thread Shawn Jin
>> The chipselect? Isn't it just the child-bus-addr? BTW, do we have to
>> define the #address-cells to 2? 1 is not enough?
>
> The first cell of the child bus address is the chip select, the second
> cell is the offset into the chip select.

I see. So the #address-sells of 2 doesn't necessarily indicate the
address is 64 bits? Different processors can interpret it differently?
Where can I find such info? Is there any doc on this?

I have a question on the serial settings. Why does it locate at 0xa80?
According to MPC885RM.pdf, the SMC1's registers start from 0xa82. What
does the reg property specify here for SMC1, the first set of <0xa80
0x10> and the 2nd <0x3e80 0x40>?

console: ser...@a80 {
device_type = "serial";
compatible = "fsl,mpc875-smc-uart",
 "fsl,cpm1-smc-uart";
reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
fsl,cpm-command = <0x0090>;
current-speed = <115200>;

Thanks a lot,
-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-07-02 Thread Scott Wood
On Fri, 2 Jul 2010 10:06:47 -0700
Shawn Jin  wrote:

> > Or more generally update this section to hold whatever is connected
> > to the localbus on your board.  The first cell is the chipselect.
> 
> The chipselect? Isn't it just the child-bus-addr? BTW, do we have to
> define the #address-cells to 2? 1 is not enough?

The first cell of the child bus address is the chip select, the second
cell is the offset into the chip select.

> SDRAM uses CS0/6, each 64MB. BDI2000 configuration is as follows.
> ; init memory controller
> WM320xFA200104  0xfe000ff6  ;;OR0: Flash 32MB
> WM320xFA200100  0xfc01  ;;BR0: Flash at 0xFC00,
> 32bit, R/W, no parity, use GPCM
> WM320xFA20010C  0xfc000e00  ;;OR1: SDRAM 64MB, all
> accesses WM320xFA200108  0x0081  ;;BR1: SDRAM at
> 0x, 32bit, R/W, no parity, use UPMA
> WM320xFA200134  0xfc000e00  ;;OR6: SDRAM 64MB, all
> accesses WM320xFA200130  0x0481  ;;BR6: SDRAM at
> 0x0400, 32bit, R/W, no parity, use UPMA

That looks like SDRAM is on CS1/6, not CS0/6.

We haven't been putting ordinary RAM under the localbus node, even
though it's connected through the localbus on these chips.

> When defining memory's reg property, can a single pair <0 0x0800>
> be enough? Or must it be <0 0x0400 0x0400 0x0400>?

A single pair is fine.

-Scott
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Re: machine check in kernel for a mpc870 board

2010-07-02 Thread Shawn Jin
>>        local...@fa200100 {
>>                compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
>>                             "simple-bus";
>>                #address-cells =<2>;
>>                #size-cells =<1>;
>>                reg =<0xfa200100 0x40>;
>>
>>                ranges =<
>>                        0 0 0xfe00 0x0100    // I'm not sure about
>> this?
>>                >;
>>        };
>
> Change 0xfe00 to wherever u-boot maps your flash, and 0x0100 to
> whatever the size of the flash localbus mapping is.
>
> Or more generally update this section to hold whatever is connected to the
> localbus on your board.  The first cell is the chipselect.

The chipselect? Isn't it just the child-bus-addr? BTW, do we have to
define the #address-cells to 2? 1 is not enough?

SDRAM uses CS0/6, each 64MB. BDI2000 configuration is as follows.
; init memory controller
WM320xFA200104  0xfe000ff6  ;;OR0: Flash 32MB
WM320xFA200100  0xfc01  ;;BR0: Flash at 0xFC00,
32bit, R/W, no parity, use GPCM
WM320xFA20010C  0xfc000e00  ;;OR1: SDRAM 64MB, all accesses
WM320xFA200108  0x0081  ;;BR1: SDRAM at 0x,
32bit, R/W, no parity, use UPMA
WM320xFA200134  0xfc000e00  ;;OR6: SDRAM 64MB, all accesses
WM320xFA200130  0x0481  ;;BR6: SDRAM at 0x0400, 32bit, R/W,
no parity, use UPMA

When defining memory's reg property, can a single pair <0 0x0800>
be enough? Or must it be <0 0x0400 0x0400 0x0400>?

Thanks,
-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-07-01 Thread Scott Wood

On 07/01/2010 03:17 PM, Shawn Jin wrote:

How do I find the address, reg, and range for nodes like localbus,
soc, eth0, cpm, serial etc.?


If your CCSRBAR is 0xfa20, then pretty much anywhere you see 0xff0x
change it to 0xfa2x.


I'm not sure about the range settings of 0xfe00. How do you get this?

local...@fa200100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
 "simple-bus";
#address-cells =<2>;
#size-cells =<1>;
reg =<0xfa200100 0x40>;

ranges =<
0 0 0xfe00 0x0100// I'm not sure about this?
>;
};


Change 0xfe00 to wherever u-boot maps your flash, and 0x0100 to 
whatever the size of the flash localbus mapping is.


Or more generally update this section to hold whatever is connected to 
the localbus on your board.  The first cell is the chipselect.



Make sure that you've got Linux platform code enabled that matches the
top-level compatible of your device tree.  Try enabling PPC_EARLY_DEBUG_CPM,
making sure to update PPC_EARLY_DEBUG_CPM_ADDR to 0xfa202008.


I enabled this early debug feature but don't know this address change.


The address change is for the different IMMR base, only this use is too 
early/hacky to get it from the device tree.


-Scott
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Re: machine check in kernel for a mpc870 board

2010-07-01 Thread Shawn Jin
>>> How do I find the address, reg, and range for nodes like localbus,
>>> soc, eth0, cpm, serial etc.?
>
> If your CCSRBAR is 0xfa20, then pretty much anywhere you see 0xff0x
> change it to 0xfa2x.

I'm not sure about the range settings of 0xfe00. How do you get this?

   local...@fa200100 {
   compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
"simple-bus";
   #address-cells = <2>;
   #size-cells = <1>;
   reg = <0xfa200100 0x40>;

   ranges = <
   0 0 0xfe00 0x0100// I'm not sure about this?
   >;
   };


>>     Linux/PowerPC load: root=/dev/ram
>>     Finalizing device tree... flat tree at 0x59e300
>>
>> The gdb showed deadbeef.
>>     (gdb) target remote ppcbdi:2001
>>     Remote debugging using ppcbdi:2001
>>     0xdeadbeef in ?? ()
>>     (gdb)
>>
>> The kernel doesn't seem to start. What could go wrong here?
>
> Pretty much anything. :-)

I realized that. :-P The kernel booting was able to stop at
start_kernel(). I'm going to trace further.

> Make sure that you've got Linux platform code enabled that matches the
> top-level compatible of your device tree.  Try enabling PPC_EARLY_DEBUG_CPM,
> making sure to update PPC_EARLY_DEBUG_CPM_ADDR to 0xfa202008.

I enabled this early debug feature but don't know this address change.
I'll try it later.

Thanks a lot, Scott.

-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-07-01 Thread Scott Wood

On 07/01/2010 02:50 AM, Shawn Jin wrote:

Hi Scott,


How do I find the address, reg, and range for nodes like localbus,
soc, eth0, cpm, serial etc.?


If your CCSRBAR is 0xfa20, then pretty much anywhere you see 
0xff0x change it to 0xfa2x.



I managed to proceed a little bit further.
 Memory<-<0x0 0x800>  (128MB)
 ENET0: local-mac-address<- 00:09:9b:01:58:64
 CPU clock-frequency<- 0x7270e00 (120MHz)
 CPU timebase-frequency<- 0x393870 (4MHz)
 CPU bus-frequency<- 0x3938700 (60MHz)

 zImage starting: loaded at 0x0040 (sp: 0x07d1ccd0)
 Allocating 0x186bdd bytes for kernel ...
 gunzipping (0x<- 0x0040c000:0x00591c30)...done 0x173b18 bytes

 Linux/PowerPC load: root=/dev/ram
 Finalizing device tree... flat tree at 0x59e300

The gdb showed deadbeef.
 (gdb) target remote ppcbdi:2001
 Remote debugging using ppcbdi:2001
 0xdeadbeef in ?? ()
 (gdb)

The kernel doesn't seem to start. What could go wrong here?


Pretty much anything. :-)

Make sure that you've got Linux platform code enabled that matches the 
top-level compatible of your device tree.  Try enabling 
PPC_EARLY_DEBUG_CPM, making sure to update PPC_EARLY_DEBUG_CPM_ADDR to 
0xfa202008.


-Scott
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Re: machine check in kernel for a mpc870 board

2010-07-01 Thread Shawn Jin
Hi Scott,

> How do I find the address, reg, and range for nodes like localbus,
> soc, eth0, cpm, serial etc.? Do the addresses of localbus and soc
> relate to IMMR? So my localbus and soc should be as follows?
>
>        local...@fa200100 {
>                compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
>                             "simple-bus";
>                #address-cells = <2>;
>                #size-cells = <1>;
>                reg = <0xfa200100 0x40>;
>
>                ranges = <
>                        0 0 0xfe00 0x0100    // I'm not sure about 
> this?
>                >;
>        };

I managed to proceed a little bit further.
Memory <- <0x0 0x800> (128MB)
ENET0: local-mac-address <- 00:09:9b:01:58:64
CPU clock-frequency <- 0x7270e00 (120MHz)
CPU timebase-frequency <- 0x393870 (4MHz)
CPU bus-frequency <- 0x3938700 (60MHz)

zImage starting: loaded at 0x0040 (sp: 0x07d1ccd0)
Allocating 0x186bdd bytes for kernel ...
gunzipping (0x <- 0x0040c000:0x00591c30)...done 0x173b18 bytes

Linux/PowerPC load: root=/dev/ram
Finalizing device tree... flat tree at 0x59e300

The gdb showed deadbeef.
(gdb) target remote ppcbdi:2001
Remote debugging using ppcbdi:2001
0xdeadbeef in ?? ()
(gdb)

The kernel doesn't seem to start. What could go wrong here?

Thanks a lot,
-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-06-30 Thread Shawn Jin
Hi Scott,

> Does u-boot on your board put IMMR somewhere other than 0xff00?  If so,
> you'll need to update the device tree to reflect this.

Thanks a lot. I think you got something here. Please bear with me.
This is the first dts file I'm creating. I have some question
regarding to dts first. BTW, My IMMR is at 0xfa20.

How do I find the address, reg, and range for nodes like localbus,
soc, eth0, cpm, serial etc.? Do the addresses of localbus and soc
relate to IMMR? So my localbus and soc should be as follows?

local...@fa200100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
 "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
reg = <0xfa200100 0x40>;

ranges = <
0 0 0xfe00 0x0100// I'm not sure about this?
>;
};

s...@fa20 {
compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xfa20 0x4000>;

// Temporary until code stops depending on it.
device_type = "soc";

// Temporary until get_immrbase() is fixed.
reg = <0xfa20 0x4000>;
};

Thanks again,
-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-06-30 Thread Scott Wood

On 06/30/2010 01:14 AM, Shawn Jin wrote:

Hi Scott,


Bus Fault @ 0x00404c40, fixup 0x
Machine check in kernel mode.
Caused by (from msr): regs 07d1cb80 Unknown values in msr
NIP: 00404C40 XER:  LR: 00404C24 REGS: 07d1cb80 TRAP: 0200 DAR: 0001
MSR: 1002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00


Can you look up the source line/instruction corresponding to 0x404c40, in
the wrapper ELF file?


I'm not sure how to look up it.


Use a powerpc gdb on the wrapper ELF file, and do "li *0x404c40" and/or 
"i li *0x404c40".


Or use a powerpc addr2line.


But I used the BDI to dump the
instructions in which you may find some clue? These should be kernel
code, right? Maybe the gdb can help to de-assemble them?


Not easily (Format letter "i" is meaningless in "print" command, it 
says...) and there'd be no context about what part of the source code it 
corresponds to...



00404c40 : 0xa00a  -1609957376  


But this is a 16-bit load from r10, which is from your previous register 
dump is FF0009C0.


Does u-boot on your board put IMMR somewhere other than 0xff00?  If 
so, you'll need to update the device tree to reflect this.


-Scott
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Re: machine check in kernel for a mpc870 board

2010-06-29 Thread Shawn Jin
Hi Scott,

>> Bus Fault @ 0x00404c40, fixup 0x
>> Machine check in kernel mode.
>> Caused by (from msr): regs 07d1cb80 Unknown values in msr
>> NIP: 00404C40 XER:  LR: 00404C24 REGS: 07d1cb80 TRAP: 0200 DAR: 
>> 0001
>> MSR: 1002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
>
> Can you look up the source line/instruction corresponding to 0x404c40, in
> the wrapper ELF file?

I'm not sure how to look up it. But I used the BDI to dump the
instructions in which you may find some clue? These should be kernel
code, right? Maybe the gdb can help to de-assemble them?

BDI>md 0x404c00 0x20
00404c00 : 0x4800317d   1207972221  H.1}
00404c04 : 0x80010014  -2147418092  
00404c08 : 0xbbc10008  -1144979448  
00404c0c : 0x7c0803a6   208096  |...
00404c10 : 0x38210010941686800  8!..
00404c14 : 0x4e800020   1317011488  N..
00404c18 : 0x9421fff0  -1809711120  .!..
00404c1c : 0x7c0802a6   2080899750  |...
00404c20 : 0x429f0005   1117716485  B...
00404c24 : 0xbfc10008  -1077870584  
00404c28 : 0x7fc802a6   2143814310  
00404c2c : 0x90010014  -1878982636  
00404c30 : 0x3fde0001   1071513601  ?...
00404c34 : 0x3bdedd98   1004461464  ;...
00404c38 : 0x813e8000  -2126610432  .>..
00404c3c : 0x8149  -2125922304  .I..
00404c40 : 0xa00a  -1609957376  
00404c44 : 0x0c00201326592  
00404c48 : 0x4c00012c   1275068716  L..,
00404c4c : 0x70090001   1879638017  p...
00404c50 : 0x4082fff0   1082327024  @...
00404c54 : 0x817e8000  -2122416128  .~..
00404c58 : 0x5469402e   1416183854  t...@.

Thanks a lot,
-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-06-29 Thread Scott Wood
On Tue, Jun 29, 2010 at 12:59:56AM -0700, Shawn Jin wrote:
> I'm porting a mpc870 board to the powerpc arch. The base is the
> adder-875 board. My first try to boot the cuImage.my870 is
> experiencing a machine check. And I have no clue where to look. Any
> help?
> 
> => bootm 100
> ## Booting image at 0100 ...
>Image Name:   Linux-2.6.33.5
>Image Type:   PowerPC Linux Kernel Image (gzip compressed)
>Data Size:747319 Bytes = 729.8 kB
>Load Address: 0040
>Entry Point:  004004d4
>Verifying Checksum ... OK
>Uncompressing Kernel Image ... OK
> Bus Fault @ 0x00404c40, fixup 0x
> Machine check in kernel mode.
> Caused by (from msr): regs 07d1cb80 Unknown values in msr
> NIP: 00404C40 XER:  LR: 00404C24 REGS: 07d1cb80 TRAP: 0200 DAR: 
> 0001
> MSR: 1002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

Can you look up the source line/instruction corresponding to 0x404c40, in
the wrapper ELF file?

-Scott
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Re: machine check in kernel for a mpc870 board

2010-06-29 Thread Shawn Jin
>> => bootm 100
>> ## Booting image at 0100 ...
>>    Image Name:   Linux-2.6.33.5
>>    Image Type:   PowerPC Linux Kernel Image (gzip compressed)
>>    Data Size:    747319 Bytes = 729.8 kB
>>    Load Address: 0040
>>    Entry Point:  004004d4
>
> Load and Entry Point should probably be 0

But the cuImage.adder875-uboot image also has the same load address as
mine and the entry point is 0x4004d8. Also cuImage.mpc885ads has the
same load address and entry point as cuImage.adder875-uboot. So I
don't suspect them.

All right. I built a uImage for mpc885ads and the uImage's load
address and entry point are both 0. So this is because I'm using
cuImage instead of uImage.

Thanks Joake, anyway.

-Shawn.
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Re: machine check in kernel for a mpc870 board

2010-06-29 Thread Joakim Tjernlund
> From: Shawn Jin 
>
> I'm porting a mpc870 board to the powerpc arch. The base is the
> adder-875 board. My first try to boot the cuImage.my870 is
> experiencing a machine check. And I have no clue where to look. Any
> help?
>
> => bootm 100
> ## Booting image at 0100 ...
>Image Name:   Linux-2.6.33.5
>Image Type:   PowerPC Linux Kernel Image (gzip compressed)
>Data Size:747319 Bytes = 729.8 kB
>Load Address: 0040
>Entry Point:  004004d4

Load and Entry Point should probably be 0

 Jocke

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machine check in kernel for a mpc870 board

2010-06-29 Thread Shawn Jin
I'm porting a mpc870 board to the powerpc arch. The base is the
adder-875 board. My first try to boot the cuImage.my870 is
experiencing a machine check. And I have no clue where to look. Any
help?

=> bootm 100
## Booting image at 0100 ...
   Image Name:   Linux-2.6.33.5
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:747319 Bytes = 729.8 kB
   Load Address: 0040
   Entry Point:  004004d4
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
Bus Fault @ 0x00404c40, fixup 0x
Machine check in kernel mode.
Caused by (from msr): regs 07d1cb80 Unknown values in msr
NIP: 00404C40 XER:  LR: 00404C24 REGS: 07d1cb80 TRAP: 0200 DAR: 0001
MSR: 1002 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 00404D50 07D1CC70  0004 007FFF0C 0001 0040AAB8 726F6F74
GPR08: 3D2F6465 0059D958 FF0009C0 0059DDDC FF003C00 1014BAC4 07FFF000 0001
GPR16: 007FFF0D 004004D4 0001 007FFF00 07FF9D78   07D5D2A0
GPR24: 007FFEC0 0080    0059D958 004129BC 
Call backtrace:
machine check

Thanks alot,
-Shawn.
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