date:20190601

[Lldb-commits] [PATCH] D62771: [LLDBregisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

2019-06-01 Thread Wanyi Ye via Phabricator via lldb-commits

kusmour created this revision.
kusmour added reviewers: xiaobai, compnerd.
Herald added subscribers: lldb-commits, kristof.beyls, javed.absar.
Herald added a project: LLDB.

llvm updated the function from `llvm::codeview::getRegisterNames()` to 
`llvm::codeview::getRegisterNames(CPUType)`
according to the function implementation, there are only two different register 
number list: ARM64 for ARM64, X64 for all others
the backends for arm64 and aarch64 are merged so from lldb side, aarch64 will 
have `llvm::codeview::CPUType::ARM64`
and others will set CPUType to `llvm::codeview::CPUType::X64` for now


Repository:
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https://reviews.llvm.org/D62771

Files:
  lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp


Index: 
lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -24,9 +24,18 @@
 using namespace lldb_private::postfix;
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, 
llvm::Triple::ArchType arch_type) {
+  llvm::codeview::CPUType cpu;
+  switch(arch_type) {
+case llvm::Triple::ArchType::aarch64:
+case llvm::Triple::ArchType::aarch64_be:
+case llvm::Triple::ArchType::aarch64_32:
+  cpu = llvm::codeview::CPUType::ARM64;
+default:
+  cpu = llvm::codeview::CPUType::X64;
+  }
   // lookup register name to get lldb register number
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(cpu);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {


Index: lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -24,9 +24,18 @@
 using namespace lldb_private::postfix;
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, llvm::Triple::ArchType arch_type) {
+  llvm::codeview::CPUType cpu;
+  switch(arch_type) {
+case llvm::Triple::ArchType::aarch64:
+case llvm::Triple::ArchType::aarch64_be:
+case llvm::Triple::ArchType::aarch64_32:
+  cpu = llvm::codeview::CPUType::ARM64;
+default:
+  cpu = llvm::codeview::CPUType::X64;
+  }
   // lookup register name to get lldb register number
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(cpu);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {
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[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

2019-06-01 Thread Tom Tan via Phabricator via lldb-commits

TomTan created this revision.
TomTan added reviewers: efriedma, rnk, mgorny, mstorsjo.
TomTan added a project: LLDB.
Herald added subscribers: lldb-commits, kristof.beyls.

Change rL362280  
(https://reviews.llvm.org/rL362280) changed CodeView API getRegisterNames() by 
adding an input parameter in CPUType. It is called in LLDB and needs to be 
updated.


Repository:
  rLLDB LLDB

https://reviews.llvm.org/D62772

Files:
  source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp


Index: source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -25,8 +25,14 @@
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, 
llvm::Triple::ArchType arch_type) {
   // lookup register name to get lldb register number
+  llvm::codeview::CPUType Cpu;
+  if (arch_type == llvm::Triple::ArchType::aarch64) {
+Cpu = llvm::codeview::CPUType::ARM64;
+  } else {
+Cpu = llvm::codeview::CPUType::X64;
+  }
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(Cpu);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {


Index: source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -25,8 +25,14 @@
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, llvm::Triple::ArchType arch_type) {
   // lookup register name to get lldb register number
+  llvm::codeview::CPUType Cpu;
+  if (arch_type == llvm::Triple::ArchType::aarch64) {
+Cpu = llvm::codeview::CPUType::ARM64;
+  } else {
+Cpu = llvm::codeview::CPUType::X64;
+  }
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(Cpu);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {
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[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

2019-06-01 Thread Michał Górny via Phabricator via lldb-commits

mgorny added a reviewer: labath.
mgorny added a comment.

Are you sure this triple → CPUType mapping belongs in each consumer? Maybe it'd 
be better to have something inside LLVM, so that we wouldn't have to keep this 
up-to-date in all the places. Maybe `getRegisterNames()` overload that takes a 
triple?


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[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

2019-06-01 Thread Tom Tan via Phabricator via lldb-commits

TomTan updated this revision to Diff 202540.
TomTan edited the summary of this revision.
TomTan added a comment.

Update variable naming to be consistent with current file.


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Files:
  source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp


Index: source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -25,8 +25,14 @@
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, 
llvm::Triple::ArchType arch_type) {
   // lookup register name to get lldb register number
+  llvm::codeview::CPUType cpu_type;
+  if (arch_type == llvm::Triple::ArchType::aarch64) {
+cpu_type = llvm::codeview::CPUType::ARM64;
+  } else {
+cpu_type = llvm::codeview::CPUType::X64;
+  }
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(cpu_type);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {


Index: source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -25,8 +25,14 @@
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, llvm::Triple::ArchType arch_type) {
   // lookup register name to get lldb register number
+  llvm::codeview::CPUType cpu_type;
+  if (arch_type == llvm::Triple::ArchType::aarch64) {
+cpu_type = llvm::codeview::CPUType::ARM64;
+  } else {
+cpu_type = llvm::codeview::CPUType::X64;
+  }
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(cpu_type);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {
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[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

2019-06-01 Thread Tom Tan via Phabricator via lldb-commits

TomTan added a comment.

In D62772#1526145 , @mgorny wrote:

> Are you sure this triple → CPUType mapping belongs in each consumer? Maybe 
> it'd be better to have something inside LLVM, so that we wouldn't have to 
> keep this up-to-date in all the places. Maybe `getRegisterNames()` overload 
> that takes a triple?


The CodeView APIs seems not aware of LLVM tripe. `CPUType` comes from CodeView 
which makes this API self-consistent.


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[Lldb-commits] [PATCH] D62634: Improve DWARF parsing and accessing by 1% to 2%

2019-06-01 Thread Jan Kratochvil via Phabricator via lldb-commits

jankratochvil added a comment.

On Fedora 29 x86_64 it broke:

  FAIL: LLDB 
(/home/jkratoch/redhat/llvm-monorepo-clangassert/bin/clang-9-x86_64) :: 
test_enable_dwo (TestBreakpointLocations.BreakpointLocationsTestCase)
  FAIL: LLDB 
(/home/jkratoch/redhat/llvm-monorepo-clangassert/bin/clang-9-x86_64) :: 
test_shadowed_command_options_dwo 
(TestBreakpointLocations.BreakpointLocationsTestCase)
  FAIL: LLDB 
(/home/jkratoch/redhat/llvm-monorepo-clangassert/bin/clang-9-x86_64) :: 
test_shadowed_cond_options_dwo 
(TestBreakpointLocations.BreakpointLocationsTestCase)

That is the `dwo` part of `TestBreakpointLocations`.


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[Lldb-commits] [PATCH] D62634: Improve DWARF parsing and accessing by 1% to 2%

2019-06-01 Thread Greg Clayton via Phabricator via lldb-commits

clayborg added a comment.

In D62634#1526174 , @jankratochvil 
wrote:

> On Fedora 29 x86_64 it broke:
>
>   FAIL: LLDB 
> (/home/jkratoch/redhat/llvm-monorepo-clangassert/bin/clang-9-x86_64) :: 
> test_enable_dwo (TestBreakpointLocations.BreakpointLocationsTestCase)
>   FAIL: LLDB 
> (/home/jkratoch/redhat/llvm-monorepo-clangassert/bin/clang-9-x86_64) :: 
> test_shadowed_command_options_dwo 
> (TestBreakpointLocations.BreakpointLocationsTestCase)
>   FAIL: LLDB 
> (/home/jkratoch/redhat/llvm-monorepo-clangassert/bin/clang-9-x86_64) :: 
> test_shadowed_cond_options_dwo 
> (TestBreakpointLocations.BreakpointLocationsTestCase)
>
>
> That is the `dwo` part of `TestBreakpointLocations`.


This really shouldn't be the cause. No functional change here.


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[Lldb-commits] [PATCH] D62702: [ABI] Fix SystemV ABI to handle nested aggregate type returned in register

2019-06-01 Thread Saleem Abdulrasool via Phabricator via lldb-commits

compnerd added inline comments.



Comment at: lldb/source/Symbol/ClangASTContext.cpp:3915
+bool ClangASTContext::CanPassInRegisters(const CompilerType &type) {
+  if (clang::RecordDecl *record_decl = 
+  ClangASTContext::GetAsRecordDecl(type)) {

I think that using `auto` instead of `clang::RecordDecl` here is fine as you 
are already spelling that out in the `ClangASTContext::GetAsRecordDecl`.


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[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

2019-06-01 Thread Jan Kratochvil via Phabricator via lldb-commits

jankratochvil added a comment.

D62771  does address the same.


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[Lldb-commits] [PATCH] D62785: Fix compilation following r362280

2019-06-01 Thread Alexandre Ganea via Phabricator via lldb-commits

aganea created this revision.
aganea added reviewers: TomTan, labath, tstellar.
aganea added a project: LLDB.
aganea edited reviewers, added: stella.stamenova; removed: tstellar.

Repository:
  rLLDB LLDB

https://reviews.llvm.org/D62785

Files:
  source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp


Index: source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -23,10 +23,16 @@
 using namespace lldb_private;
 using namespace lldb_private::postfix;
 
-static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, 
llvm::Triple::ArchType arch_type) {
+static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name,
+   llvm::Triple::ArchType arch_type) {
+  bool isARM64 = arch_type == llvm::Triple::aarch64 ||
+ arch_type == llvm::Triple::aarch64_32 ||
+ arch_type == llvm::Triple::aarch64_be;
   // lookup register name to get lldb register number
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(
+  isARM64 ? llvm::codeview::CPUType::ARM64
+  : llvm::codeview::CPUType::Intel8086);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {


Index: source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -23,10 +23,16 @@
 using namespace lldb_private;
 using namespace lldb_private::postfix;
 
-static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, llvm::Triple::ArchType arch_type) {
+static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name,
+   llvm::Triple::ArchType arch_type) {
+  bool isARM64 = arch_type == llvm::Triple::aarch64 ||
+ arch_type == llvm::Triple::aarch64_32 ||
+ arch_type == llvm::Triple::aarch64_be;
   // lookup register name to get lldb register number
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(
+  isARM64 ? llvm::codeview::CPUType::ARM64
+  : llvm::codeview::CPUType::Intel8086);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {
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[Lldb-commits] [PATCH] D62702: [ABI] Fix SystemV ABI to handle nested aggregate type returned in register

2019-06-01 Thread Wanyi Ye via Phabricator via lldb-commits

kusmour marked 2 inline comments as done.
kusmour added inline comments.



Comment at: lldb/source/Symbol/ClangASTContext.cpp:3915
+bool ClangASTContext::CanPassInRegisters(const CompilerType &type) {
+  if (clang::RecordDecl *record_decl = 
+  ClangASTContext::GetAsRecordDecl(type)) {

compnerd wrote:
> I think that using `auto` instead of `clang::RecordDecl` here is fine as you 
> are already spelling that out in the `ClangASTContext::GetAsRecordDecl`.
got it


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[Lldb-commits] [PATCH] D62702: [ABI] Fix SystemV ABI to handle nested aggregate type returned in register

2019-06-01 Thread Wanyi Ye via Phabricator via lldb-commits

kusmour updated this revision to Diff 202574.
kusmour marked an inline comment as done.
kusmour added a comment.

small update :)


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Files:
  lldb/include/lldb/Symbol/ClangASTContext.h
  lldb/include/lldb/Symbol/TypeSystem.h
  
lldb/packages/Python/lldbsuite/test/functionalities/return-value/TestReturnValue.py
  lldb/packages/Python/lldbsuite/test/functionalities/return-value/call-func.c
  lldb/packages/Python/lldbsuite/test/functionalities/return-value/call-func.cpp
  lldb/source/Plugins/ABI/SysV-x86_64/ABISysV_x86_64.cpp
  lldb/source/Symbol/ClangASTContext.cpp

Index: lldb/source/Symbol/ClangASTContext.cpp
===
--- lldb/source/Symbol/ClangASTContext.cpp
+++ lldb/source/Symbol/ClangASTContext.cpp
@@ -3911,6 +3911,14 @@
   return GetCanonicalQualType(type)->isVoidType();
 }
 
+bool ClangASTContext::CanPassInRegisters(const CompilerType &type) {
+  if (auto *record_decl = 
+  ClangASTContext::GetAsRecordDecl(type)) {
+return record_decl->canPassInRegisters();
+  }
+  return false;
+}
+
 bool ClangASTContext::SupportsLanguage(lldb::LanguageType language) {
   return ClangASTContextSupportsLanguage(language);
 }
Index: lldb/source/Plugins/ABI/SysV-x86_64/ABISysV_x86_64.cpp
===
--- lldb/source/Plugins/ABI/SysV-x86_64/ABISysV_x86_64.cpp
+++ lldb/source/Plugins/ABI/SysV-x86_64/ABISysV_x86_64.cpp
@@ -30,6 +30,8 @@
 #include "lldb/Utility/RegisterValue.h"
 #include "lldb/Utility/Status.h"
 
+#include 
+
 using namespace lldb;
 using namespace lldb_private;
 
@@ -1558,6 +1560,55 @@
   return return_valobj_sp;
 }
 
+// The compiler will flatten the nested aggregate type into single
+// layer and push the value to stack
+// This helper function will flatten an aggregate type
+// and return true if it can be returned in register(s) by value
+// return false if the aggregate is in memory
+static bool FlattenAggregateType(
+Thread &thread, ExecutionContext &exe_ctx,
+CompilerType &return_compiler_type,
+uint32_t data_byte_offset,
+std::vector &aggregate_field_offsets,
+std::vector &aggregate_compiler_types) {
+
+  const uint32_t num_children = return_compiler_type.GetNumFields();
+  for (uint32_t idx = 0; idx < num_children; ++idx) {
+std::string name;
+bool is_signed;
+uint32_t count;
+bool is_complex;
+
+uint64_t field_bit_offset = 0;
+CompilerType field_compiler_type = return_compiler_type.GetFieldAtIndex(
+idx, name, &field_bit_offset, nullptr, nullptr);
+llvm::Optional field_bit_width =
+  field_compiler_type.GetBitSize(&thread);
+
+// if we don't know the size of the field (e.g. invalid type), exit
+if (!field_bit_width || *field_bit_width == 0) {
+  return false;
+}
+
+uint32_t field_byte_offset = field_bit_offset / 8 + data_byte_offset;
+
+const uint32_t field_type_flags = field_compiler_type.GetTypeInfo();
+if (field_compiler_type.IsIntegerOrEnumerationType(is_signed) ||
+field_compiler_type.IsPointerType() ||
+field_compiler_type.IsFloatingPointType(count, is_complex)) {
+  aggregate_field_offsets.push_back(field_byte_offset);
+  aggregate_compiler_types.push_back(field_compiler_type);
+} else if (field_type_flags & eTypeHasChildren) {
+  if (!FlattenAggregateType(thread, exe_ctx, field_compiler_type,
+field_byte_offset, aggregate_field_offsets,
+aggregate_compiler_types)) {
+return false;
+  }
+}
+  }
+  return true;
+}
+
 ValueObjectSP ABISysV_x86_64::GetReturnValueObjectImpl(
 Thread &thread, CompilerType &return_compiler_type) const {
   ValueObjectSP return_valobj_sp;
@@ -1580,10 +1631,17 @@
   if (return_compiler_type.IsAggregateType()) {
 Target *target = exe_ctx.GetTargetPtr();
 bool is_memory = true;
-if (*bit_width <= 128) {
-  ByteOrder target_byte_order = target->GetArchitecture().GetByteOrder();
+std::vector aggregate_field_offsets;
+std::vector aggregate_compiler_types;
+if (return_compiler_type.GetTypeSystem()->CanPassInRegisters(
+  return_compiler_type) &&
+  *bit_width <= 128 &&
+  FlattenAggregateType(thread, exe_ctx, return_compiler_type,
+  0, aggregate_field_offsets,
+  aggregate_compiler_types)) {
+  ByteOrder byte_order = target->GetArchitecture().GetByteOrder();
   DataBufferSP data_sp(new DataBufferHeap(16, 0));
-  DataExtractor return_ext(data_sp, target_byte_order,
+  DataExtractor return_ext(data_sp, byte_order,
target->GetArchitecture().GetAddressByteSize());
 
   const RegisterInfo *rax_info =
@@ -1613,40 +1671,33 @@
   uint32_t integer_bytes =
   0; // Tracks

[Lldb-commits] [PATCH] D62788: [lldb-server unittest] Add missing teardown logic

2019-06-01 Thread António Afonso via Phabricator via lldb-commits

aadsm created this revision.
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Herald added a project: LLDB.
Herald added a subscriber: lldb-commits.

This test base class is missing the teardown making the second set of tests 
extending it to fail in an assertion in the FileSystem::Initialize() (as it's 
being initialized twice).
Not sure why this isn't failing the build bots.. (unless they're running 
without asserts?).

With this fix `ninja LLDBServerTests && 
./tools/lldb/unittests/tools/lldb-server/tests/LLDBServerTests` successfully 
runs and passes all tests.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D62788

Files:
  lldb/unittests/tools/lldb-server/tests/TestBase.h


Index: lldb/unittests/tools/lldb-server/tests/TestBase.h
===
--- lldb/unittests/tools/lldb-server/tests/TestBase.h
+++ lldb/unittests/tools/lldb-server/tests/TestBase.h
@@ -25,6 +25,11 @@
 lldb_private::HostInfo::Initialize();
   }
 
+  static void TearDownTestCase() {
+lldb_private::HostInfo::Terminate();
+lldb_private::FileSystem::Terminate();
+  }
+
   static std::string getInferiorPath(llvm::StringRef Name) {
 llvm::SmallString<64> Path(LLDB_TEST_INFERIOR_PATH);
 llvm::sys::path::append(Path, Name + LLDB_TEST_INFERIOR_SUFFIX);


Index: lldb/unittests/tools/lldb-server/tests/TestBase.h
===
--- lldb/unittests/tools/lldb-server/tests/TestBase.h
+++ lldb/unittests/tools/lldb-server/tests/TestBase.h
@@ -25,6 +25,11 @@
 lldb_private::HostInfo::Initialize();
   }
 
+  static void TearDownTestCase() {
+lldb_private::HostInfo::Terminate();
+lldb_private::FileSystem::Terminate();
+  }
+
   static std::string getInferiorPath(llvm::StringRef Name) {
 llvm::SmallString<64> Path(LLDB_TEST_INFERIOR_PATH);
 llvm::sys::path::append(Path, Name + LLDB_TEST_INFERIOR_SUFFIX);
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[Lldb-commits] [PATCH] D62788: [lldb-server unittest] Add missing teardown logic

2019-06-01 Thread Alex Langford via Phabricator via lldb-commits

xiaobai accepted this revision.
xiaobai added a comment.
This revision is now accepted and ready to land.

Thanks for fixing this.


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[Lldb-commits] [PATCH] D62771: [LLDBRegisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

2019-06-01 Thread Alex Langford via Phabricator via lldb-commits

xiaobai requested changes to this revision.
xiaobai added inline comments.
This revision now requires changes to proceed.



Comment at: 
lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp:32
+case llvm::Triple::ArchType::aarch64_32:
+  cpu = llvm::codeview::CPUType::ARM64;
+default:

break here


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[Lldb-commits] [PATCH] D62771: [LLDBRegisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

2019-06-01 Thread Wanyi Ye via Phabricator via lldb-commits

kusmour updated this revision to Diff 202585.
kusmour added a comment.

fix switch statement


Repository:
  rLLDB LLDB

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Files:
  lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp


Index: 
lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -24,9 +24,19 @@
 using namespace lldb_private::postfix;
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, 
llvm::Triple::ArchType arch_type) {
+  llvm::codeview::CPUType cpu;
+  switch(arch_type) {
+case llvm::Triple::ArchType::aarch64:
+case llvm::Triple::ArchType::aarch64_be:
+case llvm::Triple::ArchType::aarch64_32:
+  cpu = llvm::codeview::CPUType::ARM64;
+  break;
+default:
+  cpu = llvm::codeview::CPUType::X64;
+  }
   // lookup register name to get lldb register number
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(cpu);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {


Index: lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
===
--- lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
+++ lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp
@@ -24,9 +24,19 @@
 using namespace lldb_private::postfix;
 
 static uint32_t ResolveLLDBRegisterNum(llvm::StringRef reg_name, llvm::Triple::ArchType arch_type) {
+  llvm::codeview::CPUType cpu;
+  switch(arch_type) {
+case llvm::Triple::ArchType::aarch64:
+case llvm::Triple::ArchType::aarch64_be:
+case llvm::Triple::ArchType::aarch64_32:
+  cpu = llvm::codeview::CPUType::ARM64;
+  break;
+default:
+  cpu = llvm::codeview::CPUType::X64;
+  }
   // lookup register name to get lldb register number
   llvm::ArrayRef> register_names =
-  llvm::codeview::getRegisterNames();
+  llvm::codeview::getRegisterNames(cpu);
   auto it = llvm::find_if(
   register_names,
   [®_name](const llvm::EnumEntry ®ister_entry) {
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[Lldb-commits] [PATCH] D62771: [LLDBRegisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

2019-06-01 Thread Wanyi Ye via Phabricator via lldb-commits

kusmour marked 2 inline comments as done.
kusmour added inline comments.



Comment at: 
lldb/source/Plugins/SymbolFile/NativePDB/PdbFPOProgramToDWARFExpression.cpp:32
+case llvm::Triple::ArchType::aarch64_32:
+  cpu = llvm::codeview::CPUType::ARM64;
+default:

xiaobai wrote:
> break here
omg thx


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[Lldb-commits] [lldb] r362318 - [Target] Adjust header in Thread

2019-06-01 Thread Alex Langford via lldb-commits

Author: xiaobai
Date: Sat Jun  1 23:03:05 2019
New Revision: 362318

URL: http://llvm.org/viewvc/llvm-project?rev=362318&view=rev
Log:
[Target] Adjust header in Thread

Modified:
lldb/trunk/source/Target/Thread.cpp

Modified: lldb/trunk/source/Target/Thread.cpp
URL: 
http://llvm.org/viewvc/llvm-project/lldb/trunk/source/Target/Thread.cpp?rev=362318&r1=362317&r2=362318&view=diff
==
--- lldb/trunk/source/Target/Thread.cpp (original)
+++ lldb/trunk/source/Target/Thread.cpp Sat Jun  1 23:03:05 2019
@@ -22,7 +22,7 @@
 #include "lldb/Target/ABI.h"
 #include "lldb/Target/DynamicLoader.h"
 #include "lldb/Target/ExecutionContext.h"
-#include "lldb/Target/ObjCLanguageRuntime.h"
+#include "lldb/Target/LanguageRuntime.h"
 #include "lldb/Target/Process.h"
 #include "lldb/Target/RegisterContext.h"
 #include "lldb/Target/StackFrameRecognizer.h"


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[Lldb-commits] [PATCH] D62743: Add color to the default thread and frame format.

2019-06-01 Thread Jonas Devlieghere via Phabricator via lldb-commits

JDevlieghere updated this revision to Diff 202587.
JDevlieghere added a comment.

Adrian's feedback


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Files:
  lldb/source/Core/Debugger.cpp


Index: lldb/source/Core/Debugger.cpp
===
--- lldb/source/Core/Debugger.cpp
+++ lldb/source/Core/Debugger.cpp
@@ -120,8 +120,13 @@
   "${module.file.basename}{`${function.name-without-args}" 
\
   "{${frame.no-debug}${function.pc-offset"
 
+#define FILE_COLOR "${ansi.fg.yellow}"
+#define STOP_COLOR "${ansi.fg.red}$"
+
 #define FILE_AND_LINE  
\
-  "{ at ${line.file.basename}:${line.number}{:${line.column}}}"
+  "{ at " FILE_COLOR "${line.file.basename}${ansi.normal}" 
\
+  ":${line.number}{:${line.column}}}"
+
 #define IS_OPTIMIZED "{${function.is-optimized} [opt]}"
 
 #define IS_ARTIFICIAL "{${frame.is-artificial} [artificial]}"
@@ -133,7 +138,7 @@
   "{, queue = '${thread.queue}'}"  
\
   "{, activity = '${thread.info.activity.name}'}"  
\
   "{, ${thread.info.trace_messages} messages}" 
\
-  "{, stop reason = ${thread.stop-reason}}"
\
+  "{, stop reason = " STOP_COLOR " ${thread.stop-reason} ${ansi.normal}}"  
\
   "{\\nReturn value: ${thread.return-value}}"  
\
   "{\\nCompleted expression: ${thread.completed-expression}}"  
\
   "\\n"
@@ -143,7 +148,7 @@
   "{, queue = '${thread.queue}'}"  
\
   "{, activity = '${thread.info.activity.name}'}"  
\
   "{, ${thread.info.trace_messages} messages}" 
\
-  "{, stop reason = ${thread.stop-reason}}"
\
+  "{, stop reason = " STOP_COLOR " ${thread.stop-reason} ${ansi.normal}}"  
\
   "{\\nReturn value: ${thread.return-value}}"  
\
   "{\\nCompleted expression: ${thread.completed-expression}}"  
\
   "\\n"


Index: lldb/source/Core/Debugger.cpp
===
--- lldb/source/Core/Debugger.cpp
+++ lldb/source/Core/Debugger.cpp
@@ -120,8 +120,13 @@
   "${module.file.basename}{`${function.name-without-args}" \
   "{${frame.no-debug}${function.pc-offset"
 
+#define FILE_COLOR "${ansi.fg.yellow}"
+#define STOP_COLOR "${ansi.fg.red}$"
+
 #define FILE_AND_LINE  \
-  "{ at ${line.file.basename}:${line.number}{:${line.column}}}"
+  "{ at " FILE_COLOR "${line.file.basename}${ansi.normal}" \
+  ":${line.number}{:${line.column}}}"
+
 #define IS_OPTIMIZED "{${function.is-optimized} [opt]}"
 
 #define IS_ARTIFICIAL "{${frame.is-artificial} [artificial]}"
@@ -133,7 +138,7 @@
   "{, queue = '${thread.queue}'}"  \
   "{, activity = '${thread.info.activity.name}'}"  \
   "{, ${thread.info.trace_messages} messages}" \
-  "{, stop reason = ${thread.stop-reason}}"\
+  "{, stop reason = " STOP_COLOR " ${thread.stop-reason} ${ansi.normal}}"  \
   "{\\nReturn value: ${thread.return-value}}"  \
   "{\\nCompleted expression: ${thread.completed-expression}}"  \
   "\\n"
@@ -143,7 +148,7 @@
   "{, queue = '${thread.queue}'}"  \
   "{, activity = '${thread.info.activity.name}'}"  \
   "{, ${thread.info.trace_messages} messages}" \
-  "{, stop reason = ${thread.stop-reason}}"\
+  "{, stop reason = " STOP_COLOR " ${thread.stop-reason} ${ansi.normal}}"  \
   "{\\nReturn value: ${thread.return-value}}"  \
   "{\\nCompleted expression: ${thread.completed-expression}}"  \
   "\\n"
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[Lldb-commits] [PATCH] D62771: [LLDBregisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

[Lldb-commits] [PATCH] D62634: Improve DWARF parsing and accessing by 1% to 2%

[Lldb-commits] [PATCH] D62634: Improve DWARF parsing and accessing by 1% to 2%

[Lldb-commits] [PATCH] D62702: [ABI] Fix SystemV ABI to handle nested aggregate type returned in register

[Lldb-commits] [PATCH] D62772: [COFF, ARM64] Fix CodeView API change for getRegisterNames

[Lldb-commits] [PATCH] D62785: Fix compilation following r362280

[Lldb-commits] [PATCH] D62702: [ABI] Fix SystemV ABI to handle nested aggregate type returned in register

[Lldb-commits] [PATCH] D62702: [ABI] Fix SystemV ABI to handle nested aggregate type returned in register

[Lldb-commits] [PATCH] D62788: [lldb-server unittest] Add missing teardown logic

[Lldb-commits] [PATCH] D62788: [lldb-server unittest] Add missing teardown logic

[Lldb-commits] [PATCH] D62771: [LLDBRegisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

[Lldb-commits] [PATCH] D62771: [LLDBRegisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

[Lldb-commits] [PATCH] D62771: [LLDBRegisterNum] Update function call llvm::codeview::getRegisterNames(CPUType) in lldb

[Lldb-commits] [lldb] r362318 - [Target] Adjust header in Thread

[Lldb-commits] [PATCH] D62743: Add color to the default thread and frame format.

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