[llvm-branch-commits] [lld] 93ad0ed - [ELF] Drop .rel[a].debug_gnu_pub{names, types} for --gdb-index --emit-relocs

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-12T00:07:28-08:00
New Revision: 93ad0edf674125f19177054d8331a5e8910d3d98

URL: 
https://github.com/llvm/llvm-project/commit/93ad0edf674125f19177054d8331a5e8910d3d98
DIFF: 
https://github.com/llvm/llvm-project/commit/93ad0edf674125f19177054d8331a5e8910d3d98.diff

LOG: [ELF] Drop .rel[a].debug_gnu_pub{names,types} for --gdb-index --emit-relocs

Fixes PR48693: --emit-relocs keeps relocation sections. --gdb-index drops
.debug_gnu_pubnames and .debug_gnu_pubtypes but not their relocation sections.
This can cause a null pointer dereference in `getOutputSectionName`.

Also delete debug-gnu-pubnames.s which is covered by gdb-index.s

Reviewed By: grimar

Differential Revision: https://reviews.llvm.org/D94354

Added: 


Modified: 
lld/ELF/SyntheticSections.cpp
lld/test/ELF/gdb-index.s

Removed: 
lld/test/ELF/debug-gnu-pubnames.s



diff  --git a/lld/ELF/SyntheticSections.cpp b/lld/ELF/SyntheticSections.cpp
index 9b5fb3f26c59..9a875bd7ec3e 100644
--- a/lld/ELF/SyntheticSections.cpp
+++ b/lld/ELF/SyntheticSections.cpp
@@ -2879,6 +2879,13 @@ template  GdbIndexSection 
*GdbIndexSection::create() {
 else if (isec->name == ".debug_info")
   files.insert(isec->file);
   }
+  // Drop .rel[a].debug_gnu_pub{names,types} for --emit-relocs.
+  llvm::erase_if(inputSections, [](InputSectionBase *s) {
+if (auto *isec = dyn_cast(s))
+  if (InputSectionBase *rel = isec->getRelocatedSection())
+return !rel->isLive();
+return !s->isLive();
+  });
 
   std::vector chunks(files.size());
   std::vector> nameAttrs(files.size());

diff  --git a/lld/test/ELF/debug-gnu-pubnames.s 
b/lld/test/ELF/debug-gnu-pubnames.s
deleted file mode 100644
index 51a289e52558..
--- a/lld/test/ELF/debug-gnu-pubnames.s
+++ /dev/null
@@ -1,18 +0,0 @@
-# REQUIRES: x86
-# RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
-
-# RUN: ld.lld %t.o -o %t1.exe
-# RUN: llvm-readobj --sections %t1.exe | FileCheck %s
-# CHECK: .debug_gnu_pubnames
-# CHECK: .debug_gnu_pubtypes
-
-# RUN: ld.lld --gdb-index %t.o -o %t2.exe
-# RUN: llvm-readobj --sections %t2.exe | FileCheck %s --check-prefix=GDB
-# GDB-NOT: .debug_gnu_pubnames
-# GDB-NOT: .debug_gnu_pubtypes
-
-.section .debug_gnu_pubnames,"",@progbits
-.long 0
-
-.section .debug_gnu_pubtypes,"",@progbits
-.long 0

diff  --git a/lld/test/ELF/gdb-index.s b/lld/test/ELF/gdb-index.s
index 546590ab359e..54a01a2c0d51 100644
--- a/lld/test/ELF/gdb-index.s
+++ b/lld/test/ELF/gdb-index.s
@@ -5,7 +5,14 @@
 
 # RUN: llvm-objdump -d %t | FileCheck %s --check-prefix=DISASM
 # RUN: llvm-dwarfdump -gdb-index %t | FileCheck %s --check-prefix=DWARF
-# RUN: llvm-readelf -sections %t | FileCheck %s --check-prefix=SECTION
+
+## Drop .debug_gnu_pubnames and .debug_gnu_pubtypes.
+## Also drop their relocation sections if --emit-relocs is specified.
+# RUN: ld.lld --gdb-index --emit-relocs %t1.o %t2.o -o %t1
+# RUN: llvm-readelf --sections %t1 | FileCheck %s --check-prefix=SECTION
+
+# SECTION-NOT: .debug_gnu_pubnames
+# SECTION-NOT: .debug_gnu_pubtypes
 
 # RUN: llvm-mc -compress-debug-sections=zlib-gnu -filetype=obj 
-triple=x86_64-pc-linux \
 # RUN:   %p/Inputs/gdb-index.s -o %t2.o
@@ -46,8 +53,6 @@
 # DWARF-NEXT:1(0x8): 0x3000
 # DWARF-NEXT:2(0x10): 0x9000 0x9001
 
-# SECTION-NOT: debug_gnu_pubnames
-
 # RUN: ld.lld --gdb-index --no-gdb-index %t1.o %t2.o -o %t2
 # RUN: llvm-readobj --sections %t2 | FileCheck -check-prefix=NOGDB %s
 # NOGDB-NOT: Name: .gdb_index
@@ -111,7 +116,7 @@ entrypoint:
 .section .debug_gnu_pubnames,"",@progbits
 .long 0x1e
 .value 0x2
-.long 0
+.long .debug_info
 .long 0x33
 .long 0x18
 .byte 0x30
@@ -121,7 +126,7 @@ entrypoint:
 .section .debug_gnu_pubtypes,"",@progbits
 .long 0x17
 .value 0x2
-.long 0
+.long .debug_info
 .long 0x33
 .long 0x2b
 .byte 0x90



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[llvm-branch-commits] [llvm] 1cc5235 - [WebAssembly] Misc. refactoring in CFGStackify (NFC)

[Heejin Ahn via llvm-branch-commits]

Author: Heejin Ahn
Date: 2021-01-12T00:36:27-08:00
New Revision: 1cc5235712f2ed847f0b593714446d440e0596ba

URL: 
https://github.com/llvm/llvm-project/commit/1cc5235712f2ed847f0b593714446d440e0596ba
DIFF: 
https://github.com/llvm/llvm-project/commit/1cc5235712f2ed847f0b593714446d440e0596ba.diff

LOG: [WebAssembly] Misc. refactoring in CFGStackify (NFC)

Updating `ScopeTops` is something we frequently do in CFGStackify, so
this factors it out as a function. This also makes a few utility
functions templated so that they are not dependent on input vector
types and simplifies function parameters.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D94046

Added: 


Modified: 
llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp

Removed: 




diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
index dbf0f92381c6..9a6d8df8bdca 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
@@ -57,6 +57,11 @@ class WebAssemblyCFGStackify final : public 
MachineFunctionPass {
   // which holds the beginning of the scope. This will allow us to quickly skip
   // over scoped regions when walking blocks.
   SmallVector ScopeTops;
+  void updateScopeTops(MachineBasicBlock *Begin, MachineBasicBlock *End) {
+int EndNo = End->getNumber();
+if (!ScopeTops[EndNo] || ScopeTops[EndNo]->getNumber() > 
Begin->getNumber())
+  ScopeTops[EndNo] = Begin;
+  }
 
   // Placing markers.
   void placeMarkers(MachineFunction &MF);
@@ -135,10 +140,10 @@ static bool explicitlyBranchesTo(MachineBasicBlock *Pred,
 // contains instructions that should go before the marker, and AfterSet 
contains
 // ones that should go after the marker. In this function, AfterSet is only
 // used for sanity checking.
+template 
 static MachineBasicBlock::iterator
-getEarliestInsertPos(MachineBasicBlock *MBB,
- const SmallPtrSet &BeforeSet,
- const SmallPtrSet &AfterSet) {
+getEarliestInsertPos(MachineBasicBlock *MBB, const Container &BeforeSet,
+ const Container &AfterSet) {
   auto InsertPos = MBB->end();
   while (InsertPos != MBB->begin()) {
 if (BeforeSet.count(&*std::prev(InsertPos))) {
@@ -159,10 +164,10 @@ getEarliestInsertPos(MachineBasicBlock *MBB,
 // contains instructions that should go before the marker, and AfterSet 
contains
 // ones that should go after the marker. In this function, BeforeSet is only
 // used for sanity checking.
+template 
 static MachineBasicBlock::iterator
-getLatestInsertPos(MachineBasicBlock *MBB,
-   const SmallPtrSet &BeforeSet,
-   const SmallPtrSet &AfterSet) {
+getLatestInsertPos(MachineBasicBlock *MBB, const Container &BeforeSet,
+   const Container &AfterSet) {
   auto InsertPos = MBB->begin();
   while (InsertPos != MBB->end()) {
 if (AfterSet.count(&*InsertPos)) {
@@ -351,10 +356,7 @@ void 
WebAssemblyCFGStackify::placeBlockMarker(MachineBasicBlock &MBB) {
   registerScope(Begin, End);
 
   // Track the farthest-spanning scope that ends at this point.
-  int Number = MBB.getNumber();
-  if (!ScopeTops[Number] ||
-  ScopeTops[Number]->getNumber() > Header->getNumber())
-ScopeTops[Number] = Header;
+  updateScopeTops(Header, &MBB);
 }
 
 /// Insert a LOOP marker for a loop starting at MBB (if it's a loop header).
@@ -422,8 +424,7 @@ void 
WebAssemblyCFGStackify::placeLoopMarker(MachineBasicBlock &MBB) {
   assert((!ScopeTops[AfterLoop->getNumber()] ||
   ScopeTops[AfterLoop->getNumber()]->getNumber() < MBB.getNumber()) &&
  "With block sorting the outermost loop for a block should be first.");
-  if (!ScopeTops[AfterLoop->getNumber()])
-ScopeTops[AfterLoop->getNumber()] = &MBB;
+  updateScopeTops(&MBB, AfterLoop);
 }
 
 void WebAssemblyCFGStackify::placeTryMarker(MachineBasicBlock &MBB) {
@@ -622,11 +623,8 @@ void 
WebAssemblyCFGStackify::placeTryMarker(MachineBasicBlock &MBB) {
   // catch |
   //   end_block --|
   // end_try
-  for (int Number : {Cont->getNumber(), MBB.getNumber()}) {
-if (!ScopeTops[Number] ||
-ScopeTops[Number]->getNumber() > Header->getNumber())
-  ScopeTops[Number] = Header;
-  }
+  for (auto *End : {&MBB, Cont})
+updateScopeTops(Header, End);
 }
 
 void WebAssemblyCFGStackify::removeUnnecessaryInstrs(MachineFunction &MF) {
@@ -742,10 +740,12 @@ static unsigned getCopyOpcode(const TargetRegisterClass 
*RC) {
 // not yet been added. So 'LLVM_ATTRIBUTE_UNUSED' is added to suppress the
 // warning. Remove the attribute after the new functionality is added.
 LLVM_ATTRIBUTE_UNUSED static void
-unstackifyVRegsUsedInSplitBB(MachineBasicBlock &MBB, MachineBasicBlock &Split,
- WebAssemblyFunctionInfo &MFI,
- Machin

[llvm-branch-commits] [clang] 215ed9b - Adapt CastExpr::getSubExprAsWritten to ConstantExpr

[Stephan Bergmann via llvm-branch-commits]

Author: Stephan Bergmann
Date: 2021-01-12T09:41:03+01:00
New Revision: 215ed9b33ccbe9858aeb65b357bdcff354be

URL: 
https://github.com/llvm/llvm-project/commit/215ed9b33ccbe9858aeb65b357bdcff354be
DIFF: 
https://github.com/llvm/llvm-project/commit/215ed9b33ccbe9858aeb65b357bdcff354be.diff

LOG: Adapt CastExpr::getSubExprAsWritten to ConstantExpr

Differential Revision: https://reviews.llvm.org/D87030

Added: 


Modified: 
clang/lib/AST/Expr.cpp
clang/unittests/Tooling/CastExprTest.cpp

Removed: 




diff  --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp
index a274bf37a407..94b6adf489fe 100644
--- a/clang/lib/AST/Expr.cpp
+++ b/clang/lib/AST/Expr.cpp
@@ -1765,7 +1765,7 @@ Expr *CastExpr::getSubExprAsWritten() {
 // subexpression describing the call; strip it off.
 if (E->getCastKind() == CK_ConstructorConversion)
   SubExpr =
-skipImplicitTemporary(cast(SubExpr)->getArg(0));
+
skipImplicitTemporary(cast(SubExpr->IgnoreImplicit())->getArg(0));
 else if (E->getCastKind() == CK_UserDefinedConversion) {
   assert((isa(SubExpr) ||
   isa(SubExpr)) &&

diff  --git a/clang/unittests/Tooling/CastExprTest.cpp 
b/clang/unittests/Tooling/CastExprTest.cpp
index a9e78d2155b4..cda963a6a897 100644
--- a/clang/unittests/Tooling/CastExprTest.cpp
+++ b/clang/unittests/Tooling/CastExprTest.cpp
@@ -34,4 +34,24 @@ TEST(CastExprTest, 
GetSubExprAsWrittenThroughMaterializedTemporary) {
 "S1 f(S2 s) { return static_cast(s); }\n");
 }
 
+// Verify that getSubExprAsWritten looks through a ConstantExpr in a scenario
+// like
+//
+//   CXXFunctionalCastExpr functional cast to struct S 
+//   `-ConstantExpr 'S'
+// |-value: Struct
+// `-CXXConstructExpr 'S' 'void (int)'
+//   `-IntegerLiteral 'int' 0
+TEST(CastExprTest, GetSubExprAsWrittenThroughConstantExpr) {
+CastExprVisitor Visitor;
+Visitor.OnExplicitCast = [](ExplicitCastExpr *Expr) {
+  auto *Sub = Expr->getSubExprAsWritten();
+  EXPECT_TRUE(isa(Sub))
+<< "Expected IntegerLiteral, but saw " << Sub->getStmtClassName();
+};
+Visitor.runOver("struct S { consteval S(int) {} };\n"
+"S f() { return S(0); }\n",
+CastExprVisitor::Lang_CXX2a);
+}
+
 }



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[llvm-branch-commits] [llvm] c8a914d - [LiveDebugValues] Fix comparison operator in VarLocBasedImpl

[Sander de Smalen via llvm-branch-commits]

Author: Sander de Smalen
Date: 2021-01-12T08:44:58Z
New Revision: c8a914db5c60dbeb5b638f30a9915855a67805f7

URL: 
https://github.com/llvm/llvm-project/commit/c8a914db5c60dbeb5b638f30a9915855a67805f7
DIFF: 
https://github.com/llvm/llvm-project/commit/c8a914db5c60dbeb5b638f30a9915855a67805f7.diff

LOG: [LiveDebugValues] Fix comparison operator in VarLocBasedImpl

The issue was introduced in commit rG84a1120943a651184bae507fed5d648fee381ae4
and would cause a VarLoc's StackOffset to be compared with its own, instead of
the StackOffset from the other VarLoc. This patch fixes that.

Added: 


Modified: 
llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp 
b/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
index 4811b8046797..e2daa46fe6b9 100644
--- a/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
+++ b/llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
@@ -572,8 +572,9 @@ class VarLocBasedLDV : public LDVImpl {
Expr) <
std::make_tuple(
Other.Var, Other.Kind, Other.Loc.SpillLocation.SpillBase,
-   Loc.SpillLocation.SpillOffset.getFixed(),
-   Loc.SpillLocation.SpillOffset.getScalable(), Other.Expr);
+   Other.Loc.SpillLocation.SpillOffset.getFixed(),
+   Other.Loc.SpillLocation.SpillOffset.getScalable(),
+   Other.Expr);
   case RegisterKind:
   case ImmediateKind:
   case EntryValueKind:



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[llvm-branch-commits] [llvm] 6a19549 - [AMDGPU] Fix failing assert with scratch ST mode

[Sebastian Neubauer via llvm-branch-commits]

Author: Sebastian Neubauer
Date: 2021-01-12T09:54:02+01:00
New Revision: 6a195491b6028185c7278718ac21bca309a6c4ea

URL: 
https://github.com/llvm/llvm-project/commit/6a195491b6028185c7278718ac21bca309a6c4ea
DIFF: 
https://github.com/llvm/llvm-project/commit/6a195491b6028185c7278718ac21bca309a6c4ea.diff

LOG: [AMDGPU] Fix failing assert with scratch ST mode

In ST mode, flat scratch instructions have neither an sgpr nor a vgpr
for the address. This lead to an assertion when inserting hard clauses.

Differential Revision: https://reviews.llvm.org/D94406

Added: 


Modified: 
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/test/CodeGen/AMDGPU/memory_clause.ll

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h 
b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 1cf205f9f5a3..36afdefd27b2 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1298,10 +1298,11 @@ class TargetInstrInfo : public MCInstrInfo {
bool &OffsetIsScalable,
const TargetRegisterInfo *TRI) const;
 
-  /// Get the base operands and byte offset of an instruction that reads/writes
-  /// memory.
+  /// Get zero or more base operands and the byte offset of an instruction that
+  /// reads/writes memory. Note that there may be zero base operands if the
+  /// instruction accesses a constant address.
   /// It returns false if MI does not read/write memory.
-  /// It returns false if no base operands and offset was found.
+  /// It returns false if base operands and offset could not be determined.
   /// It is not guaranteed to always recognize base operands and offsets in all
   /// cases.
   virtual bool getMemOperandsWithOffsetWidth(

diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp 
b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index eebee8e16bc3..6bf9db3f7b2c 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -387,7 +387,7 @@ bool SIInstrInfo::getMemOperandsWithOffsetWidth(
   }
 
   if (isFLAT(LdSt)) {
-// Instructions have either vaddr or saddr or both.
+// Instructions have either vaddr or saddr or both or none.
 BaseOp = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);
 if (BaseOp)
   BaseOps.push_back(BaseOp);
@@ -443,11 +443,15 @@ bool SIInstrInfo::shouldClusterMemOps(ArrayRef BaseOps1,
   unsigned NumBytes) const {
   // If the mem ops (to be clustered) do not have the same base ptr, then they
   // should not be clustered
-  assert(!BaseOps1.empty() && !BaseOps2.empty());
-  const MachineInstr &FirstLdSt = *BaseOps1.front()->getParent();
-  const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent();
-  if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2))
+  if (!BaseOps1.empty() && !BaseOps2.empty()) {
+const MachineInstr &FirstLdSt = *BaseOps1.front()->getParent();
+const MachineInstr &SecondLdSt = *BaseOps2.front()->getParent();
+if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOps1, SecondLdSt, BaseOps2))
+  return false;
+  } else if (!BaseOps1.empty() || !BaseOps2.empty()) {
+// If only one base op is empty, they do not have the same base ptr
 return false;
+  }
 
   // In order to avoid regester pressure, on an average, the number of DWORDS
   // loaded together by all clustered mem ops should not exceed 8. This is an

diff  --git a/llvm/test/CodeGen/AMDGPU/memory_clause.ll 
b/llvm/test/CodeGen/AMDGPU/memory_clause.ll
index 2c5931ef57b6..154d8e3320ea 100644
--- a/llvm/test/CodeGen/AMDGPU/memory_clause.ll
+++ b/llvm/test/CodeGen/AMDGPU/memory_clause.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs < %s | FileCheck 
-check-prefix=GCN %s
+; RUN: llc -march=amdgcn -mcpu=gfx1030 -amdgpu-enable-flat-scratch 
-verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SCRATCH %s
 
 define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias 
nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
 ; GCN-LABEL: vector_clause:
@@ -21,6 +22,31 @@ define amdgpu_kernel void @vector_clause(<4 x i32> 
addrspace(1)* noalias nocaptu
 ; GCN-NEXT:s_waitcnt vmcnt(3)
 ; GCN-NEXT:global_store_dwordx4 v16, v[12:15], s[4:5] offset:48
 ; GCN-NEXT:s_endpgm
+;
+; GCN-SCRATCH-LABEL: vector_clause:
+; GCN-SCRATCH:   ; %bb.0: ; %bb
+; GCN-SCRATCH-NEXT:s_add_u32 s2, s2, s5
+; GCN-SCRATCH-NEXT:s_addc_u32 s3, s3, 0
+; GCN-SCRATCH-NEXT:s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s2
+; GCN-SCRATCH-NEXT:s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s3
+; GCN-SCRATCH-NEXT:s_load_dwordx2 s[2:3], s[0:1], 0x24
+; GCN-SCRATCH-NEXT:v_lshlrev_b32_e32 v16, 4, v0
+; GCN-SCRATCH-NEXT:s

[llvm-branch-commits] [clang] 7ab8030 - [clang][cli] Remove -f[no-]trapping-math from -cc1 command line

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2021-01-12T10:00:23+01:00
New Revision: 7ab803095ae58445996dc4694acb216e3a32ee64

URL: 
https://github.com/llvm/llvm-project/commit/7ab803095ae58445996dc4694acb216e3a32ee64
DIFF: 
https://github.com/llvm/llvm-project/commit/7ab803095ae58445996dc4694acb216e3a32ee64.diff

LOG: [clang][cli] Remove -f[no-]trapping-math from -cc1 command line

This patch removes the -f[no-]trapping-math flags from the -cc1 command line. 
These flags are ignored in the command line parser and their semantics is fully 
handled by -ffp-exception-mode.

This patch does not remove -f[no-]trapping-math from the driver command line. 
The driver flags are being used and do affect compilation.

Reviewed By: dexonsmith, SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D93395

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Frontend/CompilerInvocation.cpp
clang/test/CodeGen/fpconstrained.c
clang/test/CodeGen/fpconstrained.cpp
clang/test/CodeGen/noexceptionsfpmath.c
clang/test/CodeGenCUDA/propagate-metadata.cu
clang/test/Driver/fast-math.c
clang/test/Driver/fp-model.c
clang/test/Parser/fp-floatcontrol-syntax.cpp

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index b18c89931cee..35643701f97e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1600,8 +1600,8 @@ def frounding_math : Flag<["-"], "frounding-math">, 
Group, Flags<[CC1Op
   MarshallingInfoFlag<"LangOpts->FPRoundingMode", 
"llvm::RoundingMode::NearestTiesToEven">,
   Normalizer<"makeFlagToValueNormalizer(llvm::RoundingMode::Dynamic)">;
 def fno_rounding_math : Flag<["-"], "fno-rounding-math">, Group, 
Flags<[CC1Option]>;
-def ftrapping_math : Flag<["-"], "ftrapping-math">, Group, 
Flags<[CC1Option]>;
-def fno_trapping_math : Flag<["-"], "fno-trapping-math">, Group, 
Flags<[CC1Option]>;
+def ftrapping_math : Flag<["-"], "ftrapping-math">, Group;
+def fno_trapping_math : Flag<["-"], "fno-trapping-math">, Group;
 def ffp_contract : Joined<["-"], "ffp-contract=">, Group,
   Flags<[CC1Option]>, HelpText<"Form fused FP ops (e.g. FMAs):"
   " fast (fuses across statements disregarding pragmas)"

diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index be4fe7f8eddd..4a20936ddda1 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -2833,9 +2833,7 @@ static void RenderFloatingPointOptions(const ToolChain 
&TC, const Driver &D,
   if (TrappingMath) {
 // FP Exception Behavior is also set to strict
 assert(FPExceptionBehavior.equals("strict"));
-CmdArgs.push_back("-ftrapping-math");
-  } else if (TrappingMathPresent)
-CmdArgs.push_back("-fno-trapping-math");
+  }
 
   // The default is IEEE.
   if (DenormalFPMath != llvm::DenormalMode::getIEEE()) {

diff  --git a/clang/lib/Frontend/CompilerInvocation.cpp 
b/clang/lib/Frontend/CompilerInvocation.cpp
index 07906f4a36ef..cc3b038a7746 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -2684,14 +2684,6 @@ static void ParseLangArgs(LangOptions &Opts, ArgList 
&Args, InputKind IK,
   Diags.Report(diag::err_drv_invalid_value) << A->getAsString(Args) << Val;
   }
 
-  if (Args.hasArg(OPT_ftrapping_math)) {
-Opts.setFPExceptionMode(LangOptions::FPE_Strict);
-  }
-
-  if (Args.hasArg(OPT_fno_trapping_math)) {
-Opts.setFPExceptionMode(LangOptions::FPE_Ignore);
-  }
-
   LangOptions::FPExceptionModeKind FPEB = LangOptions::FPE_Ignore;
   if (Arg *A = Args.getLastArg(OPT_ffp_exception_behavior_EQ)) {
 StringRef Val = A->getValue();

diff  --git a/clang/test/CodeGen/fpconstrained.c 
b/clang/test/CodeGen/fpconstrained.c
index 0307ebbd357f..643c0120eac5 100644
--- a/clang/test/CodeGen/fpconstrained.c
+++ b/clang/test/CodeGen/fpconstrained.c
@@ -1,11 +1,11 @@
-// RUN: %clang_cc1 -ftrapping-math -frounding-math 
-ffp-exception-behavior=strict -fexperimental-strict-floating-point -emit-llvm 
-o - %s | FileCheck %s -check-prefix=FPMODELSTRICT
+// RUN: %clang_cc1 -frounding-math -ffp-exception-behavior=strict 
-fexperimental-strict-floating-point -emit-llvm -o - %s | FileCheck %s 
-check-prefix=FPMODELSTRICT
 // RUN: %clang_cc1 -ffp-contract=fast -emit-llvm -o - %s | FileCheck %s 
-check-prefix=PRECISE
 // RUN: %clang_cc1 -ffast-math -ffp-contract=fast -emit-llvm -o - %s | 
FileCheck %s -check-prefix=FAST
 // RUN: %clang_cc1 -ffast-math -emit-llvm -o - %s | FileCheck %s 
-check-prefix=FASTNOCONTRACT
 // RUN: %clang_cc1 -ffast-math -ffp-contract=fast 
-ffp-exception-behavior=ignore -emit-llvm -o - %s | FileCheck %s 
-check-prefix=FAST
 // RUN: %clang_cc1 -ffast-math -ffp-contract=fast 
-ffp-exception-behavior=strict -fexperimental-strict-floating-point -emit-llvm 

[llvm-branch-commits] [llvm] e8287cb - [Test] Add failing test for PR48725

[Max Kazantsev via llvm-branch-commits]

Author: Max Kazantsev
Date: 2021-01-12T16:06:34+07:00
New Revision: e8287cb2b2923af9da72fd953e2ec5495c33861a

URL: 
https://github.com/llvm/llvm-project/commit/e8287cb2b2923af9da72fd953e2ec5495c33861a
DIFF: 
https://github.com/llvm/llvm-project/commit/e8287cb2b2923af9da72fd953e2ec5495c33861a.diff

LOG: [Test] Add failing test for PR48725

Added: 
llvm/test/Transforms/LoopStrengthReduce/pr48725.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/LoopStrengthReduce/pr48725.ll 
b/llvm/test/Transforms/LoopStrengthReduce/pr48725.ll
new file mode 100644
index ..ef25b92ffd1c
--- /dev/null
+++ b/llvm/test/Transforms/LoopStrengthReduce/pr48725.ll
@@ -0,0 +1,102 @@
+; RUN: opt -S -loop-reduce < %s | FileCheck %s
+; XFAIL: *
+
+source_filename = "./simple.ll"
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
+target triple = "x86_64-unknown-linux-gnu"
+
+; CHECK-LABEL: test
+define void @test() {
+bb:
+  br label %bb1
+
+bb1:  ; preds = %bb1, %bb
+  %tmp = phi i32 [ undef, %bb ], [ %tmp87, %bb1 ]
+  %tmp2 = phi i32 [ undef, %bb ], [ %tmp86, %bb1 ]
+  %tmp3 = mul i32 %tmp, undef
+  %tmp4 = xor i32 %tmp3, -1
+  %tmp5 = add i32 %tmp, %tmp4
+  %tmp6 = add i32 %tmp2, -1
+  %tmp7 = add i32 %tmp5, %tmp6
+  %tmp8 = mul i32 %tmp7, %tmp3
+  %tmp9 = xor i32 %tmp8, -1
+  %tmp10 = add i32 %tmp7, %tmp9
+  %tmp11 = add i32 %tmp10, undef
+  %tmp12 = mul i32 %tmp11, %tmp8
+  %tmp13 = xor i32 %tmp12, -1
+  %tmp14 = add i32 %tmp11, %tmp13
+  %tmp15 = add i32 %tmp14, undef
+  %tmp16 = mul i32 %tmp15, %tmp12
+  %tmp17 = add i32 %tmp15, undef
+  %tmp18 = add i32 %tmp17, undef
+  %tmp19 = mul i32 %tmp18, %tmp16
+  %tmp20 = xor i32 %tmp19, -1
+  %tmp21 = add i32 %tmp18, %tmp20
+  %tmp22 = add i32 %tmp21, undef
+  %tmp23 = mul i32 %tmp22, %tmp19
+  %tmp24 = xor i32 %tmp23, -1
+  %tmp25 = add i32 %tmp22, %tmp24
+  %tmp26 = add i32 %tmp25, undef
+  %tmp27 = mul i32 %tmp26, %tmp23
+  %tmp28 = xor i32 %tmp27, -1
+  %tmp29 = add i32 %tmp26, %tmp28
+  %tmp30 = add i32 %tmp29, undef
+  %tmp31 = mul i32 %tmp30, %tmp27
+  %tmp32 = xor i32 %tmp31, -1
+  %tmp33 = add i32 %tmp30, %tmp32
+  %tmp34 = add i32 %tmp33, undef
+  %tmp35 = mul i32 %tmp34, %tmp31
+  %tmp36 = xor i32 %tmp35, -1
+  %tmp37 = add i32 %tmp34, %tmp36
+  %tmp38 = add i32 %tmp2, -9
+  %tmp39 = add i32 %tmp37, %tmp38
+  %tmp40 = mul i32 %tmp39, %tmp35
+  %tmp41 = xor i32 %tmp40, -1
+  %tmp42 = add i32 %tmp39, %tmp41
+  %tmp43 = add i32 %tmp42, undef
+  %tmp44 = mul i32 %tmp43, %tmp40
+  %tmp45 = xor i32 %tmp44, -1
+  %tmp46 = add i32 %tmp43, %tmp45
+  %tmp47 = add i32 %tmp46, undef
+  %tmp48 = mul i32 %tmp47, %tmp44
+  %tmp49 = xor i32 %tmp48, -1
+  %tmp50 = add i32 %tmp47, %tmp49
+  %tmp51 = add i32 %tmp50, undef
+  %tmp52 = mul i32 %tmp51, %tmp48
+  %tmp53 = xor i32 %tmp52, -1
+  %tmp54 = add i32 %tmp51, %tmp53
+  %tmp55 = add i32 %tmp54, undef
+  %tmp56 = mul i32 %tmp55, %tmp52
+  %tmp57 = xor i32 %tmp56, -1
+  %tmp58 = add i32 %tmp55, %tmp57
+  %tmp59 = add i32 %tmp2, -14
+  %tmp60 = add i32 %tmp58, %tmp59
+  %tmp61 = mul i32 %tmp60, %tmp56
+  %tmp62 = xor i32 %tmp61, -1
+  %tmp63 = add i32 %tmp60, %tmp62
+  %tmp64 = add i32 %tmp63, undef
+  %tmp65 = mul i32 %tmp64, %tmp61
+  %tmp66 = xor i32 %tmp65, -1
+  %tmp67 = add i32 %tmp64, %tmp66
+  %tmp68 = add i32 %tmp67, undef
+  %tmp69 = mul i32 %tmp68, %tmp65
+  %tmp70 = xor i32 %tmp69, -1
+  %tmp71 = add i32 %tmp68, %tmp70
+  %tmp72 = add i32 %tmp71, undef
+  %tmp73 = mul i32 %tmp72, %tmp69
+  %tmp74 = xor i32 %tmp73, -1
+  %tmp75 = add i32 %tmp72, %tmp74
+  %tmp76 = add i32 %tmp75, undef
+  %tmp77 = mul i32 %tmp76, %tmp73
+  %tmp78 = xor i32 %tmp77, -1
+  %tmp79 = add i32 %tmp76, %tmp78
+  %tmp80 = add i32 %tmp79, undef
+  %tmp81 = mul i32 %tmp80, %tmp77
+  %tmp82 = xor i32 %tmp81, -1
+  %tmp83 = add i32 %tmp80, %tmp82
+  %tmp84 = add i32 %tmp83, undef
+  %tmp85 = add i32 %tmp84, undef
+  %tmp86 = add i32 %tmp2, -21
+  %tmp87 = add i32 %tmp85, %tmp86
+  br label %bb1
+}



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[llvm-branch-commits] [llvm] c93b955 - [WebAssembly] Remove more unnecessary brs in CFGStackify

[Heejin Ahn via llvm-branch-commits]

Author: Heejin Ahn
Date: 2021-01-12T01:18:10-08:00
New Revision: c93b95593907c28cbcfde3d8266801587e110b42

URL: 
https://github.com/llvm/llvm-project/commit/c93b95593907c28cbcfde3d8266801587e110b42
DIFF: 
https://github.com/llvm/llvm-project/commit/c93b95593907c28cbcfde3d8266801587e110b42.diff

LOG: [WebAssembly] Remove more unnecessary brs in CFGStackify

After placing markers, we removed some unnecessary branches, but it only
handled the simplest case. This makes more unnecessary branches to be
removed.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D94047

Added: 


Modified: 
llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll

Removed: 




diff  --git a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp 
b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
index 9a6d8df8bdca6..a8e0c3efea0e2 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
@@ -637,11 +637,32 @@ void 
WebAssemblyCFGStackify::removeUnnecessaryInstrs(MachineFunction &MF) {
   //   try
   // ...
   // br bb2  <- Not necessary
-  // bb1:
+  // bb1 (ehpad):
   //   catch
   // ...
-  // bb2:
+  // bb2:<- Continuation BB
   //   end
+  //
+  // A more involved case: When the BB where 'end' is located is an another EH
+  // pad, the Cont (= continuation) BB is that EH pad's 'end' BB. For example,
+  // bb0:
+  //   try
+  // try
+  //   ...
+  //   br bb3  <- Not necessary
+  // bb1 (ehpad):
+  // catch
+  // bb2 (ehpad):
+  // end
+  //   catch
+  // ...
+  // bb3:<- Continuation BB
+  //   end
+  //
+  // When the EH pad at hand is bb1, its matching end_try is in bb2. But it is
+  // another EH pad, so bb0's continuation BB becomes bb3. So 'br bb3' in the
+  // code can be deleted. This is why we run 'while' until 'Cont' is not an EH
+  // pad.
   for (auto &MBB : MF) {
 if (!MBB.isEHPad())
   continue;
@@ -649,7 +670,14 @@ void 
WebAssemblyCFGStackify::removeUnnecessaryInstrs(MachineFunction &MF) {
 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
 SmallVector Cond;
 MachineBasicBlock *EHPadLayoutPred = MBB.getPrevNode();
-MachineBasicBlock *Cont = BeginToEnd[EHPadToTry[&MBB]]->getParent();
+
+MachineBasicBlock *Cont = &MBB;
+while (Cont->isEHPad()) {
+  MachineInstr *Try = EHPadToTry[Cont];
+  MachineInstr *EndTry = BeginToEnd[Try];
+  Cont = EndTry->getParent();
+}
+
 bool Analyzable = !TII.analyzeBranch(*EHPadLayoutPred, TBB, FBB, Cond);
 // This condition means either
 // 1. This BB ends with a single unconditional branch whose destinaion is

diff  --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll 
b/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
index 3079d9e15b82f..209aaea2aaf69 100644
--- a/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
+++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
@@ -935,7 +935,18 @@ last: ; preds 
= %bb0
 }
 
 ; Tests if CFGStackify's removeUnnecessaryInstrs() removes unnecessary branches
-; correctly.
+; correctly. The code is in the form below, where 'br' is unnecessary because
+; after running the 'try' body the control flow will fall through to bb2 
anyway.
+
+; bb0:
+;   try
+; ...
+; br bb2  <- Not necessary
+; bb1 (ehpad):
+;   catch
+; ...
+; bb2:<- Continuation BB
+;   end
 ; CHECK-LABEL: test17
 define void @test17(i32 %n) personality i8* bitcast (i32 (...)* 
@__gxx_wasm_personality_v0 to i8*) {
 entry:
@@ -974,17 +985,91 @@ try.cont: ; preds 
= %catch.start, %for.e
   ret void
 }
 
+; void foo();
+; void test18() {
+;   try {
+; foo();
+; try {
+;   foo();
+; } catch (...) {
+; }
+;   } catch (...) {
+;   }
+; }
+;
+; This tests whether the 'br' can be removed in code in the form as follows.
+; Here 'br' is inside an inner try, whose 'end' is in another EH pad. In this
+; case, after running an inner try body, the control flow should fall through 
to
+; bb3, so the 'br' in the code is unnecessary.
+
+; bb0:
+;   try
+; try
+;   ...
+;   br bb3  <- Not necessary
+; bb1:
+; catch
+; bb2:
+; end_try
+;   catch
+; ...
+; bb3:<- Continuation BB
+;   end
+;
+; CHECK-LABEL: test18
+define void @test18() personality i8* bitcast (i32 (...)* 
@__gxx_wasm_personality_v0 to i8*) {
+; CHECK: call foo
+entry:
+  invoke void @foo()
+  to label %invoke.cont unwind label %catch.dispatch3
+
+; CHECK: call foo
+; CHECK-NOT: br
+invoke.cont:  ; preds = %entry
+  invoke void @foo()
+  to label %try.cont8 unwind label %catch.dispatch
+
+catch.dispatch:   ; preds

[llvm-branch-commits] [llvm] 9ec72cf - [llvm-readef/obj] - Change the design structure of ELF dumper. NFCI.

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2021-01-12T12:36:17+03:00
New Revision: 9ec72cfc61ad5d87bb9e719b8b01f56e4da88a5b

URL: 
https://github.com/llvm/llvm-project/commit/9ec72cfc61ad5d87bb9e719b8b01f56e4da88a5b
DIFF: 
https://github.com/llvm/llvm-project/commit/9ec72cfc61ad5d87bb9e719b8b01f56e4da88a5b.diff

LOG: [llvm-readef/obj] - Change the design structure of ELF dumper. NFCI.

This is a refactoring for design of stuff in `ELFDumper.cpp`.
The current design of ELF dumper is far from ideal.

Currently most overridden functions (inherited from `ObjDumper`) in `ELFDumper` 
just forward to
the functions of `ELFDumperStyle` (which can be either `GNUStyle` or 
`LLVMStyle`).
A concrete implementation may be in any of 
`ELFDumper`/`DumperStyle`/`GNUStyle`/`LLVMStyle`.

This patch reorganizes the classes by introducing 
`GNUStyleELFDumper`/`LLVMStyleELFDumper`
which inherit from `ELFDumper`. The implementations are moved:

`DumperStyle` -> `ELFDumper`
`GNUStyle` -> `GNUStyleELFDumper`
`LLVMStyle` -> `LLVMStyleELFDumper`

With that we can avoid having a lot of redirection calls and helper methods.
The number of code lines changes from 7142 to 6922 (reduced by ~3%) and the
code overall looks cleaner.

Differential revision: https://reviews.llvm.org/D93900

Added: 


Modified: 
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/tools/llvm-readobj/ELFDumper.cpp 
b/llvm/tools/llvm-readobj/ELFDumper.cpp
index ca8f84728496..a09ee6d630d7 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -82,8 +82,6 @@ using namespace ELF;
 
 namespace {
 
-template  class DumpStyle;
-
 template  struct RelSymbol {
   RelSymbol(const typename ELFT::Sym *S, StringRef N)
   : Sym(S), Name(N.str()) {}
@@ -232,50 +230,120 @@ template  class Relocation {
   Optional Addend;
 };
 
+template  class MipsGOTParser;
+
 template  class ELFDumper : public ObjDumper {
+  LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
+
 public:
   ELFDumper(const object::ELFObjectFile &ObjF, ScopedPrinter &Writer);
 
-  void printFileHeaders() override;
-  void printSectionHeaders() override;
-  void printRelocations() override;
-  void printDependentLibs() override;
-  void printDynamicRelocations() override;
-  void printSymbols(bool PrintSymbols, bool PrintDynamicSymbols) override;
-  void printHashSymbols() override;
-  void printSectionDetails() override;
   void printUnwindInfo() override;
-
-  void printDynamicTable() override;
   void printNeededLibraries() override;
-  void printProgramHeaders(bool PrintProgramHeaders,
-   cl::boolOrDefault PrintSectionMapping) override;
   void printHashTable() override;
   void printGnuHashTable() override;
   void printLoadName() override;
   void printVersionInfo() override;
-  void printGroupSections() override;
-
   void printArchSpecificInfo() override;
-
   void printStackMap() const override;
 
-  void printHashHistograms() override;
+  const object::ELFObjectFile &getElfObject() const { return ObjF; };
 
-  void printCGProfile() override;
-  void printAddrsig() override;
+  std::string describe(const Elf_Shdr &Sec) const;
 
-  void printNotes() override;
+  unsigned getHashTableEntSize() const {
+// EM_S390 and ELF::EM_ALPHA platforms use 8-bytes entries in SHT_HASH
+// sections. This violates the ELF specification.
+if (Obj.getHeader().e_machine == ELF::EM_S390 ||
+Obj.getHeader().e_machine == ELF::EM_ALPHA)
+  return 8;
+return 4;
+  }
 
-  void printELFLinkerOptions() override;
-  void printStackSizes() override;
+  Elf_Dyn_Range dynamic_table() const {
+// A valid .dynamic section contains an array of entries terminated
+// with a DT_NULL entry. However, sometimes the section content may
+// continue past the DT_NULL entry, so to dump the section correctly,
+// we first find the end of the entries by iterating over them.
+Elf_Dyn_Range Table = DynamicTable.getAsArrayRef();
 
-  const object::ELFObjectFile &getElfObject() const { return ObjF; };
+size_t Size = 0;
+while (Size < Table.size())
+  if (Table[Size++].getTag() == DT_NULL)
+break;
 
-private:
-  std::unique_ptr> ELFDumperStyle;
+return Table.slice(0, Size);
+  }
 
-  LLVM_ELF_IMPORT_TYPES_ELFT(ELFT)
+  Elf_Sym_Range dynamic_symbols() const {
+if (!DynSymRegion)
+  return Elf_Sym_Range();
+return DynSymRegion->getAsArrayRef();
+  }
+
+  const Elf_Shdr *findSectionByName(StringRef Name) const;
+
+  StringRef getDynamicStringTable() const { return DynamicStringTable; }
+
+protected:
+  virtual void printVersionSymbolSection(const Elf_Shdr *Sec) = 0;
+  virtual void printVersionDefinitionSection(const Elf_Shdr *Sec) = 0;
+  virtual void printVersionDependencySection(const Elf_Shdr *Sec) = 0;
+
+  void
+  printDependentLibsHelper(function_ref OnSectionStart,
+   function_ref OnLibEntry);

[llvm-branch-commits] [llvm] 1e11402 - [llvm-readobj] - Add 'override' to fix build bots.

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2021-01-12T13:01:15+03:00
New Revision: 1e11402aa8e25d88c095a1c70fc87d2d9775186b

URL: 
https://github.com/llvm/llvm-project/commit/1e11402aa8e25d88c095a1c70fc87d2d9775186b
DIFF: 
https://github.com/llvm/llvm-project/commit/1e11402aa8e25d88c095a1c70fc87d2d9775186b.diff

LOG: [llvm-readobj] - Add 'override' to fix build bots.

This should fix bots after landing D93900.

An example of error is:

/home/worker/2.0.1/lldb-x86_64-debian/llvm-project/llvm/tools/llvm-readobj/ELFDumper.cpp:883:8:
 warning: 'printSectionMapping' overrides a member function but is not marked 
'override' [-Winconsistent-missing-override]
  void printSectionMapping() {}

Added: 


Modified: 
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/tools/llvm-readobj/ELFDumper.cpp 
b/llvm/tools/llvm-readobj/ELFDumper.cpp
index a09ee6d630d7..44608b8c9a06 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -831,8 +831,8 @@ template  class GNUELFDumper : public 
ELFDumper {
 
   std::string getSymbolSectionNdx(const Elf_Sym &Symbol,
   unsigned SymIndex) const;
-  void printProgramHeaders();
-  void printSectionMapping();
+  void printProgramHeaders() override;
+  void printSectionMapping() override;
   void printGNUVersionSectionProlog(const typename ELFT::Shdr &Sec,
 const Twine &Label, unsigned EntriesNum);
 
@@ -879,8 +879,8 @@ template  class LLVMELFDumper : public 
ELFDumper {
   void printSymbol(const Elf_Sym &Symbol, unsigned SymIndex,
Optional StrTable, bool IsDynamic,
bool /*NonVisibilityBitsUsed*/) const override;
-  void printProgramHeaders();
-  void printSectionMapping() {}
+  void printProgramHeaders() override;
+  void printSectionMapping() override {}
   void printStackSizeEntry(uint64_t Size, StringRef FuncName) override;
 
   void printMipsGOT(const MipsGOTParser &Parser) override;



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[llvm-branch-commits] [llvm] cc91efd - [llvm-readobj] - An attempt to fix BB.

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2021-01-12T13:09:49+03:00
New Revision: cc91efdabee05f749cb42e45aef1b45431844ade

URL: 
https://github.com/llvm/llvm-project/commit/cc91efdabee05f749cb42e45aef1b45431844ade
DIFF: 
https://github.com/llvm/llvm-project/commit/cc91efdabee05f749cb42e45aef1b45431844ade.diff

LOG: [llvm-readobj] - An attempt to fix BB.

This adds the `template` keyword for 'getAsArrayRef' calls.

An example of error:
/b/1/openmp-gcc-x86_64-linux-debian/llvm.src/llvm/tools/llvm-readobj/ELFDumper.cpp:4491:50:
 error: use 'template' keyword to treat 'getAsArrayRef' as a dependent template 
name
for (const Elf_Rel &Rel : this->DynRelRegion.getAsArrayRef())

Added: 


Modified: 
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/tools/llvm-readobj/ELFDumper.cpp 
b/llvm/tools/llvm-readobj/ELFDumper.cpp
index 44608b8c9a06..d18e1d416278 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -265,7 +265,7 @@ template  class ELFDumper : public ObjDumper 
{
 // with a DT_NULL entry. However, sometimes the section content may
 // continue past the DT_NULL entry, so to dump the section correctly,
 // we first find the end of the entries by iterating over them.
-Elf_Dyn_Range Table = DynamicTable.getAsArrayRef();
+Elf_Dyn_Range Table = DynamicTable.template getAsArrayRef();
 
 size_t Size = 0;
 while (Size < Table.size())
@@ -278,7 +278,7 @@ template  class ELFDumper : public ObjDumper 
{
   Elf_Sym_Range dynamic_symbols() const {
 if (!DynSymRegion)
   return Elf_Sym_Range();
-return DynSymRegion->getAsArrayRef();
+return DynSymRegion->template getAsArrayRef();
   }
 
   const Elf_Shdr *findSectionByName(StringRef Name) const;
@@ -1828,7 +1828,7 @@ void ELFDumper::loadDynamicTable() {
   sizeof(Elf_Dyn)));
 FromPhdr.SizePrintName = "PT_DYNAMIC size";
 FromPhdr.EntSizePrintName = "";
-IsPhdrTableValid = !FromPhdr.getAsArrayRef().empty();
+IsPhdrTableValid = !FromPhdr.template getAsArrayRef().empty();
   }
 
   // Locate the dynamic table described in a section header.
@@ -1844,7 +1844,7 @@ void ELFDumper::loadDynamicTable() {
   FromSec = *RegOrErr;
   FromSec.Context = describe(*DynamicSec);
   FromSec.EntSizePrintName = "";
-  IsSecTableValid = !FromSec.getAsArrayRef().empty();
+  IsSecTableValid = !FromSec.template getAsArrayRef().empty();
 } else {
   reportUniqueWarning("unable to read the dynamic table from " +
   describe(*DynamicSec) + ": " +
@@ -2584,7 +2584,7 @@ getGnuHashTableChains(Optional 
DynSymRegion,
 return createError("no dynamic symbol table found");
 
   ArrayRef DynSymTable =
-  DynSymRegion->getAsArrayRef();
+  DynSymRegion->template getAsArrayRef();
   size_t NumSyms = DynSymTable.size();
   if (!NumSyms)
 return createError("the dynamic symbol table is empty");
@@ -4480,21 +4480,24 @@ void ELFDumper::printRelocationsHelper(const 
Elf_Shdr &Sec) {
 
 template  void ELFDumper::printDynamicRelocationsHelper() {
   const bool IsMips64EL = this->Obj.isMips64EL();
-  if ( this->DynRelaRegion.Size > 0) {
-printDynamicRelocHeader(ELF::SHT_RELA, "RELA",  this->DynRelaRegion);
-for (const Elf_Rela &Rela : this->DynRelaRegion.getAsArrayRef())
+  if (this->DynRelaRegion.Size > 0) {
+printDynamicRelocHeader(ELF::SHT_RELA, "RELA", this->DynRelaRegion);
+for (const Elf_Rela &Rela :
+ this->DynRelaRegion.template getAsArrayRef())
   printDynamicReloc(Relocation(Rela, IsMips64EL));
   }
 
   if (this->DynRelRegion.Size > 0) {
 printDynamicRelocHeader(ELF::SHT_REL, "REL", this->DynRelRegion);
-for (const Elf_Rel &Rel : this->DynRelRegion.getAsArrayRef())
+for (const Elf_Rel &Rel :
+ this->DynRelRegion.template getAsArrayRef())
   printDynamicReloc(Relocation(Rel, IsMips64EL));
   }
 
   if (this->DynRelrRegion.Size > 0) {
 printDynamicRelocHeader(ELF::SHT_REL, "RELR", this->DynRelrRegion);
-Elf_Relr_Range Relrs = this->DynRelrRegion.getAsArrayRef();
+Elf_Relr_Range Relrs =
+this->DynRelrRegion.template getAsArrayRef();
 for (const Elf_Rel &Rel : Obj.decode_relrs(Relrs))
   printDynamicReloc(Relocation(Rel, IsMips64EL));
   }
@@ -4503,11 +4506,12 @@ template  void 
ELFDumper::printDynamicRelocationsHelper() {
 if (this->DynPLTRelRegion.EntSize == sizeof(Elf_Rela)) {
   printDynamicRelocHeader(ELF::SHT_RELA, "PLT", this->DynPLTRelRegion);
   for (const Elf_Rela &Rela :
-   this->DynPLTRelRegion.getAsArrayRef())
+   this->DynPLTRelRegion.template getAsArrayRef())
 printDynamicReloc(Relocation(Rela, IsMips64EL));
 } else {
   printDynamicRelocHeader(ELF::SHT_REL, "PLT", this->DynPLTRelRegion);
-  for (const Elf_Rel &Rel : this->DynPLTRelRegion.getAsArrayRef())
+  for 

[llvm-branch-commits] [mlir] 4744478 - [mlir][openmp][NFCI] Rename `continuationIP` to `continuationBlock`

[Sourabh Singh Tomar via llvm-branch-commits]

Author: Sourabh Singh Tomar
Date: 2021-01-12T15:45:36+05:30
New Revision: 4744478b99f1a99b2cdf7e4070a93086e5ae4800

URL: 
https://github.com/llvm/llvm-project/commit/4744478b99f1a99b2cdf7e4070a93086e5ae4800
DIFF: 
https://github.com/llvm/llvm-project/commit/4744478b99f1a99b2cdf7e4070a93086e5ae4800.diff

LOG: [mlir][openmp][NFCI] Rename `continuationIP` to `continuationBlock`

Argument is a `Block` not a `point`.

Added: 


Modified: 
mlir/lib/Target/LLVMIR/ModuleTranslation.cpp

Removed: 




diff  --git a/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp 
b/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
index 70e35c7c7997..87ec35cc1c42 100644
--- a/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
@@ -412,11 +412,11 @@ ModuleTranslation::convertOmpParallel(Operation &opInst,
   LogicalResult bodyGenStatus = success();
 
   auto bodyGenCB = [&](InsertPointTy allocaIP, InsertPointTy codeGenIP,
-   llvm::BasicBlock &continuationIP) {
+   llvm::BasicBlock &continuationBlock) {
 // ParallelOp has only one region associated with it.
 auto ®ion = cast(opInst).getRegion();
 convertOmpOpRegions(region, "omp.par.region", valueMapping, blockMapping,
-*codeGenIP.getBlock(), continuationIP, builder,
+*codeGenIP.getBlock(), continuationBlock, builder,
 bodyGenStatus);
   };
 
@@ -517,11 +517,11 @@ LogicalResult 
ModuleTranslation::convertOmpMaster(Operation &opInst,
   LogicalResult bodyGenStatus = success();
 
   auto bodyGenCB = [&](InsertPointTy allocaIP, InsertPointTy codeGenIP,
-   llvm::BasicBlock &continuationIP) {
+   llvm::BasicBlock &continuationBlock) {
 // MasterOp has only one region associated with it.
 auto ®ion = cast(opInst).getRegion();
 convertOmpOpRegions(region, "omp.master.region", valueMapping, 
blockMapping,
-*codeGenIP.getBlock(), continuationIP, builder,
+*codeGenIP.getBlock(), continuationBlock, builder,
 bodyGenStatus);
   };
 



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[llvm-branch-commits] [llvm] 891b487 - [llvm-readobj] - One more attempt to fix BB.

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2021-01-12T13:17:59+03:00
New Revision: 891b4873c129e27755e90a9b8954b9f0d0e7c5a4

URL: 
https://github.com/llvm/llvm-project/commit/891b4873c129e27755e90a9b8954b9f0d0e7c5a4
DIFF: 
https://github.com/llvm/llvm-project/commit/891b4873c129e27755e90a9b8954b9f0d0e7c5a4.diff

LOG: [llvm-readobj] - One more attempt to fix BB.

Add `this->` for `W`, which is the member of `ObjDumper`

An example of error:
readobj/ELFDumper.cpp:738:13: error: use of undeclared identifier 'W'
assert(&W.getOStream() == &llvm::fouts());

Added: 


Modified: 
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/tools/llvm-readobj/ELFDumper.cpp 
b/llvm/tools/llvm-readobj/ELFDumper.cpp
index d18e1d416278..5e27a14d0475 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -735,7 +735,7 @@ template  class GNUELFDumper : public 
ELFDumper {
   GNUELFDumper(const object::ELFObjectFile &ObjF, ScopedPrinter &Writer)
   : ELFDumper(ObjF, Writer),
 OS(static_cast(Writer.getOStream())) {
-assert(&W.getOStream() == &llvm::fouts());
+assert(&this->W.getOStream() == &llvm::fouts());
   }
 
   void printFileHeaders() override;



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[llvm-branch-commits] [clang] c1e08f0 - [clang][AST] Get rid of an alignment hack in DeclObjC.h [NFCI]

[Mikhail Maltsev via llvm-branch-commits]

Author: Mikhail Maltsev
Date: 2021-01-12T10:22:35Z
New Revision: c1e08f0073e35cf17c0a0343cf7efff914dbd66d

URL: 
https://github.com/llvm/llvm-project/commit/c1e08f0073e35cf17c0a0343cf7efff914dbd66d
DIFF: 
https://github.com/llvm/llvm-project/commit/c1e08f0073e35cf17c0a0343cf7efff914dbd66d.diff

LOG: [clang][AST] Get rid of an alignment hack in DeclObjC.h [NFCI]

This code currently uses a union object to increase the
alignment of the type ObjCTypeParamList. The original intent of this
trick was to be able to use the expression `this + 1` to access the
beginning of a tail-allocated array of `ObjCTypeParamDecl *` pointers.

The code has since been refactored and uses `llvm::TrailingObjects` to
manage the tail-allocated array. This template takes care of
alignment, so the hack is no longer necessary.

This patch removes the union so that the `SourceRange` class can be
used directly instead of being re-implemented with raw representations
of source locations.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D94224

Added: 


Modified: 
clang/include/clang/AST/DeclObjC.h
clang/lib/AST/DeclObjC.cpp

Removed: 




diff  --git a/clang/include/clang/AST/DeclObjC.h 
b/clang/include/clang/AST/DeclObjC.h
index 88cedbd91b6d..b1bce069920c 100644
--- a/clang/include/clang/AST/DeclObjC.h
+++ b/clang/include/clang/AST/DeclObjC.h
@@ -656,20 +656,8 @@ class ObjCTypeParamDecl : public TypedefNameDecl {
 /// \endcode
 class ObjCTypeParamList final
 : private llvm::TrailingObjects {
-  /// Stores the components of a SourceRange as a POD.
-  struct PODSourceRange {
-unsigned Begin;
-unsigned End;
-  };
-
-  union {
-/// Location of the left and right angle brackets.
-PODSourceRange Brackets;
-
-// Used only for alignment.
-ObjCTypeParamDecl *AlignmentHack;
-  };
-
+  /// Location of the left and right angle brackets.
+  SourceRange Brackets;
   /// The number of parameters in the list, which are tail-allocated.
   unsigned NumParams;
 
@@ -717,17 +705,9 @@ class ObjCTypeParamList final
 return *(end() - 1);
   }
 
-  SourceLocation getLAngleLoc() const {
-return SourceLocation::getFromRawEncoding(Brackets.Begin);
-  }
-
-  SourceLocation getRAngleLoc() const {
-return SourceLocation::getFromRawEncoding(Brackets.End);
-  }
-
-  SourceRange getSourceRange() const {
-return SourceRange(getLAngleLoc(), getRAngleLoc());
-  }
+  SourceLocation getLAngleLoc() const { return Brackets.getBegin(); }
+  SourceLocation getRAngleLoc() const { return Brackets.getEnd(); }
+  SourceRange getSourceRange() const { return Brackets; }
 
   /// Gather the default set of type arguments to be substituted for
   /// these type parameters when dealing with an unspecialized type.

diff  --git a/clang/lib/AST/DeclObjC.cpp b/clang/lib/AST/DeclObjC.cpp
index 961230fb54ce..5f82fcec90e3 100644
--- a/clang/lib/AST/DeclObjC.cpp
+++ b/clang/lib/AST/DeclObjC.cpp
@@ -1461,9 +1461,7 @@ SourceRange ObjCTypeParamDecl::getSourceRange() const {
 ObjCTypeParamList::ObjCTypeParamList(SourceLocation lAngleLoc,
  ArrayRef typeParams,
  SourceLocation rAngleLoc)
-: NumParams(typeParams.size()) {
-  Brackets.Begin = lAngleLoc.getRawEncoding();
-  Brackets.End = rAngleLoc.getRawEncoding();
+: Brackets(lAngleLoc, rAngleLoc), NumParams(typeParams.size()) {
   std::copy(typeParams.begin(), typeParams.end(), begin());
 }
 



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[llvm-branch-commits] [llvm] f264f9a - [SlotIndexes] Fix and simplify basic block splitting

[Jay Foad via llvm-branch-commits]

Author: Jay Foad
Date: 2021-01-12T10:50:14Z
New Revision: f264f9ad7df538357dfc8c5f318c5c8b0df3d99f

URL: 
https://github.com/llvm/llvm-project/commit/f264f9ad7df538357dfc8c5f318c5c8b0df3d99f
DIFF: 
https://github.com/llvm/llvm-project/commit/f264f9ad7df538357dfc8c5f318c5c8b0df3d99f.diff

LOG: [SlotIndexes] Fix and simplify basic block splitting

Remove the InsertionPoint argument from SlotIndexes::insertMBBInMaps
because it was confusing: what does it mean to insert a new block
between two instructions, in the middle of an existing block?

Instead, support the case that MachineBasicBlock::splitAt really needs,
where the new block contains some instructions that are already in the
maps because they have been moved there from the tail of the previous
block.

In all other use cases the new block is empty.

Based on work by Carl Ritson!

Differential Revision: https://reviews.llvm.org/D94311

Added: 


Modified: 
llvm/include/llvm/CodeGen/LiveIntervals.h
llvm/include/llvm/CodeGen/SlotIndexes.h
llvm/lib/CodeGen/MachineBasicBlock.cpp
llvm/unittests/MI/LiveIntervalTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/LiveIntervals.h 
b/llvm/include/llvm/CodeGen/LiveIntervals.h
index 1a6b59a8959e..fa08166791b0 100644
--- a/llvm/include/llvm/CodeGen/LiveIntervals.h
+++ b/llvm/include/llvm/CodeGen/LiveIntervals.h
@@ -256,9 +256,8 @@ class VirtRegMap;
   return Indexes->getMBBFromIndex(index);
 }
 
-void insertMBBInMaps(MachineBasicBlock *MBB,
- MachineInstr *InsertionPoint = nullptr) {
-  Indexes->insertMBBInMaps(MBB, InsertionPoint);
+void insertMBBInMaps(MachineBasicBlock *MBB) {
+  Indexes->insertMBBInMaps(MBB);
   assert(unsigned(MBB->getNumber()) == RegMaskBlocks.size() &&
  "Blocks must be added in order.");
   RegMaskBlocks.push_back(std::make_pair(RegMaskSlots.size(), 0));

diff  --git a/llvm/include/llvm/CodeGen/SlotIndexes.h 
b/llvm/include/llvm/CodeGen/SlotIndexes.h
index 19eab7ae5e35..b2133de93ea2 100644
--- a/llvm/include/llvm/CodeGen/SlotIndexes.h
+++ b/llvm/include/llvm/CodeGen/SlotIndexes.h
@@ -604,38 +604,27 @@ class raw_ostream;
 }
 
 /// Add the given MachineBasicBlock into the maps.
-/// If \p InsertionPoint is specified then the block will be placed
-/// before the given machine instr, otherwise it will be placed
-/// before the next block in MachineFunction insertion order.
-void insertMBBInMaps(MachineBasicBlock *mbb,
- MachineInstr *InsertionPoint = nullptr) {
-  MachineFunction::iterator nextMBB =
-std::next(MachineFunction::iterator(mbb));
-
-  IndexListEntry *startEntry = nullptr;
-  IndexListEntry *endEntry = nullptr;
-  IndexList::iterator newItr;
-  if (InsertionPoint) {
-startEntry = createEntry(nullptr, 0);
-endEntry = getInstructionIndex(*InsertionPoint).listEntry();
-newItr = indexList.insert(endEntry->getIterator(), startEntry);
-  } else if (nextMBB == mbb->getParent()->end()) {
-startEntry = &indexList.back();
-endEntry = createEntry(nullptr, 0);
-newItr = indexList.insertAfter(startEntry->getIterator(), endEntry);
-  } else {
-startEntry = createEntry(nullptr, 0);
-endEntry = getMBBStartIdx(&*nextMBB).listEntry();
-newItr = indexList.insert(endEntry->getIterator(), startEntry);
-  }
+/// If it contains any instructions then they must already be in the maps.
+/// This is used after a block has been split by moving some suffix of its
+/// instructions into a newly created block.
+void insertMBBInMaps(MachineBasicBlock *mbb) {
+  assert(mbb != &mbb->getParent()->front() &&
+ "Can't insert a new block at the beginning of a function.");
+  auto prevMBB = std::prev(MachineFunction::iterator(mbb));
+
+  // Create a new entry to be used for the start of mbb and the end of
+  // prevMBB.
+  IndexListEntry *startEntry = createEntry(nullptr, 0);
+  IndexListEntry *endEntry = getMBBEndIdx(&*prevMBB).listEntry();
+  IndexListEntry *insEntry =
+  mbb->empty() ? endEntry
+   : getInstructionIndex(mbb->front()).listEntry();
+  IndexList::iterator newItr =
+  indexList.insert(insEntry->getIterator(), startEntry);
 
   SlotIndex startIdx(startEntry, SlotIndex::Slot_Block);
   SlotIndex endIdx(endEntry, SlotIndex::Slot_Block);
 
-  MachineFunction::iterator prevMBB(mbb);
-  assert(prevMBB != mbb->getParent()->end() &&
- "Can't insert a new block at the beginning of a function.");
-  --prevMBB;
   MBBRanges[prevMBB->getNumber()].second = startIdx;
 
   assert(unsigned(mbb->getNumber()) == MBBRanges.size() &&

diff  --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp 
b/llvm/lib/CodeGen/MachineBasicBlock.cpp
index c7b404e075e1..fded4b

[llvm-branch-commits] [llvm] 60df7c0 - [obj2yaml, yaml2obj] - Fix issues with creating/dumping group sections.

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2021-01-12T14:07:42+03:00
New Revision: 60df7c08b1f4447309c0c07fec1c8bc7267562fc

URL: 
https://github.com/llvm/llvm-project/commit/60df7c08b1f4447309c0c07fec1c8bc7267562fc
DIFF: 
https://github.com/llvm/llvm-project/commit/60df7c08b1f4447309c0c07fec1c8bc7267562fc.diff

LOG: [obj2yaml,yaml2obj] - Fix issues with creating/dumping group sections.

We have the following issues related to group sections:
1) yaml2obj is unable to set the custom `sh_entsize` value, because the 
`EntSize`
   key is currently ignored.
2) obj2yaml is unable to dump the group section which `sh_entsize != 4`.
3) obj2yaml always dumps the "EntSize" for group sections, though
   usually we are trying to omit dumping default values when dumping keys.
   I.e. we should not print the "EntSize" key when `sh_entsize` == 4.

This patch fixes (1),(3) and adds the test case to document the behavior of (2).

Differential revision: https://reviews.llvm.org/D93854

Added: 


Modified: 
llvm/lib/ObjectYAML/ELFEmitter.cpp
llvm/test/tools/obj2yaml/ELF/section-group.yaml
llvm/test/tools/yaml2obj/ELF/group.yaml
llvm/tools/obj2yaml/elf2yaml.cpp

Removed: 




diff  --git a/llvm/lib/ObjectYAML/ELFEmitter.cpp 
b/llvm/lib/ObjectYAML/ELFEmitter.cpp
index 010a881379f3..181b130de621 100644
--- a/llvm/lib/ObjectYAML/ELFEmitter.cpp
+++ b/llvm/lib/ObjectYAML/ELFEmitter.cpp
@@ -1275,7 +1275,10 @@ void ELFState::writeSectionContent(Elf_Shdr 
&SHeader,
   SN2I.lookup(".symtab", Link))
 SHeader.sh_link = Link;
 
-  SHeader.sh_entsize = 4;
+  if (Section.EntSize)
+SHeader.sh_entsize = *Section.EntSize;
+  else
+SHeader.sh_entsize = sizeof(typename ELFT::Word);
 
   if (Section.Signature)
 SHeader.sh_info =

diff  --git a/llvm/test/tools/obj2yaml/ELF/section-group.yaml 
b/llvm/test/tools/obj2yaml/ELF/section-group.yaml
index 33044ceeb36c..bdd65908992d 100644
--- a/llvm/test/tools/obj2yaml/ELF/section-group.yaml
+++ b/llvm/test/tools/obj2yaml/ELF/section-group.yaml
@@ -1,13 +1,15 @@
 ## Checks that the tool is able to read section groups from ELF.
 
+## Check how groups sections are dumped.
+## Check we don't dump the "EntSize" key when sh_entsize == 4.
+
 # RUN: yaml2obj %s -o %t1.o
 # RUN: obj2yaml %t1.o | FileCheck %s -DSEC=.rodata
 
-# CHECK:  - Name:.group
-# CHECK-NEXT:   Type:SHT_GROUP
-# CHECK-NEXT:   Link:.symtab
-# CHECK-NEXT:   EntSize: 0x4
-# CHECK-NEXT:   Info:signature
+# CHECK:  - Name: .group
+# CHECK-NEXT:   Type: SHT_GROUP
+# CHECK-NEXT:   Link: .symtab
+# CHECK-NEXT:   Info: signature
 # CHECK-NEXT:   Members:
 # CHECK-NEXT: - SectionOrType: GRP_COMDAT
 # CHECK-NEXT: - SectionOrType: [[SEC]]
@@ -19,10 +21,11 @@ FileHeader:
   Data:  ELFDATA2LSB
   Type:  ET_REL
 Sections:
-  - Name: .group
-Type: SHT_GROUP
-Link: .symtab
-Info: [[INFO=signature]]
+  - Name:.group
+Type:SHT_GROUP
+Link:.symtab
+Info:[[INFO=signature]]
+EntSize: [[ENTSIZE=]]
 Members:
   - SectionOrType: GRP_COMDAT
   - SectionOrType: [[SEC=.rodata]]
@@ -33,6 +36,14 @@ Symbols:
 Type:STT_OBJECT
 Section: .rodata
 
+## Document that yaml2obj can't dump the SHT_GROUP section when its sh_entsize 
!= 4.
+
+# RUN: yaml2obj %s -DENTSIZE=0xfe -o %t1.entsize.o
+# RUN: not obj2yaml %t1.entsize.o 2>&1 | \
+# RUN:   FileCheck %s -DFILE=%t1.entsize.o --check-prefix=ENTSIZE
+
+# ENTSIZE: Error reading file: [[FILE]]: section [index 1] has invalid 
sh_entsize: expected 4, but got 254
+
 ## Check we are able to dump members of the SHT_GROUP section even when
 ## one of them has section index 0.
 

diff  --git a/llvm/test/tools/yaml2obj/ELF/group.yaml 
b/llvm/test/tools/yaml2obj/ELF/group.yaml
index 56794d9f14d7..1f061ade5769 100644
--- a/llvm/test/tools/yaml2obj/ELF/group.yaml
+++ b/llvm/test/tools/yaml2obj/ELF/group.yaml
@@ -19,6 +19,7 @@ Sections:
 Type:SHT_GROUP
 Link:0x1
 Info:0x2
+EntSize: [[ENTSIZE=]]
 Size:[[SIZE=]]
 Content: [[CONTENT=]]
 Members: [[MEMBERS=]]
@@ -68,10 +69,19 @@ Sections:
 # MEMBERS-ERR: error: "Members" cannot be used with "Content" or "Size"
 
 ## Check we create an empty section when none of "Size", "Content" or 
"Members" are specified.
+## Check that the default value of sh_entsize is 4.
 
 # RUN: yaml2obj %s -o %t.empty.o
 # RUN: llvm-readelf --sections --section-data %t.empty.o | \
 # RUN:   FileCheck %s --check-prefix=EMPTY-SEC
 
-# EMPTY-SEC: [Nr] Name   Type  Address  OffSize
-# EMPTY-SEC: [ 1] .group GROUP  40 00
+# EMPTY-SEC: [Nr] Name   Type  Address  OffSize   ES Flg
+# EMPTY-SEC: [ 1] .group GROUP  40 00 04 1
+
+## Check that we are able to set an arbitrary entry size for the group section.
+
+# RUN: yaml2obj %s -DENTSIZE=0xFE -o %t.entsize.o
+# RUN: llvm-readelf --sections %t.entsize.o | FileChec

[llvm-branch-commits] [llvm] c15a57c - [obj2yaml] - Don't crash when an object has an empty symbol table.

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2021-01-12T14:08:59+03:00
New Revision: c15a57cc1a86bfb72f4fa0e7d265494babc3b412

URL: 
https://github.com/llvm/llvm-project/commit/c15a57cc1a86bfb72f4fa0e7d265494babc3b412
DIFF: 
https://github.com/llvm/llvm-project/commit/c15a57cc1a86bfb72f4fa0e7d265494babc3b412.diff

LOG: [obj2yaml] - Don't crash when an object has an empty symbol table.

Currently we crash when we have an object with SHT_SYMTAB/SHT_DYNSYM sections
of size 0.

With this patch instead of the crash we start to dump them properly.

Differential revision: https://reviews.llvm.org/D93697

Added: 


Modified: 
llvm/test/tools/obj2yaml/ELF/no-symtab.yaml
llvm/tools/obj2yaml/elf2yaml.cpp

Removed: 




diff  --git a/llvm/test/tools/obj2yaml/ELF/no-symtab.yaml 
b/llvm/test/tools/obj2yaml/ELF/no-symtab.yaml
index 8f9fb8285645..132ddfbbc321 100644
--- a/llvm/test/tools/obj2yaml/ELF/no-symtab.yaml
+++ b/llvm/test/tools/obj2yaml/ELF/no-symtab.yaml
@@ -37,3 +37,37 @@ FileHeader:
   Data:  ELFDATA2LSB
   Type:  ET_DYN
 Symbols: []
+
+## A symbol table without the null entry is non-conforming.
+## Check we don't print "Symbols" and "DynamicSymbols" keys in this case.
+
+# RUN: yaml2obj --docnum=3 %s -o %t3
+# RUN: obj2yaml %t3 | FileCheck %s --check-prefix=EMPTY
+
+# EMPTY:  Sections:
+# EMPTY-NEXT:   - Name:.symtab
+# EMPTY-NEXT: Type:SHT_SYMTAB
+# EMPTY-NEXT: Link:.strtab
+## TODO: we shouldn't dump the default "EntSize" value.
+# EMPTY-NEXT: EntSize: 0x18
+# EMPTY-NEXT: Size:0x0
+# EMPTY-NEXT:   - Name:.dynsym
+# EMPTY-NEXT: Type:SHT_DYNSYM
+# EMPTY-NEXT: Flags:   [ SHF_ALLOC ]
+## TODO: we shouldn't dump the default "EntSize" value.
+# EMPTY-NEXT: EntSize: 0x18
+# EMPTY-NEXT: Size:0x0
+# EMPTY-NEXT: ...
+
+--- !ELF
+FileHeader:
+  Class: ELFCLASS64
+  Data:  ELFDATA2LSB
+  Type:  ET_DYN
+Sections:
+  - Name: .symtab
+Type: SHT_SYMTAB
+Size: 0
+  - Name: .dynsym
+Type: SHT_DYNSYM
+Size: 0

diff  --git a/llvm/tools/obj2yaml/elf2yaml.cpp 
b/llvm/tools/obj2yaml/elf2yaml.cpp
index f29b1ebca7de..89bbee49657a 100644
--- a/llvm/tools/obj2yaml/elf2yaml.cpp
+++ b/llvm/tools/obj2yaml/elf2yaml.cpp
@@ -55,7 +55,7 @@ class ELFDumper {
   dumpDWARFSections(std::vector> &Sections);
 
   Error dumpSymbols(const Elf_Shdr *Symtab,
-std::vector &Symbols);
+Optional> &Symbols);
   Error dumpSymbol(const Elf_Sym *Sym, const Elf_Shdr *SymTab,
StringRef StrTable, ELFYAML::Symbol &S);
   Expected>> dumpSections();
@@ -219,9 +219,12 @@ bool ELFDumper::shouldPrintSection(const 
ELFYAML::Section &S,
   // Generally we are trying to reduce noise in the YAML output. Because
   // of that we do not print non-allocatable versions of such sections and
   // assume they are placed at the end.
+  // We also dump symbol tables when the Size field is set. It happens when 
they
+  // are empty, which should not normally happen.
   if (S.Type == ELF::SHT_STRTAB || S.Type == ELF::SHT_SYMTAB ||
-  S.Type == ELF::SHT_DYNSYM)
-return S.Flags.getValueOr(ELFYAML::ELF_SHF(0)) & ELF::SHF_ALLOC;
+  S.Type == ELF::SHT_DYNSYM) {
+return S.Size || S.Flags.getValueOr(ELFYAML::ELF_SHF(0)) & ELF::SHF_ALLOC;
+  }
 
   return true;
 }
@@ -325,17 +328,13 @@ template  Expected 
ELFDumper::dump() {
 }
   }
 
-  if (SymTab) {
-Y->Symbols.emplace();
-if (Error E = dumpSymbols(SymTab, *Y->Symbols))
+  if (SymTab)
+if (Error E = dumpSymbols(SymTab, Y->Symbols))
   return std::move(E);
-  }
 
-  if (DynSymTab) {
-Y->DynamicSymbols.emplace();
-if (Error E = dumpSymbols(DynSymTab, *Y->DynamicSymbols))
+  if (DynSymTab)
+if (Error E = dumpSymbols(DynSymTab, Y->DynamicSymbols))
   return std::move(E);
-  }
 
   // We dump all sections first. It is simple and allows us to verify that all
   // sections are valid and also to generalize the code. But we are not going 
to
@@ -516,6 +515,13 @@ ELFDumper::dumpPlaceholderSection(const Elf_Shdr 
*Shdr) {
   auto S = std::make_unique();
   if (Error E = dumpCommonSection(Shdr, *S.get()))
 return std::move(E);
+
+  // Normally symbol tables should not be empty. We dump the "Size"
+  // key when they are.
+  if ((Shdr->sh_type == ELF::SHT_SYMTAB || Shdr->sh_type == ELF::SHT_DYNSYM) &&
+  !Shdr->sh_size)
+S->Size.emplace();
+
   return S.release();
 }
 
@@ -621,30 +627,33 @@ ELFDumper::dumpSections() {
 }
 
 template 
-Error ELFDumper::dumpSymbols(const Elf_Shdr *Symtab,
- std::vector &Symbols) {
+Error ELFDumper::dumpSymbols(
+const Elf_Shdr *Symtab, Optional> &Symbols) {
   if (!Symtab)
 return Error::success();
 
-  auto StrTableOrErr = Obj.getStringTableForSymtab(*Symtab);
-  if (!StrTableOrErr)
-return StrTableOrErr.takeError();
-  StringRef StrTable = *StrTableOrErr;
-
   auto SymtabOrErr = Obj.symbols(Symtab

[llvm-branch-commits] [llvm] a06aa10 - Revert "[Test] Add failing test for PR48725"

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2021-01-12T06:30:32-05:00
New Revision: a06aa1037c17dd3d60f5202b9877d8988e463353

URL: 
https://github.com/llvm/llvm-project/commit/a06aa1037c17dd3d60f5202b9877d8988e463353
DIFF: 
https://github.com/llvm/llvm-project/commit/a06aa1037c17dd3d60f5202b9877d8988e463353.diff

LOG: Revert "[Test] Add failing test for PR48725"

This reverts commit e8287cb2b2923af9da72fd953e2ec5495c33861a.
Test unexpectedly passes on mac, see comment 2 on PR48725.

Added: 


Modified: 


Removed: 
llvm/test/Transforms/LoopStrengthReduce/pr48725.ll



diff  --git a/llvm/test/Transforms/LoopStrengthReduce/pr48725.ll 
b/llvm/test/Transforms/LoopStrengthReduce/pr48725.ll
deleted file mode 100644
index ef25b92ffd1c..
--- a/llvm/test/Transforms/LoopStrengthReduce/pr48725.ll
+++ /dev/null
@@ -1,102 +0,0 @@
-; RUN: opt -S -loop-reduce < %s | FileCheck %s
-; XFAIL: *
-
-source_filename = "./simple.ll"
-target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
-target triple = "x86_64-unknown-linux-gnu"
-
-; CHECK-LABEL: test
-define void @test() {
-bb:
-  br label %bb1
-
-bb1:  ; preds = %bb1, %bb
-  %tmp = phi i32 [ undef, %bb ], [ %tmp87, %bb1 ]
-  %tmp2 = phi i32 [ undef, %bb ], [ %tmp86, %bb1 ]
-  %tmp3 = mul i32 %tmp, undef
-  %tmp4 = xor i32 %tmp3, -1
-  %tmp5 = add i32 %tmp, %tmp4
-  %tmp6 = add i32 %tmp2, -1
-  %tmp7 = add i32 %tmp5, %tmp6
-  %tmp8 = mul i32 %tmp7, %tmp3
-  %tmp9 = xor i32 %tmp8, -1
-  %tmp10 = add i32 %tmp7, %tmp9
-  %tmp11 = add i32 %tmp10, undef
-  %tmp12 = mul i32 %tmp11, %tmp8
-  %tmp13 = xor i32 %tmp12, -1
-  %tmp14 = add i32 %tmp11, %tmp13
-  %tmp15 = add i32 %tmp14, undef
-  %tmp16 = mul i32 %tmp15, %tmp12
-  %tmp17 = add i32 %tmp15, undef
-  %tmp18 = add i32 %tmp17, undef
-  %tmp19 = mul i32 %tmp18, %tmp16
-  %tmp20 = xor i32 %tmp19, -1
-  %tmp21 = add i32 %tmp18, %tmp20
-  %tmp22 = add i32 %tmp21, undef
-  %tmp23 = mul i32 %tmp22, %tmp19
-  %tmp24 = xor i32 %tmp23, -1
-  %tmp25 = add i32 %tmp22, %tmp24
-  %tmp26 = add i32 %tmp25, undef
-  %tmp27 = mul i32 %tmp26, %tmp23
-  %tmp28 = xor i32 %tmp27, -1
-  %tmp29 = add i32 %tmp26, %tmp28
-  %tmp30 = add i32 %tmp29, undef
-  %tmp31 = mul i32 %tmp30, %tmp27
-  %tmp32 = xor i32 %tmp31, -1
-  %tmp33 = add i32 %tmp30, %tmp32
-  %tmp34 = add i32 %tmp33, undef
-  %tmp35 = mul i32 %tmp34, %tmp31
-  %tmp36 = xor i32 %tmp35, -1
-  %tmp37 = add i32 %tmp34, %tmp36
-  %tmp38 = add i32 %tmp2, -9
-  %tmp39 = add i32 %tmp37, %tmp38
-  %tmp40 = mul i32 %tmp39, %tmp35
-  %tmp41 = xor i32 %tmp40, -1
-  %tmp42 = add i32 %tmp39, %tmp41
-  %tmp43 = add i32 %tmp42, undef
-  %tmp44 = mul i32 %tmp43, %tmp40
-  %tmp45 = xor i32 %tmp44, -1
-  %tmp46 = add i32 %tmp43, %tmp45
-  %tmp47 = add i32 %tmp46, undef
-  %tmp48 = mul i32 %tmp47, %tmp44
-  %tmp49 = xor i32 %tmp48, -1
-  %tmp50 = add i32 %tmp47, %tmp49
-  %tmp51 = add i32 %tmp50, undef
-  %tmp52 = mul i32 %tmp51, %tmp48
-  %tmp53 = xor i32 %tmp52, -1
-  %tmp54 = add i32 %tmp51, %tmp53
-  %tmp55 = add i32 %tmp54, undef
-  %tmp56 = mul i32 %tmp55, %tmp52
-  %tmp57 = xor i32 %tmp56, -1
-  %tmp58 = add i32 %tmp55, %tmp57
-  %tmp59 = add i32 %tmp2, -14
-  %tmp60 = add i32 %tmp58, %tmp59
-  %tmp61 = mul i32 %tmp60, %tmp56
-  %tmp62 = xor i32 %tmp61, -1
-  %tmp63 = add i32 %tmp60, %tmp62
-  %tmp64 = add i32 %tmp63, undef
-  %tmp65 = mul i32 %tmp64, %tmp61
-  %tmp66 = xor i32 %tmp65, -1
-  %tmp67 = add i32 %tmp64, %tmp66
-  %tmp68 = add i32 %tmp67, undef
-  %tmp69 = mul i32 %tmp68, %tmp65
-  %tmp70 = xor i32 %tmp69, -1
-  %tmp71 = add i32 %tmp68, %tmp70
-  %tmp72 = add i32 %tmp71, undef
-  %tmp73 = mul i32 %tmp72, %tmp69
-  %tmp74 = xor i32 %tmp73, -1
-  %tmp75 = add i32 %tmp72, %tmp74
-  %tmp76 = add i32 %tmp75, undef
-  %tmp77 = mul i32 %tmp76, %tmp73
-  %tmp78 = xor i32 %tmp77, -1
-  %tmp79 = add i32 %tmp76, %tmp78
-  %tmp80 = add i32 %tmp79, undef
-  %tmp81 = mul i32 %tmp80, %tmp77
-  %tmp82 = xor i32 %tmp81, -1
-  %tmp83 = add i32 %tmp80, %tmp82
-  %tmp84 = add i32 %tmp83, undef
-  %tmp85 = add i32 %tmp84, undef
-  %tmp86 = add i32 %tmp2, -21
-  %tmp87 = add i32 %tmp85, %tmp86
-  br label %bb1
-}



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[llvm-branch-commits] [llvm] ace516f - Change the LLVM_ATTRIBUTE_DEPRECATED macro to use C++14 attribute.

[Christian Sigg via llvm-branch-commits]

Author: Christian Sigg
Date: 2021-01-12T12:41:00+01:00
New Revision: ace516fb33d1f3de85f046e96efc1048b4ee8c08

URL: 
https://github.com/llvm/llvm-project/commit/ace516fb33d1f3de85f046e96efc1048b4ee8c08
DIFF: 
https://github.com/llvm/llvm-project/commit/ace516fb33d1f3de85f046e96efc1048b4ee8c08.diff

LOG: Change the LLVM_ATTRIBUTE_DEPRECATED macro to use C++14 attribute.

C++14 attributes are superior because they can be applied to functions with 
inline definition and the syntax is cleaner.

I intend to convert all uses and then remove the macro.

One issue that might hold back switching uses to C++14  attributes is that
clang-format does not put long attributes on separate lines and formatted code 
will look like:

```
template 
[[deprecated("blah blah")]] void
f() {
  ...
}
```

Putting long attributes on a separate line would be prettier.
See 
https://stackoverflow.com/questions/45740466/clang-format-setting-to-control-c-attributes

AttributeMacros probably won't help because it can't match the custom message.
https://clang.llvm.org/docs/ClangFormatStyleOptions.html

Reviewed By: rriddle, MaskRay

Differential Revision: https://reviews.llvm.org/D94219

Added: 


Modified: 
llvm/include/llvm/Support/Compiler.h

Removed: 




diff  --git a/llvm/include/llvm/Support/Compiler.h 
b/llvm/include/llvm/Support/Compiler.h
index a9e4f7f8353d..9348ada91325 100644
--- a/llvm/include/llvm/Support/Compiler.h
+++ b/llvm/include/llvm/Support/Compiler.h
@@ -314,19 +314,9 @@
 #endif
 
 // LLVM_ATTRIBUTE_DEPRECATED(decl, "message")
-#if __has_feature(attribute_deprecated_with_message)
-# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \
-  decl __attribute__((deprecated(message)))
-#elif defined(__GNUC__)
-# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \
-  decl __attribute__((deprecated))
-#elif defined(_MSC_VER)
-# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \
-  __declspec(deprecated(message)) decl
-#else
-# define LLVM_ATTRIBUTE_DEPRECATED(decl, message) \
-  decl
-#endif
+// This macro will be removed.
+// Use C++14's attribute instead: [[deprecated("message")]]
+#define LLVM_ATTRIBUTE_DEPRECATED(decl, message) [[deprecated(message)]] decl
 
 /// LLVM_BUILTIN_UNREACHABLE - On compilers which support it, expands
 /// to an expression which states that it is undefined behavior for the



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[llvm-branch-commits] [clang] c4944a6 - [Fixed Point] Add codegen for conversion between fixed-point and floating point.

[Bjorn Pettersson via llvm-branch-commits]

Author: Bevin Hansson
Date: 2021-01-12T13:53:01+01:00
New Revision: c4944a6f53f6d1876e76563599f5f149328e7f8f

URL: 
https://github.com/llvm/llvm-project/commit/c4944a6f53f6d1876e76563599f5f149328e7f8f
DIFF: 
https://github.com/llvm/llvm-project/commit/c4944a6f53f6d1876e76563599f5f149328e7f8f.diff

LOG: [Fixed Point] Add codegen for conversion between fixed-point and floating 
point.

The patch adds the required methods to FixedPointBuilder
for converting between fixed-point and floating point,
and uses them from Clang.

This depends on D54749.

Reviewed By: leonardchan

Differential Revision: https://reviews.llvm.org/D86632

Added: 
clang/test/Frontend/fixed_point_conversions_half.c

Modified: 
clang/lib/CodeGen/CGExprScalar.cpp
clang/test/Frontend/fixed_point_compound.c
clang/test/Frontend/fixed_point_conversions.c
llvm/include/llvm/IR/FixedPointBuilder.h

Removed: 




diff  --git a/clang/lib/CodeGen/CGExprScalar.cpp 
b/clang/lib/CodeGen/CGExprScalar.cpp
index d6d5ec544c08..6f7e8263fa10 100644
--- a/clang/lib/CodeGen/CGExprScalar.cpp
+++ b/clang/lib/CodeGen/CGExprScalar.cpp
@@ -1212,13 +1212,14 @@ Value *ScalarExprEmitter::EmitScalarConversion(Value 
*Src, QualType SrcType,
   // padding is enabled because overflow into this bit is undefined
   // behavior.
   return Builder.CreateIsNotNull(Src, "tobool");
-if (DstType->isFixedPointType() || DstType->isIntegerType())
+if (DstType->isFixedPointType() || DstType->isIntegerType() ||
+DstType->isRealFloatingType())
   return EmitFixedPointConversion(Src, SrcType, DstType, Loc);
 
 llvm_unreachable(
 "Unhandled scalar conversion from a fixed point type to another 
type.");
   } else if (DstType->isFixedPointType()) {
-if (SrcType->isIntegerType())
+if (SrcType->isIntegerType() || SrcType->isRealFloatingType())
   // This also includes converting booleans and enums to fixed point types.
   return EmitFixedPointConversion(Src, SrcType, DstType, Loc);
 
@@ -1434,19 +1435,29 @@ Value *ScalarExprEmitter::EmitScalarConversion(Value 
*Src, QualType SrcType,
 Value *ScalarExprEmitter::EmitFixedPointConversion(Value *Src, QualType SrcTy,
QualType DstTy,
SourceLocation Loc) {
-  auto SrcFPSema = CGF.getContext().getFixedPointSemantics(SrcTy);
-  auto DstFPSema = CGF.getContext().getFixedPointSemantics(DstTy);
   llvm::FixedPointBuilder FPBuilder(Builder);
   llvm::Value *Result;
-  if (DstTy->isIntegerType())
-Result = FPBuilder.CreateFixedToInteger(Src, SrcFPSema,
-DstFPSema.getWidth(),
-DstFPSema.isSigned());
-  else if (SrcTy->isIntegerType())
-Result =  FPBuilder.CreateIntegerToFixed(Src, SrcFPSema.isSigned(),
- DstFPSema);
-  else
-Result = FPBuilder.CreateFixedToFixed(Src, SrcFPSema, DstFPSema);
+  if (SrcTy->isRealFloatingType())
+Result = FPBuilder.CreateFloatingToFixed(Src,
+CGF.getContext().getFixedPointSemantics(DstTy));
+  else if (DstTy->isRealFloatingType())
+Result = FPBuilder.CreateFixedToFloating(Src,
+CGF.getContext().getFixedPointSemantics(SrcTy),
+ConvertType(DstTy));
+  else {
+auto SrcFPSema = CGF.getContext().getFixedPointSemantics(SrcTy);
+auto DstFPSema = CGF.getContext().getFixedPointSemantics(DstTy);
+
+if (DstTy->isIntegerType())
+  Result = FPBuilder.CreateFixedToInteger(Src, SrcFPSema,
+  DstFPSema.getWidth(),
+  DstFPSema.isSigned());
+else if (SrcTy->isIntegerType())
+  Result =  FPBuilder.CreateIntegerToFixed(Src, SrcFPSema.isSigned(),
+   DstFPSema);
+else
+  Result = FPBuilder.CreateFixedToFixed(Src, SrcFPSema, DstFPSema);
+  }
   return Result;
 }
 

diff  --git a/clang/test/Frontend/fixed_point_compound.c 
b/clang/test/Frontend/fixed_point_compound.c
index 897ba2e22636..5dcc7fba0da7 100644
--- a/clang/test/Frontend/fixed_point_compound.c
+++ b/clang/test/Frontend/fixed_point_compound.c
@@ -16,6 +16,8 @@ int i;
 unsigned int u;
 signed char c;
 
+float fl;
+
 
 // CHECK-LABEL: @add_shfa(
 // CHECK-NEXT:  entry:
@@ -358,6 +360,66 @@ void add_sshsuf() {
   sshf += suf;
 }
 
+// CHECK-LABEL: @add_afl(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:[[TMP0:%.*]] = load float, float* @fl, align 4
+// CHECK-NEXT:[[TMP1:%.*]] = load i32, i32* @a, align 4
+// CHECK-NEXT:[[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+// CHECK-NEXT:[[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00
+// CHECK-NEXT:[[ADD:%.*]] = fadd float [[TMP3]], [[TMP0]]
+// CHECK-NEXT:[[TMP4:%.*]] = fmul float [[ADD]], 3.276800e+04
+// CHECK-NEXT:[[TMP5:%.

[llvm-branch-commits] [llvm] a5212b5 - [X86][SSE] combineSubToSubus - remove SSE2 early-out.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-12T12:52:11Z
New Revision: a5212b5c91cc699052125b8a3428ffe0c123837d

URL: 
https://github.com/llvm/llvm-project/commit/a5212b5c91cc699052125b8a3428ffe0c123837d
DIFF: 
https://github.com/llvm/llvm-project/commit/a5212b5c91cc699052125b8a3428ffe0c123837d.diff

LOG: [X86][SSE] combineSubToSubus - remove SSE2 early-out.

SSE2 truncation codegen has improved over the past few years (mainly due to 
better shuffle lowering/combining and computeKnownBits) - its no longer 
necessary to early-out from v8i32/v8i64 truncations.

This was noticed while looking at completing PR40111 and moving 
combineSubToSubus to DAGCombine entirely.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/psubus.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2f9de876a87f..e3a94f1c23ab 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48754,11 +48754,10 @@ static SDValue combineSubToSubus(SDNode *N, 
SelectionDAG &DAG,
   if (!VT.isVector())
 return SDValue();
 
-  // PSUBUS is supported, starting from SSE2, but truncation for v8i32
-  // is only worth it with SSSE3 (PSHUFB).
+  // PSUBUS is supported, starting from SSE2.
   EVT EltVT = VT.getVectorElementType();
-  if (!(Subtarget.hasSSE2() && (EltVT == MVT::i8 || EltVT == MVT::i16)) &&
-  !(Subtarget.hasSSSE3() && (VT == MVT::v8i32 || VT == MVT::v8i64)) &&
+  if (!(Subtarget.hasSSE2() && (EltVT == MVT::i8 || EltVT == MVT::i16 ||
+VT == MVT::v8i32 || VT == MVT::v8i64)) &&
   !(Subtarget.useBWIRegs() && (VT == MVT::v16i32)))
 return SDValue();
 
@@ -48795,8 +48794,8 @@ static SDValue combineSubToSubus(SDNode *N, 
SelectionDAG &DAG,
 SDValue MinLHS = Op1.getOperand(0).getOperand(0);
 SDValue MinRHS = Op1.getOperand(0).getOperand(1);
 EVT TruncVT = Op1.getOperand(0).getValueType();
-if (!(Subtarget.hasSSSE3() && (TruncVT == MVT::v8i32 ||
-   TruncVT == MVT::v8i64)) &&
+if (!(Subtarget.hasSSE2() &&
+  (TruncVT == MVT::v8i32 || TruncVT == MVT::v8i64)) &&
 !(Subtarget.useBWIRegs() && (TruncVT == MVT::v16i32)))
   return SDValue();
 SDValue OpToSaturate;
@@ -48835,7 +48834,7 @@ static SDValue combineSubToSubus(SDNode *N, 
SelectionDAG &DAG,
   // values, or first 48 bits for 64 bit values.
   KnownBits Known = DAG.computeKnownBits(SubusLHS);
   unsigned NumZeros = Known.countMinLeadingZeros();
-  if ((VT == MVT::v8i64 && NumZeros < 48) || NumZeros < 16)
+  if (NumZeros < (VT.getScalarSizeInBits() - 16))
 return SDValue();
 
   EVT ExtType = SubusLHS.getValueType();

diff  --git a/llvm/test/CodeGen/X86/psubus.ll b/llvm/test/CodeGen/X86/psubus.ll
index 92283dba25b8..906af5e17211 100644
--- a/llvm/test/CodeGen/X86/psubus.ll
+++ b/llvm/test/CodeGen/X86/psubus.ll
@@ -1382,33 +1382,32 @@ vector.ph:
 define <8 x i16> @psubus_8i32_max(<8 x i16> %x, <8 x i32> %y) nounwind {
 ; SSE2-LABEL: psubus_8i32_max:
 ; SSE2:   # %bb.0: # %vector.ph
-; SSE2-NEXT:movdqa %xmm0, %xmm3
-; SSE2-NEXT:pxor %xmm4, %xmm4
-; SSE2-NEXT:punpcklwd {{.*#+}} xmm0 = 
xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]
-; SSE2-NEXT:punpckhwd {{.*#+}} xmm3 = 
xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
-; SSE2-NEXT:movdqa {{.*#+}} xmm5 = 
[2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:movdqa %xmm2, %xmm6
-; SSE2-NEXT:pxor %xmm5, %xmm6
-; SSE2-NEXT:movdqa %xmm3, %xmm4
-; SSE2-NEXT:por %xmm5, %xmm4
-; SSE2-NEXT:pcmpgtd %xmm6, %xmm4
-; SSE2-NEXT:pand %xmm4, %xmm3
-; SSE2-NEXT:pandn %xmm2, %xmm4
-; SSE2-NEXT:por %xmm3, %xmm4
-; SSE2-NEXT:movdqa %xmm1, %xmm3
-; SSE2-NEXT:pxor %xmm5, %xmm3
-; SSE2-NEXT:por %xmm0, %xmm5
+; SSE2-NEXT:movdqa {{.*#+}} xmm3 = 
[2147483648,2147483648,2147483648,2147483648]
+; SSE2-NEXT:movdqa %xmm2, %xmm4
+; SSE2-NEXT:pxor %xmm3, %xmm4
+; SSE2-NEXT:movdqa {{.*#+}} xmm5 = 
[2147549183,2147549183,2147549183,2147549183]
+; SSE2-NEXT:movdqa %xmm5, %xmm6
+; SSE2-NEXT:pcmpgtd %xmm4, %xmm6
+; SSE2-NEXT:pcmpeqd %xmm4, %xmm4
+; SSE2-NEXT:pand %xmm6, %xmm2
+; SSE2-NEXT:pxor %xmm4, %xmm6
+; SSE2-NEXT:por %xmm2, %xmm6
+; SSE2-NEXT:pslld $16, %xmm6
+; SSE2-NEXT:psrad $16, %xmm6
+; SSE2-NEXT:pxor %xmm1, %xmm3
 ; SSE2-NEXT:pcmpgtd %xmm3, %xmm5
-; SSE2-NEXT:pand %xmm5, %xmm0
-; SSE2-NEXT:pandn %xmm1, %xmm5
-; SSE2-NEXT:por %xmm5, %xmm0
-; SSE2-NEXT:psubd %xmm1, %xmm0
-; SSE2-NEXT:psubd %xmm2, %xmm4
-; SSE2-NEXT:pslld $16, %xmm4
-; SSE2-NEXT:psrad $16, %xmm4
-; SSE2-NEXT:pslld $16, %xmm0
+; SSE2-NEXT:pxor %xmm5, %xmm4
+; SSE2-NEXT:pand %xmm1, %xmm5
+; SSE2-NEXT:por %xmm4, %xmm5
+; SSE2-NEXT:pslld $16, %xmm

[llvm-branch-commits] [llvm] 7e44208 - [X86][SSE] combineSubToSubus - add v16i32 handling on pre-AVX512BW targets.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-12T13:44:11Z
New Revision: 7e44208115b35ad34cc10259e9c375abbd636ef5

URL: 
https://github.com/llvm/llvm-project/commit/7e44208115b35ad34cc10259e9c375abbd636ef5
DIFF: 
https://github.com/llvm/llvm-project/commit/7e44208115b35ad34cc10259e9c375abbd636ef5.diff

LOG: [X86][SSE] combineSubToSubus - add v16i32 handling on pre-AVX512BW targets.

v16i32 -> v16i16/v8i16 truncation is now good enough using PACKSS/PACKUS + 
shuffle combining that its no longer necessary to early-out on pre-AVX512BW 
targets.

This was noticed while looking at completing PR40111 and moving 
combineSubToSubus to DAGCombine entirely.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/psubus.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index e3a94f1c23ab..750c809eafca 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48756,9 +48756,9 @@ static SDValue combineSubToSubus(SDNode *N, 
SelectionDAG &DAG,
 
   // PSUBUS is supported, starting from SSE2.
   EVT EltVT = VT.getVectorElementType();
-  if (!(Subtarget.hasSSE2() && (EltVT == MVT::i8 || EltVT == MVT::i16 ||
-VT == MVT::v8i32 || VT == MVT::v8i64)) &&
-  !(Subtarget.useBWIRegs() && (VT == MVT::v16i32)))
+  if (!(Subtarget.hasSSE2() &&
+(EltVT == MVT::i8 || EltVT == MVT::i16 || VT == MVT::v8i32 ||
+ VT == MVT::v8i64 || VT == MVT::v16i32)))
 return SDValue();
 
   SDValue SubusLHS, SubusRHS;
@@ -48795,8 +48795,8 @@ static SDValue combineSubToSubus(SDNode *N, 
SelectionDAG &DAG,
 SDValue MinRHS = Op1.getOperand(0).getOperand(1);
 EVT TruncVT = Op1.getOperand(0).getValueType();
 if (!(Subtarget.hasSSE2() &&
-  (TruncVT == MVT::v8i32 || TruncVT == MVT::v8i64)) &&
-!(Subtarget.useBWIRegs() && (TruncVT == MVT::v16i32)))
+  (TruncVT == MVT::v8i32 || TruncVT == MVT::v8i64 ||
+   TruncVT == MVT::v16i32)))
   return SDValue();
 SDValue OpToSaturate;
 if (MinLHS.getOpcode() == ISD::ZERO_EXTEND &&

diff  --git a/llvm/test/CodeGen/X86/psubus.ll b/llvm/test/CodeGen/X86/psubus.ll
index 906af5e17211..06240cd8bad3 100644
--- a/llvm/test/CodeGen/X86/psubus.ll
+++ b/llvm/test/CodeGen/X86/psubus.ll
@@ -1737,141 +1737,125 @@ vector.ph:
 define <16 x i16> @psubus_16i32_max(<16 x i16> %x, <16 x i32> %y) nounwind {
 ; SSE2-LABEL: psubus_16i32_max:
 ; SSE2:   # %bb.0: # %vector.ph
-; SSE2-NEXT:movdqa %xmm1, %xmm8
-; SSE2-NEXT:pxor %xmm7, %xmm7
-; SSE2-NEXT:punpcklwd {{.*#+}} xmm1 = 
xmm1[0],xmm7[0],xmm1[1],xmm7[1],xmm1[2],xmm7[2],xmm1[3],xmm7[3]
-; SSE2-NEXT:punpckhwd {{.*#+}} xmm8 = 
xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
-; SSE2-NEXT:movdqa %xmm0, %xmm10
-; SSE2-NEXT:punpcklwd {{.*#+}} xmm10 = 
xmm10[0],xmm7[0],xmm10[1],xmm7[1],xmm10[2],xmm7[2],xmm10[3],xmm7[3]
-; SSE2-NEXT:punpckhwd {{.*#+}} xmm0 = 
xmm0[4],xmm7[4],xmm0[5],xmm7[5],xmm0[6],xmm7[6],xmm0[7],xmm7[7]
-; SSE2-NEXT:movdqa {{.*#+}} xmm7 = 
[2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:movdqa %xmm3, %xmm6
-; SSE2-NEXT:pxor %xmm7, %xmm6
-; SSE2-NEXT:movdqa %xmm0, %xmm9
-; SSE2-NEXT:por %xmm7, %xmm9
-; SSE2-NEXT:pcmpgtd %xmm6, %xmm9
-; SSE2-NEXT:pand %xmm9, %xmm0
-; SSE2-NEXT:pandn %xmm3, %xmm9
-; SSE2-NEXT:por %xmm0, %xmm9
-; SSE2-NEXT:movdqa %xmm2, %xmm6
-; SSE2-NEXT:pxor %xmm7, %xmm6
-; SSE2-NEXT:movdqa %xmm10, %xmm0
-; SSE2-NEXT:por %xmm7, %xmm0
-; SSE2-NEXT:pcmpgtd %xmm6, %xmm0
-; SSE2-NEXT:pand %xmm0, %xmm10
-; SSE2-NEXT:pandn %xmm2, %xmm0
-; SSE2-NEXT:por %xmm10, %xmm0
-; SSE2-NEXT:movdqa %xmm5, %xmm10
-; SSE2-NEXT:pxor %xmm7, %xmm10
-; SSE2-NEXT:movdqa %xmm8, %xmm6
-; SSE2-NEXT:por %xmm7, %xmm6
-; SSE2-NEXT:pcmpgtd %xmm10, %xmm6
-; SSE2-NEXT:pand %xmm6, %xmm8
-; SSE2-NEXT:pandn %xmm5, %xmm6
-; SSE2-NEXT:por %xmm8, %xmm6
-; SSE2-NEXT:movdqa %xmm4, %xmm8
-; SSE2-NEXT:pxor %xmm7, %xmm8
-; SSE2-NEXT:por %xmm1, %xmm7
-; SSE2-NEXT:pcmpgtd %xmm8, %xmm7
-; SSE2-NEXT:pand %xmm7, %xmm1
-; SSE2-NEXT:pandn %xmm4, %xmm7
-; SSE2-NEXT:por %xmm7, %xmm1
-; SSE2-NEXT:psubd %xmm4, %xmm1
-; SSE2-NEXT:psubd %xmm5, %xmm6
-; SSE2-NEXT:psubd %xmm2, %xmm0
-; SSE2-NEXT:psubd %xmm3, %xmm9
-; SSE2-NEXT:pslld $16, %xmm9
-; SSE2-NEXT:psrad $16, %xmm9
-; SSE2-NEXT:pslld $16, %xmm0
-; SSE2-NEXT:psrad $16, %xmm0
-; SSE2-NEXT:packssdw %xmm9, %xmm0
+; SSE2-NEXT:movdqa {{.*#+}} xmm9 = 
[2147483648,2147483648,2147483648,2147483648]
+; SSE2-NEXT:movdqa %xmm3, %xmm8
+; SSE2-NEXT:pxor %xmm9, %xmm8
+; SSE2-NEXT:movdqa {{.*#+}} xmm7 = 
[2147549183,2147549183,2147549183,2147549183]
+; SSE2-NEXT:movdqa %xmm7, %xmm6
+; SSE2-NEXT:pcmpgtd %xmm8,

[llvm-branch-commits] [llvm] 2ed914c - [X86][SSE] getFauxShuffleMask - handle PACKSS(SRAI(), SRAI()) shuffle patterns.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-12T14:07:53Z
New Revision: 2ed914cb7e9c0737bdf60a0b1fd48b6499973325

URL: 
https://github.com/llvm/llvm-project/commit/2ed914cb7e9c0737bdf60a0b1fd48b6499973325
DIFF: 
https://github.com/llvm/llvm-project/commit/2ed914cb7e9c0737bdf60a0b1fd48b6499973325.diff

LOG: [X86][SSE] getFauxShuffleMask - handle PACKSS(SRAI(),SRAI()) shuffle 
patterns.

We can't easily treat ASHR a faux shuffle, but if it was just feeding a PACKSS 
then it was likely being used as sign-extension for a truncation, so just peek 
through and adjust the mask accordingly.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/psubus.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 750c809eafca..f28e28689806 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -7685,12 +7685,26 @@ static bool getFauxShuffleMask(SDValue N, const APInt 
&DemandedElts,
 
 // If we know input saturation won't happen (or we don't care for 
particular
 // lanes), we can treat this as a truncation shuffle.
+bool Offset0 = false, Offset1 = false;
 if (Opcode == X86ISD::PACKSS) {
   if ((!(N0.isUndef() || EltsLHS.isNullValue()) &&
DAG.ComputeNumSignBits(N0, EltsLHS, Depth + 1) <= NumBitsPerElt) ||
   (!(N1.isUndef() || EltsRHS.isNullValue()) &&
DAG.ComputeNumSignBits(N1, EltsRHS, Depth + 1) <= NumBitsPerElt))
 return false;
+  // We can't easily fold ASHR into a shuffle, but if it was feeding a
+  // PACKSS then it was likely being used for sign-extension for a
+  // truncation, so just peek through and adjust the mask accordingly.
+  if (N0.getOpcode() == X86ISD::VSRAI && N->isOnlyUserOf(N0.getNode()) &&
+  N0.getConstantOperandAPInt(1) == NumBitsPerElt) {
+Offset0 = true;
+N0 = N0.getOperand(0);
+  }
+  if (N1.getOpcode() == X86ISD::VSRAI && N->isOnlyUserOf(N1.getNode()) &&
+  N1.getConstantOperandAPInt(1) == NumBitsPerElt) {
+Offset1 = true;
+N1 = N1.getOperand(0);
+  }
 } else {
   APInt ZeroMask = APInt::getHighBitsSet(2 * NumBitsPerElt, NumBitsPerElt);
   if ((!(N0.isUndef() || EltsLHS.isNullValue()) &&
@@ -7707,6 +7721,13 @@ static bool getFauxShuffleMask(SDValue N, const APInt 
&DemandedElts,
   Ops.push_back(N1);
 
 createPackShuffleMask(VT, Mask, IsUnary);
+
+if (Offset0 || Offset1) {
+  for (int &M : Mask)
+if ((Offset0 && isInRange(M, 0, NumElts)) ||
+(Offset1 && isInRange(M, NumElts, 2 * NumElts)))
+  ++M;
+}
 return true;
   }
   case X86ISD::VTRUNC: {

diff  --git a/llvm/test/CodeGen/X86/psubus.ll b/llvm/test/CodeGen/X86/psubus.ll
index 06240cd8bad3..351629a732c1 100644
--- a/llvm/test/CodeGen/X86/psubus.ll
+++ b/llvm/test/CodeGen/X86/psubus.ll
@@ -1403,11 +1403,6 @@ define <8 x i16> @psubus_8i32_max(<8 x i16> %x, <8 x 
i32> %y) nounwind {
 ; SSE2-NEXT:psrad $16, %xmm5
 ; SSE2-NEXT:packssdw %xmm6, %xmm5
 ; SSE2-NEXT:psubusw %xmm5, %xmm0
-; SSE2-NEXT:punpckhwd {{.*#+}} xmm1 = 
xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
-; SSE2-NEXT:psrad $16, %xmm1
-; SSE2-NEXT:punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
-; SSE2-NEXT:psrad $16, %xmm0
-; SSE2-NEXT:packssdw %xmm1, %xmm0
 ; SSE2-NEXT:retq
 ;
 ; SSSE3-LABEL: psubus_8i32_max:
@@ -1738,111 +1733,91 @@ define <16 x i16> @psubus_16i32_max(<16 x i16> %x, <16 
x i32> %y) nounwind {
 ; SSE2-LABEL: psubus_16i32_max:
 ; SSE2:   # %bb.0: # %vector.ph
 ; SSE2-NEXT:movdqa {{.*#+}} xmm9 = 
[2147483648,2147483648,2147483648,2147483648]
-; SSE2-NEXT:movdqa %xmm3, %xmm8
+; SSE2-NEXT:movdqa %xmm5, %xmm8
 ; SSE2-NEXT:pxor %xmm9, %xmm8
 ; SSE2-NEXT:movdqa {{.*#+}} xmm7 = 
[2147549183,2147549183,2147549183,2147549183]
 ; SSE2-NEXT:movdqa %xmm7, %xmm6
 ; SSE2-NEXT:pcmpgtd %xmm8, %xmm6
 ; SSE2-NEXT:pcmpeqd %xmm8, %xmm8
-; SSE2-NEXT:pand %xmm6, %xmm3
+; SSE2-NEXT:pand %xmm6, %xmm5
 ; SSE2-NEXT:pxor %xmm8, %xmm6
-; SSE2-NEXT:por %xmm3, %xmm6
+; SSE2-NEXT:por %xmm5, %xmm6
 ; SSE2-NEXT:pslld $16, %xmm6
 ; SSE2-NEXT:psrad $16, %xmm6
-; SSE2-NEXT:movdqa %xmm2, %xmm10
+; SSE2-NEXT:movdqa %xmm4, %xmm10
 ; SSE2-NEXT:pxor %xmm9, %xmm10
-; SSE2-NEXT:movdqa %xmm7, %xmm3
-; SSE2-NEXT:pcmpgtd %xmm10, %xmm3
-; SSE2-NEXT:pand %xmm3, %xmm2
-; SSE2-NEXT:pxor %xmm8, %xmm3
-; SSE2-NEXT:por %xmm2, %xmm3
-; SSE2-NEXT:pslld $16, %xmm3
-; SSE2-NEXT:psrad $16, %xmm3
-; SSE2-NEXT:packssdw %xmm6, %xmm3
-; SSE2-NEXT:movdqa %xmm5, %xmm2
-; SSE2-NEXT:pxor %xmm9, %xmm2
+; SSE2-NEXT:movdqa %xmm7, %xmm5
+; SSE2-NEXT:pcmpgtd %xmm10, %xmm5
+; SSE2-NEXT:pand %xmm5, %xmm4
+; SSE2-NEXT:pxor %xmm8, %xmm

[llvm-branch-commits] [mlir] 80f0785 - [mlir][Linalg] NFC - Refactor fusion APIs

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2021-01-12T14:27:15Z
New Revision: 80f078548868d0dd3d74ab8a1deb8aa46870cdf3

URL: 
https://github.com/llvm/llvm-project/commit/80f078548868d0dd3d74ab8a1deb8aa46870cdf3
DIFF: 
https://github.com/llvm/llvm-project/commit/80f078548868d0dd3d74ab8a1deb8aa46870cdf3.diff

LOG: [mlir][Linalg] NFC - Refactor fusion APIs

This revision uniformizes fusion APIs to allow passing OpOperand, OpResult and 
adds a finer level of control fusion.

Differential Revision: https://reviews.llvm.org/D94493

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
mlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
mlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp

Removed: 




diff  --git 
a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
index 3fc3fa4a5556..f3b7181d71a5 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
@@ -726,6 +726,18 @@ def LinalgStructuredInterface : OpInterface<"LinalgOp"> {
   getNumShapedOperands());
   }]
 >,
+InterfaceMethod<
+  /*desc=*/[{
+Return the OpOperands for all the shaped operands.
+  }],
+  /*retTy=*/" OpOperand&",
+  /*methodName=*/"getShapedOpOperand",
+  /*args=*/(ins "unsigned":$i),
+  /*methodBody=*/"",
+  /*defaultImplementation=*/[{
+return *(this->getShapedOpOperands().begin() + i);
+  }]
+>,
 InterfaceMethod<
   /*desc=*/[{
 Return the range over input and output operands.

diff  --git a/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h 
b/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
index d816414ef8b4..de1658f96a87 100644
--- a/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
+++ b/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
@@ -35,6 +35,7 @@ struct TiledLinalgOp {
   LinalgOp op;
   SmallVector loops;
   SmallVector tensorResults;
+  TiledLinalgOp &operator=(const TiledLinalgOp &) = default;
 };
 
 /// Populates patterns for vectorization of all ConvN-D ops.
@@ -412,9 +413,8 @@ struct LinalgBaseTilingPattern : public RewritePattern {
   LinalgTilingOptions options,
   LinalgMarker marker = LinalgMarker(),
   PatternBenefit benefit = 1);
-  LogicalResult
-  matchAndRewriteBase(Operation *op, PatternRewriter &rewriter,
-  SmallVectorImpl &tensorResults) const;
+  LogicalResult matchAndRewriteBase(Operation *op, PatternRewriter &rewriter,
+TiledLinalgOp &result) const;
 
 private:
   /// LinalgTransformMarker handles special attribute manipulations.
@@ -432,14 +432,14 @@ struct LinalgTilingPattern : public 
LinalgBaseTilingPattern {
 marker, benefit) {}
   LogicalResult matchAndRewrite(Operation *op,
 PatternRewriter &rewriter) const override {
-SmallVector tensorResults;
+TiledLinalgOp tiledLinalgOp;
 if (failed(LinalgBaseTilingPattern::matchAndRewriteBase(op, rewriter,
-tensorResults)))
+tiledLinalgOp)))
   return failure();
-if (tensorResults.empty())
+if (tiledLinalgOp.tensorResults.empty())
   rewriter.eraseOp(op);
 else
-  rewriter.replaceOp(op, tensorResults);
+  rewriter.replaceOp(op, tiledLinalgOp.tensorResults);
 return success();
   }
 };

diff  --git a/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h 
b/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
index 2ef32cfe378b..f194209f1910 100644
--- a/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
+++ b/mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
@@ -92,26 +92,31 @@ findAllFusableDependences(ArrayRef ops,
 
 /// Fuses producer into consumer if the producer is structurally feasible and
 /// the fusion would not violate dependencies.
-/// Implements the fusion part of the "tileAndFuse on buffers"
-/// transformation and thus requires the `consumerdIdx`^th operand of 
`consumer`
-/// to be a `subview` op (generally obtained by applying the tiling
-/// transformation).
-Optional fuseProducerOfBuffer(OpBuilder &b, LinalgOp consumer,
-  unsigned consumerIdx,
+/// Implements the fusion part of the "tileAndFuse on buffers" transformation
+/// and thus requires the `consumerOpOperand` to be a `subview` op (generally
+/// obtained by applying the ti

[llvm-branch-commits] [llvm] a675947 - [TableGen] Improve error message for semicolon after braced body.

[Paul C. Anagnostopoulos via llvm-branch-commits]

Author: Paul C. Anagnostopoulos
Date: 2021-01-12T09:38:05-05:00
New Revision: a6759477129c98820a56231d2f3fd27e5fe31ab3

URL: 
https://github.com/llvm/llvm-project/commit/a6759477129c98820a56231d2f3fd27e5fe31ab3
DIFF: 
https://github.com/llvm/llvm-project/commit/a6759477129c98820a56231d2f3fd27e5fe31ab3.diff

LOG: [TableGen] Improve error message for semicolon after braced body.

Add a test for this message.

Differential Revision: https://reviews.llvm.org/D94412

Added: 
llvm/test/TableGen/spurious-semi.td

Modified: 
llvm/lib/TableGen/TGParser.cpp

Removed: 




diff  --git a/llvm/lib/TableGen/TGParser.cpp b/llvm/lib/TableGen/TGParser.cpp
index 7918e2ac98f6..24949f0b2b4d 100644
--- a/llvm/lib/TableGen/TGParser.cpp
+++ b/llvm/lib/TableGen/TGParser.cpp
@@ -2836,7 +2836,7 @@ bool TGParser::ParseBody(Record *CurRec) {
 return false;
 
   if (!consume(tgtok::l_brace))
-return TokError("Expected ';' or '{' to start body");
+return TokError("Expected '{' to start body or ';' for declaration only");
 
   // An object body introduces a new scope for local variables.
   TGLocalVarScope *BodyScope = PushLocalScope();
@@ -2849,6 +2849,14 @@ bool TGParser::ParseBody(Record *CurRec) {
 
   // Eat the '}'.
   Lex.Lex();
+
+  // If we have a semicolon, print a gentle error.
+  SMLoc SemiLoc = Lex.getLoc();
+  if (consume(tgtok::semi)) {
+PrintError(SemiLoc, "A class or def body should not end with a semicolon");
+PrintNote("Semicolon ignored; remove to eliminate this error");
+  }
+
   return false;
 }
 
@@ -3432,6 +3440,13 @@ bool TGParser::ParseMultiClass() {
 }
 Lex.Lex();  // eat the '}'.
 
+// If we have a semicolon, print a gentle error.
+SMLoc SemiLoc = Lex.getLoc();
+if (consume(tgtok::semi)) {
+  PrintError(SemiLoc, "A multiclass body should not end with a semicolon");
+  PrintNote("Semicolon ignored; remove to eliminate this error");
+}
+
 PopLocalScope(MulticlassScope);
   }
 
@@ -3623,7 +3638,7 @@ bool TGParser::ParseFile() {
   if (Lex.getCode() == tgtok::Eof)
 return false;
 
-  return TokError("Unexpected input at top level");
+  return TokError("Unexpected token at top level");
 }
 
 // Check an assertion: Obtain the condition value and be sure it is true.

diff  --git a/llvm/test/TableGen/spurious-semi.td 
b/llvm/test/TableGen/spurious-semi.td
new file mode 100644
index ..9e3b7ada02de
--- /dev/null
+++ b/llvm/test/TableGen/spurious-semi.td
@@ -0,0 +1,39 @@
+// RUN: llvm-tblgen %s | FileCheck %s
+// RUN: not llvm-tblgen -DERROR1 %s 2>&1 | FileCheck --check-prefix=ERROR1 %s
+
+// This file tests the error message that is printed when a body is
+// terminated with a semicolon in addition to the close brace.
+
+// CHECK: class Class0
+// CHECK: def Rec0
+
+class Class0 {
+}
+
+def Rec0 {
+}
+
+multiclass MC0 {
+  def R;
+}
+
+#ifdef ERROR1
+
+// ERROR1: error: A class or def body should not end with a semicolon
+// ERROR1: Semicolon ignored
+// ERROR1: error: A class or def body should not end with a semicolon
+// ERROR1: Semicolon ignored
+// ERROR1: error: A multiclass body should not end with a semicolon
+// ERROR1: Semicolon ignored
+
+class Class1 {
+};
+
+def Rec1 {
+};
+
+multiclass MC1 {
+  def R;
+};
+
+#endif



___
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[llvm-branch-commits] [mlir] 0bd9a13 - [mlir][openacc] Use TableGen information for default enum

[via llvm-branch-commits]

Author: Valentin Clement
Date: 2021-01-12T09:42:42-05:00
New Revision: 0bd9a1369112f7d0a8a3b94a050fd5ed37037e9b

URL: 
https://github.com/llvm/llvm-project/commit/0bd9a1369112f7d0a8a3b94a050fd5ed37037e9b
DIFF: 
https://github.com/llvm/llvm-project/commit/0bd9a1369112f7d0a8a3b94a050fd5ed37037e9b.diff

LOG: [mlir][openacc] Use TableGen information for default enum

Use TableGen and information in ACC.td for the Default enum in the OpenACC 
dialect.
This patch generalize what was done for OpenMP for directives.

Follow up patch after D93576

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D93710

Added: 
mlir/test/mlir-tblgen/directive-common.td
mlir/tools/mlir-tblgen/DirectiveCommonGen.cpp

Modified: 
llvm/include/llvm/Frontend/OpenACC/ACC.td
mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
mlir/tools/mlir-tblgen/CMakeLists.txt

Removed: 
mlir/test/mlir-tblgen/openmp-common.td
mlir/tools/mlir-tblgen/OpenMPCommonGen.cpp



diff  --git a/llvm/include/llvm/Frontend/OpenACC/ACC.td 
b/llvm/include/llvm/Frontend/OpenACC/ACC.td
index d53d3132c969..58bb73fb6402 100644
--- a/llvm/include/llvm/Frontend/OpenACC/ACC.td
+++ b/llvm/include/llvm/Frontend/OpenACC/ACC.td
@@ -80,8 +80,8 @@ def ACCC_Create : Clause<"create"> {
 }
 
 // 2.5.15
-def ACC_Default_none : ClauseVal<"none", 1, 0> { let isDefault = 1; }
-def ACC_Default_present : ClauseVal<"present", 0, 0> {}
+def ACC_Default_none : ClauseVal<"none", 1, 1> { let isDefault = 1; }
+def ACC_Default_present : ClauseVal<"present", 0, 1> {}
 
 def ACCC_Default : Clause<"default"> {
   let flangClassValue = "AccDefaultClause";

diff  --git a/mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt 
b/mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
index 32b92096c71b..32b0c7f902ae 100644
--- a/mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
+++ b/mlir/include/mlir/Dialect/OpenACC/CMakeLists.txt
@@ -1,3 +1,7 @@
+set(LLVM_TARGET_DEFINITIONS 
${LLVM_MAIN_INCLUDE_DIR}/llvm/Frontend/OpenACC/ACC.td)
+mlir_tablegen(AccCommon.td --gen-directive-decl)
+add_public_tablegen_target(acc_common_td)
+
 set(LLVM_TARGET_DEFINITIONS OpenACCOps.td)
 mlir_tablegen(OpenACCOpsDialect.h.inc -gen-dialect-decls -dialect=acc)
 mlir_tablegen(OpenACCOps.h.inc -gen-op-decls)
@@ -6,4 +10,4 @@ mlir_tablegen(OpenACCOpsEnums.h.inc -gen-enum-decls)
 mlir_tablegen(OpenACCOpsEnums.cpp.inc -gen-enum-defs)
 add_mlir_doc(OpenACCOps -gen-dialect-doc OpenACCDialect Dialects/)
 add_public_tablegen_target(MLIROpenACCOpsIncGen)
-
+add_dependencies(OpenACCDialectDocGen acc_common_td)

diff  --git a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td 
b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
index 6feec888ec8e..a48af00535a7 100644
--- a/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+++ b/mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
@@ -14,6 +14,7 @@
 #define OPENACC_OPS
 
 include "mlir/IR/OpBase.td"
+include "mlir/Dialect/OpenACC/AccCommon.td"
 
 def OpenACC_Dialect : Dialect {
   let name = "acc";
@@ -63,15 +64,6 @@ def OpenACC_ReductionOpAttr : StrEnumAttr<"ReductionOpAttr",
 // Type used in operation below.
 def IntOrIndex : AnyTypeOf<[AnyInteger, Index]>;
 
-// Parallel and data op default enumeration
-def OpenACC_DefaultNone : StrEnumAttrCase<"none">;
-def OpenACC_DefaultPresent : StrEnumAttrCase<"present">;
-def OpenACC_DefaultAttr : StrEnumAttr<"DefaultAttr",
-"default attribute values",
-[OpenACC_DefaultNone, OpenACC_DefaultPresent]> {
-  let cppNamespace = "::mlir::acc";
-}
-
 
//===--===//
 // 2.5.1 parallel Construct
 
//===--===//
@@ -118,7 +110,7 @@ def OpenACC_ParallelOp : OpenACC_Op<"parallel",
Variadic:$attachOperands,
Variadic:$gangPrivateOperands,
Variadic:$gangFirstPrivateOperands,
-   OptionalAttr:$defaultAttr);
+   OptionalAttr:$defaultAttr);
 
   let regions = (region AnyRegion:$region);
 
@@ -190,7 +182,7 @@ def OpenACC_DataOp : OpenACC_Op<"data",
Variadic:$presentOperands,
Variadic:$deviceptrOperands,
Variadic:$attachOperands,
-   OptionalAttr:$defaultAttr);
+   OptionalAttr:$defaultAttr);
 
   let regions = (region AnyRegion:$region);
 

diff  --git a/mlir/test/mlir-tblgen/openmp-common.td 
b/mlir/test/mlir-tblgen/directive-common.td
similarity index 83%
rename from mlir/test/mlir-tblgen/openmp-common.td
rename to mlir/test/mlir-tblgen/directive-common.td
index 579988beda94..96439b40e9e8 100644
--- a/mlir/test/mlir-tblgen/openmp-common.td
+++ b/mlir/test/mlir-tblgen/directive-common.td
@@ -2,6 +2,11 @@
 
 include "llvm/Frontend/Directive/Dir

[llvm-branch-commits] [llvm] 07605ea - [X86] Improved lowering for saturating float to int.

[Bjorn Pettersson via llvm-branch-commits]

Author: Bevin Hansson
Date: 2021-01-12T15:44:41+01:00
New Revision: 07605ea1f3c94e0a23450f5c9ab3902862d7ff03

URL: 
https://github.com/llvm/llvm-project/commit/07605ea1f3c94e0a23450f5c9ab3902862d7ff03
DIFF: 
https://github.com/llvm/llvm-project/commit/07605ea1f3c94e0a23450f5c9ab3902862d7ff03.diff

LOG: [X86] Improved lowering for saturating float to int.

Adapted from D54696 by @nikic.

This patch improves lowering of saturating float to
int conversions, FP_TO_[SU]INT_SAT, for X86.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D86079

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
llvm/test/CodeGen/X86/fptoui-sat-scalar.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index f28e28689806..65b784f31842 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -284,6 +284,19 @@ X86TargetLowering::X86TargetLowering(const 
X86TargetMachine &TM,
 }
   }
 
+  if (Subtarget.hasSSE2()) {
+// Custom lowering for saturating float to int conversions.
+// We handle promotion to larger result types manually.
+for (MVT VT : { MVT::i8, MVT::i16, MVT::i32 }) {
+  setOperationAction(ISD::FP_TO_UINT_SAT, VT, Custom);
+  setOperationAction(ISD::FP_TO_SINT_SAT, VT, Custom);
+}
+if (Subtarget.is64Bit()) {
+  setOperationAction(ISD::FP_TO_UINT_SAT, MVT::i64, Custom);
+  setOperationAction(ISD::FP_TO_SINT_SAT, MVT::i64, Custom);
+}
+  }
+
   // Handle address space casts between mixed sized pointers.
   setOperationAction(ISD::ADDRSPACECAST, MVT::i32, Custom);
   setOperationAction(ISD::ADDRSPACECAST, MVT::i64, Custom);
@@ -21428,6 +21441,155 @@ SDValue X86TargetLowering::LRINT_LLRINTHelper(SDNode 
*N,
   return DAG.getLoad(DstVT, DL, Chain, StackPtr, MPI);
 }
 
+SDValue
+X86TargetLowering::LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const {
+  // This is based on the TargetLowering::expandFP_TO_INT_SAT implementation,
+  // but making use of X86 specifics to produce better instruction sequences.
+  SDNode *Node = Op.getNode();
+  bool IsSigned = Node->getOpcode() == ISD::FP_TO_SINT_SAT;
+  unsigned FpToIntOpcode = IsSigned ? ISD::FP_TO_SINT : ISD::FP_TO_UINT;
+  SDLoc dl(SDValue(Node, 0));
+  SDValue Src = Node->getOperand(0);
+
+  // There are three types involved here: SrcVT is the source floating point
+  // type, DstVT is the type of the result, and TmpVT is the result of the
+  // intermediate FP_TO_*INT operation we'll use (which may be a promotion of
+  // DstVT).
+  EVT SrcVT = Src.getValueType();
+  EVT DstVT = Node->getValueType(0);
+  EVT TmpVT = DstVT;
+
+  // This code is only for floats and doubles. Fall back to generic code for
+  // anything else.
+  if (!isScalarFPTypeInSSEReg(SrcVT))
+return SDValue();
+
+  unsigned SatWidth = Node->getConstantOperandVal(1);
+  unsigned DstWidth = DstVT.getScalarSizeInBits();
+  unsigned TmpWidth = TmpVT.getScalarSizeInBits();
+  assert(SatWidth <= DstWidth && SatWidth <= TmpWidth &&
+ "Expected saturation width smaller than result width");
+
+  // Promote result of FP_TO_*INT to at least 32 bits.
+  if (TmpWidth < 32) {
+TmpVT = MVT::i32;
+TmpWidth = 32;
+  }
+
+  // Promote conversions to unsigned 32-bit to 64-bit, because it will allow
+  // us to use a native signed conversion instead.
+  if (SatWidth == 32 && !IsSigned && Subtarget.is64Bit()) {
+TmpVT = MVT::i64;
+TmpWidth = 64;
+  }
+
+  // If the saturation width is smaller than the size of the temporary result,
+  // we can always use signed conversion, which is native.
+  if (SatWidth < TmpWidth)
+FpToIntOpcode = ISD::FP_TO_SINT;
+
+  // Determine minimum and maximum integer values and their corresponding
+  // floating-point values.
+  APInt MinInt, MaxInt;
+  if (IsSigned) {
+MinInt = APInt::getSignedMinValue(SatWidth).sextOrSelf(DstWidth);
+MaxInt = APInt::getSignedMaxValue(SatWidth).sextOrSelf(DstWidth);
+  } else {
+MinInt = APInt::getMinValue(SatWidth).zextOrSelf(DstWidth);
+MaxInt = APInt::getMaxValue(SatWidth).zextOrSelf(DstWidth);
+  }
+
+  APFloat MinFloat(DAG.EVTToAPFloatSemantics(SrcVT));
+  APFloat MaxFloat(DAG.EVTToAPFloatSemantics(SrcVT));
+
+  APFloat::opStatus MinStatus = MinFloat.convertFromAPInt(
+MinInt, IsSigned, APFloat::rmTowardZero);
+  APFloat::opStatus MaxStatus = MaxFloat.convertFromAPInt(
+MaxInt, IsSigned, APFloat::rmTowardZero);
+  bool AreExactFloatBounds = !(MinStatus & APFloat::opStatus::opInexact)
+  && !(MaxStatus & APFloat::opStatus::opInexact);
+
+  SDValue MinFloatNode = DAG.getConstantFP(MinFloat, dl, SrcVT);
+  SDValue MaxFloatNode = DAG.getConstantFP(MaxFloat, dl, SrcVT);
+
+  // If the integer bounds are exactly repr

[llvm-branch-commits] [llvm] 24faa87 - [VE] Update VELIntrinsic tests

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2021-01-13T00:12:50+09:00
New Revision: 24faa87075ac1b4e4d7f7336271b1ba72ffcc2c0

URL: 
https://github.com/llvm/llvm-project/commit/24faa87075ac1b4e4d7f7336271b1ba72ffcc2c0
DIFF: 
https://github.com/llvm/llvm-project/commit/24faa87075ac1b4e4d7f7336271b1ba72ffcc2c0.diff

LOG: [VE] Update VELIntrinsic tests

Update comment and style of regression tests for VELIntrinsic

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D94490

Added: 


Modified: 
llvm/test/CodeGen/VE/VELIntrinsics/vand.ll
llvm/test/CodeGen/VE/VELIntrinsics/vld.ll

Removed: 




diff  --git a/llvm/test/CodeGen/VE/VELIntrinsics/vand.ll 
b/llvm/test/CodeGen/VE/VELIntrinsics/vand.ll
index 17ab5d97b361..749ff16cd49c 100644
--- a/llvm/test/CodeGen/VE/VELIntrinsics/vand.ll
+++ b/llvm/test/CodeGen/VE/VELIntrinsics/vand.ll
@@ -4,8 +4,8 @@
 ;;;
 ;;; Note:
 ;;;   We test VAND*vvl, VAND*vvl_v, VAND*rvl, VAND*rvl_v, VAND*vvml_v,
-;;;   VAND*rvml_v, PVAND*vvl, PVAND*vvl_v, PVAND*rvl, PVAND*rvl_v, 
PVAND*vvml_v, and
-;;;   PVAND*rvml_v instructions.
+;;;   VAND*rvml_v, PVAND*vvl, PVAND*vvl_v, PVAND*rvl, PVAND*rvl_v, 
PVAND*vvml_v,
+;;;   and PVAND*rvml_v instructions.
 
 ; Function Attrs: nounwind readnone
 define fastcc <256 x double> @vand_vvvl(<256 x double> %0, <256 x double> %1) {

diff  --git a/llvm/test/CodeGen/VE/VELIntrinsics/vld.ll 
b/llvm/test/CodeGen/VE/VELIntrinsics/vld.ll
index d92666194edf..6068b816f911 100644
--- a/llvm/test/CodeGen/VE/VELIntrinsics/vld.ll
+++ b/llvm/test/CodeGen/VE/VELIntrinsics/vld.ll
@@ -3,7 +3,7 @@
 ;;; Test vector load intrinsic instructions
 ;;;
 ;;; Note:
-;;;   We test VLD*rrl, VLD*irl, VLD*rrl_v, VLD*irl_v
+;;;   We test VLD*rrl, VLD*irl, VLD*rrl_v, and VLD*irl_v instructions.
 
 ; Function Attrs: nounwind
 define void @vld_vssl(i8* %0, i64 %1) {
@@ -17,7 +17,7 @@ define void @vld_vssl(i8* %0, i64 %1) {
 ; CHECK-NEXT:#NO_APP
 ; CHECK-NEXT:b.l.t (, %s10)
   %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 %1, i8* %0, i32 
256)
-  tail call void asm sideeffect "vst $0, $1, $2", "v,r,r"(<256 x double> %3, 
i64 %1, i8* %0)
+  tail call void asm sideeffect "vst ${0:v}, $2, $1", "v,r,r"(<256 x double> 
%3, i8* %0, i64 %1)
   ret void
 }
 
@@ -38,7 +38,7 @@ define void @vld_vssvl(i8* %0, i64 %1, i8* %2) {
 ; CHECK-NEXT:b.l.t (, %s10)
   %4 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 %1, i8* %2, i32 
256)
   %5 = tail call fast <256 x double> @llvm.ve.vl.vld.vssvl(i64 %1, i8* %0, 
<256 x double> %4, i32 256)
-  tail call void asm sideeffect "vst $0, $1, $2", "v,r,r"(<256 x double> %5, 
i64 %1, i8* %0)
+  tail call void asm sideeffect "vst ${0:v}, $2, $1", "v,r,r"(<256 x double> 
%5, i8* %0, i64 %1)
   ret void
 }
 
@@ -57,7 +57,7 @@ define void @vld_vssl_imm(i8* %0) {
 ; CHECK-NEXT:#NO_APP
 ; CHECK-NEXT:b.l.t (, %s10)
   %2 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %0, i32 
256)
-  tail call void asm sideeffect "vst $0, 8, $1", "v,r"(<256 x double> %2, i8* 
%0)
+  tail call void asm sideeffect "vst ${0:v}, 8, $1", "v,r"(<256 x double> %2, 
i8* %0)
   ret void
 }
 
@@ -75,7 +75,7 @@ define void @vld_vssvl_imm(i8* %0, i8* %1) {
 ; CHECK-NEXT:b.l.t (, %s10)
   %3 = tail call fast <256 x double> @llvm.ve.vl.vld.vssl(i64 8, i8* %1, i32 
256)
   %4 = tail call fast <256 x double> @llvm.ve.vl.vld.vssvl(i64 8, i8* %0, <256 
x double> %3, i32 256)
-  tail call void asm sideeffect "vst $0, 8, $1", "v,r"(<256 x double> %4, i8* 
%0)
+  tail call void asm sideeffect "vst ${0:v}, 8, $1", "v,r"(<256 x double> %4, 
i8* %0)
   ret void
 }
 
@@ -91,7 +91,7 @@ define void @vldnc_vssl(i8* %0, i64 %1) {
 ; CHECK-NEXT:#NO_APP
 ; CHECK-NEXT:b.l.t (, %s10)
   %3 = tail call fast <256 x double> @llvm.ve.vl.vldnc.vssl(i64 %1, i8* %0, 
i32 256)
-  tail call void asm sideeffect "vst $0, $1, $2", "v,r,r"(<256 x double> %3, 
i64 %1, i8* %0)
+  tail call void asm sideeffect "vst ${0:v}, $2, $1", "v,r,r"(<256 x double> 
%3, i8* %0, i64 %1)
   ret void
 }
 
@@ -112,7 +112,7 @@ define void @vldnc_vssvl(i8* %0, i64 %1, i8* %2) {
 ; CHECK-NEXT:b.l.t (, %s10)
   %4 = tail call fast <256 x double> @llvm.ve.vl.vldnc.vssl(i64 %1, i8* %2, 
i32 256)
   %5 = tail call fast <256 x double> @llvm.ve.vl.vldnc.vssvl(i64 %1, i8* %0, 
<256 x double> %4, i32 256)
-  tail call void asm sideeffect "vst $0, $1, $2", "v,r,r"(<256 x double> %5, 
i64 %1, i8* %0)
+  tail call void asm sideeffect "vst ${0:v}, $2, $1", "v,r,r"(<256 x double> 
%5, i8* %0, i64 %1)
   ret void
 }
 
@@ -131,7 +131,7 @@ define void @vldnc_vssl_imm(i8* %0) {
 ; CHECK-NEXT:#NO_APP
 ; CHECK-NEXT:b.l.t (, %s10)
   %2 = tail call fast <256 x double> @llvm.ve.vl.vldnc.vssl(i64 8, i8* %0, i32 
256)
-  tail call void asm sideeffect "vst $0, 8, $1", "v,r"(<256 x double> %2, i8* 
%0)
+  tail call void asm sideeffect "vst ${0:v}, 8, $1", "v,r"(<256 x double> %2, 
i8* %0)
   

[llvm-branch-commits] [llvm] dd07d60 - [SLP] Add test case showing a bug when dealing with padded types

[Bjorn Pettersson via llvm-branch-commits]

Author: Bjorn Pettersson
Date: 2021-01-12T16:35:33+01:00
New Revision: dd07d60ec33969ae4f1e37500bb852563e142dfb

URL: 
https://github.com/llvm/llvm-project/commit/dd07d60ec33969ae4f1e37500bb852563e142dfb
DIFF: 
https://github.com/llvm/llvm-project/commit/dd07d60ec33969ae4f1e37500bb852563e142dfb.diff

LOG: [SLP] Add test case showing a bug when dealing with padded types

We shouldn't vectorize stores of non-packed types (i.e. types that
has padding between consecutive variables in a scalar layout,
but being packed in a vector layout).

The problem was detected as a miscompile in a downstream test case.

This is a pre-commit of a test case for the fix in D94446.

Added: 


Modified: 
llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll

Removed: 




diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll 
b/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
index b9fd032b5662..93a97c3c2405 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/bad_types.ll
@@ -15,8 +15,8 @@ define void @test1(x86_mmx %a, x86_mmx %b, i64* %ptr) {
 ; CHECK-NEXT:[[A_AND:%.*]] = and i64 [[A_CAST]], 42
 ; CHECK-NEXT:[[B_AND:%.*]] = and i64 [[B_CAST]], 42
 ; CHECK-NEXT:[[GEP:%.*]] = getelementptr i64, i64* [[PTR:%.*]], i32 1
-; CHECK-NEXT:store i64 [[A_AND]], i64* [[PTR]]
-; CHECK-NEXT:store i64 [[B_AND]], i64* [[GEP]]
+; CHECK-NEXT:store i64 [[A_AND]], i64* [[PTR]], align 8
+; CHECK-NEXT:store i64 [[B_AND]], i64* [[GEP]], align 8
 ; CHECK-NEXT:ret void
 ;
 entry:
@@ -110,3 +110,33 @@ bb1:  ; preds 
= %entry
 }
 
 declare void @f(i64, i64)
+
+define void @test4(i32 %a, i28* %ptr) {
+; Check that we do not vectorize types that are padded to a bigger ones.
+; FIXME: This is not correct! See D94446.
+;
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[TRUNC:%.*]] = trunc i32 [[A:%.*]] to i28
+; CHECK-NEXT:[[GEP1:%.*]] = getelementptr i28, i28* [[PTR:%.*]], i32 1
+; CHECK-NEXT:[[GEP2:%.*]] = getelementptr i28, i28* [[PTR]], i32 2
+; CHECK-NEXT:[[GEP3:%.*]] = getelementptr i28, i28* [[PTR]], i32 3
+; CHECK-NEXT:[[TMP0:%.*]] = insertelement <4 x i28> poison, i28 [[TRUNC]], 
i32 0
+; CHECK-NEXT:[[TMP1:%.*]] = insertelement <4 x i28> [[TMP0]], i28 
[[TRUNC]], i32 1
+; CHECK-NEXT:[[TMP2:%.*]] = insertelement <4 x i28> [[TMP1]], i28 
[[TRUNC]], i32 2
+; CHECK-NEXT:[[TMP3:%.*]] = insertelement <4 x i28> [[TMP2]], i28 
[[TRUNC]], i32 3
+; CHECK-NEXT:[[TMP4:%.*]] = bitcast i28* [[PTR]] to <4 x i28>*
+; CHECK-NEXT:store <4 x i28> [[TMP3]], <4 x i28>* [[TMP4]], align 4
+; CHECK-NEXT:ret void
+;
+entry:
+  %trunc = trunc i32 %a to i28
+  %gep1 = getelementptr i28, i28* %ptr, i32 1
+  %gep2 = getelementptr i28, i28* %ptr, i32 2
+  %gep3 = getelementptr i28, i28* %ptr, i32 3
+  store i28 %trunc, i28* %ptr
+  store i28 %trunc, i28* %gep1
+  store i28 %trunc, i28* %gep2
+  store i28 %trunc, i28* %gep3
+  ret void
+}



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[llvm-branch-commits] [clang] 3f7b4ce - [PowerPC] Add support for embedded devices with EFPU2

[Nemanja Ivanovic via llvm-branch-commits]

Author: Nemanja Ivanovic
Date: 2021-01-12T09:47:00-06:00
New Revision: 3f7b4ce96065eea66bf4344973173e76ec1a4255

URL: 
https://github.com/llvm/llvm-project/commit/3f7b4ce96065eea66bf4344973173e76ec1a4255
DIFF: 
https://github.com/llvm/llvm-project/commit/3f7b4ce96065eea66bf4344973173e76ec1a4255.diff

LOG: [PowerPC] Add support for embedded devices with EFPU2

PowerPC cores like e200z759n3 [1] using an efpu2 only support single precision
hardware floating point instructions. The single precision instructions efs*
and evfs* are identical to the spe float instructions while efd* and evfd*
instructions trigger a not implemented exception.

This patch introduces a new command line option -mefpu2 which leads to
single-hardware / double-software code generation.

[1] Core reference:
  https://www.nxp.com/files-static/32bit/doc/ref_manual/e200z759CRM.pdf

Differential revision: https://reviews.llvm.org/D92935

Added: 


Modified: 
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td
clang/lib/Basic/Targets/PPC.cpp
clang/test/Driver/ppc-features.cpp
llvm/lib/Target/PowerPC/PPC.td
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
llvm/test/CodeGen/PowerPC/spe.ll

Removed: 




diff  --git a/clang/docs/ClangCommandLineReference.rst 
b/clang/docs/ClangCommandLineReference.rst
index b46008970f57..ac97f6fed935 100644
--- a/clang/docs/ClangCommandLineReference.rst
+++ b/clang/docs/ClangCommandLineReference.rst
@@ -3145,6 +3145,8 @@ PowerPC
 
 .. option:: -mdirect-move, -mno-direct-move
 
+.. option:: -mefpu2
+
 .. option:: -mfloat128, -mno-float128
 
 .. option:: -mfprnd, -mno-fprnd

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 35643701f97e..d9586e086a9c 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -3040,6 +3040,7 @@ def mpcrel: Flag<["-"], "mpcrel">, 
Group;
 def mno_pcrel: Flag<["-"], "mno-pcrel">, Group;
 def mspe : Flag<["-"], "mspe">, Group;
 def mno_spe : Flag<["-"], "mno-spe">, Group;
+def mefpu2 : Flag<["-"], "mefpu2">, Group;
 def mabi_EQ_vec_extabi : Flag<["-"], "mabi=vec-extabi">, Group, 
Flags<[CC1Option]>,
   HelpText<"Enable the extended Altivec ABI on AIX (AIX only). Uses volatile 
and nonvolatile vector registers">;
 def mabi_EQ_vec_default : Flag<["-"], "mabi=vec-default">, Group, 
Flags<[CC1Option]>,

diff  --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 2be7555102f8..cfede6e6e756 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -56,7 +56,7 @@ bool 
PPCTargetInfo::handleTargetFeatures(std::vector &Features,
   HasP10Vector = true;
 } else if (Feature == "+pcrelative-memops") {
   HasPCRelativeMemops = true;
-} else if (Feature == "+spe") {
+} else if (Feature == "+spe" || Feature == "+efpu2") {
   HasSPE = true;
   LongDoubleWidth = LongDoubleAlign = 64;
   LongDoubleFormat = &llvm::APFloat::IEEEdouble();
@@ -402,6 +402,8 @@ bool PPCTargetInfo::hasFeature(StringRef Feature) const {
 void PPCTargetInfo::setFeatureEnabled(llvm::StringMap &Features,
   StringRef Name, bool Enabled) const {
   if (Enabled) {
+if (Name == "efpu2")
+  Features["spe"] = true;
 // If we're enabling any of the vsx based features then enable vsx and
 // altivec. We'll diagnose any problems later.
 bool FeatureHasVSX = llvm::StringSwitch(Name)
@@ -425,6 +427,8 @@ void PPCTargetInfo::setFeatureEnabled(llvm::StringMap 
&Features,
 else
   Features[Name] = true;
   } else {
+if (Name == "spe")
+  Features["efpu2"] = false;
 // If we're disabling altivec or vsx go ahead and disable all of the vsx
 // features.
 if ((Name == "altivec") || (Name == "vsx"))

diff  --git a/clang/test/Driver/ppc-features.cpp 
b/clang/test/Driver/ppc-features.cpp
index 85060951aa16..def96c351b34 100644
--- a/clang/test/Driver/ppc-features.cpp
+++ b/clang/test/Driver/ppc-features.cpp
@@ -155,6 +155,9 @@
 // CHECK-SPE: "-target-feature" "+spe"
 // CHECK-NOSPE: "-target-feature" "-spe"
 
+// RUN: %clang -target powerpc %s -mefpu2 -c -### 2>&1 | FileCheck 
-check-prefix=CHECK-EFPU2 %s
+// CHECK-EFPU2: "-target-feature" "+efpu2"
+
 // Assembler features
 // RUN: %clang -target powerpc-unknown-linux-gnu %s -### -o %t.o 
-no-integrated-as 2>&1 | FileCheck -check-prefix=CHECK_32_BE_AS_ARGS %s
 // CHECK_32_BE_AS_ARGS: "-mppc"

diff  --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td
index 2975ae161aaa..06403f5e55a2 100644
--- a/llvm/lib/Target/PowerPC/PPC.td
+++ b/llvm/lib/Target/PowerPC/PPC.td
@@ -72,6 +72,9 @@ def FeatureAltivec   : 
SubtargetFeature<"altivec","HasAltivec", "true",
 def FeatureSPE   : SubtargetFeature<"spe","HasSPE"

[llvm-branch-commits] [mlir] 4086072 - Reland "[mlir][linalg] Support parsing attributes in named op spec"

[Lei Zhang via llvm-branch-commits]

Author: Lei Zhang
Date: 2021-01-12T10:57:46-05:00
New Revision: 4086072f8a9200216088c435c9aa90a2d8ed74a5

URL: 
https://github.com/llvm/llvm-project/commit/4086072f8a9200216088c435c9aa90a2d8ed74a5
DIFF: 
https://github.com/llvm/llvm-project/commit/4086072f8a9200216088c435c9aa90a2d8ed74a5.diff

LOG: Reland "[mlir][linalg] Support parsing attributes in named op spec"

With this, now we can specify a list of attributes on named ops
generated from the spec. The format is defined as

```
attr-id ::= bare-id (`?`)?
attr-typedef ::= type (`[` `]`)?
attr-def ::= attr-id `:` attr-typedef

tc-attr-def ::= `attr` `(` attr-def-list `)`
tc-def ::= `def` bare-id
  `(`tensor-def-list`)` `->` `(` tensor-def-list`)`
  (tc-attr-def)?
```

For example,

```
ods_def
def some_op(...) -> (...)
attr(
  f32_attr: f32,
  i32_attr: i32,
  array_attr : f32[],
  optional_attr? : f32
)
```

where `?` means optional attribute and `[]` means array type.

Reviewed By: hanchung, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D94240

Added: 


Modified: 
mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp

Removed: 




diff  --git a/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc 
b/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
index f81380f02bb3..1ef128760637 100644
--- a/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
+++ b/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
@@ -72,3 +72,25 @@ ods_def :
 def test3(A: f32(Batch, M, K), B: f32(K, N)) -> (C: f32(Batch, M, N)) {
   C(b, m, n) = std_addf(std_mulf(A(b, m, k), B(k, n)));
 }
+
+// Test attribute definitions
+// ODS-LABEL: def Test4Op
+// ODS: F32ArrayAttr:$array_attr,
+// ODS: F32:$f32_attr,
+// ODS: RankedF32ElementsAttr<[4]>:$fvec_attr,
+// ODS: I32:$i32_attr,
+// ODS: RankedI32ElementsAttr<[5, 6]>:$ivec_attr,
+// ODS: OptionalAttr:$optional_attr
+//
+ods_def :
+def test4(A: f32(Batch, M, K), B: f32(K, N)) -> (C: f32(Batch, M, N))
+attr(
+  f32_attr: f32,
+  i32_attr: i32,
+  fvec_attr: 4xf32,
+  ivec_attr: 5x6xi32,
+  array_attr : f32[],
+  optional_attr? : f32
+) {
+  C(b, m, n) = std_addf(std_mulf(A(b, m, k), B(k, n)));
+}

diff  --git a/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp 
b/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
index 592e6cb774fb..138c5a4e904e 100644
--- a/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
+++ b/mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
@@ -20,11 +20,17 @@
 #include "mlir/Support/LLVM.h"
 #include "mlir/Support/LogicalResult.h"
 #include "llvm/ADT/SetVector.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/ADT/StringSwitch.h"
+#include "llvm/ADT/Twine.h"
 #include "llvm/Support/Casting.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/FormatVariadic.h"
 #include "llvm/Support/ToolOutputFile.h"
 
+#include 
+
 #define DEBUG_TYPE "linalg-ods-gen"
 
 static llvm::cl::OptionCategory ODSGenCat("Linalg ODS Gen");
@@ -79,11 +85,14 @@ class Token {
 gt,
 l_brace,
 l_paren,
+l_square,
 lt,
 minus,
 plus,
+question,
 r_brace,
 r_paren,
+r_square,
 semicolon,
 star,
 
@@ -91,6 +100,7 @@ class Token {
 kw_def,
 FIRST_KEYWORD = kw_def,
 kw_ods_def,
+kw_attr_def,
 kw_floordiv,
 kw_ceildiv,
 kw_mod,
@@ -151,6 +161,10 @@ class Lexer {
   Token emitError(llvm::SMLoc loc, const Twine &msg);
   Token emitError(const char *loc, const Twine &msg);
 
+  /// Change the position of the lexer cursor. The next token we lex will start
+  /// at the designated point in the input.
+  void resetPointer(const char *newPtr) { curPtr = newPtr; }
+
 private:
   Token formToken(Token::Kind kind, const char *tokStart) {
 return Token(kind, StringRef(tokStart, curPtr - tokStart));
@@ -247,10 +261,14 @@ Token Lexer::lexToken() {
   return formToken(Token::Kind::l_brace, tokStart);
 case '(':
   return formToken(Token::Kind::l_paren, tokStart);
+case '[':
+  return formToken(Token::Kind::l_square, tokStart);
 case '}':
   return formToken(Token::Kind::r_brace, tokStart);
 case ')':
   return formToken(Token::Kind::r_paren, tokStart);
+case ']':
+  return formToken(Token::Kind::r_square, tokStart);
 case '<':
   return formToken(Token::Kind::lt, tokStart);
 case '>':
@@ -263,6 +281,8 @@ Token Lexer::lexToken() {
   return formToken(Token::Kind::semicolon, tokStart);
 case '*':
   return formToken(Token::Kind::star, tokStart);
+case '?':
+  return formToken(Token::Kind::question, tokStart);
 case '/':
   if (*curPtr == '/') {
 skipComment();
@@ -289,6 +309,7 @@ Token Lexer::lexIdentifier(const char *tokStart) {
   // Check to see if this identifier is a keyword.
   StringRef str(tokStart, curPtr - tokStart);
   Token::Kind kind = S

[llvm-branch-commits] [mlir] 4fa01f7 - [mlir][CAPI] Fix inline function declaration

[Alex Zinenko via llvm-branch-commits]

Author: Vladislav Vinogradov
Date: 2021-01-12T17:05:02+01:00
New Revision: 4fa01f72de6cc48a44afe057c04803711160c92d

URL: 
https://github.com/llvm/llvm-project/commit/4fa01f72de6cc48a44afe057c04803711160c92d
DIFF: 
https://github.com/llvm/llvm-project/commit/4fa01f72de6cc48a44afe057c04803711160c92d.diff

LOG: [mlir][CAPI] Fix inline function declaration

Add `static` keyword, otherwise build fail with linker error for some cases.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D94496

Added: 


Modified: 
mlir/include/mlir-c/AffineExpr.h

Removed: 




diff  --git a/mlir/include/mlir-c/AffineExpr.h 
b/mlir/include/mlir-c/AffineExpr.h
index ec445682c011..d5c6e7b9f29e 100644
--- a/mlir/include/mlir-c/AffineExpr.h
+++ b/mlir/include/mlir-c/AffineExpr.h
@@ -50,7 +50,7 @@ MLIR_CAPI_EXPORTED bool mlirAffineExprEqual(MlirAffineExpr 
lhs,
 
 /// Returns `true` if the given affine expression is a null expression. Note
 /// constant zero is not a null expression.
-inline bool mlirAffineExprIsNull(MlirAffineExpr affineExpr) {
+inline static bool mlirAffineExprIsNull(MlirAffineExpr affineExpr) {
   return affineExpr.ptr == NULL;
 }
 



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[llvm-branch-commits] [mlir] 9667d15 - [mlir] Fix for LIT tests

[Alex Zinenko via llvm-branch-commits]

Author: Vladislav Vinogradov
Date: 2021-01-12T17:07:23+01:00
New Revision: 9667d15e7496e6d8c313251f22ac157dbbd0c1c2

URL: 
https://github.com/llvm/llvm-project/commit/9667d15e7496e6d8c313251f22ac157dbbd0c1c2
DIFF: 
https://github.com/llvm/llvm-project/commit/9667d15e7496e6d8c313251f22ac157dbbd0c1c2.diff

LOG: [mlir] Fix for LIT tests

Add `MLIR_SPIRV_CPU_RUNNER_ENABLED` to `llvm_canonicalize_cmake_booleans`.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D94407

Added: 


Modified: 
mlir/test/CMakeLists.txt

Removed: 




diff  --git a/mlir/test/CMakeLists.txt b/mlir/test/CMakeLists.txt
index f6d5af141630..293d93268a11 100644
--- a/mlir/test/CMakeLists.txt
+++ b/mlir/test/CMakeLists.txt
@@ -12,6 +12,7 @@ llvm_canonicalize_cmake_booleans(
   MLIR_CUDA_RUNNER_ENABLED
   MLIR_ROCM_CONVERSIONS_ENABLED
   MLIR_ROCM_RUNNER_ENABLED
+  MLIR_SPIRV_CPU_RUNNER_ENABLED
   MLIR_VULKAN_RUNNER_ENABLED
   )
 



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[llvm-branch-commits] [libcxx] 1f12501 - [libc++] [C++2b] [P1048] Add is_scoped_enum and is_scoped_enum_v.

[Marek Kurdej via llvm-branch-commits]

Author: Marek Kurdej
Date: 2021-01-12T17:08:20+01:00
New Revision: 1f1250151f222ba391d05dcc173f4b6c65d05ca2

URL: 
https://github.com/llvm/llvm-project/commit/1f1250151f222ba391d05dcc173f4b6c65d05ca2
DIFF: 
https://github.com/llvm/llvm-project/commit/1f1250151f222ba391d05dcc173f4b6c65d05ca2.diff

LOG: [libc++] [C++2b] [P1048] Add is_scoped_enum and is_scoped_enum_v.

* https://wg21.link/p1048

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D94409

Added: 

libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_scoped_enum.pass.cpp

Modified: 
libcxx/docs/Cxx2bStatusPaperStatus.csv
libcxx/docs/FeatureTestMacroTable.rst
libcxx/include/type_traits
libcxx/include/version

libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.pass.cpp

libcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
libcxx/utils/generate_feature_test_macro_components.py

Removed: 




diff  --git a/libcxx/docs/Cxx2bStatusPaperStatus.csv 
b/libcxx/docs/Cxx2bStatusPaperStatus.csv
index c79509528add..f5c893fdbd48 100644
--- a/libcxx/docs/Cxx2bStatusPaperStatus.csv
+++ b/libcxx/docs/Cxx2bStatusPaperStatus.csv
@@ -1,6 +1,6 @@
 "Paper #","Group","Paper Name","Meeting","Status","First released version"
 "`P0881R7 `__","LWG","A Proposal to add stacktrace 
library","Autumn 2020","",""
 "`P0943R6 `__","LWG","Support C atomics in 
C++","Autumn 2020","",""
-"`P1048R1 `__","LWG","A proposal for a type trait 
to detect scoped enumerations","Autumn 2020","",""
+"`P1048R1 `__","LWG","A proposal for a type trait 
to detect scoped enumerations","Autumn 2020","|Complete|","12.0"
 "`P1679R3 `__","LWG","string contains 
function","Autumn 2020","",""
 "","","","","",""

diff  --git a/libcxx/docs/FeatureTestMacroTable.rst 
b/libcxx/docs/FeatureTestMacroTable.rst
index 99fb4e790c7d..8221bbe2a4af 100644
--- a/libcxx/docs/FeatureTestMacroTable.rst
+++ b/libcxx/docs/FeatureTestMacroTable.rst
@@ -292,7 +292,7 @@ Status
 - -
 **C++ 2b**
 ---
-``__cpp_lib_is_scoped_enum``  *unimplemented*
+``__cpp_lib_is_scoped_enum``  ``202011L``
 - -
 ``__cpp_lib_stacktrace``  *unimplemented*
 - -

diff  --git a/libcxx/include/type_traits b/libcxx/include/type_traits
index 99b2a8f9f025..48884eab8e86 100644
--- a/libcxx/include/type_traits
+++ b/libcxx/include/type_traits
@@ -51,6 +51,7 @@ namespace std
 template  struct is_arithmetic;
 template  struct is_fundamental;
 template  struct is_member_pointer;
+template  struct is_scoped_enum; // C++2b
 template  struct is_scalar;
 template  struct is_object;
 template  struct is_compound;
@@ -284,6 +285,8 @@ namespace std
 = is_compound::value; // 
C++17
   template  inline constexpr bool is_member_pointer_v
 = is_member_pointer::value;   // 
C++17
+  template  inline constexpr bool is_scoped_enum_v
+= is_scoped_enum::value;  // 
C++2b
 
   // See C++14 20.10.4.3, type properties
   template  inline constexpr bool is_const_v
@@ -4177,6 +4180,25 @@ struct __has_operator_addressof
 
 #endif  // _LIBCPP_CXX03_LANG
 
+// is_scoped_enum [meta.unary.prop]
+
+#if _LIBCPP_STD_VER > 20
+template  >
+struct __is_scoped_enum_helper : false_type {};
+
+template 
+struct __is_scoped_enum_helper<_Tp, true>
+: public bool_constant > > 
{};
+
+template 
+struct _LIBCPP_TEMPLATE_VIS is_scoped_enum
+: public __is_scoped_enum_helper<_Tp> {};
+
+template 
+_LIBCPP_INLINE_VAR _LIBCPP_CONSTEXPR bool is_scoped_enum_v =
+is_scoped_enum<_Tp>::value;
+#endif
+
 #if _LIBCPP_STD_VER > 14
 
 template 

diff  --git a/libcxx/include/version b/libcxx/include/version
index 3920b69a601c..9e5fc81da44e 100644
--- a/libcxx/include/version
+++ b/libcxx/include/version
@@ -355,7 +355,7 @@ __cpp_lib_void_t
201411L 
 #endif
 
 #if _LIBCPP_STD_VER > 20
-// # define __cpp_lib_is_scoped_enum   202011L
+# define __cpp_lib_is_scoped_enum   202011L
 // # define __cpp_lib_stacktrace   202011L
 // # define __cpp_lib_stdatomic_h  202011L
 // # define __cpp_lib_string_contains  202011L

diff  --git 
a/libcxx/test/std/language.support/support.limits/supp

[llvm-branch-commits] [llvm] 93b54b7 - [PowerPC][NFCI] PassSubtarget to ASMWriter

[Jinsong Ji via llvm-branch-commits]

Author: Jinsong Ji
Date: 2021-01-12T16:25:35Z
New Revision: 93b54b7c6733fcb11fd6536499e73872d7452ffb

URL: 
https://github.com/llvm/llvm-project/commit/93b54b7c6733fcb11fd6536499e73872d7452ffb
DIFF: 
https://github.com/llvm/llvm-project/commit/93b54b7c6733fcb11fd6536499e73872d7452ffb.diff

LOG: [PowerPC][NFCI] PassSubtarget to ASMWriter

Subtarget feature bits are needed to change instprinter's behavior based
on feature bits.

Most of the other popular targets were updated back in 2015,
in https://reviews.llvm.org/rGb46d0234a6969
we should update it too.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D94449

Added: 


Modified: 
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
llvm/lib/Target/PowerPC/PPC.td

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp 
b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
index 2eff1d94ce20..a291a34d4c52 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
@@ -71,11 +71,11 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t 
Address,
"reference expression if it is an expression at all.");
 
 O << "\taddis ";
-printOperand(MI, 0, O);
+printOperand(MI, 0, STI, O);
 O << ", ";
-printOperand(MI, 2, O);
+printOperand(MI, 2, STI, O);
 O << "(";
-printOperand(MI, 1, O);
+printOperand(MI, 1, STI, O);
 O << ")";
 return;
   }
@@ -94,7 +94,7 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t 
Address,
   if (SymExpr && SymExpr->getKind() == MCSymbolRefExpr::VK_PPC_PCREL_OPT) {
 const MCSymbol &Symbol = SymExpr->getSymbol();
 if (MI->getOpcode() == PPC::PLDpc) {
-  printInstruction(MI, Address, O);
+  printInstruction(MI, Address, STI, O);
   O << "\n";
   Symbol.print(O, &MAI);
   O << ":";
@@ -124,9 +124,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t 
Address,
   SH = 32-SH;
 }
 if (useSubstituteMnemonic) {
-  printOperand(MI, 0, O);
+  printOperand(MI, 0, STI, O);
   O << ", ";
-  printOperand(MI, 1, O);
+  printOperand(MI, 1, STI, O);
   O << ", " << (unsigned int)SH;
 
   printAnnotation(O, Annot);
@@ -141,9 +141,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t 
Address,
 // rldicr RA, RS, SH, 63-SH == sldi RA, RS, SH
 if (63-SH == ME) {
   O << "\tsldi ";
-  printOperand(MI, 0, O);
+  printOperand(MI, 0, STI, O);
   O << ", ";
-  printOperand(MI, 1, O);
+  printOperand(MI, 1, STI, O);
   O << ", " << (unsigned int)SH;
   printAnnotation(O, Annot);
   return;
@@ -171,9 +171,9 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t 
Address,
 if (IsBookE && TH != 0 && TH != 16)
   O << (unsigned int) TH << ", ";
 
-printOperand(MI, 1, O);
+printOperand(MI, 1, STI, O);
 O << ", ";
-printOperand(MI, 2, O);
+printOperand(MI, 2, STI, O);
 
 if (!IsBookE && TH != 0 && TH != 16)
   O << ", " << (unsigned int) TH;
@@ -198,21 +198,22 @@ void PPCInstPrinter::printInst(const MCInst *MI, uint64_t 
Address,
 O << "stps";
   O << " ";
 
-  printOperand(MI, 1, O);
+  printOperand(MI, 1, STI, O);
   O << ", ";
-  printOperand(MI, 2, O);
+  printOperand(MI, 2, STI, O);
 
   printAnnotation(O, Annot);
   return;
 }
   }
 
-  if (!printAliasInstr(MI, Address, O))
-printInstruction(MI, Address, O);
+  if (!printAliasInstr(MI, Address, STI, O))
+printInstruction(MI, Address, STI, O);
   printAnnotation(O, Annot);
 }
 
 void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
+   const MCSubtargetInfo &STI,
raw_ostream &O,
const char *Modifier) {
   unsigned Code = MI->getOperand(OpNo).getImm();
@@ -306,10 +307,11 @@ void PPCInstPrinter::printPredicateOperand(const MCInst 
*MI, unsigned OpNo,
 
   assert(StringRef(Modifier) == "reg" &&
  "Need to specify 'cc', 'pm' or 'reg' as predicate op modifier!");
-  printOperand(MI, OpNo+1, O);
+  printOperand(MI, OpNo + 1, STI, O);
 }
 
 void PPCInstPrinter::printATBitsAsHint(const MCInst *MI, unsigned OpNo,
+   const MCSubtargetInfo &STI,
raw_ostream &O) {
   unsigned Code = MI->getOperand(OpNo).getImm();
   if (Code == 2)
@@ -319,6 +321,7 @@ void PPCInstPrinter::printATBitsAsHint(const MCInst *MI, 
unsigned OpNo,
 }
 
 void PPCInstPrinter::printU1ImmOperand(const MCInst *MI, unsigned OpNo,
+   const MCSubtargetInfo &STI,
 

[llvm-branch-commits] [mlir] 67a339e - [MLIR] Disallow `sym_visibility`, `sym_name` and `type` attributes in the parsed attribute dictionary.

[Rahul Joshi via llvm-branch-commits]

Author: Rahul Joshi
Date: 2021-01-12T09:11:02-08:00
New Revision: 67a339e96839cdecb5efad0e2731ab20a4ee458e

URL: 
https://github.com/llvm/llvm-project/commit/67a339e96839cdecb5efad0e2731ab20a4ee458e
DIFF: 
https://github.com/llvm/llvm-project/commit/67a339e96839cdecb5efad0e2731ab20a4ee458e.diff

LOG: [MLIR] Disallow `sym_visibility`, `sym_name` and `type` attributes in the 
parsed attribute dictionary.

Differential Revision: https://reviews.llvm.org/D94200

Added: 


Modified: 
mlir/lib/IR/FunctionImplementation.cpp
mlir/test/Dialect/Tosa/inlining.mlir
mlir/test/IR/core-ops.mlir
mlir/test/IR/invalid-func-op.mlir

Removed: 




diff  --git a/mlir/lib/IR/FunctionImplementation.cpp 
b/mlir/lib/IR/FunctionImplementation.cpp
index 90ea91d49fb6..4bec1684b5ee 100644
--- a/mlir/lib/IR/FunctionImplementation.cpp
+++ b/mlir/lib/IR/FunctionImplementation.cpp
@@ -180,7 +180,7 @@ mlir::impl::parseFunctionLikeOp(OpAsmParser &parser, 
OperationState &result,
 return failure();
 
   // Parse the function signature.
-  auto signatureLocation = parser.getCurrentLocation();
+  llvm::SMLoc signatureLocation = parser.getCurrentLocation();
   bool isVariadic = false;
   if (parseFunctionSignature(parser, allowVariadic, entryArgs, argTypes,
  argAttrs, isVariadic, resultTypes, resultAttrs))
@@ -196,9 +196,24 @@ mlir::impl::parseFunctionLikeOp(OpAsmParser &parser, 
OperationState &result,
<< (errorMessage.empty() ? "" : ": ") << errorMessage;
 
   // If function attributes are present, parse them.
-  if (parser.parseOptionalAttrDictWithKeyword(result.attributes))
+  NamedAttrList parsedAttributes;
+  llvm::SMLoc attributeDictLocation = parser.getCurrentLocation();
+  if (parser.parseOptionalAttrDictWithKeyword(parsedAttributes))
 return failure();
 
+  // Disallow attributes that are inferred from elsewhere in the attribute
+  // dictionary.
+  for (StringRef disallowed :
+   {SymbolTable::getVisibilityAttrName(), SymbolTable::getSymbolAttrName(),
+getTypeAttrName()}) {
+if (parsedAttributes.get(disallowed))
+  return parser.emitError(attributeDictLocation, "'")
+ << disallowed
+ << "' is an inferred attribute and should not be specified in the 
"
+"explicit attribute dictionary";
+  }
+  result.attributes.append(parsedAttributes);
+
   // Add the attributes to the function arguments.
   assert(argAttrs.size() == argTypes.size());
   assert(resultAttrs.size() == resultTypes.size());

diff  --git a/mlir/test/Dialect/Tosa/inlining.mlir 
b/mlir/test/Dialect/Tosa/inlining.mlir
index 363358b0781b..f6789fafe3ed 100644
--- a/mlir/test/Dialect/Tosa/inlining.mlir
+++ b/mlir/test/Dialect/Tosa/inlining.mlir
@@ -19,11 +19,11 @@ func @inlined_if_fn(%arg0: tensor, %arg1: tensor, 
%arg2: tensor) -
   }) : (tensor, tensor, tensor) -> tensor
   return %0 : tensor
 }
-func @add(%arg0: tensor, %arg1: tensor) -> tensor attributes 
{sym_visibility = "private"} {
+func private @add(%arg0: tensor, %arg1: tensor) -> tensor {
   %0 = "tosa.add"(%arg0, %arg1) : (tensor, tensor) -> tensor
   return %0 : tensor
 }
-func @sub(%arg0: tensor, %arg1: tensor) -> tensor attributes 
{sym_visibility = "private"} {
+func private @sub(%arg0: tensor, %arg1: tensor) -> tensor {
   %0 = "tosa.sub"(%arg0, %arg1) : (tensor, tensor) -> tensor
   return %0 : tensor
 }
@@ -45,12 +45,12 @@ func @inlined_while_fn(%arg0: tensor, %arg1: 
tensor, %arg2: tensor, tensor, tensor, tensor<10xi32>) -> 
(tensor, tensor, tensor, tensor<10xi32>)
   return %1#3 : tensor<10xi32>
 }
-func @while_body_50(%arg0: tensor, %arg1: tensor, %arg2: 
tensor, %arg3: tensor<10xi32>) -> (tensor, tensor, tensor, 
tensor<10xi32>) attributes {sym_visibility = "private"} {
+func private @while_body_50(%arg0: tensor, %arg1: tensor, %arg2: 
tensor, %arg3: tensor<10xi32>) -> (tensor, tensor, tensor, 
tensor<10xi32>) {
   %1 = "tosa.add"(%arg0, %arg1) : (tensor, tensor) -> tensor
   %2 = "tosa.add"(%arg3, %1) : (tensor<10xi32>, tensor) -> tensor<10xi32>
   return %1, %arg1, %arg2, %2: tensor, tensor, tensor, 
tensor<10xi32>
 }
-func @while_cond_40(%arg0: tensor, %arg1: tensor, %arg2: 
tensor, %arg3: tensor<10xi32>) -> tensor attributes {sym_visibility = 
"private"} {
+func private @while_cond_40(%arg0: tensor, %arg1: tensor, %arg2: 
tensor, %arg3: tensor<10xi32>) -> tensor {
   %0 = "tosa.greater_equal"(%arg0, %arg1) : (tensor, tensor) -> 
tensor
   %1 = "tosa.logical_not"(%0) : (tensor) -> tensor
   return %1 : tensor

diff  --git a/mlir/test/IR/core-ops.mlir b/mlir/test/IR/core-ops.mlir
index fc712d4939ba..396211c10430 100644
--- a/mlir/test/IR/core-ops.mlir
+++ b/mlir/test/IR/core-ops.mlir
@@ -942,6 +942,3 @@ func @subtensor_insert(%t: tensor<8x16x4xf32>, %t2: 
tensor<16x32x8xf32>, %idx :
 
   return
 }
-
-// CHECK-LABEL: func private @legacy_visibility_syntax
-func @legacy_visibility_syntax() attri

[llvm-branch-commits] [llvm] 85aaa3e - [X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-12T17:25:30Z
New Revision: 85aaa3e310c23ec8a375b7a2e2fceee5a72441ef

URL: 
https://github.com/llvm/llvm-project/commit/85aaa3e310c23ec8a375b7a2e2fceee5a72441ef
DIFF: 
https://github.com/llvm/llvm-project/commit/85aaa3e310c23ec8a375b7a2e2fceee5a72441ef.diff

LOG: [X86] Regenerate sdiv_fix_sat.ll + udiv_fix_sat.ll tests

Adding missing libcall PLT qualifiers

Added: 


Modified: 
llvm/test/CodeGen/X86/sdiv_fix_sat.ll
llvm/test/CodeGen/X86/udiv_fix_sat.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/sdiv_fix_sat.ll 
b/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
index 512488e8f872..617d5d7876bd 100644
--- a/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
@@ -322,7 +322,7 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
 ; X64-NEXT:movq %r15, %rdi
 ; X64-NEXT:movq %r12, %rsi
 ; X64-NEXT:movq %r13, %rcx
-; X64-NEXT:callq __divti3
+; X64-NEXT:callq __divti3@PLT
 ; X64-NEXT:movq %rax, %rbx
 ; X64-NEXT:movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:movq %rdx, %rbp
@@ -338,7 +338,7 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
 ; X64-NEXT:movq %r12, %rsi
 ; X64-NEXT:movq (%rsp), %rdx # 8-byte Reload
 ; X64-NEXT:movq %r13, %rcx
-; X64-NEXT:callq __modti3
+; X64-NEXT:callq __modti3@PLT
 ; X64-NEXT:orq %rax, %rdx
 ; X64-NEXT:setne %al
 ; X64-NEXT:testb %r14b, %al
@@ -613,7 +613,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r12, %rdi
 ; X64-NEXT:movq %rbp, %rsi
 ; X64-NEXT:movq %r15, %rcx
-; X64-NEXT:callq __divti3
+; X64-NEXT:callq __divti3@PLT
 ; X64-NEXT:movq %rax, %r13
 ; X64-NEXT:movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:movq %rdx, %r14
@@ -626,7 +626,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %rbp, %rsi
 ; X64-NEXT:movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:movq %r15, %rcx
-; X64-NEXT:callq __modti3
+; X64-NEXT:callq __modti3@PLT
 ; X64-NEXT:orq %rax, %rdx
 ; X64-NEXT:setne %al
 ; X64-NEXT:testb %bl, %al
@@ -668,7 +668,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r15, %rdi
 ; X64-NEXT:movq %r13, %rsi
 ; X64-NEXT:movq %rbp, %rcx
-; X64-NEXT:callq __divti3
+; X64-NEXT:callq __divti3@PLT
 ; X64-NEXT:movq %rax, %r12
 ; X64-NEXT:movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:movq %rdx, %r14
@@ -681,7 +681,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r13, %rsi
 ; X64-NEXT:movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:movq %rbp, %rcx
-; X64-NEXT:callq __modti3
+; X64-NEXT:callq __modti3@PLT
 ; X64-NEXT:orq %rax, %rdx
 ; X64-NEXT:setne %al
 ; X64-NEXT:testb %bl, %al
@@ -735,7 +735,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r15, %rdi
 ; X64-NEXT:movq %r12, %rsi
 ; X64-NEXT:movq %rbp, %rcx
-; X64-NEXT:callq __divti3
+; X64-NEXT:callq __divti3@PLT
 ; X64-NEXT:movq %rax, %r13
 ; X64-NEXT:movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:movq %rdx, %r14
@@ -748,7 +748,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r12, %rsi
 ; X64-NEXT:movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:movq %rbp, %rcx
-; X64-NEXT:callq __modti3
+; X64-NEXT:callq __modti3@PLT
 ; X64-NEXT:orq %rax, %rdx
 ; X64-NEXT:setne %al
 ; X64-NEXT:testb %bl, %al
@@ -790,7 +790,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r15, %rdi
 ; X64-NEXT:movq %r13, %rsi
 ; X64-NEXT:movq %rbp, %rcx
-; X64-NEXT:callq __divti3
+; X64-NEXT:callq __divti3@PLT
 ; X64-NEXT:movq %rax, %r12
 ; X64-NEXT:movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
 ; X64-NEXT:movq %rdx, %r14
@@ -803,7 +803,7 @@ define <4 x i32> @vec(<4 x i32> %x, <4 x i32> %y) nounwind {
 ; X64-NEXT:movq %r13, %rsi
 ; X64-NEXT:movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
 ; X64-NEXT:movq %rbp, %rcx
-; X64-NEXT:callq __modti3
+; X64-NEXT:callq __modti3@PLT
 ; X64-NEXT:orq %rax, %rdx
 ; X64-NEXT:setne %al
 ; X64-NEXT:testb %bl, %al

diff  --git a/llvm/test/CodeGen/X86/udiv_fix_sat.ll 
b/llvm/test/CodeGen/X86/udiv_fix_sat.ll
index d2e3b80c2145..2be51c3ccbba 100644
--- a/llvm/test/CodeGen/X86/udiv_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/udiv_fix_sat.ll
@@ -179,7 +179,7 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
 ; X64-NEXT:shlq $32, %rdi
 ; X64-NEXT:xorl %ebx, %ebx
 ; X64-NEXT:xorl %ecx, %ecx
-; X64-NEXT:callq __udivti3
+; X64-NEXT:callq __udivti3@PLT
 ; X64-NEXT:cmpq $-1, %rax
 ; X64-NEXT:movq $-1, %rcx
 ; X

[llvm-branch-commits] [clang] dd95577 - Fix typo in diagnostic message

[Akira Hatanaka via llvm-branch-commits]

Author: Akira Hatanaka
Date: 2021-01-12T09:58:11-08:00
New Revision: dd955771240289fbcba5fa1312cb8c78f20cd78f

URL: 
https://github.com/llvm/llvm-project/commit/dd955771240289fbcba5fa1312cb8c78f20cd78f
DIFF: 
https://github.com/llvm/llvm-project/commit/dd955771240289fbcba5fa1312cb8c78f20cd78f.diff

LOG: Fix typo in diagnostic message

rdar://66684531

Added: 


Modified: 
clang/include/clang/Basic/DiagnosticSemaKinds.td

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 19b003398b02..717bf6e12ccd 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -3263,7 +3263,7 @@ def warn_attribute_dllexport_explicit_instantiation_def : 
Warning<
   "'dllexport' attribute ignored on explicit instantiation definition">,
   InGroup;
 def warn_invalid_initializer_from_system_header : Warning<
-  "invalid constructor form class in system header, should not be explicit">,
+  "invalid constructor from class in system header, should not be explicit">,
   InGroup>;
 def note_used_in_initialization_here : Note<"used in initialization here">;
 def err_attribute_dll_member_of_dll_class : Error<



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[llvm-branch-commits] [llvm] a4931d4 - [AMDGPU] Regenerate umax crash test

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-12T18:02:15Z
New Revision: a4931d4fe38d6feef53f97f3dcc7792bfcb06c84

URL: 
https://github.com/llvm/llvm-project/commit/a4931d4fe38d6feef53f97f3dcc7792bfcb06c84
DIFF: 
https://github.com/llvm/llvm-project/commit/a4931d4fe38d6feef53f97f3dcc7792bfcb06c84.diff

LOG: [AMDGPU] Regenerate umax crash test

Added: 


Modified: 
llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll

Removed: 




diff  --git a/llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll 
b/llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll
index b7ed34bbf09b..b4cd36daad65 100644
--- a/llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll
+++ b/llvm/test/CodeGen/AMDGPU/r600-legalize-umax-bug.ll
@@ -1,8 +1,27 @@
-; RUN: llc -march=r600 -mcpu=cypress -start-after safe-stack %s -o - | 
FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -march=r600 -mcpu=cypress -start-after safe-stack | FileCheck 
%s
 ; Don't crash
 
-; CHECK: MAX_UINT
 define amdgpu_kernel void @test(i64 addrspace(1)* %out) {
+; CHECK-LABEL: test:
+; CHECK:   ; %bb.0: ; %bb
+; CHECK-NEXT:ALU 4, @6, KC0[CB0:0-32], KC1[]
+; CHECK-NEXT:MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 0
+; CHECK-NEXT:ALU 3, @11, KC0[], KC1[]
+; CHECK-NEXT:MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
+; CHECK-NEXT:CF_END
+; CHECK-NEXT:PAD
+; CHECK-NEXT:ALU clause starting at 6:
+; CHECK-NEXT: MOV T0.X, literal.x,
+; CHECK-NEXT: MOV T0.Y, 0.0,
+; CHECK-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
+; CHECK-NEXT:2(2.802597e-45), 0(0.00e+00)
+; CHECK-NEXT: MOV * T0.W, KC0[2].Y,
+; CHECK-NEXT:ALU clause starting at 11:
+; CHECK-NEXT: MAX_UINT T0.X, T0.X, literal.x,
+; CHECK-NEXT: MOV T0.Y, 0.0,
+; CHECK-NEXT: LSHR * T1.X, T0.W, literal.y,
+; CHECK-NEXT:4(5.605194e-45), 2(2.802597e-45)
 bb:
   store i64 2, i64 addrspace(1)* %out
   %tmp = load i64, i64 addrspace(1)* %out



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[llvm-branch-commits] [llvm] 3d9c51d - [SVE][NFC] Regenerate a few CodeGen tests

[Cullen Rhodes via llvm-branch-commits]

Author: Cullen Rhodes
Date: 2021-01-12T18:10:36Z
New Revision: 3d9c51d111d0c8480d10fc48fb621bac1d080449

URL: 
https://github.com/llvm/llvm-project/commit/3d9c51d111d0c8480d10fc48fb621bac1d080449
DIFF: 
https://github.com/llvm/llvm-project/commit/3d9c51d111d0c8480d10fc48fb621bac1d080449.diff

LOG: [SVE][NFC] Regenerate a few CodeGen tests

Regenerated using llvm/utils/update_llc_test_checks.py as part of
D94504, committing separately to reduce the diff for D94504.

Added: 


Modified: 
llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll

llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll

llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll

Removed: 




diff  --git a/llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll 
b/llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
index be1c03a754fe..44d4b1d27560 100644
--- a/llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
+++ b/llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
 ; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
 
@@ -10,18 +11,20 @@
 
 define  @ldnf1b( %pg, i8* %a) {
 ; CHECK-LABEL: ldnf1b:
-; CHECK: ldnf1b { z0.b }, p0/z, [x0]
-; CHECK-NEXT: ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ldnf1b { z0.b }, p0/z, [x0]
+; CHECK-NEXT:ret
   %load = call  @llvm.aarch64.sve.ldnf1.nxv16i8( %pg, i8* %a)
   ret  %load
 }
 
 define  @ldnf1b_out_of_lower_bound( %pg, 
i8* %a) {
 ; CHECK-LABEL: ldnf1b_out_of_lower_bound:
-; CHECK:   rdvlx[[OFFSET:[0-9]+]], #-9
-; CHECK-NEXT:  add x[[BASE:[0-9]+]], x0, x[[OFFSET]]
-; CHECK-NEXT:  ldnf1b { z0.b }, p0/z, [x[[BASE]]]
-; CHECK-NEXT:  ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:rdvl x8, #-9
+; CHECK-NEXT:add x8, x0, x8
+; CHECK-NEXT:ldnf1b { z0.b }, p0/z, [x8]
+; CHECK-NEXT:ret
   %base_scalable = bitcast i8* %a to *
   %base = getelementptr , * 
%base_scalable, i64 -9
   %base_scalar = bitcast * %base to i8*
@@ -31,8 +34,9 @@ define  @ldnf1b_out_of_lower_bound( %pg, i8*
 
 define  @ldnf1b_lower_bound( %pg, i8* %a) {
 ; CHECK-LABEL: ldnf1b_lower_bound:
-; CHECK: ldnf1b { z0.b }, p0/z, [x0, #-8, mul vl]
-; CHECK-NEXT: ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ldnf1b { z0.b }, p0/z, [x0, #-8, mul vl]
+; CHECK-NEXT:ret
   %base_scalable = bitcast i8* %a to *
   %base = getelementptr , * 
%base_scalable, i64 -8
   %base_scalar = bitcast * %base to i8*
@@ -42,8 +46,9 @@ define  @ldnf1b_lower_bound( %pg, i8* %a) {
 
 define  @ldnf1b_inbound( %pg, i8* %a) {
 ; CHECK-LABEL: ldnf1b_inbound:
-; CHECK: ldnf1b { z0.b }, p0/z, [x0, #1, mul vl]
-; CHECK-NEXT: ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ldnf1b { z0.b }, p0/z, [x0, #1, mul vl]
+; CHECK-NEXT:ret
   %base_scalable = bitcast i8* %a to *
   %base = getelementptr , * 
%base_scalable, i64 1
   %base_scalar = bitcast * %base to i8*
@@ -53,8 +58,9 @@ define  @ldnf1b_inbound( 
%pg, i8* %a) {
 
 define  @ldnf1b_upper_bound( %pg, i8* %a) {
 ; CHECK-LABEL: ldnf1b_upper_bound:
-; CHECK: ldnf1b { z0.b }, p0/z, [x0, #7, mul vl]
-; CHECK-NEXT: ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ldnf1b { z0.b }, p0/z, [x0, #7, mul vl]
+; CHECK-NEXT:ret
   %base_scalable = bitcast i8* %a to *
   %base = getelementptr , * 
%base_scalable, i64 7
   %base_scalar = bitcast * %base to i8*
@@ -64,10 +70,11 @@ define  @ldnf1b_upper_bound( %pg, i8* %a) {
 
 define  @ldnf1b_out_of_upper_bound( %pg, 
i8* %a) {
 ; CHECK-LABEL: ldnf1b_out_of_upper_bound:
-; CHECK:   rdvlx[[OFFSET:[0-9]+]], #8
-; CHECK-NEXT:  add x[[BASE:[0-9]+]], x0, x[[OFFSET]]
-; CHECK-NEXT:  ldnf1b { z0.b }, p0/z, [x[[BASE]]]
-; CHECK-NEXT:  ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:rdvl x8, #8
+; CHECK-NEXT:add x8, x0, x8
+; CHECK-NEXT:ldnf1b { z0.b }, p0/z, [x8]
+; CHECK-NEXT:ret
   %base_scalable = bitcast i8* %a to *
   %base = getelementptr , * 
%base_scalable, i64 8
   %base_scalar = bitcast * %base to i8*
@@ -77,8 +84,9 @@ define  @ldnf1b_out_of_upper_bound( %pg, i8*
 
 define  @ldnf1b_h( %pg, i8* %a) {
 ; CHECK-LABEL: ldnf1b_h:
-; CHECK: ldnf1b { z0.h }, p0/z, [x0]
-; CHECK-NEXT: ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ldnf1b { z0.h }, p0/z, [x0]
+; CHECK-NEXT:ret
   %load = call  @llvm.aarch64.sve.ldnf1.nxv8i8( %pg, i8* %a)
   %res = zext  %load to 
   ret  %res
@@ -86,8 +94,9 @@ define  @ldnf1b_h( %pg, 
i8* %a) {
 
 define  @ldnf1b_h_inbound( %pg, i8* %a) {
 ; CHECK-LABEL: ldnf1b_h_inbound:
-; CHECK: ldnf1b { z0.h }, p0/z, [x0, #7, mul vl]
-; CHECK-NEXT: ret
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ldnf1b { z0.h }, p0/z, [x0, #7, mul vl]
+; CHECK-NEXT:ret
   %base_scalable = bitcast i8* %a to *
   %base = getelementptr , * %base_scalable, 
i64 7
   %base_scalar = bitcast * %bas

[llvm-branch-commits] [clang] 3484715 - Add -ansi option to CompileOnly group

[Aaron Ballman via llvm-branch-commits]

Author: Timm Bäder
Date: 2021-01-12T13:16:49-05:00
New Revision: 348471575d9c24bbfb124ca5eac1589de075da88

URL: 
https://github.com/llvm/llvm-project/commit/348471575d9c24bbfb124ca5eac1589de075da88
DIFF: 
https://github.com/llvm/llvm-project/commit/348471575d9c24bbfb124ca5eac1589de075da88.diff

LOG: Add -ansi option to CompileOnly group

-ansi is documented as being the "same as -std=c89", but there are
differences when passing it to a link.

Adding -ansi to said group makes sense since it's supposed to be an
alias for -std=c89 and resolves this inconsistency.

Added: 


Modified: 
clang/include/clang/Driver/Options.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index d9586e086a9c..b441c1b4c169 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -800,7 +800,7 @@ def Z_Flag : Flag<["-"], "Z">, Group;
 def Z_Joined : Joined<["-"], "Z">;
 def all__load : Flag<["-"], "all_load">;
 def allowable__client : Separate<["-"], "allowable_client">;
-def ansi : Flag<["-", "--"], "ansi">;
+def ansi : Flag<["-", "--"], "ansi">, Group;
 def arch__errors__fatal : Flag<["-"], "arch_errors_fatal">;
 def arch : Separate<["-"], "arch">, Flags<[NoXarchOption]>;
 def arch__only : Separate<["-"], "arch_only">;



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[llvm-branch-commits] [lld] b117d17 - [doc] Place sha256 in lld/README.md into backticks

[Shoaib Meenai via llvm-branch-commits]

Author: Emil Engler
Date: 2021-01-12T10:19:40-08:00
New Revision: b117d17d264f448e0b037a62f5a48ec9aedd886c

URL: 
https://github.com/llvm/llvm-project/commit/b117d17d264f448e0b037a62f5a48ec9aedd886c
DIFF: 
https://github.com/llvm/llvm-project/commit/b117d17d264f448e0b037a62f5a48ec9aedd886c.diff

LOG: [doc] Place sha256 in lld/README.md into backticks

Reviewed By: smeenai

Differential Revision: https://reviews.llvm.org/D93984

Added: 


Modified: 
lld/README.md

Removed: 




diff  --git a/lld/README.md b/lld/README.md
index 3b8cd7a14948..3b693c9957ee 100644
--- a/lld/README.md
+++ b/lld/README.md
@@ -16,4 +16,4 @@ same tests, we create a collection of self contained programs.
 
 It is hosted at 
https://s3-us-west-2.amazonaws.com/linker-tests/lld-speed-test.tar.xz
 
-The current sha256 is 
10eec685463d5a8bbf08d77f4ca96282161d396c65bd97dc99dbde644a31610f.
+The current sha256 is 
`10eec685463d5a8bbf08d77f4ca96282161d396c65bd97dc99dbde644a31610f`.



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[llvm-branch-commits] [clang] ef3800e - Return false from __has_declspec_attribute() if not explicitly enabled

[Aaron Ballman via llvm-branch-commits]

Author: Timm Bäder
Date: 2021-01-12T13:20:08-05:00
New Revision: ef3800e82169c674219501d9ac09ef12b28e6359

URL: 
https://github.com/llvm/llvm-project/commit/ef3800e82169c674219501d9ac09ef12b28e6359
DIFF: 
https://github.com/llvm/llvm-project/commit/ef3800e82169c674219501d9ac09ef12b28e6359.diff

LOG: Return false from __has_declspec_attribute() if not explicitly enabled

Currently, projects can check for __has_declspec_attribute() and use
it accordingly, but the check for __has_declspec_attribute will return
true even if declspec attributes are not enabled for the target.

This changes Clang to instead return false when declspec attributes are
not supported for the target.

Added: 


Modified: 
clang/lib/Lex/PPMacroExpansion.cpp

Removed: 




diff  --git a/clang/lib/Lex/PPMacroExpansion.cpp 
b/clang/lib/Lex/PPMacroExpansion.cpp
index 3969630f2002..43d31d6c5732 100644
--- a/clang/lib/Lex/PPMacroExpansion.cpp
+++ b/clang/lib/Lex/PPMacroExpansion.cpp
@@ -1693,8 +1693,14 @@ void Preprocessor::ExpandBuiltinMacro(Token &Tok) {
   [this](Token &Tok, bool &HasLexedNextToken) -> int {
 IdentifierInfo *II = ExpectFeatureIdentifierInfo(Tok, *this,
diag::err_feature_check_malformed);
-return II ? hasAttribute(AttrSyntax::Declspec, nullptr, II,
- getTargetInfo(), getLangOpts()) : 0;
+if (II) {
+  const LangOptions &LangOpts = getLangOpts();
+  return LangOpts.DeclSpecKeyword &&
+ hasAttribute(AttrSyntax::Declspec, nullptr, II,
+  getTargetInfo(), LangOpts);
+}
+
+return false;
   });
   } else if (II == Ident__has_cpp_attribute ||
  II == Ident__has_c_attribute) {



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[llvm-branch-commits] [llvm] 5aefc8d - [llvm] [cmake] Remove obsolete /usr/local hack for *BSD

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2021-01-12T19:26:04+01:00
New Revision: 5aefc8dc4d14ad04259ab8ae0b2e0da2596d66f7

URL: 
https://github.com/llvm/llvm-project/commit/5aefc8dc4d14ad04259ab8ae0b2e0da2596d66f7
DIFF: 
https://github.com/llvm/llvm-project/commit/5aefc8dc4d14ad04259ab8ae0b2e0da2596d66f7.diff

LOG: [llvm] [cmake] Remove obsolete /usr/local hack for *BSD

Remove the hack adding /usr/local paths on FreeBSD and DragonFlyBSD.
It does not seem to be necessary today, and it breaks cross builds.

Differential Revision: https://reviews.llvm.org/D94491

Added: 


Modified: 
llvm/CMakeLists.txt

Removed: 




diff  --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index ee1b646ab651..26a7029afefd 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -911,13 +911,6 @@ if(LLVM_TARGET_IS_CROSSCOMPILE_HOST)
 # (this is a variable that CrossCompile sets on recursive invocations)
 endif()
 
-if(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)")
-  # On FreeBSD, /usr/local/* is not used by default. In order to build LLVM
-  # with libxml2, iconv.h, etc., we must add /usr/local paths.
-  include_directories(SYSTEM "/usr/local/include")
-  link_directories("/usr/local/lib")
-endif(${CMAKE_SYSTEM_NAME} MATCHES "(FreeBSD|DragonFly)")
-
 if( ${CMAKE_SYSTEM_NAME} MATCHES SunOS )
# special hack for Solaris to handle crazy system sys/regset.h
include_directories("${LLVM_MAIN_INCLUDE_DIR}/llvm/Support/Solaris")



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[llvm-branch-commits] [llvm] bb9ebf6 - [Tests] Add tests for new InstCombine OR transformation, NFC

[Dávid Bolvanský via llvm-branch-commits]

Author: Dávid Bolvanský
Date: 2021-01-12T19:29:17+01:00
New Revision: bb9ebf6baf7057d7f2aed90fccbac2414cf9a134

URL: 
https://github.com/llvm/llvm-project/commit/bb9ebf6baf7057d7f2aed90fccbac2414cf9a134
DIFF: 
https://github.com/llvm/llvm-project/commit/bb9ebf6baf7057d7f2aed90fccbac2414cf9a134.diff

LOG: [Tests] Add tests for new InstCombine OR transformation, NFC

Added: 


Modified: 
llvm/test/Transforms/InstCombine/or.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/or.ll 
b/llvm/test/Transforms/InstCombine/or.ll
index b5e3af2c7652..d41b8d53dd40 100644
--- a/llvm/test/Transforms/InstCombine/or.ll
+++ b/llvm/test/Transforms/InstCombine/or.ll
@@ -2,6 +2,7 @@
 ; RUN: opt < %s -instcombine -S | FileCheck %s
 
 target datalayout = 
"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n32:64"
+declare void @use(i32)
 
 define i32 @test12(i32 %A) {
 ; Should be eliminated
@@ -1000,3 +1001,116 @@ end:
   %conv8 = zext i1 %t5 to i32
   ret i32 %conv8
 }
+
+define i32 @test1(i32 %x, i32 %y) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y]], [[X]]
+; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:ret i32 [[OR1]]
+;
+  %xor = xor i32 %y, %x
+  %or = or i32 %y, %x
+  %neg = xor i32 %or, -1
+  %or1 = or i32 %xor, %neg
+  ret i32 %or1
+}
+
+define i32 @test2(i32 %x, i32 %y) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
+; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:ret i32 [[OR1]]
+;
+  %or = or i32 %y, %x
+  %neg = xor i32 %or, -1
+  %xor = xor i32 %y, %x
+  %or1 = or i32 %xor, %neg
+  ret i32 %or1
+}
+
+define i32 @test3(i32 %x, i32 %y) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
+; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:ret i32 [[OR1]]
+;
+  %or = or i32 %y, %x
+  %neg = xor i32 %or, -1
+  %xor = xor i32 %y, %x
+  %or1 = or i32 %xor, %neg
+  ret i32 %or1
+}
+
+define <2 x i32> @test4_vec(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @test4_vec(
+; CHECK-NEXT:[[OR:%.*]] = or <2 x i32> [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[NEG:%.*]] = xor <2 x i32> [[OR]], 
+; CHECK-NEXT:[[XOR:%.*]] = xor <2 x i32> [[Y]], [[X]]
+; CHECK-NEXT:[[OR1:%.*]] = or <2 x i32> [[XOR]], [[NEG]]
+; CHECK-NEXT:ret <2 x i32> [[OR1]]
+;
+  %or = or <2 x i32> %y, %x
+  %neg = xor <2 x i32> %or, 
+  %xor = xor <2 x i32> %y, %x
+  %or1 = or <2 x i32> %xor, %neg
+  ret <2 x i32> %or1
+}
+
+define i32 @test5_use(i32 %x, i32 %y) {
+; CHECK-LABEL: @test5_use(
+; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[NEG]])
+; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:ret i32 [[OR1]]
+;
+  %or = or i32 %y, %x
+  %neg = xor i32 %or, -1
+  %xor = xor i32 %y, %x
+  call void @use(i32 %neg)
+  %or1 = or i32 %xor, %neg
+  ret i32 %or1
+}
+
+define i32 @test5_use2(i32 %x, i32 %y) {
+; CHECK-LABEL: @test5_use2(
+; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[XOR]])
+; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:ret i32 [[OR1]]
+;
+  %or = or i32 %y, %x
+  %neg = xor i32 %or, -1
+  %xor = xor i32 %y, %x
+  call void @use(i32 %xor)
+  %or1 = or i32 %xor, %neg
+  ret i32 %or1
+}
+define i32 @test5_use3(i32 %x, i32 %y) {
+; CHECK-LABEL: @test5_use3(
+; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
+; CHECK-NEXT:call void @use(i32 [[NEG]])
+; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[XOR]])
+; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:ret i32 [[OR1]]
+;
+  %or = or i32 %y, %x
+  %neg = xor i32 %or, -1
+  call void @use(i32 %neg)
+  %xor = xor i32 %y, %x
+  call void @use(i32 %xor)
+  %or1 = or i32 %xor, %neg
+  ret i32 %or1
+}
+



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[llvm-branch-commits] [llvm] 0529946 - [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B)

[Dávid Bolvanský via llvm-branch-commits]

Author: Dávid Bolvanský
Date: 2021-01-12T19:29:17+01:00
New Revision: 0529946b5bafafd10d77b946ee9fa96f388860ef

URL: 
https://github.com/llvm/llvm-project/commit/0529946b5bafafd10d77b946ee9fa96f388860ef
DIFF: 
https://github.com/llvm/llvm-project/commit/0529946b5bafafd10d77b946ee9fa96f388860ef.diff

LOG: [instCombine] Add (A ^ B) | ~(A | B) -> ~(A & B)

define i32 @src(i32 %x, i32 %y) {
%0:
  %xor = xor i32 %y, %x
  %or = or i32 %y, %x
  %neg = xor i32 %or, 4294967295
  %or1 = or i32 %xor, %neg
  ret i32 %or1
}
=>
define i32 @tgt(i32 %x, i32 %y) {
%0:
  %and = and i32 %x, %y
  %neg = xor i32 %and, 4294967295
  ret i32 %neg
}
Transformation seems to be correct!

https://alive2.llvm.org/ce/z/Cvca4a

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/test/Transforms/InstCombine/or.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 15dcf2d19c15..352126fa07ca 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -1627,6 +1627,14 @@ static Instruction *foldOrToXor(BinaryOperator &I,
 match(Op1, m_Not(m_c_Or(m_Specific(A), m_Specific(B)
   return BinaryOperator::CreateNot(Builder.CreateXor(A, B));
 
+  // Operand complexity canonicalization guarantees that the 'xor' is Op0.
+  // (A ^ B) | ~(A | B) --> ~(A & B)
+  // (A ^ B) | ~(B | A) --> ~(A & B)
+  if (Op0->hasOneUse() || Op1->hasOneUse())
+if (match(Op0, m_Xor(m_Value(A), m_Value(B))) &&
+match(Op1, m_Not(m_c_Or(m_Specific(A), m_Specific(B)
+  return BinaryOperator::CreateNot(Builder.CreateAnd(A, B));
+
   // (A & ~B) | (~A & B) --> A ^ B
   // (A & ~B) | (B & ~A) --> A ^ B
   // (~B & A) | (~A & B) --> A ^ B

diff  --git a/llvm/test/Transforms/InstCombine/or.ll 
b/llvm/test/Transforms/InstCombine/or.ll
index d41b8d53dd40..b5da1734c102 100644
--- a/llvm/test/Transforms/InstCombine/or.ll
+++ b/llvm/test/Transforms/InstCombine/or.ll
@@ -1004,10 +1004,8 @@ end:
 
 define i32 @test1(i32 %x, i32 %y) {
 ; CHECK-LABEL: @test1(
-; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y]], [[X]]
-; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
-; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:[[TMP1:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[OR1:%.*]] = xor i32 [[TMP1]], -1
 ; CHECK-NEXT:ret i32 [[OR1]]
 ;
   %xor = xor i32 %y, %x
@@ -1019,13 +1017,11 @@ define i32 @test1(i32 %x, i32 %y) {
 
 define i32 @test2(i32 %x, i32 %y) {
 ; CHECK-LABEL: @test2(
-; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
-; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
-; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:[[TMP1:%.*]] = and i32 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[OR1:%.*]] = xor i32 [[TMP1]], -1
 ; CHECK-NEXT:ret i32 [[OR1]]
 ;
-  %or = or i32 %y, %x
+  %or = or i32 %x, %y
   %neg = xor i32 %or, -1
   %xor = xor i32 %y, %x
   %or1 = or i32 %xor, %neg
@@ -1034,25 +1030,21 @@ define i32 @test2(i32 %x, i32 %y) {
 
 define i32 @test3(i32 %x, i32 %y) {
 ; CHECK-LABEL: @test3(
-; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
-; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
-; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:[[TMP1:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT:[[OR1:%.*]] = xor i32 [[TMP1]], -1
 ; CHECK-NEXT:ret i32 [[OR1]]
 ;
   %or = or i32 %y, %x
   %neg = xor i32 %or, -1
-  %xor = xor i32 %y, %x
+  %xor = xor i32 %x, %y
   %or1 = or i32 %xor, %neg
   ret i32 %or1
 }
 
 define <2 x i32> @test4_vec(<2 x i32> %x, <2 x i32> %y) {
 ; CHECK-LABEL: @test4_vec(
-; CHECK-NEXT:[[OR:%.*]] = or <2 x i32> [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT:[[NEG:%.*]] = xor <2 x i32> [[OR]], 
-; CHECK-NEXT:[[XOR:%.*]] = xor <2 x i32> [[Y]], [[X]]
-; CHECK-NEXT:[[OR1:%.*]] = or <2 x i32> [[XOR]], [[NEG]]
+; CHECK-NEXT:[[TMP1:%.*]] = and <2 x i32> [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT:[[OR1:%.*]] = xor <2 x i32> [[TMP1]], 
 ; CHECK-NEXT:ret <2 x i32> [[OR1]]
 ;
   %or = or <2 x i32> %y, %x
@@ -1066,9 +1058,9 @@ define i32 @test5_use(i32 %x, i32 %y) {
 ; CHECK-LABEL: @test5_use(
 ; CHECK-NEXT:[[OR:%.*]] = or i32 [[Y:%.*]], [[X:%.*]]
 ; CHECK-NEXT:[[NEG:%.*]] = xor i32 [[OR]], -1
-; CHECK-NEXT:[[XOR:%.*]] = xor i32 [[Y]], [[X]]
 ; CHECK-NEXT:call void @use(i32 [[NEG]])
-; CHECK-NEXT:[[OR1:%.*]] = or i32 [[XOR]], [[NEG]]
+; CHECK-NEXT:[[TMP1:%.*]] = and i32 [[Y]], [[X]]
+; CHECK-NEXT:[[OR1:%.*]] = xor i32 [[TMP1]], -1
 ; CHECK-NEXT:ret i32 [[OR1]]
 ;
   %or = or i32 %y, %x
@@ -1081,11 +1073,10 @@ define i32 @test5_use(i32

[llvm-branch-commits] [libunwind] b6164d9 - Bump version to 11.1.0

[Tom Stellard via llvm-branch-commits]

Author: Tom Stellard
Date: 2021-01-12T10:34:51-08:00
New Revision: b6164d967e010ed54ed8ce0d4a3ea19f54e90108

URL: 
https://github.com/llvm/llvm-project/commit/b6164d967e010ed54ed8ce0d4a3ea19f54e90108
DIFF: 
https://github.com/llvm/llvm-project/commit/b6164d967e010ed54ed8ce0d4a3ea19f54e90108.diff

LOG: Bump version to 11.1.0

Added: 


Modified: 
libcxx/CMakeLists.txt
libcxxabi/CMakeLists.txt
libunwind/CMakeLists.txt
llvm/CMakeLists.txt
llvm/utils/gn/secondary/llvm/version.gni
llvm/utils/release/build_llvm_package.bat

Removed: 




diff  --git a/libcxx/CMakeLists.txt b/libcxx/CMakeLists.txt
index f145831c75d8..910d04b54b6d 100644
--- a/libcxx/CMakeLists.txt
+++ b/libcxx/CMakeLists.txt
@@ -32,7 +32,7 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR OR 
LIBCXX_STANDALONE_BUIL
   project(libcxx CXX C)
 
   set(PACKAGE_NAME libcxx)
-  set(PACKAGE_VERSION 11.0.1)
+  set(PACKAGE_VERSION 11.1.0)
   set(PACKAGE_STRING "${PACKAGE_NAME} ${PACKAGE_VERSION}")
   set(PACKAGE_BUGREPORT "llvm-b...@lists.llvm.org")
 

diff  --git a/libcxxabi/CMakeLists.txt b/libcxxabi/CMakeLists.txt
index deff3d5e4ad1..36c6b2249e2b 100644
--- a/libcxxabi/CMakeLists.txt
+++ b/libcxxabi/CMakeLists.txt
@@ -25,7 +25,7 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR OR 
LIBCXXABI_STANDALONE_B
   project(libcxxabi CXX C)
 
   set(PACKAGE_NAME libcxxabi)
-  set(PACKAGE_VERSION 11.0.1)
+  set(PACKAGE_VERSION 11.1.0)
   set(PACKAGE_STRING "${PACKAGE_NAME} ${PACKAGE_VERSION}")
   set(PACKAGE_BUGREPORT "llvm-b...@lists.llvm.org")
 

diff  --git a/libunwind/CMakeLists.txt b/libunwind/CMakeLists.txt
index cdac67e93df1..e44a103648f9 100644
--- a/libunwind/CMakeLists.txt
+++ b/libunwind/CMakeLists.txt
@@ -83,7 +83,7 @@ if (CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR OR 
LIBUNWIND_STANDALONE_B
   endif()
 
   set(PACKAGE_NAME libunwind)
-  set(PACKAGE_VERSION 11.0.1)
+  set(PACKAGE_VERSION 11.1.0)
   set(PACKAGE_STRING "${PACKAGE_NAME} ${PACKAGE_VERSION}")
   set(PACKAGE_BUGREPORT "llvm-b...@lists.llvm.org")
 

diff  --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index b8dabbbca05a..247ad36d3845 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -27,10 +27,10 @@ if(NOT DEFINED LLVM_VERSION_MAJOR)
   set(LLVM_VERSION_MAJOR 11)
 endif()
 if(NOT DEFINED LLVM_VERSION_MINOR)
-  set(LLVM_VERSION_MINOR 0)
+  set(LLVM_VERSION_MINOR 1)
 endif()
 if(NOT DEFINED LLVM_VERSION_PATCH)
-  set(LLVM_VERSION_PATCH 1)
+  set(LLVM_VERSION_PATCH 0)
 endif()
 if(NOT DEFINED LLVM_VERSION_SUFFIX)
   set(LLVM_VERSION_SUFFIX "")

diff  --git a/llvm/utils/gn/secondary/llvm/version.gni 
b/llvm/utils/gn/secondary/llvm/version.gni
index e2b6390b66cc..ebc66a5138e7 100644
--- a/llvm/utils/gn/secondary/llvm/version.gni
+++ b/llvm/utils/gn/secondary/llvm/version.gni
@@ -1,4 +1,4 @@
 llvm_version_major = 11
-llvm_version_minor = 0
-llvm_version_patch = 1
+llvm_version_minor = 1
+llvm_version_patch = 0
 llvm_version = "$llvm_version_major.$llvm_version_minor.$llvm_version_patch"

diff  --git a/llvm/utils/release/build_llvm_package.bat 
b/llvm/utils/release/build_llvm_package.bat
index 31e237c63565..73362920773b 100755
--- a/llvm/utils/release/build_llvm_package.bat
+++ b/llvm/utils/release/build_llvm_package.bat
@@ -27,8 +27,8 @@ set 
python64_dir=C:\Users\%USERNAME%\AppData\Local\Programs\Python\Python36
 for /f "usebackq" %%i in (`PowerShell ^(Get-Date^).ToString^('MMdd'^)`) do 
set datestamp=%%i
 
 set revision=%1
-set package_version=11.0.1-%revision:~0,8%
-set clang_format_vs_version=11.0.1.%datestamp%
+set package_version=11.1.0-%revision:~0,8%
+set clang_format_vs_version=11.1.0.%datestamp%
 set build_dir=llvm_package_%revision:~0,8%
 
 echo Revision: %revision%



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[llvm-branch-commits] [clang] 9bbcb55 - Address ABI issues introduced with CXCursor_CXXAddrspaceCastExpr

[Tom Stellard via llvm-branch-commits]

Author: Marco Antognini
Date: 2021-01-12T10:34:52-08:00
New Revision: 9bbcb554cdbf1a7b85e9a72169e4037cf4736a10

URL: 
https://github.com/llvm/llvm-project/commit/9bbcb554cdbf1a7b85e9a72169e4037cf4736a10
DIFF: 
https://github.com/llvm/llvm-project/commit/9bbcb554cdbf1a7b85e9a72169e4037cf4736a10.diff

LOG: Address ABI issues introduced with CXCursor_CXXAddrspaceCastExpr

Revert values in CXCursorKind as they were before
CXCursor_CXXAddrspaceCastExpr was introduced in a6a237f2046a ([OpenCL]
Added addrspace_cast operator in C++ mode., 2020-05-18).

Insert CXCursor_CXXAddrspaceCastExpr after the last expression in
CXCursorKind using the next available value.

Reviewed By: akyrtzi, svenvh

Differential Revision: https://reviews.llvm.org/D90385

(cherry picked from commit bbdbd020d2c2f315ed1545b23c23ec6ff1abc022)

Added: 


Modified: 
clang/include/clang-c/Index.h

Removed: 




diff  --git a/clang/include/clang-c/Index.h b/clang/include/clang-c/Index.h
index 5fa728d6d66c..9f5a727c84bb 100644
--- a/clang/include/clang-c/Index.h
+++ b/clang/include/clang-c/Index.h
@@ -33,7 +33,7 @@
  * compatible, thus CINDEX_VERSION_MAJOR is expected to remain stable.
  */
 #define CINDEX_VERSION_MAJOR 0
-#define CINDEX_VERSION_MINOR 60
+#define CINDEX_VERSION_MINOR 61
 
 #define CINDEX_VERSION_ENCODE(major, minor) (((major)*1) + ((minor)*1))
 
@@ -2052,62 +2052,58 @@ enum CXCursorKind {
*/
   CXCursor_CXXFunctionalCastExpr = 128,
 
-  /** OpenCL's addrspace_cast<> expression.
-   */
-  CXCursor_CXXAddrspaceCastExpr = 129,
-
   /** A C++ typeid expression (C++ [expr.typeid]).
*/
-  CXCursor_CXXTypeidExpr = 130,
+  CXCursor_CXXTypeidExpr = 129,
 
   /** [C++ 2.13.5] C++ Boolean Literal.
*/
-  CXCursor_CXXBoolLiteralExpr = 131,
+  CXCursor_CXXBoolLiteralExpr = 130,
 
   /** [C++0x 2.14.7] C++ Pointer Literal.
*/
-  CXCursor_CXXNullPtrLiteralExpr = 132,
+  CXCursor_CXXNullPtrLiteralExpr = 131,
 
   /** Represents the "this" expression in C++
*/
-  CXCursor_CXXThisExpr = 133,
+  CXCursor_CXXThisExpr = 132,
 
   /** [C++ 15] C++ Throw Expression.
*
* This handles 'throw' and 'throw' assignment-expression. When
* assignment-expression isn't present, Op will be null.
*/
-  CXCursor_CXXThrowExpr = 134,
+  CXCursor_CXXThrowExpr = 133,
 
   /** A new expression for memory allocation and constructor calls, e.g:
* "new CXXNewExpr(foo)".
*/
-  CXCursor_CXXNewExpr = 135,
+  CXCursor_CXXNewExpr = 134,
 
   /** A delete expression for memory deallocation and destructor calls,
* e.g. "delete[] pArray".
*/
-  CXCursor_CXXDeleteExpr = 136,
+  CXCursor_CXXDeleteExpr = 135,
 
   /** A unary expression. (noexcept, sizeof, or other traits)
*/
-  CXCursor_UnaryExpr = 137,
+  CXCursor_UnaryExpr = 136,
 
   /** An Objective-C string literal i.e. @"foo".
*/
-  CXCursor_ObjCStringLiteral = 138,
+  CXCursor_ObjCStringLiteral = 137,
 
   /** An Objective-C \@encode expression.
*/
-  CXCursor_ObjCEncodeExpr = 139,
+  CXCursor_ObjCEncodeExpr = 138,
 
   /** An Objective-C \@selector expression.
*/
-  CXCursor_ObjCSelectorExpr = 140,
+  CXCursor_ObjCSelectorExpr = 139,
 
   /** An Objective-C \@protocol expression.
*/
-  CXCursor_ObjCProtocolExpr = 141,
+  CXCursor_ObjCProtocolExpr = 140,
 
   /** An Objective-C "bridged" cast expression, which casts between
* Objective-C pointers and C pointers, transferring ownership in the 
process.
@@ -2116,7 +2112,7 @@ enum CXCursorKind {
*   NSString *str = (__bridge_transfer NSString *)CFCreateString();
* \endcode
*/
-  CXCursor_ObjCBridgedCastExpr = 142,
+  CXCursor_ObjCBridgedCastExpr = 141,
 
   /** Represents a C++0x pack expansion that produces a sequence of
* expressions.
@@ -2131,7 +2127,7 @@ enum CXCursorKind {
* }
* \endcode
*/
-  CXCursor_PackExpansionExpr = 143,
+  CXCursor_PackExpansionExpr = 142,
 
   /** Represents an expression that computes the length of a parameter
* pack.
@@ -2143,7 +2139,7 @@ enum CXCursorKind {
* };
* \endcode
*/
-  CXCursor_SizeOfPackExpr = 144,
+  CXCursor_SizeOfPackExpr = 143,
 
   /* Represents a C++ lambda expression that produces a local function
* object.
@@ -2157,39 +2153,43 @@ enum CXCursorKind {
* }
* \endcode
*/
-  CXCursor_LambdaExpr = 145,
+  CXCursor_LambdaExpr = 144,
 
   /** Objective-c Boolean Literal.
*/
-  CXCursor_ObjCBoolLiteralExpr = 146,
+  CXCursor_ObjCBoolLiteralExpr = 145,
 
   /** Represents the "self" expression in an Objective-C method.
*/
-  CXCursor_ObjCSelfExpr = 147,
+  CXCursor_ObjCSelfExpr = 146,
 
   /** OpenMP 5.0 [2.1.5, Array Section].
*/
-  CXCursor_OMPArraySectionExpr = 148,
+  CXCursor_OMPArraySectionExpr = 147,
 
   /** Represents an @available(...) check.
*/
-  CXCursor_ObjCAvailabilityCheckExpr = 149,
+  CXCursor_ObjCAvailabilityCheckExpr = 148,
 
   /**
* Fixed point literal
*/
-  CXCurso

[llvm-branch-commits] [flang] 6f4d460 - [Flang][openmp][openacc] Extend CheckNoBranching to handle branching provided by LabelEnforce.

[Sameeran joshi via llvm-branch-commits]

Author: sameeran joshi
Date: 2021-01-13T00:04:45+05:30
New Revision: 6f4d460762006af17826693abc1e7139a76aa1f2

URL: 
https://github.com/llvm/llvm-project/commit/6f4d460762006af17826693abc1e7139a76aa1f2
DIFF: 
https://github.com/llvm/llvm-project/commit/6f4d460762006af17826693abc1e7139a76aa1f2.diff

LOG: [Flang][openmp][openacc] Extend CheckNoBranching to handle branching 
provided by LabelEnforce.

`CheckNoBranching` is currently handling only illegal branching out for 
constructs
with `Parser::Name` in them.
Extend the same for handling illegal branching out caused by `Parser::Label` 
based statements.
This patch could possibly solve one of the issues(typically branching out) 
mentioned in D92735.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D93447

Added: 


Modified: 
flang/lib/Semantics/check-directive-structure.h
flang/lib/Semantics/check-omp-structure.cpp
flang/test/Semantics/omp-parallell01.f90

Removed: 




diff  --git a/flang/lib/Semantics/check-directive-structure.h 
b/flang/lib/Semantics/check-directive-structure.h
index 062f85b63b85..1075087feb4f 100644
--- a/flang/lib/Semantics/check-directive-structure.h
+++ b/flang/lib/Semantics/check-directive-structure.h
@@ -15,7 +15,6 @@
 #include "flang/Common/enum-set.h"
 #include "flang/Semantics/semantics.h"
 #include "flang/Semantics/tools.h"
-
 #include 
 
 namespace Fortran::semantics {
@@ -43,6 +42,9 @@ template  class NoBranchingEnforce {
 
   template  bool Pre(const parser::Statement &statement) {
 currentStatementSourcePosition_ = statement.source;
+if (statement.label.has_value()) {
+  labels_.insert(*statement.label);
+}
 return true;
   }
 
@@ -54,6 +56,8 @@ template  class NoBranchingEnforce {
   }
   void Post(const parser::StopStmt &) { EmitBranchOutError("STOP"); }
 
+  std::set labels() { return labels_; }
+
 private:
   parser::MessageFormattedText GetEnclosingMsg() const {
 return {"Enclosing %s construct"_en_US, upperCaseDirName_};
@@ -103,6 +107,7 @@ template  class NoBranchingEnforce {
   parser::CharBlock sourcePosition_;
   std::string upperCaseDirName_;
   D currentDirective_;
+  std::set labels_;
 };
 
 // Generic structure checker for directives/clauses language such as OpenMP
@@ -226,6 +231,9 @@ class DirectiveStructureChecker : public virtual 
BaseChecker {
   SayNotMatching(beginDir.source, endDir.source);
 }
   }
+  // Check illegal branching out of `Parser::Block` for `Parser::Name` based
+  // nodes (examples `Parser::ExitStmt`) along with `Parser::Label`
+  // based nodes (example `Parser::GotoStmt`).
   void CheckNoBranching(const parser::Block &block, D directive,
   const parser::CharBlock &directiveSource);
 
@@ -271,6 +279,11 @@ void DirectiveStructureChecker::CheckNoBranching(
   NoBranchingEnforce noBranchingEnforce{
   context_, directiveSource, directive, ContextDirectiveAsFortran()};
   parser::Walk(block, noBranchingEnforce);
+
+  LabelEnforce directiveLabelEnforce{context_, noBranchingEnforce.labels(),
+  directiveSource,
+  parser::ToUpperCaseLetters(getDirectiveName(directive).str()).c_str()};
+  parser::Walk(block, directiveLabelEnforce);
 }
 
 // Check that only clauses included in the given set are present after the 
given

diff  --git a/flang/lib/Semantics/check-omp-structure.cpp 
b/flang/lib/Semantics/check-omp-structure.cpp
index 4d1c96f66905..773f5b2aeb21 100644
--- a/flang/lib/Semantics/check-omp-structure.cpp
+++ b/flang/lib/Semantics/check-omp-structure.cpp
@@ -125,14 +125,7 @@ void OmpStructureChecker::Enter(const 
parser::OpenMPBlockConstruct &x) {
   CheckMatching(beginDir, endDir);
 
   PushContextAndClauseSets(beginDir.source, beginDir.v);
-
-  switch (beginDir.v) {
-  case llvm::omp::OMPD_parallel:
-CheckNoBranching(block, llvm::omp::OMPD_parallel, beginDir.source);
-break;
-  default:
-break;
-  }
+  CheckNoBranching(block, beginDir.v, beginDir.source);
 }
 
 void OmpStructureChecker::Leave(const parser::OpenMPBlockConstruct &) {

diff  --git a/flang/test/Semantics/omp-parallell01.f90 
b/flang/test/Semantics/omp-parallell01.f90
index e3490563f332..1a2cae1830bc 100644
--- a/flang/test/Semantics/omp-parallell01.f90
+++ b/flang/test/Semantics/omp-parallell01.f90
@@ -1,5 +1,4 @@
 ! RUN: %S/test_errors.sh %s %t %f18 -fopenmp
-! XFAIL: *
 
 ! OpenMP Version 4.5
 ! 2.5 parallel construct.
@@ -13,7 +12,7 @@ program omp_parallel
   do i = 1, 10
 do j = 1, 10
   print *, "Hello"
-  !ERROR: invalid branch to/from OpenMP structured block
+  !ERROR: Control flow escapes from PARALLEL
   goto 10
 end do
   end do



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[llvm-branch-commits] [llvm] 03c8d6a - [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of SETONE/SETUEQ on targets without SETO/SETUO.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-12T10:45:03-08:00
New Revision: 03c8d6a0c4bd0016bdfd1e53e6878696fe6412ed

URL: 
https://github.com/llvm/llvm-project/commit/03c8d6a0c4bd0016bdfd1e53e6878696fe6412ed
DIFF: 
https://github.com/llvm/llvm-project/commit/03c8d6a0c4bd0016bdfd1e53e6878696fe6412ed.diff

LOG: [LegalizeDAG][RISCV][PowerPC][AMDGPU][WebAssembly] Improve expansion of 
SETONE/SETUEQ on targets without SETO/SETUO.

If SETO/SETUO aren't legal, they'll be expanded and we'll end up
with 3 comparisons.

SETONE is equivalent to (SETOGT || SETOLT)
so if one of those operations is supported use that expansion. We
don't need both since we can commute the operands to make the other.

SETUEQ can be implemented with !(SETOGT || SETOLT) or (SETULE && SETUGE).
I've only implemented the first because it didn't look like most of the
affected targets had legal SETULE/SETUGE.

Reviewed By: frasercrmck, tlively, nemanjai

Differential Revision: https://reviews.llvm.org/D94450

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/test/CodeGen/AMDGPU/setcc.ll
llvm/test/CodeGen/PowerPC/spe.ll
llvm/test/CodeGen/PowerPC/vsx.ll
llvm/test/CodeGen/RISCV/double-br-fcmp.ll
llvm/test/CodeGen/RISCV/double-fcmp.ll
llvm/test/CodeGen/RISCV/double-select-fcmp.ll
llvm/test/CodeGen/RISCV/float-br-fcmp.ll
llvm/test/CodeGen/RISCV/float-fcmp.ll
llvm/test/CodeGen/RISCV/float-select-fcmp.ll
llvm/test/CodeGen/RISCV/half-br-fcmp.ll
llvm/test/CodeGen/RISCV/half-fcmp.ll
llvm/test/CodeGen/RISCV/half-select-fcmp.ll
llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll
llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
llvm/test/CodeGen/WebAssembly/comparisons-f32.ll
llvm/test/CodeGen/WebAssembly/comparisons-f64.ll
llvm/test/CodeGen/WebAssembly/simd-comparisons.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp 
b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 9e1ea7c81a35..523895200f6a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1741,13 +1741,28 @@ bool SelectionDAGLegalize::LegalizeSetCCCondCode(
 assert(TLI.isCondCodeLegal(ISD::SETOEQ, OpVT)
 && "If SETO is expanded, SETOEQ must be legal!");
 CC1 = ISD::SETOEQ; CC2 = ISD::SETOEQ; Opc = ISD::AND; break;
+case ISD::SETONE:
+case ISD::SETUEQ:
+// If the SETUO or SETO CC isn't legal, we might be able to use
+// SETOGT || SETOLT, inverting the result for SETUEQ. We only need one
+// of SETOGT/SETOLT to be legal, the other can be emulated by swapping
+// the operands.
+CC2 = ((unsigned)CCCode & 0x8U) ? ISD::SETUO : ISD::SETO;
+if (!TLI.isCondCodeLegal(CC2, OpVT) &&
+(TLI.isCondCodeLegal(ISD::SETOGT, OpVT) ||
+ TLI.isCondCodeLegal(ISD::SETOLT, OpVT))) {
+  CC1 = ISD::SETOGT;
+  CC2 = ISD::SETOLT;
+  Opc = ISD::OR;
+  NeedInvert = ((unsigned)CCCode & 0x8U);
+  break;
+}
+LLVM_FALLTHROUGH;
 case ISD::SETOEQ:
 case ISD::SETOGT:
 case ISD::SETOGE:
 case ISD::SETOLT:
 case ISD::SETOLE:
-case ISD::SETONE:
-case ISD::SETUEQ:
 case ISD::SETUNE:
 case ISD::SETUGT:
 case ISD::SETUGE:

diff  --git a/llvm/test/CodeGen/AMDGPU/setcc.ll 
b/llvm/test/CodeGen/AMDGPU/setcc.ll
index a259784bc278..e888ceb94cfa 100644
--- a/llvm/test/CodeGen/AMDGPU/setcc.ll
+++ b/llvm/test/CodeGen/AMDGPU/setcc.ll
@@ -96,11 +96,9 @@ entry:
 }
 
 ; FUNC-LABEL: {{^}}f32_one:
-; R600-DAG: SETE_DX10
-; R600-DAG: SETE_DX10
-; R600-DAG: AND_INT
-; R600-DAG: SETNE_DX10
-; R600-DAG: AND_INT
+; R600-DAG: SETGT_DX10
+; R600-DAG: SETGT_DX10
+; R600-DAG: OR_INT
 ; R600-DAG: SETNE_INT
 
 ; GCN: v_cmp_lg_f32_e32 vcc
@@ -128,12 +126,10 @@ entry:
 }
 
 ; FUNC-LABEL: {{^}}f32_ueq:
-; R600-DAG: SETNE_DX10
-; R600-DAG: SETNE_DX10
-; R600-DAG: OR_INT
-; R600-DAG: SETE_DX10
+; R600-DAG: SETGT_DX10
+; R600-DAG: SETGT_DX10
 ; R600-DAG: OR_INT
-; R600-DAG: SETNE_INT
+; R600-DAG: SETE_INT
 
 ; GCN: v_cmp_nlg_f32_e32 vcc
 ; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc

diff  --git a/llvm/test/CodeGen/PowerPC/spe.ll 
b/llvm/test/CodeGen/PowerPC/spe.ll
index 59bc6abc4f75..6ab05554aa81 100644
--- a/llvm/test/CodeGen/PowerPC/spe.ll
+++ b/llvm/test/CodeGen/PowerPC/spe.ll
@@ -297,12 +297,10 @@ define i1 @test_fcmpord(float %a, float %b) #0 {
 define i1 @test_fcmpueq(float %a, float %b) #0 {
 ; CHECK-LABEL: test_fcmpueq:
 ; CHECK:   # %bb.0: # %entry
-; CHECK-NEXT:efscmpeq 0, 3, 3
-; CHECK-NEXT:efscmpeq 1, 4, 4
-; CHECK-NEXT:crnand 20, 5, 1
-; CHECK-NEXT:efscmpeq 0, 3, 4
+; CHECK-NEXT:efscmpgt 0, 3, 4
+; CHECK-NEXT:efscmplt 1, 3, 4
 ; CHECK-NEXT:li 5, 1
-; CHECK-NEXT:crnor 20, 1, 20
+; CHECK-NEXT:cror 20, 5, 1
 ; CHECK-NEXT:bc 12, 20, .LBB14_2
 ; CHECK-NEXT:  # 

[llvm-branch-commits] [clang-tools-extra] 4718ec0 - [clangd] Avoid recursion in TargetFinder::add()

[Nathan Ridge via llvm-branch-commits]

Author: Nathan Ridge
Date: 2021-01-12T13:57:54-05:00
New Revision: 4718ec01669b01373180f4cd1256c6e2dd6f3999

URL: 
https://github.com/llvm/llvm-project/commit/4718ec01669b01373180f4cd1256c6e2dd6f3999
DIFF: 
https://github.com/llvm/llvm-project/commit/4718ec01669b01373180f4cd1256c6e2dd6f3999.diff

LOG: [clangd] Avoid recursion in TargetFinder::add()

Fixes https://github.com/clangd/clangd/issues/633

Differential Revision: https://reviews.llvm.org/D94382

Added: 


Modified: 
clang-tools-extra/clangd/FindTarget.cpp
clang-tools-extra/clangd/FindTarget.h
clang-tools-extra/clangd/unittests/FindTargetTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/FindTarget.cpp 
b/clang-tools-extra/clangd/FindTarget.cpp
index 9a502a84e36f..84316659daad 100644
--- a/clang-tools-extra/clangd/FindTarget.cpp
+++ b/clang-tools-extra/clangd/FindTarget.cpp
@@ -330,6 +330,7 @@ struct TargetFinder {
   llvm::SmallDenseMap>
   Decls;
+  llvm::SmallDenseMap Seen;
   RelSet Flags;
 
   template  void debug(T &Node, RelSet Flags) {
@@ -359,6 +360,15 @@ struct TargetFinder {
 if (!D)
   return;
 debug(*D, Flags);
+
+// Avoid recursion (which can arise in the presence of heuristic
+// resolution of dependent names) by exiting early if we have
+// already seen this decl with all flags in Flags.
+auto Res = Seen.try_emplace(D);
+if (!Res.second && Res.first->second.contains(Flags))
+  return;
+Res.first->second |= Flags;
+
 if (const UsingDirectiveDecl *UDD = llvm::dyn_cast(D))
   D = UDD->getNominatedNamespaceAsWritten();
 

diff  --git a/clang-tools-extra/clangd/FindTarget.h 
b/clang-tools-extra/clangd/FindTarget.h
index 435e4f4ac038..92e4354d1eaa 100644
--- a/clang-tools-extra/clangd/FindTarget.h
+++ b/clang-tools-extra/clangd/FindTarget.h
@@ -194,6 +194,9 @@ class DeclRelationSet {
 S &= Other.S;
 return *this;
   }
+  bool contains(DeclRelationSet Other) const {
+return (S & Other.S) == Other.S;
+  }
   friend llvm::raw_ostream &operator<<(llvm::raw_ostream &, DeclRelationSet);
 };
 // The above operators can't be looked up if both sides are enums.

diff  --git a/clang-tools-extra/clangd/unittests/FindTargetTests.cpp 
b/clang-tools-extra/clangd/unittests/FindTargetTests.cpp
index dd7e9878a6d5..46e17dc053c0 100644
--- a/clang-tools-extra/clangd/unittests/FindTargetTests.cpp
+++ b/clang-tools-extra/clangd/unittests/FindTargetTests.cpp
@@ -787,6 +787,47 @@ TEST_F(TargetDeclTest, DependentTypes) {
"template  struct B");
 }
 
+TEST_F(TargetDeclTest, TypedefCascade) {
+  Code = R"cpp(
+struct C {
+  using type = int;
+};
+struct B {
+  using type = C::type;
+};
+struct A {
+  using type = B::type;
+};
+A::[[type]] waldo;
+  )cpp";
+  EXPECT_DECLS("TypedefTypeLoc",
+   {"using type = int", Rel::Alias | Rel::Underlying},
+   {"using type = C::type", Rel::Alias | Rel::Underlying},
+   {"using type = B::type", Rel::Alias});
+}
+
+TEST_F(TargetDeclTest, RecursiveTemplate) {
+  Flags.push_back("-std=c++20"); // the test case uses concepts
+
+  Code = R"cpp(
+template 
+concept Leaf = false;
+
+template 
+struct descend_left {
+  using type = typename descend_left::[[type]];
+};
+
+template 
+struct descend_left {
+  using type = typename Tree::value;
+};
+  )cpp";
+  EXPECT_DECLS("DependentNameTypeLoc",
+   {"using type = typename descend_left::type",
+Rel::Alias | Rel::Underlying});
+}
+
 TEST_F(TargetDeclTest, ObjC) {
   Flags = {"-xobjective-c"};
   Code = R"cpp(



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[llvm-branch-commits] [llvm] f748e92 - [NewPM] Run non-trivial loop unswitching under -O2/3/s/z

[Arthur Eubanks via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2021-01-12T11:04:40-08:00
New Revision: f748e92295515ea7b39cd687a718915b559de6ec

URL: 
https://github.com/llvm/llvm-project/commit/f748e92295515ea7b39cd687a718915b559de6ec
DIFF: 
https://github.com/llvm/llvm-project/commit/f748e92295515ea7b39cd687a718915b559de6ec.diff

LOG: [NewPM] Run non-trivial loop unswitching under -O2/3/s/z

Fixes https://bugs.llvm.org/show_bug.cgi?id=48715.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D94448

Added: 
llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll

Modified: 
llvm/lib/Passes/PassBuilder.cpp
llvm/test/Transforms/LoopUnroll/opt-levels.ll

Removed: 




diff  --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 527d19d63589..0d7f442f9ff4 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -724,7 +724,7 @@ 
PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level,
   LPM1.addPass(LoopRotatePass(Level != OptimizationLevel::Oz));
   // TODO: Investigate promotion cap for O1.
   LPM1.addPass(LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap));
-  LPM1.addPass(SimpleLoopUnswitchPass());
+  LPM1.addPass(SimpleLoopUnswitchPass(/* NonTrivial */ true));
   LPM2.addPass(LoopIdiomRecognizePass());
   LPM2.addPass(IndVarSimplifyPass());
 

diff  --git a/llvm/test/Transforms/LoopUnroll/opt-levels.ll 
b/llvm/test/Transforms/LoopUnroll/opt-levels.ll
index ed0abc7672e0..f268d9bd5506 100644
--- a/llvm/test/Transforms/LoopUnroll/opt-levels.ll
+++ b/llvm/test/Transforms/LoopUnroll/opt-levels.ll
@@ -7,10 +7,10 @@
 ; the behavior, we artificially disable unrolling for anything but O3 by 
setting
 ; the default threshold to 0.
 
-; O3: loop2.preheader
-; O2-NOT: loop2.preheader
-; Os-NOT: loop2.preheader
-; Oz-NOT: loop2.preheader
+; O3: loop1.preheader
+; O2-NOT: loop1.preheader
+; Os-NOT: loop1.preheader
+; Oz-NOT: loop1.preheader
 
 define void @unroll(i32 %iter, i32* %addr1, i32* %addr2) nounwind {
 entry:

diff  --git a/llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll 
b/llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll
new file mode 100644
index ..953b407cccd9
--- /dev/null
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll
@@ -0,0 +1,39 @@
+; RUN: opt < %s -S -passes="default" | FileCheck %s -check-prefix=O1
+; RUN: opt < %s -S -passes="default" | FileCheck %s -check-prefix=O2
+
+declare i32 @a()
+declare i32 @b()
+declare i32 @c()
+
+; O1-NOT: loop_begin.us:
+; O2: loop_begin.us:
+
+define i32 @test1(i1* %ptr, i1 %cond1, i1 %cond2) {
+entry:
+  br label %loop_begin
+
+loop_begin:
+  br i1 %cond1, label %loop_a, label %loop_b
+
+loop_a:
+  call i32 @a()
+  br label %latch
+
+loop_b:
+  br i1 %cond2, label %loop_b_a, label %loop_b_b
+
+loop_b_a:
+  call i32 @b()
+  br label %latch
+
+loop_b_b:
+  call i32 @c()
+  br label %latch
+
+latch:
+  %v = load i1, i1* %ptr
+  br i1 %v, label %loop_begin, label %loop_exit
+
+loop_exit:
+  ret i32 0
+}



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[llvm-branch-commits] [llvm] a14040b - [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 scalar operand.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-12T11:08:26-08:00
New Revision: a14040bd4d902419b53cf0ad576caa0f01eccf5c

URL: 
https://github.com/llvm/llvm-project/commit/a14040bd4d902419b53cf0ad576caa0f01eccf5c
DIFF: 
https://github.com/llvm/llvm-project/commit/a14040bd4d902419b53cf0ad576caa0f01eccf5c.diff

LOG: [RISCV] Use vmerge.vim for llvm.riscv.vfmerge with a 0.0 scalar operand.

We can use a 0 immediate to avoid needing to materialize 0 into
an FPR first.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D94459

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index bf5ee06bce35..3604a25b0d6a 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -3367,6 +3367,14 @@ defm "" : VPatBinaryV_VM<"int_riscv_vfmerge", 
"PseudoVMERGE",
 defm "" : VPatBinaryV_XM<"int_riscv_vfmerge", "PseudoVFMERGE",
  /*CarryOut = */0, /*vtilist=*/AllFloatVectors>;
 
+foreach fvti = AllFloatVectors in {
+  defvar instr = !cast("PseudoVMERGE_VIM_"#fvti.LMul.MX);
+  def : Pat<(fvti.Vector (int_riscv_vfmerge (fvti.Vector fvti.RegClass:$rs2),
+(fvti.Scalar (fpimm0)),
+(fvti.Mask V0), (XLenVT GPR:$vl))),
+(instr fvti.RegClass:$rs2, 0, (fvti.Mask V0), (NoX0 GPR:$vl), 
fvti.SEW)>;
+}
+
 
//===--===//
 // 14.16. Vector Floating-Point Move Instruction
 
//===--===//

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll 
b/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
index a6b09704c8a6..5a7262c348c5 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
@@ -439,3 +439,157 @@ entry:
 
   ret  %a
 }
+
+define  @intrinsic_vfmerge_vzm_nxv1f16_nxv1f16_f16( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv1f16_nxv1f16_f16
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e16,mf4,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv1f16.f16(
+ %0,
+half zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  @intrinsic_vfmerge_vzm_nxv2f16_nxv2f16_f16( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv2f16_nxv2f16_f16
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e16,mf2,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv2f16.f16(
+ %0,
+half zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  @intrinsic_vfmerge_vzm_nxv4f16_nxv4f16_f16( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv4f16_nxv4f16_f16
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e16,m1,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv4f16.f16(
+ %0,
+half zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  @intrinsic_vfmerge_vzm_nxv8f16_nxv8f16_f16( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv8f16_nxv8f16_f16
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e16,m2,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv8f16.f16(
+ %0,
+half zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  
@intrinsic_vfmerge_vzm_nxv16f16_nxv16f16_f16( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv16f16_nxv16f16_f16
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e16,m4,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv16f16.f16(
+ %0,
+half zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  
@intrinsic_vfmerge_vzm_nxv32f16_nxv32f16_f16( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv32f16_nxv32f16_f16
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e16,m8,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv32f16.f16(
+ %0,
+half zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  @intrinsic_vfmerge_vzm_nxv1f32_nxv1f32_f32( %0,  %1, i32 %2) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vzm_nxv1f32_nxv1f32_f32
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e32,mf2,ta,mu
+; CHECK:   vmerge.vim {{v[0-9]+}}, {{v[0-9]+}}, 0, v0
+  %a = call  @llvm.riscv.vfmerge.nxv1f32.f32(
+ %0,
+float zeroinitializer,
+ %1,
+i32 %2)
+
+  ret  %a
+}
+
+define  @intrinsic_vfmerge_vzm_nxv

[llvm-branch-commits] [libcxx] eef4bdb - [libc++] Add a missing `<_Compare>` template argument.

[Arthur O'Dwyer via llvm-branch-commits]

Author: Arthur O'Dwyer
Date: 2021-01-12T14:18:24-05:00
New Revision: eef4bdbb34de2dda657668c2ab39397e61e36a0a

URL: 
https://github.com/llvm/llvm-project/commit/eef4bdbb34de2dda657668c2ab39397e61e36a0a
DIFF: 
https://github.com/llvm/llvm-project/commit/eef4bdbb34de2dda657668c2ab39397e61e36a0a.diff

LOG: [libc++] Add a missing `<_Compare>` template argument.

Sometimes `_Compare` is an lvalue reference type, so letting it be
deduced is pretty much always wrong. (Well, less efficient than
it could be, anyway.)

Differential Revision: https://reviews.llvm.org/D93562

Added: 


Modified: 
libcxx/include/algorithm

Removed: 




diff  --git a/libcxx/include/algorithm b/libcxx/include/algorithm
index 7a4cc39dbeab..fe9caf475f5a 100644
--- a/libcxx/include/algorithm
+++ b/libcxx/include/algorithm
@@ -4483,7 +4483,7 @@ __buffered_inplace_merge(_BidirectionalIterator __first, 
_BidirectionalIterator
 value_type* __p = __buff;
 for (_BidirectionalIterator __i = __first; __i != __middle; 
__d.template __incr(), (void) ++__i, (void) ++__p)
 ::new ((void*)__p) value_type(_VSTD::move(*__i));
-_VSTD::__half_inplace_merge(__buff, __p, __middle, __last, __first, 
__comp);
+_VSTD::__half_inplace_merge<_Compare>(__buff, __p, __middle, __last, 
__first, __comp);
 }
 else
 {
@@ -4492,9 +4492,10 @@ __buffered_inplace_merge(_BidirectionalIterator __first, 
_BidirectionalIterator
 ::new ((void*)__p) value_type(_VSTD::move(*__i));
 typedef reverse_iterator<_BidirectionalIterator> _RBi;
 typedef reverse_iterator _Rv;
-_VSTD::__half_inplace_merge(_Rv(__p), _Rv(__buff),
+typedef __invert<_Compare> _Inverted;
+_VSTD::__half_inplace_merge<_Inverted>(_Rv(__p), _Rv(__buff),
 _RBi(__middle), _RBi(__first),
-_RBi(__last), 
_VSTD::__invert<_Compare>(__comp));
+_RBi(__last), _Inverted(__comp));
 }
 }
 



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[llvm-branch-commits] [llvm] 08d4a50 - [FunctionAttrs] Precommit tests for willreturn inference.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-12T19:16:50Z
New Revision: 08d4a50467ecef1337f8d7d9763c7738861bd6f6

URL: 
https://github.com/llvm/llvm-project/commit/08d4a50467ecef1337f8d7d9763c7738861bd6f6
DIFF: 
https://github.com/llvm/llvm-project/commit/08d4a50467ecef1337f8d7d9763c7738861bd6f6.diff

LOG: [FunctionAttrs] Precommit tests for willreturn inference.

Tests for D94502.

Added: 
llvm/test/Transforms/FunctionAttrs/willreturn.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/FunctionAttrs/willreturn.ll 
b/llvm/test/Transforms/FunctionAttrs/willreturn.ll
new file mode 100644
index ..56ca12638e9c
--- /dev/null
+++ b/llvm/test/Transforms/FunctionAttrs/willreturn.ll
@@ -0,0 +1,72 @@
+; RUN: opt -function-attrs -S %s | FileCheck %s
+
+; TODO
+define void @mustprogress_readnone() mustprogress {
+; CHECK-NOT: Function Attrs: {{.*}} willreturn
+; CHECK: define void @mustprogress_readnone()
+;
+entry:
+  br label %while.body
+
+while.body:
+  br label %while.body
+}
+
+; TODO
+define i32 @mustprogress_load(i32* %ptr) mustprogress {
+; CHECK-NOT: Function Attrs: {{.*}} willreturn
+; CHECK: define i32 @mustprogress_load(
+;
+entry:
+  %r = load i32, i32* %ptr
+  ret i32 %r
+}
+
+define void @mustprogress_store(i32* %ptr) mustprogress {
+; CHECK-NOT: Function Attrs: {{.*}} willreturn
+; CHECK: define void @mustprogress_store(
+;
+entry:
+  store i32 0, i32* %ptr
+  ret void
+}
+
+declare void @unknown_fn()
+
+define void @mustprogress_call_unknown_fn() mustprogress {
+; CHECK-NOT: Function Attrs: {{.*}} willreturn
+; CHECK: define void @mustprogress_call_unknown_fn(
+;
+  call void @unknown_fn()
+  ret void
+}
+
+; TODO
+define i32 @mustprogress_call_known_functions(i32* %ptr) mustprogress {
+; CHECK-NOT: Function Attrs: {{.*}} willreturn
+; CHECK: define i32 @mustprogress_call_known_functions(
+;
+  call void @mustprogress_readnone()
+  %r = call i32 @mustprogress_load(i32* %ptr)
+  ret i32 %r
+}
+
+declare i32 @__gxx_personality_v0(...)
+
+; TODO
+define i64 @mustprogress_mayunwind() mustprogress personality i8* bitcast (i32 
(...)* @__gxx_personality_v0 to i8*) {
+; CHECK-NOT: Function Attrs: {{.*}} willreturn
+; CHECK: define i64 @mustprogress_mayunwind(
+;
+  %a = invoke i64 @fn_noread()
+  to label %A unwind label %B
+A:
+  ret i64 10
+
+B:
+  %val = landingpad { i8*, i32 }
+   catch i8* null
+  ret i64 0
+}
+
+declare i64 @fn_noread() readnone



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[llvm-branch-commits] [libcxx] 79f99ba - [libcxx] Port to OpenBSD

[Brad Smith via llvm-branch-commits]

Author: Brad Smith
Date: 2021-01-12T14:21:11-05:00
New Revision: 79f99ba65d96a35a79911daf1b67559dd52a684d

URL: 
https://github.com/llvm/llvm-project/commit/79f99ba65d96a35a79911daf1b67559dd52a684d
DIFF: 
https://github.com/llvm/llvm-project/commit/79f99ba65d96a35a79911daf1b67559dd52a684d.diff

LOG: [libcxx] Port to OpenBSD

Add initial OpenBSD support.

Reviewed By: ldionne

Differential Revision: https://reviews.llvm.org/D94205

Added: 
libcxx/include/support/openbsd/xlocale.h

Modified: 
libcxx/include/CMakeLists.txt
libcxx/include/__config
libcxx/include/__locale

Removed: 




diff  --git a/libcxx/include/CMakeLists.txt b/libcxx/include/CMakeLists.txt
index cd12f60a049c..2ffdf07efcd4 100644
--- a/libcxx/include/CMakeLists.txt
+++ b/libcxx/include/CMakeLists.txt
@@ -159,6 +159,7 @@ set(files
   support/musl/xlocale.h
   support/newlib/xlocale.h
   support/nuttx/xlocale.h
+  support/openbsd/xlocale.h
   support/solaris/floatingpoint.h
   support/solaris/wchar.h
   support/solaris/xlocale.h

diff  --git a/libcxx/include/__config b/libcxx/include/__config
index 4537d249cf4f..f1606c6d3b1c 100644
--- a/libcxx/include/__config
+++ b/libcxx/include/__config
@@ -264,14 +264,14 @@
 #  endif  // __LONG_LONG_SUPPORTED
 #endif  // __FreeBSD__
 
-#ifdef __NetBSD__
+#if defined(__NetBSD__) || defined(__OpenBSD__)
 #  include 
 #  if _BYTE_ORDER == _LITTLE_ENDIAN
 #define _LIBCPP_LITTLE_ENDIAN
 #  else  // _BYTE_ORDER == _LITTLE_ENDIAN
 #define _LIBCPP_BIG_ENDIAN
 #  endif  // _BYTE_ORDER == _LITTLE_ENDIAN
-#endif  // __NetBSD__
+#endif  // defined(__NetBSD__) || defined(__OpenBSD__)
 
 #if defined(_WIN32)
 #  define _LIBCPP_WIN32API
@@ -312,7 +312,7 @@
 #  endif
 #endif // __sun__
 
-#if defined(__CloudABI__)
+#if defined(__OpenBSD__) || defined(__CloudABI__)
// Certain architectures provide arc4random(). Prefer using
// arc4random() over /dev/{u,}random to make it possible to obtain
// random data even when using sandboxing mechanisms such as chroots,
@@ -370,6 +370,9 @@
 #define _LIBCPP_HAS_ALIGNED_ALLOC
 #define _LIBCPP_HAS_QUICK_EXIT
 #define _LIBCPP_HAS_TIMESPEC_GET
+#  elif defined(__OpenBSD__)
+#define _LIBCPP_HAS_ALIGNED_ALLOC
+#define _LIBCPP_HAS_TIMESPEC_GET
 #  elif defined(__linux__)
 #if !defined(_LIBCPP_HAS_MUSL_LIBC)
 #  if _LIBCPP_GLIBC_PREREQ(2, 15) || defined(__BIONIC__)
@@ -1109,6 +1112,7 @@ extern "C" _LIBCPP_FUNC_VIS void 
__sanitizer_annotate_contiguous_container(
 #  if defined(__FreeBSD__) || \
   defined(__wasi__) || \
   defined(__NetBSD__) || \
+  defined(__OpenBSD__) || \
   defined(__NuttX__) || \
   defined(__linux__) || \
   defined(__GNU__) || \
@@ -1204,14 +1208,15 @@ extern "C" _LIBCPP_FUNC_VIS void 
__sanitizer_annotate_contiguous_container(
 // Some systems do not provide gets() in their C library, for security reasons.
 #ifndef _LIBCPP_C_HAS_NO_GETS
 #  if defined(_LIBCPP_MSVCRT) || \
-  (defined(__FreeBSD_version) && __FreeBSD_version >= 1300043)
+  (defined(__FreeBSD_version) && __FreeBSD_version >= 1300043) || \
+  defined(__OpenBSD__)
 #define _LIBCPP_C_HAS_NO_GETS
 #  endif
 #endif
 
 #if defined(__BIONIC__) || defined(__CloudABI__) || defined(__NuttX__) ||  
\
 defined(__Fuchsia__) || defined(__wasi__) || 
defined(_LIBCPP_HAS_MUSL_LIBC) || \
-defined(__MVS__)
+defined(__MVS__) || defined(__OpenBSD__)
 #define _LIBCPP_PROVIDES_DEFAULT_RUNE_TABLE
 #endif
 

diff  --git a/libcxx/include/__locale b/libcxx/include/__locale
index f32bd59ae585..4e9e0c08acf0 100644
--- a/libcxx/include/__locale
+++ b/libcxx/include/__locale
@@ -33,6 +33,8 @@
 # include 
 #elif defined(_NEWLIB_VERSION)
 # include 
+#elif defined(__OpenBSD__)
+# include 
 #elif (defined(__APPLE__)  || defined(__FreeBSD__) \
 || defined(__EMSCRIPTEN__) || defined(__IBMCPP__))
 # include 

diff  --git a/libcxx/include/support/openbsd/xlocale.h 
b/libcxx/include/support/openbsd/xlocale.h
new file mode 100644
index ..fbfaedd127c6
--- /dev/null
+++ b/libcxx/include/support/openbsd/xlocale.h
@@ -0,0 +1,19 @@
+// -*- C++ -*-
+//=== support/openbsd/xlocale.h 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef _LIBCPP_SUPPORT_OPENBSD_XLOCALE_H
+#define _LIBCPP_SUPPORT_OPENBSD_XLOCALE_H
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#endif



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[llvm-branch-commits] [llvm] 7ecad2e - [InstSimplify] Don't fold gep p, -p to null

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-12T20:24:23+01:00
New Revision: 7ecad2e4ced180b4fdebc6b7bf6d26d83b454318

URL: 
https://github.com/llvm/llvm-project/commit/7ecad2e4ced180b4fdebc6b7bf6d26d83b454318
DIFF: 
https://github.com/llvm/llvm-project/commit/7ecad2e4ced180b4fdebc6b7bf6d26d83b454318.diff

LOG: [InstSimplify] Don't fold gep p, -p to null

This is a partial fix for https://bugs.llvm.org/show_bug.cgi?id=44403.
Folding gep p, q-p to q is only legal if p and q have the same
provenance. This fold should probably be guarded by something like
getUnderlyingObject(p) == getUnderlyingObject(q).

This patch is a partial fix that removes the special handling for
gep p, 0-p, which will fold to a null pointer, which would certainly
not pass an underlying object check (unless p is also null, in which
case this would fold trivially anyway). Folding to a null pointer
is particularly problematic due to the special handling it receives
in many places, making end-to-end miscompiles more likely.

Differential Revision: https://reviews.llvm.org/D93820

Added: 


Modified: 
llvm/lib/Analysis/InstructionSimplify.cpp
llvm/test/Transforms/InstSimplify/gep.ll

Removed: 




diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp 
b/llvm/lib/Analysis/InstructionSimplify.cpp
index 96a3ada89db4..2ae4228495e3 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -4270,9 +4270,7 @@ static Value *SimplifyGEPInst(Type *SrcTy, ArrayRef Ops,
   // doesn't truncate the pointers.
   if (Ops[1]->getType()->getScalarSizeInBits() ==
   Q.DL.getPointerSizeInBits(AS)) {
-auto PtrToIntOrZero = [GEPTy](Value *P) -> Value * {
-  if (match(P, m_Zero()))
-return Constant::getNullValue(GEPTy);
+auto PtrToInt = [GEPTy](Value *P) -> Value * {
   Value *Temp;
   if (match(P, m_PtrToInt(m_Value(Temp
 if (Temp->getType() == GEPTy)
@@ -4280,10 +4278,14 @@ static Value *SimplifyGEPInst(Type *SrcTy, 
ArrayRef Ops,
   return nullptr;
 };
 
+// FIXME: The following transforms are only legal if P and V have the
+// same provenance (PR44403). Check whether getUnderlyingObject() is
+// the same?
+
 // getelementptr V, (sub P, V) -> P if P points to a type of size 1.
 if (TyAllocSize == 1 &&
 match(Ops[1], m_Sub(m_Value(P), m_PtrToInt(m_Specific(Ops[0])
-  if (Value *R = PtrToIntOrZero(P))
+  if (Value *R = PtrToInt(P))
 return R;
 
 // getelementptr V, (ashr (sub P, V), C) -> Q
@@ -4292,7 +4294,7 @@ static Value *SimplifyGEPInst(Type *SrcTy, ArrayRef Ops,
   m_AShr(m_Sub(m_Value(P), m_PtrToInt(m_Specific(Ops[0]))),
  m_ConstantInt(C))) &&
 TyAllocSize == 1ULL << C)
-  if (Value *R = PtrToIntOrZero(P))
+  if (Value *R = PtrToInt(P))
 return R;
 
 // getelementptr V, (sdiv (sub P, V), C) -> Q
@@ -4300,7 +4302,7 @@ static Value *SimplifyGEPInst(Type *SrcTy, ArrayRef Ops,
 if (match(Ops[1],
   m_SDiv(m_Sub(m_Value(P), m_PtrToInt(m_Specific(Ops[0]))),
  m_SpecificInt(TyAllocSize
-  if (Value *R = PtrToIntOrZero(P))
+  if (Value *R = PtrToInt(P))
 return R;
   }
 }
@@ -4317,15 +4319,21 @@ static Value *SimplifyGEPInst(Type *SrcTy, 
ArrayRef Ops,
   Ops[0]->stripAndAccumulateInBoundsConstantOffsets(Q.DL,
 BasePtrOffset);
 
+  // Avoid creating inttoptr of zero here: While LLVMs treatment of
+  // inttoptr is generally conservative, this particular case is folded to
+  // a null pointer, which will have incorrect provenance.
+
   // gep (gep V, C), (sub 0, V) -> C
   if (match(Ops.back(),
-m_Sub(m_Zero(), m_PtrToInt(m_Specific(StrippedBasePtr) {
+m_Sub(m_Zero(), m_PtrToInt(m_Specific(StrippedBasePtr &&
+  !BasePtrOffset.isNullValue()) {
 auto *CI = ConstantInt::get(GEPTy->getContext(), BasePtrOffset);
 return ConstantExpr::getIntToPtr(CI, GEPTy);
   }
   // gep (gep V, C), (xor V, -1) -> C-1
   if (match(Ops.back(),
-m_Xor(m_PtrToInt(m_Specific(StrippedBasePtr)), m_AllOnes( {
+m_Xor(m_PtrToInt(m_Specific(StrippedBasePtr)), m_AllOnes())) &&
+  !BasePtrOffset.isOneValue()) {
 auto *CI = ConstantInt::get(GEPTy->getContext(), BasePtrOffset - 1);
 return ConstantExpr::getIntToPtr(CI, GEPTy);
   }

diff  --git a/llvm/test/Transforms/InstSimplify/gep.ll 
b/llvm/test/Transforms/InstSimplify/gep.ll
index e6670e4a9345..8fff9e99d34b 100644
--- a/llvm/test/Transforms/InstSimplify/gep.ll
+++ b/llvm/test/Transforms/InstSimplify/gep.ll
@@ -40,9 +40,16 

[llvm-branch-commits] [openmp] bdd1ad5 - [OpenMP] Fixed include directories for OpenMP when building OpenMP with LLVM_ENABLE_RUNTIMES

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-12T14:32:38-05:00
New Revision: bdd1ad5e5c57ae0f0bf899517c540ad8a679f01a

URL: 
https://github.com/llvm/llvm-project/commit/bdd1ad5e5c57ae0f0bf899517c540ad8a679f01a
DIFF: 
https://github.com/llvm/llvm-project/commit/bdd1ad5e5c57ae0f0bf899517c540ad8a679f01a.diff

LOG: [OpenMP] Fixed include directories for OpenMP when building OpenMP with 
LLVM_ENABLE_RUNTIMES

Some LLVM headers are generated by CMake. Before the installation,
LLVM's headers are distributed everywhere, some of which are in
`${LLVM_SRC_ROOT}/llvm/include/llvm`, and some are in
`${LLVM_BINARY_ROOT}/include/llvm`. After intallation, they're all in
`${LLVM_INSTALLATION_ROOT}/include/llvm`.

OpenMP now depends on LLVM headers. Some headers depend on headers generated
by CMake. When building OpenMP along with LLVM, a.k.a via 
`LLVM_ENABLE_RUNTIMES`,
we need to tell OpenMP where it can find those headers, especially those still
have not been copied/installed.

Reviewed By: jdoerfert, jhuber6

Differential Revision: https://reviews.llvm.org/D94534

Added: 


Modified: 
openmp/CMakeLists.txt
openmp/libomptarget/CMakeLists.txt
openmp/libomptarget/plugins/amdgpu/CMakeLists.txt
openmp/libomptarget/src/CMakeLists.txt

Removed: 




diff  --git a/openmp/CMakeLists.txt b/openmp/CMakeLists.txt
index dc0d3a6e718a..12e8d542f9f6 100644
--- a/openmp/CMakeLists.txt
+++ b/openmp/CMakeLists.txt
@@ -39,6 +39,8 @@ else()
 set(OPENMP_TEST_C_COMPILER ${LLVM_RUNTIME_OUTPUT_INTDIR}/clang.exe)
 set(OPENMP_TEST_CXX_COMPILER ${LLVM_RUNTIME_OUTPUT_INTDIR}/clang++.exe)
   endif()
+
+  list(APPEND LIBOMPTARGET_LLVM_INCLUDE_DIRS ${LLVM_MAIN_INCLUDE_DIR} 
${LLVM_BINARY_DIR}/include)
 endif()
 
 # Check and set up common compiler flags.
@@ -67,16 +69,16 @@ if (APPLE OR WIN32 OR NOT OPENMP_HAVE_STD_CPP14_FLAG)
 endif()
 
 # Attempt to locate LLVM source, required by libomptarget
-if (NOT LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR)
+if (NOT LIBOMPTARGET_LLVM_INCLUDE_DIRS)
   if (LLVM_MAIN_INCLUDE_DIR)
-set(LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR ${LLVM_MAIN_INCLUDE_DIR})
+list(APPEND LIBOMPTARGET_LLVM_INCLUDE_DIRS ${LLVM_MAIN_INCLUDE_DIR})
   elseif (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/../llvm/include)
-set(LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR 
${CMAKE_CURRENT_SOURCE_DIR}/../llvm/include)
+list(APPENDset LIBOMPTARGET_LLVM_INCLUDE_DIRS 
${CMAKE_CURRENT_SOURCE_DIR}/../llvm/include)
   endif()
 endif()
 
-if (NOT LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR)
-  message(STATUS "Missing definition for LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR, 
disabling libomptarget")
+if (NOT LIBOMPTARGET_LLVM_INCLUDE_DIRS)
+  message(STATUS "Missing definition for LIBOMPTARGET_LLVM_INCLUDE_DIRS, 
disabling libomptarget")
   set(ENABLE_LIBOMPTARGET OFF)
 endif()
 

diff  --git a/openmp/libomptarget/CMakeLists.txt 
b/openmp/libomptarget/CMakeLists.txt
index 06db7b4c35e2..6c90ced107eb 100644
--- a/openmp/libomptarget/CMakeLists.txt
+++ b/openmp/libomptarget/CMakeLists.txt
@@ -31,8 +31,8 @@ include(LibomptargetUtils)
 include(LibomptargetGetDependencies)
 
 # LLVM source tree is required at build time for libomptarget
-if (NOT LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR)
-  message(FATAL_ERROR "Missing definition for 
LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR")
+if (NOT LIBOMPTARGET_LLVM_INCLUDE_DIRS)
+  message(FATAL_ERROR "Missing definition for LIBOMPTARGET_LLVM_INCLUDE_DIRS")
 endif()
 
 # This is a list of all the targets that are supported/tested right now.

diff  --git a/openmp/libomptarget/plugins/amdgpu/CMakeLists.txt 
b/openmp/libomptarget/plugins/amdgpu/CMakeLists.txt
index 2d58388c80bb..43934b52e42b 100644
--- a/openmp/libomptarget/plugins/amdgpu/CMakeLists.txt
+++ b/openmp/libomptarget/plugins/amdgpu/CMakeLists.txt
@@ -30,8 +30,8 @@ if(NOT CMAKE_SYSTEM_PROCESSOR MATCHES 
"(x86_64)|(ppc64le)|(aarch64)$" AND CMAKE_
   return()
 endif()
 
-if (NOT LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR)
-  libomptarget_say("Not building AMDGPU plugin: Missing definition for 
LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR")
+if (NOT LIBOMPTARGET_LLVM_INCLUDE_DIRS)
+  libomptarget_say("Not building AMDGPU plugin: Missing definition for 
LIBOMPTARGET_LLVM_INCLUDE_DIRS")
   return()
 endif()
 
@@ -50,7 +50,7 @@ endif()
 
 include_directories(
   ${CMAKE_CURRENT_SOURCE_DIR}/impl
-  ${LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR}
+  ${LIBOMPTARGET_LLVM_INCLUDE_DIRS}
 )
 
 add_library(omptarget.rtl.amdgpu SHARED

diff  --git a/openmp/libomptarget/src/CMakeLists.txt 
b/openmp/libomptarget/src/CMakeLists.txt
index 4088f59042fc..38eaf455f95b 100644
--- a/openmp/libomptarget/src/CMakeLists.txt
+++ b/openmp/libomptarget/src/CMakeLists.txt
@@ -20,7 +20,7 @@ set(LIBOMPTARGET_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/omptarget.cpp
 )
 
-include_directories(${LIBOMPTARGET_LLVM_MAIN_INCLUDE_DIR})
+include_directories(${LIBOMPTARGET_LLVM_INCLUDE_DIRS})
 
 # Build libomptarget library with libdl dependency. Add LLVMSupport
 # dependency if bu

[llvm-branch-commits] [openmp] 33e2494 - [libomptarget][amdgpu][nfc] Fix build on centos

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-12T19:40:03Z
New Revision: 33e2494bea653a845cb0502cc6d3cecdf2b47750

URL: 
https://github.com/llvm/llvm-project/commit/33e2494bea653a845cb0502cc6d3cecdf2b47750
DIFF: 
https://github.com/llvm/llvm-project/commit/33e2494bea653a845cb0502cc6d3cecdf2b47750.diff

LOG: [libomptarget][amdgpu][nfc] Fix build on centos

[libomptarget][amdgpu][nfc] Fix build on centos

rtl.cpp replaced 224 with a #define from elf.h, but that
doesn't work on a centos 7 build machine with an old elf.h

Reviewed By: ronlieb

Differential Revision: https://reviews.llvm.org/D94528

Added: 


Modified: 
openmp/libomptarget/plugins/amdgpu/src/rtl.cpp

Removed: 




diff  --git a/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp 
b/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
index 437846f8b15b8..bd450f9898faf 100644
--- a/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
+++ b/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
@@ -638,7 +638,7 @@ void finiAsyncInfoPtr(__tgt_async_info *async_info_ptr) {
 }
 
 bool elf_machine_id_is_amdgcn(__tgt_device_image *image) {
-  const uint16_t amdgcnMachineID = EM_AMDGPU;
+  const uint16_t amdgcnMachineID = 224; // EM_AMDGPU may not be in system elf.h
   int32_t r = elf_check_machine(image, amdgcnMachineID);
   if (!r) {
 DP("Supported machine ID not found\n");



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[llvm-branch-commits] [clang] e5f51fd - [clang][aarch64] Precondition isHomogeneousAggregate on isCXX14Aggregate

[David Truby via llvm-branch-commits]

Author: David Truby
Date: 2021-01-12T19:44:01Z
New Revision: e5f51fdd650c6d20c81fedb8e856e9858aa10991

URL: 
https://github.com/llvm/llvm-project/commit/e5f51fdd650c6d20c81fedb8e856e9858aa10991
DIFF: 
https://github.com/llvm/llvm-project/commit/e5f51fdd650c6d20c81fedb8e856e9858aa10991.diff

LOG: [clang][aarch64] Precondition isHomogeneousAggregate on isCXX14Aggregate

MSVC on WoA64 includes isCXX14Aggregate in its definition. This is de-facto
specification on that platform, so match msvc's behaviour.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=47611

Co-authored-by: Peter Waller 

Differential Revision: https://reviews.llvm.org/D92751

Added: 


Modified: 
clang/lib/CodeGen/CGCXXABI.h
clang/lib/CodeGen/MicrosoftCXXABI.cpp
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGenCXX/homogeneous-aggregates.cpp
llvm/test/CodeGen/AArch64/arm64-windows-calls.ll

Removed: 




diff  --git a/clang/lib/CodeGen/CGCXXABI.h b/clang/lib/CodeGen/CGCXXABI.h
index 171428a3525d..ea839db7528e 100644
--- a/clang/lib/CodeGen/CGCXXABI.h
+++ b/clang/lib/CodeGen/CGCXXABI.h
@@ -146,6 +146,13 @@ class CGCXXABI {
   /// 'this' parameter of C++ instance methods.
   virtual bool isSRetParameterAfterThis() const { return false; }
 
+  /// Returns true if the ABI permits the argument to be a homogeneous
+  /// aggregate.
+  virtual bool
+  isPermittedToBeHomogeneousAggregate(const CXXRecordDecl *RD) const {
+return true;
+  };
+
   /// Find the LLVM type used to represent the given member pointer
   /// type.
   virtual llvm::Type *

diff  --git a/clang/lib/CodeGen/MicrosoftCXXABI.cpp 
b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
index c16c72dc93d5..cb0dc1d5d717 100644
--- a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
+++ b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
@@ -771,6 +771,9 @@ class MicrosoftCXXABI : public CGCXXABI {
   LoadVTablePtr(CodeGenFunction &CGF, Address This,
 const CXXRecordDecl *RD) override;
 
+  virtual bool
+  isPermittedToBeHomogeneousAggregate(const CXXRecordDecl *RD) const override;
+
 private:
   typedef std::pair VFTableIdTy;
   typedef llvm::DenseMap VTablesMapTy;
@@ -1070,7 +1073,7 @@ bool MicrosoftCXXABI::hasMostDerivedReturn(GlobalDecl GD) 
const {
   return isDeletingDtor(GD);
 }
 
-static bool isCXX14Aggregate(const CXXRecordDecl *RD) {
+static bool isTrivialForAArch64MSVC(const CXXRecordDecl *RD) {
   // For AArch64, we use the C++14 definition of an aggregate, so we also
   // check for:
   //   No private or protected non static data members.
@@ -1107,7 +1110,7 @@ bool MicrosoftCXXABI::classifyReturnType(CGFunctionInfo 
&FI) const {
   bool isTrivialForABI = RD->isPOD();
   bool isAArch64 = CGM.getTarget().getTriple().isAArch64();
   if (isAArch64)
-isTrivialForABI = RD->canPassInRegisters() && isCXX14Aggregate(RD);
+isTrivialForABI = RD->canPassInRegisters() && isTrivialForAArch64MSVC(RD);
 
   // MSVC always returns structs indirectly from C++ instance methods.
   bool isIndirectReturn = !isTrivialForABI || FI.isInstanceMethod();
@@ -4358,3 +4361,12 @@ MicrosoftCXXABI::LoadVTablePtr(CodeGenFunction &CGF, 
Address This,
   performBaseAdjustment(CGF, This, QualType(RD->getTypeForDecl(), 0));
   return {CGF.GetVTablePtr(This, CGM.Int8PtrTy, RD), RD};
 }
+
+bool MicrosoftCXXABI::isPermittedToBeHomogeneousAggregate(
+const CXXRecordDecl *CXXRD) const {
+  // MSVC Windows on Arm64 considers a type not HFA if it is not an
+  // aggregate according to the C++14 spec. This is not consistent with the
+  // AAPCS64, but is defacto spec on that platform.
+  return !CGM.getTarget().getTriple().isAArch64() ||
+ isTrivialForAArch64MSVC(CXXRD);
+}

diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index d36c7344e284..9a11a0720f3c 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -5065,8 +5065,12 @@ bool ABIInfo::isHomogeneousAggregate(QualType Ty, const 
Type *&Base,
 
 Members = 0;
 
-// If this is a C++ record, check the bases first.
+// If this is a C++ record, check the properties of the record such as
+// bases and ABI specific restrictions
 if (const CXXRecordDecl *CXXRD = dyn_cast(RD)) {
+  if (!getCXXABI().isPermittedToBeHomogeneousAggregate(CXXRD))
+return false;
+
   for (const auto &I : CXXRD->bases()) {
 // Ignore empty records.
 if (isEmptyRecord(getContext(), I.getType(), true))

diff  --git a/clang/test/CodeGenCXX/homogeneous-aggregates.cpp 
b/clang/test/CodeGenCXX/homogeneous-aggregates.cpp
index 2b3af4226407..0fa30b2663bf 100644
--- a/clang/test/CodeGenCXX/homogeneous-aggregates.cpp
+++ b/clang/test/CodeGenCXX/homogeneous-aggregates.cpp
@@ -2,6 +2,7 @@
 // RUN: %clang_cc1 -mfloat-abi hard -triple armv7-unknown-linux-gnueabi 
-emit-llvm -o - %s | FileCheck %s --check-prefix=ARM32
 // RUN: %clang_cc1 -mfloat-abi hard -triple aarch64-unknown-lin

[llvm-branch-commits] [llvm] 6cd44b2 - [FunctionAttrs] Derive willreturn for fns with readonly` & `mustprogress`.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-12T20:02:34Z
New Revision: 6cd44b204c6c6f2e915270af6792f247c4c23abc

URL: 
https://github.com/llvm/llvm-project/commit/6cd44b204c6c6f2e915270af6792f247c4c23abc
DIFF: 
https://github.com/llvm/llvm-project/commit/6cd44b204c6c6f2e915270af6792f247c4c23abc.diff

LOG: [FunctionAttrs] Derive willreturn for fns with readonly` & `mustprogress`.

Similar to D94125, derive `willreturn` for functions that are `readonly` and
`mustprogress` in FunctionAttrs.

To quote the reasoning from D94125:

Since D86233 we have `mustprogress` which, in combination with
`readonly`, implies `willreturn`. The idea is that every side-effect
has to be modeled as a "write". Consequently, `readonly` means there
is no side-effect, and `mustprogress` guarantees that we cannot "loop"
forever without side-effect.

Reviewed By: jdoerfert, nikic

Differential Revision: https://reviews.llvm.org/D94502

Added: 


Modified: 
llvm/include/llvm/IR/Function.h
llvm/lib/Transforms/IPO/FunctionAttrs.cpp
llvm/test/Transforms/FunctionAttrs/willreturn.ll

Removed: 




diff  --git a/llvm/include/llvm/IR/Function.h b/llvm/include/llvm/IR/Function.h
index 019e3a98a1af..7e209bb3769b 100644
--- a/llvm/include/llvm/IR/Function.h
+++ b/llvm/include/llvm/IR/Function.h
@@ -640,6 +640,10 @@ class Function : public GlobalObject, public 
ilist_node {
   }
   void setMustProgress() { addFnAttr(Attribute::MustProgress); }
 
+  /// Determine if the function will return.
+  bool willReturn() const { return hasFnAttribute(Attribute::WillReturn); }
+  void setWillReturn() { addFnAttr(Attribute::WillReturn); }
+
   /// True if the ABI mandates (or the user requested) that this
   /// function be in a unwind table.
   bool hasUWTable() const {

diff  --git a/llvm/lib/Transforms/IPO/FunctionAttrs.cpp 
b/llvm/lib/Transforms/IPO/FunctionAttrs.cpp
index 5cf5e9463b45..2e24cad1393b 100644
--- a/llvm/lib/Transforms/IPO/FunctionAttrs.cpp
+++ b/llvm/lib/Transforms/IPO/FunctionAttrs.cpp
@@ -77,6 +77,7 @@ STATISTIC(NumNonNullReturn, "Number of function returns 
marked nonnull");
 STATISTIC(NumNoRecurse, "Number of functions marked as norecurse");
 STATISTIC(NumNoUnwind, "Number of functions marked as nounwind");
 STATISTIC(NumNoFree, "Number of functions marked as nofree");
+STATISTIC(NumWillReturn, "Number of functions marked as willreturn");
 
 static cl::opt EnableNonnullArgPropagation(
 "enable-nonnull-arg-prop", cl::init(true), cl::Hidden,
@@ -1424,6 +1425,22 @@ static bool addNoReturnAttrs(const SCCNodeSet &SCCNodes) 
{
   return Changed;
 }
 
+// Set the willreturn function attribute if possible.
+static bool addWillReturn(const SCCNodeSet &SCCNodes) {
+  bool Changed = false;
+
+  for (Function *F : SCCNodes) {
+if (!F || !F->onlyReadsMemory() || !F->mustProgress() || F->willReturn())
+  continue;
+
+F->setWillReturn();
+NumWillReturn++;
+Changed = true;
+  }
+
+  return Changed;
+}
+
 static SCCNodesResult createSCCNodeSet(ArrayRef Functions) {
   SCCNodesResult Res;
   Res.HasUnknownCall = false;
@@ -1468,6 +1485,7 @@ static bool deriveAttrsInPostOrder(ArrayRef 
Functions,
   Changed |= addArgumentAttrs(Nodes.SCCNodes);
   Changed |= inferConvergent(Nodes.SCCNodes);
   Changed |= addNoReturnAttrs(Nodes.SCCNodes);
+  Changed |= addWillReturn(Nodes.SCCNodes);
 
   // If we have no external nodes participating in the SCC, we can deduce some
   // more precise attributes as well.

diff  --git a/llvm/test/Transforms/FunctionAttrs/willreturn.ll 
b/llvm/test/Transforms/FunctionAttrs/willreturn.ll
index 56ca12638e9c..d92151c299fe 100644
--- a/llvm/test/Transforms/FunctionAttrs/willreturn.ll
+++ b/llvm/test/Transforms/FunctionAttrs/willreturn.ll
@@ -1,9 +1,8 @@
 ; RUN: opt -function-attrs -S %s | FileCheck %s
 
-; TODO
 define void @mustprogress_readnone() mustprogress {
-; CHECK-NOT: Function Attrs: {{.*}} willreturn
-; CHECK: define void @mustprogress_readnone()
+; CHECK:  Function Attrs: {{.*}} noreturn {{.*}} readnone willreturn
+; CHECK-NEXT: define void @mustprogress_readnone()
 ;
 entry:
   br label %while.body
@@ -12,10 +11,9 @@ while.body:
   br label %while.body
 }
 
-; TODO
 define i32 @mustprogress_load(i32* %ptr) mustprogress {
-; CHECK-NOT: Function Attrs: {{.*}} willreturn
-; CHECK: define i32 @mustprogress_load(
+; CHECK:  Function Attrs: {{.*}} readonly willreturn
+; CHECK-NEXT: define i32 @mustprogress_load(
 ;
 entry:
   %r = load i32, i32* %ptr
@@ -35,16 +33,15 @@ declare void @unknown_fn()
 
 define void @mustprogress_call_unknown_fn() mustprogress {
 ; CHECK-NOT: Function Attrs: {{.*}} willreturn
-; CHECK: define void @mustprogress_call_unknown_fn(
+; CHECK: define void @mustprogress_call_unknown_fn(
 ;
   call void @unknown_fn()
   ret void
 }
 
-; TODO
 define i32 @mustprogress_call_known_functions(i32* %ptr) mustprogress {
-; CHECK-NOT: Function Attrs: {{.*}} will

[llvm-branch-commits] [clang] e53bbd9 - [IR] move nomerge attribute from function declaration/definition to callsites

[Zequan Wu via llvm-branch-commits]

Author: Zequan Wu
Date: 2021-01-12T12:10:46-08:00
New Revision: e53bbd99516fc7b612df1ae08d48288d0b8784ea

URL: 
https://github.com/llvm/llvm-project/commit/e53bbd99516fc7b612df1ae08d48288d0b8784ea
DIFF: 
https://github.com/llvm/llvm-project/commit/e53bbd99516fc7b612df1ae08d48288d0b8784ea.diff

LOG: [IR] move nomerge attribute from function declaration/definition to 
callsites

Move nomerge attribute from function declaration/definition to callsites to
allow virtual function calls attach the attribute.

Differential Revision: https://reviews.llvm.org/D94537

Added: 


Modified: 
clang/lib/CodeGen/CGCall.cpp
clang/lib/CodeGen/CodeGenModule.cpp
clang/test/CodeGen/attr-nomerge.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 2cc7203d1194..42801372189b 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -1985,7 +1985,9 @@ void CodeGenModule::ConstructAttributeList(
   FuncAttrs.addAttribute(llvm::Attribute::NoReturn);
 NBA = Fn->getAttr();
   }
-  if (!AttrOnCallSite && TargetDecl->hasAttr())
+  // Only place nomerge attribute on call sites, never functions. This
+  // allows it to work on indirect virtual function calls.
+  if (AttrOnCallSite && TargetDecl->hasAttr())
 FuncAttrs.addAttribute(llvm::Attribute::NoMerge);
 }
 
@@ -5018,13 +5020,11 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo 
&CallInfo,
 Attrs.addAttribute(getLLVMContext(), 
llvm::AttributeList::FunctionIndex,
llvm::Attribute::StrictFP);
 
-  // Add nomerge attribute to the call-site if the callee function doesn't have
-  // the attribute.
-  if (const FunctionDecl *FD = dyn_cast_or_null(TargetDecl))
-if (!FD->hasAttr() && InNoMergeAttributedStmt)
-  Attrs = Attrs.addAttribute(getLLVMContext(),
- llvm::AttributeList::FunctionIndex,
- llvm::Attribute::NoMerge);
+  // Add call-site nomerge attribute if exists.
+  if (InNoMergeAttributedStmt)
+Attrs =
+Attrs.addAttribute(getLLVMContext(), 
llvm::AttributeList::FunctionIndex,
+   llvm::Attribute::NoMerge);
 
   // Apply some call-site-specific attributes.
   // TODO: work this into building the attribute set.

diff  --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index da5b03b138bf..bee51715bdc6 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -1772,9 +1772,6 @@ void 
CodeGenModule::SetLLVMFunctionAttributesForDefinition(const Decl *D,
   B.addAttribute(llvm::Attribute::MinSize);
   }
 
-  if (D->hasAttr())
-B.addAttribute(llvm::Attribute::NoMerge);
-
   F->addAttributes(llvm::AttributeList::FunctionIndex, B);
 
   unsigned alignment = D->getMaxAlignment() / Context.getCharWidth();

diff  --git a/clang/test/CodeGen/attr-nomerge.cpp 
b/clang/test/CodeGen/attr-nomerge.cpp
index d93f4a7c96d6..fc26af379fdb 100644
--- a/clang/test/CodeGen/attr-nomerge.cpp
+++ b/clang/test/CodeGen/attr-nomerge.cpp
@@ -3,7 +3,7 @@
 class A {
 public:
   [[clang::nomerge]] A();
-  [[clang::nomerge]] ~A();
+  [[clang::nomerge]] virtual ~A();
   [[clang::nomerge]] void f();
   [[clang::nomerge]] virtual void g();
   [[clang::nomerge]] static void f1();
@@ -14,14 +14,14 @@ class B : public A {
   void g() override;
 };
 
-[[clang::nomerge]] bool bar();
+bool bar();
 [[clang::nomerge]] void f(bool, bool);
 
 void foo(int i, A *ap, B *bp) {
   [[clang::nomerge]] bar();
   [[clang::nomerge]] (i = 4, bar());
   [[clang::nomerge]] (void)(bar());
-  [[clang::nomerge]] f(bar(), bar());
+  f(bar(), bar());
   [[clang::nomerge]] [] { bar(); bar(); }(); // nomerge only applies to the 
anonymous function call
   [[clang::nomerge]] for (bar(); bar(); bar()) {}
   [[clang::nomerge]] { asm("nop"); }
@@ -37,6 +37,9 @@ void foo(int i, A *ap, B *bp) {
 
   B b;
   b.g();
+
+  A *newA = new B();
+  delete newA;
 }
 
 int g(int i);
@@ -57,37 +60,34 @@ void something_else_again() {
   g(1);
 }
 
+// CHECK: call zeroext i1 @_Z3barv() #[[ATTR0:[0-9]+]]
+// CHECK: call zeroext i1 @_Z3barv() #[[ATTR0]]
+// CHECK: call zeroext i1 @_Z3barv() #[[ATTR0]]
 // CHECK: call zeroext i1 @_Z3barv(){{$}}
 // CHECK: call zeroext i1 @_Z3barv(){{$}}
-// CHECK: call zeroext i1 @_Z3barv(){{$}}
-// CHECK: call zeroext i1 @_Z3barv(){{$}}
-// CHECK: call zeroext i1 @_Z3barv(){{$}}
-// CHECK: call void @_Z1fbb({{.*}}){{$}}
-// CHECK: call void @"_ZZ3fooiP1AP1BENK3$_0clEv"{{.*}} #[[ATTR0:[0-9]+]]
-// CHECK: call zeroext i1 @_Z3barv(){{$}}
-// CHECK: call zeroext i1 @_Z3barv(){{$}}
-// CHECK: call zeroext i1 @_Z3barv(){{$}}
+// CHECK: call void @_Z1fbb({{.*}}) #[[ATTR0]]
+// CHECK: call void @"_ZZ3fooiP1AP1BENK3$_0clEv"{{.*}} #[[ATTR0]]
+// CHECK: call zeroext i1 @_Z3barv() #[[ATTR0]]
+// CHECK-LABEL: for.cond:
+

[llvm-branch-commits] [clang-tools-extra] 922a5b8 - [clang-tidy] Add test for Transformer-based checks with diagnostics.

[Yitzhak Mandelbaum via llvm-branch-commits]

Author: Yitzhak Mandelbaum
Date: 2021-01-12T20:15:22Z
New Revision: 922a5b894114defb5302e514973de8c9cd23af6a

URL: 
https://github.com/llvm/llvm-project/commit/922a5b894114defb5302e514973de8c9cd23af6a
DIFF: 
https://github.com/llvm/llvm-project/commit/922a5b894114defb5302e514973de8c9cd23af6a.diff

LOG: [clang-tidy] Add test for Transformer-based checks with diagnostics.

Adds a test that checks the diagnostic output of the tidy.

Differential Revision: https://reviews.llvm.org/D94453

Added: 


Modified: 
clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp

Removed: 




diff  --git 
a/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp 
b/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp
index e8df4bb60071..24b6bea98787 100644
--- a/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp
+++ b/clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp
@@ -10,8 +10,10 @@
 #include "ClangTidyTest.h"
 #include "clang/ASTMatchers/ASTMatchers.h"
 #include "clang/Tooling/Transformer/RangeSelector.h"
+#include "clang/Tooling/Transformer/RewriteRule.h"
 #include "clang/Tooling/Transformer/Stencil.h"
 #include "clang/Tooling/Transformer/Transformer.h"
+#include "gmock/gmock.h"
 #include "gtest/gtest.h"
 
 namespace clang {
@@ -25,20 +27,21 @@ using transformer::change;
 using transformer::IncludeFormat;
 using transformer::makeRule;
 using transformer::node;
+using transformer::noopEdit;
 using transformer::RewriteRule;
+using transformer::RootID;
 using transformer::statement;
 
 // Invert the code of an if-statement, while maintaining its semantics.
 RewriteRule invertIf() {
   StringRef C = "C", T = "T", E = "E";
-  RewriteRule Rule =
-  makeRule(ifStmt(hasCondition(expr().bind(C)), hasThen(stmt().bind(T)),
-  hasElse(stmt().bind(E))),
-   change(statement(std::string(RewriteRule::RootID)),
-  cat("if(!(", node(std::string(C)), ")) ",
-  statement(std::string(E)), " else ",
-  statement(std::string(T,
-   cat("negate condition and reverse `then` and `else` branches"));
+  RewriteRule Rule = makeRule(
+  ifStmt(hasCondition(expr().bind(C)), hasThen(stmt().bind(T)),
+ hasElse(stmt().bind(E))),
+  change(statement(RootID), cat("if(!(", node(std::string(C)), ")) ",
+statement(std::string(E)), " else ",
+statement(std::string(T,
+  cat("negate condition and reverse `then` and `else` branches"));
   return Rule;
 }
 
@@ -68,6 +71,25 @@ TEST(TransformerClangTidyCheckTest, Basic) {
   EXPECT_EQ(Expected, test::runCheckOnCode(Input));
 }
 
+TEST(TransformerClangTidyCheckTest, DiagnosticsCorrectlyGenerated) {
+  class DiagOnlyCheck : public TransformerClangTidyCheck {
+  public:
+DiagOnlyCheck(StringRef Name, ClangTidyContext *Context)
+: TransformerClangTidyCheck(
+  makeRule(returnStmt(), noopEdit(node(RootID)), cat("message")),
+  Name, Context) {}
+  };
+  std::string Input = "int h() { return 5; }";
+  std::vector Errors;
+  EXPECT_EQ(Input, test::runCheckOnCode(Input, &Errors));
+  EXPECT_EQ(Errors.size(), 1U);
+  EXPECT_EQ(Errors[0].Message.Message, "message");
+  EXPECT_THAT(Errors[0].Ranges, testing::IsEmpty());
+
+  // The diagnostic is anchored to the match, "return 5".
+  EXPECT_EQ(Errors[0].Message.FileOffset, 10U);
+}
+
 class IntLitCheck : public TransformerClangTidyCheck {
 public:
   IntLitCheck(StringRef Name, ClangTidyContext *Context)



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[llvm-branch-commits] [llvm] d49974f - [InstCombine] Regenerate test checks (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-12T21:26:42+01:00
New Revision: d49974f9c98ebce5a679eced9f27add138b881fa

URL: 
https://github.com/llvm/llvm-project/commit/d49974f9c98ebce5a679eced9f27add138b881fa
DIFF: 
https://github.com/llvm/llvm-project/commit/d49974f9c98ebce5a679eced9f27add138b881fa.diff

LOG: [InstCombine] Regenerate test checks (NFC)

Added: 


Modified: 
llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll
llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll
llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll
llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll
llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll
llvm/test/Transforms/InstCombine/2008-08-05-And.ll
llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
llvm/test/Transforms/InstCombine/range-check.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll 
b/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll
index 784b3e4fe687..38f6523bec39 100644
--- a/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll
+++ b/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll
@@ -1,31 +1,44 @@
-; RUN: opt < %s -instcombine -S | \
-; RUN:   grep icmp | count 1
-; RUN: opt < %s -instcombine -S | \
-; RUN:   grep "icmp ugt" | count 1
-; END.
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
 
 target datalayout = "e-p:32:32"
 target triple = "i686-pc-linux-gnu"
 @r = external global [17 x i32] ; <[17 x i32]*> [#uses=1]
 
 define i1 @print_pgm_cond_true(i32 %tmp12.reload, i32* %tmp16.out) {
+; CHECK-LABEL: @print_pgm_cond_true(
+; CHECK-NEXT:  newFuncRoot:
+; CHECK-NEXT:br label [[COND_TRUE:%.*]]
+; CHECK:   bb27.exitStub:
+; CHECK-NEXT:store i32 [[TMP16:%.*]], i32* [[TMP16_OUT:%.*]], align 4
+; CHECK-NEXT:ret i1 true
+; CHECK:   cond_next23.exitStub:
+; CHECK-NEXT:store i32 [[TMP16]], i32* [[TMP16_OUT]], align 4
+; CHECK-NEXT:ret i1 false
+; CHECK:   cond_true:
+; CHECK-NEXT:[[TMP15:%.*]] = getelementptr [17 x i32], [17 x i32]* @r, i32 
0, i32 [[TMP12_RELOAD:%.*]]
+; CHECK-NEXT:[[TMP16]] = load i32, i32* [[TMP15]], align 4
+; CHECK-NEXT:[[TMP16_OFF:%.*]] = add i32 [[TMP16]], 31
+; CHECK-NEXT:[[TMP0:%.*]] = icmp ugt i32 [[TMP16_OFF]], 62
+; CHECK-NEXT:br i1 [[TMP0]], label [[BB27_EXITSTUB:%.*]], label 
[[COND_NEXT23_EXITSTUB:%.*]]
+;
 newFuncRoot:
-br label %cond_true
+  br label %cond_true
 
 bb27.exitStub:  ; preds = %cond_true
-store i32 %tmp16, i32* %tmp16.out
-ret i1 true
+  store i32 %tmp16, i32* %tmp16.out
+  ret i1 true
 
 cond_next23.exitStub:   ; preds = %cond_true
-store i32 %tmp16, i32* %tmp16.out
-ret i1 false
+  store i32 %tmp16, i32* %tmp16.out
+  ret i1 false
 
 cond_true:  ; preds = %newFuncRoot
-%tmp15 = getelementptr [17 x i32], [17 x i32]* @r, i32 0, i32 
%tmp12.reload ;  [#uses=1]
-%tmp16 = load i32, i32* %tmp15   ;  [#uses=4]
-%tmp18 = icmp slt i32 %tmp16, -31   ;  [#uses=1]
-%tmp21 = icmp sgt i32 %tmp16, 31;  [#uses=1]
-%bothcond = or i1 %tmp18, %tmp21;  [#uses=1]
-br i1 %bothcond, label %bb27.exitStub, label %cond_next23.exitStub
+  %tmp15 = getelementptr [17 x i32], [17 x i32]* @r, i32 0, i32 %tmp12.reload  
   ;  [#uses=1]
+  %tmp16 = load i32, i32* %tmp15   ;  [#uses=4]
+  %tmp18 = icmp slt i32 %tmp16, -31   ;  [#uses=1]
+  %tmp21 = icmp sgt i32 %tmp16, 31;  [#uses=1]
+  %bothcond = or i1 %tmp18, %tmp21;  [#uses=1]
+  br i1 %bothcond, label %bb27.exitStub, label %cond_next23.exitStub
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll 
b/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
index 826d68aefc1a..6db886b25ede 100644
--- a/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
+++ b/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
@@ -1,9 +1,15 @@
-; RUN: opt < %s -instcombine -S | grep "icmp sle"
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
 ; PR1244
 
 define i1 @test(i32 %c.3.i, i32 %d.292.2.i) {
-   %tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i 
-   %tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i 
-   %sel_tmp80 = or i1 %tmp266.i, %tmp276.i 
-   ret i1 %sel_tmp80
+; CHECK-LABEL: @test(
+; CHECK-NEXT:[[TMP1:%.*]] = icmp sle i32 [[C_3_I:%.*]], [[D_292_2_I:%.*]]
+; CHECK-NEXT:ret i1 [[TMP1]]
+;
+  %tmp266.i = icmp slt i32 %c.3.i, %

[llvm-branch-commits] [llvm] 9f61fbd - [LV] Relax assumption that LCSSA implies single entry

[Philip Reames via llvm-branch-commits]

Author: Philip Reames
Date: 2021-01-12T12:34:52-08:00
New Revision: 9f61fbd75ae1757d77988b37562de4d6583579aa

URL: 
https://github.com/llvm/llvm-project/commit/9f61fbd75ae1757d77988b37562de4d6583579aa
DIFF: 
https://github.com/llvm/llvm-project/commit/9f61fbd75ae1757d77988b37562de4d6583579aa.diff

LOG: [LV] Relax assumption that LCSSA implies single entry

This relates to the ongoing effort to support vectorization of multiple exit 
loops (see D93317).

The previous code assumed that LCSSA phis were always single entry before the 
vectorizer ran. This was correct, but only because the vectorizer allowed only 
a single exiting edge. There's nothing in the definition of LCSSA which 
requires single entry phis.

A common case where this comes up is with a loop with multiple exiting blocks 
which all reach a common exit block. (e.g. see the test updates)

Differential Revision: https://reviews.llvm.org/D93725

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
llvm/test/Transforms/LoopVectorize/loop-form.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
index 3906b11ba4b9..e3e522958c3a 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
@@ -1101,8 +1101,7 @@ bool LoopVectorizationLegality::canVectorizeLoopCFG(Loop 
*Lp,
   // TODO: This restriction can be relaxed in the near future, it's here solely
   // to allow separation of changes for review. We need to generalize the phi
   // update logic in a number of places.
-  BasicBlock *ExitBB = Lp->getUniqueExitBlock();
-  if (!ExitBB) {
+  if (!Lp->getUniqueExitBlock()) {
 reportVectorizationFailure("The loop must have a unique exit block",
 "loop control flow is not understood by vectorizer",
 "CFGNotUnderstood", ORE, TheLoop);
@@ -1110,24 +1109,7 @@ bool LoopVectorizationLegality::canVectorizeLoopCFG(Loop 
*Lp,
   Result = false;
 else
   return false;
-  } else {
-// The existing code assumes that LCSSA implies that phis are single entry
-// (which was true when we had at most a single exiting edge from the 
latch).
-// In general, there's nothing which prevents an LCSSA phi in exit block 
from
-// having two or more values if there are multiple exiting edges leading to
-// the exit block.  (TODO: implement general case)
-if (!llvm::empty(ExitBB->phis()) && !ExitBB->getSinglePredecessor()) {
-  reportVectorizationFailure("The loop must have no live-out values if "
- "it has more than one exiting block",
-  "loop control flow is not understood by vectorizer",
-  "CFGNotUnderstood", ORE, TheLoop);
-  if (DoExtraAnalysis)
-Result = false;
-  else
-return false;
-}
   }
-
   return Result;
 }
 

diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index e6cadf8f8796..5ae400fb5dc9 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -633,10 +633,11 @@ class InnerLoopVectorizer {
   /// Clear NSW/NUW flags from reduction instructions if necessary.
   void clearReductionWrapFlags(RecurrenceDescriptor &RdxDesc);
 
-  /// The Loop exit block may have single value PHI nodes with some
-  /// incoming value. While vectorizing we only handled real values
-  /// that were defined inside the loop and we should have one value for
-  /// each predecessor of its parent basic block. See PR14725.
+  /// Fixup the LCSSA phi nodes in the unique exit block.  This simply
+  /// means we need to add the appropriate incoming value from the middle
+  /// block as exiting edges from the scalar epilogue loop (if present) are
+  /// already in place, and we exit the vector loop exclusively to the middle
+  /// block.
   void fixLCSSAPHIs();
 
   /// Iteratively sink the scalarized operands of a predicated instruction into
@@ -4149,11 +4150,14 @@ void 
InnerLoopVectorizer::fixFirstOrderRecurrence(PHINode *Phi) {
   // vector recurrence we extracted in the middle block. Since the loop is in
   // LCSSA form, we just need to find all the phi nodes for the original scalar
   // recurrence in the exit block, and then add an edge for the middle block.
-  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
-if (LCSSAPhi.getIncomingValue(0) == Phi) {
+  // Note that LCSSA does not imply single entry when the original scalar loop
+  // had multiple exiting edges (as we always run the last iteration in the
+  // scalar epilogue); in that case, the exiting path through middle will be
+  // dynamically dead

[llvm-branch-commits] [clang] f706486 - Fix for crash in __builtin_return_address in template context.

[Sunil Srivastava via llvm-branch-commits]

Author: Sunil Srivastava
Date: 2021-01-12T12:37:18-08:00
New Revision: f706486eaf07020b11f2088274c757e4070fe6d1

URL: 
https://github.com/llvm/llvm-project/commit/f706486eaf07020b11f2088274c757e4070fe6d1
DIFF: 
https://github.com/llvm/llvm-project/commit/f706486eaf07020b11f2088274c757e4070fe6d1.diff

LOG: Fix for crash in __builtin_return_address in template context.

The check for argument value needs to be guarded by !isValueDependent().

Differential Revision: https://reviews.llvm.org/D94438

Added: 


Modified: 
clang/lib/Sema/SemaChecking.cpp
clang/test/Sema/builtin-returnaddress.c

Removed: 




diff  --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 15b5934224f0..2d3d36f4adad 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -1943,7 +1943,8 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, 
unsigned BuiltinID,
 // -Wframe-address warning if non-zero passed to builtin
 // return/frame address.
 Expr::EvalResult Result;
-if (TheCall->getArg(0)->EvaluateAsInt(Result, getASTContext()) &&
+if (!TheCall->getArg(0)->isValueDependent() &&
+TheCall->getArg(0)->EvaluateAsInt(Result, getASTContext()) &&
 Result.Val.getInt() != 0)
   Diag(TheCall->getBeginLoc(), diag::warn_frame_address)
   << ((BuiltinID == Builtin::BI__builtin_return_address)

diff  --git a/clang/test/Sema/builtin-returnaddress.c 
b/clang/test/Sema/builtin-returnaddress.c
index 3ebbdc6048d8..16d2a517ac12 100644
--- a/clang/test/Sema/builtin-returnaddress.c
+++ b/clang/test/Sema/builtin-returnaddress.c
@@ -1,5 +1,6 @@
 // RUN: %clang_cc1 -fsyntax-only -Wframe-address -verify %s
 // RUN: %clang_cc1 -fsyntax-only -Wmost -verify %s
+// RUN: %clang_cc1 -x c++ -fsyntax-only -Wframe-address -verify %s
 
 void* a(unsigned x) {
 return __builtin_return_address(0);
@@ -17,3 +18,14 @@ void* d(unsigned x) {
 return __builtin_frame_address(1); // expected-warning{{calling 
'__builtin_frame_address' with a nonzero argument is unsafe}}
 }
 
+#ifdef __cplusplus
+template void *RA()
+{
+  return __builtin_return_address(N); // expected-warning{{calling 
'__builtin_return_address' with a nonzero argument is unsafe}}
+}
+
+void *foo()
+{
+ return RA<2>(); // expected-note{{in instantiation of function template 
specialization 'RA<2>' requested here}}
+}
+#endif



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[llvm-branch-commits] [llvm] caafdf0 - [LV] Weaken spuriously strong assert in LoopVersioning

[Philip Reames via llvm-branch-commits]

Author: Philip Reames
Date: 2021-01-12T12:57:13-08:00
New Revision: caafdf07bbccbe89219539e2b56043c2a98358f1

URL: 
https://github.com/llvm/llvm-project/commit/caafdf07bbccbe89219539e2b56043c2a98358f1
DIFF: 
https://github.com/llvm/llvm-project/commit/caafdf07bbccbe89219539e2b56043c2a98358f1.diff

LOG: [LV] Weaken spuriously strong assert in LoopVersioning

LoopVectorize uses some utilities on LoopVersioning, but doesn't actually use 
it for, you know, versioning.  As a result, the precondition LoopVersioning 
expects is too strong for this user.  At the moment, LoopVectorize supports any 
loop with a unique exit block, so check the same precondition here.

Really, the whole class structure here is a mess.  We should separate the 
actual versioning from the metadata updates, but that's a bigger problem.

Added: 


Modified: 
llvm/lib/Transforms/Utils/LoopVersioning.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/LoopVersioning.cpp 
b/llvm/lib/Transforms/Utils/LoopVersioning.cpp
index b54aee35d56d..599bd1feb2bc 100644
--- a/llvm/lib/Transforms/Utils/LoopVersioning.cpp
+++ b/llvm/lib/Transforms/Utils/LoopVersioning.cpp
@@ -44,7 +44,7 @@ LoopVersioning::LoopVersioning(const LoopAccessInfo &LAI,
   AliasChecks(Checks.begin(), Checks.end()),
   Preds(LAI.getPSE().getUnionPredicate()), LAI(LAI), LI(LI), DT(DT),
   SE(SE) {
-  assert(L->getExitBlock() && "No single exit block");
+  assert(L->getUniqueExitBlock() && "No single exit block");
 }
 
 void LoopVersioning::versionLoop(



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[llvm-branch-commits] [llvm] 46507a9 - [SLP] reduce code duplication while matching reductions; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-12T16:03:57-05:00
New Revision: 46507a96fc13146f73e5915a008055c5a59191c2

URL: 
https://github.com/llvm/llvm-project/commit/46507a96fc13146f73e5915a008055c5a59191c2
DIFF: 
https://github.com/llvm/llvm-project/commit/46507a96fc13146f73e5915a008055c5a59191c2.diff

LOG: [SLP] reduce code duplication while matching reductions; NFC

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index bd673d112b3a..ff22572782e2 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6857,49 +6857,48 @@ class HorizontalReduction {
 
   // Visit left or right.
   Value *NextV = TreeN->getOperand(EdgeToVisit);
-  if (NextV != Phi) {
-auto *I = dyn_cast(NextV);
-OpData = getOperationData(I);
-// Continue analysis if the next operand is a reduction operation or
-// (possibly) a reduced value. If the reduced value opcode is not set,
-// the first met operation != reduction operation is considered as the
-// reduced value class.
-const bool IsRdxInst = OpData == RdxTreeInst;
-if (I && (!RdxLeafVal || OpData == RdxLeafVal || IsRdxInst)) {
-  // Only handle trees in the current basic block.
-  if (!RdxTreeInst.hasSameParent(I, B->getParent(), IsRdxInst)) {
-// I is an extra argument for TreeN (its parent operation).
-markExtraArg(Stack.back(), I);
-continue;
-  }
+  auto *I = dyn_cast(NextV);
+  OpData = getOperationData(I);
+  // Continue analysis if the next operand is a reduction operation or
+  // (possibly) a reduced value. If the reduced value opcode is not set,
+  // the first met operation != reduction operation is considered as the
+  // reduced value class.
+  const bool IsRdxInst = OpData == RdxTreeInst;
+  if (I && I != Phi &&
+  (!RdxLeafVal || OpData == RdxLeafVal || IsRdxInst)) {
+// Only handle trees in the current basic block.
+if (!RdxTreeInst.hasSameParent(I, B->getParent(), IsRdxInst)) {
+  // I is an extra argument for TreeN (its parent operation).
+  markExtraArg(Stack.back(), I);
+  continue;
+}
 
-  // Each tree node needs to have minimal number of users except for 
the
-  // ultimate reduction.
-  if (!RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) && I != B) {
-// I is an extra argument for TreeN (its parent operation).
-markExtraArg(Stack.back(), I);
-continue;
-  }
+// Each tree node needs to have minimal number of users except for the
+// ultimate reduction.
+if (!RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) && I != B) {
+  // I is an extra argument for TreeN (its parent operation).
+  markExtraArg(Stack.back(), I);
+  continue;
+}
 
-  if (IsRdxInst) {
-// We need to be able to reassociate the reduction operations.
-if (!OpData.isAssociative(I)) {
-  // I is an extra argument for TreeN (its parent operation).
-  markExtraArg(Stack.back(), I);
-  continue;
-}
-  } else if (RdxLeafVal && RdxLeafVal != OpData) {
-// Make sure that the opcodes of the operations that we are going 
to
-// reduce match.
+if (IsRdxInst) {
+  // We need to be able to reassociate the reduction operations.
+  if (!OpData.isAssociative(I)) {
 // I is an extra argument for TreeN (its parent operation).
 markExtraArg(Stack.back(), I);
 continue;
-  } else if (!RdxLeafVal) {
-RdxLeafVal = OpData;
   }
-  Stack.push_back(std::make_pair(I, OpData.getFirstOperandIndex()));
+} else if (RdxLeafVal && RdxLeafVal != OpData) {
+  // Make sure that the opcodes of the operations that we are going to
+  // reduce match.
+  // I is an extra argument for TreeN (its parent operation).
+  markExtraArg(Stack.back(), I);
   continue;
+} else if (!RdxLeafVal) {
+  RdxLeafVal = OpData;
 }
+Stack.push_back(std::make_pair(I, OpData.getFirstOperandIndex()));
+continue;
   }
   // NextV is an extra argument for TreeN (its parent operation).
   markExtraArg(Stack.back(), NextV);



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[llvm-branch-commits] [llvm] 554be30 - [SLP] reduce code duplication in processing reductions; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-12T16:03:57-05:00
New Revision: 554be30a42802d66807f93e4671a518c1c04e0f8

URL: 
https://github.com/llvm/llvm-project/commit/554be30a42802d66807f93e4671a518c1c04e0f8
DIFF: 
https://github.com/llvm/llvm-project/commit/554be30a42802d66807f93e4671a518c1c04e0f8.diff

LOG: [SLP] reduce code duplication in processing reductions; NFC

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index ff22572782e2..04bdc74c7879 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6867,38 +6867,29 @@ class HorizontalReduction {
   if (I && I != Phi &&
   (!RdxLeafVal || OpData == RdxLeafVal || IsRdxInst)) {
 // Only handle trees in the current basic block.
-if (!RdxTreeInst.hasSameParent(I, B->getParent(), IsRdxInst)) {
-  // I is an extra argument for TreeN (its parent operation).
-  markExtraArg(Stack.back(), I);
-  continue;
-}
-
 // Each tree node needs to have minimal number of users except for the
 // ultimate reduction.
-if (!RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) && I != B) {
-  // I is an extra argument for TreeN (its parent operation).
-  markExtraArg(Stack.back(), I);
-  continue;
-}
-
-if (IsRdxInst) {
-  // We need to be able to reassociate the reduction operations.
-  if (!OpData.isAssociative(I)) {
+if (RdxTreeInst.hasSameParent(I, B->getParent(), IsRdxInst) &&
+RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) && I != B) {
+  if (IsRdxInst) {
+// We need to be able to reassociate the reduction operations.
+if (!OpData.isAssociative(I)) {
+  // I is an extra argument for TreeN (its parent operation).
+  markExtraArg(Stack.back(), I);
+  continue;
+}
+  } else if (RdxLeafVal && RdxLeafVal != OpData) {
+// Make sure that the opcodes of the operations that we are going 
to
+// reduce match.
 // I is an extra argument for TreeN (its parent operation).
 markExtraArg(Stack.back(), I);
 continue;
+  } else if (!RdxLeafVal) {
+RdxLeafVal = OpData;
   }
-} else if (RdxLeafVal && RdxLeafVal != OpData) {
-  // Make sure that the opcodes of the operations that we are going to
-  // reduce match.
-  // I is an extra argument for TreeN (its parent operation).
-  markExtraArg(Stack.back(), I);
+  Stack.push_back(std::make_pair(I, OpData.getFirstOperandIndex()));
   continue;
-} else if (!RdxLeafVal) {
-  RdxLeafVal = OpData;
 }
-Stack.push_back(std::make_pair(I, OpData.getFirstOperandIndex()));
-continue;
   }
   // NextV is an extra argument for TreeN (its parent operation).
   markExtraArg(Stack.back(), NextV);



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[llvm-branch-commits] [llvm] 92fb5c4 - [SLP] rename variable to improve readability; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-12T16:03:57-05:00
New Revision: 92fb5c49e8aa53ac97fa2fb1a891a4d7ccfd75c5

URL: 
https://github.com/llvm/llvm-project/commit/92fb5c49e8aa53ac97fa2fb1a891a4d7ccfd75c5
DIFF: 
https://github.com/llvm/llvm-project/commit/92fb5c49e8aa53ac97fa2fb1a891a4d7ccfd75c5.diff

LOG: [SLP] rename variable to improve readability; NFC

The OperationData in the 2nd block (visiting the operands)
is completely independent of the 1st block.

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 04bdc74c7879..1ef762c9dfa7 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6826,7 +6826,7 @@ class HorizontalReduction {
 while (!Stack.empty()) {
   Instruction *TreeN = Stack.back().first;
   unsigned EdgeToVisit = Stack.back().second++;
-  OperationData OpData = getOperationData(TreeN);
+  const OperationData OpData = getOperationData(TreeN);
   bool IsReducedValue = OpData != RdxTreeInst;
 
   // Postorder vist.
@@ -6858,14 +6858,14 @@ class HorizontalReduction {
   // Visit left or right.
   Value *NextV = TreeN->getOperand(EdgeToVisit);
   auto *I = dyn_cast(NextV);
-  OpData = getOperationData(I);
+  const OperationData EdgeOpData = getOperationData(I);
   // Continue analysis if the next operand is a reduction operation or
   // (possibly) a reduced value. If the reduced value opcode is not set,
   // the first met operation != reduction operation is considered as the
   // reduced value class.
-  const bool IsRdxInst = OpData == RdxTreeInst;
+  const bool IsRdxInst = EdgeOpData == RdxTreeInst;
   if (I && I != Phi &&
-  (!RdxLeafVal || OpData == RdxLeafVal || IsRdxInst)) {
+  (!RdxLeafVal || EdgeOpData == RdxLeafVal || IsRdxInst)) {
 // Only handle trees in the current basic block.
 // Each tree node needs to have minimal number of users except for the
 // ultimate reduction.
@@ -6873,21 +6873,21 @@ class HorizontalReduction {
 RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) && I != B) {
   if (IsRdxInst) {
 // We need to be able to reassociate the reduction operations.
-if (!OpData.isAssociative(I)) {
+if (!EdgeOpData.isAssociative(I)) {
   // I is an extra argument for TreeN (its parent operation).
   markExtraArg(Stack.back(), I);
   continue;
 }
-  } else if (RdxLeafVal && RdxLeafVal != OpData) {
+  } else if (RdxLeafVal && RdxLeafVal != EdgeOpData) {
 // Make sure that the opcodes of the operations that we are going 
to
 // reduce match.
 // I is an extra argument for TreeN (its parent operation).
 markExtraArg(Stack.back(), I);
 continue;
   } else if (!RdxLeafVal) {
-RdxLeafVal = OpData;
+RdxLeafVal = EdgeOpData;
   }
-  Stack.push_back(std::make_pair(I, OpData.getFirstOperandIndex()));
+  Stack.push_back(std::make_pair(I, 
EdgeOpData.getFirstOperandIndex()));
   continue;
 }
   }



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[llvm-branch-commits] [llvm] 9e7895a - [SLP] reduce code duplication while processing reductions; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-12T16:03:57-05:00
New Revision: 9e7895a8682ce3ad98c006955d573d5f2fded4f6

URL: 
https://github.com/llvm/llvm-project/commit/9e7895a8682ce3ad98c006955d573d5f2fded4f6
DIFF: 
https://github.com/llvm/llvm-project/commit/9e7895a8682ce3ad98c006955d573d5f2fded4f6.diff

LOG: [SLP] reduce code duplication while processing reductions; NFC

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 1ef762c9dfa7..403170447f5a 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6863,33 +6863,32 @@ class HorizontalReduction {
   // (possibly) a reduced value. If the reduced value opcode is not set,
   // the first met operation != reduction operation is considered as the
   // reduced value class.
+  // Only handle trees in the current basic block.
+  // Each tree node needs to have minimal number of users except for the
+  // ultimate reduction.
   const bool IsRdxInst = EdgeOpData == RdxTreeInst;
-  if (I && I != Phi &&
+  if (I && I != Phi && I != B &&
+  RdxTreeInst.hasSameParent(I, B->getParent(), IsRdxInst) &&
+  RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) &&
   (!RdxLeafVal || EdgeOpData == RdxLeafVal || IsRdxInst)) {
-// Only handle trees in the current basic block.
-// Each tree node needs to have minimal number of users except for the
-// ultimate reduction.
-if (RdxTreeInst.hasSameParent(I, B->getParent(), IsRdxInst) &&
-RdxTreeInst.hasRequiredNumberOfUses(I, IsRdxInst) && I != B) {
-  if (IsRdxInst) {
-// We need to be able to reassociate the reduction operations.
-if (!EdgeOpData.isAssociative(I)) {
-  // I is an extra argument for TreeN (its parent operation).
-  markExtraArg(Stack.back(), I);
-  continue;
-}
-  } else if (RdxLeafVal && RdxLeafVal != EdgeOpData) {
-// Make sure that the opcodes of the operations that we are going 
to
-// reduce match.
+if (IsRdxInst) {
+  // We need to be able to reassociate the reduction operations.
+  if (!EdgeOpData.isAssociative(I)) {
 // I is an extra argument for TreeN (its parent operation).
 markExtraArg(Stack.back(), I);
 continue;
-  } else if (!RdxLeafVal) {
-RdxLeafVal = EdgeOpData;
   }
-  Stack.push_back(std::make_pair(I, 
EdgeOpData.getFirstOperandIndex()));
+} else if (RdxLeafVal && RdxLeafVal != EdgeOpData) {
+  // Make sure that the opcodes of the operations that we are going to
+  // reduce match.
+  // I is an extra argument for TreeN (its parent operation).
+  markExtraArg(Stack.back(), I);
   continue;
+} else if (!RdxLeafVal) {
+  RdxLeafVal = EdgeOpData;
 }
+Stack.push_back(std::make_pair(I, EdgeOpData.getFirstOperandIndex()));
+continue;
   }
   // NextV is an extra argument for TreeN (its parent operation).
   markExtraArg(Stack.back(), NextV);



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[llvm-branch-commits] [llvm] 7583ae4 - [RISCV] Add double test cases to vfmerge-rv32.ll. NFC

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-12T13:09:48-08:00
New Revision: 7583ae48a3c37a78e57106e4feff6045aaa45584

URL: 
https://github.com/llvm/llvm-project/commit/7583ae48a3c37a78e57106e4feff6045aaa45584
DIFF: 
https://github.com/llvm/llvm-project/commit/7583ae48a3c37a78e57106e4feff6045aaa45584.diff

LOG: [RISCV] Add double test cases to vfmerge-rv32.ll. NFC

Added: 


Modified: 
llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll

Removed: 




diff  --git a/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll 
b/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
index 5a7262c348c5..21a2b73f74ba 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+f,+experimental-zfh 
-verify-machineinstrs \
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+d,+experimental-zfh 
-verify-machineinstrs \
 ; RUN:   --riscv-no-aliases < %s | FileCheck %s
 declare  @llvm.riscv.vfmerge.nxv1f16.nxv1f16(
   ,
@@ -440,6 +440,166 @@ entry:
   ret  %a
 }
 
+declare  @llvm.riscv.vfmerge.nxv1f64.nxv1f64(
+  ,
+  ,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vvm_nxv1f64_nxv1f64_nxv1f64( %0, 
 %1,  %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vvm_nxv1f64_nxv1f64_nxv1f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m1
+; CHECK:   vmerge.vvm {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv1f64.nxv1f64(
+ %0,
+ %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv1f64.f64(
+  ,
+  double,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vfm_nxv1f64_nxv1f64_f64( %0, double %1, 
 %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv1f64_nxv1f64_f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m1
+; CHECK:   vfmerge.vfm {{v[0-9]+}}, {{v[0-9]+}}, {{ft[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv1f64.f64(
+ %0,
+double %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv2f64.nxv2f64(
+  ,
+  ,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vvm_nxv2f64_nxv2f64_nxv2f64( %0, 
 %1,  %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vvm_nxv2f64_nxv2f64_nxv2f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m2
+; CHECK:   vmerge.vvm {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv2f64.nxv2f64(
+ %0,
+ %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv2f64.f64(
+  ,
+  double,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vfm_nxv2f64_nxv2f64_f64( %0, double %1, 
 %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv2f64_nxv2f64_f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m2
+; CHECK:   vfmerge.vfm {{v[0-9]+}}, {{v[0-9]+}}, {{ft[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv2f64.f64(
+ %0,
+double %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv4f64.nxv4f64(
+  ,
+  ,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vvm_nxv4f64_nxv4f64_nxv4f64( %0, 
 %1,  %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vvm_nxv4f64_nxv4f64_nxv4f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m4
+; CHECK:   vmerge.vvm {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv4f64.nxv4f64(
+ %0,
+ %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv4f64.f64(
+  ,
+  double,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vfm_nxv4f64_nxv4f64_f64( %0, double %1, 
 %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv4f64_nxv4f64_f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m4
+; CHECK:   vfmerge.vfm {{v[0-9]+}}, {{v[0-9]+}}, {{ft[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv4f64.f64(
+ %0,
+double %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv8f64.nxv8f64(
+  ,
+  ,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vvm_nxv8f64_nxv8f64_nxv8f64( %0, 
 %1,  %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vvm_nxv8f64_nxv8f64_nxv8f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m8
+; CHECK:   vmerge.vvm {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv8f64.nxv8f64(
+ %0,
+ %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
+declare  @llvm.riscv.vfmerge.nxv8f64.f64(
+  ,
+  double,
+  ,
+  i32);
+
+define  
@intrinsic_vfmerge_vfm_nxv8f64_nxv8f64_f64( %0, double %1, 
 %2, i32 %3) nounwind {
+entry:
+; CHECK-LABEL: intrinsic_vfmerge_vfm_nxv8f64_nxv8f64_f64
+; CHECK:   vsetvli {{.*}}, {{a[0-9]+}}, e64,m8
+; CHECK:   vfmerge.vfm {{v[0-9]+}}, {{v[0-9]+}}, {{ft[0-9]+}}, v0
+  %a = call  @llvm.riscv.vfmerge.nxv8f64.f64(
+ %0,
+double %1,
+ %2,
+i32 %3)
+
+  ret  %a
+}
+
 define  @intrinsic_vfmerge_vzm_nxv1f16_nxv1f16_f16( %0,  %1, i32 %2) nounwind {
 entry:
 ; CHECK-LABEL: 

[llvm-branch-commits] [llvm] e15f3dd - [InstCombine] Add tests for logical and/or poison implication (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-12T22:18:51+01:00
New Revision: e15f3ddcae65525176d1f152effb88cd3c6441a3

URL: 
https://github.com/llvm/llvm-project/commit/e15f3ddcae65525176d1f152effb88cd3c6441a3
DIFF: 
https://github.com/llvm/llvm-project/commit/e15f3ddcae65525176d1f152effb88cd3c6441a3.diff

LOG: [InstCombine] Add tests for logical and/or poison implication (NFC)

These tests cover some cases where we can fold select to and/or
based on poison implication logic.

Added: 


Modified: 
llvm/test/Transforms/InstCombine/select-and-or.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/select-and-or.ll 
b/llvm/test/Transforms/InstCombine/select-and-or.ll
index 5fab7cdb94a6..59fa170b73d4 100644
--- a/llvm/test/Transforms/InstCombine/select-and-or.ll
+++ b/llvm/test/Transforms/InstCombine/select-and-or.ll
@@ -85,3 +85,99 @@ define i1 @logical_or_not_cond_reuse(i1 %a, i1 %b) {
   %res = select i1 %a, i1 %a.not, i1 %b
   ret i1 %res
 }
+
+; Safe to convert to or due to poison implication.
+define i1 @logical_or_implies(i32 %x) {
+; CHECK-LABEL: @logical_or_implies(
+; CHECK-NEXT:[[C1:%.*]] = icmp eq i32 [[X:%.*]], 0
+; CHECK-NEXT:[[C2:%.*]] = icmp eq i32 [[X]], 42
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %c1 = icmp eq i32 %x, 0
+  %c2 = icmp eq i32 %x, 42
+  %res = select i1 %c1, i1 true, i1 %c2
+  ret i1 %res
+}
+
+; Will fold after conversion to or.
+define i1 @logical_or_implies_folds(i32 %x) {
+; CHECK-LABEL: @logical_or_implies_folds(
+; CHECK-NEXT:[[C1:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:[[C2:%.*]] = icmp sgt i32 [[X]], -1
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %c1 = icmp slt i32 %x, 0
+  %c2 = icmp sge i32 %x, 0
+  %res = select i1 %c1, i1 true, i1 %c2
+  ret i1 %res
+}
+
+; Safe to convert to and due to poison implication.
+define i1 @logical_and_implies(i32 %x) {
+; CHECK-LABEL: @logical_and_implies(
+; CHECK-NEXT:[[C1:%.*]] = icmp ne i32 [[X:%.*]], 0
+; CHECK-NEXT:[[C2:%.*]] = icmp ne i32 [[X]], 42
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %c1 = icmp ne i32 %x, 0
+  %c2 = icmp ne i32 %x, 42
+  %res = select i1 %c1, i1 %c2, i1 false
+  ret i1 %res
+}
+
+; Will fold after conversion to and.
+define i1 @logical_and_implies_folds(i32 %x) {
+; CHECK-LABEL: @logical_and_implies_folds(
+; CHECK-NEXT:[[C1:%.*]] = icmp ugt i32 [[X:%.*]], 42
+; CHECK-NEXT:[[C2:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %c1 = icmp ugt i32 %x, 42
+  %c2 = icmp ne i32 %x, 0
+  %res = select i1 %c1, i1 %c2, i1 false
+  ret i1 %res
+}
+
+; Noundef on condition has no effect.
+define i1 @logical_or_noundef_a(i1 noundef %a, i1 %b) {
+; CHECK-LABEL: @logical_or_noundef_a(
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %res = select i1 %a, i1 true, i1 %b
+  ret i1 %res
+}
+
+; Noundef on false value allows conversion to or.
+define i1 @logical_or_noundef_b(i1 %a, i1 noundef %b) {
+; CHECK-LABEL: @logical_or_noundef_b(
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %res = select i1 %a, i1 true, i1 %b
+  ret i1 %res
+}
+
+; Noundef on condition has no effect.
+define i1 @logical_and_noundef_a(i1 noundef %a, i1 %b) {
+; CHECK-LABEL: @logical_and_noundef_a(
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %res = select i1 %a, i1 %b, i1 false
+  ret i1 %res
+}
+
+; Noundef on false value allows conversion to and.
+define i1 @logical_and_noundef_b(i1 %a, i1 noundef %b) {
+; CHECK-LABEL: @logical_and_noundef_b(
+; CHECK-NEXT:[[RES:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT:ret i1 [[RES]]
+;
+  %res = select i1 %a, i1 %b, i1 false
+  ret i1 %res
+}



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[llvm-branch-commits] [llvm] 71ed4b6 - [RISCV] Legalize select when Zbt extension available

[Sam Elliott via llvm-branch-commits]

Author: Michael Munday
Date: 2021-01-12T21:24:38Z
New Revision: 71ed4b6ce57d8843ef705af8f98305976a8f107a

URL: 
https://github.com/llvm/llvm-project/commit/71ed4b6ce57d8843ef705af8f98305976a8f107a
DIFF: 
https://github.com/llvm/llvm-project/commit/71ed4b6ce57d8843ef705af8f98305976a8f107a.diff

LOG: [RISCV] Legalize select when Zbt extension available

The custom expansion of select operations in the RISC-V backend
interferes with the matching of cmov instructions. Legalizing
select when the Zbt extension is available solves that problem.

Reviewed By: lenary, craig.topper

Differential Revision: https://reviews.llvm.org/D93767

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbb.ll
llvm/test/CodeGen/RISCV/rv32Zbbp.ll
llvm/test/CodeGen/RISCV/rv32Zbs.ll
llvm/test/CodeGen/RISCV/rv32Zbt.ll
llvm/test/CodeGen/RISCV/rv64Zbt.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 03db9911c867..73bc83b558ad 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -162,7 +162,6 @@ RISCVTargetLowering::RISCVTargetLowering(const 
TargetMachine &TM,
 
   setOperationAction(ISD::BR_JT, MVT::Other, Expand);
   setOperationAction(ISD::BR_CC, XLenVT, Expand);
-  setOperationAction(ISD::SELECT, XLenVT, Custom);
   setOperationAction(ISD::SELECT_CC, XLenVT, Expand);
 
   setOperationAction(ISD::STACKSAVE, MVT::Other, Expand);
@@ -249,11 +248,14 @@ RISCVTargetLowering::RISCVTargetLowering(const 
TargetMachine &TM,
   if (Subtarget.hasStdExtZbt()) {
 setOperationAction(ISD::FSHL, XLenVT, Legal);
 setOperationAction(ISD::FSHR, XLenVT, Legal);
+setOperationAction(ISD::SELECT, XLenVT, Legal);
 
 if (Subtarget.is64Bit()) {
   setOperationAction(ISD::FSHL, MVT::i32, Custom);
   setOperationAction(ISD::FSHR, MVT::i32, Custom);
 }
+  } else {
+setOperationAction(ISD::SELECT, XLenVT, Custom);
   }
 
   ISD::CondCode FPCCToExpand[] = {

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index ce6cb6ba82ce..47740308518f 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -797,7 +797,23 @@ def : Pat<(rotl (riscv_grevi GPR:$rs1, (i32 24)), (i32 
16)), (GREVI GPR:$rs1, 8)
 let Predicates = [HasStdExtZbt] in {
 def : Pat<(or (and (not GPR:$rs2), GPR:$rs3), (and GPR:$rs2, GPR:$rs1)),
   (CMIX GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
-def : Pat<(riscv_selectcc GPR:$rs2, (XLenVT 0), (XLenVT 17), GPR:$rs3, 
GPR:$rs1),
+def : Pat<(select (XLenVT (setne GPR:$rs2, 0)), GPR:$rs1, GPR:$rs3),
+  (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+def : Pat<(select (XLenVT (seteq GPR:$rs2, 0)), GPR:$rs3, GPR:$rs1),
+  (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
+def : Pat<(select (XLenVT (seteq GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
+  (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
+def : Pat<(select (XLenVT (setne GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
+  (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
+def : Pat<(select (XLenVT (setuge GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
+  (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
+def : Pat<(select (XLenVT (setule GPR:$y, GPR:$x)), GPR:$rs1, GPR:$rs3),
+  (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
+def : Pat<(select (XLenVT (setge GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
+  (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
+def : Pat<(select (XLenVT (setle GPR:$y, GPR:$x)), GPR:$rs1, GPR:$rs3),
+  (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
+def : Pat<(select GPR:$rs2, GPR:$rs3, GPR:$rs1),
   (CMOV GPR:$rs1, GPR:$rs2, GPR:$rs3)>;
 } // Predicates = [HasStdExtZbt]
 

diff  --git a/llvm/test/CodeGen/RISCV/rv32Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv32Zbb.ll
index b95fcd5f5232..90ea5629aae6 100644
--- a/llvm/test/CodeGen/RISCV/rv32Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv32Zbb.ll
@@ -60,14 +60,7 @@ define i64 @slo_i64(i64 %a, i64 %b) nounwind {
 ;
 ; RV32IB-LABEL: slo_i64:
 ; RV32IB:   # %bb.0:
-; RV32IB-NEXT:addi a3, a2, -32
 ; RV32IB-NEXT:not a0, a0
-; RV32IB-NEXT:bltz a3, .LBB1_2
-; RV32IB-NEXT:  # %bb.1:
-; RV32IB-NEXT:mv a2, zero
-; RV32IB-NEXT:sll a1, a0, a3
-; RV32IB-NEXT:j .LBB1_3
-; RV32IB-NEXT:  .LBB1_2:
 ; RV32IB-NEXT:not a1, a1
 ; RV32IB-NEXT:sll a1, a1, a2
 ; RV32IB-NEXT:addi a3, zero, 31
@@ -75,10 +68,15 @@ define i64 @slo_i64(i64 %a, i64 %b) nounwind {
 ; RV32IB-NEXT:srli a4, a0, 1
 ; RV32IB-NEXT:srl a3, a4, a3
 ; RV32IB-NEXT:or a1, a1, a3
-; RV32IB-NEXT:sll a2, a0, a2
-; RV32IB-NEXT:  .LBB1_3:
+; RV32IB-NEXT:addi a3, a2, -32
+; RV32IB-NEXT:sll a4, a0, a3
+; RV32IB-NEXT:slti a5, a3, 0
+; RV32IB-NEXT:cmov a

[llvm-branch-commits] [llvm] 23390e7 - [InstCombine] Handle logical and/or in assume optimization

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-12T22:36:40+01:00
New Revision: 23390e7a131a67fd70e26692fc83f62860dd1095

URL: 
https://github.com/llvm/llvm-project/commit/23390e7a131a67fd70e26692fc83f62860dd1095
DIFF: 
https://github.com/llvm/llvm-project/commit/23390e7a131a67fd70e26692fc83f62860dd1095.diff

LOG: [InstCombine] Handle logical and/or in assume optimization

assume(a && b) can be converted to assume(a); assume(b) even if
the condition is logical. Same for assume(!(a || b)).

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/assume.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 8f2e694f3c5b..7d63b30d35f8 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -1478,14 +1478,14 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst 
&CI) {
 FunctionType *AssumeIntrinsicTy = II->getFunctionType();
 Value *AssumeIntrinsic = II->getCalledOperand();
 Value *A, *B;
-if (match(IIOperand, m_And(m_Value(A), m_Value(B {
+if (match(IIOperand, m_LogicalAnd(m_Value(A), m_Value(B {
   Builder.CreateCall(AssumeIntrinsicTy, AssumeIntrinsic, A, OpBundles,
  II->getName());
   Builder.CreateCall(AssumeIntrinsicTy, AssumeIntrinsic, B, II->getName());
   return eraseInstFromFunction(*II);
 }
 // assume(!(a || b)) -> assume(!a); assume(!b);
-if (match(IIOperand, m_Not(m_Or(m_Value(A), m_Value(B) {
+if (match(IIOperand, m_Not(m_LogicalOr(m_Value(A), m_Value(B) {
   Builder.CreateCall(AssumeIntrinsicTy, AssumeIntrinsic,
  Builder.CreateNot(A), OpBundles, II->getName());
   Builder.CreateCall(AssumeIntrinsicTy, AssumeIntrinsic,

diff  --git a/llvm/test/Transforms/InstCombine/assume.ll 
b/llvm/test/Transforms/InstCombine/assume.ll
index f46ffbec2ce6..b107af16bdc1 100644
--- a/llvm/test/Transforms/InstCombine/assume.ll
+++ b/llvm/test/Transforms/InstCombine/assume.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -instcombine -S -instcombine-infinite-loop-threshold=2 | 
FileCheck %s
+; RUN: opt < %s -instcombine -S -instcombine-infinite-loop-threshold=2 
-instcombine-unsafe-select-transform=0 | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
@@ -627,7 +627,7 @@ define i32 @unreachable_assume_logical(i32 %x, i32 %y) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:[[CMP0:%.*]] = icmp sgt i32 [[X:%.*]], 1
 ; CHECK-NEXT:[[CMP1:%.*]] = icmp eq i32 [[Y:%.*]], 1
-; CHECK-NEXT:[[OR:%.*]] = or i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT:[[OR:%.*]] = select i1 [[CMP0]], i1 true, i1 [[CMP1]]
 ; CHECK-NEXT:tail call void @llvm.assume(i1 [[OR]])
 ; CHECK-NEXT:[[CMP2:%.*]] = icmp eq i32 [[X]], 1
 ; CHECK-NEXT:br i1 [[CMP2]], label [[IF:%.*]], label [[EXIT:%.*]]
@@ -704,7 +704,7 @@ define i32 @unreachable_assumes_and_store_logical(i32 %x, 
i32 %y, i32* %p) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:[[CMP0:%.*]] = icmp sgt i32 [[X:%.*]], 1
 ; CHECK-NEXT:[[CMP1:%.*]] = icmp eq i32 [[Y:%.*]], 1
-; CHECK-NEXT:[[OR:%.*]] = or i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT:[[OR:%.*]] = select i1 [[CMP0]], i1 true, i1 [[CMP1]]
 ; CHECK-NEXT:tail call void @llvm.assume(i1 [[OR]])
 ; CHECK-NEXT:[[CMP2:%.*]] = icmp eq i32 [[X]], 1
 ; CHECK-NEXT:br i1 [[CMP2]], label [[IF:%.*]], label [[EXIT:%.*]]



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[llvm-branch-commits] [mlir] 7fd1850 - [mlir] Update LLVM dialect type documentation

[Alex Zinenko via llvm-branch-commits]

Author: Alex Zinenko
Date: 2021-01-12T22:38:24+01:00
New Revision: 7fd18508134112edb93852c16923a74bfff99cd2

URL: 
https://github.com/llvm/llvm-project/commit/7fd18508134112edb93852c16923a74bfff99cd2
DIFF: 
https://github.com/llvm/llvm-project/commit/7fd18508134112edb93852c16923a74bfff99cd2.diff

LOG: [mlir] Update LLVM dialect type documentation

Recent commits reconfigured LLVM dialect types to use built-in types whenever
possible. Update the documentation accordingly.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D94485

Added: 


Modified: 
mlir/docs/Dialects/LLVM.md

Removed: 




diff  --git a/mlir/docs/Dialects/LLVM.md b/mlir/docs/Dialects/LLVM.md
index d232ffab148c..1b85091b0756 100644
--- a/mlir/docs/Dialects/LLVM.md
+++ b/mlir/docs/Dialects/LLVM.md
@@ -130,9 +130,9 @@ Examples:
 %3 = llvm.mlir.constant(dense<1.0> : vector<4xf32>) : vector<4xf32>
 ```
 
-Note that constants use built-in types within the initializer definition: MLIR
-attributes are typed and the attributes used for constants require a built-in
-type.
+Note that constants list the type twice. This is an artifact of the LLVM 
dialect
+not using built-in types, which are used for typed MLIR attributes. The syntax
+will be reevaluated after considering composite constants.
 
 ### Globals
 
@@ -186,33 +186,47 @@ attribute.
 
 ## Types
 
-LLVM dialect defines a set of types that correspond to LLVM IR types. The
-dialect type system is _closed_: types from other dialects are not allowed
-within LLVM dialect aggregate types. This property allows for more concise
-custom syntax and ensures easy translation to LLVM IR.
-
-Similarly to other MLIR context-owned objects, the creation and manipulation of
-LLVM dialect types is thread-safe.
+LLVM dialect uses built-in types whenever possible and defines a set of
+complementary types, which correspond to the LLVM IR types that cannot be
+directly represented with built-in types. Similarly to other MLIR context-owned
+objects, the creation and manipulation of LLVM dialect types is thread-safe.
 
 MLIR does not support module-scoped named type declarations, e.g. `%s = type
 {i32, i32}` in LLVM IR. Instead, types must be fully specified at each use,
 except for recursive types where only the first reference to a named type needs
-to be fully specified. MLIR type aliases are supported for top-level types, 
i.e.
-they cannot be used inside the type due to type system closedness.
+to be fully specified. MLIR [type aliases](LangRef.md#type-aliases) can be used
+to achieve more compact syntax.
 
 The general syntax of LLVM dialect types is `!llvm.`, followed by a type kind
 identifier (e.g., `ptr` for pointer or `struct` for structure) and by an
 optional list of type parameters in angle brackets. The dialect follows MLIR
 style for types with nested angle brackets and keyword specifiers rather than
-using 
diff erent bracket styles to 
diff erentiate types. Inside angle brackets,
-the `!llvm` prefix is omitted for brevity; thanks to closedness of the type
-system, all types are assumed to be defined in the LLVM dialect. For example,
-`!llvm.ptr>` is a pointer to a packed structure type
-containing an 8-bit and a 32-bit integer.
+using 
diff erent bracket styles to 
diff erentiate types. Types inside the angle
+brackets may omit the `!llvm.` prefix for brevity: the parser first attempts to
+find a type (starting with `!` or a built-in type) and falls back to accepting 
a
+keyword. For example, `!llvm.ptr>` and `!llvm.ptr>` are
+equivalent, with the latter being the canonical form, and denote a pointer to a
+pointer to a 32-bit integer.
+
+### Built-in Type Compatibility
+
+LLVM dialect accepts a subset of built-in types that are referred to as _LLVM
+dialect-compatible types_. The following types are compatible:
 
-### Simple Types
+-   Signless integers - `iN` (`IntegerType`).
+-   Floating point types - `bfloat`, `half`, `float`, `double` (`FloatType`).
+-   1D vectors of signless integers or floating point types - `vector`
+(`VectorType`).
 
-The following non-parametric types are supported.
+Note that only a subset of types that can be represented by a given class is
+compatible. For example, signed and unsigned integers are not compatible. LLVM
+provides a function, `bool LLVM::isCompatibleType(Type)`, that can be used as a
+compatibility check.
+
+### Additional Simple Types
+
+The following non-parametric types derived from the LLVM IR are available in 
the
+LLVM dialect:
 
 -   `!llvm.fp128` (`LLVMFP128Type`) - 128-bit floating-point value as per
 IEEE-754-2008.
@@ -231,19 +245,10 @@ The following non-parametric types are supported.
 These types represent a single value (or an absence thereof in case of `void`)
 and correspond to their LLVM IR counterparts.
 
-### Parametric Types
-
- Integer Types
+### Additional Parametric Types
 
-Integer types are parametric in 

[llvm-branch-commits] [llvm] 2a49b7c - [Inliner] Change inline remark format and update ReplayInlineAdvisor to use it

[via llvm-branch-commits]

Author: modimo
Date: 2021-01-12T13:43:48-08:00
New Revision: 2a49b7c64a33566cf5db1a5b4042d6037ccc7cf5

URL: 
https://github.com/llvm/llvm-project/commit/2a49b7c64a33566cf5db1a5b4042d6037ccc7cf5
DIFF: 
https://github.com/llvm/llvm-project/commit/2a49b7c64a33566cf5db1a5b4042d6037ccc7cf5.diff

LOG: [Inliner] Change inline remark format and update ReplayInlineAdvisor to 
use it

This change modifies the source location formatting from:
LineNumber.Discriminator
to:
LineNumber:ColumnNumber.Discriminator

The motivation here is to enhance location information for inline replay that 
currently exists for the SampleProfile inliner. This will be leveraged further 
in inline replay for the CGSCC inliner in the related diff.

The ReplayInlineAdvisor is also modified to read the new format and now takes 
into account the callee for greater accuracy.

Testing:
ninja check-llvm

Reviewed By: mtrofin

Differential Revision: https://reviews.llvm.org/D94333

Added: 


Modified: 
clang/test/Frontend/optimization-remark-with-hotness-new-pm.c
clang/test/Frontend/optimization-remark-with-hotness.c
llvm/include/llvm/Analysis/InlineAdvisor.h
llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
llvm/lib/Analysis/InlineAdvisor.cpp
llvm/lib/Analysis/ReplayInlineAdvisor.cpp
llvm/lib/Transforms/IPO/SampleProfile.cpp
llvm/test/Transforms/Inline/optimization-remarks-passed-yaml.ll
llvm/test/Transforms/SampleProfile/Inputs/inline-replay.txt
llvm/test/Transforms/SampleProfile/inline-replay.ll
llvm/test/Transforms/SampleProfile/remarks-hotness.ll
llvm/test/Transforms/SampleProfile/remarks.ll

Removed: 




diff  --git a/clang/test/Frontend/optimization-remark-with-hotness-new-pm.c 
b/clang/test/Frontend/optimization-remark-with-hotness-new-pm.c
index 76802bfdcdb8..5e4641d92313 100644
--- a/clang/test/Frontend/optimization-remark-with-hotness-new-pm.c
+++ b/clang/test/Frontend/optimization-remark-with-hotness-new-pm.c
@@ -73,7 +73,7 @@ void bar(int x) {
   // THRESHOLD-NOT: hotness
   // NO_PGO: '-fdiagnostics-show-hotness' requires profile-guided optimization 
information
   // NO_PGO: '-fdiagnostics-hotness-threshold=' requires profile-guided 
optimization information
-  // expected-remark@+1 {{foo inlined into bar with (cost=always): always 
inline attribute at callsite bar:8 (hotness:}}
+  // expected-remark@+1 {{foo inlined into bar with (cost=always): always 
inline attribute at callsite bar:8:10; (hotness:}}
   sum += foo(x, x - 2);
 }
 

diff  --git a/clang/test/Frontend/optimization-remark-with-hotness.c 
b/clang/test/Frontend/optimization-remark-with-hotness.c
index 96be3524db16..0961e6da11f4 100644
--- a/clang/test/Frontend/optimization-remark-with-hotness.c
+++ b/clang/test/Frontend/optimization-remark-with-hotness.c
@@ -66,7 +66,7 @@ void bar(int x) {
   // THRESHOLD-NOT: hotness
   // NO_PGO: '-fdiagnostics-show-hotness' requires profile-guided optimization 
information
   // NO_PGO: '-fdiagnostics-hotness-threshold=' requires profile-guided 
optimization information
-  // expected-remark@+1 {{foo inlined into bar with (cost=always): always 
inliner at callsite bar:8 (hotness:}}
+  // expected-remark@+1 {{foo inlined into bar with (cost=always): always 
inliner at callsite bar:8:10; (hotness:}}
   sum += foo(x, x - 2);
 }
 

diff  --git a/llvm/include/llvm/Analysis/InlineAdvisor.h 
b/llvm/include/llvm/Analysis/InlineAdvisor.h
index f051706dca16..2967aa911699 100644
--- a/llvm/include/llvm/Analysis/InlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/InlineAdvisor.h
@@ -121,6 +121,25 @@ class InlineAdvice {
   bool Recorded = false;
 };
 
+class DefaultInlineAdvice : public InlineAdvice {
+public:
+  DefaultInlineAdvice(InlineAdvisor *Advisor, CallBase &CB,
+  Optional OIC, OptimizationRemarkEmitter &ORE,
+  bool EmitRemarks = true)
+  : InlineAdvice(Advisor, CB, ORE, OIC.hasValue()), OriginalCB(&CB),
+OIC(OIC), EmitRemarks(EmitRemarks) {}
+
+private:
+  void recordUnsuccessfulInliningImpl(const InlineResult &Result) override;
+  void recordInliningWithCalleeDeletedImpl() override;
+  void recordInliningImpl() override;
+
+private:
+  CallBase *const OriginalCB;
+  Optional OIC;
+  bool EmitRemarks;
+};
+
 /// Interface for deciding whether to inline a call site or not.
 class InlineAdvisor {
 public:

diff  --git a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h 
b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
index 19e9079a20f5..daed84603541 100644
--- a/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
+++ b/llvm/include/llvm/Analysis/ReplayInlineAdvisor.h
@@ -25,13 +25,14 @@ class OptimizationRemarkEmitter;
 class ReplayInlineAdvisor : public InlineAdvisor {
 public:
   ReplayInlineAdvisor(FunctionAnalysisManager &FAM, LLVMContext &Context,
-  StringRef RemarksFile);
+  StringRef RemarksFile, bool EmitRe

[llvm-branch-commits] [openmp] 68ff52f - [OpenMP] Fixed the link error that cannot find static data member

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-12T16:48:28-05:00
New Revision: 68ff52ffead2ba25cca442778ab19286000daad7

URL: 
https://github.com/llvm/llvm-project/commit/68ff52ffead2ba25cca442778ab19286000daad7
DIFF: 
https://github.com/llvm/llvm-project/commit/68ff52ffead2ba25cca442778ab19286000daad7.diff

LOG: [OpenMP] Fixed the link error that cannot find static data member

Constant static data member can be defined in the class without another
define after the class in C++17. Although it is C++17, Clang can still handle it
even w/o the flag for C++17. Unluckily, GCC cannot handle that.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D94541

Added: 


Modified: 
openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h

Removed: 




diff  --git a/openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h 
b/openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h
index 1f9cbeb00394..6e00728a658f 100644
--- a/openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h
+++ b/openmp/libomptarget/plugins/common/MemoryManager/MemoryManager.h
@@ -338,4 +338,9 @@ class MemoryManagerTy {
   }
 };
 
+// GCC still cannot handle the static data member like Clang so we still need
+// this part.
+constexpr const size_t MemoryManagerTy::BucketSize[];
+constexpr const int MemoryManagerTy::NumBuckets;
+
 #endif // LLVM_OPENMP_LIBOMPTARGET_PLUGINS_COMMON_MEMORYMANAGER_MEMORYMANAGER_H



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[llvm-branch-commits] [llvm] d1fa7af - [AArch64] [Windows] Properly add :lo12: reloc specifiers when generating assembly

[Martin Storsjö via llvm-branch-commits]

Author: Martin Storsjö
Date: 2021-01-12T23:56:03+02:00
New Revision: d1fa7afc7aefd822698fe86431d8184b1e8b6683

URL: 
https://github.com/llvm/llvm-project/commit/d1fa7afc7aefd822698fe86431d8184b1e8b6683
DIFF: 
https://github.com/llvm/llvm-project/commit/d1fa7afc7aefd822698fe86431d8184b1e8b6683.diff

LOG: [AArch64] [Windows] Properly add :lo12: reloc specifiers when generating 
assembly

This makes sure that assembly output actually can be assembled.

Set the correct MCExpr relocations specifier VK_PAGEOFF - and also
set VK_PAGE consistently even though it's not visible in the assembly
output.

Differential Revision: https://reviews.llvm.org/D94365

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
llvm/test/CodeGen/AArch64/cfguard-checks.ll
llvm/test/CodeGen/AArch64/dllimport.ll
llvm/test/CodeGen/AArch64/mingw-refptr.ll
llvm/test/CodeGen/AArch64/stack-protector-target.ll
llvm/test/CodeGen/AArch64/win-tls.ll
llvm/test/CodeGen/AArch64/win_cst_pool.ll
llvm/test/CodeGen/AArch64/windows-extern-weak.ll

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp 
b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
index afd5ae6bcbf2..10e191ff44cf 100644
--- a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
@@ -203,6 +203,12 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const 
MachineOperand &MO,
 RefFlags |= AArch64MCExpr::VK_SABS;
   } else {
 RefFlags |= AArch64MCExpr::VK_ABS;
+
+if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
+  RefFlags |= AArch64MCExpr::VK_PAGE;
+else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
+ AArch64II::MO_PAGEOFF)
+  RefFlags |= AArch64MCExpr::VK_PAGEOFF | AArch64MCExpr::VK_NC;
   }
 
   if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_G3)

diff  --git a/llvm/test/CodeGen/AArch64/cfguard-checks.ll 
b/llvm/test/CodeGen/AArch64/cfguard-checks.ll
index cb31decd57ba..66ec4b6ed074 100644
--- a/llvm/test/CodeGen/AArch64/cfguard-checks.ll
+++ b/llvm/test/CodeGen/AArch64/cfguard-checks.ll
@@ -18,7 +18,7 @@ entry:
 
   ; CHECK-LABEL: func_guard_nocf
   ; CHECK:   adrp x8, target_func
-   ; CHECK:   add x8, x8, target_func
+   ; CHECK:   add x8, x8, :lo12:target_func
   ; CHECK-NOT:   __guard_check_icall_fptr
; CHECK:   blr x8
 }
@@ -37,9 +37,9 @@ entry:
   ; The call to __guard_check_icall_fptr should come immediately before the 
call to the target function.
   ; CHECK-LABEL: func_optnone_cf
; CHECK:adrp x8, target_func
-   ; CHECK:add x8, x8, target_func
+   ; CHECK:add x8, x8, :lo12:target_func
; CHECK:adrp x9, __guard_check_icall_fptr
-   ; CHECK:add x9, x9, __guard_check_icall_fptr
+   ; CHECK:add x9, x9, :lo12:__guard_check_icall_fptr
; CHECK:ldr x9, [x9]
; CHECK:mov x15, x8
; CHECK:blr x9
@@ -60,9 +60,9 @@ entry:
   ; The call to __guard_check_icall_fptr should come immediately before the 
call to the target function.
   ; CHECK-LABEL: func_cf
   ; CHECK:adrp x8, __guard_check_icall_fptr
-   ; CHECK:ldr x9, [x8, __guard_check_icall_fptr]
+   ; CHECK:ldr x9, [x8, :lo12:__guard_check_icall_fptr]
; CHECK:adrp x8, target_func
-   ; CHECK:add x8, x8, target_func
+   ; CHECK:add x8, x8, :lo12:target_func
; CHECK:mov x15, x8
; CHECK:blr x9
; CHECK-NEXT:   blr x8
@@ -89,9 +89,9 @@ lpad: ; preds = 
%entry
   ; The call to __guard_check_icall_fptr should come immediately before the 
call to the target function.
   ; CHECK-LABEL: func_cf_invoke
   ; CHECK:adrp x8, __guard_check_icall_fptr
-   ; CHECK:ldr x9, [x8, __guard_check_icall_fptr]
+   ; CHECK:ldr x9, [x8, :lo12:__guard_check_icall_fptr]
; CHECK:adrp x8, target_func
-   ; CHECK:add x8, x8, target_func
+   ; CHECK:add x8, x8, :lo12:target_func
; CHECK:mov x15, x8
; CHECK:blr x9
   ; CHECK-NEXT:   .Ltmp0:

diff  --git a/llvm/test/CodeGen/AArch64/dllimport.ll 
b/llvm/test/CodeGen/AArch64/dllimport.ll
index d72e987aec2d..ed90c805c53b 100644
--- a/llvm/test/CodeGen/AArch64/dllimport.ll
+++ b/llvm/test/CodeGen/AArch64/dllimport.ll
@@ -14,7 +14,7 @@ define i32 @get_var() {
 
 ; CHECK-LABEL: get_var
 ; CHECK: adrp x8, __imp_var
-; CHECK: ldr x8, [x8, __imp_var]
+; CHECK: ldr x8, [x8, :lo12:__imp_var]
 ; CHECK: ldr w0, [x8]
 ; CHECK: ret
 
@@ -25,10 +25,10 @@ define i32 @get_ext() {
 
 ; CHECK-LABEL: get_ext
 ; CHECK: adrp x8, ext
-; DAG-ISEL: ldr w0, [x8, ext]
-; FAST-ISEL: add x8, x8, ext
+; DAG-ISEL: ldr w0, [x8, :lo12:ext]
+; FAST

[llvm-branch-commits] [libcxx] 02f1d28 - [libcxx] Avoid overflows in the windows __libcpp_steady_clock_now()

[Martin Storsjö via llvm-branch-commits]

Author: Martin Storsjö
Date: 2021-01-12T23:56:03+02:00
New Revision: 02f1d28ed6b8f33445dae3beed8b6cc8dada4312

URL: 
https://github.com/llvm/llvm-project/commit/02f1d28ed6b8f33445dae3beed8b6cc8dada4312
DIFF: 
https://github.com/llvm/llvm-project/commit/02f1d28ed6b8f33445dae3beed8b6cc8dada4312.diff

LOG: [libcxx] Avoid overflows in the windows __libcpp_steady_clock_now()

As freq.QuadValue can be in the range of 1000 to 1920,
the multiplication before division makes the calculation overflow
and wrap to negative values every 16-30 minutes.

Instead count the whole seconds separately before adding the
scaled fractional seconds.

Add a testcase for steady_clock to check that the values returned for
now() compare as bigger than the zero time origin; this
corresponds to a testcase in Qt [1] [2] (that failed spuriously
due to this).

[1] https://bugreports.qt.io/browse/QTBUG-89539
[2] 
https://code.qt.io/cgit/qt/qtbase.git/tree/tests/auto/corelib/kernel/qdeadlinetimer/tst_qdeadlinetimer.cpp?id=f8de5e54022b8b7471131b7ad55c83b69b2684c0#n569

Differential Revision: https://reviews.llvm.org/D93456

Added: 


Modified: 
libcxx/src/chrono.cpp
libcxx/test/std/utilities/time/time.clock/time.clock.steady/now.pass.cpp

Removed: 




diff  --git a/libcxx/src/chrono.cpp b/libcxx/src/chrono.cpp
index 1419cf2f74a8..5291d4fa8dc6 100644
--- a/libcxx/src/chrono.cpp
+++ b/libcxx/src/chrono.cpp
@@ -153,7 +153,10 @@ static steady_clock::time_point 
__libcpp_steady_clock_now() {
 
   LARGE_INTEGER counter;
   (void) QueryPerformanceCounter(&counter);
-  return steady_clock::time_point(steady_clock::duration(counter.QuadPart * 
nano::den / freq.QuadPart));
+  auto seconds = counter.QuadPart / freq.QuadPart;
+  auto fractions = counter.QuadPart % freq.QuadPart;
+  auto dur = seconds * nano::den + fractions * nano::den / freq.QuadPart;
+  return steady_clock::time_point(steady_clock::duration(dur));
 }
 
 #elif defined(CLOCK_MONOTONIC)

diff  --git 
a/libcxx/test/std/utilities/time/time.clock/time.clock.steady/now.pass.cpp 
b/libcxx/test/std/utilities/time/time.clock/time.clock.steady/now.pass.cpp
index 4b8104dd1a6f..14dc9a9832dc 100644
--- a/libcxx/test/std/utilities/time/time.clock/time.clock.steady/now.pass.cpp
+++ b/libcxx/test/std/utilities/time/time.clock/time.clock.steady/now.pass.cpp
@@ -25,6 +25,8 @@ int main(int, char**)
 C::time_point t1 = C::now();
 C::time_point t2 = C::now();
 assert(t2 >= t1);
+// make sure t2 didn't wrap around
+assert(t2 > std::chrono::time_point());
 
   return 0;
 }



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[llvm-branch-commits] [openmp] 01f1273 - [OpenMP] Fixed a typo in openmp/CMakeLists.txt

[Shilei Tian via llvm-branch-commits]

Author: Shilei Tian
Date: 2021-01-12T17:00:49-05:00
New Revision: 01f1273fe2f0c246f17162de24a8b6e11bad23a8

URL: 
https://github.com/llvm/llvm-project/commit/01f1273fe2f0c246f17162de24a8b6e11bad23a8
DIFF: 
https://github.com/llvm/llvm-project/commit/01f1273fe2f0c246f17162de24a8b6e11bad23a8.diff

LOG: [OpenMP] Fixed a typo in openmp/CMakeLists.txt

Added: 


Modified: 
openmp/CMakeLists.txt

Removed: 




diff  --git a/openmp/CMakeLists.txt b/openmp/CMakeLists.txt
index 12e8d542f9f6..67600bebdafb 100644
--- a/openmp/CMakeLists.txt
+++ b/openmp/CMakeLists.txt
@@ -73,7 +73,7 @@ if (NOT LIBOMPTARGET_LLVM_INCLUDE_DIRS)
   if (LLVM_MAIN_INCLUDE_DIR)
 list(APPEND LIBOMPTARGET_LLVM_INCLUDE_DIRS ${LLVM_MAIN_INCLUDE_DIR})
   elseif (EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/../llvm/include)
-list(APPENDset LIBOMPTARGET_LLVM_INCLUDE_DIRS 
${CMAKE_CURRENT_SOURCE_DIR}/../llvm/include)
+list(APPEND LIBOMPTARGET_LLVM_INCLUDE_DIRS 
${CMAKE_CURRENT_SOURCE_DIR}/../llvm/include)
   endif()
 endif()
 



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[llvm-branch-commits] [llvm] 3d39709 - AMDGPU: Remove wrapper only call limitation

[Matt Arsenault via llvm-branch-commits]

Author: Matt Arsenault
Date: 2021-01-12T17:12:49-05:00
New Revision: 3d397091591fca4aa16153bba22f031218bee47d

URL: 
https://github.com/llvm/llvm-project/commit/3d397091591fca4aa16153bba22f031218bee47d
DIFF: 
https://github.com/llvm/llvm-project/commit/3d397091591fca4aa16153bba22f031218bee47d.diff

LOG: AMDGPU: Remove wrapper only call limitation

This seems to only have overridden cold handling, which we probably
shouldn't do. As far as I can tell the wrapper library functions are
still inlined as appropriate.

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AMDGPUInline.cpp
llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInline.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUInline.cpp
index 3b96a6a85879..4e689b392802 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInline.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInline.cpp
@@ -145,26 +145,6 @@ unsigned AMDGPUInliner::getInlineThreshold(CallBase &CB) 
const {
   return (unsigned)Thres;
 }
 
-// Check if call is just a wrapper around another call.
-// In this case we only have call and ret instructions.
-static bool isWrapperOnlyCall(CallBase &CB) {
-  Function *Callee = CB.getCalledFunction();
-  if (!Callee || Callee->size() != 1)
-return false;
-  const BasicBlock &BB = Callee->getEntryBlock();
-  if (const Instruction *I = BB.getFirstNonPHI()) {
-if (!isa(I)) {
-  return false;
-}
-if (isa(*std::next(I->getIterator( {
-  LLVM_DEBUG(dbgs() << "Wrapper only call detected: "
-<< Callee->getName() << '\n');
-  return true;
-}
-  }
-  return false;
-}
-
 InlineCost AMDGPUInliner::getInlineCost(CallBase &CB) {
   Function *Callee = CB.getCalledFunction();
   Function *Caller = CB.getCaller();
@@ -186,9 +166,6 @@ InlineCost AMDGPUInliner::getInlineCost(CallBase &CB) {
 return llvm::InlineCost::getNever(IsViable.getFailureReason());
   }
 
-  if (isWrapperOnlyCall(CB))
-return llvm::InlineCost::getAlways("wrapper-only call");
-
   InlineParams LocalParams = Params;
   LocalParams.DefaultThreshold = (int)getInlineThreshold(CB);
   bool RemarksEnabled = false;

diff  --git a/llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll 
b/llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
index 243522e28dd7..dd06fc17e8ed 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
@@ -40,7 +40,7 @@ if.end:
   ret void
 }
 
-define coldcc float @sin_wrapper(float %x) {
+define float @sin_wrapper(float %x) {
 bb:
   %call = tail call float @_Z3sinf(float %x)
   ret float %call
@@ -83,7 +83,7 @@ entry:
   %and = and i32 %tid, %n
   %arrayidx11 = getelementptr inbounds [64 x float], [64 x float] 
addrspace(5)* %pvt_arr, i32 0, i32 %and
   %tmp12 = load float, float addrspace(5)* %arrayidx11, align 4
-  %c2 = call coldcc float @sin_wrapper(float %tmp12)
+  %c2 = call float @sin_wrapper(float %tmp12)
   store float %c2, float addrspace(5)* %arrayidx7, align 4
   %xor = xor i32 %tid, %n
   %arrayidx16 = getelementptr inbounds [64 x float], [64 x float] 
addrspace(5)* %pvt_arr, i32 0, i32 %xor



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[llvm-branch-commits] [clang] cf45731 - [Driver] Fix assertion failure when -fprofile-generate -fcs-profile-generate are used together

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-12T14:19:55-08:00
New Revision: cf45731f0eaead79e1ac501b397e330df41ec152

URL: 
https://github.com/llvm/llvm-project/commit/cf45731f0eaead79e1ac501b397e330df41ec152
DIFF: 
https://github.com/llvm/llvm-project/commit/cf45731f0eaead79e1ac501b397e330df41ec152.diff

LOG: [Driver] Fix assertion failure when -fprofile-generate 
-fcs-profile-generate are used together

If conflicting `-fprofile-generate -fcs-profile-generate` are used together,
there is currently an assertion failure. Fix the failure.

Also add some driver tests.

Reviewed By: xur

Differential Revision: https://reviews.llvm.org/D94463

Added: 
clang/test/Driver/fcs-profile-generate.c

Modified: 
clang/lib/Driver/ToolChains/Clang.cpp

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index 4a20936ddda1..c03b513150b3 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -766,9 +766,11 @@ static void addPGOAndCoverageFlags(const ToolChain &TC, 
Compilation &C,
 D.Diag(diag::err_drv_argument_not_allowed_with)
 << ProfileGenerateArg->getSpelling() << ProfileUseArg->getSpelling();
 
-  if (CSPGOGenerateArg && PGOGenerateArg)
+  if (CSPGOGenerateArg && PGOGenerateArg) {
 D.Diag(diag::err_drv_argument_not_allowed_with)
 << CSPGOGenerateArg->getSpelling() << PGOGenerateArg->getSpelling();
+PGOGenerateArg = nullptr;
+  }
 
   if (ProfileGenerateArg) {
 if (ProfileGenerateArg->getOption().matches(

diff  --git a/clang/test/Driver/fcs-profile-generate.c 
b/clang/test/Driver/fcs-profile-generate.c
new file mode 100644
index ..6be7f758c3e6
--- /dev/null
+++ b/clang/test/Driver/fcs-profile-generate.c
@@ -0,0 +1,15 @@
+// RUN: %clang -### -c -fprofile-use=a.profdata -fcs-profile-generate %s 2>&1 
| FileCheck %s
+// CHECK:  "-fprofile-instrument=csllvm"
+// CHECK-NOT:  "-fprofile-instrument-path=
+// CHECK-SAME: "-fprofile-instrument-use-path=a.profdata"
+
+// RUN: %clang -### -c -fprofile-use=a.profdata -fcs-profile-generate=dir %s 
2>&1 | FileCheck %s --check-prefix=CHECK1
+// CHECK1: "-fprofile-instrument=csllvm"{{.*}} 
"-fprofile-instrument-path=dir{{/|}}default_%m.profraw" 
"-fprofile-instrument-use-path=a.profdata"
+
+/// Degradation case. This usage does not make much sense.
+// RUN: %clang -### -c -fcs-profile-generate %s 2>&1 | FileCheck %s 
--check-prefix=NOUSE
+// NOUSE: "-fprofile-instrument=csllvm"
+// NOUSE-NOT: "-fprofile-instrument-path=
+
+// RUN: %clang -### -c -fprofile-generate -fcs-profile-generate %s 2>&1 | 
FileCheck %s --check-prefix=CONFLICT
+// CONFLICT: error: invalid argument '-fcs-profile-generate' not allowed with 
'-fprofile-generate'



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[llvm-branch-commits] [llvm] 55f2eee - [NFC] Disallow unused prefixes in MC/AMDGPU

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-12T14:31:22-08:00
New Revision: 55f2eeebc96e7522e49e19074cbfbe4e7f074b5b

URL: 
https://github.com/llvm/llvm-project/commit/55f2eeebc96e7522e49e19074cbfbe4e7f074b5b
DIFF: 
https://github.com/llvm/llvm-project/commit/55f2eeebc96e7522e49e19074cbfbe4e7f074b5b.diff

LOG: [NFC] Disallow unused prefixes in MC/AMDGPU

1 out of 2 patches.

Differential Revision: https://reviews.llvm.org/D94553

Added: 


Modified: 
llvm/test/MC/AMDGPU/add-sub-no-carry.s
llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
llvm/test/MC/AMDGPU/ds-gfx9.s
llvm/test/MC/AMDGPU/ds.s
llvm/test/MC/AMDGPU/flat-gfx10.s
llvm/test/MC/AMDGPU/flat-global.s
llvm/test/MC/AMDGPU/flat-scratch-instructions.s
llvm/test/MC/AMDGPU/gfx10_asm_dpp16.s
llvm/test/MC/AMDGPU/gfx10_asm_dpp8.s
llvm/test/MC/AMDGPU/gfx10_asm_ds.s
llvm/test/MC/AMDGPU/gfx10_asm_flat.s
llvm/test/MC/AMDGPU/gfx10_asm_mubuf.s
llvm/test/MC/AMDGPU/gfx10_asm_smem.s
llvm/test/MC/AMDGPU/gfx10_asm_sop.s
llvm/test/MC/AMDGPU/gfx10_asm_vop1.s
llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
llvm/test/MC/AMDGPU/gfx10_asm_vopc.s
llvm/test/MC/AMDGPU/gfx10_asm_vopc_e64.s
llvm/test/MC/AMDGPU/gfx10_asm_vopc_sdwa.s
llvm/test/MC/AMDGPU/gfx10_asm_vopcx.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-args-v3.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-args.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs-v3.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-attrs.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props-v3.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-code-props.s
llvm/test/MC/AMDGPU/hsa-metadata-kernel-debug-props.s
llvm/test/MC/AMDGPU/hsa-wave-size.s
llvm/test/MC/AMDGPU/regression/bug28165.s
llvm/test/MC/AMDGPU/regression/bug28168.s
llvm/test/MC/AMDGPU/regression/bug28413.s
llvm/test/MC/AMDGPU/regression/bug28538.s

Removed: 




diff  --git a/llvm/test/MC/AMDGPU/add-sub-no-carry.s 
b/llvm/test/MC/AMDGPU/add-sub-no-carry.s
index 2e3ac9d24376..1768b73b60af 100644
--- a/llvm/test/MC/AMDGPU/add-sub-no-carry.s
+++ b/llvm/test/MC/AMDGPU/add-sub-no-carry.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck 
-check-prefixes=GFX9 %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck 
--check-prefix=GFX9 %s
 
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck 
-check-prefixes=ERR-VI,ERR-SICIVI --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck 
-check-prefixes=ERR-SICI,ERR-SICIVI --implicit-check-not=error: %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck 
--check-prefix=ERR-VI --implicit-check-not=error: %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck 
--check-prefix=ERR-SICI --implicit-check-not=error: %s
 // FIXME: pre-gfx9 errors should be more useful
 
 

diff  --git a/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s 
b/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
index ab51b14e5454..a9b5cfdfad64 100644
--- a/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
+++ b/llvm/test/MC/AMDGPU/buf-fmt-d16-packed.s
@@ -1,7 +1,7 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck 
-check-prefix=GCN -check-prefix=PACKED %s
-// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck 
-check-prefix=GCN -check-prefix=PACKED %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck 
-check-prefix=PACKED %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck 
-check-prefix=PACKED %s
 
-// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji 2>&1 %s | FileCheck 
-check-prefix=UNPACKED-ERR -check-prefix=GCN-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji 2>&1 %s | FileCheck 
-check-prefix=UNPACKED-ERR --implicit-check-not=error: %s
 
 
 
//===--===//

diff  --git a/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s 
b/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
index 78ca007171a5..045da853746d 100644
--- a/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
+++ b/llvm/test/MC/AMDGPU/buf-fmt-d16-unpacked.s
@@ -1,6 +1,6 @@
-// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck 
-check-prefix=GCN -check-prefix=UNPACKED %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 2>&1 %s | FileCheck 
-check-prefix=PACKED-ERR -check-prefix=GCN-ERR --implicit-check-not=error: %s
-// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck 
-check-prefix=PACKED-ERR -check-prefix=GCN-ERR --implicit-check-not=error: %s
+// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck 
-check-prefix=UNPACKED %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 2>&1 %s | FileCheck 
-check-prefix=PACKED-ERR --implicit-check-not=error: %s
+// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx9

[llvm-branch-commits] [llvm] a7130d8 - [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl

[Nathan James via llvm-branch-commits]

Author: Nathan James
Date: 2021-01-12T22:43:48Z
New Revision: a7130d85e4b9e47b18a89eac3d47fd8c19d449c1

URL: 
https://github.com/llvm/llvm-project/commit/a7130d85e4b9e47b18a89eac3d47fd8c19d449c1
DIFF: 
https://github.com/llvm/llvm-project/commit/a7130d85e4b9e47b18a89eac3d47fd8c19d449c1.diff

LOG: [ADT][NFC] Use empty base optimisation in BumpPtrAllocatorImpl

Most uses of this class just use the default MallocAllocator.
As this contains no fields, we can use the empty base optimisation for 
BumpPtrAllocatorImpl and save 8 bytes of padding for most use cases.

This prevents using a class that is marked as `final` as the `AllocatorT` 
template argument.
In one must use an allocator that has been marked as `final`, the simplest way 
around this is a proxy class.
The class should have all the methods that `AllocaterBase` expects and should 
forward the calls to your own allocator instance.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94439

Added: 


Modified: 
llvm/include/llvm/Support/Allocator.h

Removed: 




diff  --git a/llvm/include/llvm/Support/Allocator.h 
b/llvm/include/llvm/Support/Allocator.h
index 40c967ccc485..245432debce6 100644
--- a/llvm/include/llvm/Support/Allocator.h
+++ b/llvm/include/llvm/Support/Allocator.h
@@ -66,7 +66,8 @@ template 
 class BumpPtrAllocatorImpl
 : public AllocatorBase> {
+SizeThreshold, GrowthDelay>>,
+  private AllocatorT {
 public:
   static_assert(SizeThreshold <= SlabSize,
 "The SizeThreshold must be at most the SlabSize to ensure "
@@ -80,15 +81,15 @@ class BumpPtrAllocatorImpl
 
   template 
   BumpPtrAllocatorImpl(T &&Allocator)
-  : Allocator(std::forward(Allocator)) {}
+  : AllocatorT(std::forward(Allocator)) {}
 
   // Manually implement a move constructor as we must clear the old allocator's
   // slabs as a matter of correctness.
   BumpPtrAllocatorImpl(BumpPtrAllocatorImpl &&Old)
-  : CurPtr(Old.CurPtr), End(Old.End), Slabs(std::move(Old.Slabs)),
+  : AllocatorT(static_cast(Old)), CurPtr(Old.CurPtr),
+End(Old.End), Slabs(std::move(Old.Slabs)),
 CustomSizedSlabs(std::move(Old.CustomSizedSlabs)),
-BytesAllocated(Old.BytesAllocated), RedZoneSize(Old.RedZoneSize),
-Allocator(std::move(Old.Allocator)) {
+BytesAllocated(Old.BytesAllocated), RedZoneSize(Old.RedZoneSize) {
 Old.CurPtr = Old.End = nullptr;
 Old.BytesAllocated = 0;
 Old.Slabs.clear();
@@ -110,7 +111,7 @@ class BumpPtrAllocatorImpl
 RedZoneSize = RHS.RedZoneSize;
 Slabs = std::move(RHS.Slabs);
 CustomSizedSlabs = std::move(RHS.CustomSizedSlabs);
-Allocator = std::move(RHS.Allocator);
+AllocatorT::operator=(static_cast(RHS));
 
 RHS.CurPtr = RHS.End = nullptr;
 RHS.BytesAllocated = 0;
@@ -170,7 +171,8 @@ class BumpPtrAllocatorImpl
 // If Size is really big, allocate a separate slab for it.
 size_t PaddedSize = SizeToAllocate + Alignment.value() - 1;
 if (PaddedSize > SizeThreshold) {
-  void *NewSlab = Allocator.Allocate(PaddedSize, 
alignof(std::max_align_t));
+  void *NewSlab =
+  AllocatorT::Allocate(PaddedSize, alignof(std::max_align_t));
   // We own the new slab and don't want anyone reading anyting other than
   // pieces returned from this method.  So poison the whole slab.
   __asan_poison_memory_region(NewSlab, PaddedSize);
@@ -315,9 +317,6 @@ class BumpPtrAllocatorImpl
   /// a sanitizer.
   size_t RedZoneSize = 1;
 
-  /// The allocator instance we use to get slabs of memory.
-  AllocatorT Allocator;
-
   static size_t computeSlabSize(unsigned SlabIdx) {
 // Scale the actual allocated slab size based on the number of slabs
 // allocated. Every GrowthDelay slabs allocated, we double
@@ -333,7 +332,7 @@ class BumpPtrAllocatorImpl
 size_t AllocatedSlabSize = computeSlabSize(Slabs.size());
 
 void *NewSlab =
-Allocator.Allocate(AllocatedSlabSize, alignof(std::max_align_t));
+AllocatorT::Allocate(AllocatedSlabSize, alignof(std::max_align_t));
 // We own the new slab and don't want anyone reading anything other than
 // pieces returned from this method.  So poison the whole slab.
 __asan_poison_memory_region(NewSlab, AllocatedSlabSize);
@@ -349,7 +348,7 @@ class BumpPtrAllocatorImpl
 for (; I != E; ++I) {
   size_t AllocatedSlabSize =
   computeSlabSize(std::distance(Slabs.begin(), I));
-  Allocator.Deallocate(*I, AllocatedSlabSize, alignof(std::max_align_t));
+  AllocatorT::Deallocate(*I, AllocatedSlabSize, alignof(std::max_align_t));
 }
   }
 
@@ -358,7 +357,7 @@ class BumpPtrAllocatorImpl
 for (auto &PtrAndSize : CustomSizedSlabs) {
   void *Ptr = PtrAndSize.first;
   size_t Size = PtrAndSize.second;
-  Allocator.Deallocate(Ptr, Size, alignof(std::max_align_t));
+  AllocatorT::Dea

[llvm-branch-commits] [llvm] 1730b0f - [RISCV] Remove '.mask' from vcompress intrinsic name. NFC

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-12T14:46:16-08:00
New Revision: 1730b0f66adaea6ed65d441dc2032013dd3c3664

URL: 
https://github.com/llvm/llvm-project/commit/1730b0f66adaea6ed65d441dc2032013dd3c3664
DIFF: 
https://github.com/llvm/llvm-project/commit/1730b0f66adaea6ed65d441dc2032013dd3c3664.diff

LOG: [RISCV] Remove '.mask' from vcompress intrinsic name. NFC

It has a mask argument, but isn't a masked instruction. It doesn't
use the mask policy of or the v0.t syntax.

Added: 


Modified: 
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll

Removed: 




diff  --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td 
b/llvm/include/llvm/IR/IntrinsicsRISCV.td
index 8171be8a1ca8..e45be2b72796 100644
--- a/llvm/include/llvm/IR/IntrinsicsRISCV.td
+++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td
@@ -740,7 +740,7 @@ let TargetPrefix = "riscv" in {
 
   defm vrgather : RISCVBinaryAAX;
 
-  def "int_riscv_vcompress_mask" : RISCVBinaryAAAMask;
+  def "int_riscv_vcompress" : RISCVBinaryAAAMask;
 
   defm vaaddu : RISCVSaturatingBinaryAAX;
   defm vaadd : RISCVSaturatingBinaryAAX;

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
index 3604a25b0d6a..a715676183e2 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
@@ -947,7 +947,7 @@ multiclass VPseudoUnaryV_M {
 multiclass VPseudoUnaryV_V_AnyMask {
   foreach m = MxList.m in {
 let VLMul = m.value in
-  def _VM # "_" # m.MX # "_MASK" : VPseudoUnaryAnyMask;
+  def _VM # "_" # m.MX : VPseudoUnaryAnyMask;
   }
 }
 
@@ -1404,12 +1404,12 @@ class VPatUnaryAnyMask :
-  Pat<(result_type (!cast(intrinsic#"_mask")
+  Pat<(result_type (!cast(intrinsic)
(result_type result_reg_class:$merge),
(op1_type op1_reg_class:$rs1),
(mask_type VR:$rs2),
(XLenVT GPR:$vl))),
-   (!cast(inst#"_"#kind#"_"#vlmul.MX#"_MASK")
+   (!cast(inst#"_"#kind#"_"#vlmul.MX)
(result_type result_reg_class:$merge),
(op1_type op1_reg_class:$rs1),
(mask_type VR:$rs2),

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll 
b/llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
index b8d42eeb9e6c..24b6d73d64c3 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
@@ -1,20 +1,20 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+f,+experimental-zfh 
-verify-machineinstrs \
 ; RUN:   --riscv-no-aliases < %s | FileCheck %s
-declare  @llvm.riscv.vcompress.mask.nxv1i8(
+declare  @llvm.riscv.vcompress.nxv1i8(
   ,
   ,
   ,
   i32);
 
-define  @intrinsic_vcompress_mask_vm_nxv1i8_nxv1i8( %0,  %1,  %2, i32 %3) nounwind {
-; CHECK-LABEL: intrinsic_vcompress_mask_vm_nxv1i8_nxv1i8:
+define  @intrinsic_vcompress_vm_nxv1i8_nxv1i8( %0,  %1,  %2, i32 %3) nounwind {
+; CHECK-LABEL: intrinsic_vcompress_vm_nxv1i8_nxv1i8:
 ; CHECK:   # %bb.0: # %entry
 ; CHECK-NEXT:vsetvli a0, a0, e8,mf8,tu,mu
 ; CHECK-NEXT:vcompress.vm v16, v17, v0
 ; CHECK-NEXT:jalr zero, 0(ra)
 entry:
-  %a = call  @llvm.riscv.vcompress.mask.nxv1i8(
+  %a = call  @llvm.riscv.vcompress.nxv1i8(
  %0,
  %1,
  %2,
@@ -23,20 +23,20 @@ entry:
   ret  %a
 }
 
-declare  @llvm.riscv.vcompress.mask.nxv2i8(
+declare  @llvm.riscv.vcompress.nxv2i8(
   ,
   ,
   ,
   i32);
 
-define  @intrinsic_vcompress_mask_vm_nxv2i8_nxv2i8( %0,  %1,  %2, i32 %3) nounwind {
-; CHECK-LABEL: intrinsic_vcompress_mask_vm_nxv2i8_nxv2i8:
+define  @intrinsic_vcompress_vm_nxv2i8_nxv2i8( %0,  %1,  %2, i32 %3) nounwind {
+; CHECK-LABEL: intrinsic_vcompress_vm_nxv2i8_nxv2i8:
 ; CHECK:   # %bb.0: # %entry
 ; CHECK-NEXT:vsetvli a0, a0, e8,mf4,tu,mu
 ; CHECK-NEXT:vcompress.vm v16, v17, v0
 ; CHECK-NEXT:jalr zero, 0(ra)
 entry:
-  %a = call  @llvm.riscv.vcompress.mask.nxv2i8(
+  %a = call  @llvm.riscv.vcompress.nxv2i8(
  %0,
  %1,
  %2,
@@ -45,20 +45,20 @@ entry:
   ret  %a
 }
 
-declare  @llvm.riscv.vcompress.mask.nxv4i8(
+declare  @llvm.riscv.vcompress.nxv4i8(
   ,
   ,
   ,
   i32);
 
-define  @intrinsic_vcompress_mask_vm_nxv4i8_nxv4i8( %0,  %1,  %2, i32 %3) nounwind {
-; CHECK-LABEL: intrinsic_vcompress_mask_vm_nxv4i8_nxv4i8:
+define  @intrinsic_vcompress_vm_nxv4i8_nxv4i8( %0,  %1,  %2, i32 %3) nounwind {
+; CHECK-LABEL: intrinsic_vcompress_vm_nxv4i8_nxv4i8:
 ; CHECK:   # %bb.0: # %entry
 ; CHECK-NEXT:vsetvli a0, a0, e8,mf2,tu,mu
 ; CHECK-NEXT:vcompress.vm v16, v17, v0
 ; CHECK-NEXT:jalr zero, 0(ra)
 entry:
-  %a = call  @llvm.riscv.vcompress.mask.nxv4i8(
+  %a = call  

[llvm-branch-commits] [lld] 6166b91 - [ELF][NFCI] small cleanup to OutputSections.h

[Bob Haarman via llvm-branch-commits]

Author: Bob Haarman
Date: 2021-01-12T23:09:16Z
New Revision: 6166b91e83716fbe930b2dc4e2a2217c52ee31a7

URL: 
https://github.com/llvm/llvm-project/commit/6166b91e83716fbe930b2dc4e2a2217c52ee31a7
DIFF: 
https://github.com/llvm/llvm-project/commit/6166b91e83716fbe930b2dc4e2a2217c52ee31a7.diff

LOG: [ELF][NFCI] small cleanup to OutputSections.h

OutputSections.h used to close the lld::elf namespace only to
immediately open it again. This change merges both parts into
one.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D94538

Added: 


Modified: 
lld/ELF/OutputSections.h

Removed: 




diff  --git a/lld/ELF/OutputSections.h b/lld/ELF/OutputSections.h
index 39bf48c091ca..69b7944d946a 100644
--- a/lld/ELF/OutputSections.h
+++ b/lld/ELF/OutputSections.h
@@ -135,12 +135,6 @@ struct Out {
   static OutputSection *finiArray;
 };
 
-} // namespace elf
-} // namespace lld
-
-namespace lld {
-namespace elf {
-
 uint64_t getHeaderSize();
 
 extern std::vector outputSections;



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[llvm-branch-commits] [llvm] 175288a - Add sample-profile-suffix-elision-policy attribute with -funique-internal-linkage-names.

[Hongtao Yu via llvm-branch-commits]

Author: Hongtao Yu
Date: 2021-01-12T15:15:53-08:00
New Revision: 175288a1afef2b6976455aab5ce51c66d28f8bca

URL: 
https://github.com/llvm/llvm-project/commit/175288a1afef2b6976455aab5ce51c66d28f8bca
DIFF: 
https://github.com/llvm/llvm-project/commit/175288a1afef2b6976455aab5ce51c66d28f8bca.diff

LOG: Add sample-profile-suffix-elision-policy attribute with 
-funique-internal-linkage-names.

Adding sample-profile-suffix-elision-policy attribute to functions whose 
linkage names are uniquefied so that their unique name suffix won't be trimmed 
when applying AutoFDO profiles.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94455

Added: 


Modified: 
llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp

llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp 
b/llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp
index 2909403fdb10..c57cec6be676 100644
--- a/llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp
+++ b/llvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp
@@ -43,6 +43,7 @@ static bool uniqueifyInternalLinkageNames(Module &M) {
   for (auto &F : M) {
 if (F.hasInternalLinkage()) {
   F.setName(F.getName() + ModuleNameHash);
+  F.addFnAttr("sample-profile-suffix-elision-policy", "selected");
   // Replace linkage names in the debug metadata.
   if (DISubprogram *SP = F.getSubprogram()) {
 if (SP->getRawLinkageName()) {

diff  --git 
a/llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll
 
b/llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll
index d07440d1b940..dcb49d9b7a51 100644
--- 
a/llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll
+++ 
b/llvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll
@@ -42,8 +42,9 @@ entry:
 ; O2: Running pass: UniqueInternalLinkageNamesPass
 ; O2: Running pass: SampleProfileProbePass
 
-; UNIQUE: define internal i32 @foo.__uniq.{{[0-9]+}}()
+; UNIQUE: define internal i32 @foo.__uniq.{{[0-9]+}}() [[ATTR:#[0-9]+]]
 ; UNIQUE: ret {{.*}} @foo.__uniq.{{[0-9]+}} {{.*}}
+; UNIQUE: attributes [[ATTR]] = {{{.*}} 
"sample-profile-suffix-elision-policy"="selected" {{.*}}}
 
 ; DBG: distinct !DISubprogram(name: "foo", linkageName: 
"foo.__uniq.{{[0-9]+}}", scope: ![[#]]
 ; DBG: !DISubprogram(name: "foo", linkageName: "foo.__uniq.{{[0-9]+}}", scope: 
![[#]]



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[llvm-branch-commits] [llvm] ddcb0aa - [MIPatternMatch] Add matcher for G_PTR_ADD

[Jessica Paquette via llvm-branch-commits]

Author: Jessica Paquette
Date: 2021-01-12T15:21:19-08:00
New Revision: ddcb0aae8b0dd87414105d264d1ee9eac9567476

URL: 
https://github.com/llvm/llvm-project/commit/ddcb0aae8b0dd87414105d264d1ee9eac9567476
DIFF: 
https://github.com/llvm/llvm-project/commit/ddcb0aae8b0dd87414105d264d1ee9eac9567476.diff

LOG: [MIPatternMatch] Add matcher for G_PTR_ADD

Add a matcher which recognizes G_PTR_ADD and add a test.

Differential Revision: https://reviews.llvm.org/D94348

Added: 


Modified: 
llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h 
b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
index 427906db6696..ed93dae24c05 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
@@ -220,6 +220,12 @@ m_GAdd(const LHS &L, const RHS &R) {
   return BinaryOp_match(L, R);
 }
 
+template 
+inline BinaryOp_match
+m_GPtrAdd(const LHS &L, const RHS &R) {
+  return BinaryOp_match(L, R);
+}
+
 template 
 inline BinaryOp_match m_GSub(const LHS &L,
 const RHS &R) {

diff  --git a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp 
b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
index f95b19f22e7b..a63a34f91545 100644
--- a/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
@@ -47,6 +47,7 @@ TEST_F(AArch64GISelMITest, MatchBinaryOp) {
 return;
   LLT s32 = LLT::scalar(32);
   LLT s64 = LLT::scalar(64);
+  LLT p0 = LLT::pointer(0, 64);
   auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]);
   // Test case for no bind.
   bool match =
@@ -145,6 +146,13 @@ TEST_F(AArch64GISelMITest, MatchBinaryOp) {
   EXPECT_TRUE(match);
   EXPECT_EQ(Src0, Copies[0]);
   EXPECT_EQ(Src1, TruncCopy1.getReg(0));
+
+  // Build a G_PTR_ADD and check that we can match it.
+  auto PtrAdd = B.buildPtrAdd(p0, {B.buildUndef(p0)}, Copies[0]);
+  match = mi_match(PtrAdd.getReg(0), *MRI, m_GPtrAdd(m_Reg(Src0), 
m_Reg(Src1)));
+  EXPECT_TRUE(match);
+  EXPECT_EQ(Src0, PtrAdd->getOperand(1).getReg());
+  EXPECT_EQ(Src1, Copies[0]);
 }
 
 TEST_F(AArch64GISelMITest, MatchICmp) {



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[llvm-branch-commits] [compiler-rt] 8f5ec45 - [Sanitizer][Darwin] Fix test for macOS 11+ point releases

[Julian Lettner via llvm-branch-commits]

Author: Julian Lettner
Date: 2021-01-12T15:23:43-08:00
New Revision: 8f5ec4593754a58a4feb835a9d44d59c655bd0d1

URL: 
https://github.com/llvm/llvm-project/commit/8f5ec4593754a58a4feb835a9d44d59c655bd0d1
DIFF: 
https://github.com/llvm/llvm-project/commit/8f5ec4593754a58a4feb835a9d44d59c655bd0d1.diff

LOG: [Sanitizer][Darwin] Fix test for macOS 11+ point releases

This test wrongly asserted that the minor version is always 0 when
running on macOS 11 and above.

Added: 


Modified: 
compiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp

Removed: 




diff  --git a/compiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp 
b/compiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp
index 090947eceb4a..b149567949b5 100644
--- a/compiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp
+++ b/compiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp
@@ -56,12 +56,18 @@ TEST(SanitizerMac, GetMacosAlignedVersion) {
 #else
 TEST(SanitizerMac, GetMacosAlignedVersion) {
   MacosVersion vers = GetMacosAlignedVersion();
-  u16 kernel_major = GetDarwinKernelVersion().major;
-  bool macos_11 = (kernel_major >= 20);
-  u16 expected_major = macos_11 ? (kernel_major - 9) : 10;
-  u16 expected_minor = macos_11 ? 0 : (kernel_major - 4);
-  EXPECT_EQ(vers.major, expected_major);
-  EXPECT_EQ(vers.minor, expected_minor);
+  std::ostringstream oss;
+  oss << vers.major << '.' << vers.minor;
+  std::string actual = oss.str();
+
+  char buf[100];
+  size_t len = sizeof(buf);
+  int res = sysctlbyname("kern.osproductversion", buf, &len, nullptr, 0);
+  ASSERT_EQ(res, KERN_SUCCESS);
+  std::string expected(buf);
+
+  // Prefix match
+  ASSERT_EQ(expected.compare(0, actual.size(), actual), 0);
 }
 #endif
 



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[llvm-branch-commits] [llvm] 5856123 - [NFC] Disallow unused prefixes under MC/AMDGPU

[Mircea Trofin via llvm-branch-commits]

Author: Mircea Trofin
Date: 2021-01-12T15:24:44-08:00
New Revision: 585612355cdf836b434a5331b1263e961135a1ab

URL: 
https://github.com/llvm/llvm-project/commit/585612355cdf836b434a5331b1263e961135a1ab
DIFF: 
https://github.com/llvm/llvm-project/commit/585612355cdf836b434a5331b1263e961135a1ab.diff

LOG: [NFC] Disallow unused prefixes under MC/AMDGPU

This patches remaining tests, and patches lit.local.cfg to block future
such cases (until we flip FileCheck's flag)

Differential Revision: https://reviews.llvm.org/D94556

Added: 


Modified: 
llvm/test/MC/AMDGPU/isa-version-hsa.s
llvm/test/MC/AMDGPU/isa-version-pal.s
llvm/test/MC/AMDGPU/isa-version-unk.s
llvm/test/MC/AMDGPU/lit.local.cfg
llvm/test/MC/AMDGPU/literal16.s
llvm/test/MC/AMDGPU/literals.s
llvm/test/MC/AMDGPU/mtbuf-gfx10.s
llvm/test/MC/AMDGPU/mtbuf.s
llvm/test/MC/AMDGPU/mubuf-gfx9.s
llvm/test/MC/AMDGPU/mubuf.s
llvm/test/MC/AMDGPU/out-of-range-registers.s
llvm/test/MC/AMDGPU/reg-syntax-extra.s
llvm/test/MC/AMDGPU/smem.s
llvm/test/MC/AMDGPU/smrd.s
llvm/test/MC/AMDGPU/sop1-err.s
llvm/test/MC/AMDGPU/sop1.s
llvm/test/MC/AMDGPU/sop2.s
llvm/test/MC/AMDGPU/sopc.s
llvm/test/MC/AMDGPU/sopk-err.s
llvm/test/MC/AMDGPU/sopk.s
llvm/test/MC/AMDGPU/sopp-err.s
llvm/test/MC/AMDGPU/sopp.s
llvm/test/MC/AMDGPU/vintrp-err.s
llvm/test/MC/AMDGPU/vintrp.s
llvm/test/MC/AMDGPU/vop1.s
llvm/test/MC/AMDGPU/vop3-convert.s
llvm/test/MC/AMDGPU/vop3-gfx9.s
llvm/test/MC/AMDGPU/vop_dpp.s
llvm/test/MC/AMDGPU/vop_dpp_expr.s
llvm/test/MC/AMDGPU/vop_sdwa.s
llvm/test/MC/AMDGPU/xdl-insts-err.s

Removed: 




diff  --git a/llvm/test/MC/AMDGPU/isa-version-hsa.s 
b/llvm/test/MC/AMDGPU/isa-version-hsa.s
index 094ab1d4649f..7281487b0517 100644
--- a/llvm/test/MC/AMDGPU/isa-version-hsa.s
+++ b/llvm/test/MC/AMDGPU/isa-version-hsa.s
@@ -1,10 +1,10 @@
-// RUN: not llvm-mc -triple amdgcn-amd-unknown -mcpu=gfx802 %s 2>&1 | 
FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK-ERR %s
-// RUN: not llvm-mc -triple amdgcn-amd-unknown -mcpu=iceland %s 2>&1 | 
FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK-ERR %s
-// RUN: llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=gfx802 %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA %s
-// RUN: llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=iceland %s | FileCheck --check-prefix=GCN --check-prefix=OSABI-HSA %s
-// RUN: not llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=gfx803 %s 2>&1 | FileCheck --check-prefix=GCN 
--check-prefix=OSABI-HSA-ERR %s
-// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=gfx802 %s 2>&1 | FileCheck 
--check-prefix=GCN --check-prefix=OSABI-PAL-ERR %s
-// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=iceland %s 2>&1 | 
FileCheck --check-prefix=GCN --check-prefix=OSABI-PAL-ERR %s
+// RUN: not llvm-mc -triple amdgcn-amd-unknown -mcpu=gfx802 %s 2>&1 | 
FileCheck --check-prefix=OSABI-UNK-ERR %s
+// RUN: not llvm-mc -triple amdgcn-amd-unknown -mcpu=iceland %s 2>&1 | 
FileCheck --check-prefix=OSABI-UNK-ERR %s
+// RUN: llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=gfx802 %s | FileCheck --check-prefix=OSABI-HSA %s
+// RUN: llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=iceland %s | FileCheck --check-prefix=OSABI-HSA %s
+// RUN: not llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=gfx803 %s 2>&1 | FileCheck --check-prefix=OSABI-HSA-ERR %s
+// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=gfx802 %s 2>&1 | FileCheck 
--check-prefix=OSABI-PAL-ERR %s
+// RUN: not llvm-mc -triple amdgcn-amd-amdpal -mcpu=iceland %s 2>&1 | 
FileCheck --check-prefix=OSABI-PAL-ERR %s
 
 // OSABI-HSA: .amd_amdgpu_isa "amdgcn-amd-amdhsa--gfx802"
 // OSABI-UNK-ERR: error: .amd_amdgpu_isa directive does not match triple 
and/or mcpu arguments specified through the command line

diff  --git a/llvm/test/MC/AMDGPU/isa-version-pal.s 
b/llvm/test/MC/AMDGPU/isa-version-pal.s
index 378b94f87f86..98b91ad8bda9 100644
--- a/llvm/test/MC/AMDGPU/isa-version-pal.s
+++ b/llvm/test/MC/AMDGPU/isa-version-pal.s
@@ -1,10 +1,10 @@
-// RUN: not llvm-mc -triple amdgcn-amd-unknown -mcpu=gfx802 %s 2>&1 | 
FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK-ERR %s
-// RUN: not llvm-mc -triple amdgcn-amd-unknown -mcpu=iceland %s 2>&1 | 
FileCheck --check-prefix=GCN --check-prefix=OSABI-UNK-ERR %s
-// RUN: not llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=gfx802 %s 2>&1 | FileCheck --check-prefix=GCN 
--check-prefix=OSABI-HSA-ERR %s
-// RUN: not llvm-mc -triple amdgcn-amd-amdhsa --amdhsa-code-object-version=2 
-mcpu=iceland %s 2>&1 | FileCheck --check-prefix=GCN 
--check-prefix=OSABI-HSA-ERR %s
-// RUN: llvm-mc -triple amdgcn-amd-amdpal -mcpu=gfx802 %s | FileCheck 
--check-prefix=GCN --check-prefix=OSA

[llvm-branch-commits] [mlir] 0d88d7d - Delete unused function (was breaking the -Werror build)

[David Blaikie via llvm-branch-commits]

Author: David Blaikie
Date: 2021-01-12T15:29:44-08:00
New Revision: 0d88d7d82bc44b211a8187650a06c6cd3492186a

URL: 
https://github.com/llvm/llvm-project/commit/0d88d7d82bc44b211a8187650a06c6cd3492186a
DIFF: 
https://github.com/llvm/llvm-project/commit/0d88d7d82bc44b211a8187650a06c6cd3492186a.diff

LOG: Delete unused function (was breaking the -Werror build)

Added: 


Modified: 
mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
index 8f02f3d83cf1..0deb4e3f59ae 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
@@ -350,32 +350,6 @@ bool mlir::linalg::isFusableInto(const 
LinalgDependenceGraph &graph,
   return true;
 }
 
-static bool isSameSubView(Value a, Value b) {
-  if (a == b)
-return true;
-  auto sva = a.getDefiningOp();
-  auto svb = b.getDefiningOp();
-  if (!sva || !svb)
-return false;
-  if (!isSameSubView(sva.getViewSource(), svb.getViewSource()))
-return false;
-  if (sva.getType() != svb.getType())
-return false;
-  if (sva.getNumOperands() != svb.getNumOperands())
-return false;
-  if (sva.static_offsets() != svb.static_offsets())
-return false;
-  if (sva.static_sizes() != svb.static_sizes())
-return false;
-  if (sva.static_strides() != svb.static_strides())
-return false;
-  /// Skip the "source" operand.
-  for (unsigned idx = 1, e = sva.getNumOperands(); idx != e; ++idx)
-if (sva.getOperand(idx) != svb.getOperand(idx))
-  return false;
-  return true;
-}
-
 static Optional
 findFusableProducer(OpOperand &consumerOpOperand,
 const LinalgDependenceGraph &dependenceGraph) {



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[llvm-branch-commits] [libc] 04edcc0 - [libc] add isascii and toascii implementations

[Michael Jones via llvm-branch-commits]

Author: Michael Jones
Date: 2021-01-12T23:41:20Z
New Revision: 04edcc02638bc70772baa50a74e582bb8e029872

URL: 
https://github.com/llvm/llvm-project/commit/04edcc02638bc70772baa50a74e582bb8e029872
DIFF: 
https://github.com/llvm/llvm-project/commit/04edcc02638bc70772baa50a74e582bb8e029872.diff

LOG: [libc] add isascii and toascii implementations

adding both at once since these are trivial functions.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94558

Added: 
libc/src/ctype/isascii.cpp
libc/src/ctype/isascii.h
libc/src/ctype/toascii.cpp
libc/src/ctype/toascii.h
libc/test/src/ctype/isascii_test.cpp
libc/test/src/ctype/toascii_test.cpp

Modified: 
libc/config/linux/aarch64/entrypoints.txt
libc/config/linux/x86_64/entrypoints.txt
libc/spec/gnu_ext.td
libc/spec/posix.td
libc/src/ctype/CMakeLists.txt
libc/test/src/ctype/CMakeLists.txt

Removed: 




diff  --git a/libc/config/linux/aarch64/entrypoints.txt 
b/libc/config/linux/aarch64/entrypoints.txt
index 0db8c4b39caa..2b70cafd6fbf 100644
--- a/libc/config/linux/aarch64/entrypoints.txt
+++ b/libc/config/linux/aarch64/entrypoints.txt
@@ -2,6 +2,7 @@ set(TARGET_LIBC_ENTRYPOINTS
 # ctype.h entrypoints
 libc.src.ctype.isalnum
 libc.src.ctype.isalpha
+libc.src.ctype.isascii
 libc.src.ctype.isblank
 libc.src.ctype.iscntrl
 libc.src.ctype.isdigit
@@ -12,6 +13,7 @@ set(TARGET_LIBC_ENTRYPOINTS
 libc.src.ctype.isspace
 libc.src.ctype.isupper
 libc.src.ctype.isxdigit
+libc.src.ctype.toascii
 libc.src.ctype.tolower
 libc.src.ctype.toupper
 

diff  --git a/libc/config/linux/x86_64/entrypoints.txt 
b/libc/config/linux/x86_64/entrypoints.txt
index a80a8b4f105b..7c5367a9d528 100644
--- a/libc/config/linux/x86_64/entrypoints.txt
+++ b/libc/config/linux/x86_64/entrypoints.txt
@@ -5,6 +5,7 @@ set(TARGET_LIBC_ENTRYPOINTS
 # ctype.h entrypoints
 libc.src.ctype.isalnum
 libc.src.ctype.isalpha
+libc.src.ctype.isascii
 libc.src.ctype.isblank
 libc.src.ctype.iscntrl
 libc.src.ctype.isdigit
@@ -15,6 +16,7 @@ set(TARGET_LIBC_ENTRYPOINTS
 libc.src.ctype.isspace
 libc.src.ctype.isupper
 libc.src.ctype.isxdigit
+libc.src.ctype.toascii
 libc.src.ctype.tolower
 libc.src.ctype.toupper
 

diff  --git a/libc/spec/gnu_ext.td b/libc/spec/gnu_ext.td
index d85c562d9256..0b0b8ca38c40 100644
--- a/libc/spec/gnu_ext.td
+++ b/libc/spec/gnu_ext.td
@@ -1,4 +1,18 @@
 def GnuExtensions : StandardSpec<"GNUExtensions"> {
+  HeaderSpec CType = HeaderSpec<
+"ctype.h",
+[], // Macros
+[], // Types
+[], // Enumerations
+[
+FunctionSpec<
+"toascii",
+RetValSpec,
+[ArgSpec]
+>,
+]
+  >;
+
   HeaderSpec Math = HeaderSpec<
   "math.h",
   [], // Macros
@@ -27,7 +41,10 @@ def GnuExtensions : StandardSpec<"GNUExtensions"> {
   ]
   >;
 
+
   let Headers = [
-Math, String,
+CType,
+Math, 
+String,
   ];
 }

diff  --git a/libc/spec/posix.td b/libc/spec/posix.td
index 1bf64f082c62..32f6ef5844b1 100644
--- a/libc/spec/posix.td
+++ b/libc/spec/posix.td
@@ -235,7 +235,22 @@ def POSIX : StandardSpec<"POSIX"> {
 ]
   >;
 
+  HeaderSpec CType = HeaderSpec<
+"ctype.h",
+[], // Macros
+[], // Types
+[], // Enumerations
+[
+FunctionSpec<
+"isascii",
+RetValSpec,
+[ArgSpec]
+>,
+]
+  >;
+
   let Headers = [
+CType,
 Errno,
 SysMMan,
 Signal,

diff  --git a/libc/src/ctype/CMakeLists.txt b/libc/src/ctype/CMakeLists.txt
index da8c4403d959..dd7ee24520f8 100644
--- a/libc/src/ctype/CMakeLists.txt
+++ b/libc/src/ctype/CMakeLists.txt
@@ -24,6 +24,14 @@ add_entrypoint_object(
 .ctype_utils
 )
 
+add_entrypoint_object(
+  isascii
+  SRCS
+isascii.cpp
+  HDRS
+isascii.h
+)
+
 add_entrypoint_object(
   isblank
   SRCS
@@ -126,6 +134,14 @@ add_entrypoint_object(
 .ctype_utils
 )
 
+add_entrypoint_object(
+  toascii
+  SRCS
+toascii.cpp
+  HDRS
+toascii.h
+)
+
 add_entrypoint_object(
   toupper
   SRCS

diff  --git a/libc/src/ctype/isascii.cpp b/libc/src/ctype/isascii.cpp
new file mode 100644
index ..c12915ecd6ee
--- /dev/null
+++ b/libc/src/ctype/isascii.cpp
@@ -0,0 +1,17 @@
+//===-- Implementation of 
isascii--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "src/ctype/isascii.h"
+
+#include "src/__support/common.h"
+
+namespace __llvm_libc {
+
+LLVM_LIBC_FUNCTION(int, isascii, (int c)) { return (c & (~0x7f)) == 0; }
+
+} // namespace __llvm_libc

d

[llvm-branch-commits] [libc] 0c8466c - [libc][NFC] Use more specific comparison macros in LdExpTest.h.

[Siva Chandra Reddy via llvm-branch-commits]

Author: Siva Chandra Reddy
Date: 2021-01-12T16:13:10-08:00
New Revision: 0c8466c0015eb8e4061b177e125e588b2138cc8a

URL: 
https://github.com/llvm/llvm-project/commit/0c8466c0015eb8e4061b177e125e588b2138cc8a
DIFF: 
https://github.com/llvm/llvm-project/commit/0c8466c0015eb8e4061b177e125e588b2138cc8a.diff

LOG: [libc][NFC] Use more specific comparison macros in LdExpTest.h.

Added: 


Modified: 
libc/test/src/math/LdExpTest.h

Removed: 




diff  --git a/libc/test/src/math/LdExpTest.h b/libc/test/src/math/LdExpTest.h
index b4be06bdaad7..0a910bddb371 100644
--- a/libc/test/src/math/LdExpTest.h
+++ b/libc/test/src/math/LdExpTest.h
@@ -131,11 +131,11 @@ class LdExpTestTemplate : public 
__llvm_libc::testing::Test {
 // The result should not be infinity.
 x = NormalFloat(-FPBits::exponentBias + 1, NormalFloat::one >> 10, 0);
 exp = FPBits::maxExponent + 5;
-ASSERT_EQ(isinf(func(x, exp)), 0);
+ASSERT_FALSE(FPBits(func(x, exp)).isInf());
 // But if the exp is large enough to oversome than the normalization shift,
 // then it should result in infinity.
 exp = FPBits::maxExponent + 15;
-ASSERT_NE(isinf(func(x, exp)), 0);
+ASSERT_FP_EQ(func(x, exp), inf);
   }
 };
 



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[llvm-branch-commits] [llvm] 76643c4 - [LangRef] State that a nocapture pointer cannot be returned

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2021-01-13T09:30:54+09:00
New Revision: 76643c48cdddfa220680f1ab4a83829bd83faa7a

URL: 
https://github.com/llvm/llvm-project/commit/76643c48cdddfa220680f1ab4a83829bd83faa7a
DIFF: 
https://github.com/llvm/llvm-project/commit/76643c48cdddfa220680f1ab4a83829bd83faa7a.diff

LOG: [LangRef] State that a nocapture pointer cannot be returned

This is a small patch stating that a nocapture pointer cannot be returned.

Discussed in D93189.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94386

Added: 


Modified: 
llvm/docs/LangRef.rst

Removed: 




diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index ab5287014683..854c72191da2 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -1193,7 +1193,8 @@ Currently, only the following parameter attributes are 
defined:
 
 ``nocapture``
 This indicates that the callee does not make any copies of the
-pointer that outlive the callee itself. This is not a valid
+pointer that outlive the callee itself in any form such as a pointer stored
+in the memory or as a return value. This is not a valid
 attribute for return values.  Addresses used in volatile operations
 are considered to be captured.
 



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[llvm-branch-commits] [llvm] 25eb7b0 - [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND)

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2021-01-13T09:36:52+09:00
New Revision: 25eb7b08ba77a0b7c9c938490444bb8b5121233c

URL: 
https://github.com/llvm/llvm-project/commit/25eb7b08ba77a0b7c9c938490444bb8b5121233c
DIFF: 
https://github.com/llvm/llvm-project/commit/25eb7b08ba77a0b7c9c938490444bb8b5121233c.diff

LOG: [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND)

This patch resolves the suboptimal codegen described in http://llvm.org/pr47873 
.
When CodeGenPrepare lowers select into a conditional branch, a freeze 
instruction is inserted.
It is then translated to `BRCOND(FREEZE(SETCC))` in SelDag.
The `FREEZE` in the middle of `SETCC` and `BRCOND` was causing a suboptimal 
code generation however.
This patch adds `BRCOND(FREEZE(cond))` -> `BRCOND(cond)` fold to DAGCombiner to 
remove the `FREEZE`.

To make this optimization sound, `BRCOND(UNDEF)` simply should 
nondeterministically jump to the branch or not, rather than raising UB.
It wasn't clear what happens when the condition was undef according to the 
comments in ISDOpcodes.h, however.
I updated the comments of `BRCOND` to make it explicit (as well as `BR_CC`, 
which is also a conditional branch instruction).

Note that it diverges from the semantics of `br` instruction in IR, which is 
explicitly UB.
Since the UB semantics was necessary to explain optimizations that use 
branching conditions, and SelDag doesn't seem to have such optimization, I 
think this divergence is okay.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D92015

Added: 


Modified: 
llvm/include/llvm/CodeGen/ISDOpcodes.h
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/X86/select-prof-codegen.ll

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/ISDOpcodes.h 
b/llvm/include/llvm/CodeGen/ISDOpcodes.h
index 5b35266dcbaa..5358b15437cc 100644
--- a/llvm/include/llvm/CodeGen/ISDOpcodes.h
+++ b/llvm/include/llvm/CodeGen/ISDOpcodes.h
@@ -890,13 +890,18 @@ enum NodeType {
   /// BRCOND - Conditional branch.  The first operand is the chain, the
   /// second is the condition, the third is the block to branch to if the
   /// condition is true.  If the type of the condition is not i1, then the
-  /// high bits must conform to getBooleanContents.
+  /// high bits must conform to getBooleanContents. If the condition is undef,
+  /// it nondeterministically jumps to the block.
+  /// TODO: Its semantics w.r.t undef requires further discussion; we need to
+  /// make it sure that it is consistent with optimizations in MIR & the
+  /// meaning of IMPLICIT_DEF. See https://reviews.llvm.org/D92015
   BRCOND,
 
   /// BR_CC - Conditional branch.  The behavior is like that of SELECT_CC, in
   /// that the condition is represented as condition code, and two nodes to
   /// compare, rather than as a combined SetCC node.  The operands in order
-  /// are chain, cc, lhs, rhs, block to branch to if condition is true.
+  /// are chain, cc, lhs, rhs, block to branch to if condition is true. If
+  /// condition is undef, it nondeterministically jumps to the block.
   BR_CC,
 
   /// INLINEASM - Represents an inline asm block.  This node always has two

diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 9f55bd03fbe4..5d9bb4e4a98b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14548,6 +14548,13 @@ SDValue DAGCombiner::visitBRCOND(SDNode *N) {
   SDValue N1 = N->getOperand(1);
   SDValue N2 = N->getOperand(2);
 
+  // BRCOND(FREEZE(cond)) is equivalent to BRCOND(cond) (both are
+  // nondeterministic jumps).
+  if (N1->getOpcode() == ISD::FREEZE && N1.hasOneUse()) {
+return DAG.getNode(ISD::BRCOND, SDLoc(N), MVT::Other, Chain,
+   N1->getOperand(0), N2);
+  }
+
   // If N is a constant we could fold this into a fallthrough or unconditional
   // branch. However that doesn't happen very often in normal code, because
   // Instcombine/SimplifyCFG should have handled the available opportunities.

diff  --git a/llvm/test/CodeGen/X86/select-prof-codegen.ll 
b/llvm/test/CodeGen/X86/select-prof-codegen.ll
index 22f7d728847b..5ae09afd239e 100644
--- a/llvm/test/CodeGen/X86/select-prof-codegen.ll
+++ b/llvm/test/CodeGen/X86/select-prof-codegen.ll
@@ -1,15 +1,13 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
 
-; TODO: Compiling the select should not create 'seta - testb $1 - jump' 
sequence.
+; Compiling the select should not create 'seta - testb $1 - jump' sequence.
 define i32 @f(i32 %x, i32 %y) {
 ; CHECK-LABEL: f:
 ; CHECK:   # %bb.0: # %entry
 ; CHECK-NEXT:movl %edi, %eax
 ; CHECK-NEXT:cmpl %esi, %edi
-; CHECK-NEXT:seta %cl
-; CHECK-NEXT:testb $1, %cl
-; CHECK-NEXT:jne .LBB0_2
+; CHECK-NEXT:ja .LBB0_2
 

[llvm-branch-commits] [compiler-rt] 82655c1 - [MSan] Tweak CopyOrigin

[Jianzhou Zhao via llvm-branch-commits]

Author: Jianzhou Zhao
Date: 2021-01-13T01:22:05Z
New Revision: 82655c151450e0103a3aa60725639da607f9220c

URL: 
https://github.com/llvm/llvm-project/commit/82655c151450e0103a3aa60725639da607f9220c
DIFF: 
https://github.com/llvm/llvm-project/commit/82655c151450e0103a3aa60725639da607f9220c.diff

LOG: [MSan] Tweak CopyOrigin

There could be some mis-alignments when copying origins not aligned.

I believe inaligned memcpy is rare so the cases do not matter too much
in practice.

1) About the change at line 50

Let dst be (void*)5,
then d=5, beg=4
so we need to write 3 (4+4-5) bytes from 5 to 7.

2) About the change around line 77.

Let dst be (void*)5,
because of lines 50-55, the bytes from 5-7 were already writen.
So the aligned copy is from 8.

Reviewed-by: eugenis
Differential Revision: https://reviews.llvm.org/D94552

Added: 


Modified: 
compiler-rt/lib/msan/msan_poisoning.cpp

Removed: 




diff  --git a/compiler-rt/lib/msan/msan_poisoning.cpp 
b/compiler-rt/lib/msan/msan_poisoning.cpp
index ef3c74e0a35a..8f58432d528a 100644
--- a/compiler-rt/lib/msan/msan_poisoning.cpp
+++ b/compiler-rt/lib/msan/msan_poisoning.cpp
@@ -47,7 +47,7 @@ void CopyOrigin(const void *dst, const void *src, uptr size,
   uptr beg = d & ~3UL;
   // Copy left unaligned origin if that memory is poisoned.
   if (beg < d) {
-u32 o = GetOriginIfPoisoned((uptr)src, d - beg);
+u32 o = GetOriginIfPoisoned((uptr)src, beg + 4 - d);
 if (o) {
   if (__msan_get_track_origins() > 1) o = ChainOrigin(o, stack);
   *(u32 *)MEM_TO_ORIGIN(beg) = o;
@@ -71,12 +71,13 @@ void CopyOrigin(const void *dst, const void *src, uptr size,
   if (beg < end) {
 // Align src up.
 uptr s = ((uptr)src + 3) & ~3UL;
+uptr aligned_beg = ((uptr)dst + 3) & ~3UL;
 // FIXME: factor out to msan_copy_origin_aligned
 if (__msan_get_track_origins() > 1) {
   u32 *src = (u32 *)MEM_TO_ORIGIN(s);
   u32 *src_s = (u32 *)MEM_TO_SHADOW(s);
-  u32 *src_end = (u32 *)MEM_TO_ORIGIN(s + (end - beg));
-  u32 *dst = (u32 *)MEM_TO_ORIGIN(beg);
+  u32 *src_end = (u32 *)MEM_TO_ORIGIN(s + (end - aligned_beg));
+  u32 *dst = (u32 *)MEM_TO_ORIGIN(aligned_beg);
   u32 src_o = 0;
   u32 dst_o = 0;
   for (; src < src_end; ++src, ++src_s, ++dst) {
@@ -88,8 +89,9 @@ void CopyOrigin(const void *dst, const void *src, uptr size,
 *dst = dst_o;
   }
 } else {
-  REAL(memcpy)((void *)MEM_TO_ORIGIN(beg), (void *)MEM_TO_ORIGIN(s),
-   end - beg);
+  REAL(memcpy)
+  ((void *)MEM_TO_ORIGIN(aligned_beg), (void *)MEM_TO_ORIGIN(s),
+   end - aligned_beg);
 }
   }
 }



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[llvm-branch-commits] [llvm] 25b3921 - [gn build] (manually) port 79f99ba65d96

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2021-01-12T20:30:56-05:00
New Revision: 25b3921f2fcd8fb3241c2f79e488f25a6374b99f

URL: 
https://github.com/llvm/llvm-project/commit/25b3921f2fcd8fb3241c2f79e488f25a6374b99f
DIFF: 
https://github.com/llvm/llvm-project/commit/25b3921f2fcd8fb3241c2f79e488f25a6374b99f.diff

LOG: [gn build] (manually) port 79f99ba65d96

Added: 


Modified: 
llvm/utils/gn/secondary/libcxx/include/BUILD.gn

Removed: 




diff  --git a/llvm/utils/gn/secondary/libcxx/include/BUILD.gn 
b/llvm/utils/gn/secondary/libcxx/include/BUILD.gn
index 64253c6e72df..f1f1f37686e2 100644
--- a/llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+++ b/llvm/utils/gn/secondary/libcxx/include/BUILD.gn
@@ -209,6 +209,7 @@ copy("include") {
 "support/musl/xlocale.h",
 "support/newlib/xlocale.h",
 "support/nuttx/xlocale.h",
+"support/openbsd/xlocale.h",
 "support/solaris/floatingpoint.h",
 "support/solaris/wchar.h",
 "support/solaris/xlocale.h",



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[llvm-branch-commits] [mlir] c0f3ea8 - [mlir][Python] Add checking process before create an AffineMap from a permutation.

[via llvm-branch-commits]

Author: zhanghb97
Date: 2021-01-13T09:32:32+08:00
New Revision: c0f3ea8a08ca9a9ec473f6e9072ccf30dad5def8

URL: 
https://github.com/llvm/llvm-project/commit/c0f3ea8a08ca9a9ec473f6e9072ccf30dad5def8
DIFF: 
https://github.com/llvm/llvm-project/commit/c0f3ea8a08ca9a9ec473f6e9072ccf30dad5def8.diff

LOG: [mlir][Python] Add checking process before create an AffineMap from a 
permutation.

An invalid permutation will trigger a C++ assertion when attempting to create 
an AffineMap from the permutation.
This patch adds an `isPermutation` function to check the given permutation 
before creating the AffineMap.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D94492

Added: 


Modified: 
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_affine_map.py

Removed: 




diff  --git a/mlir/lib/Bindings/Python/IRModules.cpp 
b/mlir/lib/Bindings/Python/IRModules.cpp
index 218099bedc6f..493ea5c1e47a 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -153,6 +153,21 @@ static MlirStringRef toMlirStringRef(const std::string &s) 
{
   return mlirStringRefCreate(s.data(), s.size());
 }
 
+template 
+static bool isPermutation(std::vector permutation) {
+  llvm::SmallVector seen(permutation.size(), false);
+  for (auto val : permutation) {
+if (val < permutation.size()) {
+  if (seen[val])
+return false;
+  seen[val] = true;
+  continue;
+}
+return false;
+  }
+  return true;
+}
+
 
//--
 // Collections.
 
//--
@@ -3914,6 +3929,9 @@ void mlir::python::populateIRSubmodule(py::module &m) {
   "get_permutation",
   [](std::vector permutation,
  DefaultingPyMlirContext context) {
+if (!isPermutation(permutation))
+  throw py::cast_error("Invalid permutation when attempting to "
+   "create an AffineMap");
 MlirAffineMap affineMap = mlirAffineMapPermutationGet(
 context->get(), permutation.size(), permutation.data());
 return PyAffineMap(context->getRef(), affineMap);

diff  --git a/mlir/test/Bindings/Python/ir_affine_map.py 
b/mlir/test/Bindings/Python/ir_affine_map.py
index fe37eb971555..0c99722dbf04 100644
--- a/mlir/test/Bindings/Python/ir_affine_map.py
+++ b/mlir/test/Bindings/Python/ir_affine_map.py
@@ -73,6 +73,12 @@ def testAffineMapGet():
   # CHECK: Invalid expression (None?) when attempting to create an 
AffineMap
   print(e)
 
+try:
+  AffineMap.get_permutation([1, 0, 1])
+except RuntimeError as e:
+  # CHECK: Invalid permutation when attempting to create an AffineMap
+  print(e)
+
 try:
   map3.get_submap([42])
 except ValueError as e:



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[llvm-branch-commits] [llvm] 055644c - [X86][AMX] Prohibit pointer cast on load.

[via llvm-branch-commits]

Author: Luo, Yuanke
Date: 2021-01-13T09:39:19+08:00
New Revision: 055644cc459eb204613ac788b73c51d5dab2fcbb

URL: 
https://github.com/llvm/llvm-project/commit/055644cc459eb204613ac788b73c51d5dab2fcbb
DIFF: 
https://github.com/llvm/llvm-project/commit/055644cc459eb204613ac788b73c51d5dab2fcbb.diff

LOG: [X86][AMX] Prohibit pointer cast on load.

The load/store instruction will be transformed to amx intrinsics in the
pass of AMX type lowering. Prohibiting the pointer cast make that pass
happy.

Differential Revision: https://reviews.llvm.org/D94372

Added: 
llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll

Modified: 
llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
index 910119af1f12..fb4170b511c1 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -589,7 +589,16 @@ static Instruction 
*combineLoadToOperationType(InstCombinerImpl &IC,
   // Fold away bit casts of the loaded value by loading the desired type.
   // Note that we should not do this for pointer<->integer casts,
   // because that would result in type punning.
-  if (LI.hasOneUse())
+  if (LI.hasOneUse()) {
+// Don't transform when the type is x86_amx, it makes the pass that lower
+// x86_amx type happy.
+if (auto *BC = dyn_cast(LI.user_back())) {
+  assert(!LI.getType()->isX86_AMXTy() &&
+ "load from x86_amx* should not happen!");
+  if (BC->getType()->isX86_AMXTy())
+return nullptr;
+}
+
 if (auto* CI = dyn_cast(LI.user_back()))
   if (CI->isNoopCast(DL) && LI.getType()->isPtrOrPtrVectorTy() ==
 CI->getDestTy()->isPtrOrPtrVectorTy())
@@ -599,6 +608,7 @@ static Instruction 
*combineLoadToOperationType(InstCombinerImpl &IC,
   IC.eraseInstFromFunction(*CI);
   return &LI;
 }
+  }
 
   // FIXME: We should also canonicalize loads of vectors when their elements 
are
   // cast to other types.
@@ -1114,10 +1124,12 @@ static bool combineStoreToValueType(InstCombinerImpl 
&IC, StoreInst &SI) {
 
   // Fold away bit casts of the stored value by storing the original type.
   if (auto *BC = dyn_cast(V)) {
+assert(!BC->getType()->isX86_AMXTy() &&
+   "store to x86_amx* should not happen!");
 V = BC->getOperand(0);
-// Don't transform when the type is x86_amx, it make the pass that lower
+// Don't transform when the type is x86_amx, it makes the pass that lower
 // x86_amx type happy.
-if (BC->getType()->isX86_AMXTy() || V->getType()->isX86_AMXTy())
+if (V->getType()->isX86_AMXTy())
   return false;
 if (!SI.isAtomic() || isSupportedAtomicType(V->getType())) {
   combineStoreToNewValue(IC, SI, V);

diff  --git a/llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll 
b/llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll
new file mode 100644
index ..a51f7551911e
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/X86/x86-amx-load-store.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -instcombine -S < %s | FileCheck %s
+; RUN: opt -passes=instcombine -S < %s | FileCheck %s
+
+; Prohibit poiter cast for amx.
+define dso_local void @test_amx_load_store(<256 x i32>* %src, i8* %dst) {
+; CHECK-LABEL: @test_amx_load_store(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[VEC:%.*]] = load <256 x i32>, <256 x i32>* [[SRC:%.*]], 
align 64
+; CHECK-NEXT:[[BC:%.*]] = bitcast <256 x i32> [[VEC]] to x86_amx
+; CHECK-NEXT:tail call void @llvm.x86.tilestored64.internal(i16 16, i16 
16, i8* [[DST:%.*]], i64 64, x86_amx [[BC]])
+; CHECK-NEXT:ret void
+;
+entry:
+  %vec = load <256 x i32>, <256 x i32>* %src, align 64
+  %bc = bitcast <256 x i32> %vec to x86_amx
+  tail call void @llvm.x86.tilestored64.internal(i16 16, i16 16, i8* %dst, i64 
64, x86_amx %bc)
+  ret void
+}
+
+; Prohibit poiter cast for amx.
+define dso_local void @test_amx_load_store2(<256 x i32>* %dst, i8* %src) {
+; CHECK-LABEL: @test_amx_load_store2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[AMX:%.*]] = tail call x86_amx 
@llvm.x86.tileloadd64.internal(i16 16, i16 16, i8* [[SRC:%.*]], i64 64)
+; CHECK-NEXT:[[BC:%.*]] = bitcast x86_amx [[AMX]] to <256 x i32>
+; CHECK-NEXT:store <256 x i32> [[BC]], <256 x i32>* [[DST:%.*]], align 1024
+; CHECK-NEXT:ret void
+;
+entry:
+  %amx = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 16, i8* 
%src, i64 64)
+  %bc = bitcast x86_amx %amx to <256 x i32>
+  store <256 x i32> %bc, <256 x i32>* %dst
+  ret void
+}
+
+declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64)
+declare void @llvm.x86.tilestored64.internal(i16, i16, i8*,