[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.222 -> 1.223 --- Log message: Add keyword explicit. --- Diffs of the changes: (+1 -1) MachineInstr.h |2 +- 1 files changed, 1 insertion(+), 1 deletion(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.222 llvm/include/llvm/CodeGen/MachineInstr.h:1.223 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.222 Fri Jun 15 14:05:13 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.hMon Jun 18 09:11:31 2007 @@ -344,7 +344,7 @@ /// MachineInstr ctor - This constructor create a MachineInstr and add the /// implicit operands. It reserves space for number of operands specified by /// TargetInstrDescriptor. - MachineInstr(const TargetInstrDescriptor &TID); + explicit MachineInstr(const TargetInstrDescriptor &TID); /// MachineInstr ctor - Work exactly the same as the ctor above, except that /// the MachineInstr is created and added to the end of the specified basic ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.221 -> 1.222
---
Log message:
No longer needed.
---
Diffs of the changes: (+0 -4)
MachineInstr.h |4
1 files changed, 4 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.221
llvm/include/llvm/CodeGen/MachineInstr.h:1.222
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.221 Tue May 29 13:30:54 2007
+++ llvm/include/llvm/CodeGen/MachineInstr.hFri Jun 15 14:05:13 2007
@@ -394,10 +394,6 @@
return true;
}
- /// isPredicable - True if the instruction can be converted into a
- /// predicated instruction.
- bool isPredicable() const;
-
/// clone - Create a copy of 'this' instruction that is identical in
/// all ways except the the instruction has no parent, prev, or next.
MachineInstr* clone() const { return new MachineInstr(*this); }
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.220 -> 1.221 --- Log message: Add missing const qualifiers. --- Diffs of the changes: (+5 -4) MachineInstr.h |9 + 1 files changed, 5 insertions(+), 4 deletions(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.220 llvm/include/llvm/CodeGen/MachineInstr.h:1.221 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.220 Wed May 16 15:43:42 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.hTue May 29 13:30:54 2007 @@ -415,15 +415,16 @@ /// findRegisterUseOperandIdx() - Returns the operand index that is a use of /// the specific register or -1 if it is not found. It further tightening /// the search criteria to a use that kills the register if isKill is true. - int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false); + int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const; /// findRegisterDefOperand() - Returns the MachineOperand that is a def of /// the specific register or NULL if it is not found. MachineOperand *findRegisterDefOperand(unsigned Reg); - /// findFirstPredOperand() - Find the first operand in the operand list that - // is used to represent the predicate. - MachineOperand *findFirstPredOperand(); + /// findFirstPredOperandIdx() - Find the index of the first operand in the + /// operand list that is used to represent the predicate. It returns -1 if + /// none is found. + int findFirstPredOperandIdx() const; /// copyKillDeadInfo - Copies kill / dead operand properties from MI. /// ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.219 -> 1.220
---
Log message:
Rename M_PREDICATED to M_PREDICABLE; Move TargetInstrInfo::isPredicatable() to
MachineInstr::isPredicable().
---
Diffs of the changes: (+4 -0)
MachineInstr.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.219
llvm/include/llvm/CodeGen/MachineInstr.h:1.220
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.219 Mon May 14 20:25:06 2007
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 16 15:43:42 2007
@@ -394,6 +394,10 @@
return true;
}
+ /// isPredicable - True if the instruction can be converted into a
+ /// predicated instruction.
+ bool isPredicable() const;
+
/// clone - Create a copy of 'this' instruction that is identical in
/// all ways except the the instruction has no parent, prev, or next.
MachineInstr* clone() const { return new MachineInstr(*this); }
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.218 -> 1.219 --- Log message: Added getNumExplicitOperands and findFirstPredOperand. --- Diffs of the changes: (+10 -0) MachineInstr.h | 10 ++ 1 files changed, 10 insertions(+) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.218 llvm/include/llvm/CodeGen/MachineInstr.h:1.219 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.218 Tue May 1 00:57:01 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.hMon May 14 20:25:06 2007 @@ -378,6 +378,9 @@ return Operands[i]; } + /// getNumExplicitOperands - Returns the number of non-implicit operands. + /// + unsigned getNumExplicitOperands() const; /// isIdenticalTo - Return true if this instruction is identical to (same /// opcode and same operands as) the specified instruction. @@ -413,11 +416,18 @@ /// findRegisterDefOperand() - Returns the MachineOperand that is a def of /// the specific register or NULL if it is not found. MachineOperand *findRegisterDefOperand(unsigned Reg); + + /// findFirstPredOperand() - Find the first operand in the operand list that + // is used to represent the predicate. + MachineOperand *findFirstPredOperand(); /// copyKillDeadInfo - Copies kill / dead operand properties from MI. /// void copyKillDeadInfo(const MachineInstr *MI); + /// copyPredicates - Copies predicate operand(s) from MI. + void copyPredicates(const MachineInstr *MI); + // // Debugging support // ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.217 -> 1.218
---
Log message:
llvm bug #1350, parts 1, 2, and 3.
---
Diffs of the changes: (+31 -16)
MachineInstr.h | 47 +++
1 files changed, 31 insertions(+), 16 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.217
llvm/include/llvm/CodeGen/MachineInstr.h:1.218
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.217 Thu Apr 26 13:59:33 2007
+++ llvm/include/llvm/CodeGen/MachineInstr.hTue May 1 00:57:01 2007
@@ -71,10 +71,17 @@
// immediately after the write. i.e. A register
// that is defined but never used.
- /// offset - Offset to address of global or external, only valid for
- /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
- int offset;
-
+ /// auxInfo - auxiliary information used by the MachineOperand
+ union {
+/// offset - Offset to address of global or external, only valid for
+/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
+int offset;
+
+/// subReg - SubRegister number, only valid for MO_Register. A value of 0
+/// indicates the MO_Register has no subReg.
+unsigned subReg;
+ } auxInfo;
+
MachineOperand() {}
void print(std::ostream &os) const;
@@ -95,7 +102,7 @@
Op.IsImp = false;
Op.IsKill = false;
Op.IsDead = false;
-Op.offset = 0;
+Op.auxInfo.offset = 0;
return Op;
}
@@ -106,7 +113,7 @@
IsKill = MO.IsKill;
IsDead = MO.IsDead;
opType = MO.opType;
-offset = MO.offset;
+auxInfo = MO.auxInfo;
return *this;
}
@@ -169,7 +176,11 @@
int getOffset() const {
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex())
&&
"Wrong MachineOperand accessor");
-return offset;
+return auxInfo.offset;
+ }
+ unsigned getSubReg() const {
+assert(isRegister() && "Wrong MachineOperand accessor");
+return auxInfo.subReg;
}
const char *getSymbolName() const {
assert(isExternalSymbol() && "Wrong MachineOperand accessor");
@@ -254,7 +265,11 @@
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
isJumpTableIndex()) &&
"Wrong MachineOperand accessor");
-offset = Offset;
+auxInfo.offset = Offset;
+ }
+ void setSubReg(unsigned subReg) {
+assert(isRegister() && "Wrong MachineOperand accessor");
+auxInfo.subReg = subReg;
}
void setConstantPoolIndex(unsigned Idx) {
assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
@@ -433,7 +448,7 @@
Op.IsKill = IsKill;
Op.IsDead = IsDead;
Op.contents.RegNo = Reg;
-Op.offset = 0;
+Op.auxInfo.subReg = 0;
}
/// addImmOperand - Add a zero extended constant argument to the
@@ -443,14 +458,14 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Immediate;
Op.contents.immedVal = Val;
-Op.offset = 0;
+Op.auxInfo.offset = 0;
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_MachineBasicBlock;
Op.contents.MBB = MBB;
-Op.offset = 0;
+Op.auxInfo.offset = 0;
}
/// addFrameIndexOperand - Add an abstract frame index to the instruction
@@ -459,7 +474,7 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_FrameIndex;
Op.contents.immedVal = Idx;
-Op.offset = 0;
+Op.auxInfo.offset = 0;
}
/// addConstantPoolndexOperand - Add a constant pool object index to the
@@ -469,7 +484,7 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ConstantPoolIndex;
Op.contents.immedVal = Idx;
-Op.offset = Offset;
+Op.auxInfo.offset = Offset;
}
/// addJumpTableIndexOperand - Add a jump table object index to the
@@ -479,14 +494,14 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_JumpTableIndex;
Op.contents.immedVal = Idx;
-Op.offset = 0;
+Op.auxInfo.offset = 0;
}
void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_GlobalAddress;
Op.contents.GV = GV;
-Op.offset = Offset;
+Op.auxInfo.offset = Offset;
}
/// addExternalSymbolOperand - Add an external symbol operand to this instr
@@ -495,7 +510,7 @@
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ExternalSymbol;
Op.contents.SymbolName = SymName;
-Op.offset = 0;
+Op.auxInfo.offset = 0;
}
//======//
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.216 -> 1.217 --- Log message: Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion. --- Diffs of the changes: (+2 -2) MachineInstr.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.216 llvm/include/llvm/CodeGen/MachineInstr.h:1.217 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.216 Wed Apr 25 02:24:13 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.hThu Apr 26 13:59:33 2007 @@ -390,10 +390,10 @@ delete removeFromParent(); } - /// findRegisterUseOperand() - Returns the operand index that is a use of + /// findRegisterUseOperandIdx() - Returns the operand index that is a use of /// the specific register or -1 if it is not found. It further tightening /// the search criteria to a use that kills the register if isKill is true. - int findRegisterUseOperand(unsigned Reg, bool isKill = false); + int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false); /// findRegisterDefOperand() - Returns the MachineOperand that is a def of /// the specific register or NULL if it is not found. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.215 -> 1.216
---
Log message:
Minor speed tweak.
---
Diffs of the changes: (+3 -4)
MachineInstr.h |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.215
llvm/include/llvm/CodeGen/MachineInstr.h:1.216
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.215 Mon Mar 26 17:37:45 2007
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed Apr 25 02:24:13 2007
@@ -517,13 +517,12 @@
MachineOperand &AddNewOperand(bool IsImp = false) {
assert((IsImp || !OperandsComplete()) &&
"Trying to add an operand to a machine instr that is already
done!");
-if (NumImplicitOps == 0) { // This is true most of the time.
+if (IsImp || NumImplicitOps == 0) { // This is true most of the time.
Operands.push_back(MachineOperand());
return Operands.back();
-} else {
- return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
- MachineOperand());
}
+return *Operands.insert(Operands.begin()+Operands.size()-NumImplicitOps,
+MachineOperand());
}
/// addImplicitDefUseOperands - Add all implicit def and use operands to
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.214 -> 1.215 --- Log message: Change findRegisterUseOperand() to return operand index instead. --- Diffs of the changes: (+3 -3) MachineInstr.h |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.214 llvm/include/llvm/CodeGen/MachineInstr.h:1.215 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.214 Tue Feb 27 15:06:57 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.hMon Mar 26 17:37:45 2007 @@ -390,10 +390,10 @@ delete removeFromParent(); } - /// findRegisterUseOperand() - Returns the MachineOperand that is a use of - /// the specific register or NULL if it is not found. It further tightening + /// findRegisterUseOperand() - Returns the operand index that is a use of + /// the specific register or -1 if it is not found. It further tightening /// the search criteria to a use that kills the register if isKill is true. - MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false); + int findRegisterUseOperand(unsigned Reg, bool isKill = false); /// findRegisterDefOperand() - Returns the MachineOperand that is a def of /// the specific register or NULL if it is not found. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.213 -> 1.214
---
Log message:
Pass IsImp, IsKill, and IsDead to ChangeToRegister.
---
Diffs of the changes: (+5 -4)
MachineInstr.h |9 +
1 files changed, 5 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.213
llvm/include/llvm/CodeGen/MachineInstr.h:1.214
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.213 Thu Feb 22 19:03:39 2007
+++ llvm/include/llvm/CodeGen/MachineInstr.hTue Feb 27 15:06:57 2007
@@ -280,13 +280,14 @@
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
- void ChangeToRegister(unsigned Reg, bool isDef) {
+ void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
+bool isKill = false, bool isDead = false) {
opType = MO_Register;
contents.RegNo = Reg;
IsDef = isDef;
-IsImp = false;
-IsKill = false;
-IsDead = false;
+IsImp = isImp;
+IsKill = isKill;
+IsDead = isDead;
}
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop)
{
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.212 -> 1.213 --- Log message: Use findRegisterUseOperand to find a kill of particular register. --- Diffs of the changes: (+3 -2) MachineInstr.h |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.212 llvm/include/llvm/CodeGen/MachineInstr.h:1.213 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.212 Mon Feb 19 15:49:53 2007 +++ llvm/include/llvm/CodeGen/MachineInstr.hThu Feb 22 19:03:39 2007 @@ -390,8 +390,9 @@ } /// findRegisterUseOperand() - Returns the MachineOperand that is a use of - /// the specific register or NULL if it is not found. - MachineOperand *findRegisterUseOperand(unsigned Reg); + /// the specific register or NULL if it is not found. It further tightening + /// the search criteria to a use that kills the register if isKill is true. + MachineOperand *findRegisterUseOperand(unsigned Reg, bool isKill = false); /// findRegisterDefOperand() - Returns the MachineOperand that is a def of /// the specific register or NULL if it is not found. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen: MachineInstr.h updated: 1.209 -> 1.210 --- Log message: Added findRegisterDefOperand(). --- Diffs of the changes: (+4 -0) MachineInstr.h |4 1 files changed, 4 insertions(+) Index: llvm/include/llvm/CodeGen/MachineInstr.h diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.209 llvm/include/llvm/CodeGen/MachineInstr.h:1.210 --- llvm/include/llvm/CodeGen/MachineInstr.h:1.209 Sat Dec 16 23:15:12 2006 +++ llvm/include/llvm/CodeGen/MachineInstr.hSat Feb 17 05:07:59 2007 @@ -393,6 +393,10 @@ /// the specific register or NULL if it is not found. MachineOperand *findRegisterUseOperand(unsigned Reg); + /// findRegisterDefOperand() - Returns the MachineOperand that is a def of + /// the specific register or NULL if it is not found. + MachineOperand *findRegisterDefOperand(unsigned Reg); + /// copyKillDeadInfo - Copies kill / dead operand properties from MI. /// void copyKillDeadInfo(const MachineInstr *MI); ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.203 -> 1.204
---
Log message:
Move copyKillDeadInfo out-of-line. Add findRegisterUseOperand().
---
Diffs of the changes: (+5 -17)
MachineInstr.h | 22 +-
1 files changed, 5 insertions(+), 17 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.203
llvm/include/llvm/CodeGen/MachineInstr.h:1.204
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.203 Thu Nov 30 01:07:25 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed Dec 6 02:27:17 2006
@@ -386,25 +386,13 @@
delete removeFromParent();
}
+ /// findRegisterUseOperand() - Returns the MachineOperand that is a use of
+ /// the specific register or NULL if it is not found.
+ MachineOperand *findRegisterUseOperand(unsigned Reg);
+
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
- void copyKillDeadInfo(const MachineInstr *MI) {
-for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
- const MachineOperand &MO = MI->getOperand(i);
- if (MO.isReg() && (MO.isKill() || MO.isDead())) {
-for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
- MachineOperand &MOp = getOperand(j);
- if (MOp.isIdenticalTo(MO)) {
-if (MO.isKill())
- MOp.setIsKill();
-else
- MOp.setIsDead();
-break;
- }
-}
- }
-}
- }
+ void copyKillDeadInfo(const MachineInstr *MI);
//
// Debugging support
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.202 -> 1.203
---
Log message:
- MachineInstr now keeps a ptr to TargetInstrDescriptor instead of Opcode.
- Remove the ugly TargetInstrDescriptors hack.
---
Diffs of the changes: (+11 -6)
MachineInstr.h | 17 +++--
1 files changed, 11 insertions(+), 6 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.202
llvm/include/llvm/CodeGen/MachineInstr.h:1.203
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.202 Tue Nov 28 16:21:29 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu Nov 30 01:07:25 2006
@@ -299,7 +299,7 @@
/// MachineInstr - Representation of each machine instruction.
///
class MachineInstr {
- short Opcode; // the opcode
+ const TargetInstrDescriptor *TID; // Instruction descriptor.
unsigned short NumImplicitOps;// Number of implicit operands (which
// are determined at construction
time).
@@ -319,7 +319,7 @@
public:
/// MachineInstr ctor - This constructor creates a dummy MachineInstr with
- /// opcode 0 and no operands.
+ /// TID NULL and no operands.
MachineInstr();
/// MachineInstr ctor - This constructor create a MachineInstr and add the
@@ -337,10 +337,14 @@
const MachineBasicBlock* getParent() const { return parent; }
MachineBasicBlock* getParent() { return parent; }
+
+ /// getInstrDescriptor - Returns the target instruction descriptor of this
+ /// MachineInstr.
+ const TargetInstrDescriptor *getInstrDescriptor() const { return TID; }
/// getOpcode - Returns the opcode of this MachineInstr.
///
- const int getOpcode() const { return Opcode; }
+ const int getOpcode() const;
/// Access to explicit operands of the instruction.
///
@@ -500,9 +504,10 @@
// Accessors used to modify instructions in place.
//
- /// setOpcode - Replace the opcode of the current instruction with a new one.
+ /// setInstrDescriptor - Replace the instruction descriptor (thus opcode) of
+ /// the current instruction with a new one.
///
- void setOpcode(unsigned Op) { Opcode = Op; }
+ void setInstrDescriptor(const TargetInstrDescriptor &tid) { TID = &tid; }
/// RemoveOperand - Erase an operand from an instruction, leaving it with
one
/// fewer operand than it started with.
@@ -525,7 +530,7 @@
/// addImplicitDefUseOperands - Add all implicit def and use operands to
/// this instruction.
- void addImplicitDefUseOperands(const TargetInstrDescriptor &TID);
+ void addImplicitDefUseOperands();
};
//===--===//
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.200 -> 1.201
MachineInstrBuilder.h updated: 1.40 -> 1.41
---
Log message:
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.
---
Diffs of the changes: (+30 -38)
MachineInstr.h| 16 +++
MachineInstrBuilder.h | 52 +-
2 files changed, 30 insertions(+), 38 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.200
llvm/include/llvm/CodeGen/MachineInstr.h:1.201
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.200 Mon Nov 20 11:57:22 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hMon Nov 27 17:33:29 2006
@@ -27,7 +27,6 @@
class Value;
class Function;
class MachineBasicBlock;
-class TargetInstrInfo;
class TargetInstrDescriptor;
class TargetMachine;
class GlobalValue;
@@ -296,7 +295,7 @@
///
class MachineInstr {
short Opcode; // the opcode
- short NumImplicitOps; // Number of implicit operands (which
+ unsigned short NumImplicitOps;// Number of implicit operands (which
// are determined at construction
time).
std::vector Operands; // the operands
@@ -314,19 +313,20 @@
friend struct ilist_traits;
public:
- /// MachineInstr ctor - This constructor reserves space for numOperand
- /// operands.
- MachineInstr(short Opcode, unsigned numOperands);
+ /// MachineInstr ctor - This constructor creates a dummy MachineInstr with
+ /// opcode 0 and no operands.
+ MachineInstr();
/// MachineInstr ctor - This constructor create a MachineInstr and add the
- /// implicit operands. It reserves space for numOperand operands.
- MachineInstr(const TargetInstrInfo &TII, short Opcode, unsigned numOperands);
+ /// implicit operands. It reserves space for number of operands specified by
+ /// TargetInstrDescriptor.
+ MachineInstr(const TargetInstrDescriptor &TID);
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
/// block.
///
- MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
+ MachineInstr(MachineBasicBlock *MBB, const TargetInstrDescriptor &TID);
~MachineInstr();
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.40
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.41
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.40Mon Nov 13
17:32:33 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Mon Nov 27 17:33:29 2006
@@ -19,10 +19,11 @@
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/Target/TargetMachine.h"
namespace llvm {
+class TargetInstrDescriptor;
+
class MachineInstrBuilder {
MachineInstr *MI;
public:
@@ -83,36 +84,29 @@
};
/// BuildMI - Builder interface. Specify how to create the initial instruction
-/// itself. NumOperands is the number of operands to the machine instruction
to
-/// allow for memory efficient representation of machine instructions.
+/// itself.
///
-inline MachineInstrBuilder BuildMI(const TargetInstrInfo &TII, int Opcode,
- unsigned NumOperands) {
- return MachineInstrBuilder(new MachineInstr(TII, Opcode, NumOperands));
+inline MachineInstrBuilder BuildMI(const TargetInstrDescriptor &TID) {
+ return MachineInstrBuilder(new MachineInstr(TID));
}
/// BuildMI - This version of the builder sets up the first operand as a
-/// destination virtual register. NumOperands is the number of additional add*
-/// calls that are expected, not including the destination register.
+/// destination virtual register.
///
-inline MachineInstrBuilder BuildMI(const TargetInstrInfo &TII, int Opcode,
-unsigned NumOperands, unsigned DestReg) {
- return MachineInstrBuilder(new MachineInstr(TII, Opcode, NumOperands+1))
- .addReg(DestReg, true);
+ inline MachineInstrBuilder BuildMI(const TargetInstrDescriptor &TID,
+ unsigned DestReg) {
+ return MachineInstrBuilder(new MachineInstr(TID)).addReg(DestReg, true);
}
/// BuildMI - This version of the builder inserts the newly-built
/// instruction before the given position in the given MachineBasicBlock, and
/// sets up the first operand as a destination virtual register.
-/// NumOperands is the number of additional add* calls that are expected,
-/// not including the destination register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
- int Opcode, unsigned NumOperands,
+ const TargetInstrDescrip
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.197 -> 1.198
---
Log message:
ChangeToRegister should clear IsImp bit.
---
Diffs of the changes: (+4 -4)
MachineInstr.h |8
1 files changed, 4 insertions(+), 4 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.197
llvm/include/llvm/CodeGen/MachineInstr.h:1.198
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.197 Wed Nov 15 14:48:17 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed Nov 15 17:55:03 2006
@@ -275,13 +275,13 @@
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
- void ChangeToRegister(unsigned Reg, bool isDef,
-bool isKill = false, bool isDead = false) {
+ void ChangeToRegister(unsigned Reg, bool isDef) {
opType = MO_Register;
contents.RegNo = Reg;
IsDef = isDef;
-IsKill = isKill;
-IsDead = isDead;
+IsImp = false;
+IsKill = false;
+IsDead = false;
}
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.196 -> 1.197
---
Log message:
Add copyKillDeadInfo to copy kill / dead info; other minor updates.
---
Diffs of the changes: (+28 -8)
MachineInstr.h | 36
1 files changed, 28 insertions(+), 8 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.196
llvm/include/llvm/CodeGen/MachineInstr.h:1.197
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.196 Mon Nov 13 17:30:45 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed Nov 15 14:48:17 2006
@@ -206,19 +206,19 @@
return IsDead;
}
void setIsKill() {
-assert(isRegister() && "Wrong MachineOperand accessor");
+assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
IsKill = true;
}
void setIsDead() {
-assert(isRegister() && "Wrong MachineOperand accessor");
+assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
IsDead = true;
}
void unsetIsKill() {
-assert(isRegister() && "Wrong MachineOperand accessor");
+assert(isRegister() && !IsDef && "Wrong MachineOperand accessor");
IsKill = false;
}
void unsetIsDead() {
-assert(isRegister() && "Wrong MachineOperand accessor");
+assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
IsDead = false;
}
@@ -261,7 +261,7 @@
}
/// isIdenticalTo - Return true if this operand is identical to the specified
- /// operand.
+ /// operand. Note: This method ignores isKill and isDead properties.
bool isIdenticalTo(const MachineOperand &Other) const;
/// ChangeToImmediate - Replace this operand with a new immediate operand of
@@ -295,13 +295,13 @@
///
class MachineInstr {
short Opcode; // the opcode
+ short NumImplicitOps; // Number of implicit operands (which
+// are determined at construction
time).
+
std::vector Operands; // the operands
MachineInstr* prev, *next;// links for our intrusive list
MachineBasicBlock* parent;// pointer to the owning basic block
- unsigned NumImplicitOps; // Number of implicit operands (which
-// are determined at construction
time).
-
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
@@ -376,6 +376,26 @@
delete removeFromParent();
}
+ /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
+ ///
+ void copyKillDeadInfo(const MachineInstr *MI) {
+for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = MI->getOperand(i);
+ if (MO.isReg() && (MO.isKill() || MO.isDead())) {
+for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
+ MachineOperand &MOp = getOperand(j);
+ if (MOp.isIdenticalTo(MO)) {
+if (MO.isKill())
+ MOp.setIsKill();
+else
+ MOp.setIsDead();
+break;
+ }
+}
+ }
+}
+ }
+
//
// Debugging support
//
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.195 -> 1.196
---
Log message:
- Let MachineInstr ctors add implicit def and use operands. Other operands
will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
---
Diffs of the changes: (+65 -10)
MachineInstr.h | 75 +
1 files changed, 65 insertions(+), 10 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.195
llvm/include/llvm/CodeGen/MachineInstr.h:1.196
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.195 Sat Nov 11 04:19:03 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hMon Nov 13 17:30:45 2006
@@ -26,6 +26,8 @@
class Value;
class Function;
class MachineBasicBlock;
+class TargetInstrInfo;
+class TargetInstrDescriptor;
class TargetMachine;
class GlobalValue;
@@ -61,6 +63,12 @@
MachineOperandType opType:8; // Discriminate the union.
bool IsDef : 1; // True if this is a def, false if this is a
use.
bool IsImp : 1; // True if this is an implicit def or use.
+
+ bool IsKill : 1; // True if this is a reg use and the reg is dead
+ // immediately after the read.
+ bool IsDead : 1; // True if this is a reg def and the reg is dead
+ // immediately after the write. i.e. A register
+ // that is defined but never used.
/// offset - Offset to address of global or external, only valid for
/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
@@ -80,6 +88,8 @@
Op.contents.immedVal = Val;
Op.IsDef = false;
Op.IsImp = false;
+Op.IsKill = false;
+Op.IsDead = false;
Op.offset = 0;
return Op;
}
@@ -88,6 +98,8 @@
contents = MO.contents;
IsDef= MO.IsDef;
IsImp= MO.IsImp;
+IsKill = MO.IsKill;
+IsDead = MO.IsDead;
opType = MO.opType;
offset = MO.offset;
return *this;
@@ -185,6 +197,31 @@
IsImp = true;
}
+ bool isKill() const {
+assert(isRegister() && "Wrong MachineOperand accessor");
+return IsKill;
+ }
+ bool isDead() const {
+assert(isRegister() && "Wrong MachineOperand accessor");
+return IsDead;
+ }
+ void setIsKill() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsKill = true;
+ }
+ void setIsDead() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsDead = true;
+ }
+ void unsetIsKill() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsKill = false;
+ }
+ void unsetIsDead() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsDead = false;
+ }
+
/// getReg - Returns the register number.
///
unsigned getReg() const {
@@ -238,10 +275,13 @@
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
- void ChangeToRegister(unsigned Reg, bool isDef) {
+ void ChangeToRegister(unsigned Reg, bool isDef,
+bool isKill = false, bool isDead = false) {
opType = MO_Register;
contents.RegNo = Reg;
IsDef = isDef;
+IsKill = isKill;
+IsDead = isDead;
}
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
@@ -259,6 +299,9 @@
MachineInstr* prev, *next;// links for our intrusive list
MachineBasicBlock* parent;// pointer to the owning basic block
+ unsigned NumImplicitOps; // Number of implicit operands (which
+// are determined at construction
time).
+
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
@@ -270,10 +313,14 @@
friend struct ilist_traits;
public:
- /// MachineInstr ctor - This constructor reserve's space for numOperand
+ /// MachineInstr ctor - This constructor reserves space for numOperand
/// operands.
MachineInstr(short Opcode, unsigned numOperands);
+ /// MachineInstr ctor - This constructor create a MachineInstr and add the
+ /// implicit operands. It reserves space for numOperand operands.
+ MachineInstr(const TargetInstrInfo &TII, short Opcode, unsigned numOperands);
+
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
/// block.
@@ -342,11 +389,14 @@
/// addRegOperand - Add a register operand.
///
- void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false) {
+ void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false,
+
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.194 -> 1.195
MachineInstrBuilder.h updated: 1.38 -> 1.39
---
Log message:
Add methods to add implicit def use operands to a MI.
---
Diffs of the changes: (+9 -0)
MachineInstr.h|4
MachineInstrBuilder.h |5 +
2 files changed, 9 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.194
llvm/include/llvm/CodeGen/MachineInstr.h:1.195
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.194 Fri Nov 10 08:44:12 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hSat Nov 11 04:19:03 2006
@@ -413,6 +413,10 @@
Op.offset = 0;
}
+ /// addImplicitDefUseOperands - Add all implicit def and use operands to
+ /// this instruction.
+ void addImplicitDefUseOperands();
+
//======//
// Accessors used to modify instructions in place.
//
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.38
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.39
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.38Fri Nov 10
02:32:14 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Sat Nov 11 04:19:03 2006
@@ -77,6 +77,11 @@
MI->addExternalSymbolOperand(FnName);
return *this;
}
+
+ const MachineInstrBuilder &addImplicitDefsUses() const {
+MI->addImplicitDefUseOperands();
+return *this;
+ }
};
/// BuildMI - Builder interface. Specify how to create the initial instruction
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.193 -> 1.194
---
Log message:
Shut up the warning.
---
Diffs of the changes: (+1 -1)
MachineInstr.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.193
llvm/include/llvm/CodeGen/MachineInstr.h:1.194
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.193 Fri Nov 10 02:32:14 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hFri Nov 10 08:44:12 2006
@@ -180,7 +180,7 @@
assert(isRegister() && "Wrong MachineOperand accessor");
return IsImp;
}
- bool setImplicit() {
+ void setImplicit() {
assert(isRegister() && "Wrong MachineOperand accessor");
IsImp = true;
}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.192 -> 1.193
MachineInstrBuilder.h updated: 1.37 -> 1.38
---
Log message:
Add implicit def / use operands to MachineInstr.
---
Diffs of the changes: (+20 -6)
MachineInstr.h| 21 +
MachineInstrBuilder.h |5 +++--
2 files changed, 20 insertions(+), 6 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.192
llvm/include/llvm/CodeGen/MachineInstr.h:1.193
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.192 Sat Oct 28 13:18:36 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hFri Nov 10 02:32:14 2006
@@ -60,6 +60,7 @@
MachineOperandType opType:8; // Discriminate the union.
bool IsDef : 1; // True if this is a def, false if this is a
use.
+ bool IsImp : 1; // True if this is an implicit def or use.
/// offset - Offset to address of global or external, only valid for
/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
@@ -78,6 +79,7 @@
Op.opType = MachineOperand::MO_Immediate;
Op.contents.immedVal = Val;
Op.IsDef = false;
+Op.IsImp = false;
Op.offset = 0;
return Op;
}
@@ -85,6 +87,7 @@
const MachineOperand &operator=(const MachineOperand &MO) {
contents = MO.contents;
IsDef= MO.IsDef;
+IsImp= MO.IsImp;
opType = MO.opType;
offset = MO.offset;
return *this;
@@ -173,6 +176,15 @@
IsDef = true;
}
+ bool isImplicit() const {
+assert(isRegister() && "Wrong MachineOperand accessor");
+return IsImp;
+ }
+ bool setImplicit() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsImp = true;
+ }
+
/// getReg - Returns the register number.
///
unsigned getReg() const {
@@ -330,10 +342,11 @@
/// addRegOperand - Add a register operand.
///
- void addRegOperand(unsigned Reg, bool IsDef) {
-MachineOperand &Op = AddNewOperand();
+ void addRegOperand(unsigned Reg, bool IsDef, bool IsImp = false) {
+MachineOperand &Op = AddNewOperand(IsImp);
Op.opType = MachineOperand::MO_Register;
Op.IsDef = IsDef;
+Op.IsImp = IsImp;
Op.contents.RegNo = Reg;
Op.offset = 0;
}
@@ -415,8 +428,8 @@
Operands.erase(Operands.begin()+i);
}
private:
- MachineOperand &AddNewOperand() {
-assert(!OperandsComplete() &&
+ MachineOperand &AddNewOperand(bool IsImp = false) {
+assert((IsImp || !OperandsComplete()) &&
"Trying to add an operand to a machine instr that is already
done!");
Operands.push_back(MachineOperand());
return Operands.back();
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.37
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.38
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.37Mon Sep 4
21:31:13 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Fri Nov 10 02:32:14 2006
@@ -33,8 +33,9 @@
/// addReg - Add a new virtual register operand...
///
- const MachineInstrBuilder &addReg(int RegNo, bool isDef = false) const {
-MI->addRegOperand(RegNo, isDef);
+ const MachineInstrBuilder &addReg(int RegNo, bool isDef = false,
+bool isImp = false) const {
+MI->addRegOperand(RegNo, isDef, isImp);
return *this;
}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.191 -> 1.192
---
Log message:
add a method for hacking on JTIdx's
---
Diffs of the changes: (+4 -0)
MachineInstr.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.191
llvm/include/llvm/CodeGen/MachineInstr.h:1.192
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.191 Fri Oct 20 17:44:45 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hSat Oct 28 13:18:36 2006
@@ -206,6 +206,10 @@
assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
contents.immedVal = Idx;
}
+ void setJumpTableIndex(unsigned Idx) {
+assert(isJumpTableIndex() && "Wrong MachineOperand accessor");
+contents.immedVal = Idx;
+ }
/// isIdenticalTo - Return true if this operand is identical to the specified
/// operand.
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.190 -> 1.191
---
Log message:
typo
---
Diffs of the changes: (+1 -1)
MachineInstr.h |2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.190
llvm/include/llvm/CodeGen/MachineInstr.h:1.191
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.190 Fri Oct 20 17:39:36 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hFri Oct 20 17:44:45 2006
@@ -291,7 +291,7 @@
/// opcode and same operands as) the specified instruction.
bool isIdenticalTo(const MachineInstr *Other) const {
if (Other->getOpcode() != getOpcode() ||
-getNumOperands() != getNumOperands())
+Other->getNumOperands() != getNumOperands())
return false;
for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.189 -> 1.190
---
Log message:
add isIdenticalTo method to machineinstr/operand.
---
Diffs of the changes: (+19 -0)
MachineInstr.h | 19 +++
1 files changed, 19 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.189
llvm/include/llvm/CodeGen/MachineInstr.h:1.190
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.189 Fri Oct 20 13:00:03 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hFri Oct 20 17:39:36 2006
@@ -118,6 +118,10 @@
assert(isImm() && "Wrong MachineOperand accessor");
return contents.immedVal;
}
+ MachineBasicBlock *getMBB() const {
+assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
+return contents.MBB;
+ }
MachineBasicBlock *getMachineBasicBlock() const {
assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
return contents.MBB;
@@ -203,6 +207,9 @@
contents.immedVal = Idx;
}
+ /// isIdenticalTo - Return true if this operand is identical to the specified
+ /// operand.
+ bool isIdenticalTo(const MachineOperand &Other) const;
/// ChangeToImmediate - Replace this operand with a new immediate operand of
/// the specified value. If an operand is known to be an immediate already,
@@ -279,6 +286,18 @@
return Operands[i];
}
+
+ /// isIdenticalTo - Return true if this instruction is identical to (same
+ /// opcode and same operands as) the specified instruction.
+ bool isIdenticalTo(const MachineInstr *Other) const {
+if (Other->getOpcode() != getOpcode() ||
+getNumOperands() != getNumOperands())
+ return false;
+for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
+ if (!getOperand(i).isIdenticalTo(Other->getOperand(i)))
+return false;
+return true;
+ }
/// clone - Create a copy of 'this' instruction that is identical in
/// all ways except the the instruction has no parent, prev, or next.
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.188 -> 1.189
---
Log message:
add method
---
Diffs of the changes: (+11 -2)
MachineInstr.h | 13 +++--
1 files changed, 11 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.188
llvm/include/llvm/CodeGen/MachineInstr.h:1.189
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.188 Thu Oct 5 20:16:29 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hFri Oct 20 13:00:03 2006
@@ -70,9 +70,18 @@
MachineOperand(const MachineOperand &M) {
*this = M;
}
-
+
~MachineOperand() {}
-
+
+ static MachineOperand CreateImm(int64_t Val) {
+MachineOperand Op;
+Op.opType = MachineOperand::MO_Immediate;
+Op.contents.immedVal = Val;
+Op.IsDef = false;
+Op.offset = 0;
+return Op;
+ }
+
const MachineOperand &operator=(const MachineOperand &MO) {
contents = MO.contents;
IsDef= MO.IsDef;
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.187 -> 1.188
---
Log message:
add an accessor
---
Diffs of the changes: (+5 -0)
MachineInstr.h |5 +
1 files changed, 5 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.187
llvm/include/llvm/CodeGen/MachineInstr.h:1.188
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.187 Tue Sep 5 15:20:04 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu Oct 5 20:16:29 2006
@@ -189,6 +189,11 @@
"Wrong MachineOperand accessor");
offset = Offset;
}
+ void setConstantPoolIndex(unsigned Idx) {
+assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
+contents.immedVal = Idx;
+ }
+
/// ChangeToImmediate - Replace this operand with a new immediate operand of
/// the specified value. If an operand is known to be an immediate already,
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.186 -> 1.187
---
Log message:
IsDef can only be accessed / set if operand is a register.
---
Diffs of the changes: (+16 -11)
MachineInstr.h | 27 ---
1 files changed, 16 insertions(+), 11 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.186
llvm/include/llvm/CodeGen/MachineInstr.h:1.187
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.186 Tue Sep 5 13:56:02 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hTue Sep 5 15:20:04 2006
@@ -143,10 +143,22 @@
return contents.SymbolName;
}
- bool isUse() const { return !IsDef; }
- bool isDef() const { return IsDef; }
- void setIsUse() { IsDef = false; }
- void setIsDef() { IsDef = true; }
+ bool isUse() const {
+assert(isRegister() && "Wrong MachineOperand accessor");
+return !IsDef;
+ }
+ bool isDef() const {
+assert(isRegister() && "Wrong MachineOperand accessor");
+return IsDef;
+ }
+ void setIsUse() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsDef = false;
+ }
+ void setIsDef() {
+assert(isRegister() && "Wrong MachineOperand accessor");
+IsDef = true;
+ }
/// getReg - Returns the register number.
///
@@ -295,7 +307,6 @@
void addImmOperand(int64_t Val) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Immediate;
-Op.IsDef = false;
Op.contents.immedVal = Val;
Op.offset = 0;
}
@@ -303,7 +314,6 @@
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_MachineBasicBlock;
-Op.IsDef = false;
Op.contents.MBB = MBB;
Op.offset = 0;
}
@@ -313,7 +323,6 @@
void addFrameIndexOperand(unsigned Idx) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_FrameIndex;
-Op.IsDef = false;
Op.contents.immedVal = Idx;
Op.offset = 0;
}
@@ -324,7 +333,6 @@
void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ConstantPoolIndex;
-Op.IsDef = false;
Op.contents.immedVal = Idx;
Op.offset = Offset;
}
@@ -335,7 +343,6 @@
void addJumpTableIndexOperand(unsigned Idx) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_JumpTableIndex;
-Op.IsDef = false;
Op.contents.immedVal = Idx;
Op.offset = 0;
}
@@ -343,7 +350,6 @@
void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_GlobalAddress;
-Op.IsDef = false;
Op.contents.GV = GV;
Op.offset = Offset;
}
@@ -353,7 +359,6 @@
void addExternalSymbolOperand(const char *SymName) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ExternalSymbol;
-Op.IsDef = false;
Op.contents.SymbolName = SymName;
Op.offset = 0;
}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.185 -> 1.186
---
Log message:
Initialize IsDef of all non-register MachineOperand to false.
---
Diffs of the changes: (+7 -0)
MachineInstr.h |7 +++
1 files changed, 7 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.185
llvm/include/llvm/CodeGen/MachineInstr.h:1.186
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.185 Mon Sep 4 21:31:13 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hTue Sep 5 13:56:02 2006
@@ -295,6 +295,7 @@
void addImmOperand(int64_t Val) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Immediate;
+Op.IsDef = false;
Op.contents.immedVal = Val;
Op.offset = 0;
}
@@ -302,6 +303,7 @@
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_MachineBasicBlock;
+Op.IsDef = false;
Op.contents.MBB = MBB;
Op.offset = 0;
}
@@ -311,6 +313,7 @@
void addFrameIndexOperand(unsigned Idx) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_FrameIndex;
+Op.IsDef = false;
Op.contents.immedVal = Idx;
Op.offset = 0;
}
@@ -321,6 +324,7 @@
void addConstantPoolIndexOperand(unsigned Idx, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ConstantPoolIndex;
+Op.IsDef = false;
Op.contents.immedVal = Idx;
Op.offset = Offset;
}
@@ -331,6 +335,7 @@
void addJumpTableIndexOperand(unsigned Idx) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_JumpTableIndex;
+Op.IsDef = false;
Op.contents.immedVal = Idx;
Op.offset = 0;
}
@@ -338,6 +343,7 @@
void addGlobalAddressOperand(GlobalValue *GV, int Offset) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_GlobalAddress;
+Op.IsDef = false;
Op.contents.GV = GV;
Op.offset = Offset;
}
@@ -347,6 +353,7 @@
void addExternalSymbolOperand(const char *SymName) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_ExternalSymbol;
+Op.IsDef = false;
Op.contents.SymbolName = SymName;
Op.offset = 0;
}
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.184 -> 1.185
MachineInstrBuilder.h updated: 1.36 -> 1.37
---
Log message:
Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.
---
Diffs of the changes: (+17 -55)
MachineInstr.h| 56 +-
MachineInstrBuilder.h | 16 +-
2 files changed, 17 insertions(+), 55 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.184
llvm/include/llvm/CodeGen/MachineInstr.h:1.185
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.184 Mon Sep 4 18:35:22 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hMon Sep 4 21:31:13 2006
@@ -38,26 +38,6 @@
// Representation of each machine instruction operand.
//
struct MachineOperand {
-private:
- // Bit fields of the flags variable used for different operand properties
- enum {
-DEFFLAG = 0x01, // this is a def of the operand
-USEFLAG = 0x02// this is a use of the operand
- };
-
-public:
- // UseType - This enum describes how the machine operand is used by
- // the instruction. Note that the MachineInstr/Operator class
- // currently uses bool arguments to represent this information
- // instead of an enum. Eventually this should change over to use
- // this _easier to read_ representation instead.
- //
- enum UseType {
-Use = USEFLAG,/// only read
-Def = DEFFLAG,/// only written
-UseAndDef = Use | Def /// read AND written
- };
-
enum MachineOperandType {
MO_Register,// Register operand.
MO_Immediate, // Immediate Operand
@@ -78,8 +58,8 @@
int64_t immedVal; // For MO_Immediate and MO_*Index.
} contents;
- char flags; // see bit field definitions above
- MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
+ MachineOperandType opType:8; // Discriminate the union.
+ bool IsDef : 1; // True if this is a def, false if this is a
use.
/// offset - Offset to address of global or external, only valid for
/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
@@ -95,7 +75,7 @@
const MachineOperand &operator=(const MachineOperand &MO) {
contents = MO.contents;
-flags= MO.flags;
+IsDef= MO.IsDef;
opType = MO.opType;
offset = MO.offset;
return *this;
@@ -105,10 +85,6 @@
///
MachineOperandType getType() const { return opType; }
- /// getUseType - Returns the MachineOperandUseType of this operand.
- ///
- UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
-
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
bool isReg() const { return opType == MO_Register; }
@@ -167,13 +143,10 @@
return contents.SymbolName;
}
- /// MachineOperand methods for testing that work on any kind of
- /// MachineOperand...
- ///
- bool isUse() const { return flags & USEFLAG; }
- bool isDef() const { return flags & DEFFLAG; }
- MachineOperand &setUse() { flags |= USEFLAG; return *this; }
- MachineOperand &setDef() { flags |= DEFFLAG; return *this; }
+ bool isUse() const { return !IsDef; }
+ bool isDef() const { return IsDef; }
+ void setIsUse() { IsDef = false; }
+ void setIsDef() { IsDef = true; }
/// getReg - Returns the register number.
///
@@ -216,9 +189,10 @@
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
- void ChangeToRegister(unsigned Reg) {
+ void ChangeToRegister(unsigned Reg, bool isDef) {
opType = MO_Register;
contents.RegNo = Reg;
+IsDef = isDef;
}
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
@@ -307,11 +281,10 @@
/// addRegOperand - Add a register operand.
///
- void addRegOperand(unsigned Reg,
- MachineOperand::UseType UTy = MachineOperand::Use) {
+ void addRegOperand(unsigned Reg, bool IsDef) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Register;
-Op.flags = UTy;
+Op.IsDef = IsDef;
Op.contents.RegNo = Reg;
Op.offset = 0;
}
@@ -322,7 +295,6 @@
void addImmOperand(int64_t Val) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_Immediate;
-Op.flags = 0;
Op.contents.immedVal = Val;
Op.offset = 0;
}
@@ -330,7 +302,6 @@
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
MachineOperand &Op = AddNewOperand();
Op.opType = MachineOperand::MO_MachineBasicBlock;
-Op.flags = 0;
Op.contents.MBB = MBB;
Op.offset = 0;
}
@@ -340,7 +311,6 @@
void addFrameIndexOperand(unsigned Idx) {
MachineOperand &Op = AddNewOperand();
Op.op
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.183 -> 1.184
---
Log message:
ADd getImm/setImm methods
---
Diffs of the changes: (+15 -6)
MachineInstr.h | 21 +++--
1 files changed, 15 insertions(+), 6 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.183
llvm/include/llvm/CodeGen/MachineInstr.h:1.184
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.183 Mon Sep 4 18:05:29 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hMon Sep 4 18:35:22 2006
@@ -124,8 +124,13 @@
bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
+ int64_t getImm() const {
+assert(isImm() && "Wrong MachineOperand accessor");
+return contents.immedVal;
+ }
+
int64_t getImmedValue() const {
-assert(isImmediate() && "Wrong MachineOperand accessor");
+assert(isImm() && "Wrong MachineOperand accessor");
return contents.immedVal;
}
MachineBasicBlock *getMachineBasicBlock() const {
@@ -165,10 +170,10 @@
/// MachineOperand methods for testing that work on any kind of
/// MachineOperand...
///
- boolisUse () const { return flags & USEFLAG; }
- MachineOperand& setUse () { flags |= USEFLAG; return *this; }
- boolisDef () const { return flags & DEFFLAG; }
- MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
+ bool isUse() const { return flags & USEFLAG; }
+ bool isDef() const { return flags & DEFFLAG; }
+ MachineOperand &setUse() { flags |= USEFLAG; return *this; }
+ MachineOperand &setDef() { flags |= DEFFLAG; return *this; }
/// getReg - Returns the register number.
///
@@ -185,7 +190,11 @@
}
void setImmedValue(int64_t immVal) {
-assert(isImmediate() && "Wrong MachineOperand mutator");
+assert(isImm() && "Wrong MachineOperand mutator");
+contents.immedVal = immVal;
+ }
+ void setImm(int64_t immVal) {
+assert(isImm() && "Wrong MachineOperand mutator");
contents.immedVal = immVal;
}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.182 -> 1.183
---
Log message:
Add some short-hand accessors
---
Diffs of the changes: (+4 -0)
MachineInstr.h |4
1 files changed, 4 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.182
llvm/include/llvm/CodeGen/MachineInstr.h:1.183
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.182 Wed May 24 12:04:03 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hMon Sep 4 18:05:29 2006
@@ -111,6 +111,10 @@
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
+ bool isReg() const { return opType == MO_Register; }
+ bool isImm() const { return opType == MO_Immediate; }
+ bool isMBB() const { return opType == MO_MachineBasicBlock; }
+
bool isRegister() const { return opType == MO_Register; }
bool isImmediate() const { return opType == MO_Immediate; }
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h ScheduleDAG.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.181 -> 1.182
ScheduleDAG.h updated: 1.26 -> 1.27
---
Log message:
Patches to make the LLVM sources more -pedantic clean. Patch provided
by Anton Korobeynikov! This is a step towards closing PR786:
http://llvm.cs.uiuc.edu/PR786 .
---
Diffs of the changes: (+2 -2)
MachineInstr.h |2 +-
ScheduleDAG.h |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.181
llvm/include/llvm/CodeGen/MachineInstr.h:1.182
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.181 Thu May 4 14:36:09 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 24 12:04:03 2006
@@ -42,7 +42,7 @@
// Bit fields of the flags variable used for different operand properties
enum {
DEFFLAG = 0x01, // this is a def of the operand
-USEFLAG = 0x02, // this is a use of the operand
+USEFLAG = 0x02// this is a use of the operand
};
public:
Index: llvm/include/llvm/CodeGen/ScheduleDAG.h
diff -u llvm/include/llvm/CodeGen/ScheduleDAG.h:1.26
llvm/include/llvm/CodeGen/ScheduleDAG.h:1.27
--- llvm/include/llvm/CodeGen/ScheduleDAG.h:1.26Sat May 13 00:53:16 2006
+++ llvm/include/llvm/CodeGen/ScheduleDAG.h Wed May 24 12:04:03 2006
@@ -41,7 +41,7 @@
enum HazardType {
NoHazard, // This instruction can be emitted at this cycle.
Hazard,// This instruction can't be emitted at this cycle.
- NoopHazard,// This instruction can't be emitted, and needs noops.
+ NoopHazard // This instruction can't be emitted, and needs noops.
};
/// getHazardType - Return the hazard type of emitting this node. There
are
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.180 -> 1.181
---
Log message:
Final pass of minor cleanups for MachineInstr
---
Diffs of the changes: (+5 -5)
MachineInstr.h | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.180
llvm/include/llvm/CodeGen/MachineInstr.h:1.181
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.180 Thu May 4 14:14:44 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 14:36:09 2006
@@ -71,11 +71,11 @@
private:
union {
-GlobalValue *GV;// LLVM global for MO_GlobalAddress.
-int64_t immedVal; // Constant value for an explicit constant
-MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
-const char *SymbolName; // For MO_ExternalSymbol type
-unsigned RegNo;// For MO_Register number for an explicit
register
+GlobalValue *GV; // For MO_GlobalAddress.
+MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
+const char *SymbolName; // For MO_ExternalSymbol.
+unsigned RegNo; // For MO_Register.
+int64_t immedVal; // For MO_Immediate and MO_*Index.
} contents;
char flags; // see bit field definitions above
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.179 -> 1.180
---
Log message:
Remove redundancy and a level of indirection when creating machine operands
---
Diffs of the changes: (+59 -68)
MachineInstr.h | 127 ++---
1 files changed, 59 insertions(+), 68 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.179
llvm/include/llvm/CodeGen/MachineInstr.h:1.180
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.179 Thu May 4 13:25:20 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 14:14:44 2006
@@ -85,40 +85,7 @@
/// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
int offset;
- MachineOperand(int64_t ImmVal) : flags(0), opType(MO_Immediate) {
-contents.immedVal = ImmVal;
-offset = 0;
- }
-
- MachineOperand(unsigned Idx, MachineOperandType OpTy): flags(0),
opType(OpTy){
-contents.immedVal = Idx;
-offset = 0;
- }
-
- MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
-: flags(UseTy), opType(OpTy) {
-contents.RegNo = Reg;
-offset = 0;
- }
-
- MachineOperand(GlobalValue *V, int Offset = 0)
-: flags(MachineOperand::Use), opType(MachineOperand::MO_GlobalAddress) {
-contents.GV = V;
-offset = Offset;
- }
-
- MachineOperand(MachineBasicBlock *mbb)
-: flags(0), opType(MO_MachineBasicBlock) {
-contents.MBB = mbb;
-offset = 0;
- }
-
- MachineOperand(const char *SymName, int Offset)
-: flags(0), opType(MO_ExternalSymbol) {
-contents.SymbolName = SymName;
-offset = Offset;
- }
-
+ MachineOperand() {}
public:
MachineOperand(const MachineOperand &M) {
*this = M;
@@ -252,7 +219,7 @@
///
class MachineInstr {
short Opcode; // the opcode
- std::vector operands; // the operands
+ std::vector Operands; // the operands
MachineInstr* prev, *next;// links for our intrusive list
MachineBasicBlock* parent;// pointer to the owning basic block
@@ -288,21 +255,21 @@
/// Access to explicit operands of the instruction.
///
- unsigned getNumOperands() const { return operands.size(); }
+ unsigned getNumOperands() const { return Operands.size(); }
const MachineOperand& getOperand(unsigned i) const {
assert(i < getNumOperands() && "getOperand() out of range!");
-return operands[i];
+return Operands[i];
}
MachineOperand& getOperand(unsigned i) {
assert(i < getNumOperands() && "getOperand() out of range!");
-return operands[i];
+return Operands[i];
}
/// clone - Create a copy of 'this' instruction that is identical in
/// all ways except the the instruction has no parent, prev, or next.
- MachineInstr* clone() const;
+ MachineInstr* clone() const { return new MachineInstr(*this); }
/// removeFromParent - This method unlinks 'this' from the containing basic
/// block, and returns it, but does not delete it.
@@ -322,70 +289,87 @@
friend std::ostream& operator<<(std::ostream& os, const MachineInstr&
minstr);
//======//
- // Accessors to add operands when building up machine instructions
+ // Accessors to add operands when building up machine instructions.
//
- /// addRegOperand - Add a symbolic virtual register reference...
+ /// addRegOperand - Add a register operand.
///
- void addRegOperand(int reg,
+ void addRegOperand(unsigned Reg,
MachineOperand::UseType UTy = MachineOperand::Use) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(reg, MachineOperand::MO_Register, UTy));
+MachineOperand &Op = AddNewOperand();
+Op.opType = MachineOperand::MO_Register;
+Op.flags = UTy;
+Op.contents.RegNo = Reg;
+Op.offset = 0;
}
/// addImmOperand - Add a zero extended constant argument to the
/// machine instruction.
///
void addImmOperand(int64_t Val) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(Val));
+MachineOperand &Op = AddNewOperand();
+Op.opType = MachineOperand::MO_Immediate;
+Op.flags = 0;
+Op.contents.immedVal = Val;
+Op.offset = 0;
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(MBB));
+MachineOperand &Op = AddNewOperand();
+Op.opType = MachineOperand::MO_MachineBasicBlock;
+Op.flags = 0;
+Op.contents.MBB = MBB;
+Op.offset = 0;
}
/// addFrameIndexOperand - Add an abstract frame index to the instruction
///
void addFrameIndexOperand(uns
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.178 -> 1.179
---
Log message:
Move register numbers out of "extra" into "contents". Other minor cleanup.
---
Diffs of the changes: (+21 -34)
MachineInstr.h | 55 +--
1 files changed, 21 insertions(+), 34 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.178
llvm/include/llvm/CodeGen/MachineInstr.h:1.179
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.178 Thu May 4 13:16:01 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 13:25:20 2006
@@ -32,8 +32,6 @@
template struct ilist_traits;
template struct ilist;
-typedef short MachineOpCode;
-
//===--===//
// class MachineOperand
//
@@ -77,64 +75,53 @@
int64_t immedVal; // Constant value for an explicit constant
MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
const char *SymbolName; // For MO_ExternalSymbol type
+unsigned RegNo;// For MO_Register number for an explicit
register
} contents;
char flags; // see bit field definitions above
MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
- union {
-int regNum; // register number for an explicit register
-int offset; // Offset to address of global or external, only
-// valid for MO_GlobalAddress, MO_ExternalSym
-// and MO_ConstantPoolIndex
- } extra;
-
- void zeroContents() {
-contents.immedVal = 0;
-extra.offset = 0;
- }
+
+ /// offset - Offset to address of global or external, only valid for
+ /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
+ int offset;
MachineOperand(int64_t ImmVal) : flags(0), opType(MO_Immediate) {
contents.immedVal = ImmVal;
-extra.offset = 0;
+offset = 0;
}
- MachineOperand(unsigned Idx, MachineOperandType OpTy)
-: flags(0), opType(OpTy) {
+ MachineOperand(unsigned Idx, MachineOperandType OpTy): flags(0),
opType(OpTy){
contents.immedVal = Idx;
-extra.offset = 0;
+offset = 0;
}
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
: flags(UseTy), opType(OpTy) {
-zeroContents();
-extra.regNum = Reg;
+contents.RegNo = Reg;
+offset = 0;
}
MachineOperand(GlobalValue *V, int Offset = 0)
: flags(MachineOperand::Use), opType(MachineOperand::MO_GlobalAddress) {
contents.GV = V;
-extra.offset = Offset;
+offset = Offset;
}
MachineOperand(MachineBasicBlock *mbb)
: flags(0), opType(MO_MachineBasicBlock) {
-zeroContents ();
contents.MBB = mbb;
+offset = 0;
}
MachineOperand(const char *SymName, int Offset)
: flags(0), opType(MO_ExternalSymbol) {
-zeroContents ();
contents.SymbolName = SymName;
-extra.offset = Offset;
+offset = Offset;
}
public:
- MachineOperand(const MachineOperand &M)
-: flags(M.flags), opType(M.opType) {
-zeroContents ();
-contents = M.contents;
-extra = M.extra;
+ MachineOperand(const MachineOperand &M) {
+*this = M;
}
~MachineOperand() {}
@@ -143,7 +130,7 @@
contents = MO.contents;
flags= MO.flags;
opType = MO.opType;
-extra= MO.extra;
+offset = MO.offset;
return *this;
}
@@ -197,7 +184,7 @@
int getOffset() const {
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex())
&&
"Wrong MachineOperand accessor");
-return extra.offset;
+return offset;
}
const char *getSymbolName() const {
assert(isExternalSymbol() && "Wrong MachineOperand accessor");
@@ -216,14 +203,14 @@
///
unsigned getReg() const {
assert(isRegister() && "This is not a register operand!");
-return extra.regNum;
+return contents.RegNo;
}
/// MachineOperand mutators.
///
void setReg(unsigned Reg) {
assert(isRegister() && "This is not a register operand!");
-extra.regNum = Reg;
+contents.RegNo = Reg;
}
void setImmedValue(int64_t immVal) {
@@ -235,7 +222,7 @@
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex() ||
isJumpTableIndex()) &&
"Wrong MachineOperand accessor");
-extra.offset = Offset;
+offset = Offset;
}
/// ChangeToImmediate - Replace this operand with a new immediate operand of
@@ -251,7 +238,7 @@
/// the setReg method should be used.
void ChangeToRegister(unsigned Reg) {
opType = MO_Register;
-extra.regNum = Reg;
+contents.RegNo = Reg;
}
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.177 -> 1.178
MachineInstrBuilder.h updated: 1.35 -> 1.36
---
Log message:
Remove and simplify some more machineinstr/machineoperand stuff.
---
Diffs of the changes: (+10 -44)
MachineInstr.h| 30 +-
MachineInstrBuilder.h | 24 +---
2 files changed, 10 insertions(+), 44 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.177
llvm/include/llvm/CodeGen/MachineInstr.h:1.178
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.177 Thu May 4 13:05:42 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 13:16:01 2006
@@ -261,23 +261,8 @@
//===--===//
-// class MachineInstr
-//
-// Purpose:
-// Representation of each machine instruction.
-//
-// MachineOpCode must be an enum, defined separately for each target.
-// E.g., It is defined in SparcInstructionSelection.h for the SPARC.
-//
-// There are 2 kinds of operands:
-//
-// (1) Explicit operands of the machine instruction in vector operands[]
-//
-// (2) "Implicit operands" are values implicitly used or defined by the
-// machine instruction, such as arguments to a CALL, return value of
-// a CALL (if any), and return value of a RETURN.
-//===--===//
-
+/// MachineInstr - Representation of each machine instruction.
+///
class MachineInstr {
short Opcode; // the opcode
std::vector operands; // the operands
@@ -287,9 +272,7 @@
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
- //Constructor used by clone() method
MachineInstr(const MachineInstr&);
-
void operator=(const MachineInstr&); // DO NOT IMPLEMENT
// Intrusive list support
@@ -297,12 +280,9 @@
friend struct ilist_traits;
public:
- /// MachineInstr ctor - This constructor only does a _reserve_ of the
- /// operands, not a resize for them. It is expected that if you use this
that
- /// you call add* methods below to fill up the operands, instead of the Set
- /// methods. Eventually, the "resizing" ctors will be phased out.
- ///
- MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
+ /// MachineInstr ctor - This constructor reserve's space for numOperand
+ /// operands.
+ MachineInstr(short Opcode, unsigned numOperands);
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.35
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.36
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.35Thu May 4
13:05:43 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Thu May 4 13:16:01 2006
@@ -47,20 +47,6 @@
return *this;
}
- /// addZImm - Add a new zero extended immediate operand...
- ///
- const MachineInstrBuilder &addZImm(unsigned Val) const {
-MI->addImmOperand(Val);
-return *this;
- }
-
- /// addImm64 - Add a new 64-bit immediate operand...
- ///
- const MachineInstrBuilder &addImm64(uint64_t Val) const {
-MI->addImmOperand(Val);
-return *this;
- }
-
const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
MI->addMachineBasicBlockOperand(MBB);
return *this;
@@ -99,7 +85,7 @@
/// allow for memory efficient representation of machine instructions.
///
inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
- return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true,
true));
+ return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands));
}
/// BuildMI - This version of the builder sets up the first operand as a
@@ -110,8 +96,8 @@
int Opcode, unsigned NumOperands,
unsigned DestReg,
MachineOperand::UseType useType = MachineOperand::Def) {
- return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
- true, true)).addReg(DestReg, useType);
+ return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1))
+ .addReg(DestReg, useType);
}
/// BuildMI - This version of the builder inserts the newly-built
@@ -124,7 +110,7 @@
MachineBasicBlock::iterator I,
int Opcode, unsigned NumOperands,
unsigned DestReg) {
- MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
+ MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1);
BB.insert(I, MI);
return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
}
@@ -136,7 +122,7 @@
inline MachineInstrBuilder BuildMI(MachineBasicBlock
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.176 -> 1.177
MachineInstrBuilder.h updated: 1.34 -> 1.35
---
Log message:
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
---
Diffs of the changes: (+19 -34)
MachineInstr.h| 45 +++--
MachineInstrBuilder.h |8
2 files changed, 19 insertions(+), 34 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.176
llvm/include/llvm/CodeGen/MachineInstr.h:1.177
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.176 Thu May 4 12:56:20 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 13:05:42 2006
@@ -61,7 +61,7 @@
};
enum MachineOperandType {
-MO_VirtualRegister, // virtual register for *value
+MO_Register,// Register operand.
MO_Immediate, // Immediate Operand
MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index
@@ -93,12 +93,17 @@
extra.offset = 0;
}
- MachineOperand(int64_t ImmVal, MachineOperandType OpTy, int Offset = 0)
-: flags(0), opType(OpTy) {
+ MachineOperand(int64_t ImmVal) : flags(0), opType(MO_Immediate) {
contents.immedVal = ImmVal;
-extra.offset = Offset;
+extra.offset = 0;
}
+ MachineOperand(unsigned Idx, MachineOperandType OpTy)
+: flags(0), opType(OpTy) {
+contents.immedVal = Idx;
+extra.offset = 0;
+ }
+
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
: flags(UseTy), opType(OpTy) {
zeroContents();
@@ -152,7 +157,7 @@
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
- bool isRegister() const { return opType == MO_VirtualRegister; }
+ bool isRegister() const { return opType == MO_Register; }
bool isImmediate() const { return opType == MO_Immediate; }
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
bool isFrameIndex() const { return opType == MO_FrameIndex; }
@@ -245,7 +250,7 @@
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
void ChangeToRegister(unsigned Reg) {
-opType = MO_VirtualRegister;
+opType = MO_Register;
extra.regNum = Reg;
}
@@ -355,41 +360,21 @@
/// addRegOperand - Add a symbolic virtual register reference...
///
- void addRegOperand(int reg, bool isDef) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(reg, MachineOperand::MO_VirtualRegister,
- isDef ? MachineOperand::Def : MachineOperand::Use));
- }
-
- /// addRegOperand - Add a symbolic virtual register reference...
- ///
void addRegOperand(int reg,
MachineOperand::UseType UTy = MachineOperand::Use) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already
done!");
operands.push_back(
- MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
+ MachineOperand(reg, MachineOperand::MO_Register, UTy));
}
- /// addZeroExtImmOperand - Add a zero extended constant argument to the
+ /// addImmOperand - Add a zero extended constant argument to the
/// machine instruction.
///
- void addZeroExtImmOperand(int intValue) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_Immediate));
- }
-
- /// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
- /// to the machine instruction.
- ///
- void addZeroExtImm64Operand(uint64_t intValue) {
+ void addImmOperand(int64_t Val) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(intValue, MachineOperand::MO_Immediate));
+operands.push_back(MachineOperand(Val));
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.34
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.35
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.34Thu May 4
12:21:19 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Thu May 4 13:05:43 2006
@@ -42,22 +42,22 @@
/// addImm - Add a new immediate operand.
///
- const MachineInstrBuilder &addImm(int Val) const {
-MI->addZeroExtImmOperand(Val);
+ const MachineInstrBuilder &addImm(int64_t Val) const {
+MI->addImmOperand(Val);
return *this;
}
/// addZImm - Add a new zero extended immediate operand...
///
const MachineInstrBuilder &addZImm(unsigned Val) co
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.175 -> 1.176
---
Log message:
remove hasAllocatedReg
---
Diffs of the changes: (+5 -18)
MachineInstr.h | 23 +--
1 files changed, 5 insertions(+), 18 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.175
llvm/include/llvm/CodeGen/MachineInstr.h:1.176
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.175 Thu May 4 12:52:22 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 12:56:20 2006
@@ -150,16 +150,11 @@
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
- /// isRegister - Return true if this operand is a register operand.
- ///
- bool isRegister() const {
-return opType == MO_VirtualRegister;
- }
-
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
- bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
+ bool isRegister() const { return opType == MO_VirtualRegister; }
bool isImmediate() const { return opType == MO_Immediate; }
+ bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
bool isFrameIndex() const { return opType == MO_FrameIndex; }
bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
@@ -212,25 +207,17 @@
boolisDef () const { return flags & DEFFLAG; }
MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
- /// hasAllocatedReg - Returns true iff a machine register has been
- /// allocated to this operand.
- ///
- bool hasAllocatedReg() const {
-return extra.regNum >= 0 && opType == MO_VirtualRegister;
- }
-
- /// getReg - Returns the register number. It is a runtime error to call this
- /// if a register is not allocated.
+ /// getReg - Returns the register number.
///
unsigned getReg() const {
-assert(hasAllocatedReg());
+assert(isRegister() && "This is not a register operand!");
return extra.regNum;
}
/// MachineOperand mutators.
///
void setReg(unsigned Reg) {
-assert(hasAllocatedReg() && "This operand cannot have a register number!");
+assert(isRegister() && "This is not a register operand!");
extra.regNum = Reg;
}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.174 -> 1.175
---
Log message:
Move some methods out of MachineInstr into MachineOperand
---
Diffs of the changes: (+17 -10)
MachineInstr.h | 27 +--
1 files changed, 17 insertions(+), 10 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.174
llvm/include/llvm/CodeGen/MachineInstr.h:1.175
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.174 Thu May 4 12:21:19 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 12:52:22 2006
@@ -234,7 +234,7 @@
extra.regNum = Reg;
}
- void setImmedValue(int immVal) {
+ void setImmedValue(int64_t immVal) {
assert(isImmediate() && "Wrong MachineOperand mutator");
contents.immedVal = immVal;
}
@@ -245,6 +245,22 @@
"Wrong MachineOperand accessor");
extra.offset = Offset;
}
+
+ /// ChangeToImmediate - Replace this operand with a new immediate operand of
+ /// the specified value. If an operand is known to be an immediate already,
+ /// the setImmedValue method should be used.
+ void ChangeToImmediate(int64_t ImmVal) {
+opType = MO_Immediate;
+contents.immedVal = ImmVal;
+ }
+
+ /// ChangeToRegister - Replace this operand with a new register operand of
+ /// the specified value. If an operand is known to be an register already,
+ /// the setReg method should be used.
+ void ChangeToRegister(unsigned Reg) {
+opType = MO_VirtualRegister;
+extra.regNum = Reg;
+ }
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
@@ -436,7 +452,6 @@
//======//
// Accessors used to modify instructions in place.
//
- // FIXME: Move this stuff to MachineOperand itself!
/// setOpcode - Replace the opcode of the current instruction with a new one.
///
@@ -448,14 +463,6 @@
void RemoveOperand(unsigned i) {
operands.erase(operands.begin()+i);
}
-
- // Access to set the operands when building the machine instruction
- //
- void SetMachineOperandConst(unsigned i,
- MachineOperand::MachineOperandType operandType,
- int intValue);
-
- void SetMachineOperandReg(unsigned i, int regNum);
};
//===--===//
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.173 -> 1.174
MachineInstrBuilder.h updated: 1.33 -> 1.34
---
Log message:
There shalt be only one "immediate" operand type!
---
Diffs of the changes: (+4 -25)
MachineInstr.h| 22 --
MachineInstrBuilder.h |7 ---
2 files changed, 4 insertions(+), 25 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.173
llvm/include/llvm/CodeGen/MachineInstr.h:1.174
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.173 Thu May 4 12:02:50 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 12:21:19 2006
@@ -62,8 +62,7 @@
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
-MO_SignExtendedImmed,
-MO_UnextendedImmed,
+MO_Immediate, // Immediate Operand
MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index
MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
@@ -160,9 +159,7 @@
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
- bool isImmediate() const {
-return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
- }
+ bool isImmediate() const { return opType == MO_Immediate; }
bool isFrameIndex() const { return opType == MO_FrameIndex; }
bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
bool isJumpTableIndex() const { return opType == MO_JumpTableIndex; }
@@ -380,7 +377,7 @@
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already
done!");
operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
+ MachineOperand(intValue, MachineOperand::MO_Immediate));
}
/// addZeroExtImm64Operand - Add a zero extended 64-bit constant argument
@@ -389,18 +386,7 @@
void addZeroExtImm64Operand(uint64_t intValue) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
- }
-
- /// addSignExtImmOperand - Add a zero extended constant argument to the
- /// machine instruction.
- ///
- void addSignExtImmOperand(int intValue) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
+operands.push_back(MachineOperand(intValue, MachineOperand::MO_Immediate));
}
void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.33
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.34
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.33Thu May 4
12:02:51 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Thu May 4 12:21:19 2006
@@ -47,13 +47,6 @@
return *this;
}
- /// addSImm - Add a new sign extended immediate operand...
- ///
- const MachineInstrBuilder &addSImm(int val) const {
-MI->addSignExtImmOperand(val);
-return *this;
- }
-
/// addZImm - Add a new zero extended immediate operand...
///
const MachineInstrBuilder &addZImm(unsigned Val) const {
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.172 -> 1.173
MachineInstrBuilder.h updated: 1.32 -> 1.33
---
Log message:
Change "value" in MachineOperand to be a GlobalValue, as that is the only
thing that can be in it. Remove a dead method.
---
Diffs of the changes: (+12 -33)
MachineInstr.h| 37 +++--
MachineInstrBuilder.h |8 +---
2 files changed, 12 insertions(+), 33 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.172
llvm/include/llvm/CodeGen/MachineInstr.h:1.173
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.172 Wed May 3 20:26:39 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu May 4 12:02:50 2006
@@ -74,15 +74,8 @@
private:
union {
-Value* value; // BasicBlockVal for a label operand.
-// ConstantVal for a non-address immediate.
-// Virtual register for an SSA operand,
-// including hidden operands required for
-// the generated machine code.
-// LLVM global for MO_GlobalAddress.
-
+GlobalValue *GV;// LLVM global for MO_GlobalAddress.
int64_t immedVal; // Constant value for an explicit constant
-
MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
const char *SymbolName; // For MO_ExternalSymbol type
} contents;
@@ -90,36 +83,32 @@
char flags; // see bit field definitions above
MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
union {
-int regNum; // register number for an explicit register
-// will be set for a value after reg allocation
-
-int offset; // Offset to address of global or external,
only
-// valid for MO_GlobalAddress, MO_ExternalSym
-// and MO_ConstantPoolIndex
+int regNum; // register number for an explicit register
+int offset; // Offset to address of global or external, only
+// valid for MO_GlobalAddress, MO_ExternalSym
+// and MO_ConstantPoolIndex
} extra;
- void zeroContents () {
-memset (&contents, 0, sizeof (contents));
-memset (&extra, 0, sizeof (extra));
+ void zeroContents() {
+contents.immedVal = 0;
+extra.offset = 0;
}
MachineOperand(int64_t ImmVal, MachineOperandType OpTy, int Offset = 0)
: flags(0), opType(OpTy) {
-zeroContents ();
contents.immedVal = ImmVal;
extra.offset = Offset;
}
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
: flags(UseTy), opType(OpTy) {
-zeroContents ();
+zeroContents();
extra.regNum = Reg;
}
MachineOperand(GlobalValue *V, int Offset = 0)
: flags(MachineOperand::Use), opType(MachineOperand::MO_GlobalAddress) {
-zeroContents ();
-contents.value = (Value*)V;
+contents.GV = V;
extra.offset = Offset;
}
@@ -206,7 +195,7 @@
}
GlobalValue *getGlobal() const {
assert(isGlobalAddress() && "Wrong MachineOperand accessor");
-return (GlobalValue*)contents.value;
+return contents.GV;
}
int getOffset() const {
assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex())
&&
@@ -476,10 +465,6 @@
// Access to set the operands when building the machine instruction
//
- void SetMachineOperandVal(unsigned i,
-MachineOperand::MachineOperandType operandType,
-Value* V);
-
void SetMachineOperandConst(unsigned i,
MachineOperand::MachineOperandType operandType,
int intValue);
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.32
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.33
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.32Wed May 3
20:15:02 2006
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Thu May 4 12:02:51 2006
@@ -8,13 +8,7 @@
//===--===//
//
// This file exposes a function named BuildMI, which is useful for dramatically
-// simplifying how MachineInstr's are created. Instead of using code like
this:
-//
-// M = new MachineInstr(X86::ADDrr8);
-// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
-//
-// we can now use code like this:
+// simplifying how MachineInstr's are created. It allows use of code like
this:
//
// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
//
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.171 -> 1.172
---
Log message:
Remove a bunch more dead V9 specific stuff
---
Diffs of the changes: (+7 -70)
MachineInstr.h | 77 +
1 files changed, 7 insertions(+), 70 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.171
llvm/include/llvm/CodeGen/MachineInstr.h:1.172
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.171 Wed May 3 20:15:02 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 20:26:39 2006
@@ -37,35 +37,8 @@
//===--===//
// class MachineOperand
//
-// Purpose:
// Representation of each machine instruction operand.
-// This class is designed so that you can allocate a vector of operands
-// first and initialize each one later.
-//
-// E.g, for this VM instruction:
-// ptr = alloca type, numElements
-// we generate 2 machine instructions on the SPARC:
-//
-//mul Constant, Numelements -> Reg
-//add %sp, Reg -> Ptr
-//
-// Each instruction has 3 operands, listed above. Of those:
-// - Reg, NumElements, and Ptr are of operand type MO_Register.
-// - Constant is of operand type MO_SignExtendedImmed on the SPARC.
-//
-// For the register operands, the virtual register type is as follows:
-//
-// - Reg will be of virtual register type MO_MInstrVirtualReg. The field
-// MachineInstr* minstr will point to the instruction that computes reg.
//
-// - NumElements will be of virtual register type MO_VirtualReg.
-// The field Value* value identifies the value.
-//
-// - Ptr will also be of virtual register type MO_VirtualReg.
-// Again, the field Value* value identifies the value.
-//
-//===--===//
-
struct MachineOperand {
private:
// Bit fields of the flags variable used for different operand properties
@@ -130,15 +103,11 @@
memset (&extra, 0, sizeof (extra));
}
- MachineOperand(int64_t ImmVal = 0,
-MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
+ MachineOperand(int64_t ImmVal, MachineOperandType OpTy, int Offset = 0)
: flags(0), opType(OpTy) {
zeroContents ();
contents.immedVal = ImmVal;
-if (OpTy == MachineOperand::MO_ConstantPoolIndex)
- extra.offset = Offset;
-else
- extra.regNum = -1;
+extra.offset = Offset;
}
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
@@ -147,10 +116,8 @@
extra.regNum = Reg;
}
- MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
- int Offset = 0)
-: flags(UseTy), opType(OpTy) {
-assert(OpTy == MachineOperand::MO_GlobalAddress);
+ MachineOperand(GlobalValue *V, int Offset = 0)
+: flags(MachineOperand::Use), opType(MachineOperand::MO_GlobalAddress) {
zeroContents ();
contents.value = (Value*)V;
extra.offset = Offset;
@@ -160,7 +127,6 @@
: flags(0), opType(MO_MachineBasicBlock) {
zeroContents ();
contents.MBB = mbb;
-extra.regNum = -1;
}
MachineOperand(const char *SymName, int Offset)
@@ -196,11 +162,7 @@
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
- /// isRegister - Return true if this operand is a register operand. The X86
- /// backend currently can't decide whether to use MO_MR or MO_VR to represent
- /// them, so we accept both.
- ///
- /// Note: The sparc backend should not use this method.
+ /// isRegister - Return true if this operand is a register operand.
///
bool isRegister() const {
return opType == MO_VirtualRegister;
@@ -218,20 +180,6 @@
bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
- /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
- /// has one. This is deprecated and only used by the SPARC v9 backend.
- ///
- Value* getVRegValueOrNull() const {
-return opType == MO_VirtualRegister ? contents.value : NULL;
- }
-
- /// MachineOperand accessors that only work on certain types of
- /// MachineOperand...
- ///
- Value* getVRegValue() const {
-assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
-return contents.value;
- }
int64_t getImmedValue() const {
assert(isImmediate() && "Wrong MachineOperand accessor");
return contents.immedVal;
@@ -293,20 +241,13 @@
return extra.regNum;
}
- /// MachineOperand mutators...
+ /// MachineOperand mutators.
///
void setReg(unsigned Reg) {
-// This method's comment used to say: 'TODO: get rid of this duplicate
-// code.' It's not clear where the duplication is.
assert(hasAllocatedReg() && "This operand cannot have a register number!");
extra.regNum = Reg;
}
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.170 -> 1.171
MachineInstrBuilder.h updated: 1.31 -> 1.32
---
Log message:
Remove a bunch more SparcV9 specific stuff
---
Diffs of the changes: (+13 -93)
MachineInstr.h| 82 ++
MachineInstrBuilder.h | 24 +-
2 files changed, 13 insertions(+), 93 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.170
llvm/include/llvm/CodeGen/MachineInstr.h:1.171
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.170 Wed May 3 19:49:59 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 20:15:02 2006
@@ -58,9 +58,6 @@
// - Reg will be of virtual register type MO_MInstrVirtualReg. The field
// MachineInstr* minstr will point to the instruction that computes reg.
//
-// - %sp will be of virtual register type MO_MachineReg.
-// The field regNum identifies the machine register.
-//
// - NumElements will be of virtual register type MO_VirtualReg.
// The field Value* value identifies the value.
//
@@ -75,7 +72,6 @@
enum {
DEFFLAG = 0x01, // this is a def of the operand
USEFLAG = 0x02, // this is a use of the operand
-PCRELATIVE = 0x40// Operand is relative to PC, not a global
address
};
public:
@@ -93,7 +89,6 @@
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
-MO_MachineRegister, // pre-assigned machine register `regNum'
MO_SignExtendedImmed,
MO_UnextendedImmed,
MO_MachineBasicBlock, // MachineBasicBlock reference
@@ -152,18 +147,9 @@
extra.regNum = Reg;
}
- MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
- bool isPCRelative = false)
-: flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
-assert(OpTy != MachineOperand::MO_GlobalAddress);
-zeroContents();
-contents.value = V;
-extra.regNum = -1;
- }
-
MachineOperand(GlobalValue *V, MachineOperandType OpTy, UseType UseTy,
- bool isPCRelative = false, int Offset = 0)
-: flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy) {
+ int Offset = 0)
+: flags(UseTy), opType(OpTy) {
assert(OpTy == MachineOperand::MO_GlobalAddress);
zeroContents ();
contents.value = (Value*)V;
@@ -177,8 +163,8 @@
extra.regNum = -1;
}
- MachineOperand(const char *SymName, bool isPCRelative, int Offset)
-: flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol) {
+ MachineOperand(const char *SymName, int Offset)
+: flags(0), opType(MO_ExternalSymbol) {
zeroContents ();
contents.SymbolName = SymName;
extra.offset = Offset;
@@ -192,7 +178,6 @@
extra = M.extra;
}
-
~MachineOperand() {}
const MachineOperand &operator=(const MachineOperand &MO) {
@@ -218,7 +203,7 @@
/// Note: The sparc backend should not use this method.
///
bool isRegister() const {
-return opType == MO_MachineRegister || opType == MO_VirtualRegister;
+return opType == MO_VirtualRegister;
}
/// Accessors that tell you what kind of MachineOperand you're looking at.
@@ -247,10 +232,6 @@
assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
return contents.value;
}
- int getMachineRegNum() const {
-assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
-return extra.regNum;
- }
int64_t getImmedValue() const {
assert(isImmediate() && "Wrong MachineOperand accessor");
return contents.immedVal;
@@ -301,8 +282,7 @@
/// allocated to this operand.
///
bool hasAllocatedReg() const {
-return (extra.regNum >= 0 &&
-(opType == MO_VirtualRegister || opType == MO_MachineRegister));
+return extra.regNum >= 0 && opType == MO_VirtualRegister;
}
/// getReg - Returns the register number. It is a runtime error to call this
@@ -445,28 +425,6 @@
// Accessors to add operands when building up machine instructions
//
- /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
- /// operands list...
- ///
- void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(V, MachineOperand::MO_VirtualRegister,
- !isDef ? MachineOperand::Use :
- (isDefAndUse ? MachineOperand::UseAndDef :
- MachineOperand::Def)));
- }
-
- void addRegOperand(Value *V,
- MachineOperand::UseType UTy = MachineOperand::Use,
- bool isPCRelative = false) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.169 -> 1.170
---
Log message:
Remove some more V9-specific stuff.
---
Diffs of the changes: (+0 -15)
MachineInstr.h | 15 ---
1 files changed, 15 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.169
llvm/include/llvm/CodeGen/MachineInstr.h:1.170
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.169 Wed May 3 19:44:25 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 19:49:59 2006
@@ -75,10 +75,6 @@
enum {
DEFFLAG = 0x01, // this is a def of the operand
USEFLAG = 0x02, // this is a use of the operand
-HIFLAG32= 0x04, // operand is %hi32(value_or_immedVal)
-LOFLAG32= 0x08, // operand is %lo32(value_or_immedVal)
-HIFLAG64= 0x10, // operand is %hi64(value_or_immedVal)
-LOFLAG64= 0x20, // operand is %lo64(value_or_immedVal)
PCRELATIVE = 0x40// Operand is relative to PC, not a global
address
};
@@ -215,13 +211,6 @@
///
UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
- /// isPCRelative - This returns the value of the PCRELATIVE flag, which
- /// indicates whether this operand should be emitted as a PC relative value
- /// instead of a global address. This is used for operands of the forms:
- /// MachineBasicBlock, GlobalAddress, ExternalSymbol
- ///
- bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
-
/// isRegister - Return true if this operand is a register operand. The X86
/// backend currently can't decide whether to use MO_MR or MO_VR to represent
/// them, so we accept both.
@@ -307,10 +296,6 @@
MachineOperand& setUse () { flags |= USEFLAG; return *this; }
boolisDef () const { return flags & DEFFLAG; }
MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
- boolisHiBits32 () const { return flags & HIFLAG32; }
- boolisLoBits32 () const { return flags & LOFLAG32; }
- boolisHiBits64 () const { return flags & HIFLAG64; }
- boolisLoBits64 () const { return flags & LOFLAG64; }
/// hasAllocatedReg - Returns true iff a machine register has been
/// allocated to this operand.
___
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.168 -> 1.169
MachineInstrBuilder.h updated: 1.30 -> 1.31
---
Log message:
Remove some more unused stuff from MachineInstr that was leftover from V9.
---
Diffs of the changes: (+3 -71)
MachineInstr.h| 49 +++--
MachineInstrBuilder.h | 25 -
2 files changed, 3 insertions(+), 71 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.168
llvm/include/llvm/CodeGen/MachineInstr.h:1.169
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.168 Sat Apr 22 13:53:45 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hWed May 3 19:44:25 2006
@@ -98,10 +98,8 @@
enum MachineOperandType {
MO_VirtualRegister, // virtual register for *value
MO_MachineRegister, // pre-assigned machine register `regNum'
-MO_CCRegister,
MO_SignExtendedImmed,
MO_UnextendedImmed,
-MO_PCRelativeDisp,
MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index
MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
@@ -237,7 +235,6 @@
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
- bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
bool isImmediate() const {
return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
}
@@ -251,16 +248,14 @@
/// has one. This is deprecated and only used by the SPARC v9 backend.
///
Value* getVRegValueOrNull() const {
-return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
-isPCRelativeDisp()) ? contents.value : NULL;
+return opType == MO_VirtualRegister ? contents.value : NULL;
}
/// MachineOperand accessors that only work on certain types of
/// MachineOperand...
///
Value* getVRegValue() const {
-assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
- || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
+assert(opType == MO_VirtualRegister && "Wrong MachineOperand accessor");
return contents.value;
}
int getMachineRegNum() const {
@@ -322,8 +317,7 @@
///
bool hasAllocatedReg() const {
return (extra.regNum >= 0 &&
-(opType == MO_VirtualRegister || opType == MO_CCRegister ||
- opType == MO_MachineRegister));
+(opType == MO_VirtualRegister || opType == MO_MachineRegister));
}
/// getReg - Returns the register number. It is a runtime error to call this
@@ -362,25 +356,6 @@
friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
- /// markHi32, markLo32, etc. - These methods are deprecated and only used by
- /// the SPARC v9 back-end.
- ///
- void markHi32() { flags |= HIFLAG32; }
- void markLo32() { flags |= LOFLAG32; }
- void markHi64() { flags |= HIFLAG64; }
- void markLo64() { flags |= LOFLAG64; }
-
-private:
- /// setRegForValue - Replaces the Value with its corresponding physical
- /// register after register allocation is complete. This is deprecated
- /// and only used by the SPARC v9 back-end.
- ///
- void setRegForValue(int reg) {
-assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
- opType == MO_MachineRegister);
-extra.regNum = reg;
- }
-
friend class MachineInstr;
};
@@ -507,15 +482,6 @@
UTy, isPCRelative));
}
- void addCCRegOperand(Value *V,
- MachineOperand::UseType UTy = MachineOperand::Use) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
- false));
- }
-
-
/// addRegOperand - Add a symbolic virtual register reference...
///
void addRegOperand(int reg, bool isDef) {
@@ -536,15 +502,6 @@
MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
}
- /// addPCDispOperand - Add a PC relative displacement operand to the MI
- ///
- void addPCDispOperand(Value *V) {
-assert(!OperandsComplete() &&
- "Trying to add an operand to a machine instr that is already
done!");
-operands.push_back(
- MachineOperand(V,
MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
- }
-
/// addMachineRegOperand - Add a virtual register operand to this
MachineInstr
///
void addMachineRegOperand(int reg, bool isDef) {
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.30
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.31
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.30
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.166 -> 1.167
---
Log message:
Remove some of the obvious v9-specific cruft
---
Diffs of the changes: (+1 -136)
MachineInstr.h | 137 -
1 files changed, 1 insertion(+), 136 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.166
llvm/include/llvm/CodeGen/MachineInstr.h:1.167
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.166 Mon Apr 17 16:35:08 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hThu Apr 20 13:09:13 2006
@@ -398,7 +398,6 @@
class MachineInstr {
short Opcode; // the opcode
- unsigned char numImplicitRefs;// number of implicit operands
std::vector operands; // the operands
MachineInstr* prev, *next;// links for our intrusive list
MachineBasicBlock* parent;// pointer to the owning basic block
@@ -442,7 +441,7 @@
/// Access to explicit operands of the instruction.
///
- unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
+ unsigned getNumOperands() const { return operands.size(); }
const MachineOperand& getOperand(unsigned i) const {
assert(i < getNumOperands() && "getOperand() out of range!");
@@ -453,48 +452,6 @@
return operands[i];
}
- //
- // Access to explicit or implicit operands of the instruction
- // This returns the i'th entry in the operand vector.
- // That represents the i'th explicit operand or the (i-N)'th implicit
operand,
- // depending on whether i < N or i >= N.
- //
- const MachineOperand& getExplOrImplOperand(unsigned i) const {
-assert(i < operands.size() && "getExplOrImplOperand() out of range!");
-return (i < getNumOperands()? getOperand(i)
-: getImplicitOp(i - getNumOperands()));
- }
-
- //
- // Access to implicit operands of the instruction
- //
- unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
-
- MachineOperand& getImplicitOp(unsigned i) {
-assert(i < numImplicitRefs && "implicit ref# out of range!");
-return operands[i + operands.size() - numImplicitRefs];
- }
- const MachineOperand& getImplicitOp(unsigned i) const {
-assert(i < numImplicitRefs && "implicit ref# out of range!");
-return operands[i + operands.size() - numImplicitRefs];
- }
-
- Value* getImplicitRef(unsigned i) {
-return getImplicitOp(i).getVRegValue();
- }
- const Value* getImplicitRef(unsigned i) const {
-return getImplicitOp(i).getVRegValue();
- }
-
- void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
-++numImplicitRefs;
-addRegOperand(V, isDef, isDefAndUse);
- }
- void setImplicitRef(unsigned i, Value* V) {
-assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
-SetMachineOperandVal(i + getNumOperands(),
- MachineOperand::MO_VirtualRegister, V);
- }
/// clone - Create a copy of 'this' instruction that is identical in
/// all ways except the the instruction has no parent, prev, or next.
@@ -517,16 +474,6 @@
void dump() const;
friend std::ostream& operator<<(std::ostream& os, const MachineInstr&
minstr);
- // Define iterators to access the Value operands of the Machine Instruction.
- // Note that these iterators only enumerate the explicit operands.
- // begin() and end() are defined to produce these iterators. NOTE, these are
- // SparcV9 specific!
- //
- template class ValOpIterator;
- typedef ValOpIterator
const_val_op_iterator;
- typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
-
-
//======//
// Accessors to add operands when building up machine instructions
//
@@ -683,12 +630,6 @@
//
// FIXME: Move this stuff to MachineOperand itself!
- /// replace - Support to rewrite a machine instruction in place: for now,
- /// simply replace() and then set new operands with Set.*Operand methods
- /// below.
- ///
- void replace(short Opcode, unsigned numOperands);
-
/// setOpcode - Replace the opcode of the current instruction with a new one.
///
void setOpcode(unsigned Op) { Opcode = Op; }
@@ -711,81 +652,6 @@
int intValue);
void SetMachineOperandReg(unsigned i, int regNum);
-
-
- unsigned substituteValue(const Value* oldVal, Value* newVal,
- bool defsOnly, bool notDefsAndUses,
- bool& someArgsWereIgnored);
-
- // SetRegForOperand -
- // SetRegForImplicitRef -
- // Mark an explicit or implicit operand with its allocated physical register.
- //
- void SetRegForOperand(unsigned i, int regNum);
- void SetRegForImplicitRef(unsigned i, int regNum);
-
- //
- // Iterator to enumerate machine operands. NOTE, this is SPARCV9 specific!
- //
- template
- c
[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.165 -> 1.166
---
Log message:
Add some convenience methods.
---
Diffs of the changes: (+10 -0)
MachineInstr.h | 10 ++
1 files changed, 10 insertions(+)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.165
llvm/include/llvm/CodeGen/MachineInstr.h:1.166
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.165 Sat Feb 25 03:52:55 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hMon Apr 17 16:35:08 2006
@@ -499,6 +499,16 @@
/// clone - Create a copy of 'this' instruction that is identical in
/// all ways except the the instruction has no parent, prev, or next.
MachineInstr* clone() const;
+
+ /// removeFromParent - This method unlinks 'this' from the containing basic
+ /// block, and returns it, but does not delete it.
+ MachineInstr *removeFromParent();
+
+ /// eraseFromParent - This method unlinks 'this' from the containing basic
+ /// block and deletes it.
+ void eraseFromParent() {
+delete removeFromParent();
+ }
//
// Debugging support
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/MachineInstr.h MachineInstrBuilder.h SelectionDAG.h SelectionDAGNodes.h
Changes in directory llvm/include/llvm/CodeGen:
MachineInstr.h updated: 1.164 -> 1.165
MachineInstrBuilder.h updated: 1.28 -> 1.29
SelectionDAG.h updated: 1.99 -> 1.100
SelectionDAGNodes.h updated: 1.103 -> 1.104
---
Log message:
Added an offset field to ConstantPoolSDNode.
---
Diffs of the changes: (+33 -22)
MachineInstr.h| 16 ++--
MachineInstrBuilder.h |8 +---
SelectionDAG.h| 10 ++
SelectionDAGNodes.h | 21 -
4 files changed, 33 insertions(+), 22 deletions(-)
Index: llvm/include/llvm/CodeGen/MachineInstr.h
diff -u llvm/include/llvm/CodeGen/MachineInstr.h:1.164
llvm/include/llvm/CodeGen/MachineInstr.h:1.165
--- llvm/include/llvm/CodeGen/MachineInstr.h:1.164 Wed Feb 22 10:23:43 2006
+++ llvm/include/llvm/CodeGen/MachineInstr.hSat Feb 25 03:52:55 2006
@@ -131,7 +131,8 @@
// will be set for a value after reg allocation
int offset; // Offset to address of global or external,
only
-// valid for MO_GlobalAddress and
MO_ExternalSym
+// valid for MO_GlobalAddress, MO_ExternalSym
+// and MO_ConstantPoolIndex
} extra;
void zeroContents () {
@@ -140,11 +141,14 @@
}
MachineOperand(int64_t ImmVal = 0,
-MachineOperandType OpTy = MO_VirtualRegister)
+MachineOperandType OpTy = MO_VirtualRegister, int Offset = 0)
: flags(0), opType(OpTy) {
zeroContents ();
contents.immedVal = ImmVal;
-extra.regNum = -1;
+if (OpTy == MachineOperand::MO_ConstantPoolIndex)
+ extra.offset = Offset;
+else
+ extra.regNum = -1;
}
MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
@@ -286,7 +290,7 @@
return (GlobalValue*)contents.value;
}
int getOffset() const {
-assert((isGlobalAddress() || isExternalSymbol()) &&
+assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex())
&&
"Wrong MachineOperand accessor");
return extra.offset;
}
@@ -344,7 +348,7 @@
}
void setOffset(int Offset) {
-assert((isGlobalAddress() || isExternalSymbol()) &&
+assert((isGlobalAddress() || isExternalSymbol() || isConstantPoolIndex())
&&
"Wrong MachineOperand accessor");
extra.offset = Offset;
}
@@ -644,7 +648,7 @@
/// addConstantPoolndexOperand - Add a constant pool object index to the
/// instruction.
///
- void addConstantPoolIndexOperand(unsigned I) {
+ void addConstantPoolIndexOperand(unsigned I, int Offset=0) {
assert(!OperandsComplete() &&
"Trying to add an operand to a machine instr that is already
done!");
operands.push_back(MachineOperand(I,
MachineOperand::MO_ConstantPoolIndex));
Index: llvm/include/llvm/CodeGen/MachineInstrBuilder.h
diff -u llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.28
llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.29
--- llvm/include/llvm/CodeGen/MachineInstrBuilder.h:1.28Thu Apr 21
15:38:00 2005
+++ llvm/include/llvm/CodeGen/MachineInstrBuilder.h Sat Feb 25 03:52:55 2006
@@ -125,13 +125,15 @@
return *this;
}
- const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
-MI->addConstantPoolIndexOperand(Idx);
+ const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
+ int Offset = 0) const {
+MI->addConstantPoolIndexOperand(Idx, Offset);
return *this;
}
const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
- bool isPCRelative = false, int
Offset = 0) const {
+ bool isPCRelative = false,
+ int Offset = 0) const {
MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
return *this;
}
Index: llvm/include/llvm/CodeGen/SelectionDAG.h
diff -u llvm/include/llvm/CodeGen/SelectionDAG.h:1.99
llvm/include/llvm/CodeGen/SelectionDAG.h:1.100
--- llvm/include/llvm/CodeGen/SelectionDAG.h:1.99 Fri Feb 17 15:57:00 2006
+++ llvm/include/llvm/CodeGen/SelectionDAG.hSat Feb 25 03:52:55 2006
@@ -121,9 +121,9 @@
SDOperand getFrameIndex(int FI, MVT::ValueType VT);
SDOperand getTargetFrameIndex(int FI, MVT::ValueType VT);
SDOperand getConstantPool(Constant *C, MVT::ValueType VT,
-unsigned Alignment=0);
+ unsigned Alignment=0, int offset = 0);
SDOperand getTargetConstantPool(Constant *C, MVT::ValueType VT,
- unsigned Alignment=0);
+ unsigned Alignment=0, int offset = 0);
SDOperand getBasicBlock(MachineBasicBlock *MBB);
SDOperand getExternalSymbol(const char *Sym, MVT::ValueType VT);
SDOperand getTargetExternalSymbol(const char *Sym, MVT::ValueType VT);
@@ -469,8 +469,10 @@
std::map, SDNode*
