Re: [llvm-commits] CVS: llvm/lib/Target/Alpha/Alpha.td AlphaAsmPrinter.cpp AlphaISelDAGToDAG.cpp AlphaISelLowering.cpp AlphaISelLowering.h AlphaInstrInfo.td AlphaSubtarget.cpp AlphaSubtarget.h
Err, um, I meant 21164. dropping 21264 would be bad...
On 1/24/07, Andrew Lenharth <[EMAIL PROTECTED]> wrote:
>
>
> Changes in directory llvm/lib/Target/Alpha:
>
> Alpha.td updated: 1.11 -> 1.12
> AlphaAsmPrinter.cpp updated: 1.61 -> 1.62
> AlphaISelDAGToDAG.cpp updated: 1.67 -> 1.68
> AlphaISelLowering.cpp updated: 1.76 -> 1.77
> AlphaISelLowering.h updated: 1.23 -> 1.24
> AlphaInstrInfo.td updated: 1.136 -> 1.137
> AlphaSubtarget.cpp updated: 1.7 -> 1.8
> AlphaSubtarget.h updated: 1.5 -> 1.6
> ---
> Log message:
>
> FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available
>
> ---
> Diffs of the changes: (+17 -73)
>
> Alpha.td |8 ++--
> AlphaAsmPrinter.cpp |7 +++
> AlphaISelDAGToDAG.cpp | 35 ---
> AlphaISelLowering.cpp | 27 ---
> AlphaISelLowering.h |2 +-
> AlphaInstrInfo.td |6 ++
> AlphaSubtarget.cpp|2 +-
> AlphaSubtarget.h |3 ---
> 8 files changed, 17 insertions(+), 73 deletions(-)
>
>
> Index: llvm/lib/Target/Alpha/Alpha.td
> diff -u llvm/lib/Target/Alpha/Alpha.td:1.11
> llvm/lib/Target/Alpha/Alpha.td:1.12
> --- llvm/lib/Target/Alpha/Alpha.td:1.11 Wed May 17 19:11:53 2006
> +++ llvm/lib/Target/Alpha/Alpha.td Wed Jan 24 15:09:16 2007
> @@ -22,8 +22,6 @@
>
> def FeatureCIX : SubtargetFeature<"CIX", "HasCT", "true",
>"Enable CIX extentions">;
> -def FeatureFIX : SubtargetFeature<"FIX", "HasF2I", "true",
> - "Enable FIX extentions">;
>
>
> //===--===//
> // Register File Description
> @@ -54,10 +52,8 @@
>
> //===--===//
>
> def : Processor<"generic", Alpha21264Itineraries, []>;
> -def : Processor<"pca56" , Alpha21264Itineraries, []>;
> -def : Processor<"ev56" , Alpha21264Itineraries, []>;
> -def : Processor<"ev6", Alpha21264Itineraries, [FeatureFIX]>;
> -def : Processor<"ev67" , Alpha21264Itineraries, [FeatureFIX, FeatureCIX]>;
> +def : Processor<"ev6", Alpha21264Itineraries, []>;
> +def : Processor<"ev67" , Alpha21264Itineraries, [FeatureCIX]>;
>
>
> //===--===//
> // The Alpha Target
>
>
> Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
> diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.61
> llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.62
> --- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.61 Wed Jan 24 01:03:39
> 2007
> +++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Jan 24 15:09:16 2007
> @@ -190,11 +190,10 @@
> bool AlphaAsmPrinter::doInitialization(Module &M)
> {
>AsmPrinter::doInitialization(M);
> - if(TM.getSubtarget().hasF2I()
> - || TM.getSubtarget().hasCT())
> -O << "\t.arch ev6\n";
> + if(TM.getSubtarget().hasCT())
> +O << "\t.arch ev6\n"; //This might need to be ev67, so leave this test
> here
>else
> -O << "\t.arch ev56\n";
> +O << "\t.arch ev6\n";
>O << "\t.set noat\n";
>return false;
> }
>
>
> Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
> diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.67
> llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.68
> --- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.67Wed Jan 24 12:43:14
> 2007
> +++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Wed Jan 24 15:09:16 2007
> @@ -394,24 +394,10 @@
>default: break;
>}
>
> - SDOperand LD;
> - if (AlphaLowering.hasITOF()) {
> -LD = CurDAG->getNode(AlphaISD::FTOIT_, MVT::i64, SDOperand(cmp, 0));
> - } else {
> -int FrameIdx =
> - CurDAG->getMachineFunction().getFrameInfo()->CreateStackObject(8,
> 8);
> -SDOperand FI = CurDAG->getFrameIndex(FrameIdx, MVT::i64);
> -SDOperand ST =
> - SDOperand(CurDAG->getTargetNode(Alpha::STT, MVT::Other,
> - SDOperand(cmp, 0), FI,
> - CurDAG->getRegister(Alpha::R31,
> MVT::i64)), 0);
> -LD = SDOperand(CurDAG->getTargetNode(Alpha::LDQ, MVT::i64, FI,
> - CurDAG->getRegister(Alpha::R31,
> MVT::i64),
> - ST), 0);
> - }
> + SDNode* LD = CurDAG->getTargetNode(Alpha::FTOIT, MVT::i64,
> SDOperand(cmp, 0));
>return CurDAG->getTargetNode(Alpha::CMPULT, MVT::i64,
> CurDAG->getRegister(Alpha::R31, MVT::i64),
> - LD);
> + SDOperand(LD,0));
> }
> break;
>
> @@ -424,7 +410,6 @@
>// so that things like this can be caught in fall though code
>//move int to fp
>bool isDouble = N->getValueType(0) == MVT::f64;
> - SDOperand LD;
>SDOperand cond = N->getOperand(0);
>
[llvm-commits] CVS: llvm/lib/Target/Alpha/Alpha.td AlphaAsmPrinter.cpp AlphaISelDAGToDAG.cpp AlphaISelLowering.cpp AlphaISelLowering.h AlphaInstrInfo.td AlphaSubtarget.cpp AlphaSubtarget.h
Changes in directory llvm/lib/Target/Alpha:
Alpha.td updated: 1.11 -> 1.12
AlphaAsmPrinter.cpp updated: 1.61 -> 1.62
AlphaISelDAGToDAG.cpp updated: 1.67 -> 1.68
AlphaISelLowering.cpp updated: 1.76 -> 1.77
AlphaISelLowering.h updated: 1.23 -> 1.24
AlphaInstrInfo.td updated: 1.136 -> 1.137
AlphaSubtarget.cpp updated: 1.7 -> 1.8
AlphaSubtarget.h updated: 1.5 -> 1.6
---
Log message:
FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available
---
Diffs of the changes: (+17 -73)
Alpha.td |8 ++--
AlphaAsmPrinter.cpp |7 +++
AlphaISelDAGToDAG.cpp | 35 ---
AlphaISelLowering.cpp | 27 ---
AlphaISelLowering.h |2 +-
AlphaInstrInfo.td |6 ++
AlphaSubtarget.cpp|2 +-
AlphaSubtarget.h |3 ---
8 files changed, 17 insertions(+), 73 deletions(-)
Index: llvm/lib/Target/Alpha/Alpha.td
diff -u llvm/lib/Target/Alpha/Alpha.td:1.11 llvm/lib/Target/Alpha/Alpha.td:1.12
--- llvm/lib/Target/Alpha/Alpha.td:1.11 Wed May 17 19:11:53 2006
+++ llvm/lib/Target/Alpha/Alpha.td Wed Jan 24 15:09:16 2007
@@ -22,8 +22,6 @@
def FeatureCIX : SubtargetFeature<"CIX", "HasCT", "true",
"Enable CIX extentions">;
-def FeatureFIX : SubtargetFeature<"FIX", "HasF2I", "true",
- "Enable FIX extentions">;
//===--===//
// Register File Description
@@ -54,10 +52,8 @@
//===--===//
def : Processor<"generic", Alpha21264Itineraries, []>;
-def : Processor<"pca56" , Alpha21264Itineraries, []>;
-def : Processor<"ev56" , Alpha21264Itineraries, []>;
-def : Processor<"ev6", Alpha21264Itineraries, [FeatureFIX]>;
-def : Processor<"ev67" , Alpha21264Itineraries, [FeatureFIX, FeatureCIX]>;
+def : Processor<"ev6", Alpha21264Itineraries, []>;
+def : Processor<"ev67" , Alpha21264Itineraries, [FeatureCIX]>;
//===--===//
// The Alpha Target
Index: llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
diff -u llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.61
llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.62
--- llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp:1.61 Wed Jan 24 01:03:39 2007
+++ llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp Wed Jan 24 15:09:16 2007
@@ -190,11 +190,10 @@
bool AlphaAsmPrinter::doInitialization(Module &M)
{
AsmPrinter::doInitialization(M);
- if(TM.getSubtarget().hasF2I()
- || TM.getSubtarget().hasCT())
-O << "\t.arch ev6\n";
+ if(TM.getSubtarget().hasCT())
+O << "\t.arch ev6\n"; //This might need to be ev67, so leave this test here
else
-O << "\t.arch ev56\n";
+O << "\t.arch ev6\n";
O << "\t.set noat\n";
return false;
}
Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.67
llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.68
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.67Wed Jan 24 12:43:14 2007
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp Wed Jan 24 15:09:16 2007
@@ -394,24 +394,10 @@
default: break;
}
- SDOperand LD;
- if (AlphaLowering.hasITOF()) {
-LD = CurDAG->getNode(AlphaISD::FTOIT_, MVT::i64, SDOperand(cmp, 0));
- } else {
-int FrameIdx =
- CurDAG->getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
-SDOperand FI = CurDAG->getFrameIndex(FrameIdx, MVT::i64);
-SDOperand ST =
- SDOperand(CurDAG->getTargetNode(Alpha::STT, MVT::Other,
- SDOperand(cmp, 0), FI,
- CurDAG->getRegister(Alpha::R31,
MVT::i64)), 0);
-LD = SDOperand(CurDAG->getTargetNode(Alpha::LDQ, MVT::i64, FI,
- CurDAG->getRegister(Alpha::R31,
MVT::i64),
- ST), 0);
- }
+ SDNode* LD = CurDAG->getTargetNode(Alpha::FTOIT, MVT::i64,
SDOperand(cmp, 0));
return CurDAG->getTargetNode(Alpha::CMPULT, MVT::i64,
CurDAG->getRegister(Alpha::R31, MVT::i64),
- LD);
+ SDOperand(LD,0));
}
break;
@@ -424,7 +410,6 @@
// so that things like this can be caught in fall though code
//move int to fp
bool isDouble = N->getValueType(0) == MVT::f64;
- SDOperand LD;
SDOperand cond = N->getOperand(0);
SDOperand TV = N->getOperand(1);
SDOperand FV = N->getOperand(2);
@@ -432,21 +417,9 @@
AddToISelQueue(TV);
AddToISelQueue(FV);
- if (AlphaLowering.hasITOF()) {
- LD = CurDAG->getNode(AlphaISD::ITOFT_, MVT::f64, cond);
- } else {
- int FrameIdx =
- CurDAG->getMachineFunction().getFram
