Mesa (master): mesa: remove _mesa from static function names

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 4e93da30f0e5efe4ba7f54a5af2b9e58bd74c98d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e93da30f0e5efe4ba7f54a5af2b9e58bd74c98d

Author: Timothy Arceri 
Date:   Tue May 30 10:56:36 2017 +1000

mesa: remove _mesa from static function names

Reviewed-by: Samuel Pitoiset 

---

 src/mesa/program/programopt.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c
index 501acde0d0..f560bce62e 100644
--- a/src/mesa/program/programopt.c
+++ b/src/mesa/program/programopt.c
@@ -46,7 +46,7 @@
  * May be used to implement the position_invariant option.
  */
 static void
-_mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct gl_program *vprog)
+insert_mvp_dp4_code(struct gl_context *ctx, struct gl_program *vprog)
 {
struct prog_instruction *newInst;
const GLuint origLen = vprog->arb.NumInstructions;
@@ -113,7 +113,7 @@ _mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct 
gl_program *vprog)
 
 
 static void
-_mesa_insert_mvp_mad_code(struct gl_context *ctx, struct gl_program *vprog)
+insert_mvp_mad_code(struct gl_context *ctx, struct gl_program *vprog)
 {
struct prog_instruction *newInst;
const GLuint origLen = vprog->arb.NumInstructions;
@@ -217,9 +217,9 @@ void
 _mesa_insert_mvp_code(struct gl_context *ctx, struct gl_program *vprog)
 {
if (ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS)
-  _mesa_insert_mvp_dp4_code( ctx, vprog );
+  insert_mvp_dp4_code( ctx, vprog );
else
-  _mesa_insert_mvp_mad_code( ctx, vprog );
+  insert_mvp_mad_code( ctx, vprog );
 }
   
 

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Mesa (master): mesa/st: indentation tidy-up

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 42fea3622fee6175235b39fb4329d972fb554665
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42fea3622fee6175235b39fb4329d972fb554665

Author: Timothy Arceri 
Date:   Tue May 30 10:26:09 2017 +1000

mesa/st: indentation tidy-up

Reviewed-by: Samuel Pitoiset 

---

 src/mesa/state_tracker/st_mesa_to_tgsi.c | 65 
 1 file changed, 32 insertions(+), 33 deletions(-)

diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c 
b/src/mesa/state_tracker/st_mesa_to_tgsi.c
index aad3c5b04c..984ff92130 100644
--- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
+++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
@@ -938,42 +938,41 @@ st_translate_mesa_program(
 
/* Declare misc input registers
 */
-   {
-  GLbitfield sysInputs = program->info.system_values_read;
-
-  for (i = 0; sysInputs; i++) {
- if (sysInputs & (1 << i)) {
-unsigned semName = _mesa_sysval_to_semantic(i);
-
-t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0);
-
-if (semName == TGSI_SEMANTIC_INSTANCEID ||
-semName == TGSI_SEMANTIC_VERTEXID) {
-   /* From Gallium perspective, these system values are always
-* integer, and require native integer support.  However, if
-* native integer is supported on the vertex stage but not the
-* pixel stage (e.g, i915g + draw), Mesa will generate IR that
-* assumes these system values are floats. To resolve the
-* inconsistency, we insert a U2F.
-*/
-   struct st_context *st = st_context(ctx);
-   struct pipe_screen *pscreen = st->pipe->screen;
-   assert(procType == PIPE_SHADER_VERTEX);
-   assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, 
PIPE_SHADER_CAP_INTEGERS));
-   (void) pscreen;  /* silence non-debug build warnings */
-   if (!ctx->Const.NativeIntegers) {
-  struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
-  ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), 
t->systemValues[i]);
-  t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
-   }
+   GLbitfield sysInputs = program->info.system_values_read;
+   for (i = 0; sysInputs; i++) {
+  if (sysInputs & (1 << i)) {
+ unsigned semName = _mesa_sysval_to_semantic(i);
+
+ t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0);
+
+ if (semName == TGSI_SEMANTIC_INSTANCEID ||
+ semName == TGSI_SEMANTIC_VERTEXID) {
+/* From Gallium perspective, these system values are always
+ * integer, and require native integer support.  However, if
+ * native integer is supported on the vertex stage but not the
+ * pixel stage (e.g, i915g + draw), Mesa will generate IR that
+ * assumes these system values are floats. To resolve the
+ * inconsistency, we insert a U2F.
+ */
+struct st_context *st = st_context(ctx);
+struct pipe_screen *pscreen = st->pipe->screen;
+assert(procType == PIPE_SHADER_VERTEX);
+assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX,
+   PIPE_SHADER_CAP_INTEGERS));
+(void) pscreen;  /* silence non-debug build warnings */
+if (!ctx->Const.NativeIntegers) {
+   struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg);
+   ureg_U2F(t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X),
+t->systemValues[i]);
+   t->systemValues[i] = ureg_scalar(ureg_src(temp), 0);
 }
+ }
 
-if (procType == PIPE_SHADER_FRAGMENT &&
-semName == TGSI_SEMANTIC_POSITION)
-   emit_wpos(st_context(ctx), t, program, ureg);
+ if (procType == PIPE_SHADER_FRAGMENT &&
+ semName == TGSI_SEMANTIC_POSITION)
+emit_wpos(st_context(ctx), t, program, ureg);
 
-sysInputs &= ~(1 << i);
- }
+  sysInputs &= ~(1 << i);
   }
}
 

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Mesa (master): freedreno/a5xx: timestamp / time-elapsed queries

[Rob Clark]

Module: Mesa
Branch: master
Commit: 76214b99193a117290be9880a83e5ca9d7ec6f36
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76214b99193a117290be9880a83e5ca9d7ec6f36

Author: Rob Clark 
Date:   Tue May 30 07:52:25 2017 -0400

freedreno/a5xx: timestamp / time-elapsed queries

Signed-off-by: Rob Clark 

---

 src/gallium/drivers/freedreno/a5xx/fd5_query.c   | 96 
 src/gallium/drivers/freedreno/freedreno_screen.c |  2 +-
 2 files changed, 97 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_query.c 
b/src/gallium/drivers/freedreno/a5xx/fd5_query.c
index 9019a03089..80b84ce54b 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_query.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_query.c
@@ -144,6 +144,99 @@ static const struct fd_acc_sample_provider 
occlusion_predicate = {
.result = occlusion_predicate_result,
 };
 
+/*
+ * Timestamp Queries:
+ */
+
+static void
+timestamp_resume(struct fd_acc_query *aq, struct fd_batch *batch)
+{
+   struct fd_ringbuffer *ring = batch->draw;
+
+   OUT_PKT7(ring, CP_EVENT_WRITE, 4);
+   OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(CACHE_FLUSH_AND_INV_EVENT) |
+   CP_EVENT_WRITE_0_TIMESTAMP);
+   OUT_RELOCW(ring, query_sample(aq, start));
+   OUT_RING(ring, 0x);
+
+   fd_reset_wfi(batch);
+}
+
+static void
+timestamp_pause(struct fd_acc_query *aq, struct fd_batch *batch)
+{
+   struct fd_ringbuffer *ring = batch->draw;
+
+   OUT_PKT7(ring, CP_EVENT_WRITE, 4);
+   OUT_RING(ring, CP_EVENT_WRITE_0_EVENT(CACHE_FLUSH_AND_INV_EVENT) |
+   CP_EVENT_WRITE_0_TIMESTAMP);
+   OUT_RELOCW(ring, query_sample(aq, stop));
+   OUT_RING(ring, 0x);
+
+   fd_reset_wfi(batch);
+   fd_wfi(batch, ring);
+
+   /* result += stop - start: */
+   OUT_PKT7(ring, CP_MEM_TO_MEM, 9);
+   OUT_RING(ring, CP_MEM_TO_MEM_0_DOUBLE |
+   CP_MEM_TO_MEM_0_NEG_C);
+   OUT_RELOCW(ring, query_sample(aq, result)); /* dst */
+   OUT_RELOC(ring, query_sample(aq, result));  /* srcA */
+   OUT_RELOC(ring, query_sample(aq, stop));/* srcB */
+   OUT_RELOC(ring, query_sample(aq, start));   /* srcC */
+}
+
+static uint64_t
+ticks_to_ns(struct fd_context *ctx, uint32_t ts)
+{
+   /* This is based on the 19.2MHz always-on rbbm timer.
+*
+* TODO we should probably query this value from kernel..
+*/
+   return ts * (10 / 1920);
+}
+
+static void
+time_elapsed_accumulate_result(struct fd_context *ctx, void *buf,
+   union pipe_query_result *result)
+{
+   struct fd5_query_sample *sp = buf;
+   result->u64 = ticks_to_ns(ctx, sp->result);
+}
+
+static void
+timestamp_accumulate_result(struct fd_context *ctx, void *buf,
+   union pipe_query_result *result)
+{
+   struct fd5_query_sample *sp = buf;
+   result->u64 = ticks_to_ns(ctx, sp->result);
+}
+
+static const struct fd_acc_sample_provider time_elapsed = {
+   .query_type = PIPE_QUERY_TIME_ELAPSED,
+   .active = FD_STAGE_DRAW | FD_STAGE_CLEAR,
+   .size = sizeof(struct fd5_query_sample),
+   .resume = timestamp_resume,
+   .pause = timestamp_pause,
+   .result = time_elapsed_accumulate_result,
+};
+
+/* NOTE: timestamp query isn't going to give terribly sensible results
+ * on a tiler.  But it is needed by qapitrace profile heatmap.  If you
+ * add in a binning pass, the results get even more non-sensical.  So
+ * we just return the timestamp on the first tile and hope that is
+ * kind of good enough.
+ */
+
+static const struct fd_acc_sample_provider timestamp = {
+   .query_type = PIPE_QUERY_TIMESTAMP,
+   .active = FD_STAGE_ALL,
+   .size = sizeof(struct fd5_query_sample),
+   .resume = timestamp_resume,
+   .pause = timestamp_pause,
+   .result = timestamp_accumulate_result,
+};
+
 void
 fd5_query_context_init(struct pipe_context *pctx)
 {
@@ -154,4 +247,7 @@ fd5_query_context_init(struct pipe_context *pctx)
 
fd_acc_query_register_provider(pctx, _counter);
fd_acc_query_register_provider(pctx, _predicate);
+
+   fd_acc_query_register_provider(pctx, _elapsed);
+   fd_acc_query_register_provider(pctx, );
 }
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c 
b/src/gallium/drivers/freedreno/freedreno_screen.c
index 99a6d3c9c8..b1501d5af0 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -377,7 +377,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_QUERY_TIME_ELAPSED:
/* only a4xx, requires new enough kernel so we know max_freq: */
-   return 

Mesa (master): freedreno/a5xx: rename query result struct

[Rob Clark]

Module: Mesa
Branch: master
Commit: 5ed9e8fd5dc93e7f8418a6cabc191a6b3ed0c539
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ed9e8fd5dc93e7f8418a6cabc191a6b3ed0c539

Author: Rob Clark 
Date:   Tue May 30 07:30:18 2017 -0400

freedreno/a5xx: rename query result struct

Going to want the same thing for timestamp queries.

Signed-off-by: Rob Clark 

---

 src/gallium/drivers/freedreno/a5xx/fd5_query.c | 45 +-
 1 file changed, 22 insertions(+), 23 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_query.c 
b/src/gallium/drivers/freedreno/a5xx/fd5_query.c
index 2dc4b50897..9019a03089 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_query.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_query.c
@@ -33,24 +33,24 @@
 #include "fd5_format.h"
 #include "fd5_query.h"
 
-/*
- * Occlusion Query:
- *
- * OCCLUSION_COUNTER and OCCLUSION_PREDICATE differ only in how they
- * interpret results
- */
-
-struct PACKED fd5_samples_passed {
+struct PACKED fd5_query_sample {
uint64_t start;
uint64_t result;
uint64_t stop;
 };
 
-#define samples_passed(aq, field)   \
+#define query_sample(aq, field) \
fd_resource((aq)->prsc)->bo,\
-   offsetof(struct fd5_samples_passed, field), \
+   offsetof(struct fd5_query_sample, field),   \
0, 0
 
+/*
+ * Occlusion Query:
+ *
+ * OCCLUSION_COUNTER and OCCLUSION_PREDICATE differ only in how they
+ * interpret results
+ */
+
 static void
 occlusion_resume(struct fd_acc_query *aq, struct fd_batch *batch)
 {
@@ -60,7 +60,7 @@ occlusion_resume(struct fd_acc_query *aq, struct fd_batch 
*batch)
OUT_RING(ring, A5XX_RB_SAMPLE_COUNT_CONTROL_COPY);
 
OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_ADDR_LO, 2);
-   OUT_RELOCW(ring, samples_passed(aq, start));
+   OUT_RELOCW(ring, query_sample(aq, start));
 
OUT_PKT7(ring, CP_EVENT_WRITE, 1);
OUT_RING(ring, ZPASS_DONE);
@@ -75,7 +75,7 @@ occlusion_pause(struct fd_acc_query *aq, struct fd_batch 
*batch)
struct fd_ringbuffer *ring = batch->draw;
 
OUT_PKT7(ring, CP_MEM_WRITE, 4);
-   OUT_RELOCW(ring, samples_passed(aq, stop));
+   OUT_RELOCW(ring, query_sample(aq, stop));
OUT_RING(ring, 0x);
OUT_RING(ring, 0x);
 
@@ -85,7 +85,7 @@ occlusion_pause(struct fd_acc_query *aq, struct fd_batch 
*batch)
OUT_RING(ring, A5XX_RB_SAMPLE_COUNT_CONTROL_COPY);
 
OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_ADDR_LO, 2);
-   OUT_RELOCW(ring, samples_passed(aq, stop));
+   OUT_RELOCW(ring, query_sample(aq, stop));
 
OUT_PKT7(ring, CP_EVENT_WRITE, 1);
OUT_RING(ring, ZPASS_DONE);
@@ -93,7 +93,7 @@ occlusion_pause(struct fd_acc_query *aq, struct fd_batch 
*batch)
 
OUT_PKT7(ring, CP_WAIT_REG_MEM, 6);
OUT_RING(ring, 0x0014);   // XXX
-   OUT_RELOC(ring, samples_passed(aq, stop));
+   OUT_RELOC(ring, query_sample(aq, stop));
OUT_RING(ring, 0x);
OUT_RING(ring, 0x);
OUT_RING(ring, 0x0010);   // XXX
@@ -102,20 +102,19 @@ occlusion_pause(struct fd_acc_query *aq, struct fd_batch 
*batch)
OUT_PKT7(ring, CP_MEM_TO_MEM, 9);
OUT_RING(ring, CP_MEM_TO_MEM_0_DOUBLE |
CP_MEM_TO_MEM_0_NEG_C);
-   OUT_RELOCW(ring, samples_passed(aq, result)); /* dst */
-   OUT_RELOC(ring, samples_passed(aq, result));  /* srcA */
-   OUT_RELOC(ring, samples_passed(aq, stop));/* srcB */
-   OUT_RELOC(ring, samples_passed(aq, start));   /* srcC */
+   OUT_RELOCW(ring, query_sample(aq, result)); /* dst */
+   OUT_RELOC(ring, query_sample(aq, result));  /* srcA */
+   OUT_RELOC(ring, query_sample(aq, stop));/* srcB */
+   OUT_RELOC(ring, query_sample(aq, start));   /* srcC */
 
fd5_context(batch->ctx)->samples_passed_queries--;
-
 }
 
 static void
 occlusion_counter_result(struct fd_context *ctx, void *buf,
union pipe_query_result *result)
 {
-   struct fd5_samples_passed *sp = buf;
+   struct fd5_query_sample *sp = buf;
result->u64 = sp->result;
 }
 
@@ -123,14 +122,14 @@ static void
 occlusion_predicate_result(struct fd_context *ctx, void *buf,
union pipe_query_result *result)
 {
-   struct fd5_samples_passed *sp = buf;
+   struct fd5_query_sample *sp = buf;
result->b = !!sp->result;
 }
 
 static const struct fd_acc_sample_provider occlusion_counter = {
.query_type = PIPE_QUERY_OCCLUSION_COUNTER,
.active = FD_STAGE_DRAW,
-   .size = sizeof(struct fd5_samples_passed),
+   .size = sizeof(struct fd5_query_sample),
.resume = occlusion_resume,
.pause = occlusion_pause,
.result = occlusion_counter_result,
@@ -139,7 +138,7 @@ static const struct 

Mesa (master): freedreno/a5xx: drop WFIs in emit_marker5()

[Rob Clark]

Module: Mesa
Branch: master
Commit: 45e97c994bb5019dd1be35cc76216a4774c8b2b6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45e97c994bb5019dd1be35cc76216a4774c8b2b6

Author: Rob Clark 
Date:   Tue May 30 11:19:12 2017 -0400

freedreno/a5xx: drop WFIs in emit_marker5()

Results in always having at least one WFI between draws, which was
slowing stk down by ~5% and ~10% in xonotic.

(also drop bogus assert while we're at it.)

Signed-off-by: Rob Clark 

---

 src/gallium/drivers/freedreno/freedreno_util.h | 5 -
 1 file changed, 5 deletions(-)

diff --git a/src/gallium/drivers/freedreno/freedreno_util.h 
b/src/gallium/drivers/freedreno/freedreno_util.h
index 6b0fb700d6..a0e1334e78 100644
--- a/src/gallium/drivers/freedreno/freedreno_util.h
+++ b/src/gallium/drivers/freedreno/freedreno_util.h
@@ -410,13 +410,8 @@ emit_marker5(struct fd_ringbuffer *ring, int scratch_idx)
extern unsigned marker_cnt;
 //XXX  unsigned reg = REG_A5XX_CP_SCRATCH_REG(scratch_idx);
unsigned reg = 0x0b78 + scratch_idx;
-   assert(reg != HW_QUERY_BASE_REG);
-   if (reg == HW_QUERY_BASE_REG)
-   return;
-   OUT_WFI5(ring);
OUT_PKT4(ring, reg, 1);
OUT_RING(ring, ++marker_cnt);
-   OUT_WFI5(ring);
 }
 
 /* helper to get numeric value from environment variable..  mostly

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Mesa (master): freedreno: update generated headers

[Rob Clark]

Module: Mesa
Branch: master
Commit: 8c65f17c3bdf4c9ed4b82d9f9f2605e4c5cecdb8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c65f17c3bdf4c9ed4b82d9f9f2605e4c5cecdb8

Author: Rob Clark 
Date:   Tue May 30 06:36:28 2017 -0400

freedreno: update generated headers

Signed-off-by: Rob Clark 

---

 src/gallium/drivers/freedreno/a2xx/a2xx.xml.h |   6 +-
 src/gallium/drivers/freedreno/a3xx/a3xx.xml.h |   6 +-
 src/gallium/drivers/freedreno/a4xx/a4xx.xml.h |  44 +-
 src/gallium/drivers/freedreno/a5xx/a5xx.xml.h | 573 +-
 src/gallium/drivers/freedreno/adreno_common.xml.h |   6 +-
 src/gallium/drivers/freedreno/adreno_pm4.xml.h|   7 +-
 6 files changed, 624 insertions(+), 18 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h 
b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
index 0d6987946c..8171255b76 100644
--- a/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
+++ b/src/gallium/drivers/freedreno/a2xx/a2xx.xml.h
@@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from 
are:
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   
1572 bytes, from 2017-05-17 13:21:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml  (  
37162 bytes, from 2017-05-17 13:21:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  
13324 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(  
31541 bytes, from 2017-05-17 13:21:27)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(  
31668 bytes, from 2017-05-30 16:52:40)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml  (  
83840 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml  ( 
110757 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml  ( 
105446 bytes, from 2017-05-17 20:33:08)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml  ( 
111898 bytes, from 2017-05-30 19:25:27)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml  ( 
136835 bytes, from 2017-05-30 20:06:17)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml (   
1773 bytes, from 2017-05-17 13:21:27)
 
 Copyright (C) 2013-2017 by the following authors:
diff --git a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h 
b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
index 7a68ff3926..c18fa19f67 100644
--- a/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
+++ b/src/gallium/drivers/freedreno/a3xx/a3xx.xml.h
@@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from 
are:
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   
1572 bytes, from 2017-05-17 13:21:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml  (  
37162 bytes, from 2017-05-17 13:21:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  
13324 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(  
31541 bytes, from 2017-05-17 13:21:27)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(  
31668 bytes, from 2017-05-30 16:52:40)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml  (  
83840 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml  ( 
110757 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml  ( 
105446 bytes, from 2017-05-17 20:33:08)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml  ( 
111898 bytes, from 2017-05-30 19:25:27)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/a5xx.xml  ( 
136835 bytes, from 2017-05-30 20:06:17)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml (   
1773 bytes, from 2017-05-17 13:21:27)
 
 Copyright (C) 2013-2017 by the following authors:
diff --git a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h 
b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
index 7b74c3f2c8..73afc14fe8 100644
--- a/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
+++ b/src/gallium/drivers/freedreno/a4xx/a4xx.xml.h
@@ -12,10 +12,10 @@ The rules-ng-ng source files this header was generated from 
are:
 - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   
1572 bytes, from 2017-05-17 13:21:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml  (  
37162 bytes, from 2017-05-17 13:21:27)
 - /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  
13324 bytes, from 2017-05-17 13:21:27)
-- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(  
31541 bytes, from 2017-05-17 13:21:27)
+- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml(  
31668 bytes, 

Mesa (master): i965: Delete dead old-school packing structs.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 236ffbc44289872b1d970347f8bb3013ef0e3ef6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=236ffbc44289872b1d970347f8bb3013ef0e3ef6

Author: Kenneth Graunke 
Date:   Tue May 30 15:13:08 2017 -0700

i965: Delete dead old-school packing structs.

Trivial.

---

 src/mesa/drivers/dri/i965/brw_structs.h | 175 
 1 file changed, 175 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_structs.h 
b/src/mesa/drivers/dri/i965/brw_structs.h
index f5774138e2..35db2f566c 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -180,106 +180,6 @@ struct brw_clip_unit_state
float viewport_ymax;
 };
 
-struct gen6_blend_state
-{
-   struct {
-  unsigned dest_blend_factor:5;
-  unsigned source_blend_factor:5;
-  unsigned pad3:1;
-  unsigned blend_func:3;
-  unsigned pad2:1;
-  unsigned ia_dest_blend_factor:5;
-  unsigned ia_source_blend_factor:5;
-  unsigned pad1:1;
-  unsigned ia_blend_func:3;
-  unsigned pad0:1;
-  unsigned ia_blend_enable:1;
-  unsigned blend_enable:1;
-   } blend0;
-
-   struct {
-  unsigned post_blend_clamp_enable:1;
-  unsigned pre_blend_clamp_enable:1;
-  unsigned clamp_range:2;
-  unsigned pad0:4;
-  unsigned x_dither_offset:2;
-  unsigned y_dither_offset:2;
-  unsigned dither_enable:1;
-  unsigned alpha_test_func:3;
-  unsigned alpha_test_enable:1;
-  unsigned pad1:1;
-  unsigned logic_op_func:4;
-  unsigned logic_op_enable:1;
-  unsigned pad2:1;
-  unsigned write_disable_b:1;
-  unsigned write_disable_g:1;
-  unsigned write_disable_r:1;
-  unsigned write_disable_a:1;
-  unsigned pad3:1;
-  unsigned alpha_to_coverage_dither:1;
-  unsigned alpha_to_one:1;
-  unsigned alpha_to_coverage:1;
-   } blend1;
-};
-
-struct gen6_color_calc_state
-{
-   struct {
-  unsigned alpha_test_format:1;
-  unsigned pad0:14;
-  unsigned round_disable:1;
-  unsigned bf_stencil_ref:8;
-  unsigned stencil_ref:8;
-   } cc0;
-
-   union {
-  float alpha_ref_f;
-  struct {
-unsigned ui:8;
-unsigned pad0:24;
-  } alpha_ref_fi;
-   } cc1;
-
-   float constant_r;
-   float constant_g;
-   float constant_b;
-   float constant_a;
-};
-
-struct gen6_depth_stencil_state
-{
-   struct {
-  unsigned pad0:3;
-  unsigned bf_stencil_pass_depth_pass_op:3;
-  unsigned bf_stencil_pass_depth_fail_op:3;
-  unsigned bf_stencil_fail_op:3;
-  unsigned bf_stencil_func:3;
-  unsigned bf_stencil_enable:1;
-  unsigned pad1:2;
-  unsigned stencil_write_enable:1;
-  unsigned stencil_pass_depth_pass_op:3;
-  unsigned stencil_pass_depth_fail_op:3;
-  unsigned stencil_fail_op:3;
-  unsigned stencil_func:3;
-  unsigned stencil_enable:1;
-   } ds0;
-
-   struct {
-  unsigned bf_stencil_write_mask:8;
-  unsigned bf_stencil_test_mask:8;
-  unsigned stencil_write_mask:8;
-  unsigned stencil_test_mask:8;
-   } ds1;
-
-   struct {
-  unsigned pad0:26;
-  unsigned depth_write_enable:1;
-  unsigned depth_test_func:3;
-  unsigned pad1:1;
-  unsigned depth_test_enable:1;
-   } ds2;
-};
-
 struct brw_cc_unit_state
 {
struct
@@ -431,14 +331,6 @@ struct brw_sf_unit_state
 
 };
 
-struct gen6_scissor_rect
-{
-   unsigned xmin:16;
-   unsigned ymin:16;
-   unsigned xmax:16;
-   unsigned ymax:16;
-};
-
 struct brw_gs_unit_state
 {
struct thread0 thread0;
@@ -563,71 +455,4 @@ struct gen5_sampler_default_color {
uint8_t b[4];
 };
 
-struct brw_clipper_viewport
-{
-   float xmin;
-   float xmax;
-   float ymin;
-   float ymax;
-};
-
-struct brw_cc_viewport
-{
-   float min_depth;
-   float max_depth;
-};
-
-struct brw_sf_viewport
-{
-   struct {
-  float m00;
-  float m11;
-  float m22;
-  float m30;
-  float m31;
-  float m32;
-   } viewport;
-
-   /* scissor coordinates are inclusive */
-   struct {
-  int16_t xmin;
-  int16_t ymin;
-  int16_t xmax;
-  int16_t ymax;
-   } scissor;
-};
-
-struct gen6_sf_viewport {
-   float m00;
-   float m11;
-   float m22;
-   float m30;
-   float m31;
-   float m32;
-
-   unsigned pad0[2];
-};
-
-struct gen7_sf_clip_viewport {
-   struct {
-  float m00;
-  float m11;
-  float m22;
-  float m30;
-  float m31;
-  float m32;
-   } viewport;
-
-   unsigned pad0[2];
-
-   struct {
-  float xmin;
-  float xmax;
-  float ymin;
-  float ymax;
-   } guardband;
-
-   float pad1[4];
-};
-
 #endif

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Mesa (master): 24 new commits

[Tim Rowley]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c606edb578a5a98d7afe7c66dc340548c3d12add
Author: Tim Rowley 
Date:   Mon May 22 18:56:59 2017 -0500

swr/rast: code cleanup (no functional change)

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b10c9507cee20edc7cd41682b50c62bb8abef85b
Author: Tim Rowley 
Date:   Wed May 24 13:43:48 2017 -0500

swr/rast: whitespace changes

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac9d7c3d33070ca3ae2cbe482e1766ba7198d44a
Author: Tim Rowley 
Date:   Wed May 24 13:43:33 2017 -0500

swr/rast: code cleanup (no functional change)

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9e999ae322cb625bbd97d2b83b9c8fc2f478803
Author: Tim Rowley 
Date:   Thu May 18 15:44:22 2017 -0500

swr/rast: allow early-z if shader uses depth value

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=628fefc15c41e6a300e17a7a1940185b69ccf708
Author: Tim Rowley 
Date:   Thu May 18 13:08:06 2017 -0500

swr/rast: move wireframe/point triangle binning after culling

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b76dea5d1f40fb83f8047f1fcf4ca8260f9c245
Author: Tim Rowley 
Date:   Thu May 18 11:35:58 2017 -0500

swr/rast: remove unused functions

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d91402fefaf3640959301bfb4ff285d91f05f072
Author: Tim Rowley 
Date:   Thu May 18 10:56:20 2017 -0500

swr/rast: code cleanup (no functional change)

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e271a763eb6f3c2836f4d42f6bcd8e55870f3fe
Author: Tim Rowley 
Date:   Thu May 18 10:55:41 2017 -0500

swr/rast: move binner utility functions to binner.h

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ea9a30f50dabe60fe95c9077457915dd5ed52c4
Author: Tim Rowley 
Date:   Wed May 17 17:39:33 2017 -0500

swr/rast: SIMD16 FE - fix/use SIMD16 calcDeterminantIntVertical()

Stop double pumping the SIMD8 version.

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb9f7bd717dbaf94a744d352029603a273c7d332
Author: Tim Rowley 
Date:   Tue May 16 16:51:58 2017 -0500

swr/rast: add renderTargetArrayIndex to SWR_PS_CONTEXT

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2438932b7e66c5cd496bdd19e6d96d168b3dd2c8
Author: Tim Rowley 
Date:   Tue May 16 10:25:21 2017 -0500

swr/rast: make simd16 logicops avx512f safe

Express the simd16 logicops in terms of avx512f instructions.

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7be26a2d35c2e91fd9f3195b012c163d562eb9df
Author: Tim Rowley 
Date:   Mon May 15 12:33:21 2017 -0500

swr/rast: SIMD16 FE - add SIMD16 types to jitter

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3c93d8ddf2bd8b427396e1320fcd65fb44467e8
Author: Tim Rowley 
Date:   Fri May 12 12:57:46 2017 -0500

swr/rast: SIMD16 FE - fix PA_STATE_OP::Reset()

Fixes instanced GS.

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd14c407341b8546993e5bb0c894db8dfb87349c
Author: Tim Rowley 
Date:   Tue May 9 15:40:55 2017 -0500

swr/rast: SIMD16 FE - simplify/refactor StreamOut

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a230af8b44244e5b78a8d879dddedfeb471f80c4
Author: Tim Rowley 
Date:   Mon May 8 13:32:18 2017 -0500

swr/rast: SIMD16 FE - fix conservative rasterization

Reviewed-by: Bruce Cherniak 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f64aea0959af955841bbde96885aebacb44b4aaf
Author: Tim Rowley 
Date:   Mon May 8 12:45:20 2017 -0500

swr/rast: SIMD16 FE - interleaved simdvertex output in GS

Eliminates conversion 

Mesa (master): i965: Set the "Float Blend Optimization Enable" bit on Gen9+.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: a8fde221a8f9a561c592a7d51a656d10037c7912
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8fde221a8f9a561c592a7d51a656d10037c7912

Author: Kenneth Graunke 
Date:   Tue May 23 21:03:14 2017 -0700

i965: Set the "Float Blend Optimization Enable" bit on Gen9+.

This is woefully undocumented.  It's some kind of optimization that
avoids unnecessary render target reads when blending with a floating
point render target, using independent alpha blending modes.

The internal documentation indicates that this bit exists on Cherryview
as well, but the other driver doesn't appear to set it on that platform.
There's also some confusing wording that indicates that it may exist on
Broadwell, but the documentation says it's reserved, so who knows.

I was not able to find any workload that benefited from setting this
bit, but it seems like a good idea to set it nonetheless.

Reviewed-by: Plamena Manolova 
Acked-by: Jason Ekstrand 

---

 src/mesa/drivers/dri/i965/brw_defines.h  | 1 +
 src/mesa/drivers/dri/i965/brw_state_upload.c | 4 +++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
b/src/mesa/drivers/dri/i965/brw_defines.h
index ace83ef57a..312dddafd7 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1609,6 +1609,7 @@ enum brw_pixel_shader_coverage_mask_mode {
 #define GEN7_GPGPU_DISPATCHDIMZ 0x2508
 
 #define GEN7_CACHE_MODE_1   0x7004
+# define GEN9_FLOAT_BLEND_OPTIMIZATION_ENABLE (1 << 4)
 # define GEN8_HIZ_NP_PMA_FIX_ENABLE(1 << 11)
 # define GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE (1 << 13)
 # define GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC (1 << 1)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index bcb7ff1231..4647f1c41e 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -65,7 +65,9 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
   BEGIN_BATCH(3);
   OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
   OUT_BATCH(GEN7_CACHE_MODE_1);
-  OUT_BATCH(REG_MASK(GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC) |
+  OUT_BATCH(REG_MASK(GEN9_FLOAT_BLEND_OPTIMIZATION_ENABLE) |
+REG_MASK(GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC) |
+GEN9_FLOAT_BLEND_OPTIMIZATION_ENABLE |
 GEN9_PARTIAL_RESOLVE_DISABLE_IN_VC);
   ADVANCE_BATCH();
}

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Mesa (master): genxml: Add Gen9 CACHE_MODE_1 definitons.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 53368b008e62ddfbda896b5f0d3c69415052a845
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53368b008e62ddfbda896b5f0d3c69415052a845

Author: Kenneth Graunke 
Date:   Tue May 23 21:30:02 2017 -0700

genxml: Add Gen9 CACHE_MODE_1 definitons.

These were already in gen8.xml but not gen9.xml.  There are a few new
fields and a couple that have changed.  These are all documented in the
Skylake PRM, Volume 2c Command Reference: Registers, Part 1.

Reviewed-by: Plamena Manolova 
Acked-by: Jason Ekstrand 

---

 src/intel/genxml/gen9.xml | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index a2c2020d14..3e9e88e219 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -3682,6 +3682,36 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
   
 
 

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Mesa (master): i965: Fix type of intel_update_image_buffers::format

[Chad Versace]

Module: Mesa
Branch: master
Commit: a90a15d6387a095cda06efe4e030fbf4c3838c21
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a90a15d6387a095cda06efe4e030fbf4c3838c21

Author: Chad Versace 
Date:   Tue May 23 16:33:50 2017 -0700

i965: Fix type of intel_update_image_buffers::format

It's a mesa_format, not an unsigned int.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/brw_context.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index c815a0454d..adae921e57 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1739,7 +1739,7 @@ intel_update_image_buffers(struct brw_context *brw, 
__DRIdrawable *drawable)
struct intel_renderbuffer *front_rb;
struct intel_renderbuffer *back_rb;
struct __DRIimageList images;
-   unsigned int format;
+   mesa_format format;
uint32_t buffer_mask = 0;
int ret;
 

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Mesa (master): i965: Rename intel_create_renderbuffer

[Chad Versace]

Module: Mesa
Branch: master
Commit: 77a1eefa3cef93d5988ee5c00f1b8c735c09b83f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=77a1eefa3cef93d5988ee5c00f1b8c735c09b83f

Author: Chad Versace 
Date:   Tue May 23 16:29:25 2017 -0700

i965: Rename intel_create_renderbuffer

The name is misleading because the function is unrelated to GL
renderbuffers. Rename it to intel_create_winsys_renderbuffer.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/intel_fbo.c| 11 ++-
 src/mesa/drivers/dri/i965/intel_fbo.h|  2 +-
 src/mesa/drivers/dri/i965/intel_screen.c |  4 ++--
 3 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c 
b/src/mesa/drivers/dri/i965/intel_fbo.c
index 60a6d0f455..d3905a5f7f 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -431,13 +431,14 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct 
gl_renderbuffer *rb,
 }
 
 /**
- * Create a new intel_renderbuffer which corresponds to an on-screen window,
- * not a user-created renderbuffer.
+ * Create an intel_renderbuffer for a __DRIdrawable. This function is
+ * unrelated to GL renderbuffers (that is, those created by
+ * glGenRenderbuffers).
  *
  * \param num_samples must be quantized.
  */
 struct intel_renderbuffer *
-intel_create_renderbuffer(mesa_format format, unsigned num_samples)
+intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples)
 {
struct intel_renderbuffer *irb;
struct gl_renderbuffer *rb;
@@ -469,7 +470,7 @@ intel_create_renderbuffer(mesa_format format, unsigned 
num_samples)
 
 /**
  * Private window-system buffers (as opposed to ones shared with the display
- * server created with intel_create_renderbuffer()) are most similar in their
+ * server created with intel_create_winsys_renderbuffer()) are most similar in 
their
  * handling to user-created renderbuffers, but they have a resize handler that
  * may be called at intel_update_renderbuffers() time.
  *
@@ -480,7 +481,7 @@ intel_create_private_renderbuffer(mesa_format format, 
unsigned num_samples)
 {
struct intel_renderbuffer *irb;
 
-   irb = intel_create_renderbuffer(format, num_samples);
+   irb = intel_create_winsys_renderbuffer(format, num_samples);
irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage;
 
return irb;
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h 
b/src/mesa/drivers/dri/i965/intel_fbo.h
index 08b82e8934..2d2ef1ebc6 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.h
+++ b/src/mesa/drivers/dri/i965/intel_fbo.h
@@ -167,7 +167,7 @@ intel_rb_format(const struct intel_renderbuffer *rb)
 }
 
 extern struct intel_renderbuffer *
-intel_create_renderbuffer(mesa_format format, unsigned num_samples);
+intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples);
 
 struct intel_renderbuffer *
 intel_create_private_renderbuffer(mesa_format format, unsigned num_samples);
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index 24123e7986..22f6d9af03 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1200,11 +1200,11 @@ intelCreateBuffer(__DRIscreen *dri_screen,
}
 
/* setup the hardware-based renderbuffers */
-   rb = intel_create_renderbuffer(rgbFormat, num_samples);
+   rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_FRONT_LEFT, >Base.Base);
 
if (mesaVis->doubleBufferMode) {
-  rb = intel_create_renderbuffer(rgbFormat, num_samples);
+  rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples);
   _mesa_attach_and_own_rb(fb, BUFFER_BACK_LEFT, >Base.Base);
}
 

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Mesa (master): i965: Move func to right comment block in brw_context.h

[Chad Versace]

Module: Mesa
Branch: master
Commit: 6e325f12030698392ea8ca0d1be4eb95655209a7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e325f12030698392ea8ca0d1be4eb95655209a7

Author: Chad Versace 
Date:   Tue May 23 17:02:16 2017 -0700

i965: Move func to right comment block in brw_context.h

brw_init_surface_formats() is defined in brw_surface_formats.c, not
brw_wm_surface_state.c.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/brw_context.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index ccedeccf30..f45fc2479c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1388,7 +1388,6 @@ brw_get_index_type(unsigned index_size)
 void brw_prepare_vertices(struct brw_context *brw);
 
 /* brw_wm_surface_state.c */
-void brw_init_surface_formats(struct brw_context *brw);
 void brw_create_constant_surface(struct brw_context *brw,
  struct brw_bo *bo,
  uint32_t offset,
@@ -1420,6 +1419,7 @@ void brw_upload_image_surfaces(struct brw_context *brw,
struct brw_stage_prog_data *prog_data);
 
 /* brw_surface_formats.c */
+void brw_init_surface_formats(struct brw_context *brw);
 bool brw_render_target_supported(struct brw_context *brw,
  struct gl_renderbuffer *rb);
 uint32_t brw_depth_format(struct brw_context *brw, mesa_format format);

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Mesa (master): i965/dri: Combine declaration and assignment in intelCreateBuffer

[Chad Versace]

Module: Mesa
Branch: master
Commit: e8a0a5d7f90fc9e21fd6f47fbb3d12765d5bb8fd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8a0a5d7f90fc9e21fd6f47fbb3d12765d5bb8fd

Author: Chad Versace 
Date:   Tue May 23 16:07:10 2017 -0700

i965/dri: Combine declaration and assignment in intelCreateBuffer

Trivial cleanup.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/intel_screen.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index 5de6f18b84..24123e7986 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1169,12 +1169,11 @@ intelCreateBuffer(__DRIscreen *dri_screen,
mesa_format rgbFormat;
unsigned num_samples =
   intel_quantize_num_samples(screen, mesaVis->samples);
-   struct gl_framebuffer *fb;
 
if (isPixmap)
   return false;
 
-   fb = CALLOC_STRUCT(gl_framebuffer);
+   struct gl_framebuffer *fb = CALLOC_STRUCT(gl_framebuffer);
if (!fb)
   return false;
 

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Mesa (master): i965: Add whitespace in intel_update_image_buffers()

[Chad Versace]

Module: Mesa
Branch: master
Commit: da042d951c9d503e25d43a27c2d707fa134a512c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da042d951c9d503e25d43a27c2d707fa134a512c

Author: Chad Versace 
Date:   Tue May 23 16:37:32 2017 -0700

i965: Add whitespace in intel_update_image_buffers()

Improve readability.  Add an empty line between two large 'if' blocks.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/brw_context.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index 825912b7b5..3e3fe2d0ed 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1779,6 +1779,7 @@ intel_update_image_buffers(struct brw_context *brw, 
__DRIdrawable *drawable)
 images.front,
 __DRI_IMAGE_BUFFER_FRONT);
}
+
if (images.image_mask & __DRI_IMAGE_BUFFER_BACK) {
   drawable->w = images.back->width;
   drawable->h = images.back->height;

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Mesa (master): i965: Document type of GLuint __DRIimage::format

[Chad Versace]

Module: Mesa
Branch: master
Commit: f5702230e0071c272d2dffd00b317d68042eb783
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5702230e0071c272d2dffd00b317d68042eb783

Author: Chad Versace 
Date:   Tue May 23 16:46:59 2017 -0700

i965: Document type of GLuint __DRIimage::format

It's either a mesa_format or mesa_array_format.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/intel_image.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_image.h 
b/src/mesa/drivers/dri/i965/intel_image.h
index ad426910e4..cf0610540f 100644
--- a/src/mesa/drivers/dri/i965/intel_image.h
+++ b/src/mesa/drivers/dri/i965/intel_image.h
@@ -70,7 +70,7 @@ struct __DRIimageRec {
uint32_t pitch; /**< in bytes */
GLenum internal_format;
uint32_t dri_format;
-   GLuint format;
+   GLuint format; /**< mesa_format or mesa_array_format */
uint64_t modifier; /**< fb modifier (fourcc) */
uint32_t offset;
 

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Mesa (master): i965: Fix type of brw_context::render_target_format[]

[Chad Versace]

Module: Mesa
Branch: master
Commit: 9601b41a33bf6594366eedf6cc4d1c88804a41b7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9601b41a33bf6594366eedf6cc4d1c88804a41b7

Author: Chad Versace 
Date:   Fri May 26 14:53:22 2017 -0700

i965: Fix type of brw_context::render_target_format[]

It's an array of isl_format, not uint32_t. This patch updates every
reference to render_target_format[] git-grep.

Trivial cleanup. No change in behavior.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/brw_blorp.c| 4 ++--
 src/mesa/drivers/dri/i965/brw_context.h  | 2 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c 
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 7ffe8b885a..9030fe7e76 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -920,7 +920,7 @@ do_single_blorp_clear(struct brw_context *brw, struct 
gl_framebuffer *fb,
   struct blorp_batch batch;
   blorp_batch_init(>blorp, , brw, 0);
   blorp_fast_clear(, ,
-   (enum isl_format)brw->render_target_format[format],
+   brw->render_target_format[format],
level, logical_layer, num_layers,
x0, y0, x1, y1);
   blorp_batch_finish();
@@ -946,7 +946,7 @@ do_single_blorp_clear(struct brw_context *brw, struct 
gl_framebuffer *fb,
   struct blorp_batch batch;
   blorp_batch_init(>blorp, , brw, 0);
   blorp_clear(, ,
-  (enum isl_format)brw->render_target_format[format],
+  brw->render_target_format[format],
   ISL_SWIZZLE_IDENTITY,
   level, irb_logical_mt_layer(irb), num_layers,
   x0, y0, x1, y1,
diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index f45fc2479c..c15abe1d48 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1161,7 +1161,7 @@ struct brw_context
const struct brw_tracked_state render_atoms[76];
const struct brw_tracked_state compute_atoms[11];
 
-   uint32_t render_target_format[MESA_FORMAT_COUNT];
+   enum isl_format render_target_format[MESA_FORMAT_COUNT];
bool format_supported_as_render_target[MESA_FORMAT_COUNT];
 
/* PrimitiveRestart */
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c 
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index a0fed6096d..e019adcf2d 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -986,7 +986,7 @@ gen4_update_renderbuffer_surface(struct brw_context *brw,
struct intel_mipmap_tree *mt = irb->mt;
uint32_t *surf;
uint32_t tile_x, tile_y;
-   uint32_t format = 0;
+   enum isl_format format;
uint32_t offset;
/* _NEW_BUFFERS */
mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb));
@@ -1172,7 +1172,7 @@ update_renderbuffer_read_surfaces(struct brw_context *brw)
  uint32_t *surf_offset = >wm.base.surf_offset[surf_index];
 
  if (irb) {
-const unsigned format = brw->render_target_format[
+const enum isl_format format = brw->render_target_format[
_mesa_get_render_format(ctx, intel_rb_format(irb))];
 assert(isl_format_supports_sampling(>screen->devinfo,
 format));

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Mesa (master): i965/dri: Rewrite comment for intelCreateBuffer

[Chad Versace]

Module: Mesa
Branch: master
Commit: 85dd3e4de11992162da48bb6b090a78baa578300
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85dd3e4de11992162da48bb6b090a78baa578300

Author: Chad Versace 
Date:   Tue May 23 16:04:55 2017 -0700

i965/dri: Rewrite comment for intelCreateBuffer

The old comment pinned this function to X11 windows. In reality, this
function serves more than X11 and more than just windows.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/intel_screen.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index 9842de6742..5de6f18b84 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1152,7 +1152,11 @@ intelDestroyScreen(__DRIscreen * sPriv)
 
 
 /**
- * This is called when we need to set up GL rendering to a new X window.
+ * Create a gl_framebuffer and attach it to __DRIdrawable::driverPrivate.
+ *
+ *_This implements driDriverAPI::createNewDrawable, which the DRI layer calls
+ * when creating a EGLSurface, GLXDrawable, or GLXPixmap. Despite the name,
+ * this does not allocate GPU memory.
  */
 static GLboolean
 intelCreateBuffer(__DRIscreen *dri_screen,

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Mesa (master): i965: Move an 'i' declaration into its 'for' loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: b86e079ab7854a97a3bb2ce2714ca1550a6ad130
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b86e079ab7854a97a3bb2ce2714ca1550a6ad130

Author: Chad Versace 
Date:   Tue May 23 16:35:34 2017 -0700

i965: Move an 'i' declaration into its 'for' loop

In intel_update_dri2_buffers().
Trivial cleanup.

Reviewed-by: Tapani Pälli 

---

 src/mesa/drivers/dri/i965/brw_context.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index adae921e57..825912b7b5 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1410,7 +1410,7 @@ intel_update_dri2_buffers(struct brw_context *brw, 
__DRIdrawable *drawable)
struct gl_framebuffer *fb = drawable->driverPrivate;
struct intel_renderbuffer *rb;
__DRIbuffer *buffers = NULL;
-   int i, count;
+   int count;
const char *region_name;
 
/* Set this up front, so that in case our buffers get invalidated
@@ -1426,7 +1426,7 @@ intel_update_dri2_buffers(struct brw_context *brw, 
__DRIdrawable *drawable)
if (buffers == NULL)
   return;
 
-   for (i = 0; i < count; i++) {
+   for (int i = 0; i < count; i++) {
switch (buffers[i].attachment) {
case __DRI_BUFFER_FRONT_LEFT:
rb = intel_get_renderbuffer(fb, BUFFER_FRONT_LEFT);

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Mesa (master): mesa: Avoid leaking surface in st_renderbuffer_delete

[Emil Velikov]

Module: Mesa
Branch: master
Commit: fd6c2a3f3eb7f5f3077fb95b1441ddaa43b806fe
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd6c2a3f3eb7f5f3077fb95b1441ddaa43b806fe

Author: Bartosz Tomczyk 
Date:   Sat Apr 29 16:37:45 2017 +0200

mesa: Avoid leaking surface in st_renderbuffer_delete

v2: add comment in code

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100741
Fixes: a5e733c6b52 mesa: drop current draw/read buffer when ctx is released
Reviewed-by: Rob Clark  (v1)
Reviewed-by: Emil Velikov 

---

 src/mesa/main/context.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 3570f94f5a..9aa6fb64b2 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -1664,17 +1664,23 @@ _mesa_make_current( struct gl_context *newCtx,
   _mesa_flush(curCtx);
 
/* We used to call _glapi_check_multithread() here.  Now do it in drivers */
-   _glapi_set_context((void *) newCtx);
-   assert(_mesa_get_current_context() == newCtx);
 
if (!newCtx) {
   _glapi_set_dispatch(NULL);  /* none current */
+  /* We need old ctx to correctly release Draw/ReadBuffer
+   * and avoid a surface leak in st_renderbuffer_delete.
+   * Therefore, first drop buffers then set new ctx to NULL.
+   */
   if (curCtx) {
  _mesa_reference_framebuffer(>WinSysDrawBuffer, NULL);
  _mesa_reference_framebuffer(>WinSysReadBuffer, NULL);
   }
+  _glapi_set_context(NULL);
+  assert(_mesa_get_current_context() == NULL);
}
else {
+  _glapi_set_context((void *) newCtx);
+  assert(_mesa_get_current_context() == newCtx);
   _glapi_set_dispatch(newCtx->CurrentClientDispatch);
 
   if (drawBuffer && readBuffer) {

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Mesa (master): dri: introduce dmabuf format modifier related handles

[Eric Engeström]

Module: Mesa
Branch: master
Commit: c5929634a01eb0adcc0cc59c4c9b6304492d74f5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5929634a01eb0adcc0cc59c4c9b6304492d74f5

Author: Varad Gautam 
Date:   Tue May 30 17:41:36 2017 +0530

dri: introduce dmabuf format modifier related handles

these allow dmabuf import with modifiers, and supported format and
modifier queries, which are used to implement
EGL_EXT_image_dma_buf_import_modifiers.

v2:
- squash dmabuf queries into DRIimage version 15 (Jason Ekstrand).
- add external_only param to queryDmaBufModifiers (Emil, Daniel Stone)
- pass a single modifier form createImageFromDmaBufs2 since all planes have
the same modifier (Jason Ekstrand)

Signed-off-by: Pekka Paalanen 
Signed-off-by: Varad Gautam 
Reviewed-by: Daniel Stone 
Reviewed-by: Emil Velikov 
Reviewed-by: Eric Engestrom 

---

 include/GL/internal/dri_interface.h | 63 -
 1 file changed, 62 insertions(+), 1 deletion(-)

diff --git a/include/GL/internal/dri_interface.h 
b/include/GL/internal/dri_interface.h
index ffe99499fc..fc2d4bbe22 100644
--- a/include/GL/internal/dri_interface.h
+++ b/include/GL/internal/dri_interface.h
@@ -1137,7 +1137,7 @@ struct __DRIdri2ExtensionRec {
  * extensions.
  */
 #define __DRI_IMAGE "DRI_IMAGE"
-#define __DRI_IMAGE_VERSION 14
+#define __DRI_IMAGE_VERSION 15
 
 /**
  * These formats correspond to the similarly named MESA_FORMAT_*
@@ -1494,6 +1494,67 @@ struct __DRIimageExtensionRec {
const uint64_t *modifiers,
const unsigned int modifier_count,
void *loaderPrivate);
+
+   /*
+* Like createImageFromDmaBufs, but takes also format modifiers.
+*
+* For EGL_EXT_image_dma_buf_import_modifiers.
+*
+* \since 15
+*/
+   __DRIimage *(*createImageFromDmaBufs2)(__DRIscreen *screen,
+  int width, int height, int fourcc,
+  uint64_t modifier,
+  int *fds, int num_fds,
+  int *strides, int *offsets,
+  enum __DRIYUVColorSpace color_space,
+  enum __DRISampleRange sample_range,
+  enum __DRIChromaSiting horiz_siting,
+  enum __DRIChromaSiting vert_siting,
+  unsigned *error,
+  void *loaderPrivate);
+
+   /*
+* dmabuf format query to support EGL_EXT_image_dma_buf_import_modifiers.
+*
+* \param max  Maximum number of formats that can be accomodated into
+* \param formats. If zero, no formats are returned -
+* instead, the driver returns the total number of
+* supported dmabuf formats in \param count.
+* \param formats  Buffer to fill formats into.
+* \param countCount of formats returned, or, total number of
+* supported formats in case \param max is zero.
+*
+* Returns true on success.
+*
+* \since 15
+*/
+   GLboolean (*queryDmaBufFormats)(__DRIscreen *screen, int max,
+   int *formats, int *count);
+
+   /*
+* dmabuf format modifier query for a given format to support
+* EGL_EXT_image_dma_buf_import_modifiers.
+*
+* \param fourccThe format to query modifiers for. If this format
+*  is not supported by the driver, return false.
+* \param max   Maximum number of modifiers that can be accomodated in
+*  \param modifiers. If zero, no modifiers are returned -
+*  instead, the driver returns the total number of
+*  modifiers for \param format in \param count.
+* \param modifiers Buffer to fill modifiers into.
+* \param count Count of the modifiers returned, or, total number of
+*  supported modifiers for \param fourcc in case
+*  \param max is zero.
+*
+* Returns true upon success.
+*
+* \since 15
+*/
+   GLboolean (*queryDmaBufModifiers)(__DRIscreen *screen, int fourcc,
+ int max, uint64_t *modifiers,
+ unsigned int *external_only,
+ int *count);
 };
 
 

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Mesa (master): egl: implement eglQueryDmaBufModifiersEXT

[Eric Engeström]

Module: Mesa
Branch: master
Commit: de3c459bbd617275a9ed57be42f7c594bae04116
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de3c459bbd617275a9ed57be42f7c594bae04116

Author: Varad Gautam 
Date:   Tue May 30 17:41:39 2017 +0530

egl: implement eglQueryDmaBufModifiersEXT

query and return supported dmabuf format modifiers for
EGL_EXT_image_dma_buf_import_modifiers.

v2: move format check to the driver instead of making format queries
   here and then checking.
v3: Check DRIimageExtension version before query (Daniel Stone)
v4:
- move to DRIimageExtension version 15, check queryDmaBufModifiers before
  calling (Jason Ekstrand)
- pass external_only to the driver instead of setting as EGL_TRUE here
  (Emil Velikov, Daniel Stone)

Signed-off-by: Varad Gautam 
Reviewed-by: Daniel Stone 
Reviewed-by: Emil Velikov 
Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/egl_dri2.c | 33 +
 src/egl/main/eglapi.c   | 20 
 src/egl/main/eglapi.h   |  5 +
 src/egl/main/eglentrypoint.h|  1 +
 4 files changed, 59 insertions(+)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index c2715528d8..bcafdf9f4c 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -2178,6 +2178,38 @@ dri2_query_dma_buf_formats(_EGLDriver *drv, _EGLDisplay 
*disp,
return EGL_TRUE;
 }
 
+static EGLBoolean
+dri2_query_dma_buf_modifiers(_EGLDriver *drv, _EGLDisplay *disp, EGLint format,
+ EGLint max, EGLuint64KHR *modifiers,
+ EGLBoolean *external_only, EGLint *count)
+{
+   struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
+
+   if (max < 0) {
+  _eglError(EGL_BAD_PARAMETER, "invalid value for max count of formats");
+  return EGL_FALSE;
+   }
+
+   if (max > 0 && modifiers == NULL) {
+  _eglError(EGL_BAD_PARAMETER, "invalid modifiers array");
+  return EGL_FALSE;
+   }
+
+   if (dri2_dpy->image->base.version < 15 ||
+   dri2_dpy->image->queryDmaBufModifiers == NULL)
+  return EGL_FALSE;
+
+   if (dri2_dpy->image->queryDmaBufModifiers(dri2_dpy->dri_screen, format,
+ max, modifiers,
+ (unsigned int *) external_only,
+ count) == false) {
+  _eglError(EGL_BAD_PARAMETER, "invalid format");
+  return EGL_FALSE;
+   }
+
+   return EGL_TRUE;
+}
+
 /**
  * The spec says:
  *
@@ -3116,6 +3148,7 @@ _eglBuiltInDriverDRI2(const char *args)
dri2_drv->base.API.ExportDMABUFImageQueryMESA = 
dri2_export_dma_buf_image_query_mesa;
dri2_drv->base.API.ExportDMABUFImageMESA = dri2_export_dma_buf_image_mesa;
dri2_drv->base.API.QueryDmaBufFormatsEXT = dri2_query_dma_buf_formats;
+   dri2_drv->base.API.QueryDmaBufModifiersEXT = dri2_query_dma_buf_modifiers;
 #endif
 #ifdef HAVE_WAYLAND_PLATFORM
dri2_drv->base.API.BindWaylandDisplayWL = dri2_bind_wayland_display_wl;
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index d613920b01..a4d5f896e6 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -2404,6 +2404,26 @@ eglQueryDmaBufFormatsEXT(EGLDisplay dpy, EGLint 
max_formats,
RETURN_EGL_EVAL(disp, ret);
 }
 
+static EGLBoolean EGLAPIENTRY
+eglQueryDmaBufModifiersEXT(EGLDisplay dpy, EGLint format, EGLint max_modifiers,
+   EGLuint64KHR *modifiers, EGLBoolean *external_only,
+   EGLint *num_modifiers)
+{
+   _EGLDisplay *disp = _eglLockDisplay(dpy);
+   _EGLDriver *drv;
+   EGLBoolean ret;
+
+   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
+
+   _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv);
+
+   ret = drv->API.QueryDmaBufModifiersEXT(drv, disp, format, max_modifiers,
+  modifiers, external_only,
+  num_modifiers);
+
+   RETURN_EGL_EVAL(disp, ret);
+}
+
 __eglMustCastToProperFunctionPointerType EGLAPIENTRY
 eglGetProcAddress(const char *procname)
 {
diff --git a/src/egl/main/eglapi.h b/src/egl/main/eglapi.h
index c9f98963db..cab3e9605a 100644
--- a/src/egl/main/eglapi.h
+++ b/src/egl/main/eglapi.h
@@ -202,6 +202,11 @@ struct _egl_api
EGLBoolean (*QueryDmaBufFormatsEXT)(_EGLDriver *drv, _EGLDisplay *dpy,
EGLint max_formats, EGLint *formats,
EGLint *num_formats);
+   EGLBoolean (*QueryDmaBufModifiersEXT) (_EGLDriver *drv, _EGLDisplay *dpy,
+  EGLint format, EGLint max_modifiers,
+  EGLuint64KHR *modifiers,
+  EGLBoolean *external_only,
+  EGLint *num_modifiers);

Mesa (master): egl/main: add support for fourth plane tokens

[Eric Engeström]

Module: Mesa
Branch: master
Commit: fb2a1c2327bef00014210097e7e805247f37b33d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb2a1c2327bef00014210097e7e805247f37b33d

Author: Pekka Paalanen 
Date:   Tue May 30 17:41:35 2017 +0530

egl/main: add support for fourth plane tokens

The EGL_EXT_dma_buf_import_modifiers extension adds support for a
fourth plane, just like DRM KMS API does.

Bump maximum dma_buf plane count to four.

v2: prevent attribute tokens from being parsed if
EXT_image_dma_buf_import_modifiers is not suported. (Emil Velikov)

Signed-off-by: Pekka Paalanen 
Signed-off-by: Varad Gautam 
Reviewed-by: Eric Engestrom 
Reviewed-by: Daniel Stone 

---

 src/egl/drivers/dri2/egl_dri2.c |  2 +-
 src/egl/main/egldisplay.h   |  1 +
 src/egl/main/eglimage.c | 18 ++
 src/egl/main/eglimage.h |  5 +++--
 4 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index a2c9e417cc..8f0f1b323a 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -2090,7 +2090,7 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
 * "If  is EGL_LINUX_DMA_BUF_EXT, and the EGL_LINUX_DRM_FOURCC_EXT
 *  attribute indicates a single-plane format, EGL_BAD_ATTRIBUTE is
 *  generated if any of the EGL_DMA_BUF_PLANE1_* or EGL_DMA_BUF_PLANE2_*
-*  attributes are specified."
+*  or EGL_DMA_BUF_PLANE3_* attributes are specified."
 */
for (i = plane_n; i < DMA_BUF_MAX_PLANES; ++i) {
   if (attrs->DMABufPlaneFds[i].IsPresent ||
diff --git a/src/egl/main/egldisplay.h b/src/egl/main/egldisplay.h
index 4d3d96e174..9685bed360 100644
--- a/src/egl/main/egldisplay.h
+++ b/src/egl/main/egldisplay.h
@@ -102,6 +102,7 @@ struct _egl_extensions
EGLBoolean EXT_buffer_age;
EGLBoolean EXT_create_context_robustness;
EGLBoolean EXT_image_dma_buf_import;
+   EGLBoolean EXT_image_dma_buf_import_modifiers;
EGLBoolean EXT_swap_buffers_with_damage;
 
EGLBoolean KHR_cl_event2;
diff --git a/src/egl/main/eglimage.c b/src/egl/main/eglimage.c
index d062cbfe01..fed390a498 100644
--- a/src/egl/main/eglimage.c
+++ b/src/egl/main/eglimage.c
@@ -130,6 +130,24 @@ _eglParseImageAttribList(_EGLImageAttribs *attrs, 
_EGLDisplay *dpy,
  attrs->DMABufPlanePitches[2].Value = val;
  attrs->DMABufPlanePitches[2].IsPresent = EGL_TRUE;
  break;
+  case EGL_DMA_BUF_PLANE3_FD_EXT:
+ if (!dpy->Extensions.EXT_image_dma_buf_import_modifiers)
+err = EGL_BAD_PARAMETER;
+ attrs->DMABufPlaneFds[3].Value = val;
+ attrs->DMABufPlaneFds[3].IsPresent = EGL_TRUE;
+ break;
+  case EGL_DMA_BUF_PLANE3_OFFSET_EXT:
+ if (!dpy->Extensions.EXT_image_dma_buf_import_modifiers)
+err = EGL_BAD_PARAMETER;
+ attrs->DMABufPlaneOffsets[3].Value = val;
+ attrs->DMABufPlaneOffsets[3].IsPresent = EGL_TRUE;
+ break;
+  case EGL_DMA_BUF_PLANE3_PITCH_EXT:
+ if (!dpy->Extensions.EXT_image_dma_buf_import_modifiers)
+err = EGL_BAD_PARAMETER;
+ attrs->DMABufPlanePitches[3].Value = val;
+ attrs->DMABufPlanePitches[3].IsPresent = EGL_TRUE;
+ break;
   case EGL_YUV_COLOR_SPACE_HINT_EXT:
  if (val != EGL_ITU_REC601_EXT && val != EGL_ITU_REC709_EXT &&
  val != EGL_ITU_REC2020_EXT) {
diff --git a/src/egl/main/eglimage.h b/src/egl/main/eglimage.h
index 9a75d0c953..a909d9b588 100644
--- a/src/egl/main/eglimage.h
+++ b/src/egl/main/eglimage.h
@@ -46,7 +46,7 @@ struct _egl_image_attrib_int
EGLBoolean IsPresent;
 };
 
-#define DMA_BUF_MAX_PLANES 3
+#define DMA_BUF_MAX_PLANES 4
 
 struct _egl_image_attribs
 {
@@ -67,7 +67,8 @@ struct _egl_image_attribs
/* EGL_WL_bind_wayland_display */
EGLint PlaneWL;
 
-   /* EGL_EXT_image_dma_buf_import */
+   /* EGL_EXT_image_dma_buf_import and
+* EGL_EXT_image_dma_buf_import_modifiers */
struct _egl_image_attrib_int DMABufFourCC;
struct _egl_image_attrib_int DMABufPlaneFds[DMA_BUF_MAX_PLANES];
struct _egl_image_attrib_int DMABufPlaneOffsets[DMA_BUF_MAX_PLANES];

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Mesa (master): egl: implement eglQueryDmaBufFormatsEXT

[Eric Engeström]

Module: Mesa
Branch: master
Commit: 6719e058d6b8a38cc66accf1609fcabb66571e86
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6719e058d6b8a38cc66accf1609fcabb66571e86

Author: Varad Gautam 
Date:   Tue May 30 17:41:38 2017 +0530

egl: implement eglQueryDmaBufFormatsEXT

allow egl clients to query the dmabuf formats supported on this platform.

v2: return EGLBoolean.
v3: Check DRIimageExtension version before querying (Daniel Stone).
v4: move to DRIimageExtension version 15, error checking (Jason Ekstrand).

Signed-off-by: Louis-Francis Ratté-Boulianne 
Signed-off-by: Varad Gautam 
Reviewed-by: Daniel Stone 
Reviewed-by: Emil Velikov 
Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/egl_dri2.c | 22 ++
 src/egl/main/eglapi.c   | 18 ++
 src/egl/main/eglapi.h   |  4 
 src/egl/main/eglentrypoint.h|  1 +
 4 files changed, 45 insertions(+)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 177b547128..c2715528d8 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -2157,6 +2157,27 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
return plane_n;
 }
 
+static EGLBoolean
+dri2_query_dma_buf_formats(_EGLDriver *drv, _EGLDisplay *disp,
+EGLint max, EGLint *formats, EGLint *count)
+{
+   struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
+   if (max < 0 || (max > 0 && formats == NULL)) {
+  _eglError(EGL_BAD_PARAMETER, "invalid value for max count of formats");
+  return EGL_FALSE;
+   }
+
+   if (dri2_dpy->image->base.version < 15 ||
+   dri2_dpy->image->queryDmaBufFormats == NULL)
+  return EGL_FALSE;
+
+   if (!dri2_dpy->image->queryDmaBufFormats(dri2_dpy->dri_screen, max,
+formats, count))
+  return EGL_FALSE;
+
+   return EGL_TRUE;
+}
+
 /**
  * The spec says:
  *
@@ -3094,6 +3115,7 @@ _eglBuiltInDriverDRI2(const char *args)
dri2_drv->base.API.ExportDRMImageMESA = dri2_export_drm_image_mesa;
dri2_drv->base.API.ExportDMABUFImageQueryMESA = 
dri2_export_dma_buf_image_query_mesa;
dri2_drv->base.API.ExportDMABUFImageMESA = dri2_export_dma_buf_image_mesa;
+   dri2_drv->base.API.QueryDmaBufFormatsEXT = dri2_query_dma_buf_formats;
 #endif
 #ifdef HAVE_WAYLAND_PLATFORM
dri2_drv->base.API.BindWaylandDisplayWL = dri2_bind_wayland_display_wl;
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index 431678f8bd..d613920b01 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -2386,6 +2386,24 @@ _eglFunctionCompare(const void *key, const void *elem)
return strcmp(procname, entrypoint->name);
 }
 
+static EGLBoolean EGLAPIENTRY
+eglQueryDmaBufFormatsEXT(EGLDisplay dpy, EGLint max_formats,
+ EGLint *formats, EGLint *num_formats)
+{
+   _EGLDisplay *disp = _eglLockDisplay(dpy);
+   _EGLDriver *drv;
+   EGLBoolean ret;
+
+   _EGL_FUNC_START(NULL, EGL_NONE, NULL, EGL_FALSE);
+
+   _EGL_CHECK_DISPLAY(disp, EGL_FALSE, drv);
+
+   ret = drv->API.QueryDmaBufFormatsEXT(drv, disp, max_formats, formats,
+num_formats);
+
+   RETURN_EGL_EVAL(disp, ret);
+}
+
 __eglMustCastToProperFunctionPointerType EGLAPIENTRY
 eglGetProcAddress(const char *procname)
 {
diff --git a/src/egl/main/eglapi.h b/src/egl/main/eglapi.h
index 710c5d860a..c9f98963db 100644
--- a/src/egl/main/eglapi.h
+++ b/src/egl/main/eglapi.h
@@ -198,6 +198,10 @@ struct _egl_api
int (*GLInteropExportObject)(_EGLDisplay *dpy, _EGLContext *ctx,
 struct mesa_glinterop_export_in *in,
 struct mesa_glinterop_export_out *out);
+
+   EGLBoolean (*QueryDmaBufFormatsEXT)(_EGLDriver *drv, _EGLDisplay *dpy,
+   EGLint max_formats, EGLint *formats,
+   EGLint *num_formats);
 };
 
 #ifdef __cplusplus
diff --git a/src/egl/main/eglentrypoint.h b/src/egl/main/eglentrypoint.h
index e6318b9311..91536239e9 100644
--- a/src/egl/main/eglentrypoint.h
+++ b/src/egl/main/eglentrypoint.h
@@ -56,6 +56,7 @@ EGL_ENTRYPOINT(eglPostSubBufferNV)
 EGL_ENTRYPOINT(eglQueryAPI)
 EGL_ENTRYPOINT(eglQueryContext)
 EGL_ENTRYPOINT(eglQueryDebugKHR)
+EGL_ENTRYPOINT(eglQueryDmaBufFormatsEXT)
 EGL_ENTRYPOINT(eglQueryString)
 EGL_ENTRYPOINT(eglQuerySurface)
 EGL_ENTRYPOINT(eglQueryWaylandBufferWL)

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Mesa (master): egl: introduce DMA_BUF_MAX_PLANES

[Eric Engeström]

Module: Mesa
Branch: master
Commit: 9434f057c8f4297e94e08a06257ea66e354deaa7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9434f057c8f4297e94e08a06257ea66e354deaa7

Author: Pekka Paalanen 
Date:   Tue May 30 17:41:34 2017 +0530

egl: introduce DMA_BUF_MAX_PLANES

Rather than hardcoding 3, use a #define. Makes it easier to bump this
later to 4.

Signed-off-by: Pekka Paalanen 
Signed-off-by: Varad Gautam 
Reviewed-by: Eric Engestrom 
Reviewed-by: Daniel Stone 

---

 src/egl/drivers/dri2/egl_dri2.c | 8 
 src/egl/main/eglimage.h | 8 +---
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 80d366d244..a2c9e417cc 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -2092,7 +2092,7 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
 *  generated if any of the EGL_DMA_BUF_PLANE1_* or EGL_DMA_BUF_PLANE2_*
 *  attributes are specified."
 */
-   for (i = plane_n; i < 3; ++i) {
+   for (i = plane_n; i < DMA_BUF_MAX_PLANES; ++i) {
   if (attrs->DMABufPlaneFds[i].IsPresent ||
   attrs->DMABufPlaneOffsets[i].IsPresent ||
   attrs->DMABufPlanePitches[i].IsPresent) {
@@ -2125,9 +2125,9 @@ dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext 
*ctx,
__DRIimage *dri_image;
unsigned num_fds;
unsigned i;
-   int fds[3];
-   int pitches[3];
-   int offsets[3];
+   int fds[DMA_BUF_MAX_PLANES];
+   int pitches[DMA_BUF_MAX_PLANES];
+   int offsets[DMA_BUF_MAX_PLANES];
unsigned error;
 
/**
diff --git a/src/egl/main/eglimage.h b/src/egl/main/eglimage.h
index 0dd5e120ad..9a75d0c953 100644
--- a/src/egl/main/eglimage.h
+++ b/src/egl/main/eglimage.h
@@ -46,6 +46,8 @@ struct _egl_image_attrib_int
EGLBoolean IsPresent;
 };
 
+#define DMA_BUF_MAX_PLANES 3
+
 struct _egl_image_attribs
 {
/* EGL_KHR_image_base */
@@ -67,9 +69,9 @@ struct _egl_image_attribs
 
/* EGL_EXT_image_dma_buf_import */
struct _egl_image_attrib_int DMABufFourCC;
-   struct _egl_image_attrib_int DMABufPlaneFds[3];
-   struct _egl_image_attrib_int DMABufPlaneOffsets[3];
-   struct _egl_image_attrib_int DMABufPlanePitches[3];
+   struct _egl_image_attrib_int DMABufPlaneFds[DMA_BUF_MAX_PLANES];
+   struct _egl_image_attrib_int DMABufPlaneOffsets[DMA_BUF_MAX_PLANES];
+   struct _egl_image_attrib_int DMABufPlanePitches[DMA_BUF_MAX_PLANES];
struct _egl_image_attrib_int DMABufYuvColorSpaceHint;
struct _egl_image_attrib_int DMABufSampleRangeHint;
struct _egl_image_attrib_int DMABufChromaHorizontalSiting;

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Mesa (master): egl/dri2: Create EGLImages with dmabuf modifiers

[Eric Engeström]

Module: Mesa
Branch: master
Commit: 6f10e7c37a34570f61fa2db8fc1860553207b7e9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f10e7c37a34570f61fa2db8fc1860553207b7e9

Author: Varad Gautam 
Date:   Tue May 30 17:41:37 2017 +0530

egl/dri2: Create EGLImages with dmabuf modifiers

Allow creating EGLImages with dmabuf format modifiers when target is
EGL_LINUX_DMA_BUF_EXT for EGL_EXT_image_dma_buf_import_modifiers.

v2:
- clear modifier assembling and error label name (Eric Engestrom)
v3:
- remove goto jumps within switch-case (Emil Velikov)
- treat zero as valid modifier (Daniel Stone)
- ensure same modifier across all dmabuf planes (Emil Velikov)
v4:
- allow modifiers to add extra planes (Louis-Francis Ratté-Boulianne)
v5:
- fix error checking, some cleanups (Jason Ekstrand)
- pass single copy of the modifier to createImageFromDmaBufs2

Signed-off-by: Pekka Paalanen 
Signed-off-by: Varad Gautam 
Signed-off-by: Louis-Francis Ratté-Boulianne 
Reviewed-by: Eric Engestrom 
Reviewed-by: Daniel Stone 
Reviewed-by: Emil Velikov 

---

 src/egl/drivers/dri2/egl_dri2.c | 108 
 src/egl/main/eglimage.c |  48 ++
 src/egl/main/eglimage.h |   2 +
 3 files changed, 147 insertions(+), 11 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 8f0f1b323a..177b547128 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -87,6 +87,10 @@
 #define DRM_FORMAT_GR1616fourcc_code('G', 'R', '3', '2') /* [31:0] R:G 
16:16 little endian */
 #endif
 
+#ifndef DRM_FORMAT_MOD_INVALID
+#define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
+#endif
+
 static void
 dri_set_background_context(void *loaderPrivate)
 {
@@ -1987,6 +1991,37 @@ dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
   }
}
 
+   /**
+* If  is EGL_LINUX_DMA_BUF_EXT, both or neither of the following
+* attribute values may be given.
+*
+* This is referring to EGL_DMA_BUF_PLANE0_MODIFIER_LO_EXT and
+* EGL_DMA_BUF_PLANE0_MODIFIER_HI_EXT, and the same for other planes.
+*/
+   for (i = 0; i < DMA_BUF_MAX_PLANES; ++i) {
+  if (attrs->DMABufPlaneModifiersLo[i].IsPresent !=
+  attrs->DMABufPlaneModifiersHi[i].IsPresent) {
+ _eglError(EGL_BAD_PARAMETER, "modifier attribute lo or hi missing");
+ return EGL_FALSE;
+  }
+   }
+
+   /* Although the EGL_EXT_image_dma_buf_import_modifiers spec doesn't
+* mandate it, we only accept the same modifier across all planes. */
+   for (i = 1; i < DMA_BUF_MAX_PLANES; ++i) {
+  if (attrs->DMABufPlaneFds[i].IsPresent) {
+ if ((attrs->DMABufPlaneModifiersLo[0].IsPresent !=
+   attrs->DMABufPlaneModifiersLo[i].IsPresent) ||
+ (attrs->DMABufPlaneModifiersLo[0].Value !=
+   attrs->DMABufPlaneModifiersLo[i].Value) ||
+ (attrs->DMABufPlaneModifiersHi[0].Value !=
+   attrs->DMABufPlaneModifiersHi[i].Value)) {
+_eglError(EGL_BAD_PARAMETER, "modifier attributes not equal");
+return EGL_FALSE;
+ }
+  }
+   }
+
return EGL_TRUE;
 }
 
@@ -2095,7 +2130,25 @@ dri2_check_dma_buf_format(const _EGLImageAttribs *attrs)
for (i = plane_n; i < DMA_BUF_MAX_PLANES; ++i) {
   if (attrs->DMABufPlaneFds[i].IsPresent ||
   attrs->DMABufPlaneOffsets[i].IsPresent ||
-  attrs->DMABufPlanePitches[i].IsPresent) {
+  attrs->DMABufPlanePitches[i].IsPresent ||
+  attrs->DMABufPlaneModifiersLo[i].IsPresent ||
+  attrs->DMABufPlaneModifiersHi[i].IsPresent) {
+
+ /**
+  * The modifiers extension spec says:
+  *
+  * "Modifiers may modify any attribute of a buffer import, including
+  *  but not limited to adding extra planes to a format which
+  *  otherwise does not have those planes. As an example, a modifier
+  *  may add a plane for an external compression buffer to a
+  *  single-plane format. The exact meaning and effect of any
+  *  modifier is canonically defined by drm_fourcc.h, not as part of
+  *  this extension."
+  */
+ if (attrs->DMABufPlaneModifiersLo[i].IsPresent &&
+ attrs->DMABufPlaneModifiersHi[i].IsPresent)
+continue;
+
  _eglError(EGL_BAD_ATTRIBUTE, "too many plane attributes");
  return 0;
   }
@@ -2128,6 +2181,8 @@ dri2_create_image_dma_buf(_EGLDisplay *disp, _EGLContext 
*ctx,
int fds[DMA_BUF_MAX_PLANES];
int pitches[DMA_BUF_MAX_PLANES];
int offsets[DMA_BUF_MAX_PLANES];
+   uint64_t modifier;
+   bool has_modifier = false;
unsigned error;
 
/**
@@ -2160,16 +2215,47 @@ dri2_create_image_dma_buf(_EGLDisplay *disp, 
_EGLContext *ctx,

Mesa (master): egl: advertise EGL_EXT_image_dma_buf_import_modifiers

[Eric Engeström]

Module: Mesa
Branch: master
Commit: 4c412293d0e3e38f6b4e9c10b492b8ed1d9a4a69
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4c412293d0e3e38f6b4e9c10b492b8ed1d9a4a69

Author: Varad Gautam 
Date:   Tue May 30 17:41:40 2017 +0530

egl: advertise EGL_EXT_image_dma_buf_import_modifiers

v2: check for DRIimageExtension version 15 (Jason Ekstrand)

Signed-off-by: Varad Gautam 
Reviewed-by: Daniel Stone 
Reviewed-by: Emil Velikov 
Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/egl_dri2.c | 6 ++
 src/egl/main/eglapi.c   | 1 +
 2 files changed, 7 insertions(+)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index bcafdf9f4c..d31a0bf8e0 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -726,6 +726,12 @@ dri2_setup_screen(_EGLDisplay *disp)
   dri2_dpy->image->createImageFromDmaBufs) {
  disp->Extensions.EXT_image_dma_buf_import = EGL_TRUE;
   }
+  if (dri2_dpy->image->base.version >= 15 &&
+  dri2_dpy->image->createImageFromDmaBufs2 &&
+  dri2_dpy->image->queryDmaBufFormats &&
+  dri2_dpy->image->queryDmaBufModifiers) {
+ disp->Extensions.EXT_image_dma_buf_import_modifiers = EGL_TRUE;
+  }
 #endif
}
 }
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index a4d5f896e6..e6355ace87 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -488,6 +488,7 @@ _eglCreateExtensionsString(_EGLDisplay *dpy)
_EGL_CHECK_EXTENSION(EXT_buffer_age);
_EGL_CHECK_EXTENSION(EXT_create_context_robustness);
_EGL_CHECK_EXTENSION(EXT_image_dma_buf_import);
+   _EGL_CHECK_EXTENSION(EXT_image_dma_buf_import_modifiers);
_EGL_CHECK_EXTENSION(EXT_swap_buffers_with_damage);
 
_EGL_CHECK_EXTENSION(KHR_cl_event2);

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Mesa (master): nvc0: support for GP10B

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 76aa1bbb8919c3cc2b9cb5467640bf996b8d31dc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76aa1bbb8919c3cc2b9cb5467640bf996b8d31dc

Author: Alexandre Courbot 
Date:   Thu Mar 30 19:05:57 2017 +0900

nvc0: support for GP10B

GP10B uses the same 3D class as GP100.

Signed-off-by: Alexandre Courbot 
Acked-by: Samuel Pitoiset 
Acked-by: Ilia Mirkin 

---

 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
index e1d0d1c2c4..f2ae4f3ae3 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
@@ -910,6 +910,7 @@ nvc0_screen_create(struct nouveau_device *dev)
case 0x130:
   switch (dev->chipset) {
   case 0x130:
+  case 0x13b:
  obj_class = GP100_3D_CLASS;
  break;
   default:

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Mesa (master): etnaviv: Don't try to use the index buffer if size is zero

[Lucas Stach]

Module: Mesa
Branch: master
Commit: 106b2786b66d1400899718ba98ce1d5311b8e712
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=106b2786b66d1400899718ba98ce1d5311b8e712

Author: Tomeu Vizoso 
Date:   Fri May 19 12:40:44 2017 +0200

etnaviv: Don't try to use the index buffer if size is zero

If info->index_size is zero, info->index will point to uninitialized
memory.

Fatal signal 11 (SIGSEGV), code 2, fault addr 0xab5d07a3 in tid 20456 
(surfaceflinger)

lst: Remove useless indexbuf conditional in the index_size != 0 case.

Fixes: 330d0607ed60 ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Tomeu Vizoso 
Reviewed-by: Lucas Stach 

---

 src/gallium/drivers/etnaviv/etnaviv_context.c | 24 +---
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_context.c 
b/src/gallium/drivers/etnaviv/etnaviv_context.c
index 306cb6fc49..e7590954c7 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_context.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_context.c
@@ -178,24 +178,26 @@ etna_draw_vbo(struct pipe_context *pctx, const struct 
pipe_draw_info *info)
 
/* Upload a user index buffer. */
unsigned index_offset = 0;
-   struct pipe_resource *indexbuf = info->has_user_indices ? NULL : 
info->index.resource;
-   if (info->index_size && info->has_user_indices &&
-   !util_upload_index_buffer(pctx, info, , _offset)) {
-  BUG("Index buffer upload failed.");
-  return;
-   }
+   struct pipe_resource *indexbuf = NULL;
+
+   if (info->index_size) {
+  indexbuf = info->has_user_indices ? NULL : info->index.resource;
+  if (info->has_user_indices &&
+  !util_upload_index_buffer(pctx, info, , _offset)) {
+ BUG("Index buffer upload failed.");
+ return;
+  }
 
-   if (info->index_size && indexbuf) {
   ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 
etna_resource(indexbuf)->bo;
   ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
   ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
   ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 
translate_index_size(info->index_size);
   ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
-   }
 
-   if (info->index_size && !ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
-  BUG("Unsupported or no index buffer");
-  return;
+  if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
+ BUG("Unsupported or no index buffer");
+ return;
+  }
}
 
struct etna_shader_key key = {};

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