Mesa (master): aubinator: Dump sampler state pointers on gen6 too.

[Rafael Antognolli]

Module: Mesa
Branch: master
Commit: f43c21cbbd75651162865d115fc3ecd1faa8469e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f43c21cbbd75651162865d115fc3ecd1faa8469e

Author: Rafael Antognolli 
Date:   Tue May 30 15:08:13 2017 -0700

aubinator: Dump sampler state pointers on gen6 too.

We already have a function to dump sampler states, so do that for gen6
too.

Signed-off-by: Rafael Antognolli 
Reviewed-by: Lionel Landwerlin 

---

 src/intel/tools/aubinator.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 4d74fe964d..6c9a8f052c 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -524,6 +524,14 @@ handle_3dstate_sampler_state_pointers(struct gen_spec 
*spec, uint32_t *p)
 }
 
 static void
+handle_3dstate_sampler_state_pointers_gen6(struct gen_spec *spec, uint32_t *p)
+{
+   dump_samplers(spec, p[1]);
+   dump_samplers(spec, p[2]);
+   dump_samplers(spec, p[3]);
+}
+
+static void
 handle_3dstate_viewport_state_pointers_cc(struct gen_spec *spec, uint32_t *p)
 {
uint64_t start;
@@ -634,6 +642,8 @@ handle_load_register_imm(struct gen_spec *spec, uint32_t *p)
 #define _3DSTATE_SAMPLER_STATE_POINTERS_GS  0x782e
 #define _3DSTATE_SAMPLER_STATE_POINTERS_PS  0x782f
 
+#define _3DSTATE_SAMPLER_STATE_POINTERS 0x7802
+
 #define _3DSTATE_VIEWPORT_STATE_POINTERS_CC 0x7823
 #define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP 0x7821
 #define _3DSTATE_BLEND_STATE_POINTERS   0x7824
@@ -670,6 +680,7 @@ struct custom_handler {
{ _3DSTATE_SAMPLER_STATE_POINTERS_VS, handle_3dstate_sampler_state_pointers 
},
{ _3DSTATE_SAMPLER_STATE_POINTERS_GS, handle_3dstate_sampler_state_pointers 
},
{ _3DSTATE_SAMPLER_STATE_POINTERS_PS, handle_3dstate_sampler_state_pointers 
},
+   { _3DSTATE_SAMPLER_STATE_POINTERS, 
handle_3dstate_sampler_state_pointers_gen6 },
 
{ _3DSTATE_VIEWPORT_STATE_POINTERS_CC, 
handle_3dstate_viewport_state_pointers_cc },
{ _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP, 
handle_3dstate_viewport_state_pointers_sf_clip },

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Mesa (master): i965: Convert fs sampler state to use genxml.

[Rafael Antognolli]

Module: Mesa
Branch: master
Commit: f8d69beed49c64f883bb8ffb28d4960306baf575
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8d69beed49c64f883bb8ffb28d4960306baf575

Author: Rafael Antognolli 
Date:   Tue May 30 15:08:15 2017 -0700

i965: Convert fs sampler state to use genxml.

Also convert some auxiliary functions used by it, and copy
upload_default_color to genX_state_upload.c.

Signed-off-by: Rafael Antognolli 
Reviewed-by: Lionel Landwerlin 

---

 src/mesa/drivers/dri/i965/brw_sampler_state.c |  18 -
 src/mesa/drivers/dri/i965/brw_state.h |   1 -
 src/mesa/drivers/dri/i965/genX_state_upload.c | 544 +-
 3 files changed, 540 insertions(+), 23 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c 
b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index 26bf0cb3e2..6ae7d0b3ae 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -625,24 +625,6 @@ brw_upload_sampler_state_table(struct brw_context *brw,
 }
 
 static void
-brw_upload_fs_samplers(struct brw_context *brw)
-{
-   /* BRW_NEW_FRAGMENT_PROGRAM */
-   struct gl_program *fs = (struct gl_program *) brw->fragment_program;
-   brw_upload_sampler_state_table(brw, fs, &brw->wm.base);
-}
-
-const struct brw_tracked_state brw_fs_samplers = {
-   .dirty = {
-  .mesa = _NEW_TEXTURE,
-  .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_FRAGMENT_PROGRAM,
-   },
-   .emit = brw_upload_fs_samplers,
-};
-
-static void
 brw_upload_vs_samplers(struct brw_context *brw)
 {
/* BRW_NEW_VERTEX_PROGRAM */
diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
b/src/mesa/drivers/dri/i965/brw_state.h
index 5f5ba647f7..3520bbe410 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -53,7 +53,6 @@ extern const struct brw_tracked_state brw_cs_pull_constants;
 extern const struct brw_tracked_state brw_constant_buffer;
 extern const struct brw_tracked_state brw_curbe_offsets;
 extern const struct brw_tracked_state brw_invariant_state;
-extern const struct brw_tracked_state brw_fs_samplers;
 extern const struct brw_tracked_state brw_gs_unit;
 extern const struct brw_tracked_state brw_binding_table_pointers;
 extern const struct brw_tracked_state brw_depthbuffer;
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 16b7b25e8b..3bc0f4cf5f 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -51,11 +51,13 @@
 #include "main/fbobject.h"
 #include "main/framebuffer.h"
 #include "main/glformats.h"
+#include "main/samplerobj.h"
 #include "main/shaderapi.h"
 #include "main/stencil.h"
 #include "main/transformfeedback.h"
 #include "main/varray.h"
 #include "main/viewport.h"
+#include "util/half_float.h"
 
 UNUSED static void *
 emit_dwords(struct brw_context *brw, unsigned n)
@@ -4218,6 +4220,540 @@ genX(emit_mi_report_perf_count)(struct brw_context *brw,
 
 /* -- */
 
+/**
+ * Emit a 3DSTATE_SAMPLER_STATE_POINTERS_{VS,HS,GS,DS,PS} packet.
+ */
+static void
+genX(emit_sampler_state_pointers_xs)(struct brw_context *brw,
+ struct brw_stage_state *stage_state)
+{
+#if GEN_GEN >= 7
+   static const uint16_t packet_headers[] = {
+  [MESA_SHADER_VERTEX] = 43,
+  [MESA_SHADER_TESS_CTRL] = 44,
+  [MESA_SHADER_TESS_EVAL] = 45,
+  [MESA_SHADER_GEOMETRY] = 46,
+  [MESA_SHADER_FRAGMENT] = 47,
+   };
+
+   /* Ivybridge requires a workaround flush before VS packets. */
+   if (GEN_GEN == 7 && !GEN_IS_HASWELL &&
+   stage_state->stage == MESA_SHADER_VERTEX) {
+  gen7_emit_vs_workaround_flush(brw);
+   }
+
+   brw_batch_emit(brw, GENX(3DSTATE_SAMPLER_STATE_POINTERS_VS), ptr) {
+  ptr._3DCommandSubOpcode = packet_headers[stage_state->stage];
+  ptr.PointertoVSSamplerState = stage_state->sampler_offset;
+   }
+#endif
+}
+
+static bool
+has_component(mesa_format format, int i)
+{
+   if (_mesa_is_format_color_format(format))
+  return _mesa_format_has_color_component(format, i);
+
+   /* depth and stencil have only one component */
+   return i == 0;
+}
+
+/**
+ * Upload SAMPLER_BORDER_COLOR_STATE.
+ */
+static void
+upload_default_color(struct brw_context *brw,
+ const struct gl_sampler_object *sampler,
+ mesa_format format, GLenum base_format,
+ bool is_integer_format, bool is_stencil_sampling,
+ uint32_t *sdc_offset)
+{
+   union gl_color_union color;
+
+   switch (base_format) {
+   case GL_DEPTH_COMPONENT:
+  /* GL specs that border color for depth textures is taken from the
+   * R channel, while the hardware uses A.  Spam R into all the
+   * channels for safety.
+   */
+  color.ui[0] = sampler->BorderColor.ui[0];
+  color.ui[1] = sampler->

Mesa (master): i965: Convert upload_default_color to genxml.

[Rafael Antognolli]

Module: Mesa
Branch: master
Commit: 9fd0aee17df6c2e43113469b450f723622996bd6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9fd0aee17df6c2e43113469b450f723622996bd6

Author: Rafael Antognolli 
Date:   Tue May 30 15:08:18 2017 -0700

i965: Convert upload_default_color to genxml.

This function was moved to genX_state_upload.c but was still not using genxml.
By converting it to genxml, we make some things simpler, like setting
haswell's border color state, but others are more complex, since the structs
used by each gen are different.

Signed-off-by: Rafael Antognolli 
Reviewed-by: Lionel Landwerlin 

---

 src/mesa/drivers/dri/i965/genX_state_upload.c | 162 ++
 1 file changed, 85 insertions(+), 77 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 64e34e5737..3f8a7265db 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -4249,7 +4249,7 @@ genX(emit_sampler_state_pointers_xs)(struct brw_context 
*brw,
 #endif
 }
 
-static bool
+UNUSED static bool
 has_component(mesa_format format, int i)
 {
if (_mesa_is_format_color_format(format))
@@ -4263,11 +4263,11 @@ has_component(mesa_format format, int i)
  * Upload SAMPLER_BORDER_COLOR_STATE.
  */
 static void
-upload_default_color(struct brw_context *brw,
- const struct gl_sampler_object *sampler,
- mesa_format format, GLenum base_format,
- bool is_integer_format, bool is_stencil_sampling,
- uint32_t *sdc_offset)
+genX(upload_default_color)(struct brw_context *brw,
+   const struct gl_sampler_object *sampler,
+   mesa_format format, GLenum base_format,
+   bool is_integer_format, bool is_stencil_sampling,
+   uint32_t *sdc_offset)
 {
union gl_color_union color;
 
@@ -4321,27 +4321,49 @@ upload_default_color(struct brw_context *brw,
if (base_format == GL_RGB)
   color.ui[3] = float_as_int(1.0);
 
+   int alignment = 32;
if (brw->gen >= 8) {
-  /* On Broadwell, the border color is represented as four 32-bit floats,
-   * integers, or unsigned values, interpreted according to the surface
-   * format.  This matches the sampler->BorderColor union exactly; just
-   * memcpy the values.
-   */
-  uint32_t *sdc = brw_state_batch(brw, 4 * 4, 64, sdc_offset);
-  memcpy(sdc, color.ui, 4 * 4);
+  alignment = 64;
} else if (brw->is_haswell && (is_integer_format || is_stencil_sampling)) {
-  /* Haswell's integer border color support is completely insane:
-   * SAMPLER_BORDER_COLOR_STATE is 20 DWords.  The first four are
-   * for float colors.  The next 12 DWords are MBZ and only exist to
-   * pad it out to a 64 byte cacheline boundary.  DWords 16-19 then
-   * contain integer colors; these are only used if SURFACE_STATE
-   * has the "Integer Surface Format" bit set.  Even then, the
-   * arrangement of the RGBA data devolves into madness.
-   */
-  uint32_t *sdc = brw_state_batch(brw, 20 * 4, 512, sdc_offset);
-  memset(sdc, 0, 20 * 4);
-  sdc = &sdc[16];
+  alignment = 512;
+   }
+
+   uint32_t *sdc = brw_state_batch(
+  brw, GENX(SAMPLER_BORDER_COLOR_STATE_length) * sizeof(uint32_t),
+  alignment, sdc_offset);
+
+   struct GENX(SAMPLER_BORDER_COLOR_STATE) state = { 0 };
+
+#define ASSIGN(dst, src) \
+   do {  \
+  dst = src; \
+   } while (0)
+
+#define ASSIGNu16(dst, src) \
+   do { \
+  dst = (uint16_t)src;  \
+   } while (0)
+
+#define ASSIGNu8(dst, src) \
+   do {\
+  dst = (uint8_t)src;  \
+   } while (0)
 
+#define BORDER_COLOR_ATTR(macro, _color_type, src)  \
+   macro(state.BorderColor ## _color_type ## Red, src[0]);   \
+   macro(state.BorderColor ## _color_type ## Green, src[1]);   \
+   macro(state.BorderColor ## _color_type ## Blue, src[2]);   \
+   macro(state.BorderColor ## _color_type ## Alpha, src[3]);
+
+#if GEN_GEN >= 8
+   /* On Broadwell, the border color is represented as four 32-bit floats,
+* integers, or unsigned values, interpreted according to the surface
+* format.  This matches the sampler->BorderColor union exactly; just
+* memcpy the values.
+*/
+   BORDER_COLOR_ATTR(ASSIGN, 32bit, color.ui);
+#elif GEN_IS_HASWELL
+   if (is_integer_format || is_stencil_sampling) {
   bool stencil = format == MESA_FORMAT_S_UINT8 || is_stencil_sampling;
   const int bits_per_channel =
  _mesa_get_format_bits(format, stencil ? GL_STENCIL_BITS : 
GL_RED_BITS);
@@ -4361,76 +4383,61 @@ upload_default_color(struct brw_context *brw,
   switch (bits_per_channel) {
   case 8:
  /* Copy RGBA in order. */
- for (int i = 0; i < 4; i++)
-((uint8_t *) sdc)[i] = c[i];
+

Mesa (master): genxml: fix gen5 sampler border color state.

[Rafael Antognolli]

Module: Mesa
Branch: master
Commit: 9b78a52042d9d9b1359c5780d48b0cbad38c9d5b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b78a52042d9d9b1359c5780d48b0cbad38c9d5b

Author: Rafael Antognolli 
Date:   Tue May 30 15:08:14 2017 -0700

genxml: fix gen5 sampler border color state.

Based on the current code, gen5 and gen6 have the same sampler border color
state struct. So fix the gen5 one to match gen6.

Signed-off-by: Rafael Antognolli 
Reviewed-by: Lionel Landwerlin 

---

 src/intel/genxml/gen5.xml | 40 
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index 44dd0d10aa..36081875ea 100644
--- a/src/intel/genxml/gen5.xml
+++ b/src/intel/genxml/gen5.xml
@@ -509,30 +509,30 @@
 
 
 
-
-
-
-
+
+
+
+
 
-
-
-
-
+
+
+
+
 
-
-
-
-
+
+
+
+
 
-
-
-
-
+
+
+
+
 
-
-
-
-
+
+
+
+
   
 
   

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Mesa (master): i965: Convert vs, gs, tcs, tes and cs samplers to genxml.

[Rafael Antognolli]

Module: Mesa
Branch: master
Commit: e30bbe32a3177f36eebd9164dea0a406e308e043
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e30bbe32a3177f36eebd9164dea0a406e308e043

Author: Rafael Antognolli 
Date:   Tue May 30 15:08:16 2017 -0700

i965: Convert vs, gs, tcs, tes and cs samplers to genxml.

Since they just use the code that is already available in genX_state_upload.c,
convert them in one batch.

Signed-off-by: Rafael Antognolli 
Reviewed-by: Lionel Landwerlin 

---

 src/mesa/drivers/dri/i965/brw_sampler_state.c | 109 -
 src/mesa/drivers/dri/i965/brw_state.h |   5 -
 src/mesa/drivers/dri/i965/genX_state_upload.c | 135 +++---
 3 files changed, 123 insertions(+), 126 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c 
b/src/mesa/drivers/dri/i965/brw_sampler_state.c
index 6ae7d0b3ae..4ac8e94760 100644
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ b/src/mesa/drivers/dri/i965/brw_sampler_state.c
@@ -623,112 +623,3 @@ brw_upload_sampler_state_table(struct brw_context *brw,
   brw->ctx.NewDriverState |= BRW_NEW_SAMPLER_STATE_TABLE;
}
 }
-
-static void
-brw_upload_vs_samplers(struct brw_context *brw)
-{
-   /* BRW_NEW_VERTEX_PROGRAM */
-   struct gl_program *vs = (struct gl_program *) brw->vertex_program;
-   brw_upload_sampler_state_table(brw, vs, &brw->vs.base);
-}
-
-
-const struct brw_tracked_state brw_vs_samplers = {
-   .dirty = {
-  .mesa = _NEW_TEXTURE,
-  .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_VERTEX_PROGRAM,
-   },
-   .emit = brw_upload_vs_samplers,
-};
-
-
-static void
-brw_upload_gs_samplers(struct brw_context *brw)
-{
-   /* BRW_NEW_GEOMETRY_PROGRAM */
-   struct gl_program *gs = (struct gl_program *) brw->geometry_program;
-   if (!gs)
-  return;
-
-   brw_upload_sampler_state_table(brw, gs, &brw->gs.base);
-}
-
-
-const struct brw_tracked_state brw_gs_samplers = {
-   .dirty = {
-  .mesa = _NEW_TEXTURE,
-  .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_GEOMETRY_PROGRAM,
-   },
-   .emit = brw_upload_gs_samplers,
-};
-
-
-static void
-brw_upload_tcs_samplers(struct brw_context *brw)
-{
-   /* BRW_NEW_TESS_PROGRAMS */
-   struct gl_program *tcs = (struct gl_program *) brw->tess_ctrl_program;
-   if (!tcs)
-  return;
-
-   brw_upload_sampler_state_table(brw, tcs, &brw->tcs.base);
-}
-
-
-const struct brw_tracked_state brw_tcs_samplers = {
-   .dirty = {
-  .mesa = _NEW_TEXTURE,
-  .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_TESS_PROGRAMS,
-   },
-   .emit = brw_upload_tcs_samplers,
-};
-
-
-static void
-brw_upload_tes_samplers(struct brw_context *brw)
-{
-   /* BRW_NEW_TESS_PROGRAMS */
-   struct gl_program *tes = (struct gl_program *) brw->tess_eval_program;
-   if (!tes)
-  return;
-
-   brw_upload_sampler_state_table(brw, tes, &brw->tes.base);
-}
-
-
-const struct brw_tracked_state brw_tes_samplers = {
-   .dirty = {
-  .mesa = _NEW_TEXTURE,
-  .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_TESS_PROGRAMS,
-   },
-   .emit = brw_upload_tes_samplers,
-};
-
-static void
-brw_upload_cs_samplers(struct brw_context *brw)
-{
-   /* BRW_NEW_COMPUTE_PROGRAM */
-   struct gl_program *cs = (struct gl_program *) brw->compute_program;
-   if (!cs)
-  return;
-
-   brw_upload_sampler_state_table(brw, cs, &brw->cs.base);
-}
-
-const struct brw_tracked_state brw_cs_samplers = {
-   .dirty = {
-  .mesa = _NEW_TEXTURE,
-  .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_COMPUTE_PROGRAM,
-   },
-   .emit = brw_upload_cs_samplers,
-};
diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
b/src/mesa/drivers/dri/i965/brw_state.h
index 3520bbe410..0a7ff574eb 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -58,11 +58,6 @@ extern const struct brw_tracked_state 
brw_binding_table_pointers;
 extern const struct brw_tracked_state brw_depthbuffer;
 extern const struct brw_tracked_state brw_recalculate_urb_fence;
 extern const struct brw_tracked_state brw_sf_vp;
-extern const struct brw_tracked_state brw_vs_samplers;
-extern const struct brw_tracked_state brw_tcs_samplers;
-extern const struct brw_tracked_state brw_tes_samplers;
-extern const struct brw_tracked_state brw_gs_samplers;
-extern const struct brw_tracked_state brw_cs_samplers;
 extern const struct brw_tracked_state brw_cs_texture_surfaces;
 extern const struct brw_tracked_state brw_vs_ubo_surfaces;
 extern const struct brw_tracked_state brw_vs_abo_surfaces;
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 3bc0f4cf5f..64e34e5737 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -4752,6 +4752,117 @@ static const struct brw_tracked_state genX(fs_samplers) 
= {
.emit = genX(upload_fs_samplers),

Mesa (master): i965: Remove unused code and delete file.

[Rafael Antognolli]

Module: Mesa
Branch: master
Commit: e54791593580be37deea36f9aa09c602d7ea8e07
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e54791593580be37deea36f9aa09c602d7ea8e07

Author: Rafael Antognolli 
Date:   Tue May 30 15:08:17 2017 -0700

i965: Remove unused code and delete file.

The sampler state code was all moved to genxml, so we can get rid of these
functions and delete the file.

Signed-off-by: Rafael Antognolli 
Reviewed-by: Lionel Landwerlin 

---

 src/mesa/drivers/dri/i965/Makefile.sources|   1 -
 src/mesa/drivers/dri/i965/brw_sampler_state.c | 625 --
 2 files changed, 626 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index 8bac8039ce..405d67f87d 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -43,7 +43,6 @@ i965_FILES = \
brw_primitive_restart.c \
brw_queryobj.c \
brw_reset.c \
-   brw_sampler_state.c \
brw_sf.c \
brw_state_batch.c \
brw_state.h \
diff --git a/src/mesa/drivers/dri/i965/brw_sampler_state.c 
b/src/mesa/drivers/dri/i965/brw_sampler_state.c
deleted file mode 100644
index 4ac8e94760..00
--- a/src/mesa/drivers/dri/i965/brw_sampler_state.c
+++ /dev/null
@@ -1,625 +0,0 @@
-/*
- Copyright (C) Intel Corp.  2006.  All Rights Reserved.
- Intel funded Tungsten Graphics to
- develop this 3D driver.
-
- Permission is hereby granted, free of charge, to any person obtaining
- a copy of this software and associated documentation files (the
- "Software"), to deal in the Software without restriction, including
- without limitation the rights to use, copy, modify, merge, publish,
- distribute, sublicense, and/or sell copies of the Software, and to
- permit persons to whom the Software is furnished to do so, subject to
- the following conditions:
-
- The above copyright notice and this permission notice (including the
- next paragraph) shall be included in all copies or substantial
- portions of the Software.
-
- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
- IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
- LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
- OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
- WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
- **/
- /*
-  * Authors:
-  *   Keith Whitwell 
-  */
-
-/**
- * @file brw_sampler_state.c
- *
- * This file contains code for emitting SAMPLER_STATE structures, which
- * specifies filter modes, wrap modes, border color, and so on.
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "intel_batchbuffer.h"
-#include "intel_mipmap_tree.h"
-
-#include "main/macros.h"
-#include "main/samplerobj.h"
-#include "util/half_float.h"
-
-/**
- * Emit a 3DSTATE_SAMPLER_STATE_POINTERS_{VS,HS,GS,DS,PS} packet.
- */
-static void
-gen7_emit_sampler_state_pointers_xs(struct brw_context *brw,
-struct brw_stage_state *stage_state)
-{
-   static const uint16_t packet_headers[] = {
-  [MESA_SHADER_VERTEX] = _3DSTATE_SAMPLER_STATE_POINTERS_VS,
-  [MESA_SHADER_TESS_CTRL] = _3DSTATE_SAMPLER_STATE_POINTERS_HS,
-  [MESA_SHADER_TESS_EVAL] = _3DSTATE_SAMPLER_STATE_POINTERS_DS,
-  [MESA_SHADER_GEOMETRY] = _3DSTATE_SAMPLER_STATE_POINTERS_GS,
-  [MESA_SHADER_FRAGMENT] = _3DSTATE_SAMPLER_STATE_POINTERS_PS,
-   };
-
-   /* Ivybridge requires a workaround flush before VS packets. */
-   if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail &&
-   stage_state->stage == MESA_SHADER_VERTEX) {
-  gen7_emit_vs_workaround_flush(brw);
-   }
-
-   BEGIN_BATCH(2);
-   OUT_BATCH(packet_headers[stage_state->stage] << 16 | (2 - 2));
-   OUT_BATCH(stage_state->sampler_offset);
-   ADVANCE_BATCH();
-}
-
-/**
- * Emit a SAMPLER_STATE structure, given all the fields.
- */
-void
-brw_emit_sampler_state(struct brw_context *brw,
-   uint32_t *ss,
-   uint32_t batch_offset_for_sampler_state,
-   unsigned min_filter,
-   unsigned mag_filter,
-   unsigned mip_filter,
-   unsigned max_anisotropy,
-   unsigned address_rounding,
-   unsigned wrap_s,
-   unsigned wrap_t,
-   unsigned wrap_r,
-   unsigned base_level,
-   unsigned min_lod,
-   unsigned max_lod,
-   int lod_bias,
-   unsigned shadow_function,
-   bool non_normalized_coordinates,
-   u

Mesa (master): anv: Fix -Wswitch in anv_layout_to_aux_usage()

[Chad Versace]

Module: Mesa
Branch: master
Commit: ecd8f8580288361f6c4d532ba964a744dd62a9dd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ecd8f8580288361f6c4d532ba964a744dd62a9dd

Author: Chad Versace 
Date:   Thu Jun 22 14:39:12 2017 -0700

anv: Fix -Wswitch in anv_layout_to_aux_usage()

anv_layout_to_aux_usage() lacked a case for
VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR. Add an unreachable case, because we
don't support the extension.

Acked-by: Jason Ekstrand 

---

 src/intel/vulkan/anv_image.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 9405a8c0f9..c84fc8ddea 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -520,6 +520,9 @@ anv_layout_to_aux_usage(const struct gen_device_info * 
const devinfo,
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
   assert(!color_aspect);
   return ISL_AUX_USAGE_HIZ;
+
+   case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
+  unreachable("VK_KHR_shared_presentable_image is unsupported");
}
 
/* If the layout isn't recognized in the exhaustive switch above, the

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Mesa (master): i965: Fix -Wunused-variable in gen8_write_pma_stall_bits()

[Chad Versace]

Module: Mesa
Branch: master
Commit: 55f335bd303da8fff90ccc8d7e43aac70d4b80b5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55f335bd303da8fff90ccc8d7e43aac70d4b80b5

Author: Chad Versace 
Date:   Thu Jun 22 14:42:47 2017 -0700

i965: Fix -Wunused-variable in gen8_write_pma_stall_bits()

Trivial fix.  'ctx' was unused.

---

 src/mesa/drivers/dri/i965/gen8_depth_state.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c 
b/src/mesa/drivers/dri/i965/gen8_depth_state.c
index 29f16b7960..52c6dd0787 100644
--- a/src/mesa/drivers/dri/i965/gen8_depth_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c
@@ -324,8 +324,6 @@ pma_fix_enable(const struct brw_context *brw)
 void
 gen8_write_pma_stall_bits(struct brw_context *brw, uint32_t pma_stall_bits)
 {
-   struct gl_context *ctx = &brw->ctx;
-
/* If we haven't actually changed the value, bail now to avoid unnecessary
 * pipeline stalls and register writes.
 */

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Mesa (master): i965/CFL: Add PCI Ids for Coffee Lake.

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: de7ed0ba55225c391b439a129c4fc5f57359416f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de7ed0ba55225c391b439a129c4fc5f57359416f

Author: Anusha Srivatsa 
Date:   Thu Jun 22 10:42:32 2017 -0700

i965/CFL: Add PCI Ids for Coffee Lake.

Coffee Lake has a gen9 graphics following KBL.
From 3D perspective, CFL is a clone of KBL/SKL features.

v2: Change commit message, correct alignment 
v3: Update IDs.
v4: Initialize l3_banks, correct nomenclature 

Cc: Rodrigo Vivi 
Signed-off-by: Anusha Srivatsa 
Acked-by: Benjamin Widawsky 
Reviewed-by: Anuj Phogat 

---

 include/pci_ids/i965_pci_ids.h | 11 +++
 src/intel/common/gen_device_info.c | 26 ++
 src/intel/common/gen_device_info.h |  1 +
 3 files changed, 38 insertions(+)

diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h
index b296359cde..57e70b7aed 100644
--- a/include/pci_ids/i965_pci_ids.h
+++ b/include/pci_ids/i965_pci_ids.h
@@ -165,6 +165,17 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 
(Kaby Lake GT3)")
 CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4")
 CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)")
 CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)")
+CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
+CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)")
+CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)")
+CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
+CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
+CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
+CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)")
 CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
 CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)")
 CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)")
diff --git a/src/intel/common/gen_device_info.c 
b/src/intel/common/gen_device_info.c
index 423748ea08..f008b76ea4 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -607,6 +607,32 @@ static const struct gen_device_info 
gen_device_info_glk_2x6 = {
.is_geminilake = true,
 };
 
+static const struct gen_device_info gen_device_info_cfl_gt1 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 1,
+
+   .num_slices = 1,
+   .l3_banks = 2,
+};
+static const struct gen_device_info gen_device_info_cfl_gt2 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 2,
+
+   .num_slices = 1,
+   .l3_banks = 4,
+};
+
+static const struct gen_device_info gen_device_info_cfl_gt3 = {
+   GEN9_FEATURES,
+   .is_coffeelake = true,
+   .gt = 3,
+
+   .num_slices = 2,
+   .l3_banks = 8,
+};
+
 #define GEN10_HW_INFO   \
.gen = 10,   \
.num_thread_per_eu = 7,  \
diff --git a/src/intel/common/gen_device_info.h 
b/src/intel/common/gen_device_info.h
index cc83857b75..a83251ccfc 100644
--- a/src/intel/common/gen_device_info.h
+++ b/src/intel/common/gen_device_info.h
@@ -46,6 +46,7 @@ struct gen_device_info
bool is_broxton;
bool is_kabylake;
bool is_geminilake;
+   bool is_coffeelake;
bool is_cannonlake;
 
bool has_hiz_and_separate_stencil;

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Mesa (master): anv/cnl: Add #defines for MOCS and genX(x)

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 1e5a5d18d1711d74db33e96c6cabb0cef20b9ce7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e5a5d18d1711d74db33e96c6cabb0cef20b9ce7

Author: Anuj Phogat 
Date:   Fri May 26 09:05:51 2017 -0700

anv/cnl: Add #defines for MOCS and genX(x)

Signed-off-by: Anuj Phogat 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/anv_private.h | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index fe6ac3bc1b..e5d88f2815 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1018,6 +1018,17 @@ _anv_combine_address(struct anv_batch *batch, void 
*location,
   .IndextoMOCSTables   = 1  \
}
 
+/* Cannonlake MOCS defines are duplicates of Skylake MOCS defines. */
+#define GEN10_MOCS (struct GEN10_MEMORY_OBJECT_CONTROL_STATE) {  \
+  /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */  \
+  .IndextoMOCSTables   = 2 \
+   }
+
+#define GEN10_MOCS_PTE { \
+  /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */   \
+  .IndextoMOCSTables   = 1  \
+   }
+
 struct anv_device_memory {
struct anv_bo *  bo;
struct anv_memory_type * type;
@@ -2414,6 +2425,9 @@ ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, 
VkShaderModule)
 #  define genX(x) gen9_##x
 #  include "anv_genX.h"
 #  undef genX
+#  define genX(x) gen10_##x
+#  include "anv_genX.h"
+#  undef genX
 #endif
 
 #endif /* ANV_PRIVATE_H */

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Mesa (master): anv/cnl: Use GENX(xx) in place of GEN9_xx

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: bf1d2c37c6a3e48dcdecd3559d6026f684d67ee0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf1d2c37c6a3e48dcdecd3559d6026f684d67ee0

Author: Anuj Phogat 
Date:   Fri May 26 09:10:35 2017 -0700

anv/cnl: Use GENX(xx) in place of GEN9_xx

Signed-off-by: Anuj Phogat 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/gen8_cmd_buffer.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index 52412064a9..a209d70161 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -479,19 +479,19 @@ genX(cmd_buffer_flush_dynamic_state)(struct 
anv_cmd_buffer *cmd_buffer)
if (cmd_buffer->state.dirty & ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS) {
   struct anv_state cc_state =
  anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
-GEN9_COLOR_CALC_STATE_length * 4,
+GENX(COLOR_CALC_STATE_length) * 4,
 64);
-  struct GEN9_COLOR_CALC_STATE cc = {
+  struct GENX(COLOR_CALC_STATE) cc = {
  .BlendConstantColorRed = cmd_buffer->state.dynamic.blend_constants[0],
  .BlendConstantColorGreen = 
cmd_buffer->state.dynamic.blend_constants[1],
  .BlendConstantColorBlue = 
cmd_buffer->state.dynamic.blend_constants[2],
  .BlendConstantColorAlpha = 
cmd_buffer->state.dynamic.blend_constants[3],
   };
-  GEN9_COLOR_CALC_STATE_pack(NULL, cc_state.map, &cc);
+  GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);
 
   anv_state_flush(cmd_buffer->device, cc_state);
 
-  anv_batch_emit(&cmd_buffer->batch, GEN9_3DSTATE_CC_STATE_POINTERS, ccp) {
+  anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_CC_STATE_POINTERS), ccp) 
{
  ccp.ColorCalcStatePointer = cc_state.offset;
  ccp.ColorCalcStatePointerValid = true;
   }
@@ -502,10 +502,10 @@ genX(cmd_buffer_flush_dynamic_state)(struct 
anv_cmd_buffer *cmd_buffer)
   ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK |
   ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK |
   ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE)) {
-  uint32_t dwords[GEN9_3DSTATE_WM_DEPTH_STENCIL_length];
+  uint32_t dwords[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
   struct anv_dynamic_state *d = &cmd_buffer->state.dynamic;
-  struct GEN9_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
- GEN9_3DSTATE_WM_DEPTH_STENCIL_header,
+  struct GENX(3DSTATE_WM_DEPTH_STENCIL) wm_depth_stencil = {
+ GENX(3DSTATE_WM_DEPTH_STENCIL_header),
 
  .StencilTestMask = d->stencil_compare_mask.front & 0xff,
  .StencilWriteMask = d->stencil_write_mask.front & 0xff,
@@ -520,7 +520,7 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer 
*cmd_buffer)
 (d->stencil_write_mask.front || d->stencil_write_mask.back) &&
 pipeline->writes_stencil,
   };
-  GEN9_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, dwords, &wm_depth_stencil);
+  GENX(3DSTATE_WM_DEPTH_STENCIL_pack)(NULL, dwords, &wm_depth_stencil);
 
   anv_batch_emit_merge(&cmd_buffer->batch, dwords,
pipeline->gen9.wm_depth_stencil);

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Mesa (master): intel/genxml: Combine DataDWord{0, 1} fields in to ImmediateData field

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 97f75fdfd07bda68c2439a1925f689ce5c14fa8f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=97f75fdfd07bda68c2439a1925f689ce5c14fa8f

Author: Anuj Phogat 
Date:   Thu May 25 14:51:58 2017 -0700

intel/genxml: Combine DataDWord{0, 1} fields in to ImmediateData field

Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 

---

 src/intel/genxml/gen10.xml | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index 04d89cb3de..64041c169c 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3386,8 +3386,7 @@
 
 
 
-
-
+
   
 
   

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Mesa (master): intel/genxml: Add INSTDONE registers in gen10

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: c61b909d14ce98475620c18fc10f3cfd388e7480
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c61b909d14ce98475620c18fc10f3cfd388e7480

Author: Anuj Phogat 
Date:   Thu May 25 14:47:54 2017 -0700

intel/genxml: Add INSTDONE registers in gen10

Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 

---

 src/intel/genxml/gen10.xml | 115 +
 1 file changed, 115 insertions(+)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index 26dba2249a..04d89cb3de 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3568,6 +3568,121 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+
+
+
+  
+
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
+  
+
+
+
+  
+
   
 
 

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Mesa (master): intel/genxml: Add Gen10 CACHE_MODE_1 definitions

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: ceed55e7bba30b60a727309616d6f7e3c2e48a5a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ceed55e7bba30b60a727309616d6f7e3c2e48a5a

Author: Anuj Phogat 
Date:   Mon Jun  5 08:31:01 2017 -0700

intel/genxml: Add Gen10 CACHE_MODE_1 definitions

Few of the fields in this register are changed as compared
to gen9.xml.

V2: Remove some fields which are not valid anymore.

Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 

---

 src/intel/genxml/gen10.xml | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index d2bb130004..a19674a435 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3734,4 +3734,22 @@
 
   
 
+  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+  
+
 

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Mesa (master): intel/genxml: Rename StartInstanceLocation to StartingInstanceLocation

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 6338b63270e0676f7524c70fbbf4967e43524bd2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6338b63270e0676f7524c70fbbf4967e43524bd2

Author: Anuj Phogat 
Date:   Thu May 25 15:21:17 2017 -0700

intel/genxml: Rename StartInstanceLocation to StartingInstanceLocation

This is required because we already have a macro defined with
the name StartInstanceLocation.

Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 

---

 src/intel/genxml/gen10.xml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index 06260cf7f5..d2bb130004 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -2570,7 +2570,7 @@
   
 
 
-  
+  
   
 
 

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Mesa (master): intel/genxml: Rename IndirectStatePointer to BorderColorPointer

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 8869c8b3dcaddcece4bf78dcf0589abd6a914bd2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8869c8b3dcaddcece4bf78dcf0589abd6a914bd2

Author: Anuj Phogat 
Date:   Thu May 25 15:19:44 2017 -0700

intel/genxml: Rename IndirectStatePointer to BorderColorPointer

Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 

---

 src/intel/genxml/gen10.xml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index 64041c169c..06260cf7f5 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -900,7 +900,7 @@
   
   
 
-
+
 
 
   

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Mesa (master): anv/cnl: Generate and use gen10 functions

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: ac6bc0e0345f933cd7d6bb6fd8354302cdfe9550
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac6bc0e0345f933cd7d6bb6fd8354302cdfe9550

Author: Anuj Phogat 
Date:   Fri May 26 09:11:20 2017 -0700

anv/cnl: Generate and use gen10 functions

Signed-off-by: Anuj Phogat 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/anv_blorp.c| 3 +++
 src/intel/vulkan/anv_cmd_buffer.c   | 2 ++
 src/intel/vulkan/anv_device.c   | 2 ++
 src/intel/vulkan/anv_entrypoints_gen.py | 7 ++-
 4 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index a869eebc24..d28ea90928 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -111,6 +111,9 @@ anv_device_init_blorp(struct anv_device *device)
case 9:
   device->blorp.exec = gen9_blorp_exec;
   break;
+   case 10:
+  device->blorp.exec = gen10_blorp_exec;
+  break;
default:
   unreachable("Unknown hardware generation");
}
diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
b/src/intel/vulkan/anv_cmd_buffer.c
index 120b864df4..7317674843 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -335,6 +335,8 @@ anv_cmd_buffer_emit_state_base_address(struct 
anv_cmd_buffer *cmd_buffer)
   return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
case 9:
   return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
+   case 10:
+  return gen10_cmd_buffer_emit_state_base_address(cmd_buffer);
default:
   unreachable("unsupported gen\n");
}
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 2423aa3468..5505befcfa 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1231,6 +1231,8 @@ VkResult anv_CreateDevice(
   break;
case 9:
   result = gen9_init_device_state(device);
+   case 10:
+  result = gen10_init_device_state(device);
   break;
default:
   /* Shouldn't get here as we don't create physical devices for any other
diff --git a/src/intel/vulkan/anv_entrypoints_gen.py 
b/src/intel/vulkan/anv_entrypoints_gen.py
index 2168b7f64f..f1b4b0c95e 100644
--- a/src/intel/vulkan/anv_entrypoints_gen.py
+++ b/src/intel/vulkan/anv_entrypoints_gen.py
@@ -91,6 +91,7 @@ TEMPLATE_H = Template(textwrap.dedent("""\
   ${type_} gen75_${name}(${args});
   ${type_} gen8_${name}(${args});
   ${type_} gen9_${name}(${args});
+  ${type_} gen10_${name}(${args});
   % if guard is not None:
 #endif // ${guard}
   % endif
@@ -152,7 +153,7 @@ TEMPLATE_C = Template(textwrap.dedent(u"""\
  * either pick the correct entry point.
  */
 
-% for layer in ['anv', 'gen7', 'gen75', 'gen8', 'gen9']:
+% for layer in ['anv', 'gen7', 'gen75', 'gen8', 'gen9', 'gen10']:
   % for type_, name, args, _, _, guard in entrypoints:
 % if guard is not None:
 #ifdef ${guard}
@@ -184,6 +185,10 @@ TEMPLATE_C = Template(textwrap.dedent(u"""\
}
 
switch (devinfo->gen) {
+   case 10:
+  if (gen10_layer.entrypoints[index])
+ return gen10_layer.entrypoints[index];
+  /* fall through */
case 9:
   if (gen9_layer.entrypoints[index])
  return gen9_layer.entrypoints[index];

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Mesa (master): intel: Enable vulkan build for gen10

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 43d11b128c220e498416549724df604a68e59394
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=43d11b128c220e498416549724df604a68e59394

Author: Anuj Phogat 
Date:   Fri May 26 08:28:29 2017 -0700

intel: Enable vulkan build for gen10

This patch just enables building Vulkan libs for gen10. We
still don't have gen 10 support enabled on Vulkan.

Signed-off-by: Anuj Phogat 
Reviewed-by: Jason Ekstrand 

---

 src/intel/Makefile.sources | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources
index a877ff273d..2e5dab9f7c 100644
--- a/src/intel/Makefile.sources
+++ b/src/intel/Makefile.sources
@@ -261,3 +261,7 @@ VULKAN_GEN8_FILES := \
 VULKAN_GEN9_FILES := \
vulkan/gen8_cmd_buffer.c \
$(VULKAN_GENX_FILES)
+
+VULKAN_GEN10_FILES := \
+   vulkan/gen8_cmd_buffer.c \
+   $(VULKAN_GENX_FILES)

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Mesa (master): intel/genxml: Add better support for MI_MATH in gen10

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: 03fddd3c1d18c75e8a571233ed98b0ea4c4b1084
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=03fddd3c1d18c75e8a571233ed98b0ea4c4b1084

Author: Anuj Phogat 
Date:   Thu May 25 14:45:23 2017 -0700

intel/genxml: Add better support for MI_MATH in gen10

Signed-off-by: Anuj Phogat 
Reviewed-by: Rafael Antognolli 

---

 src/intel/genxml/gen10.xml | 69 +++---
 1 file changed, 65 insertions(+), 4 deletions(-)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index ebeb5da8fd..26dba2249a 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -968,6 +968,69 @@
 
   
 
+  
+
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
+
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
+
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+
+  
+
   
 
 
@@ -3175,10 +3238,8 @@
 
 
 
-
-
-
-  
+
+  
 
   
 

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Mesa (master): anv/cnl: Don't set FloatBlendOptimizationEnable{Mask}

[Anuj Phogat]

Module: Mesa
Branch: master
Commit: c17e214a6bf1da97c78fa7a6192cb1b498b773a1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c17e214a6bf1da97c78fa7a6192cb1b498b773a1

Author: Anuj Phogat 
Date:   Tue Jun 13 11:08:48 2017 -0700

anv/cnl: Don't set FloatBlendOptimizationEnable{Mask}

This field is remove from CACHE_MODE_1 register in gen10.

Signed-off-by: Anuj Phogat 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/genX_state.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index 00c4105a82..7a16ec06f7 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -55,10 +55,13 @@ genX(init_device_state)(struct anv_device *device)
 #if GEN_GEN >= 9
uint32_t cache_mode_1;
anv_pack_struct(&cache_mode_1, GENX(CACHE_MODE_1),
-   .PartialResolveDisableInVC = true,
-   .PartialResolveDisableInVCMask = true,
+#if GEN_GEN == 9
.FloatBlendOptimizationEnable = true,
-   .FloatBlendOptimizationEnableMask = true);
+   .FloatBlendOptimizationEnableMask = true,
+#endif
+   .PartialResolveDisableInVC = true,
+   .PartialResolveDisableInVCMask = true);
+
anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
   lri.RegisterOffset = GENX(CACHE_MODE_1_num);
   lri.DataDWord  = cache_mode_1;

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Mesa (master): i965/dri: Add intel_screen param to intel_create_winsys_renderbuffer

[Chad Versace]

Module: Mesa
Branch: master
Commit: a9e5e9f5ec5c76475d0e00751d4fc1bfcaf9b6c5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9e5e9f5ec5c76475d0e00751d4fc1bfcaf9b6c5

Author: Chad Versace 
Date:   Fri May 26 17:10:37 2017 -0700

i965/dri: Add intel_screen param to intel_create_winsys_renderbuffer

The param is currently unused. It will later be used it to support
R8G8B8X8 EGLConfigs on Skylake.

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/intel_fbo.c|  8 +---
 src/mesa/drivers/dri/i965/intel_fbo.h|  6 --
 src/mesa/drivers/dri/i965/intel_screen.c | 14 --
 3 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c 
b/src/mesa/drivers/dri/i965/intel_fbo.c
index 47c2f45d3f..f84cea1322 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -438,7 +438,8 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct 
gl_renderbuffer *rb,
  * \param num_samples must be quantized.
  */
 struct intel_renderbuffer *
-intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples)
+intel_create_winsys_renderbuffer(struct intel_screen *screen,
+ mesa_format format, unsigned num_samples)
 {
struct intel_renderbuffer *irb = CALLOC_STRUCT(intel_renderbuffer);
if (!irb)
@@ -470,11 +471,12 @@ intel_create_winsys_renderbuffer(mesa_format format, 
unsigned num_samples)
  * \param num_samples must be quantized.
  */
 struct intel_renderbuffer *
-intel_create_private_renderbuffer(mesa_format format, unsigned num_samples)
+intel_create_private_renderbuffer(struct intel_screen *screen,
+  mesa_format format, unsigned num_samples)
 {
struct intel_renderbuffer *irb;
 
-   irb = intel_create_winsys_renderbuffer(format, num_samples);
+   irb = intel_create_winsys_renderbuffer(screen, format, num_samples);
irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage;
 
return irb;
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h 
b/src/mesa/drivers/dri/i965/intel_fbo.h
index 56c8e6b3b2..7093ad6613 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.h
+++ b/src/mesa/drivers/dri/i965/intel_fbo.h
@@ -185,10 +185,12 @@ intel_rb_format(const struct intel_renderbuffer *rb)
 }
 
 extern struct intel_renderbuffer *
-intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples);
+intel_create_winsys_renderbuffer(struct intel_screen *screen,
+ mesa_format format, unsigned num_samples);
 
 struct intel_renderbuffer *
-intel_create_private_renderbuffer(mesa_format format, unsigned num_samples);
+intel_create_private_renderbuffer(struct intel_screen *screen,
+  mesa_format format, unsigned num_samples);
 
 struct gl_renderbuffer*
 intel_create_wrapped_renderbuffer(struct gl_context * ctx,
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c 
b/src/mesa/drivers/dri/i965/intel_screen.c
index e360d8d7c2..8621af2637 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1367,11 +1367,11 @@ intelCreateBuffer(__DRIscreen *dri_screen,
}
 
/* setup the hardware-based renderbuffers */
-   rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples);
+   rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples);
_mesa_attach_and_own_rb(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
 
if (mesaVis->doubleBufferMode) {
-  rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples);
+  rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples);
   _mesa_attach_and_own_rb(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
}
 
@@ -1384,10 +1384,11 @@ intelCreateBuffer(__DRIscreen *dri_screen,
   assert(mesaVis->stencilBits == 8);
 
   if (screen->devinfo.has_hiz_and_separate_stencil) {
- rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT,
+ rb = intel_create_private_renderbuffer(screen,
+MESA_FORMAT_Z24_UNORM_X8_UINT,
 num_samples);
  _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base);
- rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8,
+ rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_S_UINT8,
 num_samples);
  _mesa_attach_and_own_rb(fb, BUFFER_STENCIL, &rb->Base.Base);
   } else {
@@ -1395,7 +1396,8 @@ intelCreateBuffer(__DRIscreen *dri_screen,
   * Use combined depth/stencil. Note that the renderbuffer is
   * attached to two attachment points.
   */
- rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT,
+ rb = intel_create_private_renderbuffer(screen,
+MESA_FORMAT_Z24_UNORM_S8_UINT,

Mesa (master): i965: Move brw_context format arrays to intel_screen

[Chad Versace]

Module: Mesa
Branch: master
Commit: 4b9cbfa0b0c232d8f51820ad325c10d95f52f58e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b9cbfa0b0c232d8f51820ad325c10d95f52f58e

Author: Chad Versace 
Date:   Tue May 30 15:57:15 2017 -0700

i965: Move brw_context format arrays to intel_screen

This allows us to query the driver's supported formats in i965's DRI code,
where often there is available a DRIscreen but no GL context.

To reduce diff noise, this patch does not completely remove
brw_context's format arrays. It just redeclares them as pointers which
point to the arrays in intel_screen.

Specifically, move these two arrays from brw_context to intel_screen:
mesa_to_isl_render_format[]
mesa_format_supports_render[]

And add a new array to intel_screen,
mesa_format_supportex_texture[]
which brw_init_surface_formats() copies to ctx->TextureFormatSupported.

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_context.h |  5 +-
 src/mesa/drivers/dri/i965/brw_surface_formats.c | 92 +++--
 src/mesa/drivers/dri/i965/intel_screen.c|  2 +
 src/mesa/drivers/dri/i965/intel_screen.h|  5 ++
 4 files changed, 64 insertions(+), 40 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 0336914db8..a7d52f4e3e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1170,8 +1170,8 @@ struct brw_context
const struct brw_tracked_state render_atoms[76];
const struct brw_tracked_state compute_atoms[11];
 
-   enum isl_format mesa_to_isl_render_format[MESA_FORMAT_COUNT];
-   bool mesa_format_supports_render[MESA_FORMAT_COUNT];
+   const enum isl_format *mesa_to_isl_render_format;
+   const bool *mesa_format_supports_render;
 
/* PrimitiveRestart */
struct {
@@ -1427,6 +1427,7 @@ void brw_upload_image_surfaces(struct brw_context *brw,
struct brw_stage_prog_data *prog_data);
 
 /* brw_surface_formats.c */
+void intel_screen_init_surface_formats(struct intel_screen *screen);
 void brw_init_surface_formats(struct brw_context *brw);
 bool brw_render_target_supported(struct brw_context *brw,
  struct gl_renderbuffer *rb);
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index c33cafa836..a2bc1ded6d 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -203,17 +203,16 @@ brw_isl_format_for_mesa_format(mesa_format mesa_format)
 }
 
 void
-brw_init_surface_formats(struct brw_context *brw)
+intel_screen_init_surface_formats(struct intel_screen *screen)
 {
-   const struct gen_device_info *devinfo = &brw->screen->devinfo;
-   struct gl_context *ctx = &brw->ctx;
-   int gen;
+   const struct gen_device_info *devinfo = &screen->devinfo;
mesa_format format;
 
-   memset(&ctx->TextureFormatSupported, 0, 
sizeof(ctx->TextureFormatSupported));
+   memset(&screen->mesa_format_supports_texture, 0,
+  sizeof(screen->mesa_format_supports_texture));
 
-   gen = brw->gen * 10;
-   if (brw->is_g4x || brw->is_haswell)
+   int gen = devinfo->gen * 10;
+   if (devinfo->is_g4x || devinfo->is_haswell)
   gen += 5;
 
for (format = MESA_FORMAT_NONE + 1; format < MESA_FORMAT_COUNT; format++) {
@@ -237,7 +236,7 @@ brw_init_surface_formats(struct brw_context *brw)
 
   if (isl_format_supports_sampling(devinfo, texture) &&
   (isl_format_supports_filtering(devinfo, texture) || is_integer))
-ctx->TextureFormatSupported[format] = true;
+screen->mesa_format_supports_texture[format] = true;
 
   /* Re-map some render target formats to make them supported when they
* wouldn't be using their format for texturing.
@@ -301,30 +300,30 @@ brw_init_surface_formats(struct brw_context *brw)
*/
   if (isl_format_supports_rendering(devinfo, render) &&
   (isl_format_supports_alpha_blending(devinfo, render) || is_integer)) 
{
-brw->mesa_to_isl_render_format[format] = render;
-brw->mesa_format_supports_render[format] = true;
+screen->mesa_to_isl_render_format[format] = render;
+screen->mesa_format_supports_render[format] = true;
   }
}
 
/* We will check this table for FBO completeness, but the surface format
 * table above only covered color rendering.
 */
-   brw->mesa_format_supports_render[MESA_FORMAT_Z24_UNORM_S8_UINT] = true;
-   brw->mesa_format_supports_render[MESA_FORMAT_Z24_UNORM_X8_UINT] = true;
-   brw->mesa_format_supports_render[MESA_FORMAT_S_UINT8] = true;
-   brw->mesa_format_supports_render[MESA_FORMAT_Z_FLOAT32] = true;
-   brw->mesa_format_supports_render[MESA_FORMAT_Z32_FLOAT_S8X24_UINT] = true;
-   if (brw->gen >= 8)
-  brw->mesa_format_supports_render[MESA_FORMAT_Z_UNORM16] = true;
+   screen->mesa_format_supports_render[MESA_FORMAT_Z24_UNORM_S

Mesa (master): i965: Rename some vague format members of brw_context

[Chad Versace]

Module: Mesa
Branch: master
Commit: c09b2aefae95db6ebf3f7b10c6d69286eddb2dd4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c09b2aefae95db6ebf3f7b10c6d69286eddb2dd4

Author: Chad Versace 
Date:   Tue May 30 15:39:26 2017 -0700

i965: Rename some vague format members of brw_context

I'm swimming in a vortex of formats. Mesa formats, isl formats, DRI
formats, GL formats, etc.

It's easy to misinterpret the following brw_context members unless
you've recently read their definition.  In upcoming patches, I change
them from embedded arrays to simple pointers; after that, even their
definition doesn't help, because the MESA_FORMAT_COUNT hint will no
longer be present.

Rename them to prevent further confusion. While we're renaming, choose
shorter names too.

-format_supported_as_render_target
+mesa_format_supports_render

-render_target_format
+mesa_to_isl_render_format

Reviewed-by: Kenneth Graunke 

---

 src/mesa/drivers/dri/i965/brw_blorp.c| 10 +-
 src/mesa/drivers/dri/i965/brw_context.h  |  4 ++--
 src/mesa/drivers/dri/i965/brw_meta_util.c|  2 +-
 src/mesa/drivers/dri/i965/brw_surface_formats.c  | 20 ++--
 src/mesa/drivers/dri/i965/brw_tex_layout.c   |  2 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 +-
 src/mesa/drivers/dri/i965/intel_fbo.c|  2 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c|  4 ++--
 src/mesa/drivers/dri/i965/intel_tex.c|  2 +-
 9 files changed, 28 insertions(+), 28 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c 
b/src/mesa/drivers/dri/i965/brw_blorp.c
index 56b866438c..111c6712f9 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -243,8 +243,8 @@ brw_blorp_to_isl_format(struct brw_context *brw, 
mesa_format format,
   return ISL_FORMAT_R16_UNORM;
default: {
   if (is_render_target) {
- assert(brw->format_supported_as_render_target[format]);
- return brw->render_target_format[format];
+ assert(brw->mesa_format_supports_render[format]);
+ return brw->mesa_to_isl_render_format[format];
   } else {
  return brw_isl_format_for_mesa_format(format);
   }
@@ -607,7 +607,7 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
_mesa_get_format_base_format(dst_mt->format) == GL_DEPTH_STENCIL)
   return false;
 
-   if (!brw->format_supported_as_render_target[dst_image->TexFormat])
+   if (!brw->mesa_format_supports_render[dst_image->TexFormat])
   return false;
 
/* Source clipping shouldn't be necessary, since copytexsubimage (in
@@ -845,7 +845,7 @@ do_single_blorp_clear(struct brw_context *brw, struct 
gl_framebuffer *fb,
   struct blorp_batch batch;
   blorp_batch_init(&brw->blorp, &batch, brw, 0);
   blorp_fast_clear(&batch, &surf,
-   brw->render_target_format[format],
+   brw->mesa_to_isl_render_format[format],
level, logical_layer, num_layers,
x0, y0, x1, y1);
   blorp_batch_finish(&batch);
@@ -877,7 +877,7 @@ do_single_blorp_clear(struct brw_context *brw, struct 
gl_framebuffer *fb,
   struct blorp_batch batch;
   blorp_batch_init(&brw->blorp, &batch, brw, 0);
   blorp_clear(&batch, &surf,
-  brw->render_target_format[format],
+  brw->mesa_to_isl_render_format[format],
   ISL_SWIZZLE_IDENTITY,
   level, irb_logical_mt_layer(irb), num_layers,
   x0, y0, x1, y1,
diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
b/src/mesa/drivers/dri/i965/brw_context.h
index 0e300c6c2a..0336914db8 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1170,8 +1170,8 @@ struct brw_context
const struct brw_tracked_state render_atoms[76];
const struct brw_tracked_state compute_atoms[11];
 
-   enum isl_format render_target_format[MESA_FORMAT_COUNT];
-   bool format_supported_as_render_target[MESA_FORMAT_COUNT];
+   enum isl_format mesa_to_isl_render_format[MESA_FORMAT_COUNT];
+   bool mesa_format_supports_render[MESA_FORMAT_COUNT];
 
/* PrimitiveRestart */
struct {
diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c 
b/src/mesa/drivers/dri/i965/brw_meta_util.c
index 24160796bd..575f437750 100644
--- a/src/mesa/drivers/dri/i965/brw_meta_util.c
+++ b/src/mesa/drivers/dri/i965/brw_meta_util.c
@@ -289,7 +289,7 @@ brw_is_color_fast_clear_compatible(struct brw_context *brw,
 */
if (brw->gen >= 9 &&
brw_isl_format_for_mesa_format(mt->format) !=
-   brw->render_target_format[mt->format])
+   brw->mesa_to_isl_render_format[mt->format])
   return false;
 
/* Gen9 doesn't support fast clear on single-sampled SRGB buffers. When
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c 
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index f878317e92..c3

Mesa (master): egl/x11: Declare loop vars inside the loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: 263d4b8b1ca6d9955fcda7cc7d9edb6a8f4c045f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=263d4b8b1ca6d9955fcda7cc7d9edb6a8f4c045f

Author: Chad Versace 
Date:   Thu Jun 22 11:00:40 2017 -0700

egl/x11: Declare loop vars inside the loop

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/platform_x11.c | 15 +++
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index f91ad67d5f..2a19cdcc74 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -442,14 +442,13 @@ dri2_x11_process_buffers(struct dri2_egl_surface 
*dri2_surf,
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
xcb_rectangle_t rectangle;
-   unsigned i;
 
dri2_surf->buffer_count = count;
dri2_surf->have_fake_front = false;
 
/* This assumes the DRI2 buffer attachment tokens matches the
 * __DRIbuffer tokens. */
-   for (i = 0; i < count; i++) {
+   for (unsigned i = 0; i < count; i++) {
   dri2_surf->buffers[i].attachment = buffers[i].attachment;
   dri2_surf->buffers[i].name = buffers[i].name;
   dri2_surf->buffers[i].pitch = buffers[i].pitch;
@@ -730,7 +729,7 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
 {
xcb_depth_iterator_t d;
xcb_visualtype_t *visuals;
-   int i, j, count;
+   int count = 0;
unsigned int rgba_masks[4];
EGLint surface_type;
EGLint config_attrs[] = {
@@ -740,7 +739,6 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
};
 
d = xcb_screen_allowed_depths_iterator(dri2_dpy->screen);
-   count = 0;
 
surface_type =
   EGL_WINDOW_BIT |
@@ -754,12 +752,14 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
   EGLBoolean class_added[6] = { 0, };
 
   visuals = xcb_depth_visuals(d.data);
-  for (i = 0; i < xcb_depth_visuals_length(d.data); i++) {
+
+  for (int i = 0; i < xcb_depth_visuals_length(d.data); i++) {
 if (class_added[visuals[i]._class])
continue;
 
 class_added[visuals[i]._class] = EGL_TRUE;
-for (j = 0; dri2_dpy->driver_configs[j]; j++) {
+
+for (int j = 0; dri2_dpy->driver_configs[j]; j++) {
 struct dri2_egl_config *dri2_conf;
 const __DRIconfig *config = dri2_dpy->driver_configs[j];
 
@@ -916,12 +916,11 @@ dri2_x11_swap_buffers_region(_EGLDriver *drv, _EGLDisplay 
*disp,
EGLBoolean ret;
xcb_xfixes_region_t region;
xcb_rectangle_t rectangles[16];
-   int i;
 
if (numRects > (int)ARRAY_SIZE(rectangles))
   return dri2_copy_region(drv, disp, draw, dri2_surf->region);
 
-   for (i = 0; i < numRects; i++) {
+   for (int i = 0; i < numRects; i++) {
   rectangles[i].x = rects[i * 4];
   rectangles[i].y = dri2_surf->base.Height - rects[i * 4 + 1] - rects[i * 
4 + 3];
   rectangles[i].width = rects[i * 4 + 2];

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Mesa (master): egl/wayland: Declare loop vars inside the loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: 98497dfd6a594e36d5c3e3bba4fae5eb428a0856
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=98497dfd6a594e36d5c3e3bba4fae5eb428a0856

Author: Chad Versace 
Date:   Thu Jun 22 11:00:40 2017 -0700

egl/wayland: Declare loop vars inside the loop

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/platform_wayland.c | 44 +
 1 file changed, 17 insertions(+), 27 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_wayland.c 
b/src/egl/drivers/dri2/platform_wayland.c
index 128ef75105..a50b763643 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -245,13 +245,12 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay 
*disp, _EGLSurface *surf)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
-   int i;
 
(void) drv;
 
dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable);
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].wl_buffer)
  wl_buffer_destroy(dri2_surf->color_buffers[i].wl_buffer);
   if (dri2_surf->color_buffers[i].dri_image)
@@ -264,7 +263,7 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *surf)
}
 
if (dri2_dpy->dri2) {
-  for (i = 0; i < __DRI_BUFFER_COUNT; i++)
+  for (int i = 0; i < __DRI_BUFFER_COUNT; i++)
  if (dri2_surf->dri_buffers[i] &&
  dri2_surf->dri_buffers[i]->attachment != __DRI_BUFFER_BACK_LEFT)
 dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
@@ -296,9 +295,8 @@ dri2_wl_release_buffers(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].wl_buffer &&
   !dri2_surf->color_buffers[i].locked)
  wl_buffer_destroy(dri2_surf->color_buffers[i].wl_buffer);
@@ -318,7 +316,7 @@ dri2_wl_release_buffers(struct dri2_egl_surface *dri2_surf)
}
 
if (dri2_dpy->dri2) {
-  for (i = 0; i < __DRI_BUFFER_COUNT; i++)
+  for (int i = 0; i < __DRI_BUFFER_COUNT; i++)
  if (dri2_surf->dri_buffers[i] &&
  dri2_surf->dri_buffers[i]->attachment != __DRI_BUFFER_BACK_LEFT)
 dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
@@ -331,7 +329,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i, use_flags;
+   int use_flags;
unsigned int dri_image_format;
 
/* currently supports three WL DRM formats,
@@ -357,7 +355,7 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
wl_display_dispatch_queue_pending(dri2_dpy->wl_dpy, dri2_surf->wl_queue);
 
while (dri2_surf->back == NULL) {
-  for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+  for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
  /* Get an unlocked buffer, preferrably one with a dri_buffer
   * already allocated. */
  if (dri2_surf->color_buffers[i].locked)
@@ -464,7 +462,6 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
 
if (dri2_surf->base.Width != dri2_surf->wl_win->width ||
dri2_surf->base.Height != dri2_surf->wl_win->height) {
@@ -485,7 +482,7 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
/* If we have an extra unlocked buffer at this point, we had to do triple
 * buffering for a while, but now can go back to just double buffering.
 * That means we can free any unlocked buffer now. */
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (!dri2_surf->color_buffers[i].locked &&
   dri2_surf->color_buffers[i].wl_buffer) {
  wl_buffer_destroy(dri2_surf->color_buffers[i].wl_buffer);
@@ -549,8 +546,6 @@ dri2_wl_get_buffers(__DRIdrawable * driDrawable,
__DRIbuffer *buffer;
unsigned int bpp;
 
-   int i;
-
switch (dri2_surf->format) {
case WL_DRM_FORMAT_ARGB:
case WL_DRM_FORMAT_XRGB:
@@ -570,7 +565,7 @@ dri2_wl_get_buffers(__DRIdrawable * driDrawable,
   return NULL;
}
 
-   for (i = 0; i < count; ++i) {
+   for (int i = 0; i < count; ++i) {
   attachments_with_format[2*i] = attachments[i];
   attachments_with_format[2*i + 1] = bpp;
}
@@ -694,13 +689,11 @@ try_damage_buffer(struct dri2_egl_surface *dri2_surf,
   const EGLint *

Mesa (master): egl/drm: Declare EGLConfig attrib array inside loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: f8ad7f405492ae1b6b035dd41b6b4b77be51f719
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8ad7f405492ae1b6b035dd41b6b4b77be51f719

Author: Chad Versace 
Date:   Thu Jun 22 11:00:41 2017 -0700

egl/drm: Declare EGLConfig attrib array inside loop

No behavioral change. Just a readability cleanup.

Instead of modifying this small array on each loop iteration, we now
initialize it in-place with the values it needs.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/platform_drm.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index 7f907aff6c..11928225b9 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -598,10 +598,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
   { GBM_FORMAT_ARGB,0x00ff, 0xff00 },
   { GBM_FORMAT_RGB565,  0xf800, 0x },
};
-   EGLint attr_list[] = {
-  EGL_NATIVE_VISUAL_ID, 0,
-  EGL_NONE,
-   };
+
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
unsigned int count = 0;
 
@@ -619,7 +616,10 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
  if (visuals[j].red_mask != red || visuals[j].alpha_mask != alpha)
 continue;
 
- attr_list[1] = visuals[j].format;
+ const EGLint attr_list[] = {
+EGL_NATIVE_VISUAL_ID,  visuals[j].format,
+EGL_NONE,
+ };
 
  dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
count + 1, EGL_WINDOW_BIT, attr_list, NULL);

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Mesa (master): egl: Rename 'count' in ${platform}_add_configs_for_visuals (v2)

[Chad Versace]

Module: Mesa
Branch: master
Commit: ffbf50b1c67b90c6f45e9128e4ff6ef9c4ac5c29
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ffbf50b1c67b90c6f45e9128e4ff6ef9c4ac5c29

Author: Chad Versace 
Date:   Thu Jun 22 11:00:41 2017 -0700

egl: Rename 'count' in ${platform}_add_configs_for_visuals (v2)

Rename 'count' to 'config_count'. I didn't understand what the variable
did until I untangled the for-loops. Now the next person won't have that
problem.

v2: Rebase. Fix typo. Apply to all platforms (for emil).

Reviewed-by: Eric Engestrom   (v1)

---

 src/egl/drivers/dri2/platform_android.c | 10 +-
 src/egl/drivers/dri2/platform_drm.c | 10 +-
 src/egl/drivers/dri2/platform_surfaceless.c | 11 ++-
 src/egl/drivers/dri2/platform_x11.c | 22 --
 4 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 320ae25f46..acd45dab4d 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1036,7 +1036,7 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
};
 
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   int count = 0;
+   int config_count = 0;
 
/* The nesting of loops is significant here. Also significant is the order
 * of the HAL pixel formats. Many Android apps (such as Google's official
@@ -1070,11 +1070,11 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
 
  struct dri2_egl_config *dri2_conf =
 dri2_add_config(dpy, dri2_dpy->driver_configs[j],
-count + 1, surface_type, config_attrs,
+config_count + 1, surface_type, config_attrs,
 visuals[i].rgba_masks);
  if (dri2_conf) {
-if (dri2_conf->base.ConfigID == count + 1)
-   count++;
+if (dri2_conf->base.ConfigID == config_count + 1)
+   config_count++;
 format_count[i]++;
  }
   }
@@ -1087,7 +1087,7 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   return (count != 0);
+   return (config_count != 0);
 }
 
 static int
diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index 11928225b9..9b4a942b60 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -600,7 +600,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
};
 
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   unsigned int count = 0;
+   unsigned int config_count = 0;
 
for (unsigned i = 0; dri2_dpy->driver_configs[i]; i++) {
   unsigned int red, alpha;
@@ -622,10 +622,10 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
  };
 
  dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
-   count + 1, EGL_WINDOW_BIT, attr_list, NULL);
+   config_count + 1, EGL_WINDOW_BIT, attr_list, NULL);
  if (dri2_conf) {
-if (dri2_conf->base.ConfigID == count + 1)
-   count++;
+if (dri2_conf->base.ConfigID == config_count + 1)
+   config_count++;
 format_count[j]++;
  }
   }
@@ -638,7 +638,7 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
   }
}
 
-   return (count != 0);
+   return (config_count != 0);
 }
 
 static const struct dri2_egl_display_vtbl dri2_drm_display_vtbl = {
diff --git a/src/egl/drivers/dri2/platform_surfaceless.c 
b/src/egl/drivers/dri2/platform_surfaceless.c
index d780ce4955..1091b4febd 100644
--- a/src/egl/drivers/dri2/platform_surfaceless.c
+++ b/src/egl/drivers/dri2/platform_surfaceless.c
@@ -201,18 +201,19 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   { "RGB565",   { 0x00f800, 0x07e0, 0x1f, 0x0 } },
};
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   unsigned int count = 0;
+   unsigned int config_count = 0;
 
for (unsigned i = 0; dri2_dpy->driver_configs[i] != NULL; i++) {
   for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
  struct dri2_egl_config *dri2_conf;
 
  dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i],
-   count + 1, EGL_PBUFFER_BIT, NULL, visuals[j].rgba_masks);
+   config_count + 1, EGL_PBUFFER_BIT, NULL,
+   visuals[j].rgba_masks);
 
  if (dri2_conf) {
-if (dri2_conf->base.ConfigID == count + 1)
-   count++;
+if (dri2_conf->base.ConfigID == config_count + 1)
+   config_count++;
 format_count[j]++;
  }
   }
@@ -225,7 +226,7 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   return (count != 0);
+   return (config_count != 0);
 }
 
 static const struct dri2_egl_d

Mesa (master): egl/android: Declare loop vars inside their loops (v2)

[Chad Versace]

Module: Mesa
Branch: master
Commit: 09455123f34ca3b43f3514ed0eab0b3cf0830257
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=09455123f34ca3b43f3514ed0eab0b3cf0830257

Author: Chad Versace 
Date:   Thu Jun 22 11:00:40 2017 -0700

egl/android: Declare loop vars inside their loops (v2)

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

v2: Rebase.

Reviewed-by: Eric Engestrom  (v1)

---

 src/egl/drivers/dri2/platform_android.c | 34 +++--
 1 file changed, 15 insertions(+), 19 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index dba5ad6d55..705f92dffa 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -64,9 +64,7 @@ static const struct droid_yuv_format droid_yuv_formats[] = {
 static int
 get_fourcc_yuv(int native, int is_ycrcb, int chroma_step)
 {
-   int i;
-
-   for (i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
+   for (int i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
   if (droid_yuv_formats[i].native == native &&
   droid_yuv_formats[i].is_ycrcb == is_ycrcb &&
   droid_yuv_formats[i].chroma_step == chroma_step)
@@ -78,9 +76,7 @@ get_fourcc_yuv(int native, int is_ycrcb, int chroma_step)
 static bool
 is_yuv(int native)
 {
-   int i;
-
-   for (i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
+   for (int i = 0; i < ARRAY_SIZE(droid_yuv_formats); ++i)
   if (droid_yuv_formats[i].native == native)
  return true;
 
@@ -299,9 +295,8 @@ droid_free_local_buffers(struct dri2_egl_surface *dri2_surf)
 {
struct dri2_egl_display *dri2_dpy =
   dri2_egl_display(dri2_surf->base.Resource.Display);
-   int i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->local_buffers); i++) {
+   for (int i = 0; i < ARRAY_SIZE(dri2_surf->local_buffers); i++) {
   if (dri2_surf->local_buffers[i]) {
  dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
dri2_surf->local_buffers[i]);
@@ -951,10 +946,10 @@ static int
 droid_get_buffers_parse_attachments(struct dri2_egl_surface *dri2_surf,
 unsigned int *attachments, int count)
 {
-   int num_buffers = 0, i;
+   int num_buffers = 0;
 
/* fill dri2_surf->buffers */
-   for (i = 0; i < count * 2; i += 2) {
+   for (int i = 0; i < count * 2; i += 2) {
   __DRIbuffer *buf, *local;
 
   assert(num_buffers < ARRAY_SIZE(dri2_surf->buffers));
@@ -1046,8 +1041,9 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
  EGL_RECORDABLE_ANDROID, EGL_TRUE,
  EGL_NONE
};
+
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   int count, i, j;
+   int count = 0;
 
/* The nesting of loops is significant here. Also significant is the order
 * of the HAL pixel formats. Many Android apps (such as Google's official
@@ -1067,17 +1063,17 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
 * (chadversary) testing on Android Nougat, this was good enough to pacify
 * the buggy clients.
 */
-   count = 0;
-   for (i = 0; i < ARRAY_SIZE(visuals); i++) {
-  const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
-  struct dri2_egl_config *dri2_conf;
+   for (int i = 0; i < ARRAY_SIZE(visuals); i++) {
+  for (int j = 0; dri2_dpy->driver_configs[j]; j++) {
+ const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
 
-  for (j = 0; dri2_dpy->driver_configs[j]; j++) {
  config_attrs[1] = visuals[i].format;
  config_attrs[3] = visuals[i].format;
 
- dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[j],
-   count + 1, surface_type, config_attrs, visuals[i].rgba_masks);
+ struct dri2_egl_config *dri2_conf =
+dri2_add_config(dpy, dri2_dpy->driver_configs[j],
+count + 1, surface_type, config_attrs,
+visuals[i].rgba_masks);
  if (dri2_conf) {
 if (dri2_conf->base.ConfigID == count + 1)
count++;
@@ -1086,7 +1082,7 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   for (i = 0; i < ARRAY_SIZE(format_count); i++) {
+   for (int i = 0; i < ARRAY_SIZE(format_count); i++) {
   if (!format_count[i]) {
  _eglLog(_EGL_DEBUG, "No DRI config supports native format 0x%x",
  visuals[i].format);

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Mesa (master): egl/dri2: Declare loop vars inside the loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: cd717cbe1a6c73684dffd91ac6c2e16b3edb38ed
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd717cbe1a6c73684dffd91ac6c2e16b3edb38ed

Author: Chad Versace 
Date:   Thu Jun 22 11:00:40 2017 -0700

egl/dri2: Declare loop vars inside the loop

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.
This patch touches only egl_dri2.c.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/egl_dri2.c | 43 ++---
 1 file changed, 19 insertions(+), 24 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 763e6d6952..c6af57fbc5 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -195,16 +195,15 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig 
*dri_config, int id,
_EGLConfig *matching_config;
EGLint num_configs = 0;
EGLint config_id;
-   int i;
 
_eglInitConfig(&base, disp, id);
 
-   i = 0;
double_buffer = 0;
bind_to_texture_rgb = 0;
bind_to_texture_rgba = 0;
 
-   while (dri2_dpy->core->indexConfigAttrib(dri_config, i++, &attrib, &value)) 
{
+   for (int i = 0; dri2_dpy->core->indexConfigAttrib(dri_config, i, &attrib,
+ &value); ++i) {
   switch (attrib) {
   case __DRI_ATTRIB_RENDER_TYPE:
  if (value & __DRI_ATTRIB_RGBA_BIT)
@@ -287,7 +286,7 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig 
*dri_config, int id,
}
 
if (attr_list)
-  for (i = 0; attr_list[i] != EGL_NONE; i += 2)
+  for (int i = 0; attr_list[i] != EGL_NONE; i += 2)
  _eglSetConfigKey(&base, attr_list[i], attr_list[i+1]);
 
if (rgba_masks && memcmp(rgba_masks, dri_masks, sizeof(dri_masks)))
@@ -442,12 +441,12 @@ dri2_bind_extensions(struct dri2_egl_display *dri2_dpy,
  const __DRIextension **extensions,
  bool optional)
 {
-   int i, j, ret = EGL_TRUE;
+   int ret = EGL_TRUE;
void *field;
 
-   for (i = 0; extensions[i]; i++) {
+   for (int i = 0; extensions[i]; i++) {
   _eglLog(_EGL_DEBUG, "found extension `%s'", extensions[i]->name);
-  for (j = 0; matches[j].name; j++) {
+  for (int j = 0; matches[j].name; j++) {
  if (strcmp(extensions[i]->name, matches[j].name) == 0 &&
  extensions[i]->version >= matches[j].version) {
 field = ((char *) dri2_dpy + matches[j].offset);
@@ -459,7 +458,7 @@ dri2_bind_extensions(struct dri2_egl_display *dri2_dpy,
   }
}
 
-   for (j = 0; matches[j].name; j++) {
+   for (int j = 0; matches[j].name; j++) {
   field = ((char *) dri2_dpy + matches[j].offset);
   if (*(const __DRIextension **) field == NULL) {
  if (optional) {
@@ -481,7 +480,7 @@ dri2_open_driver(_EGLDisplay *disp)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
const __DRIextension **extensions = NULL;
-   char path[PATH_MAX], *search_paths, *p, *next, *end;
+   char path[PATH_MAX], *search_paths, *next, *end;
char *get_extensions_name;
const __DRIextension **(*get_extensions)(void);
 
@@ -495,7 +494,7 @@ dri2_open_driver(_EGLDisplay *disp)
 
dri2_dpy->driver = NULL;
end = search_paths + strlen(search_paths);
-   for (p = search_paths; p < end; p = next + 1) {
+   for (char *p = search_paths; p < end; p = next + 1) {
   int len;
   next = strchr(p, ':');
   if (next == NULL)
@@ -911,7 +910,6 @@ void
 dri2_display_destroy(_EGLDisplay *disp)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
-   unsigned i;
 
if (dri2_dpy->own_dri_screen)
   dri2_dpy->core->destroyScreen(dri2_dpy->dri_screen);
@@ -963,7 +961,7 @@ dri2_display_destroy(_EGLDisplay *disp)
 * for the cleanup.
 */
if (disp->Platform != _EGL_PLATFORM_DRM && dri2_dpy->driver_configs) {
-  for (i = 0; dri2_dpy->driver_configs[i]; i++)
+  for (unsigned i = 0; dri2_dpy->driver_configs[i]; i++)
  free((__DRIconfig *) dri2_dpy->driver_configs[i]);
   free(dri2_dpy->driver_configs);
}
@@ -1961,8 +1959,6 @@ dri2_create_image_mesa_drm_buffer(_EGLDisplay *disp, 
_EGLContext *ctx,
 static EGLBoolean
 dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
 {
-   unsigned i;
-
/**
  * The spec says:
  *
@@ -1992,7 +1988,7 @@ dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
 *  specified for a plane's pitch or offset isn't supported by EGL,
 *  EGL_BAD_ACCESS is generated."
 */
-   for (i = 0; i < ARRAY_SIZE(attrs->DMABufPlanePitches); ++i) {
+   for (unsigned i = 0; i < ARRAY_SIZE(attrs->DMABufPlanePitches); ++i) {
   if (attrs->DMABufPlanePitches[i].IsPresent &&
   attrs->DMABufPlanePitches[i].Value <= 0) {
  _eglError(EGL_BAD_ACCESS, "invalid pitch");
@@ -2007,7 +2003,7 @@ dri2_check_dma_buf_attribs(const _EGLImageAttribs *attrs)
 * This is referring to EGL_DMA_BUF_PLANE0_MODIFIER_LO_EXT and
 * EGL_DMA_B

Mesa (master): egl/x11: Declare EGLConfig attrib array inside loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: a6fad5596141667b0986f083996b05ca829d1f45
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6fad5596141667b0986f083996b05ca829d1f45

Author: Chad Versace 
Date:   Thu Jun 22 11:00:41 2017 -0700

egl/x11: Declare EGLConfig attrib array inside loop

No behavioral change. Just a readability cleanup.

Instead of modifying this small array on each loop iteration, we now
initialize it in-place with the values it needs.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/platform_x11.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index 2a19cdcc74..16cc31340e 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -730,13 +730,7 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
xcb_depth_iterator_t d;
xcb_visualtype_t *visuals;
int count = 0;
-   unsigned int rgba_masks[4];
EGLint surface_type;
-   EGLint config_attrs[] = {
-  EGL_NATIVE_VISUAL_ID,   0,
-  EGL_NATIVE_VISUAL_TYPE, 0,
-  EGL_NONE
-   };
 
d = xcb_screen_allowed_depths_iterator(dri2_dpy->screen);
 
@@ -763,13 +757,19 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
 struct dri2_egl_config *dri2_conf;
 const __DRIconfig *config = dri2_dpy->driver_configs[j];
 
-config_attrs[1] = visuals[i].visual_id;
-config_attrs[3] = visuals[i]._class;
+const EGLint config_attrs[] = {
+EGL_NATIVE_VISUAL_ID,visuals[i].visual_id,
+EGL_NATIVE_VISUAL_TYPE,  visuals[i]._class,
+EGL_NONE
+};
+
+unsigned int rgba_masks[4] = {
+   visuals[i].red_mask,
+   visuals[i].green_mask,
+   visuals[i].blue_mask,
+   0,
+};
 
-rgba_masks[0] = visuals[i].red_mask;
-rgba_masks[1] = visuals[i].green_mask;
-rgba_masks[2] = visuals[i].blue_mask;
-rgba_masks[3] = 0;
 dri2_conf = dri2_add_config(disp, config, count + 1, surface_type,
 config_attrs, rgba_masks);
 if (dri2_conf)

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Mesa (master): egl/surfaceless: Move loop vars inside the loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: 927625ca60d56af0a8402b4a6697c0c8654d9a69
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=927625ca60d56af0a8402b4a6697c0c8654d9a69

Author: Chad Versace 
Date:   Thu Jun 22 11:00:40 2017 -0700

egl/surfaceless: Move loop vars inside the loop

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/platform_surfaceless.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_surfaceless.c 
b/src/egl/drivers/dri2/platform_surfaceless.c
index f292f2b3fe..d780ce4955 100644
--- a/src/egl/drivers/dri2/platform_surfaceless.c
+++ b/src/egl/drivers/dri2/platform_surfaceless.c
@@ -201,11 +201,10 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   { "RGB565",   { 0x00f800, 0x07e0, 0x1f, 0x0 } },
};
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
-   unsigned int count, i, j;
+   unsigned int count = 0;
 
-   count = 0;
-   for (i = 0; dri2_dpy->driver_configs[i] != NULL; i++) {
-  for (j = 0; j < ARRAY_SIZE(visuals); j++) {
+   for (unsigned i = 0; dri2_dpy->driver_configs[i] != NULL; i++) {
+  for (unsigned j = 0; j < ARRAY_SIZE(visuals); j++) {
  struct dri2_egl_config *dri2_conf;
 
  dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i],
@@ -219,7 +218,7 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   }
}
 
-   for (i = 0; i < ARRAY_SIZE(format_count); i++) {
+   for (unsigned i = 0; i < ARRAY_SIZE(format_count); i++) {
   if (!format_count[i]) {
  _eglLog(_EGL_DEBUG, "No DRI config supports native format %s",
visuals[i].format_name);
@@ -272,7 +271,6 @@ dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay 
*disp)
 {
struct dri2_egl_display *dri2_dpy;
const char* err;
-   int i;
int driver_loaded = 0;
 
loader_set_logger(_eglLog);
@@ -286,7 +284,7 @@ dri2_initialize_surfaceless(_EGLDriver *drv, _EGLDisplay 
*disp)
 
const int limit = 64;
const int base = 128;
-   for (i = 0; i < limit; ++i) {
+   for (int i = 0; i < limit; ++i) {
   char *card_path;
   if (asprintf(&card_path, DRM_RENDER_DEV_NAME, DRM_DIR_NAME, base + i) < 
0)
  continue;

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Mesa (master): egl/android: Declare EGLConfig attrib array inside loop (v2 )

[Chad Versace]

Module: Mesa
Branch: master
Commit: bd789098a53518ac559eba7305876f3dcacdc863
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bd789098a53518ac559eba7305876f3dcacdc863

Author: Chad Versace 
Date:   Thu Jun 22 11:00:41 2017 -0700

egl/android: Declare EGLConfig attrib array inside loop (v2)

No behavioral change. Just a readability cleanup.

Instead of modifying this small array on each loop iteration, we now
initialize it in-place with the values it needs.

v2: Rebase.

Reviewed-by: Eric Engestrom  (v1)

---

 src/egl/drivers/dri2/platform_android.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 705f92dffa..320ae25f46 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1034,13 +1034,6 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   { HAL_PIXEL_FORMAT_RGB_565,   { 0xf800, 0x07e0, 0x001f, 
0x } },
   { HAL_PIXEL_FORMAT_BGRA_, { 0x00ff, 0xff00, 0x00ff, 
0xff00 } },
};
-   EGLint config_attrs[] = {
- EGL_NATIVE_VISUAL_ID,   0,
- EGL_NATIVE_VISUAL_TYPE, 0,
- EGL_FRAMEBUFFER_TARGET_ANDROID, EGL_TRUE,
- EGL_RECORDABLE_ANDROID, EGL_TRUE,
- EGL_NONE
-   };
 
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
int count = 0;
@@ -1067,8 +1060,13 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
   for (int j = 0; dri2_dpy->driver_configs[j]; j++) {
  const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
 
- config_attrs[1] = visuals[i].format;
- config_attrs[3] = visuals[i].format;
+ const EGLint config_attrs[] = {
+   EGL_NATIVE_VISUAL_ID,   visuals[i].format,
+   EGL_NATIVE_VISUAL_TYPE, visuals[i].format,
+   EGL_FRAMEBUFFER_TARGET_ANDROID, EGL_TRUE,
+   EGL_RECORDABLE_ANDROID, EGL_TRUE,
+   EGL_NONE
+ };
 
  struct dri2_egl_config *dri2_conf =
 dri2_add_config(dpy, dri2_dpy->driver_configs[j],

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Mesa (master): egl/drm: Move loop vars inside the loop

[Chad Versace]

Module: Mesa
Branch: master
Commit: c31146f0808f67cd7e173b0ca5786eb342e9e4d0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c31146f0808f67cd7e173b0ca5786eb342e9e4d0

Author: Chad Versace 
Date:   Thu Jun 22 11:00:40 2017 -0700

egl/drm: Move loop vars inside the loop

That is, consistently do this:

for (int i = 0; ...)

No behavioral change.

Reviewed-by: Eric Engestrom 

---

 src/egl/drivers/dri2/platform_drm.c | 37 +++--
 1 file changed, 15 insertions(+), 22 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index 869f599df5..7f907aff6c 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -68,9 +68,8 @@ release_buffer(struct gbm_surface *_surf, struct gbm_bo *bo)
 {
struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
struct dri2_egl_surface *dri2_surf = surf->dri_private;
-   unsigned i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].bo == bo) {
 dri2_surf->color_buffers[i].locked = false;
   }
@@ -82,9 +81,8 @@ has_free_buffers(struct gbm_surface *_surf)
 {
struct gbm_dri_surface *surf = (struct gbm_dri_surface *) _surf;
struct dri2_egl_surface *dri2_surf = surf->dri_private;
-   unsigned i;
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
+   for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
   if (!dri2_surf->color_buffers[i].locked)
 return 1;
 
@@ -189,16 +187,15 @@ dri2_drm_destroy_surface(_EGLDriver *drv, _EGLDisplay 
*disp, _EGLSurface *surf)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
-   unsigned i;
 
dri2_dpy->core->destroyDrawable(dri2_surf->dri_drawable);
 
-   for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+   for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
   if (dri2_surf->color_buffers[i].bo)
 gbm_bo_destroy(dri2_surf->color_buffers[i].bo);
}
 
-   for (i = 0; i < __DRI_BUFFER_COUNT; i++) {
+   for (unsigned i = 0; i < __DRI_BUFFER_COUNT; i++) {
   if (dri2_surf->dri_buffers[i])
  dri2_dpy->dri2->releaseBuffer(dri2_dpy->dri_screen,
dri2_surf->dri_buffers[i]);
@@ -216,10 +213,9 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
   dri2_egl_display(dri2_surf->base.Resource.Display);
struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
int age = 0;
-   unsigned i;
 
if (dri2_surf->back == NULL) {
-  for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
+  for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
 if (!dri2_surf->color_buffers[i].locked &&
  dri2_surf->color_buffers[i].age >= age) {
dri2_surf->back = &dri2_surf->color_buffers[i];
@@ -367,7 +363,6 @@ dri2_drm_get_buffers(__DRIdrawable * driDrawable,
unsigned int *attachments_with_format;
__DRIbuffer *buffer;
const unsigned int format = 32;
-   int i;
 
attachments_with_format = calloc(count, 2 * sizeof(unsigned int));
if (!attachments_with_format) {
@@ -375,7 +370,7 @@ dri2_drm_get_buffers(__DRIdrawable * driDrawable,
   return NULL;
}
 
-   for (i = 0; i < count; ++i) {
+   for (int i = 0; i < count; ++i) {
   attachments_with_format[2*i] = attachments[i];
   attachments_with_format[2*i + 1] = format;
}
@@ -424,7 +419,6 @@ dri2_drm_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *draw)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_surface *dri2_surf = dri2_egl_surface(draw);
-   unsigned i;
 
if (!dri2_dpy->flush) {
   dri2_dpy->core->swapBuffers(dri2_surf->dri_drawable);
@@ -434,7 +428,7 @@ dri2_drm_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *draw)
if (dri2_surf->base.Type == EGL_WINDOW_BIT) {
   if (dri2_surf->current)
  _eglError(EGL_BAD_SURFACE, "dri2_swap_buffers");
-  for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
+  for (unsigned i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++)
  if (dri2_surf->color_buffers[i].age > 0)
 dri2_surf->color_buffers[i].age++;
 
@@ -534,7 +528,7 @@ swrast_put_image2(__DRIdrawable *driDrawable,
   void  *loaderPrivate)
 {
struct dri2_egl_surface *dri2_surf = loaderPrivate;
-   int internal_stride, i;
+   int internal_stride;
struct gbm_dri_bo *bo;
 
if (op != __DRI_SWRAST_IMAGE_OP_DRAW &&
@@ -550,7 +544,7 @@ swrast_put_image2(__DRIdrawable *driDrawable,
 
internal_stride = bo->base.stride;
 
-   for (i = 0; i < height; i++) {
+   for (int i = 0; i < height; i++) {
   memcpy(bo->map + (x + i) * internal_stride + y,
  data + i * stride, st

Mesa (master): svga: check return value from svga_set_shader( SVGA3D_SHADERTYPE_GS, NULL)

[Brian Paul]

Module: Mesa
Branch: master
Commit: 041f8ae9f6bab39361263f6c767ea5294f1aa011
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=041f8ae9f6bab39361263f6c767ea5294f1aa011

Author: Brian Paul 
Date:   Thu Jun 22 12:58:39 2017 -0600

svga: check return value from svga_set_shader( SVGA3D_SHADERTYPE_GS, NULL)

If the call fails we need to flush the command buffer and retry.  In this
case, we were failing to unbind the GS which led to subsequent errors.

This fixes a bug replaying a Cinebench R15 apitrace in a Linux guest.
VMware bug 1894451

cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Charmaine Lee 

---

 src/gallium/drivers/svga/svga_state_gs.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/svga/svga_state_gs.c 
b/src/gallium/drivers/svga/svga_state_gs.c
index cff11ad5c3..217463882f 100644
--- a/src/gallium/drivers/svga/svga_state_gs.c
+++ b/src/gallium/drivers/svga/svga_state_gs.c
@@ -190,6 +190,8 @@ emit_hw_gs(struct svga_context *svga, unsigned dirty)
   *  Needs to unbind the geometry shader.
   */
  ret = svga_set_shader(svga, SVGA3D_SHADERTYPE_GS, NULL);
+ if (ret != PIPE_OK)
+goto done;
  svga->state.hw_draw.gs = NULL;
   }
   goto done;

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Mesa (master): svga: fix pre-mature flushing of the command buffer

[Brian Paul]

Module: Mesa
Branch: master
Commit: 3fbdab8778d3b55ed6053a3781e92aeff85ca174
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fbdab8778d3b55ed6053a3781e92aeff85ca174

Author: Charmaine Lee 
Date:   Wed Jun 21 15:35:38 2017 -0700

svga: fix pre-mature flushing of the command buffer

When surface_invalidate is called to invalidate a newly created surface
in svga_validate_surface_view(), it is possible that the command
buffer is already full, and in this case, currently, the associated wddm
winsys function will flush the command buffer and resend the invalidate
surface command. However, this can pre-maturely flush the command buffer
if there is still pending image updates to be patched.

To fix the problem, this patch will add a return status to the
surface_invalidate interface and if it returns FALSE, the caller will
call svga_context_flush() to do the proper context flush.
Note, we don't call svga_context_flush() if surface_invalidate()
fails when flushing the screen surface cache though, because it is
already in the process of context flush, all the image updates are already
patched, calling svga_context_flush() can trigger a deadlock.
So in this case, we call the winsys context flush interface directly
to flush the command buffer.

Fixes driver errors and graphics corruption running Tropics. VMware bug 1891975.

Also tested with MTT glretrace, piglit and various OpenGL apps such as
Heaven, CinebenchR15, NobelClinicianViewer, Lightsmark, GoogleEarth.

cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Brian Paul 

---

 src/gallium/drivers/svga/svga_screen_cache.c | 16 +++-
 src/gallium/drivers/svga/svga_surface.c  |  6 +-
 src/gallium/drivers/svga/svga_winsys.h   |  2 +-
 src/gallium/winsys/svga/drm/vmw_surface.c|  3 ++-
 src/gallium/winsys/svga/drm/vmw_surface.h|  2 +-
 5 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/svga/svga_screen_cache.c 
b/src/gallium/drivers/svga/svga_screen_cache.c
index bf66fc6010..0816ff68c8 100644
--- a/src/gallium/drivers/svga/svga_screen_cache.c
+++ b/src/gallium/drivers/svga/svga_screen_cache.c
@@ -362,7 +362,21 @@ svga_screen_cache_flush(struct svga_screen *svgascreen,
  /* It is now safe to invalidate the surface content.
   * It will be done using the current context.
   */
- svga->swc->surface_invalidate(svga->swc, entry->handle);
+ if (svga->swc->surface_invalidate(svga->swc, entry->handle) != 
PIPE_OK) {
+enum pipe_error ret;
+
+/* Even though surface invalidation here is done after the command
+ * buffer is flushed, it is still possible that it will
+ * fail because there might be just enough of this command that is
+ * filling up the command buffer, so in this case we will call
+ * the winsys flush directly to flush the buffer.
+ * Note, we don't want to call svga_context_flush() here because
+ * this function itself is called inside svga_context_flush().
+ */
+svga->swc->flush(svga->swc, NULL);
+ret = svga->swc->surface_invalidate(svga->swc, entry->handle);
+assert(ret == PIPE_OK);
+ }
 
  /* add the entry to the invalidated list */
  LIST_ADD(&entry->head, &cache->invalidated);
diff --git a/src/gallium/drivers/svga/svga_surface.c 
b/src/gallium/drivers/svga/svga_surface.c
index 04173266ff..29d91fd322 100644
--- a/src/gallium/drivers/svga/svga_surface.c
+++ b/src/gallium/drivers/svga/svga_surface.c
@@ -531,7 +531,11 @@ svga_validate_surface_view(struct svga_context *svga, 
struct svga_surface *s)
   * need to update the host-side copy with the invalid
   * content when the associated mob is first bound to the surface.
   */
- svga->swc->surface_invalidate(svga->swc, stex->handle);
+ if (svga->swc->surface_invalidate(svga->swc, stex->handle) != 
PIPE_OK) {
+svga_context_flush(svga, NULL);
+ret = svga->swc->surface_invalidate(svga->swc, stex->handle);
+assert(ret == PIPE_OK);
+ }
  stex->validated = TRUE;
   }
 
diff --git a/src/gallium/drivers/svga/svga_winsys.h 
b/src/gallium/drivers/svga/svga_winsys.h
index 8b8b45b47f..8823c115db 100644
--- a/src/gallium/drivers/svga/svga_winsys.h
+++ b/src/gallium/drivers/svga/svga_winsys.h
@@ -407,7 +407,7 @@ struct svga_winsys_context
/**
 * Invalidate the content of this surface
 */
-   void
+   enum pipe_error
(*surface_invalidate)(struct svga_winsys_context *swc,
  struct svga_winsys_surface *surface);
 
diff --git a/src/gallium/winsys/svga/drm/vmw_surface.c 
b/src/gallium/winsys/svga/drm/vmw_surface.c
index 80cc0914cc..04aa932784 100644
--- a/src/gallium/winsys/svga/drm/vmw_surface.c
+++ b/src/gallium/winsys/svga/drm/vmw_surface.c
@@ -176,7 +176,7 @@ vmw_svga_winsys_surface_unmap(struct svga_winsys_context 
*sw

Mesa (master): svga: minor whitespace fixes in svga_pipe_vertex.c

[Brian Paul]

Module: Mesa
Branch: master
Commit: 9e57a2cbcf3d8d9feb1919495f9d2e6ca4419ab0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e57a2cbcf3d8d9feb1919495f9d2e6ca4419ab0

Author: Brian Paul 
Date:   Thu Jun 22 13:32:50 2017 -0600

svga: minor whitespace fixes in svga_pipe_vertex.c

---

 src/gallium/drivers/svga/svga_pipe_vertex.c | 16 ++--
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/svga/svga_pipe_vertex.c 
b/src/gallium/drivers/svga/svga_pipe_vertex.c
index 9f67608d52..8fbe8a15d0 100644
--- a/src/gallium/drivers/svga/svga_pipe_vertex.c
+++ b/src/gallium/drivers/svga/svga_pipe_vertex.c
@@ -40,9 +40,10 @@
 #include "svga_screen.h"
 
 
-static void svga_set_vertex_buffers(struct pipe_context *pipe,
-unsigned start_slot, unsigned count,
-const struct pipe_vertex_buffer *buffers)
+static void
+svga_set_vertex_buffers(struct pipe_context *pipe,
+unsigned start_slot, unsigned count,
+const struct pipe_vertex_buffer *buffers)
 {
struct svga_context *svga = svga_context(pipe);
 
@@ -314,10 +315,12 @@ svga_delete_vertex_elements_state(struct pipe_context 
*pipe, void *state)
svga->hud.num_vertexelement_objects--;
 }
 
-void svga_cleanup_vertex_state( struct svga_context *svga )
+
+void
+svga_cleanup_vertex_state(struct svga_context *svga)
 {
unsigned i;
-   
+
for (i = 0 ; i < svga->curr.num_vertex_buffers; i++)
   pipe_vertex_buffer_unreference(&svga->curr.vb[i]);
 
@@ -328,7 +331,8 @@ void svga_cleanup_vertex_state( struct svga_context *svga )
 }
 
 
-void svga_init_vertex_functions( struct svga_context *svga )
+void
+svga_init_vertex_functions(struct svga_context *svga)
 {
svga->pipe.set_vertex_buffers = svga_set_vertex_buffers;
svga->pipe.create_vertex_elements_state = svga_create_vertex_elements_state;

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Mesa (master): swr: invalidate attachment on transition change

[George Kyriazis]

Module: Mesa
Branch: master
Commit: 08cb8cf2566719307203d6a7ae4c1d8b56342bd1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=08cb8cf2566719307203d6a7ae4c1d8b56342bd1

Author: George Kyriazis 
Date:   Thu Jun 15 14:39:36 2017 -0500

swr: invalidate attachment on transition change

Consider the following RT attachment order:
1. Attach surfaces attachments 0 & 1, and render with them
2. Detach 0 & 1
3. Re-attach 0 & 1 to different surfaces
4. Render with the new attachment

The definition of a tile being resolved is that local changes have been
flushed out to the surface, hence there is no need to reload the tile before
it's written to.  For an invalid tile, the tile has to be reloaded from
the surface before rendering.

Stage (2) was marking hot tiles for attachements 0 & 1 as RESOLVED,
which means that the hot tiles can be written out to memory with no
need to read them back in (they are "clean").  They need to be marked as
resolved here, because a surface may be destroyed after a detach, and we
don't want to have un-resolved tiles that may force a readback from a
NULL (destroyed) surface.  (Part of a destroy is detach all attachments first)

Stage (3), during the no att -> att transition, we  need to realize that the
"new" surface tiles need to be fetched fresh from the new surface, instead
of using the resolved tiles, that belong to a stale attachment.

This is done by marking the hot tiles as invalid in stage (3), when we realize
that a new attachment is being made, so that they are re-fetched during
rendering in stage (4).

Also note that hot tiles are indexed by attachment.

- Fixes VTK dual depth-peeling tests.
- No piglit changes

Reviewed-by: Tim Rowley 

---

 src/gallium/drivers/swr/swr_draw.cpp   | 19 +++
 src/gallium/drivers/swr/swr_resource.h |  4 
 src/gallium/drivers/swr/swr_state.cpp  |  5 +
 3 files changed, 28 insertions(+)

diff --git a/src/gallium/drivers/swr/swr_draw.cpp 
b/src/gallium/drivers/swr/swr_draw.cpp
index 4e6426d7ec..f85076b74c 100644
--- a/src/gallium/drivers/swr/swr_draw.cpp
+++ b/src/gallium/drivers/swr/swr_draw.cpp
@@ -219,6 +219,25 @@ swr_finish(struct pipe_context *pipe)
swr_fence_reference(pipe->screen, &fence, NULL);
 }
 
+/*
+ * Invalidate tiles so they can be reloaded back when needed
+ */
+void
+swr_invalidate_render_target(struct pipe_context *pipe,
+ uint32_t attachment,
+ uint16_t width, uint16_t height)
+{
+   struct swr_context *ctx = swr_context(pipe);
+
+   /* grab the rect from the passed in arguments */
+   swr_update_draw_context(ctx);
+   SWR_RECT full_rect =
+  {0, 0, (int32_t)width, (int32_t)height};
+   SwrInvalidateTiles(ctx->swrContext,
+  1 << attachment,
+  full_rect);
+}
+
 
 /*
  * Store SWR HotTiles back to renderTarget surface.
diff --git a/src/gallium/drivers/swr/swr_resource.h 
b/src/gallium/drivers/swr/swr_resource.h
index ae9954c1e7..4effd4604f 100644
--- a/src/gallium/drivers/swr/swr_resource.h
+++ b/src/gallium/drivers/swr/swr_resource.h
@@ -96,6 +96,10 @@ swr_resource_data(struct pipe_resource *resource)
 }
 
 
+void swr_invalidate_render_target(struct pipe_context *pipe,
+  uint32_t attachment,
+  uint16_t width, uint16_t height);
+
 void swr_store_render_target(struct pipe_context *pipe,
  uint32_t attachment,
  enum SWR_TILE_STATE post_tile_state);
diff --git a/src/gallium/drivers/swr/swr_state.cpp 
b/src/gallium/drivers/swr/swr_state.cpp
index 12da99fc48..f65e642753 100644
--- a/src/gallium/drivers/swr/swr_state.cpp
+++ b/src/gallium/drivers/swr/swr_state.cpp
@@ -935,6 +935,11 @@ swr_change_rt(struct swr_context *ctx,
* INVALID so they are reloaded from surface. */
   swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID);
   need_fence = true;
+   } else {
+  /* if no previous attachment, invalidate tiles that may be marked
+   * RESOLVED because of an old attachment */
+  swr_invalidate_render_target(&ctx->pipe, attachment, sf->width, 
sf->height);
+  /* no need to set fence here */
}
 
/* Make new attachment */

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Mesa (master): Revert "getteximage: Return correct error value when texure object is not found"

[Juan Antonio Suárez Romero]

Module: Mesa
Branch: master
Commit: 87a2d3963a3d879ced67ba2d9a81e336a5ac0cdf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=87a2d3963a3d879ced67ba2d9a81e336a5ac0cdf

Author: Juan A. Suarez Romero 
Date:   Thu Jun 22 18:16:16 2017 +0200

Revert "getteximage: Return correct error value when texure object is not found"

From OpenGL 4.5 spec PDF, section '8.11. Texture Queries', page 236:
  "An INVALID_VALUE error is generated if texture is not the name of
   an existing texture object."

Same wording applies to the compressed version.

But turns out this is a spec bug, and Khronos is fixing it for the next
revisions.

The proposal is to return INVALID_OPERATION in these cases.

This reverts commit 633c959faeae5099fd095f27da7b954e4a36254b.

v2:
- Use _mesa_lookup_texture_err (Samuel Pitoiset)

v3:
- _mesa_lookup_texture_err() already handles texture > 0 (Samuel
Pitoiset)
- Just revert 633c959fae (Juan A. Suarez)

Reviewed-by: Samuel Pitoiset 
Signed-off-by: Juan A. Suarez Romero 

---

 src/mesa/main/texgetimage.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c
index 658b0e58e6..715bc249be 100644
--- a/src/mesa/main/texgetimage.c
+++ b/src/mesa/main/texgetimage.c
@@ -1458,13 +1458,10 @@ _mesa_GetTextureSubImage(GLuint texture, GLint level,
 {
GET_CURRENT_CONTEXT(ctx);
static const char *caller = "glGetTextureSubImage";
-   struct gl_texture_object *texObj = NULL;
-
-   if (texture > 0)
-  texObj = _mesa_lookup_texture(ctx, texture);
+   struct gl_texture_object *texObj =
+  _mesa_lookup_texture_err(ctx, texture, caller);
 
if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
   return;
}
 
@@ -1778,11 +1775,8 @@ _mesa_GetCompressedTextureSubImage(GLuint texture, GLint 
level,
static const char *caller = "glGetCompressedTextureImage";
struct gl_texture_object *texObj = NULL;
 
-   if (texture > 0)
-  texObj = _mesa_lookup_texture(ctx, texture);
-
+   texObj = _mesa_lookup_texture_err(ctx, texture, caller);
if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_VALUE, "%s(texture)", caller);
   return;
}
 

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Mesa (master): egl: properly count configs

[Eric Engeström]

Module: Mesa
Branch: master
Commit: c87f73724efbec493d0149738d3a7ea11bfab222
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c87f73724efbec493d0149738d3a7ea11bfab222

Author: Eric Engestrom 
Date:   Wed Jun 21 21:55:56 2017 +0100

egl: properly count configs

dri2_conf represents another config (which shouldn't be counted)
if it doesn't have the requested ID.

Reported-by: Liu Zhiquan 
Signed-off-by: Eric Engestrom 
Cc: 
Reviewed-by: Emil Velikov 

---

 src/egl/drivers/dri2/platform_android.c | 3 ++-
 src/egl/drivers/dri2/platform_drm.c | 3 ++-
 src/egl/drivers/dri2/platform_surfaceless.c | 3 ++-
 src/egl/drivers/dri2/platform_wayland.c | 3 ++-
 src/egl/drivers/dri2/platform_x11.c | 6 --
 5 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index eaaeff4641..dba5ad6d55 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1079,7 +1079,8 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
  dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[j],
count + 1, surface_type, config_attrs, visuals[i].rgba_masks);
  if (dri2_conf) {
-count++;
+if (dri2_conf->base.ConfigID == count + 1)
+   count++;
 format_count[i]++;
  }
   }
diff --git a/src/egl/drivers/dri2/platform_drm.c 
b/src/egl/drivers/dri2/platform_drm.c
index 2cf7106255..869f599df5 100644
--- a/src/egl/drivers/dri2/platform_drm.c
+++ b/src/egl/drivers/dri2/platform_drm.c
@@ -631,7 +631,8 @@ drm_add_configs_for_visuals(_EGLDriver *drv, _EGLDisplay 
*disp)
  dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
count + 1, EGL_WINDOW_BIT, attr_list, NULL);
  if (dri2_conf) {
-count++;
+if (dri2_conf->base.ConfigID == count + 1)
+   count++;
 format_count[j]++;
  }
   }
diff --git a/src/egl/drivers/dri2/platform_surfaceless.c 
b/src/egl/drivers/dri2/platform_surfaceless.c
index 0eb3fb7505..f292f2b3fe 100644
--- a/src/egl/drivers/dri2/platform_surfaceless.c
+++ b/src/egl/drivers/dri2/platform_surfaceless.c
@@ -212,7 +212,8 @@ surfaceless_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
count + 1, EGL_PBUFFER_BIT, NULL, visuals[j].rgba_masks);
 
  if (dri2_conf) {
-count++;
+if (dri2_conf->base.ConfigID == count + 1)
+   count++;
 format_count[j]++;
  }
   }
diff --git a/src/egl/drivers/dri2/platform_wayland.c 
b/src/egl/drivers/dri2/platform_wayland.c
index 149e8c..128ef75105 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -1131,7 +1131,8 @@ dri2_wl_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *disp)
  dri2_conf = dri2_add_config(disp, dri2_dpy->driver_configs[i],
count + 1, EGL_WINDOW_BIT, NULL, visuals[j].rgba_masks);
  if (dri2_conf) {
-count++;
+if (dri2_conf->base.ConfigID == count + 1)
+   count++;
 format_count[j]++;
  }
   }
diff --git a/src/egl/drivers/dri2/platform_x11.c 
b/src/egl/drivers/dri2/platform_x11.c
index 95e560a32a..f91ad67d5f 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -773,7 +773,8 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
 dri2_conf = dri2_add_config(disp, config, count + 1, surface_type,
 config_attrs, rgba_masks);
 if (dri2_conf)
-   count++;
+   if (dri2_conf->base.ConfigID == count + 1)
+  count++;
 
 /* Allow a 24-bit RGB visual to match a 32-bit RGBA EGLConfig.
  * Otherwise it will only match a 32-bit RGBA visual.  On a
@@ -788,7 +789,8 @@ dri2_x11_add_configs_for_visuals(struct dri2_egl_display 
*dri2_dpy,
dri2_conf = dri2_add_config(disp, config, count + 1, 
surface_type,
config_attrs, rgba_masks);
if (dri2_conf)
-  count++;
+  if (dri2_conf->base.ConfigID == count + 1)
+ count++;
 }
 }
   }

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Mesa (master): egl/android: Change order of EGLConfig generation (v2)

[Chad Versace]

Module: Mesa
Branch: master
Commit: 5e884353e647261ac815c85724fc108e86dd1d85
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e884353e647261ac815c85724fc108e86dd1d85

Author: Chad Versace 
Date:   Fri Jun 16 19:11:21 2017 -0700

egl/android: Change order of EGLConfig generation (v2)

Many Android apps (such as Google's official NDK GLES2 example app), and
even portions the core framework code (such as SystemServiceManager in
Nougat), incorrectly choose their EGLConfig.  They neglect to match the
EGLConfig's EGL_NATIVE_VISUAL_ID against the window's native format, and
instead choose the first EGLConfig whose channel sizes match those of
the native window format while ignoring the channel *ordering*.

We can detect such buggy clients in logcat when they call
eglCreateSurface, by detecting the mismatch between the EGLConfig's
format and the window's format.

As a workaround, this patch changes the order of EGLConfig generation
such that all EGLConfigs for HAL pixel format i precede those for HAL
pixel format i+1. In my (chadversary) testing on Android Nougat, this
was good enough to pacify the buggy clients.

v2: Rebase to make patch cherry-pickable to stable.

Cc: mesa-sta...@lists.freedesktop.org
Cc: Tomasz Figa 
Cc: Rob Herring 
Reviewed-by: Emil Velikov 

---

 src/egl/drivers/dri2/platform_android.c | 32 +---
 1 file changed, 25 insertions(+), 7 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 5550f580a8..eaaeff4641 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -1049,20 +1049,38 @@ droid_add_configs_for_visuals(_EGLDriver *drv, 
_EGLDisplay *dpy)
unsigned int format_count[ARRAY_SIZE(visuals)] = { 0 };
int count, i, j;
 
+   /* The nesting of loops is significant here. Also significant is the order
+* of the HAL pixel formats. Many Android apps (such as Google's official
+* NDK GLES2 example app), and even portions the core framework code (such
+* as SystemServiceManager in Nougat), incorrectly choose their EGLConfig.
+* They neglect to match the EGLConfig's EGL_NATIVE_VISUAL_ID against the
+* window's native format, and instead choose the first EGLConfig whose
+* channel sizes match those of the native window format while ignoring the
+* channel *ordering*.
+*
+* We can detect such buggy clients in logcat when they call
+* eglCreateSurface, by detecting the mismatch between the EGLConfig's
+* format and the window's format.
+*
+* As a workaround, we generate EGLConfigs such that all EGLConfigs for HAL
+* pixel format i precede those for HAL pixel format i+1. In my
+* (chadversary) testing on Android Nougat, this was good enough to pacify
+* the buggy clients.
+*/
count = 0;
-   for (i = 0; dri2_dpy->driver_configs[i]; i++) {
+   for (i = 0; i < ARRAY_SIZE(visuals); i++) {
   const EGLint surface_type = EGL_WINDOW_BIT | EGL_PBUFFER_BIT;
   struct dri2_egl_config *dri2_conf;
 
-  for (j = 0; j < ARRAY_SIZE(visuals); j++) {
- config_attrs[1] = visuals[j].format;
- config_attrs[3] = visuals[j].format;
+  for (j = 0; dri2_dpy->driver_configs[j]; j++) {
+ config_attrs[1] = visuals[i].format;
+ config_attrs[3] = visuals[i].format;
 
- dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[i],
-   count + 1, surface_type, config_attrs, visuals[j].rgba_masks);
+ dri2_conf = dri2_add_config(dpy, dri2_dpy->driver_configs[j],
+   count + 1, surface_type, config_attrs, visuals[i].rgba_masks);
  if (dri2_conf) {
 count++;
-format_count[j]++;
+format_count[i]++;
  }
   }
}

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Mesa (master): i915: Fix gl_Fragcoord interpolation

[Ville Syrjala]

Module: Mesa
Branch: master
Commit: 1c409fe4c144f11ce6c6a4548ac5c6ba37980058
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c409fe4c144f11ce6c6a4548ac5c6ba37980058

Author: Ville Syrjälä 
Date:   Tue Jun 20 22:05:04 2017 +0300

i915: Fix gl_Fragcoord interpolation

gl_FragCoord contains the window coordinates so it seems to me that
we should not use perspective correct interpolation for it. At least
now I get similar output as i965/swrast/llvmpipe produce.

This fixes dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_w.
dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz was already
passing, though I'm not quite sure how it managed to do that.

v2: Add definitons for the S3 "wrap shortest" bits as well (Ian)

Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Ian Romanick 
Signed-off-by: Ville Syrjälä 

---

 src/mesa/drivers/dri/i915/i915_context.h  | 13 +++--
 src/mesa/drivers/dri/i915/i915_fragprog.c |  4 
 src/mesa/drivers/dri/i915/i915_state.c|  7 ---
 src/mesa/drivers/dri/i915/i915_vtbl.c |  7 +--
 src/mesa/drivers/dri/i915/intel_reg.h |  6 +-
 5 files changed, 21 insertions(+), 16 deletions(-)

diff --git a/src/mesa/drivers/dri/i915/i915_context.h 
b/src/mesa/drivers/dri/i915/i915_context.h
index f95b531a41..4e68d1193c 100644
--- a/src/mesa/drivers/dri/i915/i915_context.h
+++ b/src/mesa/drivers/dri/i915/i915_context.h
@@ -79,12 +79,13 @@
 #define I915_CTXREG_STATE4 0
 #define I915_CTXREG_LI 1
 #define I915_CTXREG_LIS2   2
-#define I915_CTXREG_LIS4   3
-#define I915_CTXREG_LIS5   4
-#define I915_CTXREG_LIS6   5
-#define I915_CTXREG_BF_STENCIL_OPS 6
-#define I915_CTXREG_BF_STENCIL_MASKS   7
-#define I915_CTX_SETUP_SIZE8
+#define I915_CTXREG_LIS3   3
+#define I915_CTXREG_LIS4   4
+#define I915_CTXREG_LIS5   5
+#define I915_CTXREG_LIS6   6
+#define I915_CTXREG_BF_STENCIL_OPS 7
+#define I915_CTXREG_BF_STENCIL_MASKS   8
+#define I915_CTX_SETUP_SIZE9
 
 #define I915_BLENDREG_IAB  0
 #define I915_BLENDREG_BLENDCOLOR0  1
diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c 
b/src/mesa/drivers/dri/i915/i915_fragprog.c
index 3657b2d825..2e04319512 100644
--- a/src/mesa/drivers/dri/i915/i915_fragprog.c
+++ b/src/mesa/drivers/dri/i915/i915_fragprog.c
@@ -1238,6 +1238,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
const GLbitfield64 inputsRead = p->FragProg.info.inputs_read;
GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
GLuint s2 = S2_TEXCOORD_NONE;
+   GLuint s3 = 0;
int i, offset = 0;
 
/* Important:
@@ -1301,6 +1302,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
   */
  s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);
  s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(wpos_size));
+ s3 |= S3_TEXCOORD_PERSPECTIVE_DISABLE(i);
 
  intel->wpos_offset = offset;
  EMIT_PAD(wpos_size);
@@ -1308,6 +1310,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
}
 
if (s2 != i915->state.Ctx[I915_CTXREG_LIS2] ||
+   s3 != i915->state.Ctx[I915_CTXREG_LIS3] ||
s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
   I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 
@@ -1326,6 +1329,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)
   intel->vertex_size >>= 2;
 
   i915->state.Ctx[I915_CTXREG_LIS2] = s2;
+  i915->state.Ctx[I915_CTXREG_LIS3] = s3;
   i915->state.Ctx[I915_CTXREG_LIS4] = s4;
 
   assert(intel->vtbl.check_vertex_size(intel, intel->vertex_size));
diff --git a/src/mesa/drivers/dri/i915/i915_state.c 
b/src/mesa/drivers/dri/i915/i915_state.c
index 232fc9dce1..685af046b5 100644
--- a/src/mesa/drivers/dri/i915/i915_state.c
+++ b/src/mesa/drivers/dri/i915/i915_state.c
@@ -925,11 +925,12 @@ i915_init_packets(struct i915_context *i915)
* piece changes.
*/
   i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
- I1_LOAD_S(2) |
- I1_LOAD_S(4) |
- I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
+ I1_LOAD_S(2) | I1_LOAD_S(3) |
+ I1_LOAD_S(4) | I1_LOAD_S(5) |
+ I1_LOAD_S(6) | (4));
   i915->state.Ctx[I915_CTXREG_LIS2] = 0;
   i915->state.Ctx[I915_CTXREG_LIS4] = 0;
+  i915->state.Ctx[I915_CTXREG_LIS3] = 0;
   i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 
   if (i915->intel.ctx.Visual.rgbBits == 16)
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c 
b/src/mesa/drivers/dri/i915/i915_vtbl.c
index c41cd37bcc..6a0a121856 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -176,7 +176,7 @@ i915_emit_invarient_state(struct intel_context *intel)

Mesa (master): egl: simplify dri_config conditionals

[Eric Engeström]

Module: Mesa
Branch: master
Commit: b81cfc73408b3d55772a56fbfa0e505b4da281a8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b81cfc73408b3d55772a56fbfa0e505b4da281a8

Author: Eric Engestrom 
Date:   Wed Jun 21 10:40:31 2017 +0100

egl: simplify dri_config conditionals

In the same spirit as 858f2f2ae6 (egl/dri2: ease srgb __DRIconfig
conditionals), let's merge dri_single_config and dri_double_config into
a single dri_config[2].

This moves the `if (double) dri_double_config else dri_single_config`
logic to `dri_config[double]`, reducing code duplication and making it
easier to read.

Signed-off-by: Eric Engestrom 
Reviewed-by: Emil Velikov 

---

 src/egl/drivers/dri2/egl_dri2.c | 25 ++---
 src/egl/drivers/dri2/egl_dri2.h |  3 +--
 2 files changed, 11 insertions(+), 17 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index fd7584f7ab..763e6d6952 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -162,10 +162,10 @@ const __DRIconfig *
 dri2_get_dri_config(struct dri2_egl_config *conf, EGLint surface_type,
 EGLenum colorspace)
 {
+   const bool double_buffer = surface_type == EGL_WINDOW_BIT;
const bool srgb = colorspace == EGL_GL_COLORSPACE_SRGB_KHR;
 
-   return surface_type == EGL_WINDOW_BIT ? conf->dri_double_config[srgb] :
-   conf->dri_single_config[srgb];
+   return conf->dri_config[double_buffer][srgb];
 }
 
 static EGLBoolean
@@ -323,10 +323,8 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig 
*dri_config, int id,
if (num_configs == 1) {
   conf = (struct dri2_egl_config *) matching_config;
 
-  if (double_buffer && !conf->dri_double_config[srgb])
- conf->dri_double_config[srgb] = dri_config;
-  else if (!double_buffer && !conf->dri_single_config[srgb])
- conf->dri_single_config[srgb] = dri_config;
+  if (!conf->dri_config[double_buffer][srgb])
+ conf->dri_config[double_buffer][srgb] = dri_config;
   else
  /* a similar config type is already added (unlikely) => discard */
  return NULL;
@@ -336,10 +334,7 @@ dri2_add_config(_EGLDisplay *disp, const __DRIconfig 
*dri_config, int id,
   if (conf == NULL)
  return NULL;
 
-  if (double_buffer)
- conf->dri_double_config[srgb] = dri_config;
-  else
- conf->dri_single_config[srgb] = dri_config;
+  conf->dri_config[double_buffer][srgb] = dri_config;
 
   memcpy(&conf->base, &base, sizeof base);
   conf->base.SurfaceType = 0;
@@ -1188,13 +1183,13 @@ dri2_create_context(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLConfig *conf,
* doubleBufferMode check in
* src/mesa/main/context.c:check_compatible()
*/
-  if (dri2_config->dri_double_config[0])
- dri_config = dri2_config->dri_double_config[0];
+  if (dri2_config->dri_config[1][0])
+ dri_config = dri2_config->dri_config[1][0];
   else
- dri_config = dri2_config->dri_single_config[0];
+ dri_config = dri2_config->dri_config[0][0];
 
-  /* EGL_WINDOW_BIT is set only when there is a dri_double_config.  This
-   * makes sure the back buffer will always be used.
+  /* EGL_WINDOW_BIT is set only when there is a double-buffered dri_config.
+   * This makes sure the back buffer will always be used.
*/
   if (conf->SurfaceType & EGL_WINDOW_BIT)
  dri2_ctx->base.WindowRenderBuffer = EGL_BACK_BUFFER;
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 3f29e64cdc..4a5cf8e4ef 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -321,8 +321,7 @@ struct dri2_egl_surface
 struct dri2_egl_config
 {
_EGLConfig base;
-   const __DRIconfig *dri_single_config[2];
-   const __DRIconfig *dri_double_config[2];
+   const __DRIconfig *dri_config[2][2];
 };
 
 struct dri2_egl_image

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Mesa (master): radeonsi: don't emit partial flushes at the end of IBs (v2)

[Marek Olšák]

Module: Mesa
Branch: master
Commit: c9040dc9e75c81024f88f3f1bab821ad2bc73db3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9040dc9e75c81024f88f3f1bab821ad2bc73db3

Author: Marek Olšák 
Date:   Fri Jun 16 14:25:34 2017 +0200

radeonsi: don't emit partial flushes at the end of IBs (v2)

The kernel sort of does the same thing with fences.

v2: do emit partial flushes on SI

Reviewed-by: Nicolai Hähnle 

---

 src/gallium/drivers/radeonsi/si_hw_context.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c 
b/src/gallium/drivers/radeonsi/si_hw_context.c
index 345825af00..76b295f9ec 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -129,13 +129,17 @@ void si_context_gfx_flush(void *context, unsigned flags,
 
r600_preflush_suspend_features(&ctx->b);
 
-   ctx->b.flags |= SI_CONTEXT_CS_PARTIAL_FLUSH |
-   SI_CONTEXT_PS_PARTIAL_FLUSH;
-
/* DRM 3.1.0 doesn't flush TC for VI correctly. */
-   if (ctx->b.chip_class == VI && ctx->b.screen->info.drm_minor <= 1)
-   ctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2 |
+   if (ctx->b.chip_class == VI && ctx->b.screen->info.drm_minor <= 1) {
+   ctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
+   SI_CONTEXT_CS_PARTIAL_FLUSH |
+   SI_CONTEXT_INV_GLOBAL_L2 |
SI_CONTEXT_INV_VMEM_L1;
+   } else if (ctx->b.chip_class == SI) {
+   /* The kernel doesn't wait for idle before doing SURFACE_SYNC. 
*/
+   ctx->b.flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
+   SI_CONTEXT_CS_PARTIAL_FLUSH;
+   }
 
si_emit_cache_flush(ctx);
 

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Mesa (master): radeonsi/gfx9: don't ever flush the TC metadata cache

[Marek Olšák]

Module: Mesa
Branch: master
Commit: db37c0be13e64cce70491d6c6c0090a8f1d3d1d6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=db37c0be13e64cce70491d6c6c0090a8f1d3d1d6

Author: Marek Olšák 
Date:   Tue Jun 20 18:26:12 2017 +0200

radeonsi/gfx9: don't ever flush the TC metadata cache

The closed Vulkan driver doesn't do it either.

Also remove some old comments that aren't useful.

Reviewed-by: Nicolai Hähnle 

---

 src/gallium/drivers/radeonsi/si_state_draw.c | 13 +++--
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c 
b/src/gallium/drivers/radeonsi/si_state_draw.c
index 85ceacad80..332e0c43de 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -971,22 +971,15 @@ void si_emit_cache_flush(struct si_context *sctx)
}
 
/* TC| TC_WB = invalidate L2 data
-* TC_MD | TC_WB = invalidate L2 metadata
+* TC_MD | TC_WB = invalidate L2 metadata (DCC, etc.)
 * TC| TC_WB | TC_MD = invalidate L2 data & metadata
-*
-* The metadata cache must always be invalidated for coherency
-* between CB/DB and shaders. (metadata = HTILE, CMASK, DCC)
-*
-* TC must be invalidated on GFX9 only if the CB/DB surface is
-* not pipe-aligned. If the surface is RB-aligned, it might not
-* strictly be pipe-aligned since RB alignment takes 
precendence.
 */
-   tc_flags = EVENT_TC_WB_ACTION_ENA |
-  EVENT_TC_MD_ACTION_ENA;
+   tc_flags = 0;
 
/* Ideally flush TC together with CB/DB. */
if (rctx->flags & SI_CONTEXT_INV_GLOBAL_L2) {
tc_flags |= EVENT_TC_ACTION_ENA |
+   EVENT_TC_WB_ACTION_ENA |
EVENT_TCL1_ACTION_ENA;
 
/* Clear the flags. */

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Mesa (master): radeonsi: fix DCC fast clear for luminance and alpha formats

[Marek Olšák]

Module: Mesa
Branch: master
Commit: c1754b69dc0687306d2ec66468109ae032ccbaf9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1754b69dc0687306d2ec66468109ae032ccbaf9

Author: Marek Olšák 
Date:   Tue Jun 20 17:20:34 2017 +0200

radeonsi: fix DCC fast clear for luminance and alpha formats

I reproduced this bug on Polaris11 and Raven.

I can't get this bug on Fiji. The reason might be that Fiji doesn't use
2D tiling for the test due to higher 2D tiling alignment requirements.

Fixes piglit: spec@ext_framebuffer_object@fbo-fast-clear

Reviewed-by: Nicolai Hähnle 

---

 src/gallium/drivers/radeon/r600_texture.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c 
b/src/gallium/drivers/radeon/r600_texture.c
index d0492d68c9..f74bbcea25 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2411,6 +2411,14 @@ static bool vi_get_fast_clear_parameters(enum 
pipe_format surface_format,
bool main_value = false;
bool extra_value = false;
int extra_channel;
+
+   /* This is needed to get the correct DCC clear value for luminance 
formats.
+* 1) Get the linear format (because the next step can't handle 
L8_SRGB).
+* 2) Convert luminance to red. (the real hw format for luminance)
+*/
+   surface_format = util_format_linear(surface_format);
+   surface_format = util_format_luminance_to_red(surface_format);
+
const struct util_format_description *desc = 
util_format_description(surface_format);
 
if (desc->block.bits == 128 &&
@@ -2429,7 +2437,8 @@ static bool vi_get_fast_clear_parameters(enum pipe_format 
surface_format,
 
if (surface_format == PIPE_FORMAT_R11G11B10_FLOAT ||
surface_format == PIPE_FORMAT_B5G6R5_UNORM ||
-   surface_format == PIPE_FORMAT_B5G6R5_SRGB) {
+   surface_format == PIPE_FORMAT_B5G6R5_SRGB ||
+   util_format_is_alpha(surface_format)) {
extra_channel = -1;
} else if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN) {
if(r600_translate_colorswap(surface_format, false) <= 1)

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Mesa (master): radeonsi/gfx9: use TC L2 for fast color clear with CP DMA

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 920f20f03936dd1f1ffe9445d2c167ed2cac94f4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=920f20f03936dd1f1ffe9445d2c167ed2cac94f4

Author: Marek Olšák 
Date:   Tue Jun 20 18:25:05 2017 +0200

radeonsi/gfx9: use TC L2 for fast color clear with CP DMA

Reviewed-by: Nicolai Hähnle 

---

 src/gallium/drivers/radeonsi/si_cp_dma.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c 
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 9505d622ae..e737519eef 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -142,8 +142,11 @@ static unsigned get_flush_flags(struct si_context *sctx, 
enum r600_coherency coh
 
 static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency 
coher)
 {
-   return coher == R600_COHERENCY_SHADER &&
-  sctx->b.chip_class >= CIK ? CP_DMA_USE_L2 : 0;
+   if ((sctx->b.chip_class >= GFX9 && coher == R600_COHERENCY_CB_META) ||
+   (sctx->b.chip_class >= CIK && coher == R600_COHERENCY_SHADER))
+   return CP_DMA_USE_L2;
+
+   return 0;
 }
 
 static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource 
*dst,

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Mesa (master): radeonsi/gfx9: enable DCC fast clear

[Marek Olšák]

Module: Mesa
Branch: master
Commit: bcd67b171152dfba2402de923a44dfe946e2684a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bcd67b171152dfba2402de923a44dfe946e2684a

Author: Marek Olšák 
Date:   Sat May 13 00:44:24 2017 +0200

radeonsi/gfx9: enable DCC fast clear

It seems to work now.

Reviewed-by: Nicolai Hähnle 

---

 src/gallium/drivers/radeon/r600_texture.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c 
b/src/gallium/drivers/radeon/r600_texture.c
index f74bbcea25..d68587b4a2 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2722,10 +2722,6 @@ void evergreen_do_fast_color_clear(struct 
r600_common_context *rctx,
uint32_t reset_value;
bool clear_words_needed;
 
-   /* TODO: fix DCC clear */
-   if (rctx->chip_class >= GFX9)
-   continue;
-
if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR)
continue;
 

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Mesa (master): anv: FORMAT_FEATURE_TRANSFER_SRC/ DST_BIT_KHR not used with VkFormatProperties.bufferFeatures

[Andres Gomez]

Module: Mesa
Branch: master
Commit: 5352174d49f8a720243429934aa634556eece159
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5352174d49f8a720243429934aa634556eece159

Author: Andres Gomez 
Date:   Wed Jun 14 19:55:56 2017 +0300

anv: FORMAT_FEATURE_TRANSFER_SRC/DST_BIT_KHR not used with 
VkFormatProperties.bufferFeatures

VK_FORMAT_FEATURE_TRANSFER_[SRC|DST]_BIT_KHR is a flag value of the
VkFormatFeatureFlagBits enum that can only be hold and checked against
the linearTilingFeatures or optimalTilingFeatures members of the
VkFormatProperties struct but not the bufferFeatures member.

>From the Vulkan® 1.0.51, with the VK_KHR_maintenance1 extension,
section 32.3.2 docs for VkFormatProperties:

   "* linearTilingFeatures is a bitmask of VkFormatFeatureFlagBits
  specifying features supported by images created with a tiling
  parameter of VK_IMAGE_TILING_LINEAR.

* optimalTilingFeatures is a bitmask of VkFormatFeatureFlagBits
  specifying features supported by images created with a tiling
  parameter of VK_IMAGE_TILING_OPTIMAL.

* bufferFeatures is a bitmask of VkFormatFeatureFlagBits
  specifying features supported by buffers."

...

Bits which can be set in the VkFormatProperties features
linearTilingFeatures, optimalTilingFeatures, and bufferFeatures
are:

typedef enum VkFormatFeatureFlagBits {

...

  VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR = 0x4000,
  VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR = 0x8000,

...

} VkFormatFeatureFlagBits;

...

The following bits may be set in linearTilingFeatures and
optimalTilingFeatures, specifying that the features are supported
by images or image views created with the queried
vkGetPhysicalDeviceFormatProperties::format:

...

* VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR specifies that an image
  can be used as a source image for copy commands.

* VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR specifies that an image
  can be used as a destination image for copy commands and clear
  commands."

Cc: Jason Ekstrand 
Cc: Iago Toral Quiroga 
Cc: Lionel Landwerlin 
Signed-off-by: Andres Gomez 
Reviewed-by: Lionel Landwerlin 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/anv_formats.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 104d4f7a5f..0bc81d12da 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -378,11 +378,6 @@ get_buffer_format_properties(const struct gen_device_info 
*devinfo,
if (format == ISL_FORMAT_R32_SINT || format == ISL_FORMAT_R32_UINT)
   flags |= VK_FORMAT_FEATURE_STORAGE_TEXEL_BUFFER_ATOMIC_BIT;
 
-   if (flags) {
-  flags |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
-   VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
-   }
-
return flags;
 }
 

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Mesa (master): change va max_entrypoints

[Christian König]

Module: Mesa
Branch: master
Commit: 1d4cbcdf285730d8e692e10c44cb5dc7e683efc1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d4cbcdf285730d8e692e10c44cb5dc7e683efc1

Author: Chandu Babu N 
Date:   Sat Jun 17 11:49:13 2017 +

change va max_entrypoints

As encode support is added along with decode, increase max_entrypoints to two.
vaMaxNumEntrypoints was returning incorrect value and causing
memory corruption before this commit

v2: assert when max_entrypoints needs to be bigger

CC: mesa-sta...@lists.freedesktop.org
Reviewed-by: Christian König 

---

 src/gallium/state_trackers/va/config.c  | 2 ++
 src/gallium/state_trackers/va/context.c | 2 +-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/va/config.c 
b/src/gallium/state_trackers/va/config.c
index c5d69bdc97..7d3bd648d9 100644
--- a/src/gallium/state_trackers/va/config.c
+++ b/src/gallium/state_trackers/va/config.c
@@ -102,6 +102,8 @@ vlVaQueryConfigEntrypoints(VADriverContextP ctx, VAProfile 
profile,
if (num_entrypoints == 0)
   return VA_STATUS_ERROR_UNSUPPORTED_PROFILE;
 
+   assert(*num_entrypoints <= ctx->max_entrypoints);
+
return VA_STATUS_SUCCESS;
 }
 
diff --git a/src/gallium/state_trackers/va/context.c 
b/src/gallium/state_trackers/va/context.c
index 6e7a58da68..186f5066bd 100644
--- a/src/gallium/state_trackers/va/context.c
+++ b/src/gallium/state_trackers/va/context.c
@@ -167,7 +167,7 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx)
*ctx->vtable = vtable;
*ctx->vtable_vpp = vtable_vpp;
ctx->max_profiles = PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH - 
PIPE_VIDEO_PROFILE_UNKNOWN;
-   ctx->max_entrypoints = 1;
+   ctx->max_entrypoints = 2;
ctx->max_attributes = 1;
ctx->max_image_formats = VL_VA_MAX_IMAGE_FORMATS;
ctx->max_subpic_formats = 1;

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Mesa (master): st/va: Fix leak in VAAPI subpictures

[Christian König]

Module: Mesa
Branch: master
Commit: b1a359b7d8a0559412d253101e930a6a45d9af7a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1a359b7d8a0559412d253101e930a6a45d9af7a

Author: Chandu Babu N 
Date:   Thu Jun 22 11:06:41 2017 +0530

st/va: Fix leak in VAAPI subpictures

sampler view allocated in vaAssociateSubpicture is not cleared
in vaiDeassociateSubpicture.

Reviewed-by: Christian König 

---

 src/gallium/state_trackers/va/subpicture.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/state_trackers/va/subpicture.c 
b/src/gallium/state_trackers/va/subpicture.c
index 15d52b941c..981a99cec5 100644
--- a/src/gallium/state_trackers/va/subpicture.c
+++ b/src/gallium/state_trackers/va/subpicture.c
@@ -283,6 +283,7 @@ vlVaDeassociateSubpicture(VADriverContextP ctx, 
VASubpictureID subpicture,
   while (surf->subpics.size && util_dynarray_top(&surf->subpics, 
vlVaSubpicture *) == NULL)
  (void)util_dynarray_pop(&surf->subpics, vlVaSubpicture *);
}
+   pipe_sampler_view_reference(&sub->sampler,NULL);
mtx_unlock(&drv->mutex);
 
return VA_STATUS_SUCCESS;

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Mesa (master): glsl: fix typo in comment

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 95927bb27fa0cd039e545796a76e113cf45cefb5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=95927bb27fa0cd039e545796a76e113cf45cefb5

Author: Timothy Arceri 
Date:   Wed Jun 21 20:12:11 2017 +1000

glsl: fix typo in comment

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Nicolai Hähnle 
Reviewed-by: Samuel Pitoiset 

---

 src/compiler/glsl/opt_algebraic.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/compiler/glsl/opt_algebraic.cpp 
b/src/compiler/glsl/opt_algebraic.cpp
index a5ba843fd1..a5a10293e8 100644
--- a/src/compiler/glsl/opt_algebraic.cpp
+++ b/src/compiler/glsl/opt_algebraic.cpp
@@ -246,7 +246,7 @@ ir_algebraic_visitor::reassociate_operands(ir_expression 
*ir1,
 /**
  * Reassociates a constant down a tree of adds or multiplies.
  *
- * Consider (2 * (a * (b * 0.5))).  We want to send up with a * b.
+ * Consider (2 * (a * (b * 0.5))).  We want to end up with a * b.
  */
 bool
 ir_algebraic_visitor::reassociate_constant(ir_expression *ir1, int const_index,

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Mesa (master): glsl: tidy up int declaration

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: 9e9f7840bd4f724421ab1d591923ea860b8f1a2a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e9f7840bd4f724421ab1d591923ea860b8f1a2a

Author: Timothy Arceri 
Date:   Wed Jun 21 20:12:12 2017 +1000

glsl: tidy up int declaration

Reviewed-by: Lionel Landwerlin 
Reviewed-by: Nicolai Hähnle 
Reviewed-by: Samuel Pitoiset 

---

 src/compiler/glsl/opt_algebraic.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/compiler/glsl/opt_algebraic.cpp 
b/src/compiler/glsl/opt_algebraic.cpp
index a5a10293e8..b44ab595ec 100644
--- a/src/compiler/glsl/opt_algebraic.cpp
+++ b/src/compiler/glsl/opt_algebraic.cpp
@@ -313,7 +313,6 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
 {
ir_constant *op_const[4] = {NULL, NULL, NULL, NULL};
ir_expression *op_expr[4] = {NULL, NULL, NULL, NULL};
-   unsigned int i;
 
if (ir->operation == ir_binop_mul &&
ir->operands[0]->type->is_matrix() &&
@@ -330,7 +329,7 @@ ir_algebraic_visitor::handle_expression(ir_expression *ir)
}
 
assert(ir->get_num_operands() <= 4);
-   for (i = 0; i < ir->get_num_operands(); i++) {
+   for (unsigned i = 0; i < ir->get_num_operands(); i++) {
   if (ir->operands[i]->type->is_matrix())
 return ir;
 

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Mesa (master): mesa: fix using texture id 0 with gl*TextureParameter*()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 45eb87e5e51a2f52c385d3874f3c9578cd7e3c67
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45eb87e5e51a2f52c385d3874f3c9578cd7e3c67

Author: Samuel Pitoiset 
Date:   Wed Jun 21 10:04:49 2017 +0200

mesa: fix using texture id 0 with gl*TextureParameter*()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/texparam.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/mesa/main/texparam.c b/src/mesa/main/texparam.c
index 6c0a5c46d6..3c110de839 100644
--- a/src/mesa/main/texparam.c
+++ b/src/mesa/main/texparam.c
@@ -157,11 +157,9 @@ get_texobj_by_name(struct gl_context *ctx, GLuint texture, 
const char *name)
 {
struct gl_texture_object *texObj;
 
-   texObj = _mesa_lookup_texture(ctx, texture);
-   if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(texture)", name);
+   texObj = _mesa_lookup_texture_err(ctx, texture, name);
+   if (!texObj)
   return NULL;
-   }
 
switch (texObj->Target) {
case GL_TEXTURE_1D:

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Mesa (master): mesa: fix using texture id 0 with glTextureSubImage*()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: a285caaf25e5d69bebd484fdf8019afe116cedde
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a285caaf25e5d69bebd484fdf8019afe116cedde

Author: Samuel Pitoiset 
Date:   Wed Jun 21 10:11:49 2017 +0200

mesa: fix using texture id 0 with glTextureSubImage*()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/teximage.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 346d505fca..69ad88237a 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -3336,12 +3336,9 @@ texturesubimage(struct gl_context *ctx, GLuint dims,
   _mesa_enum_to_string(type), pixels);
 
/* Get the texture object by Name. */
-   texObj = _mesa_lookup_texture(ctx, texture);
-   if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_OPERATION, "glTextureSubImage%uD(texture)",
-  dims);
+   texObj = _mesa_lookup_texture_err(ctx, texture, callerName);
+   if (!texObj)
   return;
-   }
 
/* check target (proxies not allowed) */
if (!legal_texsubimage_target(ctx, dims, texObj->Target, true)) {

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Mesa (master): mesa: pass the 'caller' function to texturestorage() helper

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 1f38363e687b154a43819034a95e5a6c4ff65707
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f38363e687b154a43819034a95e5a6c4ff65707

Author: Samuel Pitoiset 
Date:   Wed Jun 21 09:54:49 2017 +0200

mesa: pass the 'caller' function to texturestorage() helper

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/texstorage.c | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/src/mesa/main/texstorage.c b/src/mesa/main/texstorage.c
index 817a7464d9..070d62eb83 100644
--- a/src/mesa/main/texstorage.c
+++ b/src/mesa/main/texstorage.c
@@ -520,21 +520,21 @@ texstorage(GLuint dims, GLenum target, GLsizei levels, 
GLenum internalformat,
 static void
 texturestorage(GLuint dims, GLuint texture, GLsizei levels,
GLenum internalformat, GLsizei width, GLsizei height,
-   GLsizei depth)
+   GLsizei depth, const char *caller)
 {
struct gl_texture_object *texObj;
GET_CURRENT_CONTEXT(ctx);
 
if (MESA_VERBOSE & (VERBOSE_API|VERBOSE_TEXTURE))
-  _mesa_debug(ctx, "glTextureStorage%uD %d %d %s %d %d %d\n",
-  dims, texture, levels,
+  _mesa_debug(ctx, "%s %d %d %s %d %d %d\n",
+  caller, texture, levels,
   _mesa_enum_to_string(internalformat),
   width, height, depth);
 
/* Check the format to make sure it is sized. */
if (!_mesa_is_legal_tex_storage_format(ctx, internalformat)) {
   _mesa_error(ctx, GL_INVALID_ENUM,
-  "glTextureStorage%uD(internalformat = %s)", dims,
+  "%s(internalformat = %s)", caller,
   _mesa_enum_to_string(internalformat));
   return;
}
@@ -543,7 +543,7 @@ texturestorage(GLuint dims, GLuint texture, GLsizei levels,
texObj = _mesa_lookup_texture(ctx, texture);
if (!texObj) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
-  "glTextureStorage%uD(texture = %d)", dims, texture);
+  "%s(texture = %d)", caller, texture);
   return;
}
 
@@ -552,8 +552,8 @@ texturestorage(GLuint dims, GLuint texture, GLsizei levels,
 */
if (!legal_texobj_target(ctx, dims, texObj->Target)) {
   _mesa_error(ctx, GL_INVALID_ENUM,
-  "glTextureStorage%uD(illegal target=%s)",
-  dims, _mesa_enum_to_string(texObj->Target));
+  "%s(illegal target=%s)", caller,
+  _mesa_enum_to_string(texObj->Target));
   return;
}
 
@@ -590,7 +590,8 @@ void GLAPIENTRY
 _mesa_TextureStorage1D(GLuint texture, GLsizei levels, GLenum internalformat,
GLsizei width)
 {
-   texturestorage(1, texture, levels, internalformat, width, 1, 1);
+   texturestorage(1, texture, levels, internalformat, width, 1, 1,
+  "glTextureStorage1D");
 }
 
 
@@ -599,7 +600,8 @@ _mesa_TextureStorage2D(GLuint texture, GLsizei levels,
GLenum internalformat,
GLsizei width, GLsizei height)
 {
-   texturestorage(2, texture, levels, internalformat, width, height, 1);
+   texturestorage(2, texture, levels, internalformat, width, height, 1,
+  "glTextureStorage2D");
 }
 
 
@@ -607,7 +609,8 @@ void GLAPIENTRY
 _mesa_TextureStorage3D(GLuint texture, GLsizei levels, GLenum internalformat,
GLsizei width, GLsizei height, GLsizei depth)
 {
-   texturestorage(3, texture, levels, internalformat, width, height, depth);
+   texturestorage(3, texture, levels, internalformat, width, height, depth,
+  "glTextureStorage3D");
 }
 
 

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Mesa (master): mesa: use _mesa_lookup_texture_err() in get_tex_obj_for_clear()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 8a7ab8d418fc0747612a0f2111c80445219b99ed
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8a7ab8d418fc0747612a0f2111c80445219b99ed

Author: Samuel Pitoiset 
Date:   Wed Jun 21 10:09:47 2017 +0200

mesa: use _mesa_lookup_texture_err() in get_tex_obj_for_clear()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/teximage.c | 12 ++--
 1 file changed, 2 insertions(+), 10 deletions(-)

diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 54f7c08d50..346d505fca 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -4143,17 +4143,9 @@ get_tex_obj_for_clear(struct gl_context *ctx,
 {
struct gl_texture_object *texObj;
 
-   if (texture == 0) {
-  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(zero texture)", function);
-  return NULL;
-   }
-
-   texObj = _mesa_lookup_texture(ctx, texture);
-
-   if (texObj == NULL) {
-  _mesa_error(ctx, GL_INVALID_OPERATION, "%s(non-gen name)", function);
+   texObj = _mesa_lookup_texture_err(ctx, texture, function);
+   if (!texObj)
   return NULL;
-   }
 
if (texObj->Target == 0) {
   _mesa_error(ctx, GL_INVALID_OPERATION, "%s(unbound tex)", function);

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Mesa (master): mesa: fix using texture id 0 with VDPAURegisterSurfaceNV()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 7f47c31f8cd0a7cc95f152cbc13cc8bec018b0ec
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f47c31f8cd0a7cc95f152cbc13cc8bec018b0ec

Author: Samuel Pitoiset 
Date:   Wed Jun 21 10:01:55 2017 +0200

mesa: fix using texture id 0 with VDPAURegisterSurfaceNV()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Christian König 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/vdpau.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mesa/main/vdpau.c b/src/mesa/main/vdpau.c
index 44be3a3744..051071beb5 100644
--- a/src/mesa/main/vdpau.c
+++ b/src/mesa/main/vdpau.c
@@ -145,11 +145,11 @@ register_surface(struct gl_context *ctx, GLboolean 
isOutput,
surf->output = isOutput;
for (i = 0; i < numTextureNames; ++i) {
   struct gl_texture_object *tex;
-  tex  = _mesa_lookup_texture(ctx, textureNames[i]);
+
+  tex = _mesa_lookup_texture_err(ctx, textureNames[i],
+ "VDPAURegisterSurfaceNV");
   if (tex == NULL) {
  free(surf);
- _mesa_error(ctx, GL_INVALID_OPERATION,
- "VDPAURegisterSurfaceNV(texture ID not found)");
  return (GLintptr)NULL;
   }
 

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Mesa (master): mesa: fix using texture id 0 with glTextureStorage*()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 51a7e0d14f1d1e61f407685d43e248d68340fbb4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=51a7e0d14f1d1e61f407685d43e248d68340fbb4

Author: Samuel Pitoiset 
Date:   Wed Jun 21 09:56:55 2017 +0200

mesa: fix using texture id 0 with glTextureStorage*()

This fixes an assertion in debug build, and probably a crash
in release build.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/texstorage.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/mesa/main/texstorage.c b/src/mesa/main/texstorage.c
index 070d62eb83..958c7b7a67 100644
--- a/src/mesa/main/texstorage.c
+++ b/src/mesa/main/texstorage.c
@@ -539,13 +539,9 @@ texturestorage(GLuint dims, GLuint texture, GLsizei levels,
   return;
}
 
-   /* Get the texture object by Name. */
-   texObj = _mesa_lookup_texture(ctx, texture);
-   if (!texObj) {
-  _mesa_error(ctx, GL_INVALID_OPERATION,
-  "%s(texture = %d)", caller, texture);
+   texObj = _mesa_lookup_texture_err(ctx, texture, caller);
+   if (!texObj)
   return;
-   }
 
/* Check target.  This is done here so that _mesa_texture_storage
 * can receive unsized formats.

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Mesa (master): mesa: remove unused _mesa_delete_nameless_texture()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 048de9e34a2214371481143cddcaa53f52468c6b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=048de9e34a2214371481143cddcaa53f52468c6b

Author: Samuel Pitoiset 
Date:   Wed Jun 21 09:41:50 2017 +0200

mesa: remove unused _mesa_delete_nameless_texture()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/texobj.c | 41 -
 src/mesa/main/texobj.h |  5 -
 2 files changed, 46 deletions(-)

diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index ed1eaf9b77..a5988159a5 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -1495,47 +1495,6 @@ _mesa_DeleteTextures( GLsizei n, const GLuint *textures)
}
 }
 
-/**
- * This deletes a texObj without altering the hash table.
- */
-void
-_mesa_delete_nameless_texture(struct gl_context *ctx,
-  struct gl_texture_object *texObj)
-{
-   if (!texObj)
-  return;
-
-   FLUSH_VERTICES(ctx, 0);
-
-   _mesa_lock_texture(ctx, texObj);
-   {
-  /* Check if texture is bound to any framebuffer objects.
-   * If so, unbind.
-   * See section 4.4.2.3 of GL_EXT_framebuffer_object.
-   */
-  unbind_texobj_from_fbo(ctx, texObj);
-
-  /* Check if this texture is currently bound to any texture units.
-   * If so, unbind it.
-   */
-  unbind_texobj_from_texunits(ctx, texObj);
-
-  /* Check if this texture is currently bound to any shader
-   * image unit.  If so, unbind it.
-   * See section 3.9.X of GL_ARB_shader_image_load_store.
-   */
-  unbind_texobj_from_image_units(ctx, texObj);
-   }
-   _mesa_unlock_texture(ctx, texObj);
-
-   ctx->NewState |= _NEW_TEXTURE_OBJECT;
-
-   /* Unreference the texobj.  If refcount hits zero, the texture
-* will be deleted.
-*/
-   _mesa_reference_texobj(&texObj, NULL);
-}
-
 
 /**
  * Convert a GL texture target enum such as GL_TEXTURE_2D or GL_TEXTURE_3D
diff --git a/src/mesa/main/texobj.h b/src/mesa/main/texobj.h
index a9db1675e0..1c68bd8ec7 100644
--- a/src/mesa/main/texobj.h
+++ b/src/mesa/main/texobj.h
@@ -170,11 +170,6 @@ _mesa_unlock_context_textures( struct gl_context *ctx );
 extern void
 _mesa_lock_context_textures( struct gl_context *ctx );
 
-extern void
-_mesa_delete_nameless_texture(struct gl_context *ctx,
-  struct gl_texture_object *texObj);
-
-
 /*@}*/
 
 /**

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Mesa (master): mesa: check for allocation failures in _mesa_new_texture_object()

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 75044f0854f9b7c572c2117256605aa76acf1573
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=75044f0854f9b7c572c2117256605aa76acf1573

Author: Samuel Pitoiset 
Date:   Wed Jun 21 09:07:36 2017 +0200

mesa: check for allocation failures in _mesa_new_texture_object()

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/mesa/main/texobj.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c
index 1877262ed6..ed1eaf9b77 100644
--- a/src/mesa/main/texobj.c
+++ b/src/mesa/main/texobj.c
@@ -234,11 +234,14 @@ _mesa_get_current_tex_object(struct gl_context *ctx, 
GLenum target)
  * \return pointer to new texture object.
  */
 struct gl_texture_object *
-_mesa_new_texture_object( struct gl_context *ctx, GLuint name, GLenum target )
+_mesa_new_texture_object(struct gl_context *ctx, GLuint name, GLenum target)
 {
struct gl_texture_object *obj;
-   (void) ctx;
+
obj = MALLOC_STRUCT(gl_texture_object);
+   if (!obj)
+  return NULL;
+
_mesa_initialize_texture_object(ctx, obj, name, target);
return obj;
 }

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Mesa (master): radeonsi: use the correct LLVMTargetMachineRef in si_build_shader_variant

[Nicolai Hähnle]

Module: Mesa
Branch: master
Commit: da2e52b382351fea6f0321ad9a24c099b360e685
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da2e52b382351fea6f0321ad9a24c099b360e685

Author: Nicolai Hähnle 
Date:   Mon Jun 12 22:33:56 2017 +0200

radeonsi: use the correct LLVMTargetMachineRef in si_build_shader_variant

si_build_shader_variant can actually be called directly from one of
normal-priority compiler threads. In that case, the thread_index is
only valid for the normal tm array.

v2:
- use the correct sel/shader->compiler_ctx_state

Fixes: 86cc8097266c ("radeonsi: use a compiler queue with a low priority for 
optimized shaders")
Reviewed-by: Marek Olšák 

---

 src/gallium/drivers/radeonsi/si_state_shaders.c | 28 +++--
 1 file changed, 22 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c 
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 668c5d9447..12eae4cda9 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1447,9 +1447,10 @@ static inline void si_shader_selector_key(struct 
pipe_context *ctx,
memset(&key->opt, 0, sizeof(key->opt));
 }
 
-static void si_build_shader_variant(void *job, int thread_index)
+static void si_build_shader_variant(struct si_shader *shader,
+   int thread_index,
+   bool low_priority)
 {
-   struct si_shader *shader = (struct si_shader *)job;
struct si_shader_selector *sel = shader->selector;
struct si_screen *sscreen = sel->screen;
LLVMTargetMachineRef tm;
@@ -1457,11 +1458,17 @@ static void si_build_shader_variant(void *job, int 
thread_index)
int r;
 
if (thread_index >= 0) {
-   assert(thread_index < ARRAY_SIZE(sscreen->tm_low_priority));
-   tm = sscreen->tm_low_priority[thread_index];
+   if (low_priority) {
+   assert(thread_index < 
ARRAY_SIZE(sscreen->tm_low_priority));
+   tm = sscreen->tm_low_priority[thread_index];
+   } else {
+   assert(thread_index < ARRAY_SIZE(sscreen->tm));
+   tm = sscreen->tm[thread_index];
+   }
if (!debug->async)
debug = NULL;
} else {
+   assert(!low_priority);
tm = shader->compiler_ctx_state.tm;
}
 
@@ -1485,6 +1492,15 @@ static void si_build_shader_variant(void *job, int 
thread_index)
si_shader_init_pm4_state(sscreen, shader);
 }
 
+static void si_build_shader_variant_low_priority(void *job, int thread_index)
+{
+   struct si_shader *shader = (struct si_shader *)job;
+
+   assert(thread_index >= 0);
+
+   si_build_shader_variant(shader, thread_index, true);
+}
+
 static const struct si_shader_key zeroed;
 
 static bool si_check_missing_main_part(struct si_screen *sscreen,
@@ -1690,7 +1706,7 @@ again:
/* Compile it asynchronously. */
util_queue_add_job(&sscreen->shader_compiler_queue_low_priority,
   shader, &shader->optimized_ready,
-  si_build_shader_variant, NULL);
+  si_build_shader_variant_low_priority, NULL);
 
/* Use the default (unoptimized) shader for now. */
memset(&key->opt, 0, sizeof(key->opt));
@@ -1699,7 +1715,7 @@ again:
}
 
assert(!shader->is_optimized);
-   si_build_shader_variant(shader, thread_index);
+   si_build_shader_variant(shader, thread_index, false);
 
if (!shader->compilation_failed)
state->current = shader;

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