Mesa (master): 43 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=51c3ab618be90d59da23d7e3765a45aff50bf398
Author: Mark Janes 
Date:   Wed May 1 10:54:43 2019 -0700

st/mesa: eliminate unnecessary redirection

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=61c54a88785f394f37605702053e738c790ed025
Author: Mark Janes 
Date:   Fri Jul 19 02:22:26 2019 -0700

intel/perf: fix debug typo

Misspelling was seen with INTEL_DEBUG=perfmon.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2df1ab4d48027c642abe316a10ad39fb399f3d60
Author: Mark Janes 
Date:   Wed Jul 17 12:29:00 2019 -0700

intel/perf: make gen_perf_query_object private

Encapsulate the details of this structure within the perf implemenation.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=deea3798b6e7bc54e62cd6a7b1c08c4e51801144
Author: Mark Janes 
Date:   Wed Jul 10 16:57:16 2019 -0700

intel/perf: make perf context private

Encapsulate the details of this data structure.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f4f421ce07e16d7bbef16c016fbc1d5b2055516
Author: Mark Janes 
Date:   Wed Jul 17 14:36:44 2019 -0700

intel/perf: print debug information

INTEL_DEBUG=perfmon will iterate over the perf queries, printing
information about the state of each query.  Some of this information
will be private to intel/perf, and needs to a dump routine that can be
called from i965.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a663c8c26e6d5f77ae4c9e09625c4a12c9c75b53
Author: Mark Janes 
Date:   Wed Jul 10 16:19:31 2019 -0700

intel/perf: make internal methods private

Now that all references from i965 have been moved to perf, we can make
internal methods private again.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=be8b466cff02ba3254a8ab517faf83c7cade4b6e
Author: Mark Janes 
Date:   Wed Jul 10 14:25:47 2019 -0700

intel/perf: make oa_sample_buffers private

All references to this data structure have been moved inside the perf
subsystem.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2a049b4e3b20af416267d3c2a1118cc25c54b44
Author: Mark Janes 
Date:   Fri Jul 12 16:35:27 2019 -0700

intel/perf: expose method to create query

By encapsulating this implementation within perf, we can eventually
make struct gen_perf_ctx private.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f5c160d822adc78986ec6b95ab61d2674e4
Author: Mark Janes 
Date:   Fri Aug 2 17:17:54 2019 -0700

intel/perf: move initialization of pipeline statistics metrics to gen_perf

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f84efb452f810494e8ba78a68b56444e343e5f6
Author: Mark Janes 
Date:   Fri Jun 28 18:16:07 2019 -0700

intel/perf: move get_query_data into gen_perf

This refactor moves several helper functions for get_query_data as
well:

 - accumulate_oa_reports
 - read_gt_frequency
 - get_pipeline_stats_data
 - get_oa_counter_data

Functions which are no longer referenced in brw_performance_query.c
have been removed.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=73eccdc4a5d04196f5d437b285dabd10043b01f4
Author: Mark Janes 
Date:   Fri Jun 28 17:10:22 2019 -0700

intel/perf: move delete_query to gen_perf

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c9eac12345fb6ca7a6ae108a0451cbbcfff47ed
Author: Mark Janes 
Date:   Fri Jun 28 16:19:32 2019 -0700

intel/perf: move is_query_ready to gen_perf

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9be292722abb2d1a3aa400d0060633f4a2a6f5d
Author: Mark Janes 
Date:   Fri Jun 28 16:12:44 2019 -0700

intel/perf: move wait_query to perf

The following methods have duplicate implementation of 
read_oa_samples_until in
brw_performance_query.c:

 - read_oa_samples_for_query
 - read_oa_samples_until

They ar still referenced by other methods in the file and will be
removed on the subsequent commit.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c8ed58486744b7e83058b867b1e66e56431a224
Author: Mark Janes 
Date:   Fri Jun 28 15:55:37 2019 -0700

intel/perf: create a vtable entry for bo_busy

Iris and i965 variants of this method need to be called by perf
routines.

Reviewed-by: Kenneth Graunke 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fed7563888920ee44af798f232863fae01a6fd1

Mesa (master): 43 new commits

[Nicolai Hähnle]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b921da3b74d71598c47da2bc46e445e3813d7933
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:39:05 2017 +0200

radeonsi: use a threaded context even for debug contexts

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a6d9e087a2171ae4d0f2ac2697ba4042fbad4c1
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:39:05 2017 +0200

radeonsi: record and dump time of flush

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b07569ad8b7bbe6ea33c984013a2f2607cd7ddaf
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:39:01 2017 +0200

ddebug: optionally handle transfer commands like draws

Transfer commands can have associated GPU operations.

Enabled by passing GALLIUM_DDEBUG=transfers.

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=18fd2a859de51353187f993ea2852bebe1ea5734
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:39:01 2017 +0200

ddebug: dump context and before/after times of draws

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba2f2b6f2aa05dab01389cf27a5001d0d43adcb4
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:39:00 2017 +0200

ddebug: generalize print_named_xxx via a PRINT_NAMED macro

Reviewed-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9fefa062b369056eb4c3ef82b529b0acc4cc88a
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:38:59 2017 +0200

ddebug: rewrite to always use a threaded approach

This patch has multiple goals:

1. Off-load the writing of records in 'always' mode to another thread
   for performance.

2. Allow using ddebug with threaded contexts. This really forces us to
   move some of the "after_draw" handling into another thread.

3. Simplify the different modes of ddebug, both in the code and in
   the user interface, i.e. GALLIUM_DDEBUG. In particular, there's
   no 'pipelined' anymore, since we're always pipelined; and 'noflush'
   is replaced by 'flush', since we no longer flush by default.

4. Fix the fences in pipelining mode. They previously relied on writes
   via pipe_context::clear_buffer. However, on radeonsi, those could
   (quite reasonably) end up in the SDMA buffer. So we use the newly
   added PIPE_FLUSH_{TOP,BOTTOM}_OF_PIPE fences instead.

5. Improve pipelined mode overall, using the finer grained information
   provided by the new fences.

Overall, the result is that pipelined mode should be more useful, and
using ddebug in default mode is much less invasive, in the sense that
it changes the overall driver behavior less (which is kind of crucial
for a driver debugging tool).

An example of the new hang debug output:

  Gallium debugger active.
  Hang detection timeout is 1000ms.
  GPU hang detected, collecting information...

  Draw #   driver  prev BOP  TOP  BOP  dump file
  -
  2  YES  YESYES  NO   
/home/nha/ddebug_dumps/shader_runner_19919_
  3  YES  NO YES  NO   
/home/nha/ddebug_dumps/shader_runner_19919_0001
  4  YES  NO YES  NO   
/home/nha/ddebug_dumps/shader_runner_19919_0002
  5  YES  NO YES  NO   
/home/nha/ddebug_dumps/shader_runner_19919_0003

  Done.

We can see that there were almost certainly 4 draws in flight when
the hang happened: the top-of-pipe fence was signaled for all 4 draws,
the bottom-of-pipe fence for none of them. In virtually all cases,
we'd expect the first draw in the list to be at fault, but due to the
GPU parallelism, it's possible (though highly unlikely) that one of
the later draws causes a component to get stuck in a way that prevents
the earlier draws from making progress as well.

(In the above example, there were actually only 3 draws truly in flight:
the last draw is a blit that waits for the earlier draws; however, its
top-of-pipe fence is emitted before the cache flush and wait, and so
the fact that the draw hasn't truly started yet can only be seen from a
closer inspection of GPU state.)

Acked-by: Marek Olšák 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8bb8758ddfa884b55abf8648af9cb7239bc1f66
Author: Nicolai Hähnle 
Date:   Sun Oct 22 17:38:58 2017 +0200

ddebug: use an atomic increment when numbering files

Reviewed-by: Marek Olšák 

Mesa (master): 43 new commits

[Jason Ekstrand]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=726b68ad822ba07ec042c6d175208f49af8cf248
Author: Jason Ekstrand 
Date:   Sat May 13 11:10:46 2017 -0700

i965/blorp: Support copyteximage on gen4-5

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b06c63c782ccb52f29e8fd1ffc7d586648e5c360
Author: Jason Ekstrand 
Date:   Sat May 13 10:59:03 2017 -0700

i965: Use blorp for CopyImageSubData on gen4-5

We keep the blit path because it's probably faster when it works.
However, now that we can use blorp, we can delete that nasty CPU
fall-back path.

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0901d0bc4c78313eaaf29dff74c6a7bf5514f75b
Author: Jason Ekstrand 
Date:   Sat May 13 11:02:22 2017 -0700

i965: Round copy size to the nearest block in intel_miptree_copy

The width and height of the copy don't have to be aligned to the block
size if they specify the right or bottom edges of the image.  (See also
the comment and asserts right above).  We need to round them up when we
do the division in order to get it 100% right.

Reviewed-by: Ben Widawsky 
Reviewed-by: Kenneth Graunke 
Cc: "17.0 17.1" 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79f2a5541f92920d35d3621179f7377c97cc75e1
Author: Jason Ekstrand 
Date:   Fri May 12 17:14:18 2017 -0700

i965: Use BLORP for color clears on gen4-5

We don't support replicated data clears yet.  Those take a bit more work
and enabling replicated data clears in its own commit is probably better
for bisectibility anyway.

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d11362d8b0325ab1f9d12a93323d36ad92d24b0
Author: Jason Ekstrand 
Date:   Fri May 12 16:32:17 2017 -0700

i965: Use blorp for color blits on gen4-5

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa13ef285df887d31f7012a4f32a4ff46a5920dc
Author: Jason Ekstrand 
Date:   Fri May 12 22:52:55 2017 -0700

intel/blorp: Assert that no one tries to blit combined depth stencil

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=752d7af77a52898cebf5597def4fdd38b1d6303e
Author: Jason Ekstrand 
Date:   Fri Sep 9 16:30:24 2016 -0700

i965: Add blorp support for gen4-5

Due to complications with things such as URB setup on gen4-5, it's
easier to keep gen4 support in blorp completely internal to i965.  This
makes things a bit awkward because that means there's a file in i965
that includes blorp_priv.h but it's either that or have a file in blorp
that includes brw_context.h.

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=23125b710278d357da98d0542bf76df6026e931a
Author: Jason Ekstrand 
Date:   Fri May 12 12:03:47 2017 -0700

intel/blorp: Set additional brw_wm_prog_key fields on gen4-5

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79b486f73635df41334da79ce4593bab999895ab
Author: Jason Ekstrand 
Date:   Thu May 11 22:23:36 2017 -0700

i965/gen4: Expose the guts of URB recalculation as a helper

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ed6f196fc2a35bf95112d76b9e7ea8f0152217a
Author: Jason Ekstrand 
Date:   Fri May 12 20:24:46 2017 -0700

intel/blorp: Add support for gen4-5 SF programs

As part of enabling support for SF programs, we plumb the SF URB size
through to emit_urb_config.  For now, it's always zero but, on gen4, it
may be something larger.

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8bce7bda45f6f46197e4851b83afd73c3198111c
Author: Jason Ekstrand 
Date:   Tue May 16 09:28:31 2017 -0700

intel/blorp: Make convert_to_single_slice available outside blorp_blit

Reviewed-by: Topi Pohjolainen 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=110061afa214fbefb97ed5efb3bbe277d0354f67
Author: Jason Ekstrand 
Date:   Fri May 12 16:22:58 2017 -0700

intel/blorp: Use designated initializers to set up VERTEX_ELEMENTS

We also 

Mesa (master): 43 new commits

[Axel Davy]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f21b7d1e5c21b749ae7c19d3dc80dc4e14e4bb77
Author: Wang He 
Date:   Tue May 10 13:40:30 2016 +0800

st/nine: Minor change to support musl libc

A few changes to support musl libc as well.

In particular fpu_control.h is glibc specific.
fenv.h doesn't enable to do exactly what we want either,
so instead use assembly directly.

Signed-off-by: Wang He 
Reviewed-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de39231134348a5ffb92f7cc2b3098e11384912a
Author: Patrick Rudolph 
Date:   Fri Apr 29 08:50:16 2016 +0200

st/nine: Enable D3DPMISCCAPS_PERSTAGECONSTANT

Nine already supports the feature.
There are no failing WINE tests for per stage constants.
Enabling D3DPMISCCAPS_PERSTAGECONSTANT as it fixes
https://github.com/iXit/Mesa-3D/issues/205

Signed-off-by: Patrick Rudolph 
Reviewed-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=839f41763436cd1a438771f50ffa16fa33c5
Author: Axel Davy 
Date:   Sat May 7 11:33:24 2016 +0200

st/nine: Turn on thread_submit by default when on different device

The last remaining issues with thread_submit have been resolved,
thus turn it when on a different device (the case where is is
beneficial).

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9cae3cdc890b2aa261d635667a5850929a0913f5
Author: Axel Davy 
Date:   Sun Apr 3 13:04:39 2016 +0200

st/nine: Fix usage of rasterizer multisample bit.

pipe_rasterizer multisample bit should be enabled only when really
wanting to do multisampling, thus we should disable when not having
msaa render target.
This fixes some depth calculation precision issues on radeon.
Also disable it when depth and stencil tests are disabled, since in that
case multisampling is same as not multisampled.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f297e7de0f3fc0bd4fec483d4bf778a9678992c7
Author: Axel Davy 
Date:   Sun Apr 3 10:52:22 2016 +0200

st/nine: ATOC has effect only with ALPHATESTENABLE

ATOC extension does something only when alpha test is enabled.
Use a second bit to encode the difference with ATIATOC.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=edc5cdced56756bfda898a4ed5bd480cd07c2d7e
Author: Axel Davy 
Date:   Sat May 7 11:20:47 2016 +0200

st/nine: Add debug string for ATOC

We were missing a debug string for this format.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e89dcf0c4ad543e5404d28b1f949387d63f59ee
Author: Axel Davy 
Date:   Sat Mar 19 19:27:34 2016 +0100

st/nine: Add asserts for output/input packing

Nine doesn't support vs output/ps input packing.
We haven't found any application requiring that,
and implementing it properly is complex.

Add asserts for now.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aeddda0c3a2294d923ba57604d9bda5cab0d0f70
Author: Axel Davy 
Date:   Mon Mar 14 21:29:53 2016 +0100

st/nine: Use correct PIPE_HANDLE_USAGE flag for frontbuffer copy

When taking screenshots we do a copy from the frontbuffer
to an allocated buffer (which we then copy to a ram buffer).

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca7c78a88ecc828a1b08dc18667d2a70d9d0e09d
Author: Axel Davy 
Date:   Sat Mar 12 12:24:51 2016 +0100

st/nine: Fix output shift calculation

We were getting it wrong for negative values.

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8d95d40872dafbd372c071455d26ab078cdd170
Author: Axel Davy 
Date:   Fri Mar 11 23:30:05 2016 +0100

st/nine: Fix CheckDeviceFormat advertising for surfaces

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ef231c80f7bb8aa08b9402d7cdfc792e8752b39
Author: Axel Davy 
Date:   Fri Mar 11 23:03:56 2016 +0100

st/nine: Improve buffer placement

Signed-off-by: Axel Davy 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7639033973c4f0fece37457ac250dd9df73410e8
Author: Axel Davy 
Date:   Fri Mar 11 22:22:10 2016 +0100

st/nine: Fix buffer bind flags

Signed-off-by: Axel Davy 

URL:

Mesa (master): 43 new commits

[Jason Ekstrand]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=261d62de33b6192ec31f034a9897d034a37fa582
Author: Jason Ekstrand 
Date:   Tue Apr 19 21:20:26 2016 -0700

anv/lower_push_constants: fixup for nir_foreach_block()

Signed-off-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb65764a4ad5a70a4b48975480cf29e7e274a178
Author: Jason Ekstrand 
Date:   Tue Apr 19 21:19:56 2016 -0700

anv/apply_pipeline_layout: fixup for nir_foreach_block()

Signed-off-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=621cbc0c147f67ef64255c180b84df82c692448c
Author: Jason Ekstrand 
Date:   Tue Apr 19 21:18:56 2016 -0700

anv/apply_dynamic_offsets: fixup for nir_foreach_block()

Signed-off-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7efff10585122d484dc3adab14af9380b9b8f309
Author: Connor Abbott 
Date:   Tue Apr 12 22:56:14 2016 -0400

i965/nir: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a8688fb4103ed6f21d1311a9331efff456294b0
Author: Connor Abbott 
Date:   Tue Apr 12 15:30:22 2016 -0400

nir/algebraic: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f8c1006140cf755f35f4196bd703c4a586d7609
Author: Connor Abbott 
Date:   Tue Apr 12 15:17:46 2016 -0400

nir/validate: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a471c161b1cd7a38e91585b3737b1c34cd2e0110
Author: Connor Abbott 
Date:   Tue Apr 12 15:16:14 2016 -0400

nir/nir_worklist: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=db351254fe82413d3bf5b70a328a37222c8b
Author: Connor Abbott 
Date:   Tue Apr 12 15:14:04 2016 -0400

nir/remove_dead_variables: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3aaae398ea97ecdfaed8a5640948572a8834c29
Author: Connor Abbott 
Date:   Tue Apr 12 15:10:03 2016 -0400

nir/split_var_copies: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d41a1ffebfb62ec3ab6e09ae926dcb04917eccd
Author: Connor Abbott 
Date:   Tue Apr 12 15:06:20 2016 -0400

nir/repair_ssa: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=480a182ccd50a084e260f154b4f288b6de1c2d2f
Author: Connor Abbott 
Date:   Tue Apr 12 15:03:41 2016 -0400

nir/opt_peephole_select: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5f37701ab6300c64e02d1c527ccc30fbda32fd3
Author: Connor Abbott 
Date:   Tue Apr 12 14:57:35 2016 -0400

nir/phi_builder: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ba40d834b652e1d8bedbf2ea34f0c023c5cc27d
Author: Connor Abbott 
Date:   Tue Apr 12 14:55:19 2016 -0400

nir/opt_cp: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8dd7d7892581c275cadd22b42c33fa9769c396ea
Author: Connor Abbott 
Date:   Tue Apr 12 14:49:09 2016 -0400

nir/opt_remove_phis: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a8c17a59e953e31de1c2f5b07d096a7e271e12f
Author: Connor Abbott 
Date:   Tue Apr 12 14:46:03 2016 -0400

nir/opt_undef: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=52affdd2e6f530b43abafcc56867510cc790e3e2
Author: Connor Abbott 
Date:   Tue Apr 12 14:43:16 2016 -0400

nir/opt_dead_cf: fixup for new foreach_block()

Reviewed-by: Jason Ekstrand 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ddc6639f8596d0d44d84e0b0fd3a5461c953c4b2
Author: Connor Abbott 
Date:   Fri Apr 8 17:43:48 2016 -0400

nir/opt_dce: fixup for new 

Mesa (master): 43 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=814b7d1ab9e90567034e9601a420ed1be2970c15
Author: Marek Olšák 
Date:   Mon Sep 28 23:50:12 2015 +0200

radeonsi: enable PIPE_CAP_FORCE_PERSAMPLE_INTERP

Now st/mesa won't generate 2 variants for this state.

Reviewed-by: Michel Dänzer 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3c55fc669b54589e57a112df75094405e16ff52
Author: Marek Olšák 
Date:   Mon Sep 28 23:46:04 2015 +0200

radeonsi: do force_persample_interp in shaders for non-trivial cases

Reviewed-by: Michel Dänzer 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9652bfcf2d2f3be5158ed88b49917bb5a2d8323d
Author: Marek Olšák 
Date:   Mon Sep 28 17:21:10 2015 +0200

radeonsi: implement the simple case of force_persample_interp

Reviewed-by: Michel Dänzer 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=214de2d815360aa3986eb52a3b3060c33523f1b3
Author: Marek Olšák 
Date:   Mon Sep 28 17:01:21 2015 +0200

radeonsi: move SPI_PS_INPUT_ENA/ADDR registers to a separate state

This will be a derived state used for changing center->sample and
centroid->sample at runtime.

Reviewed-by: Michel Dänzer 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55d406b71ee96dc7ee2dc2f9dd7df3bd80957f5a
Author: Marek Olšák 
Date:   Mon Sep 28 21:44:54 2015 +0200

tgsi/scan: add interpolation info into tgsi_shader_info

Reviewed-by: Michel Dänzer 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6b0f21cb287bde3acaba1b0d18ab1c291acf327f
Author: Marek Olšák 
Date:   Sun Sep 27 19:54:57 2015 +0200

st/mesa: automatically set per-sample interpolation if using SampleID/Pos

Reviewed-by: Ilia Mirkin 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e9fc7e4e2fa3b3c77d08c4db545dcc279e849e9
Author: Marek Olšák 
Date:   Sun Sep 27 19:43:00 2015 +0200

st/mesa: set force_persample_interp if ARB_sample_shading is used

This is only a half of the work. The next patch will handle
gl_SampleID/SamplePos, which is the other half of ARB_sample_shading.

Reviewed-by: Ilia Mirkin 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3b37e321fe5ea8a8c0ff026636d69ce90437a6f
Author: Marek Olšák 
Date:   Sun Sep 27 19:32:07 2015 +0200

gallium: add per-sample interpolation control into rasterizer statOAe

Required by ARB_sample_shading for drivers that don't want a shader variant
in st/mesa.

Reviewed-by: Ilia Mirkin 
Acked-by: Roland Scheidegger 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8932a355dfdd813f903b4f2bd6aab36ea66d14a
Author: Marek Olšák 
Date:   Sun Sep 27 21:08:46 2015 +0200

st/mesa: add ST_DEBUG=precompile support for tessellation shaders

Reviewed-by: Ilia Mirkin 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd340b34f30e71db56f1a12768c7332b8224448c
Author: Marek Olšák 
Date:   Sun Sep 27 21:28:22 2015 +0200

mesa: remove Driver.BindImageTexture

Nothing sets it.

Reviewed-by: Brian Paul 
Reviewed-by: Ian Romanick 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=92709dcb9b7a09f9e5870a832c22197cde557fd4
Author: Marek Olšák 
Date:   Sun Sep 27 21:28:22 2015 +0200

mesa: remove Driver.DeleteSamplerObject

Nothing overrides it.

Reviewed-by: Brian Paul 
Reviewed-by: Ian Romanick 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=00f6beed02d644189b935b3cc9d70a6f993c034e
Author: Marek Olšák 
Date:   Sun Sep 27 21:28:22 2015 +0200

mesa: remove Driver.EndCallList

Nothing overrides it.

Reviewed-by: Brian Paul 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef6c0714af57d1aeaa9904fc4bb074e381ef928b
Author: Marek Olšák 
Date:   Sun Sep 27 21:28:22 2015 +0200

mesa: remove Driver.BeginCallList

Nothing overrides it.

Reviewed-by: Brian Paul 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f457964885afedaa47c1ee675c313650d1082473
Author: Marek Olšák 
Date:   Sun Sep 27 21:28:22 2015 +0200

mesa: remove Driver.EndList

Nothing overrides it.

Reviewed-by: Brian Paul 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55735cad007f15fb407f803a0416593997a2045e
Author: Marek 

Mesa (master): 43 new commits

[Marek Olšák]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a90aa54fde37cbdf162bf909a9e895b764eb41ea
Author: Marek Olšák marek.ol...@amd.com
Date:   Thu Aug 13 23:46:13 2015 +0200

docs/relnotes: document amdgpu, GL 4.1 and other new features

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7bfb9ee5ee0551ef2c2056e7fe2e63e35c629e3c
Author: Marek Olšák marek.ol...@amd.com
Date:   Thu Apr 16 22:59:41 2015 +0200

radeonsi: add all new VI PCI IDs including Fiji

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f47c59322e614d6304091207fc81cfa5beba6ea9
Author: Marek Olšák marek.ol...@amd.com
Date:   Mon Aug 10 16:23:53 2015 +0200

radeonsi: revert a wrong DB bug workaround for VI

The bug was misunderstood. Besides that, the bug affects a DB feature we
don't use yet.

Reviewed-by: Michel Dänzer michel.daen...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=839bf82606ae9c7b1c7d8d5055ab5e3cadae9bf9
Author: Boyuan Zhang boyuan.zh...@amd.com
Date:   Wed Jul 8 16:54:48 2015 -0400

radeon/uvd: implement HEVC support

add context buffer to fix H265 uvd decode issue.
fix H265 corruption issue caused by incorrect assigned ref_pic_list.

v2: disable interlace for HEVC
add CZ sps flag workaround
fix coding style

Signed-off-by: Christian König christian.koe...@amd.com
Signed-off-by: Boyuan Zhang boyuan.zh...@amd.com
Reviewed-by: Leo Liu leo@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0654a9ca17c17fe140f70d126c878a0ce4736b76
Author: Leo Liu leo@amd.com
Date:   Mon Jul 13 13:36:27 2015 -0400

radeon/vce: disable VCE dual instance for harvest part

Signed-off-by: Leo Liu leo@amd.com
Reviewed-by: Alex Deucher alexander.deuc...@amd.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=09def7e1e06827ab1eae091f0e765d91c6715cf9
Author: Leo Liu leo@amd.com
Date:   Thu Jun 25 10:14:14 2015 -0400

radeon/vce: implement VCE dual instance support

VCE dual instances are encoding in parallel, it needs two frames for
encoding with their own parameters in one IB. Master instance will check
the task info to find another frame, assign it to the slave instance

Signed-off-by: Leo Liu leo@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
Acked-by: Alex Deucher alexander.deuc...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4dfcf6e3a91be97fcf9d3f44e76a7a389f8f40b2
Author: Leo Liu leo@amd.com
Date:   Thu Jun 25 12:12:12 2015 -0400

radeon/video: config encode stacked frame number based on HW

since VCE 3.0 with dual instances, we need stack frames for them.

Signed-off-by: Leo Liu leo@amd.com
Acked-by: Alex Deucher alexander.deuc...@amd.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42bc4e6be434b398d9edaff0ed10dfb5bf89b6a6
Author: Christian König christian.koe...@amd.com
Date:   Mon Jun 15 20:19:48 2015 +0200

radeon/vce: make reloc offset signed

We need a negative offset for FW 50.

Signed-off-by: Christian König christian.koe...@amd.com
Acked-by: Alex Deucher alexander.deuc...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57fabe9f3a21a2a370284575833637d37e987cb5
Author: Leo Liu leo@amd.com
Date:   Mon Jun 1 13:48:24 2015 -0400

radeon/vce: add config task and put task info into encoder v2

The config task has own task ID, extract the configuration functions
into config task.

v2 (chk): calculate offset automatically

Signed-off-by: Leo Liu leo@amd.com
Signed-off-by: Christian König christian.koe...@amd.com
Acked-by: Alex Deucher alexander.deuc...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e91a67abfa5112acd481ee4a3f07c03f6ff2708c
Author: Leo Liu leo@amd.com
Date:   Mon Jun 15 15:20:20 2015 -0400

radeon/vce: fix VCE fail after rebase

Signed-off-by: Leo Liu leo@amd.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa80c1fe20f1fc33864f04fd9cf49f8bddfa4448
Author: Leo Liu leo@amd.com
Date:   Mon Jun 15 14:11:57 2015 -0400

radeon/vce: add dual pipe support for VI

Signed-off-by: Leo Liu leo@amd.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=468fcdcb4fafeba466bb1006ece1f16cc38805c7
Author: Leo Liu leo@amd.com
Date:   Fri May 29 13:43:00 2015 -0400

radeon/vce: add new firmware support for VI and CI

Signed-off-by: Leo Liu leo@amd.com
Reviewed-by: Christian König christian.koe...@amd.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1550790b3fab901c697e9d8e5b01ea67d8843e99
Author: Leo Liu 

Mesa (master): 43 new commits

[Jason Ekstrand]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ddc25a8d4796316f0296eaa10eba26bd6dd1718
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Fri Sep 26 16:08:52 2014 -0700

i965/fs: Properly calculate the number of instructions in 
calculate_register_pressure

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=514fd1c55e617bb325979cbee4a89f0727c3b567
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Fri Sep 12 16:17:37 2014 -0700

i965/fs: Use the GRF for FB writes on gen = 7

   On gen 7, the MRF was removed and we gained the ability to do send
   instructions directly from the GRF.  This commit enables that
   functinoality for FB writes.

   v2: Make handling of components more sane.

i965/fs: Force a high register for the final FB write

   v2: Renamed the array for the range mappings and added a comment

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dd9b90ecd8e001b40febfb8908c0b9a0c08c7d5
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Tue Sep 16 16:28:53 2014 -0700

i965/fs: Handle COMPR4 in LOAD_PAYLOAD

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=29f4c5b5d5d142f19283c06e77bedd4b3793657a
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Wed Sep 24 14:51:22 2014 -0700

i965/fs: Constant propagate into LOAD_PAYLOAD

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d770ce93aacf29940bacb6fe2ae78cf716751dc
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Fri Sep 19 21:03:25 2014 -0700

i965/fs: Add split_virtual_grfs and compute_to_mrf after lower_load_payload

If we are going to use LOAD_PAYLOAD operations to fill MRF registers, then
we will need this.

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b0e4b387a2aeb28e32df5b680013338a841859b
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Tue Sep 16 15:16:20 2014 -0700

i965/fs: Add a an optional source to the FS_OPCODE_FB_WRITE instruction

Previously, we were use the base_mrf parameter of fs_inst to store the MRF
location.  In preparation for doing FB writes from the GRF, we now also
allow you to set inst-base_mrf to -1 and provide a source register.

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e1f52a6e2b0277de063a8d8b07c5e520795a23b
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Thu Sep 11 16:43:37 2014 -0700

i965/fs: Use the GRF for UNTYPED_SURFACE_READ instructions

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d25aaf1cb1688b38b2a4025dbbff26d74291723c
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Thu Sep 11 16:13:15 2014 -0700

i965/fs: Use the GRF for UNTYPED_ATOMIC instructions

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=65ddf6f40469c5da1e5daf4270ca698a03860472
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Thu Sep 11 16:15:10 2014 -0700

i965/fs: Add a function for getting a component of a 8 or 16-wide register

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=30d718c2fbaeeffb24468ce773e44a6bf6f6aa2a
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Fri Aug 29 17:22:57 2014 -0700

i965/fs: Use the instruction execution size directly for texture generation

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=48ddd2889e15aaf8ddb6dff5d8b6dc275f7f3f8d
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Tue Sep 16 18:02:52 2014 -0700

i965/fs: Use exec_size instead of force_uncompressed in dump_instruction

Signed-off-by: Jason Ekstrand jason.ekstr...@intel.com
Reviewed-by: Matt Turner matts...@gmail.com

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b18fd234da275a0ec6b3c5cb77497a4c487c6366
Author: Jason Ekstrand jason.ekstr...@intel.com
Date:   Sat Aug 16 11:34:56 2014 -0700

i965/fs: Use instruction execution sizes