Re: [Mesa-dev] [PATCH 1/4] i965/gen6: setup limits for ARB_viewport_array
On Wednesday, May 06, 2015 06:08:17 PM Chris Forbes wrote:
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_context.c | 4 ++--
src/mesa/drivers/dri/i965/brw_defines.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 6c00f6c..fd7420a 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -598,8 +598,8 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx-Const.ShaderCompilerOptions[MESA_SHADER_COMPUTE].NirOptions =
nir_options;
/* ARB_viewport_array */
- if (brw-gen = 7 ctx-API == API_OPENGL_CORE) {
- ctx-Const.MaxViewports = GEN7_NUM_VIEWPORTS;
+ if (brw-gen = 6 ctx-API == API_OPENGL_CORE) {
+ ctx-Const.MaxViewports = GEN6_NUM_VIEWPORTS;
ctx-Const.ViewportSubpixelBits = 0;
/* Cast to float before negating because MaxViewportWidth is unsigned.
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 7b5dd45..83d7a35 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1712,7 +1712,7 @@ enum brw_message_target {
# define GEN6_CC_VIEWPORT_MODIFY (1 12)
# define GEN6_SF_VIEWPORT_MODIFY (1 11)
# define GEN6_CLIP_VIEWPORT_MODIFY (1 10)
-# define GEN7_NUM_VIEWPORTS 16
+# define GEN6_NUM_VIEWPORTS 16
#define _3DSTATE_VIEWPORT_STATE_POINTERS_CC 0x7823 /* GEN7+ */
#define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL 0x7821 /* GEN7+ */
This series is:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
(I actually read it before Chris posted it)
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[Mesa-dev] [PATCH] glsl/ast: don't implicit convert from double to float
From: Dave Airlie airl...@redhat.com
Implicit conversion can only happen the other way.
This fixes a bug I just saw from writing an incorrect test.
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/ast_to_hir.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 14e6309..1c3780a 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -172,7 +172,6 @@ get_conversion_operation(const glsl_type *to, const
glsl_type *from,
switch (from-base_type) {
case GLSL_TYPE_INT: return ir_unop_i2f;
case GLSL_TYPE_UINT: return ir_unop_u2f;
- case GLSL_TYPE_DOUBLE: return ir_unop_d2f;
default: return (ir_expression_operation)0;
}
--
2.1.0
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Re: [Mesa-dev] [PATCH 7/9] i965: ensure execution of fragment shader when fragment shader has atomic buffer access
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
If the fragment shader has atomic buffer access, the shader must execute
even if the current draw buffer has no attachments.
---
src/mesa/drivers/dri/i965/gen7_wm_state.c | 7 +++
src/mesa/drivers/dri/i965/gen8_ps_state.c | 4
2 files changed, 11 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 4d67b86..939d6e4 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -77,6 +77,13 @@ upload_wm_state(struct brw_context *brw)
dw1 |= GEN7_WM_KILL_ENABLE;
}
+ if (brw-ctx.Shader._CurrentFragmentProgram != NULL
+ brw-ctx.Shader._CurrentFragmentProgram-NumAtomicBuffers 0) {
I think this check should be put in a utility function up in core Mesa
somewhere. It's open-coded twice in this patch, and the check will
change when GL_ARB_image_load_store lands.
+ dw1 |= GEN7_WM_DISPATCH_ENABLE;
+ }
+
/* _NEW_BUFFERS | _NEW_COLOR */
if (brw_color_buffer_write_enabled(brw) || writes_depth ||
dw1 GEN7_WM_KILL_ENABLE) {
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c
b/src/mesa/drivers/dri/i965/gen8_ps_state.c
index 5f39e12..614bc9b 100644
--- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
@@ -62,6 +62,10 @@ upload_ps_extra(struct brw_context *brw)
if (prog_data-uses_omask)
dw1 |= GEN8_PSX_OMASK_TO_RENDER_TARGET;
+ if (brw-ctx.Shader._CurrentFragmentProgram != NULL
+ brw-ctx.Shader._CurrentFragmentProgram-NumAtomicBuffers 0)
+ dw1 |= GEN8_PSX_SHADER_HAS_UAV;
+
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_PS_EXTRA 16 | (2 - 2));
OUT_BATCH(dw1);
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Re: [Mesa-dev] [PATCH 1/3] mesa/main: Remove _mesa_HashClone()
On Tue, 2015-05-05 at 13:50 +0300, Juha-Pekka Heikkila wrote:
I didn't find this being used anywhere.
It used to be used by KHR_debug but Chia-I Wu replaced the hash table
with a list for a number of reasons this time last year.
Reviewed-by: Timothy Arceri t_arc...@yahoo.com.au
Signed-off-by: Juha-Pekka Heikkila juhapekka.heikk...@gmail.com
---
src/mesa/main/hash.c | 28
src/mesa/main/hash.h | 3 ---
2 files changed, 31 deletions(-)
diff --git a/src/mesa/main/hash.c b/src/mesa/main/hash.c
index d04cccd..315b5d6 100644
--- a/src/mesa/main/hash.c
+++ b/src/mesa/main/hash.c
@@ -389,34 +389,6 @@ _mesa_HashDeleteAll(struct _mesa_HashTable *table,
/**
- * Clone all entries in a hash table, into a new table.
- *
- * \param table the hash table to clone
- */
-struct _mesa_HashTable *
-_mesa_HashClone(const struct _mesa_HashTable *table)
-{
- /* cast-away const */
- struct _mesa_HashTable *table2 = (struct _mesa_HashTable *) table;
- struct hash_entry *entry;
- struct _mesa_HashTable *clonetable;
-
- assert(table);
- mtx_lock(table2-Mutex);
-
- clonetable = _mesa_NewHashTable();
- assert(clonetable);
- hash_table_foreach(table-ht, entry) {
- _mesa_HashInsert(clonetable, (GLint)(uintptr_t)entry-key,
entry-data);
- }
-
- mtx_unlock(table2-Mutex);
-
- return clonetable;
-}
-
-
-/**
* Walk over all entries in a hash table, calling callback function for each.
* Note: we use a separate mutex in this function to avoid a recursive
* locking deadlock (in case the callback calls _mesa_HashRemove()) and to
diff --git a/src/mesa/main/hash.h b/src/mesa/main/hash.h
index e3e8f49..da3b997 100644
--- a/src/mesa/main/hash.h
+++ b/src/mesa/main/hash.h
@@ -59,9 +59,6 @@ _mesa_HashDeleteAll(struct _mesa_HashTable *table,
void (*callback)(GLuint key, void *data, void *userData),
void *userData);
-extern struct _mesa_HashTable *
-_mesa_HashClone(const struct _mesa_HashTable *table);
-
extern void
_mesa_HashWalk(const struct _mesa_HashTable *table,
void (*callback)(GLuint key, void *data, void *userData),
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Re: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for fetching geometry of gl_framebuffer
One more question:
for patch 2 of the series, there was the request to change the type of
_HasAttachments from GLboolean to bool. If the helper functions survive,
should the helper functions return unsigned int instead of GLuint?
-Kevin
-Original Message-
From: Rogovin, Kevin
Sent: Wednesday, May 06, 2015 10:28 AM
To: 'Ian Romanick'; mesa-...@freedesktop.org
Subject: RE: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for
fetching geometry of gl_framebuffer
I'm waffling about this a bit. I'm concerned that people will use
buffer-Width when they should use the accessor. I don't see any
changes to core Mesa code to use the accessor, so I'm a little concerned that
some subtle, incorrect behavior is introduced... but there may well not be.
A common idiom in Mesa is to have an _Value field that is the derived value.
In many structures in mtypes.h you can see things like Enabled and
_ReallyEnabled. One is what the API sets, and the other is what the driver
uses that is based on the API setting and other factors. In many ways, the
existing gl_framebuffer Width and Height fields are already derived values
based on the sizes of the attachments.
For at least Width, Height, and MaxNumLayers, it seems better to set the
existing fields differently when _HasAttachments is true. That reduces the
number of places where a person has to think about _HasAttachments
considerably... though perhaps there is something else that I'm not thinking
of?
I was thinking of doing this when I was making the patch. The problem is that
Width, Height and MaxNumLayers were used for two different purposes:
1. Specifying the intersection of the attached buffers (this affects blitting
for example) 2. Specifying the geometry to send to a rasterizer
Changing Width and Height to be the geometry made me itch because Width and
Height are zero when there are no buffer attachments. I added a mess of
comments about the meaning of Width and Height. My concern is that other parts
of code use Width and Height being 0 to do other things. With this patch way,
the meaning of Width and Height has not changed; instead a diver has to know
what it is doing when it enables the extension.
I am not particular about this though; I made it this way in an attempt to
reduce the scope of changes from this patch series. If people want that the
meaning of Width, Height and MaxSamplers changes I can go with that too, I just
think it can increase the ickiness of making sure no unintended side effects
are added is ickier.
If we go that route, we should probably just add a gl_framebuffer::Samples
field for uniformity.
+
+
+static inline GLuint
+_mesa_geometric_height(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-Height : buffer-DefaultGeometry.Height; }
+
+static inline GLuint
+_mesa_geometric_samples(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-Visual.samples : buffer-DefaultGeometry.NumSamples;
+}
+
+static inline GLuint
+_mesa_geometric_layers(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-MaxNumLayers : buffer-DefaultGeometry.Layers; }
+
extern void
_mesa_update_draw_buffer_bounds(struct gl_context *ctx);
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index
ef97538..f0e8fbc 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3178,7 +3178,13 @@ struct gl_framebuffer
* the values in DefaultGeometry to initialize its
* viewport, scissor and so on (in particular _Xmin,
* _Xmax, _Ymin and _Ymax do NOT take into account
-* _HasAttachments being false)
+* _HasAttachments being false). To get the geometry
+* of the framebuffer, the helper functions
+* _mesa_geometric_width(),
+* _mesa_geometric_height(),
+* _mesa_geometric_samples(),
+* _mesa_geometric_layers()
+* are available that check _HasAttachments.
*/
GLboolean _HasAttachments;
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Re: [Mesa-dev] [PATCH 7/9] egl/wayland: assume EGL_WINDOW_BIT
Hi, On 6 May 2015 at 07:25, Pekka Paalanen ppaala...@gmail.com wrote: On Wed, 6 May 2015 11:00:13 +1000 Dave Airlie airl...@gmail.com wrote: On 2 May 2015 at 20:15, Axel Davy axel.d...@ens.fr wrote: Only EGL_WINDOW_BIT is supported. Remove tests related. Is this there no plans to support pixmap/pbuffer/ or any of the other bits? Seems like a step in the wrong direction if we really should be supporting other things than WINDOW_BIT in the future. EGL Wayland by definition does not have pixmaps: https://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_platform_wayland.txt Pbuffers OTOH I suppose are possible. Possible, yes. I _think_ PVR supports them, but pretty sure Mali doesn't. I'm entirely comfortable with not doing so either. Cheers, Daniel ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/7] mesa/es3.1: enable DRAW_INDIRECT_BUFFER_BINDING for gles3.1
I've just noticed that this is wrong, sorry :/ We should to make a new
section for some of the enums that are only in GL core and ES31,
DRAW_INDIRECT_BUFFER_BINDING is one of these cases .. so this patch is
broken. Same may apply for some of your patches, there should not be
duplicates but only one entry per enum in the correct API section.
(Otherwise, enabling these getters for ES3.1 is correct thing todo.)
On 05/06/2015 11:53 AM, Marta Lofstedt wrote:
From: Tapani Pälli tapani.pa...@intel.com
(increases ES31-CTS.draw_indirect.basic.* passing tests)
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/get.c | 12
src/mesa/main/get_hash_params.py | 2 ++
2 files changed, 14 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index a881bc5..9898197 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -138,6 +138,7 @@ enum value_extra {
EXTRA_API_GL_CORE,
EXTRA_API_ES2,
EXTRA_API_ES3,
+ EXTRA_API_ES31,
EXTRA_NEW_BUFFERS,
EXTRA_NEW_FRAG_CLAMP,
EXTRA_VALID_DRAW_BUFFER,
@@ -348,6 +349,12 @@ static const int
extra_ARB_shader_image_load_store_and_geometry_shader[] = {
EXTRA_END
};
+static const int extra_ARB_draw_indirect_es31[] = {
+ EXT(ARB_draw_indirect),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
@@ -1078,6 +1085,11 @@ check_extra(struct gl_context *ctx, const char *func,
const struct value_desc *d
if (_mesa_is_gles3(ctx))
api_found = GL_TRUE;
break;
+ case EXTRA_API_ES31:
+ api_check = GL_TRUE;
+ if (_mesa_is_gles31(ctx))
+api_found = GL_TRUE;
+break;
case EXTRA_API_GL:
api_check = GL_TRUE;
if (_mesa_is_desktop_gl(ctx))
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 41cb2c1..998efe8 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -407,6 +407,8 @@ descriptor=[
{ apis: [GL, GL_CORE, GLES3], params: [
# GL_ARB_sampler_objects / GL 3.3 / GLES 3.0
[ SAMPLER_BINDING, LOC_CUSTOM, TYPE_INT, GL_SAMPLER_BINDING, NO_EXTRA ],
+# GL_ARB_draw_indirect / GLES 3.1
+ [ DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
extra_ARB_draw_indirect_es31 ],
]},
# Remaining enums are only in OpenGL
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Re: [Mesa-dev] [RFC 0/6] i965: INTEL_performance_query re-work
On 05/06/2015 02:53 AM, Robert Bragg wrote: As we've learned more about the observability capabilities of Gen graphics we've found that it's not enough to only try and configure the OA unit from userspace without any dedicated support from the kernel. Hi Robert, Yeah, this is the same idea for performance counters on Nouveau. We also need to implement a dedicated support from the kernel for configuring/sampling hardware performance counters. Then, we can expose a list of available counters through a set of ioctls. Thus, mesa configures a hardware event by sending its configuration to the kernel. As it is currently the i965 backends for both AMD_performance_monitor and INTEL_performance_query aren't able to report normalized metrics useful to application developers due to the limitations of configuring the OA unit from userspace via LRIs. More recently we've developed a perf PMU (performance monitoring unit) driver within the drm i915 driver (i915_oa) that lets userspace configure and open an event fd via the perf_event_open syscall which provides us a more complete interface for configuring the Gen graphics OA unit. With help from the kernel we can support periodic sampling (where the hardware writes reports into a gpu mapped circular buffer that we can forward as perf samples), we can deal with the clock gating + PM limitations imposed by the observability hw and also manage + maintain the selection of performance counters. The perf_event_open(2) man page is a good starting point for anyone wanting to learn about the Linux perf interface. Something to beware of is that there's currently no precedent upstream for exposing device metrics via a perf PMU and although early feedback was sought for this work, some of this may be subject to change based on feedback from the core perf maintainers as well as the i915 drm driver maintainers. Performance counters on Nouveau won't be exposed (in the near future) by perf since they need to be tied to the command stream of the GPU, and perf only works with ioctl calls. This PRM is a good starting point for anyone wanting to learn about the Gen graphics Observability hardware. Some important information is currently missing and this should be updated soon, but that's more directly related to the i915_oa perf driver. Notably though the report formats described here need to be understood by Mesa, since the perf samples simply forward the raw reports from the OA hardware. https://01.org/sites/default/files/documentation/ observability_performance_counters_haswell.pdf This series re-works the i965 driver's support for exposing performance counters, taking advantage of this i915_oa perf event interface. A corresponding kernel branch with an initial i915_oa driver for Haswell can be found here: https://github.com/rib/linux wip/rib/oa-hsw-4.0.0 A corresponding libdrm branch can be found here: https://github.com/rib/drm wip/rib/oa-hsw-4.0.0 In case it's helpful to see another example using the i915_oa perf interface I've also been developing a 'gputop' tool that both lets me test the INTEL_performance_query interface to collect per-context metrics from Mesa and can also visualize system wide metrics (i.e. across all gpu contexts) using perf directly: https://github.com/rib/gputop This is pretty good for testing OA counters without mesa. Although I haven't updated the branches in a while, I could share some initial code adding support for Broadwell if anyone's interested to get a sense of what's involved in supporting later hardware generations. I still anticipate some (hopefully relatively minor) tweaking of implementation details based on review feedback for the i915_oa driver, but I hope that this is a good point to ask for some feedback on the Mesa changes. If it's more convenient, these patches can also be fetched from here: https://github.com/rib/mesa wip/rib/oa-hsw-4.0.0 Great work Robert. :-) I'll try to give you my feedback in the next few days. Regards, - Robert Robert Bragg (6): i965: Remove perf monitor/query backend Separate INTEL_performance_query frontend Model INTEL perf query backend after query object BE i965: Implement INTEL_performance_query extension i965: Expose OA counters via INTEL_performance_query i965: Adds further support for 3D OA counters src/mapi/glapi/gen/gl_genexec.py |1 + src/mesa/Makefile.sources |2 + src/mesa/drivers/dri/i965/Makefile.sources |2 +- src/mesa/drivers/dri/i965/brw_context.c|5 +- src/mesa/drivers/dri/i965/brw_context.h| 101 +- .../drivers/dri/i965/brw_performance_monitor.c | 1472 src/mesa/drivers/dri/i965/brw_performance_query.c | 2356 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 10 +- src/mesa/drivers/dri/i965/intel_extensions.c | 69 +- src/mesa/main/context.c|3 +
[Mesa-dev] [PATCH 5/7] mesa/es3.1: enable GL_ARB_texture_gather for gles 3.1
GL_ARB_texture_gather is needed for gles 3.1 conformance.
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 4
2 files changed, 10 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index dcf4f0a..95868bf 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -373,6 +373,12 @@ static const int extra_ARB_texture_multisample_es31[] = {
EXTRA_END
};
+static const int extra_ARB_texture_gather_es31[] = {
+ EXT(ARB_texture_gather),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 4aac97d..392a898 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -437,6 +437,10 @@ descriptor=[
[ MAX_INTEGER_SAMPLES, CONTEXT_INT(Const.MaxIntegerSamples),
extra_ARB_texture_multisample_es31 ],
[ SAMPLE_MASK, CONTEXT_BOOL(Multisample.SampleMask),
extra_ARB_texture_multisample_es31 ],
[ MAX_SAMPLE_MASK_WORDS, CONST(1), extra_ARB_texture_multisample_es31 ],
+# GL_ARB_texture_gather / GLES 3.1
+ [ MIN_PROGRAM_TEXTURE_GATHER_OFFSET,
CONTEXT_INT(Const.MinProgramTextureGatherOffset),
extra_ARB_texture_gather_es31],
+ [ MAX_PROGRAM_TEXTURE_GATHER_OFFSET,
CONTEXT_INT(Const.MaxProgramTextureGatherOffset),
extra_ARB_texture_gather_es31],
+ [ MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB,
CONTEXT_INT(Const.MaxProgramTextureGatherComponents),
extra_ARB_texture_gather_es31],
]},
# Remaining enums are only in OpenGL
--
1.9.1
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[Mesa-dev] [PATCH 7/7] mesa/es3.1: enable GL_ARB_explicit_uniform_location for gles 3.1
GL_ARB_explicit_uniform_location is required for gles 3.1
conformance
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 2 ++
2 files changed, 8 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 97d3bf0..6fc0f3f 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -385,6 +385,12 @@ static const int extra_ARB_compute_shader_es31[] = {
EXTRA_END
};
+static const int extra_ARB_explicit_uniform_location_es31[] = {
+ EXT(ARB_explicit_uniform_location),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 2e0b355..c64bb58 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -450,6 +450,8 @@ descriptor=[
[ MAX_COMPUTE_SHARED_MEMORY_SIZE, CONST(MAX_COMPUTE_SHARED_MEMORY_SIZE),
extra_ARB_compute_shader_es31 ],
[ MAX_COMPUTE_UNIFORM_COMPONENTS, CONST(MAX_COMPUTE_UNIFORM_COMPONENTS),
extra_ARB_compute_shader_es31 ],
[ MAX_COMPUTE_IMAGE_UNIFORMS, CONST(MAX_COMPUTE_IMAGE_UNIFORMS),
extra_ARB_compute_shader_es31 ],
+# GL_ARB_explicit_uniform_location / GLES 3.1
+ [ MAX_UNIFORM_LOCATIONS,
CONTEXT_INT(Const.MaxUserAssignableUniformLocations),
extra_ARB_explicit_uniform_location_es31 ],
]},
# Remaining enums are only in OpenGL
--
1.9.1
--
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[Mesa-dev] [PATCH 0/7] Continue enabling OpenGL ES 3.1
This series of patches continues on the GLES 3.1 enabling started by Ian. It focusing of exposing definitions from previously extisting Open GL extensions that are needed for OpenGL ES 3.1 conformance. Marta Lofstedt (6): mesa/es3.1: enable GL_ARB_shader_image_load_store for gles3.1 mesa/es3.1: enable GL_ARB_shader_atomic_counters for gles 3.1 mesa/es3.1: enable GL_ARB_texture_multisample for gles 3.1 mesa/es3.1: enable GL_ARB_texture_gather for gles 3.1 mesa/es3.1: enable GL_ARB_compute_shader for gles 3.1 mesa/es3.1: enable GL_ARB_explicit_uniform_location for gles 3.1 Tapani Pälli (1): mesa/es3.1: enable DRAW_INDIRECT_BUFFER_BINDING for gles3.1 src/mesa/main/get.c | 48 src/mesa/main/get_hash_params.py | 45 + 2 files changed, 93 insertions(+) -- 1.9.1 -- Intel Sweden AB Registered Office: Knarrarnasgatan 15, 164 40 Kista, Stockholm, Sweden Registration Number: 556189-6027 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 6/7] mesa/es3.1: enable GL_ARB_compute_shader for gles 3.1
GL_ARB_compute_shader is needed for gles 3.1 conformance.
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 9 +
2 files changed, 15 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 95868bf..97d3bf0 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -379,6 +379,12 @@ static const int extra_ARB_texture_gather_es31[] = {
EXTRA_END
};
+static const int extra_ARB_compute_shader_es31[] = {
+ EXT(ARB_compute_shader),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 392a898..2e0b355 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -441,6 +441,15 @@ descriptor=[
[ MIN_PROGRAM_TEXTURE_GATHER_OFFSET,
CONTEXT_INT(Const.MinProgramTextureGatherOffset),
extra_ARB_texture_gather_es31],
[ MAX_PROGRAM_TEXTURE_GATHER_OFFSET,
CONTEXT_INT(Const.MaxProgramTextureGatherOffset),
extra_ARB_texture_gather_es31],
[ MAX_PROGRAM_TEXTURE_GATHER_COMPONENTS_ARB,
CONTEXT_INT(Const.MaxProgramTextureGatherComponents),
extra_ARB_texture_gather_es31],
+# GL_ARB_compute_shader / GLES 3.1
+ [ MAX_COMPUTE_WORK_GROUP_INVOCATIONS,
CONTEXT_INT(Const.MaxComputeWorkGroupInvocations),
extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_UNIFORM_BLOCKS, CONST(MAX_COMPUTE_UNIFORM_BLOCKS),
extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_TEXTURE_IMAGE_UNITS,
CONST(MAX_COMPUTE_TEXTURE_IMAGE_UNITS), extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS,
CONST(MAX_COMPUTE_ATOMIC_COUNTER_BUFFERS), extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_ATOMIC_COUNTERS, CONST(MAX_COMPUTE_ATOMIC_COUNTERS),
extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_SHARED_MEMORY_SIZE, CONST(MAX_COMPUTE_SHARED_MEMORY_SIZE),
extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_UNIFORM_COMPONENTS, CONST(MAX_COMPUTE_UNIFORM_COMPONENTS),
extra_ARB_compute_shader_es31 ],
+ [ MAX_COMPUTE_IMAGE_UNIFORMS, CONST(MAX_COMPUTE_IMAGE_UNIFORMS),
extra_ARB_compute_shader_es31 ],
]},
# Remaining enums are only in OpenGL
--
1.9.1
--
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[Mesa-dev] [PATCH 2/7] mesa/es3.1: enable GL_ARB_shader_image_load_store for gles3.1
GL_ARB_shader_image_load store support is required for GLES 3.1
conformance.
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 8
2 files changed, 14 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 9898197..73739b6 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -355,6 +355,12 @@ static const int extra_ARB_draw_indirect_es31[] = {
EXTRA_END
};
+static const int extra_ARB_shader_image_load_store_es31[] = {
+ EXT(ARB_shader_image_load_store),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 998efe8..a45e87c 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -409,6 +409,14 @@ descriptor=[
[ SAMPLER_BINDING, LOC_CUSTOM, TYPE_INT, GL_SAMPLER_BINDING, NO_EXTRA ],
# GL_ARB_draw_indirect / GLES 3.1
[ DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
extra_ARB_draw_indirect_es31 ],
+# GL_ARB_shader_image_load_store / GLES 3.1
+ [ MAX_IMAGE_UNITS, CONTEXT_INT(Const.MaxImageUnits),
extra_ARB_shader_image_load_store_es31],
+ [ MAX_COMBINED_IMAGE_UNITS_AND_FRAGMENT_OUTPUTS,
CONTEXT_INT(Const.MaxCombinedImageUnitsAndFragmentOutputs),
extra_ARB_shader_image_load_store_es31],
+ [ MAX_IMAGE_SAMPLES, CONTEXT_INT(Const.MaxImageSamples),
extra_ARB_shader_image_load_store_es31],
+ [ MAX_VERTEX_IMAGE_UNIFORMS,
CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxImageUniforms),
extra_ARB_shader_image_load_store_es31],
+ [ MAX_GEOMETRY_IMAGE_UNIFORMS,
CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxImageUniforms),
extra_ARB_shader_image_load_store_es31],
+ [ MAX_FRAGMENT_IMAGE_UNIFORMS,
CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms),
extra_ARB_shader_image_load_store_es31],
+ [ MAX_COMBINED_IMAGE_UNIFORMS,
CONTEXT_INT(Const.MaxCombinedImageUniforms),
extra_ARB_shader_image_load_store_es31],
]},
# Remaining enums are only in OpenGL
--
1.9.1
--
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[Mesa-dev] [PATCH 1/7] mesa/es3.1: enable DRAW_INDIRECT_BUFFER_BINDING for gles3.1
From: Tapani Pälli tapani.pa...@intel.com
(increases ES31-CTS.draw_indirect.basic.* passing tests)
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/get.c | 12
src/mesa/main/get_hash_params.py | 2 ++
2 files changed, 14 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index a881bc5..9898197 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -138,6 +138,7 @@ enum value_extra {
EXTRA_API_GL_CORE,
EXTRA_API_ES2,
EXTRA_API_ES3,
+ EXTRA_API_ES31,
EXTRA_NEW_BUFFERS,
EXTRA_NEW_FRAG_CLAMP,
EXTRA_VALID_DRAW_BUFFER,
@@ -348,6 +349,12 @@ static const int
extra_ARB_shader_image_load_store_and_geometry_shader[] = {
EXTRA_END
};
+static const int extra_ARB_draw_indirect_es31[] = {
+ EXT(ARB_draw_indirect),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
@@ -1078,6 +1085,11 @@ check_extra(struct gl_context *ctx, const char *func,
const struct value_desc *d
if (_mesa_is_gles3(ctx))
api_found = GL_TRUE;
break;
+ case EXTRA_API_ES31:
+ api_check = GL_TRUE;
+ if (_mesa_is_gles31(ctx))
+api_found = GL_TRUE;
+break;
case EXTRA_API_GL:
api_check = GL_TRUE;
if (_mesa_is_desktop_gl(ctx))
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 41cb2c1..998efe8 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -407,6 +407,8 @@ descriptor=[
{ apis: [GL, GL_CORE, GLES3], params: [
# GL_ARB_sampler_objects / GL 3.3 / GLES 3.0
[ SAMPLER_BINDING, LOC_CUSTOM, TYPE_INT, GL_SAMPLER_BINDING, NO_EXTRA ],
+# GL_ARB_draw_indirect / GLES 3.1
+ [ DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
extra_ARB_draw_indirect_es31 ],
]},
# Remaining enums are only in OpenGL
--
1.9.1
--
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Registration Number: 556189-6027
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[Mesa-dev] [PATCH 4/7] mesa/es3.1: enable GL_ARB_texture_multisample for gles 3.1
GL_ARB_texture_multisample is required for gles 3.1 conformance.
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 8
2 files changed, 14 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index f5318d5..dcf4f0a 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -367,6 +367,12 @@ static const int extra_ARB_shader_atomic_counters_es31[] =
{
EXTRA_END
};
+static const int extra_ARB_texture_multisample_es31[] = {
+ EXT(ARB_texture_multisample),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index e6e3a97..4aac97d 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -429,6 +429,14 @@ descriptor=[
[ MAX_GEOMETRY_ATOMIC_COUNTERS,
CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters),
extra_ARB_shader_atomic_counters_es31 ],
[ MAX_COMBINED_ATOMIC_COUNTER_BUFFERS,
CONTEXT_INT(Const.MaxCombinedAtomicBuffers),
extra_ARB_shader_atomic_counters_es31 ],
[ MAX_COMBINED_ATOMIC_COUNTERS,
CONTEXT_INT(Const.MaxCombinedAtomicCounters),
extra_ARB_shader_atomic_counters_es31 ],
+# GL_ARB_texture_multisample / GLES 3.1
+ [ TEXTURE_BINDING_2D_MULTISAMPLE, LOC_CUSTOM, TYPE_INT,
TEXTURE_2D_MULTISAMPLE_INDEX, extra_ARB_texture_multisample_es31 ],
+ [ TEXTURE_BINDING_2D_MULTISAMPLE_ARRAY, LOC_CUSTOM, TYPE_INT,
TEXTURE_2D_MULTISAMPLE_ARRAY_INDEX, extra_ARB_texture_multisample_es31 ],
+ [ MAX_COLOR_TEXTURE_SAMPLES, CONTEXT_INT(Const.MaxColorTextureSamples),
extra_ARB_texture_multisample_es31 ],
+ [ MAX_DEPTH_TEXTURE_SAMPLES, CONTEXT_INT(Const.MaxDepthTextureSamples),
extra_ARB_texture_multisample_es31 ],
+ [ MAX_INTEGER_SAMPLES, CONTEXT_INT(Const.MaxIntegerSamples),
extra_ARB_texture_multisample_es31 ],
+ [ SAMPLE_MASK, CONTEXT_BOOL(Multisample.SampleMask),
extra_ARB_texture_multisample_es31 ],
+ [ MAX_SAMPLE_MASK_WORDS, CONST(1), extra_ARB_texture_multisample_es31 ],
]},
# Remaining enums are only in OpenGL
--
1.9.1
--
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[Mesa-dev] [PATCH 3/7] mesa/es3.1: enable GL_ARB_shader_atomic_counters for gles 3.1
GL_ARB_shader_atomic_counters is required for gles 3.1 conformance.
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 12
2 files changed, 18 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 73739b6..f5318d5 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -361,6 +361,12 @@ static const int extra_ARB_shader_image_load_store_es31[]
= {
EXTRA_END
};
+static const int extra_ARB_shader_atomic_counters_es31[] = {
+ EXT(ARB_shader_atomic_counters),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index a45e87c..e6e3a97 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -417,6 +417,18 @@ descriptor=[
[ MAX_GEOMETRY_IMAGE_UNIFORMS,
CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxImageUniforms),
extra_ARB_shader_image_load_store_es31],
[ MAX_FRAGMENT_IMAGE_UNIFORMS,
CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxImageUniforms),
extra_ARB_shader_image_load_store_es31],
[ MAX_COMBINED_IMAGE_UNIFORMS,
CONTEXT_INT(Const.MaxCombinedImageUniforms),
extra_ARB_shader_image_load_store_es31],
+# GL_ARB_shader_atomic_counters / GLES 3.1
+ [ ATOMIC_COUNTER_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_ATOMIC_COUNTER_BUFFER_BINDINGS,
CONTEXT_INT(Const.MaxAtomicBufferBindings),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_ATOMIC_COUNTER_BUFFER_SIZE, CONTEXT_INT(Const.MaxAtomicBufferSize),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_VERTEX_ATOMIC_COUNTER_BUFFERS,
CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxAtomicBuffers),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_VERTEX_ATOMIC_COUNTERS,
CONTEXT_INT(Const.Program[MESA_SHADER_VERTEX].MaxAtomicCounters),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_FRAGMENT_ATOMIC_COUNTER_BUFFERS,
CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicBuffers),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_FRAGMENT_ATOMIC_COUNTERS,
CONTEXT_INT(Const.Program[MESA_SHADER_FRAGMENT].MaxAtomicCounters),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_GEOMETRY_ATOMIC_COUNTER_BUFFERS,
CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicBuffers),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_GEOMETRY_ATOMIC_COUNTERS,
CONTEXT_INT(Const.Program[MESA_SHADER_GEOMETRY].MaxAtomicCounters),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_COMBINED_ATOMIC_COUNTER_BUFFERS,
CONTEXT_INT(Const.MaxCombinedAtomicBuffers),
extra_ARB_shader_atomic_counters_es31 ],
+ [ MAX_COMBINED_ATOMIC_COUNTERS,
CONTEXT_INT(Const.MaxCombinedAtomicCounters),
extra_ARB_shader_atomic_counters_es31 ],
]},
# Remaining enums are only in OpenGL
--
1.9.1
--
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[Mesa-dev] [PATCH] android: egl: remove st/egl from build
Build without st/egl and target/egl. Signed-off-by: Varad Gautam varadgau...@gmail.com --- src/egl/main/Android.mk | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/egl/main/Android.mk b/src/egl/main/Android.mk index 12b66d0..800d20d 100644 --- a/src/egl/main/Android.mk +++ b/src/egl/main/Android.mk @@ -130,15 +130,12 @@ endif # # Notes about the order here: # -# * libmesa_st_egl depends on libmesa_winsys_sw_android in $(gallium_DRIVERS) # * libmesa_pipe_r300 in $(gallium_DRIVERS) depends on libmesa_st_mesa and #libmesa_glsl # * libmesa_st_mesa depends on libmesa_glsl # * libmesa_glsl depends on libmesa_glsl_utils # LOCAL_STATIC_LIBRARIES := \ - libmesa_egl_gallium \ - libmesa_st_egl \ $(gallium_DRIVERS) \ libmesa_st_mesa \ libmesa_util \ -- 2.1.2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for fetching geometry of gl_framebuffer
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
Add convenience helper functions for fetching geometry of gl_framebuffer
that return the geometry of the gl_framebuffer instead of the geometry of
the buffers of the gl_framebuffer when then the gl_framebuffer has no
attachments.
---
src/mesa/main/framebuffer.h | 29 +
src/mesa/main/mtypes.h | 8 +++-
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/src/mesa/main/framebuffer.h b/src/mesa/main/framebuffer.h
index a427421..4a2e0d9 100644
--- a/src/mesa/main/framebuffer.h
+++ b/src/mesa/main/framebuffer.h
@@ -76,6 +76,35 @@ _mesa_scissor_bounding_box(const struct gl_context *ctx,
const struct gl_framebuffer *buffer,
unsigned idx, int *bbox);
+static inline GLuint
+_mesa_geometric_width(const struct gl_framebuffer *buffer)
+{
+ return buffer-_HasAttachments ?
+ buffer-Width : buffer-DefaultGeometry.Width;
+}
I'm waffling about this a bit. I'm concerned that people will use
buffer-Width when they should use the accessor. I don't see any
changes to core Mesa code to use the accessor, so I'm a little concerned
that some subtle, incorrect behavior is introduced... but there may well
not be.
A common idiom in Mesa is to have an _Value field that is the derived
value. In many structures in mtypes.h you can see things like Enabled
and _ReallyEnabled. One is what the API sets, and the other is what the
driver uses that is based on the API setting and other factors. In
many ways, the existing gl_framebuffer Width and Height fields are
already derived values based on the sizes of the attachments.
For at least Width, Height, and MaxNumLayers, it seems better to set the
existing fields differently when _HasAttachments is true. That reduces
the number of places where a person has to think about _HasAttachments
considerably... though perhaps there is something else that I'm not
thinking of?
If we go that route, we should probably just add a
gl_framebuffer::Samples field for uniformity.
+
+
+static inline GLuint
+_mesa_geometric_height(const struct gl_framebuffer *buffer)
+{
+ return buffer-_HasAttachments ?
+ buffer-Height : buffer-DefaultGeometry.Height;
+}
+
+static inline GLuint
+_mesa_geometric_samples(const struct gl_framebuffer *buffer)
+{
+ return buffer-_HasAttachments ?
+ buffer-Visual.samples : buffer-DefaultGeometry.NumSamples;
+}
+
+static inline GLuint
+_mesa_geometric_layers(const struct gl_framebuffer *buffer)
+{
+ return buffer-_HasAttachments ?
+ buffer-MaxNumLayers : buffer-DefaultGeometry.Layers;
+}
+
extern void
_mesa_update_draw_buffer_bounds(struct gl_context *ctx);
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index ef97538..f0e8fbc 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3178,7 +3178,13 @@ struct gl_framebuffer
* the values in DefaultGeometry to initialize its
* viewport, scissor and so on (in particular _Xmin,
* _Xmax, _Ymin and _Ymax do NOT take into account
-* _HasAttachments being false)
+* _HasAttachments being false). To get the geometry
+* of the framebuffer, the helper functions
+* _mesa_geometric_width(),
+* _mesa_geometric_height(),
+* _mesa_geometric_samples(),
+* _mesa_geometric_layers()
+* are available that check _HasAttachments.
*/
GLboolean _HasAttachments;
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Re: [Mesa-dev] [PATCH 7/9] egl/wayland: assume EGL_WINDOW_BIT
On Wed, 6 May 2015 11:00:13 +1000
Dave Airlie airl...@gmail.com wrote:
On 2 May 2015 at 20:15, Axel Davy axel.d...@ens.fr wrote:
Only EGL_WINDOW_BIT is supported. Remove tests related.
Is this there no plans to support pixmap/pbuffer/ or any of the other bits?
Seems like a step in the wrong direction if we really should be supporting
other things than WINDOW_BIT in the future.
EGL Wayland by definition does not have pixmaps:
https://www.khronos.org/registry/egl/extensions/EXT/EGL_EXT_platform_wayland.txt
Pbuffers OTOH I suppose are possible.
Thanks,
pq
Signed-off-by: Axel Davy axel.d...@ens.fr
---
src/egl/drivers/dri2/platform_wayland.c | 38
+++--
1 file changed, 13 insertions(+), 25 deletions(-)
diff --git a/src/egl/drivers/dri2/platform_wayland.c
b/src/egl/drivers/dri2/platform_wayland.c
index 84482da..9603c32 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -120,7 +120,7 @@ resize_callback(struct wl_egl_window *wl_win, void
*data)
* Called via eglCreateWindowSurface(), drv-API.CreateWindowSurface().
*/
static _EGLSurface *
-dri2_wl_create_surface(_EGLDriver *drv, _EGLDisplay *disp, EGLint type,
+dri2_wl_create_surface(_EGLDriver *drv, _EGLDisplay *disp,
_EGLConfig *conf, void *native_window,
const EGLint *attrib_list)
{
@@ -137,7 +137,7 @@ dri2_wl_create_surface(_EGLDriver *drv, _EGLDisplay
*disp, EGLint type,
return NULL;
}
- if (!_eglInitSurface(dri2_surf-base, disp, type, conf, attrib_list))
+ if (!_eglInitSurface(dri2_surf-base, disp, EGL_WINDOW_BIT, conf,
attrib_list))
goto cleanup_surf;
if (conf-RedSize == 5)
@@ -147,25 +147,17 @@ dri2_wl_create_surface(_EGLDriver *drv, _EGLDisplay
*disp, EGLint type,
else
dri2_surf-format = WL_DRM_FORMAT_ARGB;
- switch (type) {
- case EGL_WINDOW_BIT:
- dri2_surf-wl_win = window;
+ dri2_surf-wl_win = window;
- dri2_surf-wl_win-private = dri2_surf;
- dri2_surf-wl_win-resize_callback = resize_callback;
+ dri2_surf-wl_win-private = dri2_surf;
+ dri2_surf-wl_win-resize_callback = resize_callback;
- dri2_surf-base.Width = -1;
- dri2_surf-base.Height = -1;
- break;
- default:
- goto cleanup_surf;
- }
+ dri2_surf-base.Width = -1;
+ dri2_surf-base.Height = -1;
dri2_surf-dri_drawable =
(*dri2_dpy-dri2-createNewDrawable) (dri2_dpy-dri_screen,
- type == EGL_WINDOW_BIT ?
- dri2_conf-dri_double_config :
- dri2_conf-dri_single_config,
+ dri2_conf-dri_double_config,
dri2_surf);
if (dri2_surf-dri_drawable == NULL) {
_eglError(EGL_BAD_ALLOC, dri2-createNewDrawable);
@@ -193,8 +185,7 @@ dri2_wl_create_window_surface(_EGLDriver *drv,
_EGLDisplay *disp,
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
_EGLSurface *surf;
- surf = dri2_wl_create_surface(drv, disp, EGL_WINDOW_BIT, conf,
- native_window, attrib_list);
+ surf = dri2_wl_create_surface(drv, disp, conf, native_window,
attrib_list);
if (surf != NULL)
dri2_wl_swap_interval(drv, disp, surf,
dri2_dpy-default_swap_interval);
@@ -253,10 +244,8 @@ dri2_wl_destroy_surface(_EGLDriver *drv, _EGLDisplay
*disp, _EGLSurface *surf)
if (dri2_surf-throttle_callback)
wl_callback_destroy(dri2_surf-throttle_callback);
- if (dri2_surf-base.Type == EGL_WINDOW_BIT) {
- dri2_surf-wl_win-private = NULL;
- dri2_surf-wl_win-resize_callback = NULL;
- }
+ dri2_surf-wl_win-private = NULL;
+ dri2_surf-wl_win-resize_callback = NULL;
free(surf);
@@ -428,9 +417,8 @@ update_buffers(struct dri2_egl_surface *dri2_surf)
dri2_egl_display(dri2_surf-base.Resource.Display);
int i;
- if (dri2_surf-base.Type == EGL_WINDOW_BIT
- (dri2_surf-base.Width != dri2_surf-wl_win-width ||
-dri2_surf-base.Height != dri2_surf-wl_win-height)) {
+ if (dri2_surf-base.Width != dri2_surf-wl_win-width ||
+ dri2_surf-base.Height != dri2_surf-wl_win-height) {
dri2_wl_release_buffers(dri2_surf);
--
2.3.7
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Re: [Mesa-dev] [PATCH] glsl/ast: don't implicit convert from double to float
This seems to be used in ast_function.cpp for implementing constructors
where this type of conversion can happen, so not a implicit conversion
but a 'conversion constructor'.
(5.4.1 Conversion and Scalar Constructors)
You would need to change that also.
On 05/06/2015 09:17 AM, Dave Airlie wrote:
From: Dave Airlie airl...@redhat.com
Implicit conversion can only happen the other way.
This fixes a bug I just saw from writing an incorrect test.
Signed-off-by: Dave Airlie airl...@redhat.com
---
src/glsl/ast_to_hir.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 14e6309..1c3780a 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -172,7 +172,6 @@ get_conversion_operation(const glsl_type *to, const
glsl_type *from,
switch (from-base_type) {
case GLSL_TYPE_INT: return ir_unop_i2f;
case GLSL_TYPE_UINT: return ir_unop_u2f;
- case GLSL_TYPE_DOUBLE: return ir_unop_d2f;
default: return (ir_expression_operation)0;
}
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Re: [Mesa-dev] [PATCH 2/9] mesa:Define constants and functions for GL_ARB_framebuffer_no_attachment extension
You haven't been running 'make check'. :) You also need to update
src/mesa/tests/dispatch_sanity.cpp.
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
Define the enumeration constants, function entry points and
glGet for the GL_ARB_framebuffer_no_attachments
---
.../glapi/gen/ARB_framebuffer_no_attachments.xml | 33 +++
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml | 4 ++-
src/mesa/main/fbobject.c | 12 +++
src/mesa/main/fbobject.h | 7
src/mesa/main/get.c| 3 ++
src/mesa/main/get_hash_params.py | 38
++
7 files changed, 97 insertions(+), 1 deletion(-)
create mode 100644 src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
diff --git a/src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
b/src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
new file mode 100644
index 000..5bde14d
--- /dev/null
+++ b/src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
@@ -0,0 +1,33 @@
+?xml version=1.0?
+!DOCTYPE OpenGLAPI SYSTEM gl_API.dtd
+
+OpenGLAPI
+
+category name=GL_ARB_framebuffer_no_attachments number=130
+
+enum name=FRAMEBUFFER_DEFAULT_WIDTH value=0x9310 /
+enum name=FRAMEBUFFER_DEFAULT_HEIGHT value=0x9311 /
+enum name=FRAMEBUFFER_DEFAULT_LAYERS value=0x9312 /
+enum name=FRAMEBUFFER_DEFAULT_SAMPLES value=0x9313 /
+enum name=FRAMEBUFFER_DEFAULT_FIXED_SAMPLE_LOCATIONS value=0x9314 /
+enum name=MAX_FRAMEBUFFER_WIDTH value=0x9315 /
+enum name=MAX_FRAMEBUFFER_HEIGHT value=0x9316 /
+enum name=MAX_FRAMEBUFFER_LAYERS value=0x9317 /
+enum name=MAX_FRAMEBUFFER_SAMPLES value=0x9318 /
+
+
+function name=FramebufferParameteri offset=assign
Since it looks like your patches will land before my ES3.1 patches, I'll
have to update these with es2=3.1. This is mostly to help me remember.
+param name=target type=GLenum /
+param name=pname type=GLenum /
+param name=param type=GLint /
+/function
+
+function name=GetFramebufferParameteriv offset=assign
+param name=target type=GLenum /
+param name=pname type=GLenum /
+param name=params type=GLint * output=true /
+/function
+
+/category
+
+/OpenGLAPI
diff --git a/src/mapi/glapi/gen/Makefile.am b/src/mapi/glapi/gen/Makefile.am
index 1c4b86a..dc61739 100644
--- a/src/mapi/glapi/gen/Makefile.am
+++ b/src/mapi/glapi/gen/Makefile.am
@@ -129,6 +129,7 @@ API_XML = \
ARB_draw_instanced.xml \
ARB_ES2_compatibility.xml \
ARB_ES3_compatibility.xml \
+ ARB_framebuffer_no_attachments.xml \
ARB_framebuffer_object.xml \
ARB_geometry_shader4.xml \
ARB_get_program_binary.xml \
diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index a8a6db6..91882ef 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8324,7 +8324,9 @@
!-- No new functions, types, enums. --
/category
-!-- ARB extensions #130..#131 --
+xi:include href=ARB_framebuffer_no_attachments.xml
xmlns:xi=http://www.w3.org/2001/XInclude/
+
+!-- ARB extensions #131 --
category name=GL_ARB_explicit_uniform_location number=128
enum name=MAX_UNIFORM_LOCATIONS count=1 value=0x826E
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index eabbb96..5c78c40 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -1292,6 +1292,18 @@ _mesa_BindRenderbufferEXT(GLenum target, GLuint
renderbuffer)
bind_renderbuffer(target, renderbuffer, true);
}
+extern void GLAPIENTRY
+_mesa_FramebufferParameteri(GLenum target, GLenum pname, GLint param)
+{
+ /* to be implemented */
+}
+
+extern void GLAPIENTRY
+_mesa_GetFramebufferParameteriv(GLenum target, GLenum pname, GLint *params)
+{
+ /* to be implemented */
+}
+
/**
* Remove the specified renderbuffer or texture from any attachment point in
diff --git a/src/mesa/main/fbobject.h b/src/mesa/main/fbobject.h
index 61aa1f5..76adb92 100644
--- a/src/mesa/main/fbobject.h
+++ b/src/mesa/main/fbobject.h
@@ -211,4 +211,11 @@ extern void GLAPIENTRY
_mesa_DiscardFramebufferEXT(GLenum target, GLsizei numAttachments,
const GLenum *attachments);
+
+extern void GLAPIENTRY
+_mesa_FramebufferParameteri(GLenum target, GLenum pname, GLint param);
+
+extern void GLAPIENTRY
+_mesa_GetFramebufferParameteriv(GLenum target, GLenum pname, GLint *params);
+
#endif /* FBOBJECT_H */
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index a881bc5..ca9d13c 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -393,6 +393,7 @@ EXTRA_EXT(INTEL_performance_query);
EXTRA_EXT(ARB_explicit_uniform_location);
EXTRA_EXT(ARB_clip_control);
EXTRA_EXT(EXT_polygon_offset_clamp);
+EXTRA_EXT(ARB_framebuffer_no_attachments);
Re: [Mesa-dev] [PATCH 1/9] mesa:Define extension GL_ARB_framebuffer_no_attachments
These patches are partitioned in a atypical way. The usual way is
- A patch that modifies extensions.c, struct gl_extensions, the XML
files (in patch #2), dispatch_sanity (see my comment on patch #2),
and adds the stub functions (in patch #2).
- A patch that adds the other necessary bits to the data structures
and code to initialize them to sensible default values.
- Several patches that add the rest of the device-independent parts
(patches 3 through 5... that looks fine).
- Several patches that add the device-dependent parts (the rest of the
series... that also looks fine).
This is mostly for future reference. I don't think it's worth
rearranging the series.
Additional comments below.
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
Define the infrastructure for the extension GL_ARB_framebuffer_no_attachments:
- extension table
- additions to gl_framebuffer
---
src/mesa/main/extensions.c | 1 +
src/mesa/main/fbobject.c| 1 +
src/mesa/main/framebuffer.c | 1 +
src/mesa/main/mtypes.h | 52
-
4 files changed, 50 insertions(+), 5 deletions(-)
diff --git a/src/mesa/main/extensions.c b/src/mesa/main/extensions.c
index 3d4965c..99c1b06 100644
--- a/src/mesa/main/extensions.c
+++ b/src/mesa/main/extensions.c
@@ -117,6 +117,7 @@ static const struct extension extension_table[] = {
{ GL_ARB_fragment_program,o(ARB_fragment_program),
GLL,2002 },
{ GL_ARB_fragment_program_shadow,
o(ARB_fragment_program_shadow), GLL,2003 },
{ GL_ARB_fragment_shader, o(ARB_fragment_shader),
GL, 2002 },
+ { GL_ARB_framebuffer_no_attachments,
o(ARB_framebuffer_no_attachments), GL, 2012 },
{ GL_ARB_framebuffer_object,
o(ARB_framebuffer_object), GL, 2005 },
{ GL_ARB_framebuffer_sRGB,o(EXT_framebuffer_sRGB),
GL, 1998 },
{ GL_ARB_get_program_binary, o(dummy_true),
GL, 2010 },
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 27cf97f..eabbb96 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -914,6 +914,7 @@ _mesa_test_framebuffer_completeness(struct gl_context
*ctx,
fb-Height = 0;
fb-_AllColorBuffersFixedPoint = GL_TRUE;
fb-_HasSNormOrFloatColorBuffer = GL_FALSE;
+ fb-_HasAttachments = GL_TRUE;
/* Start at -2 to more easily loop over all attachment points.
* -2: depth buffer
diff --git a/src/mesa/main/framebuffer.c b/src/mesa/main/framebuffer.c
index 4f7736a..4e4d896 100644
--- a/src/mesa/main/framebuffer.c
+++ b/src/mesa/main/framebuffer.c
@@ -157,6 +157,7 @@ _mesa_initialize_window_framebuffer(struct gl_framebuffer
*fb,
fb-_Status = GL_FRAMEBUFFER_COMPLETE_EXT;
fb-_AllColorBuffersFixedPoint = !visual-floatMode;
fb-_HasSNormOrFloatColorBuffer = visual-floatMode;
+ fb-_HasAttachments = GL_TRUE;
compute_depth_max(fb);
}
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index fb41430..ef97538 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3133,12 +3133,29 @@ struct gl_framebuffer
*/
struct gl_config Visual;
- GLuint Width, Height; /** size of frame buffer in pixels */
+ /**
+* size of frame buffer in pixels,
+* no attachments has these values as 0
+*/
+ GLuint Width, Height;
+
+ /**
+* In the case that the framebuffer has no attachment (i.e.
+* GL_ARB_framebuffer_no_attachments) then the geometry of
+* the framebuffer is specified by the default values.
+*/
+ struct {
+ GLuint Width, Height, Layers, NumSamples;
+ GLboolean FixedSampleLocations;
+ } DefaultGeometry;
- /** \name Drawing bounds (Intersection of buffer size and scissor box) */
+ /** \name Drawing bounds (Intersection of buffer size and scissor box)
+* The drawing region is given by [_Xmin, _Xmax) x [_Ymin, _Ymax),
+* (inclusive for _Xmin and _Ymin while exclusive for _Xmax and _Ymax)
+*/
/*@{*/
- GLint _Xmin, _Xmax; /** inclusive */
- GLint _Ymin, _Ymax; /** exclusive */
+ GLint _Xmin, _Xmax;
+ GLint _Ymin, _Ymax;
/*@}*/
/** \name Derived Z buffer stuff */
@@ -3151,6 +3168,20 @@ struct gl_framebuffer
/** One of the GL_FRAMEBUFFER_(IN)COMPLETE_* tokens */
GLenum _Status;
+ /** True if both of the conditions:
+* 1. one of Attachment has Type != GL_NONE
+* 2 _Status is GL_FRAMEBUFFER_COMPLETE_EXT
+* NOTE: the values for Width and Height are set to 0 in
+* case of no attachments, a backend driver supporting
+*
[Mesa-dev] [PATCH] mesa: support compute stage in _mesa_program_resource_prop
Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/shader_query.cpp | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/shader_query.cpp b/src/mesa/main/shader_query.cpp
index d2ca49b..6e46553 100644
--- a/src/mesa/main/shader_query.cpp
+++ b/src/mesa/main/shader_query.cpp
@@ -809,6 +809,8 @@ stage_from_enum(GLenum ref)
return MESA_SHADER_GEOMETRY;
case GL_REFERENCED_BY_FRAGMENT_SHADER:
return MESA_SHADER_FRAGMENT;
+ case GL_REFERENCED_BY_COMPUTE_SHADER:
+ return MESA_SHADER_COMPUTE;
default:
assert(!shader stage not supported);
return MESA_SHADER_STAGES;
@@ -824,6 +826,10 @@ is_resource_referenced(struct gl_shader_program *shProg,
struct gl_program_resource *res,
GLuint index, uint8_t stage)
{
+ /* First, check if we even have such a stage active. */
+ if (!shProg-_LinkedShaders[stage])
+ return false;
+
if (res-Type == GL_ATOMIC_COUNTER_BUFFER)
return RESOURCE_ATC(res)-StageReferences[stage];
@@ -979,6 +985,9 @@ _mesa_program_resource_prop(struct gl_shader_program
*shProg,
case GL_NUM_ACTIVE_VARIABLES:
case GL_ACTIVE_VARIABLES:
return get_buffer_property(shProg, res, prop, val, caller);
+ case GL_REFERENCED_BY_COMPUTE_SHADER:
+ if (!ctx-Extensions.ARB_compute_shader)
+ goto invalid_enum;
case GL_REFERENCED_BY_VERTEX_SHADER:
case GL_REFERENCED_BY_GEOMETRY_SHADER:
case GL_REFERENCED_BY_FRAGMENT_SHADER:
@@ -1015,17 +1024,18 @@ _mesa_program_resource_prop(struct gl_shader_program
*shProg,
case GL_IS_PER_PATCH:
case GL_REFERENCED_BY_TESS_CONTROL_SHADER:
case GL_REFERENCED_BY_TESS_EVALUATION_SHADER:
- /* GL_ARB_compute_shader */
- case GL_REFERENCED_BY_COMPUTE_SHADER:
default:
- _mesa_error(ctx, GL_INVALID_ENUM, %s(%s prop %s), caller,
- _mesa_lookup_enum_by_nr(res-Type),
- _mesa_lookup_enum_by_nr(prop));
- return 0;
+ goto invalid_enum;
}
#undef VALIDATE_TYPE
+invalid_enum:
+ _mesa_error(ctx, GL_INVALID_ENUM, %s(%s prop %s), caller,
+ _mesa_lookup_enum_by_nr(res-Type),
+ _mesa_lookup_enum_by_nr(prop));
+ return 0;
+
invalid_operation:
_mesa_error(ctx, GL_INVALID_OPERATION, %s(%s prop %s), caller,
_mesa_lookup_enum_by_nr(res-Type),
--
2.1.0
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Re: [Mesa-dev] [PATCH 3/9] mesa: Complete implementation for GL_ARB_framebuffer_no_attachments in Mesa core
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
Implement GL_ARB_framebuffer_no_attachments in Mesa core
- changes to conditions for framebuffer completenss
- implement set/get functions for framebuffers for
new functions in GL_ARB_framebuffer_no_attachments
---
src/mesa/main/fbobject.c | 154
---
1 file changed, 145 insertions(+), 9 deletions(-)
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c
index 5c78c40..402537b 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -1113,14 +1113,49 @@ _mesa_test_framebuffer_completeness(struct gl_context
*ctx,
} else if (att_layer_count max_layer_count) {
max_layer_count = att_layer_count;
}
+
+ /**
+ * The extension GL_ARB_framebuffer_no_attachments places the
additional
+ * requirement on each attachment that
+ *
+ * The width and height of image are greater than zero and less than
or
+ * equal to the values of the implementation-dependent limits
+ * MAX_FRAMEBUFFER_WIDTH and MAX_FRAMEBUFFER_HEIGHT, respectively.
+ *
+ * If image is a three-dimensional texture or a one- or
two-dimensional
+ * array texture and the attachment is layered, the depth or layer
count
+ * of the texture is less than or equal to the
implementation-dependent
+ * limit MAX_FRAMEBUFFER_LAYERS.
+ *
+ * If image has multiple samples, its sample count is less than or
equal
+ * to the value of the implementation-dependent limit
MAX_FRAMEBUFFER_-
+ * SAMPLES .
+ *
+ * The same requirements are also in place for GL 4.5,
+ * Section 9.4.1 Framebuffer Attachment Completeness, pg 310-311
+ *
+ * However, this is a tighter restriction than previous version of GL.
+ * In interest of better compatibility, we will not enforce these
+ * restrictions.
+ */
}
fb-MaxNumLayers = max_layer_count;
if (numImages == 0) {
- fb-_Status = GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT_EXT;
- fbo_incomplete(ctx, no attachments, -1);
- return;
+ fb-_HasAttachments = GL_FALSE;
+
+ if (!ctx-Extensions.ARB_framebuffer_no_attachments) {
+ fb-_Status = GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT_EXT;
+ fbo_incomplete(ctx, no attachments, -1);
+ return;
+ }
+
+ if (fb-DefaultGeometry.Width == 0 || fb-DefaultGeometry.Height == 0)
{
+ fb-_Status = GL_FRAMEBUFFER_INCOMPLETE_MISSING_ATTACHMENT_EXT;
+ fbo_incomplete(ctx, no attachments and default width or height is
0, -1);
+ return;
+ }
}
if (_mesa_is_desktop_gl(ctx) !ctx-Extensions.ARB_ES2_compatibility) {
@@ -1185,8 +1220,10 @@ _mesa_test_framebuffer_completeness(struct gl_context
*ctx,
* renderbuffers/textures are different sizes, the framebuffer
* width/height will be set to the smallest width/height.
*/
- fb-Width = minWidth;
- fb-Height = minHeight;
+ if (numImages != 0) {
+ fb-Width = minWidth;
+ fb-Height = minHeight;
+ }
/* finally, update the visual info for the framebuffer */
_mesa_update_framebuffer_visual(ctx, fb);
@@ -1292,16 +1329,115 @@ _mesa_BindRenderbufferEXT(GLenum target, GLuint
renderbuffer)
bind_renderbuffer(target, renderbuffer, true);
}
-extern void GLAPIENTRY
+static void
+framebuffer_parameteri(struct gl_context *ctx, struct gl_framebuffer *fb,
+ GLenum pname, GLint param, const char *func)
For both this and get_framebuffer_parameteriv below, I don't see the
value in splitting the implementations. Also, these functions need to
check that the extension is enabled and generate GL_INVALID_OPERATION if
it is not.
+{
+ switch (pname) {
+ case GL_FRAMEBUFFER_DEFAULT_WIDTH:
+ if (param 0 || param ctx-Const.MaxFramebufferWidth)
+_mesa_error(ctx, GL_INVALID_VALUE, %s, func);
It looks like your indention is off by one here and elsewhere in the switch.
+ else
+ fb-DefaultGeometry.Width = param;
+ break;
+ case GL_FRAMEBUFFER_DEFAULT_HEIGHT:
+ if (param 0 || param ctx-Const.MaxFramebufferHeight)
+_mesa_error(ctx, GL_INVALID_VALUE, %s, func);
+ else
+ fb-DefaultGeometry.Height = param;
+ break;
+ case GL_FRAMEBUFFER_DEFAULT_LAYERS:
+ if (param 0 || param ctx-Const.MaxFramebufferLayers)
+_mesa_error(ctx, GL_INVALID_VALUE, %s, func);
+ else
+ fb-DefaultGeometry.Layers = param;
+ break;
+ case GL_FRAMEBUFFER_DEFAULT_SAMPLES:
+ if (param 0 || param ctx-Const.MaxFramebufferSamples)
+_mesa_error(ctx, GL_INVALID_VALUE, %s, func);
+ else
+fb-DefaultGeometry.NumSamples =
[Mesa-dev] [PATCH] glsl: clone inputs and outputs during linking
This increases memory pressure during linking but makes it easier for backend to free IR after it is not needed anymore. Signed-off-by: Tapani Pälli tapani.pa...@intel.com --- src/glsl/linker.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp index 330fae0..961b4ac 100644 --- a/src/glsl/linker.cpp +++ b/src/glsl/linker.cpp @@ -2586,7 +2586,9 @@ add_interface_variables(struct gl_shader_program *shProg, continue; }; - if (!add_program_resource(shProg, programInterface, var, + /* Clone ir_variable data so that backend is able to free memory. */ + if (!add_program_resource(shProg, programInterface, +var-clone(shProg, NULL), build_stageref(shProg, var-name))) return false; } -- 2.1.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] program_interface_query: clone ir_variables
Hi; I've tested this + a modified version (where I just free all ir_instructions) of Kenneth's: i965: Delete most of the linked GLSL IR when using NIR No Piglit regressions observed. From here on plan would be to change ir_variable to a structure which will be hopefully more minimal and easier to serialize for shader cache purposes. Tapani Pälli (1): glsl: clone inputs and outputs during linking src/glsl/linker.cpp | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) -- 2.1.0 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/4] i965/gen6: Upload all the clip viewports
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/gen6_viewport_state.c | 40 +
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c
b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
index 0c63283..95d204f 100644
--- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
@@ -42,27 +42,29 @@ gen6_upload_clip_vp(struct brw_context *brw)
struct brw_clipper_viewport *vp;
vp = brw_state_batch(brw, AUB_TRACE_CLIP_VP_STATE,
- sizeof(*vp), 32, brw-clip.vp_offset);
+sizeof(*vp) * ctx-Const.MaxViewports, 32,
brw-clip.vp_offset);
- /* According to the Vertex X,Y Clamping and Quantization section of the
-* Strips and Fans documentation, objects must not have a screen-space
-* extents of over 8192 pixels, or they may be mis-rasterized. The maximum
-* screen space coordinates of a small object may larger, but we have no
-* way to enforce the object size other than through clipping.
-*
-* If you're surprised that we set clip to -gbx to +gbx and it seems like
-* we'll end up with 16384 wide, note that for a 8192-wide render target,
-* we'll end up with a normal (-1, 1) clip volume that just covers the
-* drawable.
-*/
- const float maximum_post_clamp_delta = 8192;
- float gbx = maximum_post_clamp_delta / ctx-ViewportArray[0].Width;
- float gby = maximum_post_clamp_delta / ctx-ViewportArray[0].Height;
+ for (unsigned i = 0; i ctx-Const.MaxViewports; i++) {
+ /* According to the Vertex X,Y Clamping and Quantization section of the
+ * Strips and Fans documentation, objects must not have a screen-space
+ * extents of over 8192 pixels, or they may be mis-rasterized. The
maximum
+ * screen space coordinates of a small object may larger, but we have no
+ * way to enforce the object size other than through clipping.
+ *
+ * If you're surprised that we set clip to -gbx to +gbx and it seems like
+ * we'll end up with 16384 wide, note that for a 8192-wide render target,
+ * we'll end up with a normal (-1, 1) clip volume that just covers the
+ * drawable.
+ */
+ const float maximum_post_clamp_delta = 8192;
+ float gbx = maximum_post_clamp_delta / ctx-ViewportArray[i].Width;
+ float gby = maximum_post_clamp_delta / ctx-ViewportArray[i].Height;
- vp-xmin = -gbx;
- vp-xmax = gbx;
- vp-ymin = -gby;
- vp-ymax = gby;
+ vp[i].xmin = -gbx;
+ vp[i].xmax = gbx;
+ vp[i].ymin = -gby;
+ vp[i].ymax = gby;
+ }
brw-ctx.NewDriverState |= BRW_NEW_CLIP_VP;
}
--
2.3.7
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[Mesa-dev] [PATCH 3/4] i965/gen6: Upload all the SF viewports
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_structs.h | 2 ++
src/mesa/drivers/dri/i965/gen6_viewport_state.c | 29 +++--
2 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h
b/src/mesa/drivers/dri/i965/brw_structs.h
index 7c97a95..55338c0 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -639,6 +639,8 @@ struct gen6_sf_viewport {
float m30;
float m31;
float m32;
+
+ unsigned pad0[2];
};
struct gen7_sf_clip_viewport {
diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c
b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
index 95d204f..2fb0182 100644
--- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c
@@ -81,14 +81,14 @@ static void
gen6_upload_sf_vp(struct brw_context *brw)
{
struct gl_context *ctx = brw-ctx;
- struct brw_sf_viewport *sfv;
+ struct gen6_sf_viewport *sfv;
GLfloat y_scale, y_bias;
- double scale[3], translate[3];
const bool render_to_fbo = _mesa_is_user_fbo(ctx-DrawBuffer);
sfv = brw_state_batch(brw, AUB_TRACE_SF_VP_STATE,
-sizeof(*sfv), 32, brw-sf.vp_offset);
- memset(sfv, 0, sizeof(*sfv));
+ sizeof(*sfv) * ctx-Const.MaxViewports,
+ 32, brw-sf.vp_offset);
+ memset(sfv, 0, sizeof(*sfv) * ctx-Const.MaxViewports);
/* _NEW_BUFFERS */
if (render_to_fbo) {
@@ -99,14 +99,19 @@ gen6_upload_sf_vp(struct brw_context *brw)
y_bias = ctx-DrawBuffer-Height;
}
- /* _NEW_VIEWPORT */
- _mesa_get_viewport_xform(ctx, 0, scale, translate);
- sfv-viewport.m00 = scale[0];
- sfv-viewport.m11 = scale[1] * y_scale;
- sfv-viewport.m22 = scale[2];
- sfv-viewport.m30 = translate[0];
- sfv-viewport.m31 = translate[1] * y_scale + y_bias;
- sfv-viewport.m32 = translate[2];
+ for (unsigned i = 0; i ctx-Const.MaxViewports; i++) {
+ double scale[3], translate[3];
+
+ /* _NEW_VIEWPORT */
+ _mesa_get_viewport_xform(ctx, i, scale, translate);
+ sfv[i].m00 = scale[0];
+ sfv[i].m11 = scale[1] * y_scale;
+ sfv[i].m22 = scale[2];
+ sfv[i].m30 = translate[0];
+ sfv[i].m31 = translate[1] * y_scale + y_bias;
+ sfv[i].m32 = translate[2];
+
+ }
brw-ctx.NewDriverState |= BRW_NEW_SF_VP;
}
--
2.3.7
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Re: [Mesa-dev] [PATCH] i965: Delete most of the linked GLSL IR when using NIR.
On 05/06/2015 08:38 AM, Jason Ekstrand wrote:
On May 5, 2015 10:17 PM, Tapani Pälli tapani.pa...@intel.com
mailto:tapani.pa...@intel.com wrote:
On 05/06/2015 04:57 AM, Kenneth Graunke wrote:
Vertex shader attribute and fragment shader output queries rely on being
able to inspect top-level ir_variable objects. So, we have to keep
those. However, functions and global temporary variables can be deleted
with impunity.
Saves 58MB of memory when replaying a Dota 2 trace on Broadwell.
Signed-off-by: Kenneth Graunke kenn...@whitecape.org
mailto:kenn...@whitecape.org
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 43
+++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index c1fd859..6e4abb2 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -138,6 +138,45 @@ brw_lower_packing_builtins(struct brw_context *brw,
lower_packing_builtins(ir, ops);
}
+static bool
+is_vert_input_or_frag_output(gl_shader_stage stage, ir_variable *var)
I believe you'll need to save any input and output independent of
shader stage as with GL_ARB_program_interface_query application can
query if some input or output is referenced by a given stage. Did you
encounter any failures on Piglit tests?
I've been working to get rid of ir_variable on the background but it
has taken a bit of time as there seems to be always something else to be
worked first 'priority wise' ... but I think this is a nice start
anyways to get rid of most IR in memory.
Do you have a branch somewhere with that work in it? I would be
interested in taking a look at it. I probably won't really work on it
but i would, at the very least, like to see where all the ir_variable's
end up getting tied in.
Sorry not, it's just a simple hack patch ATM where I try to preserve
only the ir_variable::data struct but I forgot that we really need a bit
more (like name, type ..) so things fall apart. My plan next is first to
introduce own structure where I keep adding fields as long as Piglit
tests pass. I could probably use nir_variable as it's more minimal than
ir_variable but that would be only for nir using drivers so I'm not sure
if proceeding there makes sense right now (?)
--Jason
+{
+ if (var) {
+ if (stage == MESA_SHADER_VERTEX) {
+ return var-data.mode == ir_var_shader_in ||
+var-data.mode == ir_var_system_value;
+ }
+
+ if (stage == MESA_SHADER_FRAGMENT) {
+ return var-data.mode == ir_var_shader_out;
+ }
+ }
+ return false;
+}
+
+/**
+ * Delete GLSL IR except for VS inputs and FS outputs.
+ *
+ * Once we've translated to NIR, we don't need most of the linked
GLSL IR anymore.
+ * However, GL API calls for introspecting certain shader
inputs/outputs
+ * (shader_query.cpp) require us to keep some top-level ir_variables.
+ */
+static void
+delete_most_glsl_ir(struct gl_shader *shader)
+{
+ void *mem_ctx = ralloc_context(NULL);
+ ralloc_adopt(mem_ctx, shader-ir);
+
+ foreach_in_list_safe(ir_instruction, ir, shader-ir) {
+ if (!is_vert_input_or_frag_output(shader-Stage,
ir-as_variable()))
+ ir-remove();
+ }
+
+ reparent_ir(shader-ir, shader-ir);
+ ralloc_free(mem_ctx);
+}
+
+
static void
process_glsl_ir(struct brw_context *brw,
struct gl_shader_program *shader_prog,
@@ -297,8 +336,10 @@ brw_link_shader(struct gl_context *ctx, struct
gl_shader_program *shProg)
brw_add_texrect_params(prog);
- if (options-NirOptions)
+ if (options-NirOptions) {
prog-nir = brw_create_nir(brw, shProg, prog,
(gl_shader_stage) stage);
+ delete_most_glsl_ir(shader);
+ }
_mesa_reference_program(ctx, prog, NULL);
}
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[Mesa-dev] [PATCH 1/4] i965/gen6: setup limits for ARB_viewport_array
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/brw_context.c | 4 ++--
src/mesa/drivers/dri/i965/brw_defines.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 6c00f6c..fd7420a 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -598,8 +598,8 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx-Const.ShaderCompilerOptions[MESA_SHADER_COMPUTE].NirOptions =
nir_options;
/* ARB_viewport_array */
- if (brw-gen = 7 ctx-API == API_OPENGL_CORE) {
- ctx-Const.MaxViewports = GEN7_NUM_VIEWPORTS;
+ if (brw-gen = 6 ctx-API == API_OPENGL_CORE) {
+ ctx-Const.MaxViewports = GEN6_NUM_VIEWPORTS;
ctx-Const.ViewportSubpixelBits = 0;
/* Cast to float before negating because MaxViewportWidth is unsigned.
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
b/src/mesa/drivers/dri/i965/brw_defines.h
index 7b5dd45..83d7a35 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -1712,7 +1712,7 @@ enum brw_message_target {
# define GEN6_CC_VIEWPORT_MODIFY (1 12)
# define GEN6_SF_VIEWPORT_MODIFY (1 11)
# define GEN6_CLIP_VIEWPORT_MODIFY (1 10)
-# define GEN7_NUM_VIEWPORTS16
+# define GEN6_NUM_VIEWPORTS16
#define _3DSTATE_VIEWPORT_STATE_POINTERS_CC0x7823 /* GEN7+ */
#define _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL 0x7821 /* GEN7+ */
--
2.3.7
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[Mesa-dev] [PATCH 4/4] i965/gen6: Enable ARB_viewport_array and AMD_vertex_shader_viewport_index
Signed-off-by: Chris Forbes chr...@ijw.co.nz
---
src/mesa/drivers/dri/i965/intel_extensions.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index c28c171..3088a1a 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -292,6 +292,14 @@ intelInitExtensions(struct gl_context *ctx)
/* Test if the kernel has the ioctl. */
if (drm_intel_reg_read(brw-bufmgr, TIMESTAMP, dummy) == 0)
ctx-Extensions.ARB_timer_query = true;
+
+ /* Only enable this in core profile because other parts of Mesa behave
+ * slightly differently when the extension is enabled.
+ */
+ if (ctx-API == API_OPENGL_CORE) {
+ ctx-Extensions.ARB_viewport_array = true;
+ ctx-Extensions.AMD_vertex_shader_viewport_index = true;
+ }
}
if (brw-gen = 5) {
@@ -313,14 +321,6 @@ intelInitExtensions(struct gl_context *ctx)
ctx-Extensions.ARB_draw_indirect = true;
}
- /* Only enable this in core profile because other parts of Mesa behave
- * slightly differently when the extension is enabled.
- */
- if (ctx-API == API_OPENGL_CORE) {
- ctx-Extensions.ARB_viewport_array = true;
- ctx-Extensions.AMD_vertex_shader_viewport_index = true;
- }
-
ctx-Extensions.ARB_texture_compression_bptc = true;
ctx-Extensions.ARB_derivative_control = true;
}
--
2.3.7
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Re: [Mesa-dev] [PATCH 8/9] i965: enable ARB_framebuffer_no_attachments extension for Gen7 and later
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
Enable GL_ARB_framebuffer_no_attachments in i965 for Gen7 and higher.
---
src/mesa/drivers/dri/i965/brw_context.c | 6 ++
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
2 files changed, 7 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 9d90360..5c9577f 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -608,6 +608,12 @@ brw_initialize_context_constants(struct brw_context *brw)
/* ARB_gpu_shader5 */
if (brw-gen = 7)
ctx-Const.MaxVertexStreams = MIN2(4, MAX_VERTEX_STREAMS);
+
+ /* ARB_framebuffer_no_attachments */
+ ctx-Const.MaxFramebufferWidth = ctx-Const.MaxViewportWidth;
+ ctx-Const.MaxFramebufferHeight = ctx-Const.MaxViewportHeight;
+ ctx-Const.MaxFramebufferLayers = ctx-Const.MaxArrayTextureLayers;
+ ctx-Const.MaxFramebufferSamples = max_samples;
}
/**
diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c
b/src/mesa/drivers/dri/i965/intel_extensions.c
index 48064e1..65cf2bb 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -304,6 +304,7 @@ intelInitExtensions(struct gl_context *ctx)
if (brw-gen = 7) {
ctx-Extensions.ARB_conservative_depth = true;
ctx-Extensions.ARB_texture_view = true;
+ ctx-Extensions.ARB_framebuffer_no_attachments = true;
Alphabetize.
With that fixed, this patch is
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
if (can_do_pipelined_register_writes(brw)) {
ctx-Extensions.ARB_transform_feedback2 = true;
ctx-Extensions.ARB_transform_feedback3 = true;
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Re: [Mesa-dev] [PATCH 9/9] mark GL_ARB_framebuffer_no_attachments as done for i965
With Petri and Ilia's comments addressed, this patch is Reviewed-by: Ian Romanick ian.d.roman...@intel.com On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote: From: Kevin Rogovin kevin.rogo...@intel.com Mark GL_ARB_framebuffer_no_attachments as done for i965. --- docs/GL3.txt | 2 +- docs/relnotes/10.6.0.html | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/GL3.txt b/docs/GL3.txt index 172fd3c..cf3b5a2 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -157,7 +157,7 @@ GL 4.3, GLSL 4.30: GL_KHR_debug DONE (all drivers) GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) GL_ARB_fragment_layer_viewport DONE (nv50, nvc0, r600, llvmpipe) - GL_ARB_framebuffer_no_attachmentsnot started + GL_ARB_framebuffer_no_attachmentsDONE (i965) GL_ARB_internalformat_query2 not started GL_ARB_invalidate_subdataDONE (all drivers) GL_ARB_multi_draw_indirect DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe) diff --git a/docs/relnotes/10.6.0.html b/docs/relnotes/10.6.0.html index 48f76f9..3919d19 100644 --- a/docs/relnotes/10.6.0.html +++ b/docs/relnotes/10.6.0.html @@ -55,6 +55,7 @@ Note: some of the new features are only available with certain drivers. liGL_ARB_clip_control on i965/li liGL_ARB_program_interface_query (all drivers)/li liGL_ARB_texture_stencil8 on nv50, nvc0, r600, radeonsi, softpipe/li +liGL_ARB_framebuffer_no_attachments on i965/li /ul h2Bug fixes/h2 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa: support compute stage in _mesa_program_resource_prop
Looks good.
Reviewed-by: Martin Peres martin.pe...@linux.intel.com
On 06/05/15 09:36, Tapani Pälli wrote:
Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/shader_query.cpp | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/shader_query.cpp b/src/mesa/main/shader_query.cpp
index d2ca49b..6e46553 100644
--- a/src/mesa/main/shader_query.cpp
+++ b/src/mesa/main/shader_query.cpp
@@ -809,6 +809,8 @@ stage_from_enum(GLenum ref)
return MESA_SHADER_GEOMETRY;
case GL_REFERENCED_BY_FRAGMENT_SHADER:
return MESA_SHADER_FRAGMENT;
+ case GL_REFERENCED_BY_COMPUTE_SHADER:
+ return MESA_SHADER_COMPUTE;
default:
assert(!shader stage not supported);
return MESA_SHADER_STAGES;
@@ -824,6 +826,10 @@ is_resource_referenced(struct gl_shader_program *shProg,
struct gl_program_resource *res,
GLuint index, uint8_t stage)
{
+ /* First, check if we even have such a stage active. */
+ if (!shProg-_LinkedShaders[stage])
+ return false;
+
if (res-Type == GL_ATOMIC_COUNTER_BUFFER)
return RESOURCE_ATC(res)-StageReferences[stage];
@@ -979,6 +985,9 @@ _mesa_program_resource_prop(struct gl_shader_program *shProg,
case GL_NUM_ACTIVE_VARIABLES:
case GL_ACTIVE_VARIABLES:
return get_buffer_property(shProg, res, prop, val, caller);
+ case GL_REFERENCED_BY_COMPUTE_SHADER:
+ if (!ctx-Extensions.ARB_compute_shader)
+ goto invalid_enum;
case GL_REFERENCED_BY_VERTEX_SHADER:
case GL_REFERENCED_BY_GEOMETRY_SHADER:
case GL_REFERENCED_BY_FRAGMENT_SHADER:
@@ -1015,17 +1024,18 @@ _mesa_program_resource_prop(struct gl_shader_program
*shProg,
case GL_IS_PER_PATCH:
case GL_REFERENCED_BY_TESS_CONTROL_SHADER:
case GL_REFERENCED_BY_TESS_EVALUATION_SHADER:
- /* GL_ARB_compute_shader */
- case GL_REFERENCED_BY_COMPUTE_SHADER:
default:
- _mesa_error(ctx, GL_INVALID_ENUM, %s(%s prop %s), caller,
- _mesa_lookup_enum_by_nr(res-Type),
- _mesa_lookup_enum_by_nr(prop));
- return 0;
+ goto invalid_enum;
}
#undef VALIDATE_TYPE
+invalid_enum:
+ _mesa_error(ctx, GL_INVALID_ENUM, %s(%s prop %s), caller,
+ _mesa_lookup_enum_by_nr(res-Type),
+ _mesa_lookup_enum_by_nr(prop));
+ return 0;
+
invalid_operation:
_mesa_error(ctx, GL_INVALID_OPERATION, %s(%s prop %s), caller,
_mesa_lookup_enum_by_nr(res-Type),
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Re: [Mesa-dev] [PATCH 3/9] mesa: Complete implementation for GL_ARB_framebuffer_no_attachments in Mesa core
HI,
For both this and get_framebuffer_parameteriv below, I don't see the value in
splitting the implementations. Also, these functions need to check that the
extension is enabled and generate GL_INVALID_OPERATION if it is not.
No worries, I can add the GL_INVALID_OPERATION bit in. I have a question:
these functions (with the patch) are only called from the _mesa_ functions,
which are what gl functions are. If the extension is not on, does
glxGetProcAddress/eglGetProcAccress able to return these functions? I ask
because I thought that if the extension was missing, then the functions cannot
be called by the application.
By split do you mean that the GL API function calls the static function? I put
this split in so that when the DSA functions are made, they can call the static
functions. Would you like me to kill that split still?
+{
+ switch (pname) {
+ case GL_FRAMEBUFFER_DEFAULT_WIDTH:
+ if (param 0 || param ctx-Const.MaxFramebufferWidth)
+_mesa_error(ctx, GL_INVALID_VALUE, %s, func);
It looks like your indention is off by one here and elsewhere in the switch.
Icks. Sorry about that.
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Re: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for fetching geometry of gl_framebuffer
I'm waffling about this a bit. I'm concerned that people will use
buffer-Width when they should use the accessor. I don't see any
changes to core Mesa code to use the accessor, so I'm a little concerned that
some subtle, incorrect behavior is introduced... but there may well not be.
A common idiom in Mesa is to have an _Value field that is the derived value.
In many structures in mtypes.h you can see things like Enabled and
_ReallyEnabled. One is what the API sets, and the other is what the driver
uses that is based on the API setting and other factors. In many ways, the
existing gl_framebuffer Width and Height fields are already derived values
based on the sizes of the attachments.
For at least Width, Height, and MaxNumLayers, it seems better to set the
existing fields differently when _HasAttachments is true. That reduces the
number of places where a person has to think about _HasAttachments
considerably... though perhaps there is something else that I'm not thinking
of?
I was thinking of doing this when I was making the patch. The problem is that
Width, Height and MaxNumLayers were used for two different purposes:
1. Specifying the intersection of the attached buffers (this affects blitting
for example)
2. Specifying the geometry to send to a rasterizer
Changing Width and Height to be the geometry made me itch because Width and
Height are zero when there are no buffer attachments. I added a mess of
comments about the meaning of Width and Height. My concern is that other parts
of code use Width and Height being 0 to do other things. With this patch way,
the meaning of Width and Height has not changed; instead a diver has to know
what it is doing when it enables the extension.
I am not particular about this though; I made it this way in an attempt to
reduce the scope of changes from this patch series. If people want that the
meaning of Width, Height and MaxSamplers changes I can go with that too, I just
think it can increase the ickiness of making sure no unintended side effects
are added is ickier.
If we go that route, we should probably just add a gl_framebuffer::Samples
field for uniformity.
+
+
+static inline GLuint
+_mesa_geometric_height(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-Height : buffer-DefaultGeometry.Height; }
+
+static inline GLuint
+_mesa_geometric_samples(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-Visual.samples : buffer-DefaultGeometry.NumSamples;
+}
+
+static inline GLuint
+_mesa_geometric_layers(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-MaxNumLayers : buffer-DefaultGeometry.Layers; }
+
extern void
_mesa_update_draw_buffer_bounds(struct gl_context *ctx);
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index
ef97538..f0e8fbc 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3178,7 +3178,13 @@ struct gl_framebuffer
* the values in DefaultGeometry to initialize its
* viewport, scissor and so on (in particular _Xmin,
* _Xmax, _Ymin and _Ymax do NOT take into account
-* _HasAttachments being false)
+* _HasAttachments being false). To get the geometry
+* of the framebuffer, the helper functions
+* _mesa_geometric_width(),
+* _mesa_geometric_height(),
+* _mesa_geometric_samples(),
+* _mesa_geometric_layers()
+* are available that check _HasAttachments.
*/
GLboolean _HasAttachments;
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Re: [Mesa-dev] [PATCH 2/9] mesa:Define constants and functions for GL_ARB_framebuffer_no_attachment extension
You haven't been running 'make check'. :) You also need to update
src/mesa/tests/dispatch_sanity.cpp.
There is something wrong with my box or something... I did run make check and
there were no failures. Out of paranoia, I also ran
src/mesa/main/tests/main-test explicitly and there were no failures there
either. When I look at src/mesa/tests/dispatch_sanity.cpp, the functions for
ARB_framebuffer_no_attachments in the table are commented out. When I remove
the comments from them, then the test fails (DispatchSanity_test.GL31_CORE).
What am I missing? I am utterly confused now about
src/mesa/tests/dispatch_sanity.cpp.
-Kevin
On 04/29/2015 01:56 AM, kevin.rogo...@intel.com wrote:
From: Kevin Rogovin kevin.rogo...@intel.com
Define the enumeration constants, function entry points and glGet for
the GL_ARB_framebuffer_no_attachments
---
.../glapi/gen/ARB_framebuffer_no_attachments.xml | 33 +++
src/mapi/glapi/gen/Makefile.am | 1 +
src/mapi/glapi/gen/gl_API.xml | 4 ++-
src/mesa/main/fbobject.c | 12 +++
src/mesa/main/fbobject.h | 7
src/mesa/main/get.c| 3 ++
src/mesa/main/get_hash_params.py | 38
++
7 files changed, 97 insertions(+), 1 deletion(-) create mode 100644
src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
diff --git a/src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
b/src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
new file mode 100644
index 000..5bde14d
--- /dev/null
+++ b/src/mapi/glapi/gen/ARB_framebuffer_no_attachments.xml
@@ -0,0 +1,33 @@
+?xml version=1.0?
+!DOCTYPE OpenGLAPI SYSTEM gl_API.dtd
+
+OpenGLAPI
+
+category name=GL_ARB_framebuffer_no_attachments number=130
+
+enum name=FRAMEBUFFER_DEFAULT_WIDTH value=0x9310 / enum
+name=FRAMEBUFFER_DEFAULT_HEIGHT value=0x9311 / enum
+name=FRAMEBUFFER_DEFAULT_LAYERS value=0x9312 / enum
+name=FRAMEBUFFER_DEFAULT_SAMPLES value=0x9313 / enum
+name=FRAMEBUFFER_DEFAULT_FIXED_SAMPLE_LOCATIONS value=0x9314 /
+enum name=MAX_FRAMEBUFFER_WIDTH value=0x9315 / enum
+name=MAX_FRAMEBUFFER_HEIGHT value=0x9316 / enum
+name=MAX_FRAMEBUFFER_LAYERS value=0x9317 / enum
+name=MAX_FRAMEBUFFER_SAMPLES value=0x9318 /
+
+
+function name=FramebufferParameteri offset=assign
Since it looks like your patches will land before my ES3.1 patches, I'll have
to update these with es2=3.1. This is mostly to help me remember.
+param name=target type=GLenum /
+param name=pname type=GLenum /
+param name=param type=GLint / /function
+
+function name=GetFramebufferParameteriv offset=assign
+param name=target type=GLenum /
+param name=pname type=GLenum /
+param name=params type=GLint * output=true / /function
+
+/category
+
+/OpenGLAPI
diff --git a/src/mapi/glapi/gen/Makefile.am
b/src/mapi/glapi/gen/Makefile.am index 1c4b86a..dc61739 100644
--- a/src/mapi/glapi/gen/Makefile.am
+++ b/src/mapi/glapi/gen/Makefile.am
@@ -129,6 +129,7 @@ API_XML = \
ARB_draw_instanced.xml \
ARB_ES2_compatibility.xml \
ARB_ES3_compatibility.xml \
+ ARB_framebuffer_no_attachments.xml \
ARB_framebuffer_object.xml \
ARB_geometry_shader4.xml \
ARB_get_program_binary.xml \
diff --git a/src/mapi/glapi/gen/gl_API.xml
b/src/mapi/glapi/gen/gl_API.xml index a8a6db6..91882ef 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -8324,7 +8324,9 @@
!-- No new functions, types, enums. -- /category
-!-- ARB extensions #130..#131 --
+xi:include href=ARB_framebuffer_no_attachments.xml
+xmlns:xi=http://www.w3.org/2001/XInclude/
+
+!-- ARB extensions #131 --
category name=GL_ARB_explicit_uniform_location number=128
enum name=MAX_UNIFORM_LOCATIONS count=1 value=0x826E
diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index
eabbb96..5c78c40 100644
--- a/src/mesa/main/fbobject.c
+++ b/src/mesa/main/fbobject.c
@@ -1292,6 +1292,18 @@ _mesa_BindRenderbufferEXT(GLenum target, GLuint
renderbuffer)
bind_renderbuffer(target, renderbuffer, true); }
+extern void GLAPIENTRY
+_mesa_FramebufferParameteri(GLenum target, GLenum pname, GLint param)
+{
+ /* to be implemented */
+}
+
+extern void GLAPIENTRY
+_mesa_GetFramebufferParameteriv(GLenum target, GLenum pname, GLint
+*params) {
+ /* to be implemented */
+}
+
/**
* Remove the specified renderbuffer or texture from any attachment
point in diff --git a/src/mesa/main/fbobject.h
b/src/mesa/main/fbobject.h index 61aa1f5..76adb92 100644
--- a/src/mesa/main/fbobject.h
+++ b/src/mesa/main/fbobject.h
@@ -211,4 +211,11 @@ extern void GLAPIENTRY
_mesa_DiscardFramebufferEXT(GLenum target, GLsizei numAttachments,
const GLenum *attachments);
+
+extern void GLAPIENTRY
[Mesa-dev] [PATCH] mesa/es3.1: enable DRAW_INDIRECT_BUFFER_BINDING for gles3.1
(increases ES31-CTS.draw_indirect.basic.* passing tests)
v2: only expose DRAW_INDIRECT_BUFFER_BINDING for GL core + ES3.1
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/get.c | 12
src/mesa/main/get_hash_params.py | 8 ++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index a881bc5..9898197 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -138,6 +138,7 @@ enum value_extra {
EXTRA_API_GL_CORE,
EXTRA_API_ES2,
EXTRA_API_ES3,
+ EXTRA_API_ES31,
EXTRA_NEW_BUFFERS,
EXTRA_NEW_FRAG_CLAMP,
EXTRA_VALID_DRAW_BUFFER,
@@ -348,6 +349,12 @@ static const int
extra_ARB_shader_image_load_store_and_geometry_shader[] = {
EXTRA_END
};
+static const int extra_ARB_draw_indirect_es31[] = {
+ EXT(ARB_draw_indirect),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
@@ -1078,6 +1085,11 @@ check_extra(struct gl_context *ctx, const char *func,
const struct value_desc *d
if (_mesa_is_gles3(ctx))
api_found = GL_TRUE;
break;
+ case EXTRA_API_ES31:
+ api_check = GL_TRUE;
+ if (_mesa_is_gles31(ctx))
+api_found = GL_TRUE;
+break;
case EXTRA_API_GL:
api_check = GL_TRUE;
if (_mesa_is_desktop_gl(ctx))
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 41cb2c1..513d5d2 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -409,6 +409,12 @@ descriptor=[
[ SAMPLER_BINDING, LOC_CUSTOM, TYPE_INT, GL_SAMPLER_BINDING, NO_EXTRA ],
]},
+# Enums in OpenGL Core profile and ES 3.1
+{ apis: [GL_CORE, GLES3], params: [
+# GL_ARB_draw_indirect / GLES 3.1
+ [ DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
extra_ARB_draw_indirect_es31 ],
+]},
+
# Remaining enums are only in OpenGL
{ apis: [GL, GL_CORE], params: [
[ ACCUM_RED_BITS, BUFFER_INT(Visual.accumRedBits), NO_EXTRA ],
@@ -804,8 +810,6 @@ descriptor=[
{ apis: [GL_CORE], params: [
# GL_ARB_texture_buffer_range
[ TEXTURE_BUFFER_OFFSET_ALIGNMENT,
CONTEXT_INT(Const.TextureBufferOffsetAlignment),
extra_ARB_texture_buffer_range ],
-# GL_ARB_draw_indirect
- [ DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
extra_ARB_draw_indirect ],
# GL_ARB_viewport_array
[ MAX_VIEWPORTS, CONTEXT_INT(Const.MaxViewports),
extra_ARB_viewport_array ],
--
2.1.0
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[Mesa-dev] [PATCH 2/2] glx: provide a way to disable DRI3 using an environment variable
This provides an easy way to test differences in rendering performance
or conformance between DRI2 and DRI3.
Signed-off-by: Martin Peres martin.pe...@linux.intel.com
---
docs/envvars.html | 1 +
src/glx/dri3_glx.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/docs/envvars.html b/docs/envvars.html
index 31d14a4..73d8919 100644
--- a/docs/envvars.html
+++ b/docs/envvars.html
@@ -115,6 +115,7 @@ See the a href=xlibdriver.htmlXlib software driver
page/a for details.
liMESA_GLX_FORCE_ALPHA - if set, forces RGB windows to have an alpha channel.
liMESA_GLX_DEPTH_BITS - specifies default number of bits for depth buffer.
liMESA_GLX_ALPHA_BITS - specifies default number of bits for alpha channel.
+liMESA_GLX_DRI3_DISABLE - disables DRI3 support.
/ul
diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c
index ff77a91..5246737 100644
--- a/src/glx/dri3_glx.c
+++ b/src/glx/dri3_glx.c
@@ -2092,6 +2092,11 @@ dri3_create_display(Display * dpy)
xcb_generic_error_t *error;
const xcb_query_extension_reply_t*extension;
+ if (getenv(MESA_GLX_DRI3_DISABLE)) {
+ ErrorMessageF(DRI3 disabled by the environment\n);
+ return NULL;
+ }
+
xcb_prefetch_extension_data(c, xcb_dri3_id);
xcb_prefetch_extension_data(c, xcb_present_id);
--
2.3.7
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[Mesa-dev] [PATCH 1/2] glx: report which DRI version is used when in verbose debug mode
This should make it more obvious in bug reports while also removing any sort of guesswork for developers. Signed-off-by: Martin Peres martin.pe...@linux.intel.com --- src/glx/dri2_glx.c | 2 ++ src/glx/dri3_glx.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c index 462d560..538cf1a 100644 --- a/src/glx/dri2_glx.c +++ b/src/glx/dri2_glx.c @@ -1310,6 +1310,8 @@ dri2CreateScreen(int screen, struct glx_display * priv) if (psc-show_fps_interval 0) psc-show_fps_interval = 0; + InfoMessageF(Using DRI2 for screen %d\n, screen); + return psc-base; handle_error: diff --git a/src/glx/dri3_glx.c b/src/glx/dri3_glx.c index 1ddc723..ff77a91 100644 --- a/src/glx/dri3_glx.c +++ b/src/glx/dri3_glx.c @@ -2036,6 +2036,8 @@ dri3_create_screen(int screen, struct glx_display * priv) if (psc-show_fps_interval 0) psc-show_fps_interval = 0; + InfoMessageF(Using DRI3 for screen %d\n, screen); + return psc-base; handle_error: -- 2.3.7 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 7/9] i965: ensure execution of fragment shader when fragment shader has atomic buffer access
Hi,
I think this check should be put in a utility function up in core Mesa
somewhere. It's open-coded twice in this patch, and the check will change
when GL_ARB_image_load_store lands.
Would a check of the form:
inline bool
_mesa_has_atomic_ops(struct gl_context *ctx)
{
return ctx- Shader._CurrentFragmentProgram != NULL
ctx-Shader._CurrentFragmentProgram-NumAtomicBuffers 0;
}
be good?
I am hesitant to make a check that just tests for side effects since for some
hardware (like Gen8 for example) there is not just a simple single flag to say
must execute frag shader, instead there are several such flags that force to
run fragment shader, but the flags by themselves take on other meanings; there
was some discussion on flag things in the first posting of this patch with
Curro and Kenneth.
-Kevin
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Re: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for fetching geometry of gl_framebuffer
Sorry, one more question, which I should have asked before, but neglected to:
If we go that route, we should probably just add a gl_framebuffer::Samples
field for uniformity.
If this is done, then there are two ways to get the value: from the Visual
field and from the new field; Naturally, all drivers now use the field from
Visual. If gl_framebuffer::Samples or potentially a better named
gl_framebuffer::_Samples is added, then should the field be removed from Visual
and all references in drivers to use the new field?
-Kevin
-Original Message-
From: Rogovin, Kevin
Sent: Wednesday, May 06, 2015 1:00 PM
To: 'Ian Romanick'; 'mesa-...@freedesktop.org'
Subject: RE: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for
fetching geometry of gl_framebuffer
One more question:
for patch 2 of the series, there was the request to change the type of
_HasAttachments from GLboolean to bool. If the helper functions survive,
should the helper functions return unsigned int instead of GLuint?
-Kevin
-Original Message-
From: Rogovin, Kevin
Sent: Wednesday, May 06, 2015 10:28 AM
To: 'Ian Romanick'; mesa-...@freedesktop.org
Subject: RE: [Mesa-dev] [PATCH 4/9] mesa: add helper convenience functions for
fetching geometry of gl_framebuffer
I'm waffling about this a bit. I'm concerned that people will use
buffer-Width when they should use the accessor. I don't see any
changes to core Mesa code to use the accessor, so I'm a little concerned that
some subtle, incorrect behavior is introduced... but there may well not be.
A common idiom in Mesa is to have an _Value field that is the derived value.
In many structures in mtypes.h you can see things like Enabled and
_ReallyEnabled. One is what the API sets, and the other is what the driver
uses that is based on the API setting and other factors. In many ways, the
existing gl_framebuffer Width and Height fields are already derived values
based on the sizes of the attachments.
For at least Width, Height, and MaxNumLayers, it seems better to set the
existing fields differently when _HasAttachments is true. That reduces the
number of places where a person has to think about _HasAttachments
considerably... though perhaps there is something else that I'm not thinking
of?
I was thinking of doing this when I was making the patch. The problem is that
Width, Height and MaxNumLayers were used for two different purposes:
1. Specifying the intersection of the attached buffers (this affects blitting
for example) 2. Specifying the geometry to send to a rasterizer
Changing Width and Height to be the geometry made me itch because Width and
Height are zero when there are no buffer attachments. I added a mess of
comments about the meaning of Width and Height. My concern is that other parts
of code use Width and Height being 0 to do other things. With this patch way,
the meaning of Width and Height has not changed; instead a diver has to know
what it is doing when it enables the extension.
I am not particular about this though; I made it this way in an attempt to
reduce the scope of changes from this patch series. If people want that the
meaning of Width, Height and MaxSamplers changes I can go with that too, I just
think it can increase the ickiness of making sure no unintended side effects
are added is ickier.
If we go that route, we should probably just add a gl_framebuffer::Samples
field for uniformity.
+
+
+static inline GLuint
+_mesa_geometric_height(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-Height : buffer-DefaultGeometry.Height; }
+
+static inline GLuint
+_mesa_geometric_samples(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-Visual.samples : buffer-DefaultGeometry.NumSamples;
+}
+
+static inline GLuint
+_mesa_geometric_layers(const struct gl_framebuffer *buffer) {
+ return buffer-_HasAttachments ?
+ buffer-MaxNumLayers : buffer-DefaultGeometry.Layers; }
+
extern void
_mesa_update_draw_buffer_bounds(struct gl_context *ctx);
diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index
ef97538..f0e8fbc 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -3178,7 +3178,13 @@ struct gl_framebuffer
* the values in DefaultGeometry to initialize its
* viewport, scissor and so on (in particular _Xmin,
* _Xmax, _Ymin and _Ymax do NOT take into account
-* _HasAttachments being false)
+* _HasAttachments being false). To get the geometry
+* of the framebuffer, the helper functions
+* _mesa_geometric_width(),
+* _mesa_geometric_height(),
+* _mesa_geometric_samples(),
+* _mesa_geometric_layers()
+* are available that check _HasAttachments.
*/
GLboolean _HasAttachments;
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 --- Comment #12 from cgerlac...@gmail.com --- Created attachment 115590 -- https://bugs.freedesktop.org/attachment.cgi?id=115590action=edit triangles get completely clipped on viewport - 2 -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 --- Comment #11 from cgerlac...@gmail.com --- Created attachment 115589 -- https://bugs.freedesktop.org/attachment.cgi?id=115589action=edit triangles get completely clipped on viewport - 1 -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [v2 02/12] Revert i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface().
This reverts commit 6f26ffaf66affb6563e548646fb6d6a049fe6bff.
---
src/mesa/drivers/dri/i965/brw_context.h | 11 --
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 127 +-
2 files changed, 54 insertions(+), 84 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 2fcdcfa..5c92071 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -992,17 +992,6 @@ struct brw_context
bool layered, unsigned unit,
uint32_t surf_index);
- void (*emit_texture_surface_state)(struct brw_context *brw,
- struct intel_mipmap_tree *mt,
- GLenum target,
- unsigned min_layer,
- unsigned max_layer,
- unsigned min_level,
- unsigned max_level,
- unsigned format,
- unsigned swizzle,
- uint32_t *surf_offset,
- bool rw, bool for_gather);
void (*emit_buffer_surface_state)(struct brw_context *brw,
uint32_t *out_offset,
drm_intel_bo *bo,
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 15ab2b0..1527d12 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -264,28 +264,40 @@ gen7_emit_buffer_surface_state(struct brw_context *brw,
}
static void
-gen7_emit_texture_surface_state(struct brw_context *brw,
-struct intel_mipmap_tree *mt,
-GLenum target,
-unsigned min_layer, unsigned max_layer,
-unsigned min_level, unsigned max_level,
-unsigned format,
-unsigned swizzle,
-uint32_t *surf_offset,
-bool rw, bool for_gather)
+gen7_update_texture_surface(struct gl_context *ctx,
+unsigned unit,
+uint32_t *surf_offset,
+bool for_gather)
{
- const unsigned depth = max_layer - min_layer;
+ struct brw_context *brw = brw_context(ctx);
+ struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
+ struct intel_texture_object *intelObj = intel_texture_object(tObj);
+ struct intel_mipmap_tree *mt = intelObj-mt;
+ struct gl_texture_image *firstImage = tObj-Image[0][tObj-BaseLevel];
+ struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
+
+ if (tObj-Target == GL_TEXTURE_BUFFER) {
+ brw_update_buffer_texture_surface(ctx, unit, surf_offset);
+ return;
+ }
+
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
8 * 4, 32, surf_offset);
-
memset(surf, 0, 8 * 4);
- surf[0] = translate_tex_target(target) BRW_SURFACE_TYPE_SHIFT |
- format BRW_SURFACE_FORMAT_SHIFT |
+ uint32_t tex_format = translate_tex_format(brw,
+ intelObj-_Format,
+ sampler-sRGBDecode);
+
+ if (for_gather tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
+ tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
+
+ surf[0] = translate_tex_target(tObj-Target) BRW_SURFACE_TYPE_SHIFT |
+ tex_format BRW_SURFACE_FORMAT_SHIFT |
gen7_surface_tiling_mode(mt-tiling);
/* mask of faces present in cube map; for other surfaces MBZ. */
- if (target == GL_TEXTURE_CUBE_MAP || target == GL_TEXTURE_CUBE_MAP_ARRAY)
+ if (tObj-Target == GL_TEXTURE_CUBE_MAP || tObj-Target ==
GL_TEXTURE_CUBE_MAP_ARRAY)
surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
if (mt-align_h == 4)
@@ -293,9 +305,16 @@ gen7_emit_texture_surface_state(struct brw_context *brw,
if (mt-align_w == 8)
surf[0] |= GEN7_SURFACE_HALIGN_8;
- if (_mesa_is_array_texture(target) || target == GL_TEXTURE_CUBE_MAP)
+ if (_mesa_is_array_texture(tObj-Target) ||
+ tObj-Target == GL_TEXTURE_CUBE_MAP)
surf[0] |= GEN7_SURFACE_IS_ARRAY;
+ /* if this is a view with restricted NumLayers, then
+* our effective depth is not just the miptree depth.
+*/
+ uint32_t effective_depth = (tObj-Immutable tObj-Target !=
GL_TEXTURE_3D)
+ ? tObj-NumLayers : mt-logical_depth0;
+
if (mt-array_layout == ALL_SLICES_AT_EACH_LOD)
surf[0] |=
[Mesa-dev] [v2 09/12] i965: Pass texture target as parameter for surface setup
Also changed a couple of direct shifts into SET_FIELD(). Reviewed-by: Matt Turner matts...@gmail.com Reviewed-by: Kenneth Graunke kenn...@whitecape.org Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com --- src/mesa/drivers/dri/i965/brw_context.h | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++-- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 11 +-- src/mesa/drivers/dri/i965/gen8_surface_state.c| 13 + 4 files changed, 17 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 81878d9..5d853d5 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -986,7 +986,7 @@ struct brw_context void (*update_texture_surface)(struct brw_context *brw, const struct intel_mipmap_tree *mt, struct gl_texture_object *tObj, - uint32_t effective_depth, + GLenum target, uint32_t effective_depth, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 0bb5621..84f4aa5 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -310,7 +310,7 @@ update_buffer_texture_surface(struct gl_context *ctx, static void brw_update_texture_surface(struct brw_context *brw, const struct intel_mipmap_tree *mt, - struct gl_texture_object *tObj, + struct gl_texture_object *tObj, GLenum target, uint32_t effective_depth /* unused */, uint32_t tex_format, int swizzle /* unused */, uint32_t *surf_offset, @@ -351,10 +351,10 @@ brw_update_texture_surface(struct brw_context *brw, } } - surf[0] = (translate_tex_target(tObj-Target) BRW_SURFACE_TYPE_SHIFT | - BRW_SURFACE_MIPMAPLAYOUT_BELOW BRW_SURFACE_MIPLAYOUT_SHIFT | - BRW_SURFACE_CUBEFACE_ENABLES | - tex_format BRW_SURFACE_FORMAT_SHIFT); + surf[0] = SET_FIELD(translate_tex_target(target), BRW_SURFACE_TYPE) | + BRW_SURFACE_MIPMAPLAYOUT_BELOW BRW_SURFACE_MIPLAYOUT_SHIFT | + BRW_SURFACE_CUBEFACE_ENABLES | + tex_format BRW_SURFACE_FORMAT_SHIFT; surf[1] = mt-bo-offset64 + mt-offset; /* reloc */ @@ -831,7 +831,7 @@ update_texture_surface(struct gl_context *ctx, uint32_t effective_depth = (tObj-Immutable tObj-Target != GL_TEXTURE_3D) ? tObj-NumLayers : mt-logical_depth0; - brw-vtbl.update_texture_surface(brw, mt, tObj, + brw-vtbl.update_texture_surface(brw, mt, tObj, tObj-Target, effective_depth, tex_format, swizzle, surf_offset, for_gather); } diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index b5cb976..0769ab8 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -267,7 +267,7 @@ static void gen7_update_texture_surface(struct brw_context *brw, const struct intel_mipmap_tree *mt, struct gl_texture_object *tObj, -uint32_t effective_depth, +GLenum target, uint32_t effective_depth, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather) @@ -281,12 +281,12 @@ gen7_update_texture_surface(struct brw_context *brw, if (for_gather tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT) tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD; - surf[0] = translate_tex_target(tObj-Target) BRW_SURFACE_TYPE_SHIFT | - tex_format BRW_SURFACE_FORMAT_SHIFT | + surf[0] = SET_FIELD(translate_tex_target(target), BRW_SURFACE_TYPE) | + SET_FIELD(tex_format, BRW_SURFACE_FORMAT) | gen7_surface_tiling_mode(mt-tiling); /* mask of faces present in cube map; for other surfaces MBZ. */ - if (tObj-Target == GL_TEXTURE_CUBE_MAP || tObj-Target == GL_TEXTURE_CUBE_MAP_ARRAY) + if (target == GL_TEXTURE_CUBE_MAP || target == GL_TEXTURE_CUBE_MAP_ARRAY) surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES; if (mt-align_h == 4) @@ -294,8 +294,7 @@ gen7_update_texture_surface(struct brw_context *brw, if (mt-align_w == 8) surf[0] |= GEN7_SURFACE_HALIGN_8; - if (_mesa_is_array_texture(tObj-Target)
[Mesa-dev] [v2 04/12] i965: Move texture buffer dispatch into single location
All generations do the same exact dispatch and it could be
therefore done in the hardware independent stage.
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 3 ---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 32 +++
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 5
src/mesa/drivers/dri/i965/gen8_surface_state.c| 5
4 files changed, 21 insertions(+), 24 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 5c92071..659d465 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1687,9 +1687,6 @@ void brw_create_constant_surface(struct brw_context *brw,
uint32_t size,
uint32_t *out_offset,
bool dword_pitch);
-void brw_update_buffer_texture_surface(struct gl_context *ctx,
- unsigned unit,
- uint32_t *surf_offset);
void
brw_update_sol_surface(struct brw_context *brw,
struct gl_buffer_object *buffer_obj,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 160dd2f..cf9b045 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -274,10 +274,10 @@ gen4_emit_buffer_surface_state(struct brw_context *brw,
}
}
-void
-brw_update_buffer_texture_surface(struct gl_context *ctx,
- unsigned unit,
- uint32_t *surf_offset)
+static void
+update_buffer_texture_surface(struct gl_context *ctx,
+ unsigned unit,
+ uint32_t *surf_offset)
{
struct brw_context *brw = brw_context(ctx);
struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
@@ -320,12 +320,6 @@ brw_update_texture_surface(struct gl_context *ctx,
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
uint32_t *surf;
- /* BRW_NEW_TEXTURE_BUFFER */
- if (tObj-Target == GL_TEXTURE_BUFFER) {
- brw_update_buffer_texture_surface(ctx, unit, surf_offset);
- return;
- }
-
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, surf_offset);
@@ -795,6 +789,22 @@ const struct brw_tracked_state gen6_renderbuffer_surfaces
= {
.emit = update_renderbuffer_surfaces,
};
+static void
+update_texture_surface(struct gl_context *ctx,
+ unsigned unit,
+ uint32_t *surf_offset,
+ bool for_gather)
+{
+ struct brw_context *brw = brw_context(ctx);
+ const struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
+
+ if (tObj-Target == GL_TEXTURE_BUFFER) {
+ update_buffer_texture_surface(ctx, unit, surf_offset);
+ return;
+ }
+
+ brw-vtbl.update_texture_surface(ctx, unit, surf_offset, for_gather);
+}
static void
update_stage_texture_surfaces(struct brw_context *brw,
@@ -824,7 +834,7 @@ update_stage_texture_surfaces(struct brw_context *brw,
/* _NEW_TEXTURE */
if (ctx-Texture.Unit[unit]._Current) {
-brw-vtbl.update_texture_surface(ctx, unit, surf_offset + s,
for_gather);
+update_texture_surface(ctx, unit, surf_offset + s, for_gather);
}
}
}
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 60f9228..7779966 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -276,11 +276,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
struct gl_texture_image *firstImage = tObj-Image[0][tObj-BaseLevel];
struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
- if (tObj-Target == GL_TEXTURE_BUFFER) {
- brw_update_buffer_texture_surface(ctx, unit, surf_offset);
- return;
- }
-
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
8 * 4, 32, surf_offset);
memset(surf, 0, 8 * 4);
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 941dfc0..304e5fe 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -166,11 +166,6 @@ gen8_update_texture_surface(struct gl_context *ctx,
mesa_format format = intelObj-_Format;
uint32_t mocs_wb = brw-gen = 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
- if (tObj-Target == GL_TEXTURE_BUFFER) {
- brw_update_buffer_texture_surface(ctx, unit, surf_offset);
- return;
- }
-
if
[Mesa-dev] [v2 07/12] i965: Move texture swizzle resolving into dispatcher
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 4 ++--
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 20 +++-
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 17 ++---
src/mesa/drivers/dri/i965/gen8_surface_state.c| 16 ++--
4 files changed, 21 insertions(+), 36 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index a1d874c..7e1f5db 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -983,10 +983,10 @@ struct brw_context
struct
{
- void (*update_texture_surface)(struct gl_context *ctx,
+ void (*update_texture_surface)(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
struct gl_texture_object *tObj,
- uint32_t tex_format,
+ uint32_t tex_format, int swizzle,
uint32_t *surf_offset,
bool for_gather);
uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index f247307..4538d02 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -308,14 +308,13 @@ update_buffer_texture_surface(struct gl_context *ctx,
}
static void
-brw_update_texture_surface(struct gl_context *ctx,
+brw_update_texture_surface(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
struct gl_texture_object *tObj,
- uint32_t tex_format,
+ uint32_t tex_format, int swizzle /* unused */,
uint32_t *surf_offset,
bool for_gather)
{
- struct brw_context *brw = brw_context(ctx);
struct intel_texture_object *intelObj = intel_texture_object(tObj);
uint32_t *surf;
@@ -814,8 +813,19 @@ update_texture_surface(struct gl_context *ctx,
const uint32_t tex_format = translate_tex_format(brw, format,
sampler-sRGBDecode);
- brw-vtbl.update_texture_surface(ctx, mt, tObj, tex_format, surf_offset,
-for_gather);
+ /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
+* texturing functions that return a float, as our code generation always
+* selects the .x channel (which would always be 0).
+*/
+ const bool alpha_depth = tObj-DepthMode == GL_ALPHA
+ (firstImage-_BaseFormat == GL_DEPTH_COMPONENT ||
+ firstImage-_BaseFormat == GL_DEPTH_STENCIL);
+
+ const int swizzle = unlikely(alpha_depth)
+ ? SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tObj);
+
+ brw-vtbl.update_texture_surface(brw, mt, tObj, tex_format, swizzle,
+surf_offset, for_gather);
}
static void
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 53bcd15..bd63786 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -264,16 +264,14 @@ gen7_emit_buffer_surface_state(struct brw_context *brw,
}
static void
-gen7_update_texture_surface(struct gl_context *ctx,
+gen7_update_texture_surface(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
struct gl_texture_object *tObj,
-uint32_t tex_format,
+uint32_t tex_format, int swizzle,
uint32_t *surf_offset,
bool for_gather)
{
- struct brw_context *brw = brw_context(ctx);
struct intel_texture_object *intelObj = intel_texture_object(tObj);
- struct gl_texture_image *firstImage = tObj-Image[0][tObj-BaseLevel];
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
8 * 4, 32, surf_offset);
@@ -332,17 +330,6 @@ gen7_update_texture_surface(struct gl_context *ctx,
surf[7] = mt-fast_clear_color_value;
if (brw-is_haswell) {
- /* Handling GL_ALPHA as a surface format override breaks 1.30+ style
- * texturing functions that return a float, as our code generation always
- * selects the .x channel (which would always be 0).
- */
- const bool alpha_depth = tObj-DepthMode == GL_ALPHA
- (firstImage-_BaseFormat == GL_DEPTH_COMPONENT ||
- firstImage-_BaseFormat == GL_DEPTH_STENCIL);
-
- const int swizzle =
[Mesa-dev] [v2 01/12] Revert i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface().
This reverts commit e17dc004fd96e589e92ee64deeb45339af4bf671.
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 137 +++--
1 file changed, 60 insertions(+), 77 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index d0c2d80..941dfc0 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -150,23 +150,34 @@ gen8_emit_buffer_surface_state(struct brw_context *brw,
}
static void
-gen8_emit_texture_surface_state(struct brw_context *brw,
-struct intel_mipmap_tree *mt,
-GLenum target,
-unsigned min_layer, unsigned max_layer,
-unsigned min_level, unsigned max_level,
-unsigned format,
-unsigned swizzle,
-uint32_t *surf_offset,
-bool rw, bool for_gather)
+gen8_update_texture_surface(struct gl_context *ctx,
+unsigned unit,
+uint32_t *surf_offset,
+bool for_gather)
{
- const unsigned depth = max_layer - min_layer;
+ struct brw_context *brw = brw_context(ctx);
+ struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
+ struct intel_texture_object *intelObj = intel_texture_object(tObj);
+ struct intel_mipmap_tree *mt = intelObj-mt;
+ struct gl_texture_image *firstImage = tObj-Image[0][tObj-BaseLevel];
+ struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
struct intel_mipmap_tree *aux_mt = NULL;
uint32_t aux_mode = 0;
+ mesa_format format = intelObj-_Format;
uint32_t mocs_wb = brw-gen = 9 ? SKL_MOCS_WB : BDW_MOCS_WB;
- unsigned tiling_mode, pitch;
- if (mt-format == MESA_FORMAT_S_UINT8) {
+ if (tObj-Target == GL_TEXTURE_BUFFER) {
+ brw_update_buffer_texture_surface(ctx, unit, surf_offset);
+ return;
+ }
+
+ if (tObj-StencilSampling firstImage-_BaseFormat == GL_DEPTH_STENCIL) {
+ mt = mt-stencil_mt;
+ format = MESA_FORMAT_S_UINT8;
+ }
+
+ unsigned tiling_mode, pitch;
+ if (format == MESA_FORMAT_S_UINT8) {
tiling_mode = GEN8_SURFACE_TILING_W;
pitch = 2 * mt-pitch;
} else {
@@ -179,20 +190,30 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
aux_mode = GEN8_SURFACE_AUX_MODE_MCS;
}
+ /* If this is a view with restricted NumLayers, then our effective depth
+* is not just the miptree depth.
+*/
+ uint32_t effective_depth =
+ (tObj-Immutable tObj-Target != GL_TEXTURE_3D) ? tObj-NumLayers
+ : mt-logical_depth0;
+
+ uint32_t tex_format = translate_tex_format(brw, format,
sampler-sRGBDecode);
+
uint32_t *surf = allocate_surface_state(brw, surf_offset);
- surf[0] = translate_tex_target(target) BRW_SURFACE_TYPE_SHIFT |
- format BRW_SURFACE_FORMAT_SHIFT |
+ surf[0] = translate_tex_target(tObj-Target) BRW_SURFACE_TYPE_SHIFT |
+ tex_format BRW_SURFACE_FORMAT_SHIFT |
vertical_alignment(mt) |
horizontal_alignment(mt) |
tiling_mode;
- if (target == GL_TEXTURE_CUBE_MAP ||
- target == GL_TEXTURE_CUBE_MAP_ARRAY) {
+ if (tObj-Target == GL_TEXTURE_CUBE_MAP ||
+ tObj-Target == GL_TEXTURE_CUBE_MAP_ARRAY) {
surf[0] |= BRW_SURFACE_CUBEFACE_ENABLES;
}
- if (_mesa_is_array_texture(target) || target == GL_TEXTURE_CUBE_MAP)
+ if (_mesa_is_array_texture(tObj-Target) ||
+ tObj-Target == GL_TEXTURE_CUBE_MAP)
surf[0] |= GEN8_SURFACE_IS_ARRAY;
surf[1] = SET_FIELD(mocs_wb, GEN8_SURFACE_MOCS) | mt-qpitch 2;
@@ -200,14 +221,16 @@ gen8_emit_texture_surface_state(struct brw_context *brw,
surf[2] = SET_FIELD(mt-logical_width0 - 1, GEN7_SURFACE_WIDTH) |
SET_FIELD(mt-logical_height0 - 1, GEN7_SURFACE_HEIGHT);
- surf[3] = SET_FIELD(depth - 1, BRW_SURFACE_DEPTH) | (pitch - 1);
+ surf[3] = SET_FIELD(effective_depth - 1, BRW_SURFACE_DEPTH) | (pitch - 1);
surf[4] = gen7_surface_msaa_bits(mt-num_samples, mt-msaa_layout) |
- SET_FIELD(min_layer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) |
- SET_FIELD(depth - 1, GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT);
+ SET_FIELD(tObj-MinLayer, GEN7_SURFACE_MIN_ARRAY_ELEMENT) |
+ SET_FIELD(effective_depth - 1,
+ GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT);
- surf[5] = SET_FIELD(min_level - mt-first_level, GEN7_SURFACE_MIN_LOD) |
- (max_level - min_level - 1); /* mip count */
+ surf[5] = SET_FIELD(tObj-MinLevel + tObj-BaseLevel - mt-first_level,
+ GEN7_SURFACE_MIN_LOD) |
+ (intelObj-_MaxLevel - tObj-BaseLevel); /* mip count */
if (aux_mt) {
surf[6] =
[Mesa-dev] [v2 12/12] i965/SQUASH: Implement surface state set-up for shader images.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 6e0166e..250c61a 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1127,8 +1127,10 @@ update_image_surface(struct brw_context *brw,
access != GL_READ_ONLY);
} else {
+const unsigned mip_count = 1;
const unsigned min_layer = obj-MinLayer + u-Layer;
-const unsigned min_level = obj-MinLevel + u-Level;
+const unsigned min_level = obj-MinLevel + u-Level -
+ mt-first_level;
const unsigned num_layers = (!u-Layered ? 1 :
obj-Target == GL_TEXTURE_CUBE_MAP ?
6 :
mt-logical_depth0);
@@ -1136,11 +1138,11 @@ update_image_surface(struct brw_context *brw,
obj-Target == GL_TEXTURE_CUBE_MAP_ARRAY ?
GL_TEXTURE_2D_ARRAY : obj-Target);
-brw-vtbl.emit_texture_surface_state(
- brw, mt, target,
- min_layer, min_layer + num_layers,
- min_level, min_level + 1,
- format, SWIZZLE_XYZW,
+brw-vtbl.update_surface_state(
+ brw, mt, format, false, target,
+ num_layers, min_layer,
+ min_level, mip_count,
+ SWIZZLE_XYZW,
surf_offset, access != GL_READ_ONLY, false);
}
}
--
1.9.3
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[Mesa-dev] [v2 11/12] i965: Implement surface state set-up for shader images.
From: Francisco Jerez curroje...@riseup.net
---
src/mesa/drivers/dri/i965/brw_context.h | 2 +
src/mesa/drivers/dri/i965/brw_surface_formats.c | 112 +++
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 77
3 files changed, 191 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index d7a1faf..ca5411c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1710,6 +1710,8 @@ void brw_upload_abo_surfaces(struct brw_context *brw,
bool brw_render_target_supported(struct brw_context *brw,
struct gl_renderbuffer *rb);
uint32_t brw_depth_format(struct brw_context *brw, mesa_format format);
+mesa_format brw_lower_mesa_image_format(const struct brw_device_info *devinfo,
+mesa_format format);
/* brw_performance_monitor.c */
void brw_init_performance_monitors(struct brw_context *brw);
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c
b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index c5fde35..a31c940 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -804,3 +804,115 @@ brw_depth_format(struct brw_context *brw, mesa_format
format)
unreachable(Unexpected depth format.);
}
}
+
+mesa_format
+brw_lower_mesa_image_format(const struct brw_device_info *devinfo,
+mesa_format format)
+{
+ switch (format) {
+ case MESA_FORMAT_RGBA_UINT32:
+ case MESA_FORMAT_RGBA_SINT32:
+ case MESA_FORMAT_RGBA_FLOAT32:
+ /* Fail... We'll have to fall back to untyped surface access for all
+ * 128 bpp formats.
+ */
+ return MESA_FORMAT_RGBA_UINT32;
+
+ case MESA_FORMAT_RGBA_UINT16:
+ case MESA_FORMAT_RGBA_SINT16:
+ case MESA_FORMAT_RGBA_FLOAT16:
+ case MESA_FORMAT_RGBA_UNORM16:
+ case MESA_FORMAT_RGBA_SNORM16:
+ case MESA_FORMAT_RG_UINT32:
+ case MESA_FORMAT_RG_SINT32:
+ case MESA_FORMAT_RG_FLOAT32:
+ /* HSW and later support the RGBA_UINT16 format natively and handle the
+ * pixel packing, unpacking and type conversion in the shader for other
+ * 64 bpp formats. IVB falls back to untyped.
+ */
+ return (devinfo-gen = 8 || devinfo-is_haswell ?
+ MESA_FORMAT_RGBA_UINT16 : MESA_FORMAT_RG_UINT32);
+
+ case MESA_FORMAT_RGBA_UINT8:
+ case MESA_FORMAT_RGBA_SINT8:
+ case MESA_FORMAT_R8G8B8A8_UNORM:
+ case MESA_FORMAT_R8G8B8A8_SNORM:
+ /* HSW and later support the RGBA_UINT8 format natively, type conversion
+ * to other formats is handled in the shader. IVB uses R_UINT32 and
+ * handles the pixel packing, unpacking and type conversion in the
+ * shader.
+ */
+ return (devinfo-gen = 8 || devinfo-is_haswell ?
+ MESA_FORMAT_RGBA_UINT8 : MESA_FORMAT_R_UINT32);
+
+ case MESA_FORMAT_RG_UINT16:
+ case MESA_FORMAT_RG_SINT16:
+ case MESA_FORMAT_RG_FLOAT16:
+ case MESA_FORMAT_R16G16_UNORM:
+ case MESA_FORMAT_R16G16_SNORM:
+ /* HSW and later support the RG_UINT16 format natively, type conversion
+ * to other formats is handled in the shader. IVB uses R_UINT32 and
+ * handles the pixel packing, unpacking and type conversion in the
+ * shader.
+ */
+ return (devinfo-gen = 8 || devinfo-is_haswell ?
+ MESA_FORMAT_RG_UINT16 : MESA_FORMAT_R_UINT32);
+
+ case MESA_FORMAT_R10G10B10A2_UINT:
+ case MESA_FORMAT_R10G10B10A2_UNORM:
+ case MESA_FORMAT_R11G11B10_FLOAT:
+ case MESA_FORMAT_R_UINT32:
+ /* Neither the 2/10/10/10 nor the 11/11/10 packed formats are supported
+ * by the hardware. Use R_UINT32 and handle the pixel packing,
+ * unpacking, and type conversion in the shader.
+ */
+ return MESA_FORMAT_R_UINT32;
+
+ case MESA_FORMAT_R_SINT32:
+ return MESA_FORMAT_R_SINT32;
+
+ case MESA_FORMAT_R_FLOAT32:
+ return MESA_FORMAT_R_FLOAT32;
+
+ case MESA_FORMAT_RG_UINT8:
+ case MESA_FORMAT_RG_SINT8:
+ case MESA_FORMAT_R8G8_UNORM:
+ case MESA_FORMAT_R8G8_SNORM:
+ /* HSW and later support the RG_UINT8 format natively, type conversion
+ * to other formats is handled in the shader. IVB uses R_UINT16 and
+ * handles the pixel packing, unpacking and type conversion in the
+ * shader. Note that this relies on the undocumented behavior that
+ * typed reads from R_UINT16 surfaces actually do a 32-bit misaligned
+ * read on IVB. The alternative would be to use two surface state
+ * entries with different formats for each image, one for reading (using
+ * R_UINT32) and another one for writing (using RG_UINT8), but that
+ * would complicate the shaders we generate even more.
+ */
+ return (devinfo-gen = 8 || devinfo-is_haswell ?
+ MESA_FORMAT_RG_UINT8 : MESA_FORMAT_R_UINT16);
+
+ case
[Mesa-dev] i965: Revision of texture surface setup refactoring
This series moves all the decision making of values into common hardware independent dispatcher while leaving the hardware specific logic to deal with formatting only. Curro needed a similar refactor for gen7 and gen8. However, that makes it a harder to apply the changes I needed that expand all the way to gen4. Ken helped me to notice that my refactoring can in fact address both relatively easily. For context, I added the patch from Curro that makes use of the texture surface setup logic along with a small patch making it compatible with the surface state refactoring found here. Curro, what do you think? I'm not too happy with reverting your work but overall this way it becomes cleaner, I think. CC: Francisco Jerez curroje...@riseup.net Francisco Jerez (1): i965: Implement surface state set-up for shader images. Topi Pohjolainen (11): Revert i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface(). Revert i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface(). i965/gen7: Check mip-tree for integer formats in surface setup i965: Move texture buffer dispatch into single location i965/gen8: Use miptree format in the surface setup i965: Move tex miptree and format resolving into dispatcher i965: Move texture swizzle resolving into dispatcher i965: Refactor effective depth calculation i965: Pass texture target as parameter for surface setup i965: Pass slice details as parameters for surface setup i965/SQUASH: Implement surface state set-up for shader images. src/mesa/drivers/dri/i965/brw_context.h | 24 +-- src/mesa/drivers/dri/i965/brw_surface_formats.c | 112 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 196 ++ src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 92 +++--- src/mesa/drivers/dri/i965/gen8_surface_state.c| 96 +++ 5 files changed, 325 insertions(+), 195 deletions(-) -- 1.9.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] i965: Revision of texture surface setup refactoring
Hi! Topi Pohjolainen topi.pohjolai...@intel.com writes: This series moves all the decision making of values into common hardware independent dispatcher while leaving the hardware specific logic to deal with formatting only. Curro needed a similar refactor for gen7 and gen8. However, that makes it a harder to apply the changes I needed that expand all the way to gen4. Ken helped me to notice that my refactoring can in fact address both relatively easily. For context, I added the patch from Curro that makes use of the texture surface setup logic along with a small patch making it compatible with the surface state refactoring found here. Curro, what do you think? I'm not too happy with reverting your work but overall this way it becomes cleaner, I think. *Shrug*, it seems weird to me that you opted to revert my patches even though they are closer to where you want to get at than it was before my patches. This is the current interface: void (*emit_texture_surface_state)(struct brw_context *brw, struct intel_mipmap_tree *mt, GLenum target, unsigned min_layer, unsigned max_layer, unsigned min_level, unsigned max_level, unsigned format, unsigned swizzle, uint32_t *surf_offset, bool rw, bool for_gather); This is the old interface we both wanted to get rid of: void (*update_texture_surface)(struct gl_context *ctx, unsigned unit, uint32_t *surf_offset, bool for_gather); This is the interface introduced by this series: void (*update_texture_surface)(struct brw_context *brw, const struct intel_mipmap_tree *mt, GLenum target, uint32_t effective_depth, uint32_t min_layer, uint32_t min_lod, uint32_t mip_count, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather); AFAIK the only difference between your proposal and mine is the name (IMHO emit_texture_surface_state is more consistent with the other emit_*_surface_state hooks with similar semantics), the ordering of arguments (and I find the ordering and naming of your effective_depth, min_layer, min_lod and mip_count arguments rather asymmetric, they are both pairs determining an interval of either layers or levels, it doesn't make much sense to me that they are named and ordered inconsistently in your series), the fact that you're using a min level/layer index + count instead of half-open intervals like I did, and the fact that you're missing an rw argument which is required for ARB_shader_image_load_store support. I fail to see why a revert is justified or desirable, and I fail to see how your proposal will work better on Gen4, since the difference between the two interfaces mostly cosmetic. CC: Francisco Jerez curroje...@riseup.net Francisco Jerez (1): i965: Implement surface state set-up for shader images. Topi Pohjolainen (11): Revert i965/gen8: Factor out texture surface state set-up from gen8_update_texture_surface(). Revert i965/gen7: Factor out texture surface state set-up from gen7_update_texture_surface(). i965/gen7: Check mip-tree for integer formats in surface setup i965: Move texture buffer dispatch into single location i965/gen8: Use miptree format in the surface setup i965: Move tex miptree and format resolving into dispatcher i965: Move texture swizzle resolving into dispatcher i965: Refactor effective depth calculation i965: Pass texture target as parameter for surface setup i965: Pass slice details as parameters for surface setup i965/SQUASH: Implement surface state set-up for shader images. src/mesa/drivers/dri/i965/brw_context.h | 24 +-- src/mesa/drivers/dri/i965/brw_surface_formats.c | 112 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 196 ++ src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 92 +++--- src/mesa/drivers/dri/i965/gen8_surface_state.c| 96 +++ 5 files changed, 325 insertions(+), 195 deletions(-) -- 1.9.3 signature.asc Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 cgerlac...@gmail.com changed: What|Removed |Added Attachment #115588|text/plain |image/png mime type|| -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] util: Take memset out of rzalloc_size()
rzalloc_size() call ralloc_size() to allocate memory. ralloc_size()
use calloc to get memory thus zeroing in rzalloc_size is not
necessary.
Signed-off-by: Juha-Pekka Heikkila juhapekka.heikk...@gmail.com
---
src/util/ralloc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/util/ralloc.c b/src/util/ralloc.c
index 01719c8..09f5fcd 100644
--- a/src/util/ralloc.c
+++ b/src/util/ralloc.c
@@ -132,8 +132,6 @@ void *
rzalloc_size(const void *ctx, size_t size)
{
void *ptr = ralloc_size(ctx, size);
- if (likely(ptr != NULL))
- memset(ptr, 0, size);
return ptr;
}
--
1.8.5.1
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Re: [Mesa-dev] [PATCH 7/7] mesa/es3.1: enable GL_ARB_explicit_uniform_location for gles 3.1
Instead of adding new one you should move the existing declaration to
section:
apis: [GL, GL_CORE, GLES3]
and make it use the new specified extra
extra_ARB_explicit_uniform_location_es31.
(same is actually true for all other patches, they all add enums that
should be available for GL, GL_CORE, and GLES 3.1).
Thanks for starting this work, this really helps with the conformance
suite that seems to call the getters as one of the first things.
On 05/06/2015 11:53 AM, Marta Lofstedt wrote:
GL_ARB_explicit_uniform_location is required for gles 3.1
conformance
Signed-off-by: Marta Lofstedt marta.lofst...@intel.com
---
src/mesa/main/get.c | 6 ++
src/mesa/main/get_hash_params.py | 2 ++
2 files changed, 8 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 97d3bf0..6fc0f3f 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -385,6 +385,12 @@ static const int extra_ARB_compute_shader_es31[] = {
EXTRA_END
};
+static const int extra_ARB_explicit_uniform_location_es31[] = {
+ EXT(ARB_explicit_uniform_location),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
diff --git a/src/mesa/main/get_hash_params.py b/src/mesa/main/get_hash_params.py
index 2e0b355..c64bb58 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -450,6 +450,8 @@ descriptor=[
[ MAX_COMPUTE_SHARED_MEMORY_SIZE, CONST(MAX_COMPUTE_SHARED_MEMORY_SIZE),
extra_ARB_compute_shader_es31 ],
[ MAX_COMPUTE_UNIFORM_COMPONENTS, CONST(MAX_COMPUTE_UNIFORM_COMPONENTS),
extra_ARB_compute_shader_es31 ],
[ MAX_COMPUTE_IMAGE_UNIFORMS, CONST(MAX_COMPUTE_IMAGE_UNIFORMS),
extra_ARB_compute_shader_es31 ],
+# GL_ARB_explicit_uniform_location / GLES 3.1
+ [ MAX_UNIFORM_LOCATIONS, CONTEXT_INT(Const.MaxUserAssignableUniformLocations),
extra_ARB_explicit_uniform_location_es31 ],
]},
# Remaining enums are only in OpenGL
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[Mesa-dev] [v2 06/12] i965: Move tex miptree and format resolving into dispatcher
All hardware platforms have this in common, so do it in the
hardware independent dispatcher.
v2 (Matt): Removed extra whitespace.
Reviewed-by: Matt Turner matts...@gmail.com (v1)
Reviewed-by: Kenneth Graunke kenn...@whitecape.org (v1)
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 4 ++-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 30 ---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 11 +++--
src/mesa/drivers/dri/i965/gen8_surface_state.c| 16 +++-
4 files changed, 30 insertions(+), 31 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 659d465..a1d874c 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -984,7 +984,9 @@ struct brw_context
struct
{
void (*update_texture_surface)(struct gl_context *ctx,
- unsigned unit,
+ const struct intel_mipmap_tree *mt,
+ struct gl_texture_object *tObj,
+ uint32_t tex_format,
uint32_t *surf_offset,
bool for_gather);
uint32_t (*update_renderbuffer_surface)(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index cf9b045..f247307 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -309,23 +309,19 @@ update_buffer_texture_surface(struct gl_context *ctx,
static void
brw_update_texture_surface(struct gl_context *ctx,
- unsigned unit,
+ const struct intel_mipmap_tree *mt,
+ struct gl_texture_object *tObj,
+ uint32_t tex_format,
uint32_t *surf_offset,
bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
- struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
struct intel_texture_object *intelObj = intel_texture_object(tObj);
- struct intel_mipmap_tree *mt = intelObj-mt;
- struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
uint32_t *surf;
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
6 * 4, 32, surf_offset);
- uint32_t tex_format = translate_tex_format(brw, mt-format,
- sampler-sRGBDecode);
-
if (for_gather) {
/* Sandybridge's gather4 message is broken for integer formats.
* To work around this, we pretend the surface is UNORM for
@@ -796,14 +792,30 @@ update_texture_surface(struct gl_context *ctx,
bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
- const struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
+ struct gl_texture_object *tObj = ctx-Texture.Unit[unit]._Current;
+ struct intel_texture_object *intelObj = intel_texture_object(tObj);
+ const struct intel_mipmap_tree *mt = intelObj-mt;
+ const struct gl_texture_image *firstImage = tObj-Image[0][tObj-BaseLevel];
+ const struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
if (tObj-Target == GL_TEXTURE_BUFFER) {
update_buffer_texture_surface(ctx, unit, surf_offset);
return;
}
- brw-vtbl.update_texture_surface(ctx, unit, surf_offset, for_gather);
+ mesa_format format = intelObj-_Format;
+ if (tObj-StencilSampling firstImage-_BaseFormat == GL_DEPTH_STENCIL) {
+ assert(brw-gen = 8);
+ mt = mt-stencil_mt;
+ assert(mt-format == MESA_FORMAT_S_UINT8);
+ format = mt-format;
+ }
+
+ const uint32_t tex_format = translate_tex_format(brw, format,
+sampler-sRGBDecode);
+
+ brw-vtbl.update_texture_surface(ctx, mt, tObj, tex_format, surf_offset,
+for_gather);
}
static void
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 7779966..53bcd15 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -265,25 +265,20 @@ gen7_emit_buffer_surface_state(struct brw_context *brw,
static void
gen7_update_texture_surface(struct gl_context *ctx,
-unsigned unit,
+const struct intel_mipmap_tree *mt,
+struct gl_texture_object *tObj,
+uint32_t tex_format,
uint32_t *surf_offset,
bool for_gather)
{
struct brw_context *brw = brw_context(ctx);
- struct gl_texture_object
[Mesa-dev] [v2 03/12] i965/gen7: Check mip-tree for integer formats in surface setup
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com --- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 1527d12..60f9228 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -326,7 +326,7 @@ gen7_update_texture_surface(struct gl_context *ctx, surf[3] = SET_FIELD(effective_depth - 1, BRW_SURFACE_DEPTH) | (mt-pitch - 1); - if (brw-is_haswell tObj-_IsIntegerFormat) + if (brw-is_haswell _mesa_is_format_integer(mt-format)) surf[3] |= HSW_SURFACE_IS_INTEGER_FORMAT; surf[4] = gen7_surface_msaa_bits(mt-num_samples, mt-msaa_layout) | -- 1.9.3 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [v2 10/12] i965: Pass slice details as parameters for surface setup
Also changed a couple of direct shifts into SET_FIELD().
Fixes: arb_copy_image-formats -auto -fbo on ILK. In principle,
minimum level settings are only for TextureView to use. We,
however, also take advantage of that internally when blitting.
Before this patch this wasn't taken into account for ILK in the
surface setup.
v2:
- Removed extra whitespace and switched tabs to spaces (Matt)
- Added assertion on minimum level (Ken).
Reviewed-by: Matt Turner matts...@gmail.com (v1)
Reviewed-by: Kenneth Graunke kenn...@whitecape.org (v1)
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/i965/brw_context.h | 3 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 37 +++
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 14 -
src/mesa/drivers/dri/i965/gen8_surface_state.c| 10 +++---
4 files changed, 36 insertions(+), 28 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 5d853d5..d7a1faf 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -985,8 +985,9 @@ struct brw_context
{
void (*update_texture_surface)(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
- struct gl_texture_object *tObj,
GLenum target, uint32_t effective_depth,
+ uint32_t min_layer,
+ uint32_t min_lod, uint32_t mip_count,
uint32_t tex_format, int swizzle,
uint32_t *surf_offset,
bool for_gather);
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 84f4aa5..2ffeb7f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -310,13 +310,14 @@ update_buffer_texture_surface(struct gl_context *ctx,
static void
brw_update_texture_surface(struct brw_context *brw,
const struct intel_mipmap_tree *mt,
- struct gl_texture_object *tObj, GLenum target,
+ GLenum target,
uint32_t effective_depth /* unused */,
+ uint32_t min_layer /* unused */,
+ uint32_t min_lod, uint32_t mip_count,
uint32_t tex_format, int swizzle /* unused */,
uint32_t *surf_offset,
bool for_gather)
{
- struct intel_texture_object *intelObj = intel_texture_object(tObj);
uint32_t *surf;
surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
@@ -358,16 +359,16 @@ brw_update_texture_surface(struct brw_context *brw,
surf[1] = mt-bo-offset64 + mt-offset; /* reloc */
- surf[2] = ((intelObj-_MaxLevel - tObj-BaseLevel) BRW_SURFACE_LOD_SHIFT
|
- (mt-logical_width0 - 1) BRW_SURFACE_WIDTH_SHIFT |
- (mt-logical_height0 - 1) BRW_SURFACE_HEIGHT_SHIFT);
+ surf[2] = SET_FIELD(mip_count, BRW_SURFACE_LOD) |
+ SET_FIELD(mt-logical_width0 - 1, BRW_SURFACE_WIDTH) |
+ SET_FIELD(mt-logical_height0 - 1, BRW_SURFACE_HEIGHT);
- surf[3] = (brw_get_surface_tiling_bits(mt-tiling) |
- (mt-logical_depth0 - 1) BRW_SURFACE_DEPTH_SHIFT |
- (mt-pitch - 1) BRW_SURFACE_PITCH_SHIFT);
+ surf[3] = brw_get_surface_tiling_bits(mt-tiling) |
+ SET_FIELD(mt-logical_depth0 - 1, BRW_SURFACE_DEPTH) |
+ SET_FIELD(mt-pitch - 1, BRW_SURFACE_PITCH);
- surf[4] = (brw_get_surface_num_multisamples(mt-num_samples) |
- SET_FIELD(tObj-BaseLevel - mt-first_level,
BRW_SURFACE_MIN_LOD));
+ surf[4] = brw_get_surface_num_multisamples(mt-num_samples) |
+ SET_FIELD(min_lod, BRW_SURFACE_MIN_LOD);
surf[5] = mt-align_h == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0;
@@ -831,9 +832,19 @@ update_texture_surface(struct gl_context *ctx,
uint32_t effective_depth = (tObj-Immutable tObj-Target !=
GL_TEXTURE_3D)
? tObj-NumLayers : mt-logical_depth0;
- brw-vtbl.update_texture_surface(brw, mt, tObj, tObj-Target,
-effective_depth, tex_format,
-swizzle, surf_offset, for_gather);
+ const uint32_t mip_count = intelObj-_MaxLevel - tObj-BaseLevel;
+ const uint32_t min_lod = tObj-MinLevel + tObj-BaseLevel - mt-first_level;
+
+ /* Minimum level is only supported for TextureView but internally it is
+* also taken advantage of by meta blit path. The former is only enabled
+* from gen7 onwards.
+*/
+ assert(brw-gen = 7 || tObj-MinLevel == 0 || brw-meta_in_progress);
+
+
[Mesa-dev] [v2 05/12] i965/gen8: Use miptree format in the surface setup
No functional change but this allows to drop the texture object's
mesa format in later patches.
Stencil buffer has fixed hardware format corresponding to fixed
mesa format. (This is in fact already specfically tested in
intel_fbo.c::intel_validate_framebuffer()).
Reviewed-by: Matt Turner matts...@gmail.com
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 304e5fe..5a94117 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -169,10 +169,11 @@ gen8_update_texture_surface(struct gl_context *ctx,
if (tObj-StencilSampling firstImage-_BaseFormat == GL_DEPTH_STENCIL) {
mt = mt-stencil_mt;
format = MESA_FORMAT_S_UINT8;
+ assert(mt-format == MESA_FORMAT_S_UINT8);
}
unsigned tiling_mode, pitch;
- if (format == MESA_FORMAT_S_UINT8) {
+ if (mt-format == MESA_FORMAT_S_UINT8) {
tiling_mode = GEN8_SURFACE_TILING_W;
pitch = 2 * mt-pitch;
} else {
--
1.9.3
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[Mesa-dev] [v2 08/12] i965: Refactor effective depth calculation
Reviewed-by: Matt Turner matts...@gmail.com Reviewed-by: Kenneth Graunke kenn...@whitecape.org Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com --- src/mesa/drivers/dri/i965/brw_context.h | 1 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 ++-- src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 +-- src/mesa/drivers/dri/i965/gen8_surface_state.c| 8 +--- 4 files changed, 13 insertions(+), 15 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 7e1f5db..81878d9 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -986,6 +986,7 @@ struct brw_context void (*update_texture_surface)(struct brw_context *brw, const struct intel_mipmap_tree *mt, struct gl_texture_object *tObj, + uint32_t effective_depth, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather); diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 4538d02..0bb5621 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -311,6 +311,7 @@ static void brw_update_texture_surface(struct brw_context *brw, const struct intel_mipmap_tree *mt, struct gl_texture_object *tObj, + uint32_t effective_depth /* unused */, uint32_t tex_format, int swizzle /* unused */, uint32_t *surf_offset, bool for_gather) @@ -824,8 +825,15 @@ update_texture_surface(struct gl_context *ctx, const int swizzle = unlikely(alpha_depth) ? SWIZZLE_XYZW : brw_get_texture_swizzle(ctx, tObj); - brw-vtbl.update_texture_surface(brw, mt, tObj, tex_format, swizzle, -surf_offset, for_gather); + /* if this is a view with restricted NumLayers, then +* our effective depth is not just the miptree depth. +*/ + uint32_t effective_depth = (tObj-Immutable tObj-Target != GL_TEXTURE_3D) + ? tObj-NumLayers : mt-logical_depth0; + + brw-vtbl.update_texture_surface(brw, mt, tObj, +effective_depth, tex_format, +swizzle, surf_offset, for_gather); } static void diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index bd63786..b5cb976 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -267,6 +267,7 @@ static void gen7_update_texture_surface(struct brw_context *brw, const struct intel_mipmap_tree *mt, struct gl_texture_object *tObj, +uint32_t effective_depth, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather) @@ -297,12 +298,6 @@ gen7_update_texture_surface(struct brw_context *brw, tObj-Target == GL_TEXTURE_CUBE_MAP) surf[0] |= GEN7_SURFACE_IS_ARRAY; - /* if this is a view with restricted NumLayers, then -* our effective depth is not just the miptree depth. -*/ - uint32_t effective_depth = (tObj-Immutable tObj-Target != GL_TEXTURE_3D) - ? tObj-NumLayers : mt-logical_depth0; - if (mt-array_layout == ALL_SLICES_AT_EACH_LOD) surf[0] |= GEN7_SURFACE_ARYSPC_LOD0; diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index af891ff..e4c06b6 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -153,6 +153,7 @@ static void gen8_update_texture_surface(struct brw_context *brw, const struct intel_mipmap_tree *mt, struct gl_texture_object *tObj, +uint32_t effective_depth, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather) @@ -176,13 +177,6 @@ gen8_update_texture_surface(struct brw_context *brw, aux_mode = GEN8_SURFACE_AUX_MODE_MCS; } - /* If this is a view with restricted NumLayers, then our effective depth -* is not just the miptree depth. -*/ - uint32_t effective_depth = - (tObj-Immutable tObj-Target != GL_TEXTURE_3D) ? tObj-NumLayers - : mt-logical_depth0;
Re: [Mesa-dev] [PATCH 1/7] mesa/es3.1: enable DRAW_INDIRECT_BUFFER_BINDING for gles3.1
That's OK, Tapani, I will fix up my patches once I see what reception you
patch gets.
/Marta
-Original Message-
From: Palli, Tapani
Sent: Wednesday, May 6, 2015 12:19 PM
To: Lofstedt, Marta
Cc: mesa-dev@lists.freedesktop.org
Subject: Re: [PATCH 1/7] mesa/es3.1: enable
DRAW_INDIRECT_BUFFER_BINDING for gles3.1
I've just noticed that this is wrong, sorry :/ We should to make a new section
for some of the enums that are only in GL core and ES31,
DRAW_INDIRECT_BUFFER_BINDING is one of these cases .. so this patch is
broken. Same may apply for some of your patches, there should not be
duplicates but only one entry per enum in the correct API section.
(Otherwise, enabling these getters for ES3.1 is correct thing todo.)
On 05/06/2015 11:53 AM, Marta Lofstedt wrote:
From: Tapani Pälli tapani.pa...@intel.com
(increases ES31-CTS.draw_indirect.basic.* passing tests)
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/get.c | 12
src/mesa/main/get_hash_params.py | 2 ++
2 files changed, 14 insertions(+)
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index
a881bc5..9898197 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -138,6 +138,7 @@ enum value_extra {
EXTRA_API_GL_CORE,
EXTRA_API_ES2,
EXTRA_API_ES3,
+ EXTRA_API_ES31,
EXTRA_NEW_BUFFERS,
EXTRA_NEW_FRAG_CLAMP,
EXTRA_VALID_DRAW_BUFFER,
@@ -348,6 +349,12 @@ static const int
extra_ARB_shader_image_load_store_and_geometry_shader[] = {
EXTRA_END
};
+static const int extra_ARB_draw_indirect_es31[] = {
+ EXT(ARB_draw_indirect),
+ EXTRA_API_ES31,
+ EXTRA_END
+};
+
EXTRA_EXT(ARB_texture_cube_map);
EXTRA_EXT(EXT_texture_array);
EXTRA_EXT(NV_fog_distance);
@@ -1078,6 +1085,11 @@ check_extra(struct gl_context *ctx, const char
*func, const struct value_desc *d
if (_mesa_is_gles3(ctx))
api_found = GL_TRUE;
break;
+ case EXTRA_API_ES31:
+ api_check = GL_TRUE;
+ if (_mesa_is_gles31(ctx))
+api_found = GL_TRUE;
+break;
case EXTRA_API_GL:
api_check = GL_TRUE;
if (_mesa_is_desktop_gl(ctx)) diff --git
a/src/mesa/main/get_hash_params.py
b/src/mesa/main/get_hash_params.py
index 41cb2c1..998efe8 100644
--- a/src/mesa/main/get_hash_params.py
+++ b/src/mesa/main/get_hash_params.py
@@ -407,6 +407,8 @@ descriptor=[
{ apis: [GL, GL_CORE, GLES3], params: [
# GL_ARB_sampler_objects / GL 3.3 / GLES 3.0
[ SAMPLER_BINDING, LOC_CUSTOM, TYPE_INT,
GL_SAMPLER_BINDING,
NO_EXTRA ],
+# GL_ARB_draw_indirect / GLES 3.1
+ [ DRAW_INDIRECT_BUFFER_BINDING, LOC_CUSTOM, TYPE_INT, 0,
+extra_ARB_draw_indirect_es31 ],
]},
# Remaining enums are only in OpenGL
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[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 cgerlac...@gmail.com changed: What|Removed |Added Attachment #115589|text/plain |image/png mime type|| -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [RFC 0/6] i965: INTEL_performance_query re-work
On Wed, May 06, 2015 at 10:36:15AM +0200, Samuel Pitoiset wrote: On 05/06/2015 02:53 AM, Robert Bragg wrote: As we've learned more about the observability capabilities of Gen graphics we've found that it's not enough to only try and configure the OA unit from userspace without any dedicated support from the kernel. Hi Robert, Yeah, this is the same idea for performance counters on Nouveau. We also need to implement a dedicated support from the kernel for configuring/sampling hardware performance counters. Then, we can expose a list of available counters through a set of ioctls. Thus, mesa configures a hardware event by sending its configuration to the kernel. Well the big difference here is that i915 won't have it's own set of ioctls, but instead reuses the perfectly capable perf subsystem. Rob has done some minor additions (which are acked by perf maintainers already) to make that feasible. Imo that's the way to go instead of reinventing a new abi wheel in each driver. As it is currently the i965 backends for both AMD_performance_monitor and INTEL_performance_query aren't able to report normalized metrics useful to application developers due to the limitations of configuring the OA unit from userspace via LRIs. More recently we've developed a perf PMU (performance monitoring unit) driver within the drm i915 driver (i915_oa) that lets userspace configure and open an event fd via the perf_event_open syscall which provides us a more complete interface for configuring the Gen graphics OA unit. With help from the kernel we can support periodic sampling (where the hardware writes reports into a gpu mapped circular buffer that we can forward as perf samples), we can deal with the clock gating + PM limitations imposed by the observability hw and also manage + maintain the selection of performance counters. The perf_event_open(2) man page is a good starting point for anyone wanting to learn about the Linux perf interface. Something to beware of is that there's currently no precedent upstream for exposing device metrics via a perf PMU and although early feedback was sought for this work, some of this may be subject to change based on feedback from the core perf maintainers as well as the i915 drm driver maintainers. Performance counters on Nouveau won't be exposed (in the near future) by perf since they need to be tied to the command stream of the GPU, and perf only works with ioctl calls. Well same for i915, except that there's the timer-based one on top. I still think using perf to configure the pmu and then submitting the in-cs sample points normally from mesa is the way to go, even if your hw lacks a timer-based sample functionality. This PRM is a good starting point for anyone wanting to learn about the Gen graphics Observability hardware. Some important information is currently missing and this should be updated soon, but that's more directly related to the i915_oa perf driver. Notably though the report formats described here need to be understood by Mesa, since the perf samples simply forward the raw reports from the OA hardware. https://01.org/sites/default/files/documentation/ observability_performance_counters_haswell.pdf This series re-works the i965 driver's support for exposing performance counters, taking advantage of this i915_oa perf event interface. A corresponding kernel branch with an initial i915_oa driver for Haswell can be found here: https://github.com/rib/linux wip/rib/oa-hsw-4.0.0 Have you submitted these already and I missed them? -Daniel A corresponding libdrm branch can be found here: https://github.com/rib/drm wip/rib/oa-hsw-4.0.0 In case it's helpful to see another example using the i915_oa perf interface I've also been developing a 'gputop' tool that both lets me test the INTEL_performance_query interface to collect per-context metrics from Mesa and can also visualize system wide metrics (i.e. across all gpu contexts) using perf directly: https://github.com/rib/gputop This is pretty good for testing OA counters without mesa. Although I haven't updated the branches in a while, I could share some initial code adding support for Broadwell if anyone's interested to get a sense of what's involved in supporting later hardware generations. I still anticipate some (hopefully relatively minor) tweaking of implementation details based on review feedback for the i915_oa driver, but I hope that this is a good point to ask for some feedback on the Mesa changes. If it's more convenient, these patches can also be fetched from here: https://github.com/rib/mesa wip/rib/oa-hsw-4.0.0 Great work Robert. :-) I'll try to give you my feedback in the next few days. Regards, - Robert Robert Bragg (6): i965: Remove perf monitor/query backend Separate INTEL_performance_query frontend Model INTEL perf query backend after query object BE i965: Implement
Re: [Mesa-dev] i965 implementation of the ARB_shader_image_load_store built-ins. (v2)
Kenneth Graunke kenn...@whitecape.org writes: On Tuesday, May 05, 2015 03:05:02 PM Matt Turner wrote: On Tue, May 5, 2015 at 2:17 PM, Francisco Jerez curroje...@riseup.net wrote: Kenneth Graunke kenn...@whitecape.org writes: That then begs the question - could we do the format conversion and address calculations in a i965-specific NIR pass? It could simplify the backend changes. NIR also has better CSE, which could help for repeated image access. I doubt that rewriting things in NIR would be of any help at this point. We could have support for ARB_shader_image_load_store already in the 10.6 release if we refrain from reimplementing the world in the last minute. And I doubt that an implementation in terms of NIR would have simplified anything, it would have required a bunch of intrinsics with driver-specific semantics, Can you give an example? We weren't sure exactly how to do the bounds checking on IVB in NIR (add an extra uniform, or maybe do the image-equivalent of textureSize?) but the other work-arounds didn't imageSize is not enough... We'd have to get through a bunch of other driver-specific uniforms somehow (strides, tiling and swizzling parameters) for untyped surface access to work. seem like they would be difficult to implement in NIR. Note that I'm assuming the NIR pass would be very driver specific, i.e. it would know which formats require typed/untyped messages, or format conversion. For example, it would see a NIR image load intrinsic that's supposed to return RGBA32_FLOAT, and turn it into an intrinsic that loads RGBA32_UINT(*), then emit code to do the conversion. Yeah, the format conversion wasn't my concern, it's straightforward arithmetic. I'm more worried about handling typed vs untyped access and passing through the bunch of parameters required for the latter. (*) or leave it alone, knowing i965/fs is going to do that anyway. I'm not sure how tricky it would be to set up an extra uniform, but with a uniform variable in place, reading/using its fields should be straightforward. I'm not sure what extra intrinsics we'd need. and I must admit that I find generating NIR even more annoying than generating i965 IR directly (for an example of what a mean see how [1] spends over twenty lines to calculate a simple a + b * c expression). That's nothing specific to NIR itself, and it's really already been solved with the new nir_builder. Take a look at Ken's src/mesa/program/prog_to_nir.c. Yeah, using nir_builder makes this /much/ less annoying...basically one line of code. prog_to_nir seems far more readable indeed, but I don't see how this suggestion is of any help at this point nine days before the end of the merge window. Given that reimplementing this in NIR wouldn't be particularly beneficial neither short-term [we miss the merge window for no practical benefit] nor long-term [long-term we have an SSA-form back-end IR, hopefully one that allows us to share code between back-ends], this is likely to be a complete waste of my time. --Ken signature.asc Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 9951] GL_LINE_SMOOTH and GL_POLYGON_SMOOTH with i965 driver
https://bugs.freedesktop.org/show_bug.cgi?id=9951 marius predut marius.pre...@intel.com changed: What|Removed |Added Assignee|haihao.xi...@intel.com |marius.pre...@intel.com -- You are receiving this mail because: You are on the CC list for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 9951] GL_LINE_SMOOTH and GL_POLYGON_SMOOTH with i965 driver
https://bugs.freedesktop.org/show_bug.cgi?id=9951 --- Comment #6 from marius predut marius.pre...@intel.com --- The patch series that fix this bug are upstream -- You are receiving this mail because: You are on the CC list for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH V2 06/22] i965/gen9: Set tiled resource mode for the miptree
On Fri, Apr 17, 2015 at 04:51:27PM -0700, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/i965/brw_tex_layout.c| 2 ++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 ++
2 files changed, 8 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 68c6634..19ff5b8 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -540,6 +540,8 @@ brw_miptree_layout(struct brw_context *brw,
{
bool gen6_hiz_or_stencil = false;
+ mt-tr_mode = INTEL_MIPTREE_TRMODE_NONE;
+
if (brw-gen == 6 mt-array_layout == ALL_SLICES_AT_EACH_LOD) {
const GLenum base_format = _mesa_get_format_base_format(mt-format);
gen6_hiz_or_stencil = _mesa_is_depth_or_stencil_format(base_format);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index b03ffe7..2669817 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -338,6 +338,7 @@ struct intel_mipmap_tree
uint32_t pitch; /** pitch in bytes. */
uint32_t tiling; /** One of the I915_TILING_* flags */
+ uint32_t tr_mode; /** One of the INTEL_MIPTREE_TRMODE_* flags */
/* Effectively the key:
*/
@@ -503,6 +504,11 @@ enum intel_miptree_tiling_mode {
INTEL_MIPTREE_TILING_NONE,
};
+/* Tile resource modes */
+#define INTEL_MIPTREE_TRMODE_NONE0
+#define INTEL_MIPTREE_TRMODE_YF 1
+#define INTEL_MIPTREE_TRMODE_YS 2
The idea (well part of it) with the kernel's fb modifier we've added for
kernel-side Y-tiling scanout support was that userspace could reuse these
too. Doesn't matter for driver-internal usage, but will be important for
buffer sharing with the compositor. But I guess that can be changed once
that happens.
Aside: The kernel lacks a define for Ys right now, but that was simply an
oversight since mesa patches didn't exist back then yet.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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[Mesa-dev] [PATCH] i965: Document brw_mask_reg().
---
src/mesa/drivers/dri/i965/brw_reg.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h
b/src/mesa/drivers/dri/i965/brw_reg.h
index c03a8ae..81a9320 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -778,7 +778,11 @@ brw_flag_reg(int reg, int subreg)
BRW_ARF_FLAG + reg, subreg);
}
-
+/**
+ * Return the mask register present in Gen4-5, or the related register present
+ * in Gen7.5 and later hardware referred to as channel enable register in
+ * the documentation.
+ */
static inline struct brw_reg
brw_mask_reg(unsigned subnr)
{
--
2.3.5
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Re: [Mesa-dev] [RFC 0/6] i965: INTEL_performance_query re-work
On 06/05/15 17:02, Daniel Vetter wrote: On Wed, May 06, 2015 at 10:36:15AM +0200, Samuel Pitoiset wrote: On 05/06/2015 02:53 AM, Robert Bragg wrote: As we've learned more about the observability capabilities of Gen graphics we've found that it's not enough to only try and configure the OA unit from userspace without any dedicated support from the kernel. Hi Robert, Yeah, this is the same idea for performance counters on Nouveau. We also need to implement a dedicated support from the kernel for configuring/sampling hardware performance counters. Then, we can expose a list of available counters through a set of ioctls. Thus, mesa configures a hardware event by sending its configuration to the kernel. Well the big difference here is that i915 won't have it's own set of ioctls, but instead reuses the perfectly capable perf subsystem. Rob has done some minor additions (which are acked by perf maintainers already) to make that feasible. Imo that's the way to go instead of reinventing a new abi wheel in each driver. As it is currently the i965 backends for both AMD_performance_monitor and INTEL_performance_query aren't able to report normalized metrics useful to application developers due to the limitations of configuring the OA unit from userspace via LRIs. More recently we've developed a perf PMU (performance monitoring unit) driver within the drm i915 driver (i915_oa) that lets userspace configure and open an event fd via the perf_event_open syscall which provides us a more complete interface for configuring the Gen graphics OA unit. With help from the kernel we can support periodic sampling (where the hardware writes reports into a gpu mapped circular buffer that we can forward as perf samples), we can deal with the clock gating + PM limitations imposed by the observability hw and also manage + maintain the selection of performance counters. The perf_event_open(2) man page is a good starting point for anyone wanting to learn about the Linux perf interface. Something to beware of is that there's currently no precedent upstream for exposing device metrics via a perf PMU and although early feedback was sought for this work, some of this may be subject to change based on feedback from the core perf maintainers as well as the i915 drm driver maintainers. Performance counters on Nouveau won't be exposed (in the near future) by perf since they need to be tied to the command stream of the GPU, and perf only works with ioctl calls. Well same for i915, except that there's the timer-based one on top. I still think using perf to configure the pmu and then submitting the in-cs sample points normally from mesa is the way to go, even if your hw lacks a timer-based sample functionality. This is not really acceptable for nouveau because, unlike Intel GPUs, only a very limited amount of counters can be sampled/configured at the same time (4 per clock domain on some models). It is thus very important to support fast round-robbin between them, like mandated by the nvidia perfkit SDK. Using the perf interface to set up the counters and then sampling them from software methods in the command stream will lead to every odd frame not being able to sample any data unless we allow for some major stalling of the pipeline which would render the whole profiling very painfully slow. The solution nouveau chose was to have an ioctl to create an handle hiding all the configuration needed for monitoring a particular event and then reference this handle in the command stream whenever this event needs to be configured/monitored. The kernel will thus program the counters as late as possible. This allows nouveau to always being able to use all the counters at the same time and still change the configuration after each draw call without stalling as much the pipeline. Perf's interface is not suited to do that, IIRC. Now speaking about the ioctl, nouveau will not need to introduce another ioctl as there is an interface called nvif that is meant to expose the internal objects of nouveau to the userspace through a single ioctl (or to a VM through hypercalls). The userspace code for nvif has been in review for quite a lot of time. I hope it will be reviewed more publicly soon! I may need to step up and have a look at it though. At least on some chipsets, it is possible to have a timer-based polling but the frequency is not configurable. I hope this makes our plans more understandable. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] draw: (trivial) fix out-of-bounds vector initialization
On 05/06/2015 08:05 AM, srol...@vmware.com wrote:
From: Roland Scheidegger srol...@vmware.com
Was off-by-one. llvm says inserting an element with an index higher than the
number of elements yields undefined results. Previously such inserts were
ignored but as of llvm revision 235854 the vector gets replaced with undef,
causing failures.
This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in
https://llvm.org/bugs/show_bug.cgi?id=23424.
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/auxiliary/draw/draw_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/draw/draw_llvm.c
b/src/gallium/auxiliary/draw/draw_llvm.c
index 7150611..b9e55af 100644
--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -2048,7 +2048,7 @@ generate_mask_value(struct draw_gs_llvm_variant *variant,
num_prims = lp_build_broadcast(gallivm, lp_build_vec_type(gallivm,
mask_type),
variant-num_prims);
- for (i = 0; i = gs_type.length; i++) {
+ for (i = 0; i gs_type.length; i++) {
LLVMValueRef idx = lp_build_const_int32(gallivm, i);
mask_val = LLVMBuildInsertElement(builder, mask_val, idx, idx, );
}
Reviewed-by: Brian Paul bri...@vmware.com
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[Mesa-dev] New stable-branch 10.5 candidate pushed
Hello list, The candidate for the Mesa 10.5.5 is now available. The current patch queue is as follows: - 10 queued - 5 nominated (outstanding) - and 0 rejected (obsolete) patches The queue consists mostly of nouveau and i965 fixes. Take a look at section Mesa stable queue for more information. Testing --- The following results are against piglit 305ecc3ac89. Changes - classic i965(snb) --- None. Changes - swrast classic None. Changes - gallium softpipe -- None. Fixes: - spec + arb_texture_buffer_object + formats (vs, 3.1 core) + GL_RG32F fail pass Changes - gallium llvmpipe (LLVM 3.6) - None. Testing reports/general approval Any testing reports (or general approval of the state of the branch) will be greatly appreciated. Trivial merge conflicts --- None. The plan is to have 10.5.5 this Friday(8th of May). If you have any questions or comments that you would like to share before the release, please go ahead. Cheers, Emil Mesa stable queue - Nominated (5) = Alejandro Piñeiro (1): glsl: properly setting var-data.binding if explicit_binding is true Boyan Ding (1): i915: Add XRGB format to intel_screen_make_configs Brian Paul (1): configure: don't try to build gallium DRI drivers if --disable-dri is set Roland Scheidegger (1): draw: (trivial) fix out-of-bounds vector initialization Tom Stellard (1): clover: Update the wait_count of the correct event when chaining events Queued (10) === Boyan Ding (1): i965: Add XRGB format to intel_screen_make_configs Emil Velikov (2): docs: Add sha256 sums for the 10.5.4 release r300: do not link against libdrm_intel Ilia Mirkin (4): nvc0/ir: flush denorms to zero in non-compute shaders gk110/ir: fix set with a register dest to not auto-set the abs flag nvc0/ir: fix predicated PFETCH emission nv50/ir: fix asFlow() const helper for OP_JOIN Kenneth Graunke (2): i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions. i965: Disallow linear blits that are not cacheline aligned. Roland Scheidegger (1): draw: fix prim ids when there's no gs ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 --- Comment #13 from Roland Scheidegger srol...@vmware.com --- Does this happen with other gallium based drivers (softpipe for instance, though it might hit all the same code)? I'm afraid noone will look into it without an apitrace trace (or some sample code like a piglit test). -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 --- Comment #10 from cgerlac...@gmail.com --- Created attachment 115588 -- https://bugs.freedesktop.org/attachment.cgi?id=115588action=edit all clipped triangles are within the viewport -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 cgerlac...@gmail.com changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED |--- --- Comment #9 from cgerlac...@gmail.com --- I also observe this problem, but I have used a really new mesa version: OpenGL 3.0 Mesa 10.5.3 Gallium 0.4 on llvmpipe (LLVM 3.6, 256 bits) To get an impression how the clipping looks, I have attached some snapshots: * snapshot_1.png: clipping is active (axis aligned clipping cube) and all possibly clipped triangles are in the viewport - clipping works as expected. * snapshot_2.png/snapshot_3.png: after zooming in a little bit, most triangles that have a clipped vertex are clipped completely. Additional information: * We do the clipping within a GLSL shader with gl_ClipVertex (not fixed function). * Reproducible on windows and linux llvmpipe version - I did not expect any difference, but who knows... * Using nvidia hardware rendering with the same shader code looks correct. * Because the clipping is working correct when all triangles are within the viewport, I don't expect a shader problem. -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 80183] [llvmpipe] triangles with vertices that map to raster positions viewport width/height are not displayed
https://bugs.freedesktop.org/show_bug.cgi?id=80183 cgerlac...@gmail.com changed: What|Removed |Added Attachment #115590|text/plain |image/png mime type|| -- You are receiving this mail because: You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] i965: Revision of texture surface setup refactoring
On Wed, May 06, 2015 at 02:56:53PM +0300, Francisco Jerez wrote: Hi! Topi Pohjolainen topi.pohjolai...@intel.com writes: This series moves all the decision making of values into common hardware independent dispatcher while leaving the hardware specific logic to deal with formatting only. Curro needed a similar refactor for gen7 and gen8. However, that makes it a harder to apply the changes I needed that expand all the way to gen4. Ken helped me to notice that my refactoring can in fact address both relatively easily. For context, I added the patch from Curro that makes use of the texture surface setup logic along with a small patch making it compatible with the surface state refactoring found here. Curro, what do you think? I'm not too happy with reverting your work but overall this way it becomes cleaner, I think. *Shrug*, it seems weird to me that you opted to revert my patches even though they are closer to where you want to get at than it was before my patches. This is the current interface: void (*emit_texture_surface_state)(struct brw_context *brw, struct intel_mipmap_tree *mt, GLenum target, unsigned min_layer, unsigned max_layer, unsigned min_level, unsigned max_level, unsigned format, unsigned swizzle, uint32_t *surf_offset, bool rw, bool for_gather); This is the old interface we both wanted to get rid of: void (*update_texture_surface)(struct gl_context *ctx, unsigned unit, uint32_t *surf_offset, bool for_gather); This is the interface introduced by this series: void (*update_texture_surface)(struct brw_context *brw, const struct intel_mipmap_tree *mt, GLenum target, uint32_t effective_depth, uint32_t min_layer, uint32_t min_lod, uint32_t mip_count, uint32_t tex_format, int swizzle, uint32_t *surf_offset, bool for_gather); AFAIK the only difference between your proposal and mine is the name (IMHO emit_texture_surface_state is more consistent with the other emit_*_surface_state hooks with similar semantics), the ordering of arguments (and I find the ordering and naming of your effective_depth, min_layer, min_lod and mip_count arguments rather asymmetric, they are both pairs determining an interval of either layers or levels, it doesn't make much sense to me that they are named and ordered inconsistently in your series), the fact that you're using a min level/layer index + count instead of half-open intervals like I did, and the fact that you're missing an rw argument which is required for ARB_shader_image_load_store support. I fail to see why a revert is justified or desirable, and I fail to see how your proposal will work better on Gen4, since the difference between the two interfaces mostly cosmetic. I'm just looking at the end result. Here we don't need to introduce new entry to the jump table, the changes are kept to the minimum and we both get applicable interface. I didn't really intentionally choose between the interfaces - this was the outcome of trying to keep it as unintrusive as I could. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] mesa: support compute stage in _mesa_program_resource_prop
On Wed, May 6, 2015 at 2:36 AM, Tapani Pälli tapani.pa...@intel.com wrote:
Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.
Signed-off-by: Tapani Pälli tapani.pa...@intel.com
---
src/mesa/main/shader_query.cpp | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/src/mesa/main/shader_query.cpp b/src/mesa/main/shader_query.cpp
index d2ca49b..6e46553 100644
--- a/src/mesa/main/shader_query.cpp
+++ b/src/mesa/main/shader_query.cpp
@@ -809,6 +809,8 @@ stage_from_enum(GLenum ref)
return MESA_SHADER_GEOMETRY;
case GL_REFERENCED_BY_FRAGMENT_SHADER:
return MESA_SHADER_FRAGMENT;
+ case GL_REFERENCED_BY_COMPUTE_SHADER:
+ return MESA_SHADER_COMPUTE;
default:
assert(!shader stage not supported);
return MESA_SHADER_STAGES;
@@ -824,6 +826,10 @@ is_resource_referenced(struct gl_shader_program *shProg,
struct gl_program_resource *res,
GLuint index, uint8_t stage)
{
+ /* First, check if we even have such a stage active. */
+ if (!shProg-_LinkedShaders[stage])
+ return false;
+
if (res-Type == GL_ATOMIC_COUNTER_BUFFER)
return RESOURCE_ATC(res)-StageReferences[stage];
@@ -979,6 +985,9 @@ _mesa_program_resource_prop(struct gl_shader_program
*shProg,
case GL_NUM_ACTIVE_VARIABLES:
case GL_ACTIVE_VARIABLES:
return get_buffer_property(shProg, res, prop, val, caller);
+ case GL_REFERENCED_BY_COMPUTE_SHADER:
+ if (!ctx-Extensions.ARB_compute_shader)
+ goto invalid_enum;
Please use _mesa_has_compute_shaders(ctx) here -- the condition is
more complex than just the ext check to determine if you actually have
compute support.
With that fixed,
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
case GL_REFERENCED_BY_VERTEX_SHADER:
case GL_REFERENCED_BY_GEOMETRY_SHADER:
case GL_REFERENCED_BY_FRAGMENT_SHADER:
@@ -1015,17 +1024,18 @@ _mesa_program_resource_prop(struct gl_shader_program
*shProg,
case GL_IS_PER_PATCH:
case GL_REFERENCED_BY_TESS_CONTROL_SHADER:
case GL_REFERENCED_BY_TESS_EVALUATION_SHADER:
- /* GL_ARB_compute_shader */
- case GL_REFERENCED_BY_COMPUTE_SHADER:
default:
- _mesa_error(ctx, GL_INVALID_ENUM, %s(%s prop %s), caller,
- _mesa_lookup_enum_by_nr(res-Type),
- _mesa_lookup_enum_by_nr(prop));
- return 0;
+ goto invalid_enum;
}
#undef VALIDATE_TYPE
+invalid_enum:
+ _mesa_error(ctx, GL_INVALID_ENUM, %s(%s prop %s), caller,
+ _mesa_lookup_enum_by_nr(res-Type),
+ _mesa_lookup_enum_by_nr(prop));
+ return 0;
+
invalid_operation:
_mesa_error(ctx, GL_INVALID_OPERATION, %s(%s prop %s), caller,
_mesa_lookup_enum_by_nr(res-Type),
--
2.1.0
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[Mesa-dev] [Bug 90354] Software rendering cuses X BadMatch error
https://bugs.freedesktop.org/show_bug.cgi?id=90354 Bug ID: 90354 Summary: Software rendering cuses X BadMatch error Product: Mesa Version: git Hardware: All OS: All Status: NEW Severity: normal Priority: medium Component: GLX Assignee: mesa-dev@lists.freedesktop.org Reporter: i.gnatenko.br...@gmail.com QA Contact: mesa-dev@lists.freedesktop.org Created attachment 115606 -- https://bugs.freedesktop.org/attachment.cgi?id=115606action=edit backtrace Original report: https://bugzilla.redhat.com/show_bug.cgi?id=1206960 -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Change the order of conditions tested in if
On Wed, May 6, 2015 at 2:19 PM, Matt Turner matts...@gmail.com wrote: On Wed, Apr 15, 2015 at 11:46 AM, Anuj Phogat anuj.pho...@gmail.com wrote: Reduces the number of conditions tested in if to one in case of non-integer formats. Makes no functional changes. Signed-off-by: Anuj Phogat anuj.pho...@gmail.com --- src/mesa/drivers/dri/i965/brw_surface_formats.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 7261c01..f04bac5 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -683,9 +683,10 @@ brw_render_target_supported(struct brw_context *brw, * available to fake it like we do for XRGB. Force them to being * unsupported. */ - if ((rb-_BaseFormat != GL_RGBA + if (_mesa_is_format_integer_color(format) + (rb-_BaseFormat != GL_RGBA rb-_BaseFormat != GL_RG - rb-_BaseFormat != GL_RED) _mesa_is_format_integer_color(format)) + rb-_BaseFormat != GL_RED)) While you're modifying this line, remove the tab. and I also removed the unnecessary braces around rb-_BaseFormat checks. Reviewed-by: Matt Turner matts...@gmail.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glapi: Add positional argument specifier.
On Wednesday, May 06, 2015 12:48:30 PM Vinson Lee wrote:
Fix build error introduced with commit 1c5a57a glapi/es3.1: Add support
for GLES versions 3.0 with Python 2.7.
File src/mapi/glapi/gen/gl_genexec.py, line 230, in module
printer.Print(api)
File src/mapi/glapi/gen/gl_XML.py, line 120, in Print
self.printBody(api)
File src/mapi/glapi/gen/gl_genexec.py, line 187, in printBody
condition_parts.append('(ctx-API == API_OPENGLES2 ctx-Version =
{})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/mapi/glapi/gen/gl_genexec.py |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mapi/glapi/gen/gl_genexec.py
b/src/mapi/glapi/gen/gl_genexec.py
index e58cdfc..4e76fe3 100644
--- a/src/mapi/glapi/gen/gl_genexec.py
+++ b/src/mapi/glapi/gen/gl_genexec.py
@@ -184,7 +184,7 @@ class PrintCode(gl_XML.gl_print_base):
condition_parts.append('ctx-API == API_OPENGLES')
if 'es2' in f.api_map:
if f.api_map['es2'] 2.0:
-condition_parts.append('(ctx-API == API_OPENGLES2
ctx-Version = {})'.format(int(f.api_map['es2'] * 10)))
+condition_parts.append('(ctx-API == API_OPENGLES2
ctx-Version = {0})'.format(int(f.api_map['es2'] * 10)))
else:
condition_parts.append('ctx-API == API_OPENGLES2')
if not condition_parts:
Do we actually care at this point?
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
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Re: [Mesa-dev] [PATCH 0/7] i965: Enable EGL_KHR_fence_sync
On Friday, May 01, 2015 01:01:55 PM Chad Versace wrote: The first 6 patches are small cleanups. The real implementation is patch 7/7. Enabling EGL_KHR_fence_sync also gives us EGL_KHR_wait_sync for free. This series lives on the tag: git://github.com/chadversary/mesa i965-egl-khr-fence-sync-v01 Chad Versace (7): egl/dri2: Check return value of __DRI2fence::create_fence() i965/sync: Don't crash when deleting sync object i915/sync: Don't crash when deleting sync object i965/sync: Return NULL when calloc fails i915/sync: Return early when calloc fails i965/sync: Replace prefix 'intel_sync' - 'intel_gl_sync' i965/sync: Implement DRI2_Fence extension docs/relnotes/10.6.0.html | 4 +- src/egl/drivers/dri2/egl_dri2.c | 7 + src/mesa/drivers/dri/i915/intel_syncobj.c | 6 +- src/mesa/drivers/dri/i965/brw_context.h | 7 - src/mesa/drivers/dri/i965/intel_screen.c | 2 + src/mesa/drivers/dri/i965/intel_screen.h | 4 + src/mesa/drivers/dri/i965/intel_syncobj.c | 230 +++--- 7 files changed, 198 insertions(+), 62 deletions(-) Series is: Reviewed-by: Kenneth Graunke kenn...@whitecape.org signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 1/7] egl/dri2: Check return value of __DRI2fence::create_fence()
On Friday, May 01, 2015 01:01:56 PM Chad Versace wrote:
From: Chad Versace c...@kiwitree.net
If it returns NULL, then return early with an error.
Cc: Marek Olšák marek.ol...@amd.com
---
src/egl/drivers/dri2/egl_dri2.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 34d6bfe..c2a856f 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -2232,6 +2232,13 @@ dri2_create_sync(_EGLDriver *drv, _EGLDisplay *dpy,
switch (type) {
case EGL_SYNC_FENCE_KHR:
dri2_sync-fence =
dri2_dpy-fence-create_fence(dri2_ctx-dri_context);
+ if (!dri2_sync-fence) {
+ /* Why did it fail? DRI doesn't return an error code, so we emit
+ * a generic EGL error that doesn't communicate user error. */
+ _eglError(EGL_BAD_ALLOC, eglCreateSyncKHR);
*/ goes on its own line in Mesa.
+ free(dri2_sync);
+ return NULL;
+ }
break;
case EGL_SYNC_CL_EVENT_KHR:
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Re: [Mesa-dev] [PATCH] i965/wm/gen6: Refactor state setup
On Wednesday, May 06, 2015 10:41:30 PM Topi Pohjolainen wrote: CC: Kenneth Graunke kenn...@whitecape.org Signed-off-by: Topi Pohjolainen topi.pohjolai...@intel.com --- src/mesa/drivers/dri/i965/brw_state.h | 11 +++ src/mesa/drivers/dri/i965/gen6_wm_state.c | 111 ++ 2 files changed, 77 insertions(+), 45 deletions(-) Thanks, I like this better. Reviewed-by: Kenneth Graunke kenn...@whitecape.org signature.asc Description: This is a digitally signed message part. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965: Remove unused variables
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/i965/brw_cs.cpp | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp
b/src/mesa/drivers/dri/i965/brw_cs.cpp
index e2f3d63..70731e4 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
@@ -212,11 +212,9 @@ brw_codegen_cs_prog(struct brw_context *brw,
static void
brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key)
{
- struct gl_context *ctx = brw-ctx;
/* BRW_NEW_COMPUTE_PROGRAM */
const struct brw_compute_program *cp =
(struct brw_compute_program *) brw-compute_program;
- const struct gl_program *prog = (struct gl_program *) cp;
memset(key, 0, sizeof(*key));
--
1.9.3
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[Mesa-dev] [Bug 90354] Software rendering cuses X BadMatch error
https://bugs.freedesktop.org/show_bug.cgi?id=90354 --- Comment #1 from Igor Gnatenko i.gnatenko.br...@gmail.com --- Looks like a bug in swrast. The error was 'BadMatch (invalid parameter attributes)'. (Details: serial 801 error_code 8 request_code 72 (core protocol) minor_code 0) (Note to programmers: normally, X errors are reported asynchronously; that is, you will receive the error a while after causing it. To debug your program, run it with the GDK_SYNCHRONIZE environment variable to change this behavior. You can then get a meaningful backtrace from your debugger if you break on the gdk_x_error() function.) #5 0x743c43fd in _XError (dpy=dpy@entry=0x557981a0, rep=rep@entry=0x564a4650) at XlibInt.c:1429 #6 0x743c1287 in handle_error (dpy=0x557981a0, err=0x564a4650, in_XReply=optimized out) at xcb_io.c:213 #7 0x743c1345 in handle_response (dpy=dpy@entry=0x557981a0, response=0x564a4650, in_XReply=in_XReply@entry=1) at xcb_io.c:325 #8 0x743c2300 in _XReply (dpy=dpy@entry=0x557981a0, rep=rep@entry=0x7fffd2e0, extra=extra@entry=0, discard=discard@entry=1) at xcb_io.c:627 #9 0x743bdc3d in XSync (dpy=0x557981a0, discard=discard@entry=0) at Sync.c:44 #10 0x743bdcdb in _XSyncFunction (dpy=optimized out) at Synchro.c:35 #11 0x743b70fe in XPutImage (dpy=0x557981a0, d=27263047, gc=0x55dc2840, image=image@entry=0x55eb1050, req_xoffset=req_xoffset@entry=0, req_yoffset=optimized out, req_yoffset@entry=0, x=0, y=0, req_width=704, req_height=384) at PutImage.c:1022 #12 0x7fffeb2b45d7 in swrastPutImage2 (draw=optimized out, op=optimized out, x=optimized out, y=optimized out, w=optimized out, h=optimized out, stride=0, data=0x7fffb4438040 , loaderPrivate=0x55dc2720) at drisw_glx.c:166 #13 0x7fffeb2b4603 in swrastPutImage (draw=optimized out, op=optimized out, x=optimized out, y=optimized out, w=optimized out, h=optimized out, data=0x7fffb4438040 , loaderPrivate=0x55dc2720) at drisw_glx.c:176 #14 0x7fffdd611ce6 in drisw_put_image (height=optimized out, width=optimized out, data=optimized out, dPriv=optimized out) at drisw.c:70 #15 0x7fffdd611ce6 in drisw_put_image (drawable=optimized out, data=optimized out, width=optimized out, height=optimized out) at drisw.c:113 #16 0x7fffdd6123ae in drisw_swap_buffers (sub_box=0x0, ptex=0x562f65d0, dPriv=0x55eae4e0) at drisw.c:136 #17 0x7fffdd6123ae in drisw_swap_buffers (ptex=0x562f65d0, dPriv=0x55eae4e0) at drisw.c:153 #18 0x7fffdd6123ae in drisw_swap_buffers (dPriv=0x55eae4e0) at drisw.c:180 #19 0x7fffeb2b40a5 in driswSwapBuffers (pdraw=0x55dc2720, target_msc=optimized out, divisor=optimized out, remainder=optimized out, flush=optimized out) at drisw_glx.c:552 #20 0x75c0aea7 in _cogl_winsys_onscreen_swap_buffers_with_damage (onscreen=0x55eae150, rectangles=optimized out, n_rectangles=optimized out) at winsys/cogl-winsys-glx.c:1995 #21 0x75bfa29e in cogl_onscreen_swap_buffers_with_damage (onscreen=optimized out, rectangles=optimized out, n_rectangles=optimized out) at ./cogl-onscreen.c:315 #22 0x7629e195 in clutter_stage_cogl_redraw (stage_window=0x55c981a0) at cogl/clutter-stage-cogl.c:641 #23 0x762a0f4a in clutter_stage_gdk_redraw (stage_window=0x55c981a0) at gdk/clutter-stage-gdk.c:468 #24 0x7630da57 in _clutter_stage_do_update (stage=0x55b2e9c0 [ClutterStage]) at clutter-stage.c:1130 #25 0x7630da57 in _clutter_stage_do_update (stage=stage@entry=0x55b2e9c0 [ClutterStage]) at clutter-stage.c:1186 #26 0x762a0905 in clutter_master_clock_gdk_update (master_clock=0x560ebdc0 [ClutterMasterClockGdk], stage=0x55b2e9c0 [ClutterStage]) at gdk/clutter-master-clock-gdk.c:223 #27 0x762a0905 in clutter_master_clock_gdk_update (frame_clock=0x557c2df0 [GdkFrameClockIdle], master_clock=0x560ebdc0 [ClutterMasterClockGdk]) at gdk/clutter-master-clock-gdk.c:280 -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] glapi: Add positional argument specifier.
On 05/06/2015 12:48 PM, Vinson Lee wrote:
Fix build error introduced with commit 1c5a57a glapi/es3.1: Add support
for GLES versions 3.0 with Python 2.7.
File src/mapi/glapi/gen/gl_genexec.py, line 230, in module
printer.Print(api)
File src/mapi/glapi/gen/gl_XML.py, line 120, in Print
self.printBody(api)
File src/mapi/glapi/gen/gl_genexec.py, line 187, in printBody
condition_parts.append('(ctx-API == API_OPENGLES2 ctx-Version =
{})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format
Signed-off-by: Vinson Lee v...@freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90346
---
src/mapi/glapi/gen/gl_genexec.py |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mapi/glapi/gen/gl_genexec.py
b/src/mapi/glapi/gen/gl_genexec.py
index e58cdfc..4e76fe3 100644
--- a/src/mapi/glapi/gen/gl_genexec.py
+++ b/src/mapi/glapi/gen/gl_genexec.py
@@ -184,7 +184,7 @@ class PrintCode(gl_XML.gl_print_base):
condition_parts.append('ctx-API == API_OPENGLES')
if 'es2' in f.api_map:
if f.api_map['es2'] 2.0:
-condition_parts.append('(ctx-API == API_OPENGLES2
ctx-Version = {})'.format(int(f.api_map['es2'] * 10)))
+condition_parts.append('(ctx-API == API_OPENGLES2
ctx-Version = {0})'.format(int(f.api_map['es2'] * 10)))
else:
condition_parts.append('ctx-API == API_OPENGLES2')
if not condition_parts:
I'm pretty surprised that this is the only place in the tree to suffer
from this. I have some more patches that use this idiom, but I'll
change them before sending them to the list.
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
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Re: [Mesa-dev] [PATCH] glapi: Add positional argument specifier.
On 05/06/2015 03:45 PM, Kenneth Graunke wrote:
On Wednesday, May 06, 2015 12:48:30 PM Vinson Lee wrote:
Fix build error introduced with commit 1c5a57a glapi/es3.1: Add support
for GLES versions 3.0 with Python 2.7.
File src/mapi/glapi/gen/gl_genexec.py, line 230, in module
printer.Print(api)
File src/mapi/glapi/gen/gl_XML.py, line 120, in Print
self.printBody(api)
File src/mapi/glapi/gen/gl_genexec.py, line 187, in printBody
condition_parts.append('(ctx-API == API_OPENGLES2 ctx-Version =
{})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/mapi/glapi/gen/gl_genexec.py |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mapi/glapi/gen/gl_genexec.py
b/src/mapi/glapi/gen/gl_genexec.py
index e58cdfc..4e76fe3 100644
--- a/src/mapi/glapi/gen/gl_genexec.py
+++ b/src/mapi/glapi/gen/gl_genexec.py
@@ -184,7 +184,7 @@ class PrintCode(gl_XML.gl_print_base):
condition_parts.append('ctx-API == API_OPENGLES')
if 'es2' in f.api_map:
if f.api_map['es2'] 2.0:
-condition_parts.append('(ctx-API == API_OPENGLES2
ctx-Version = {})'.format(int(f.api_map['es2'] * 10)))
+condition_parts.append('(ctx-API == API_OPENGLES2
ctx-Version = {0})'.format(int(f.api_map['es2'] * 10)))
else:
condition_parts.append('ctx-API == API_OPENGLES2')
if not condition_parts:
Do we actually care at this point?
Depends on whether or not you care about CentOS 6 or whatever version
RHEL it is based on. :(
https://bugs.freedesktop.org/show_bug.cgi?id=90346
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
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Re: [Mesa-dev] [PATCH 5/5] nir: Allow feq/fne/ieq/ine to be optimized with inot.
On Wed, 06 May 2015 23:12:54 +0200, Matt Turner matts...@gmail.com wrote:
instructions in affected programs: 380 - 376 (-1.05%)
helped:2
---
Did we just completely forget these in commit 391fb32b, or is there a
reason to not include them?
src/glsl/nir/nir_opt_algebraic.py | 4
1 file changed, 4 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index b0a1f24..400d60e 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -83,8 +83,12 @@ optimizations = [
# Comparison simplifications
(('inot', ('flt', a, b)), ('fge', a, b)),
(('inot', ('fge', a, b)), ('flt', a, b)),
+ (('inot', ('feq', a, b)), ('fne', a, b)),
+ (('inot', ('fne', a, b)), ('feq', a, b)),
These two will produce inverted results for NaN inputs. GLSL 4.5 spec
doesn't mention requiring ieee754 compliant comparison operators though so
probably okay.
(('inot', ('ilt', a, b)), ('ige', a, b)),
(('inot', ('ige', a, b)), ('ilt', a, b)),
+ (('inot', ('ieq', a, b)), ('ine', a, b)),
+ (('inot', ('ine', a, b)), ('ieq', a, b)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('bcsel', ('flt', a, b), a, b), ('fmin', a, b)),
(('bcsel', ('flt', a, b), b, a), ('fmax', a, b)),
Patches 1-5 are
Reviewed-by: Glenn Kennard glenn.kenn...@gmail.com
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Re: [Mesa-dev] [PATCH] i965: Remove unused variables
Whoops, these should have been added in a later (not yet sent to list)
patch. (I need to look into posting those patches! :)
Reviewed-by: Jordan Justen jordan.l.jus...@intel.com
On 2015-05-06 15:14:42, Anuj Phogat wrote:
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
src/mesa/drivers/dri/i965/brw_cs.cpp | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_cs.cpp
b/src/mesa/drivers/dri/i965/brw_cs.cpp
index e2f3d63..70731e4 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cs.cpp
@@ -212,11 +212,9 @@ brw_codegen_cs_prog(struct brw_context *brw,
static void
brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key)
{
- struct gl_context *ctx = brw-ctx;
/* BRW_NEW_COMPUTE_PROGRAM */
const struct brw_compute_program *cp =
(struct brw_compute_program *) brw-compute_program;
- const struct gl_program *prog = (struct gl_program *) cp;
memset(key, 0, sizeof(*key));
--
1.9.3
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Re: [Mesa-dev] [PATCH 5/5] nir: Allow feq/fne/ieq/ine to be optimized with inot.
On 05/06/2015 02:12 PM, Matt Turner wrote:
instructions in affected programs: 380 - 376 (-1.05%)
helped:2
---
Did we just completely forget these in commit 391fb32b, or is there a
reason to not include them?
I was recently wondering this as well. There are similar omissions in
late_optimizations.
src/glsl/nir/nir_opt_algebraic.py | 4
1 file changed, 4 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index b0a1f24..400d60e 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -83,8 +83,12 @@ optimizations = [
# Comparison simplifications
(('inot', ('flt', a, b)), ('fge', a, b)),
(('inot', ('fge', a, b)), ('flt', a, b)),
+ (('inot', ('feq', a, b)), ('fne', a, b)),
+ (('inot', ('fne', a, b)), ('feq', a, b)),
(('inot', ('ilt', a, b)), ('ige', a, b)),
(('inot', ('ige', a, b)), ('ilt', a, b)),
+ (('inot', ('ieq', a, b)), ('ine', a, b)),
+ (('inot', ('ine', a, b)), ('ieq', a, b)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('bcsel', ('flt', a, b), a, b), ('fmin', a, b)),
(('bcsel', ('flt', a, b), b, a), ('fmax', a, b)),
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[Mesa-dev] [Bug 90346] DispatchSanity_test.GLES2 regression
https://bugs.freedesktop.org/show_bug.cgi?id=90346 Vinson Lee v...@freedesktop.org changed: What|Removed |Added Status|NEEDINFO|NEW --- Comment #2 from Vinson Lee v...@freedesktop.org --- $ ./autogen.sh --disable-dri3 --enable-sysfs --with-dri-drivers=swrast --with-gallium-drivers=swrast $ make $ make check -- You are receiving this mail because: You are the QA Contact for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 5/5] nir: Allow feq/fne/ieq/ine to be optimized with inot.
instructions in affected programs: 380 - 376 (-1.05%)
helped:2
---
Did we just completely forget these in commit 391fb32b, or is there a
reason to not include them?
src/glsl/nir/nir_opt_algebraic.py | 4
1 file changed, 4 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index b0a1f24..400d60e 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -83,8 +83,12 @@ optimizations = [
# Comparison simplifications
(('inot', ('flt', a, b)), ('fge', a, b)),
(('inot', ('fge', a, b)), ('flt', a, b)),
+ (('inot', ('feq', a, b)), ('fne', a, b)),
+ (('inot', ('fne', a, b)), ('feq', a, b)),
(('inot', ('ilt', a, b)), ('ige', a, b)),
(('inot', ('ige', a, b)), ('ilt', a, b)),
+ (('inot', ('ieq', a, b)), ('ine', a, b)),
+ (('inot', ('ine', a, b)), ('ieq', a, b)),
(('fge', ('fneg', ('fabs', a)), 0.0), ('feq', a, 0.0)),
(('bcsel', ('flt', a, b), a, b), ('fmin', a, b)),
(('bcsel', ('flt', a, b), b, a), ('fmax', a, b)),
--
2.0.5
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Re: [Mesa-dev] [PATCH] i965: Change the order of conditions tested in if
On Wed, Apr 15, 2015 at 11:46 AM, Anuj Phogat anuj.pho...@gmail.com wrote: Reduces the number of conditions tested in if to one in case of non-integer formats. Makes no functional changes. Signed-off-by: Anuj Phogat anuj.pho...@gmail.com --- src/mesa/drivers/dri/i965/brw_surface_formats.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 7261c01..f04bac5 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -683,9 +683,10 @@ brw_render_target_supported(struct brw_context *brw, * available to fake it like we do for XRGB. Force them to being * unsupported. */ - if ((rb-_BaseFormat != GL_RGBA + if (_mesa_is_format_integer_color(format) + (rb-_BaseFormat != GL_RGBA rb-_BaseFormat != GL_RG - rb-_BaseFormat != GL_RED) _mesa_is_format_integer_color(format)) + rb-_BaseFormat != GL_RED)) While you're modifying this line, remove the tab. Reviewed-by: Matt Turner matts...@gmail.com ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/5] nir: Recognize (a c || b c) as min(a, b) c.
On 2015-05-06 14:12:53, Matt Turner wrote:
... and (a = c) || (b = c) as max(a, b) = c.
Looks like maybe you could use two commits, since the subject line
overfloweth. Of course, you have shader-db results for them merged. :\
Series Reviewed-by: Jordan Justen jordan.l.jus...@intel.com
Similar to commit 97e6c1b9.
total instructions in shared programs: 6182276 - 6182180 (-0.00%)
instructions in affected programs: 6400 - 6304 (-1.50%)
helped:68
HURT: 4
---
src/glsl/nir/nir_opt_algebraic.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 42f4f47..b0a1f24 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -101,7 +101,9 @@ optimizations = [
(('fsat', ('fsat', a)), ('fsat', a)),
(('fmin', ('fmax', ('fmin', ('fmax', a, 0.0), 1.0), 0.0), 1.0), ('fmin',
('fmax', a, 0.0), 1.0)),
(('ior', ('flt', a, b), ('flt', a, c)), ('flt', a, ('fmax', b, c))),
+ (('ior', ('flt', a, c), ('flt', b, c)), ('flt', ('fmin', a, b), c)),
(('ior', ('fge', a, b), ('fge', a, c)), ('fge', a, ('fmin', b, c))),
+ (('ior', ('fge', a, c), ('fge', b, c)), ('fge', ('fmax', a, b), c)),
(('slt', a, b), ('b2f', ('flt', a, b)), 'options-lower_scmp'),
(('sge', a, b), ('b2f', ('fge', a, b)), 'options-lower_scmp'),
(('seq', a, b), ('b2f', ('feq', a, b)), 'options-lower_scmp'),
--
2.0.5
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[Mesa-dev] [PATCH 1/5] nir: Recognize imul(b2i(a), b2i(b)) as a logical AND.
Four shaders in Unreal 4's Sun Temple are helped, and gain SIMD16
because we avoid an integer multiplication.
instructions in affected programs: 2353 - 2245 (-4.59%)
helped:4
GAINED:4
---
src/glsl/nir/nir_opt_algebraic.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 2a2b956..92928cf 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -101,6 +101,7 @@ optimizations = [
(('seq', a, b), ('b2f', ('feq', a, b)), 'options-lower_scmp'),
(('sne', a, b), ('b2f', ('fne', a, b)), 'options-lower_scmp'),
# Emulating booleans
+ (('imul', ('b2i', a), ('b2i', b)), ('b2i', ('iand', a, b))),
(('fmul', ('b2f', a), ('b2f', b)), ('b2f', ('iand', a, b))),
(('fsat', ('fadd', ('b2f', a), ('b2f', b))), ('b2f', ('ior', a, b))),
(('iand', 'a@bool', 1.0), ('b2f', a)),
--
2.0.5
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[Mesa-dev] [PATCH 3/5] nir: Recognize trivial min/max.
No changes, but does prevent some regressions in the next commit.
---
src/glsl/nir/nir_opt_algebraic.py | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index fda4bd5..42f4f47 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -90,6 +90,12 @@ optimizations = [
(('bcsel', ('flt', a, b), b, a), ('fmax', a, b)),
(('bcsel', ('inot', 'a@bool'), b, c), ('bcsel', a, c, b)),
(('bcsel', a, ('bcsel', a, b, c), d), ('bcsel', a, b, d)),
+ (('fmin', a, a), a),
+ (('fmax', a, a), a),
+ (('imin', a, a), a),
+ (('imax', a, a), a),
+ (('umin', a, a), a),
+ (('umax', a, a), a),
(('fmin', ('fmax', a, 0.0), 1.0), ('fsat', a), '!options-lower_fsat'),
(('fsat', a), ('fmin', ('fmax', a, 0.0), 1.0), 'options-lower_fsat'),
(('fsat', ('fsat', a)), ('fsat', a)),
--
2.0.5
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[Mesa-dev] [PATCH 2/5] nir: Recognize i2b(b2i(x)) as x.
Helps the same set of programs as the previous commit.
instructions in affected programs: 4490 - 4346 (-3.21%)
helped:8
---
src/glsl/nir/nir_opt_algebraic.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 92928cf..fda4bd5 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -188,6 +188,7 @@ optimizations = [
(('fcsel', a, b, b), b),
# Conversions
+ (('i2b', ('b2i', a)), a),
(('f2i', ('ftrunc', a)), ('f2i', a)),
(('f2u', ('ftrunc', a)), ('f2u', a)),
--
2.0.5
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[Mesa-dev] [Bug 90346] DispatchSanity_test.GLES2 regression
https://bugs.freedesktop.org/show_bug.cgi?id=90346 Ian Romanick i...@freedesktop.org changed: What|Removed |Added Status|NEW |NEEDINFO Assignee|mesa-dev@lists.freedesktop. |i...@freedesktop.org |org | --- Comment #1 from Ian Romanick i...@freedesktop.org --- How are you building? I don't observe that error here. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 4/5] nir: Recognize (a c || b c) as min(a, b) c.
... and (a = c) || (b = c) as max(a, b) = c.
Similar to commit 97e6c1b9.
total instructions in shared programs: 6182276 - 6182180 (-0.00%)
instructions in affected programs: 6400 - 6304 (-1.50%)
helped:68
HURT: 4
---
src/glsl/nir/nir_opt_algebraic.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/glsl/nir/nir_opt_algebraic.py
b/src/glsl/nir/nir_opt_algebraic.py
index 42f4f47..b0a1f24 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -101,7 +101,9 @@ optimizations = [
(('fsat', ('fsat', a)), ('fsat', a)),
(('fmin', ('fmax', ('fmin', ('fmax', a, 0.0), 1.0), 0.0), 1.0), ('fmin',
('fmax', a, 0.0), 1.0)),
(('ior', ('flt', a, b), ('flt', a, c)), ('flt', a, ('fmax', b, c))),
+ (('ior', ('flt', a, c), ('flt', b, c)), ('flt', ('fmin', a, b), c)),
(('ior', ('fge', a, b), ('fge', a, c)), ('fge', a, ('fmin', b, c))),
+ (('ior', ('fge', a, c), ('fge', b, c)), ('fge', ('fmax', a, b), c)),
(('slt', a, b), ('b2f', ('flt', a, b)), 'options-lower_scmp'),
(('sge', a, b), ('b2f', ('fge', a, b)), 'options-lower_scmp'),
(('seq', a, b), ('b2f', ('feq', a, b)), 'options-lower_scmp'),
--
2.0.5
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