Re: [Mesa-dev] [PATCH] glsl: rename image_* qualifiers to memory_*

[Andres Gomez]

This is:

Reviewed-by: Andres Gomez 

On Wed, 2017-05-03 at 11:16 +0200, Samuel Pitoiset wrote:
> It doesn't make sense to prefix them with 'image' because
> they are called "Memory Qualifiers" and they can be applied
> to members of storage buffer blocks.
> 
> Signed-off-by: Samuel Pitoiset 
> ---
>  src/compiler/glsl/ast_function.cpp | 10 +++---
>  src/compiler/glsl/ast_to_hir.cpp   | 54 
> +++---
>  src/compiler/glsl/builtin_functions.cpp| 30 -
>  src/compiler/glsl/builtin_variables.cpp| 10 +++---
>  src/compiler/glsl/glsl_to_nir.cpp  | 10 +++---
>  src/compiler/glsl/ir.cpp   | 20 +--
>  src/compiler/glsl/ir.h | 12 +++
>  src/compiler/glsl/link_uniforms.cpp|  4 +--
>  src/compiler/glsl/lower_ubo_reference.cpp  | 12 +++
>  src/compiler/glsl_types.cpp| 20 +--
>  src/compiler/glsl_types.h  | 18 +-
>  src/mesa/state_tracker/st_glsl_to_tgsi.cpp |  6 ++--
>  12 files changed, 103 insertions(+), 103 deletions(-)
> 
> diff --git a/src/compiler/glsl/ast_function.cpp 
> b/src/compiler/glsl/ast_function.cpp
> index 1b90937ec8..bee5f0588b 100644
> --- a/src/compiler/glsl/ast_function.cpp
> +++ b/src/compiler/glsl/ast_function.cpp
> @@ -107,35 +107,35 @@ verify_image_parameter(YYLTYPE *loc, 
> _mesa_glsl_parse_state *state,
>  *  qualifiers. [...] It is legal to have additional qualifiers
>  *  on a formal parameter, but not to have fewer."
>  */
> -   if (actual->data.image_coherent && !formal->data.image_coherent) {
> +   if (actual->data.memory_coherent && !formal->data.memory_coherent) {
>_mesa_glsl_error(loc, state,
> "function call parameter `%s' drops "
> "`coherent' qualifier", formal->name);
>return false;
> }
>  
> -   if (actual->data.image_volatile && !formal->data.image_volatile) {
> +   if (actual->data.memory_volatile && !formal->data.memory_volatile) {
>_mesa_glsl_error(loc, state,
> "function call parameter `%s' drops "
> "`volatile' qualifier", formal->name);
>return false;
> }
>  
> -   if (actual->data.image_restrict && !formal->data.image_restrict) {
> +   if (actual->data.memory_restrict && !formal->data.memory_restrict) {
>_mesa_glsl_error(loc, state,
> "function call parameter `%s' drops "
> "`restrict' qualifier", formal->name);
>return false;
> }
>  
> -   if (actual->data.image_read_only && !formal->data.image_read_only) {
> +   if (actual->data.memory_read_only && !formal->data.memory_read_only) {
>_mesa_glsl_error(loc, state,
> "function call parameter `%s' drops "
> "`readonly' qualifier", formal->name);
>return false;
> }
>  
> -   if (actual->data.image_write_only && !formal->data.image_write_only) {
> +   if (actual->data.memory_write_only && !formal->data.memory_write_only) {
>_mesa_glsl_error(loc, state,
> "function call parameter `%s' drops "
> "`writeonly' qualifier", formal->name);
> diff --git a/src/compiler/glsl/ast_to_hir.cpp 
> b/src/compiler/glsl/ast_to_hir.cpp
> index 20a0f11755..4cb62cdb23 100644
> --- a/src/compiler/glsl/ast_to_hir.cpp
> +++ b/src/compiler/glsl/ast_to_hir.cpp
> @@ -86,17 +86,17 @@ public:
>   return visit_continue;
>  
>ir_variable *var = ir->variable_referenced();
> -  /* We can have image_write_only set on both images and buffer 
> variables,
> +  /* We can have memory_write_only set on both images and buffer 
> variables,
> * but in the former there is a distinction between reads from
> * the variable itself (write_only) and from the memory they point to
> -   * (image_write_only), while in the case of buffer variables there is
> +   * (memory_write_only), while in the case of buffer variables there is
> * no such distinction, that is why this check here is limited to
> * buffer variables alone.
> */
>if (!var || var->data.mode != ir_var_shader_storage)
>   return visit_continue;
>  
> -  if (var->data.image_write_only) {
> +  if (var->data.memory_write_only) {
>   found = var;
>   return visit_stop;
>}
> @@ -947,11 +947,11 @@ do_assignment(exec_list *instructions, struct 
> _mesa_glsl_parse_state *state,
>   error_emitted = true;
>} else if (lhs_var != NULL && (lhs_var->data.read_only ||
>   (lhs_var->data.mode == ir_var_shader_storage &&
> -  lhs_var->data.image_read_only))) {
> - /* We can have image_read_only set on both images and buffer 
> variables,
> +  lhs_var->data.memory_read_only))) {
> +

Re: [Mesa-dev] [PATCH v03 15/38] i965: Add genxml related plumbing in a new genX_state_upload.c file.

[Pohjolainen, Topi]

On Mon, May 01, 2017 at 06:43:03PM -0700, Rafael Antognolli wrote:
> From: Kenneth Graunke 
> 
> v3:
>- Drop aub parameter (Ken)
> 
> Signed-off-by: Kenneth Graunke 

Reviewed-by: Topi Pohjolainen 

> ---
>  src/mesa/drivers/dri/i965/Makefile.sources|  15 ++-
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 109 +++-
>  2 files changed, 119 insertions(+), 5 deletions(-)
>  create mode 100644 src/mesa/drivers/dri/i965/genX_state_upload.c
> 
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index aef1a7a..db55a3f 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -161,19 +161,24 @@ i965_FILES = \
>   libdrm_macros.h
>  
>  i965_gen6_FILES = \
> - genX_blorp_exec.c
> + genX_blorp_exec.c \
> + genX_state_upload.c
>  
>  i965_gen7_FILES = \
> - genX_blorp_exec.c
> + genX_blorp_exec.c \
> + genX_state_upload.c
>  
>  i965_gen75_FILES = \
> - genX_blorp_exec.c
> + genX_blorp_exec.c \
> + genX_state_upload.c
>  
>  i965_gen8_FILES = \
> - genX_blorp_exec.c
> + genX_blorp_exec.c \
> + genX_state_upload.c
>  
>  i965_gen9_FILES = \
> - genX_blorp_exec.c
> + genX_blorp_exec.c \
> + genX_state_upload.c
>  
>  i965_oa_GENERATED_FILES = \
>   brw_oa_hsw.h \
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c 
> b/src/mesa/drivers/dri/i965/genX_state_upload.c
> new file mode 100644
> index 000..ec571d5
> --- /dev/null
> +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> @@ -0,0 +1,109 @@
> +/*
> + * Copyright © 2017 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include 
> +
> +#include "common/gen_device_info.h"
> +#include "genxml/gen_macros.h"
> +
> +#include "brw_context.h"
> +#include "brw_state.h"
> +
> +#include "intel_batchbuffer.h"
> +
> +UNUSED static void *
> +emit_dwords(struct brw_context *brw, unsigned n)
> +{
> +   intel_batchbuffer_begin(brw, n, RENDER_RING);
> +   uint32_t *map = brw->batch.map_next;
> +   brw->batch.map_next += n;
> +   intel_batchbuffer_advance(brw);
> +   return map;
> +}
> +
> +struct brw_address {
> +   struct brw_bo *bo;
> +   uint32_t read_domains;
> +   uint32_t write_domain;
> +   uint32_t offset;
> +};
> +
> +static uint64_t
> +emit_reloc(struct brw_context *brw,
> +   void *location, struct brw_address address, uint32_t delta)
> +{
> +   uint32_t offset = (char *) location - (char *) brw->batch.map;
> +
> +   return brw_emit_reloc(>batch, offset, address.bo,
> + address.offset + delta,
> + address.read_domains,
> + address.write_domain);
> +}
> +
> +#define __gen_address_type struct brw_address
> +#define __gen_user_data struct brw_context
> +
> +static uint64_t
> +__gen_combine_address(struct brw_context *brw, void *location,
> +  struct brw_address address, uint32_t delta)
> +{
> +   if (address.bo == NULL) {
> +  return address.offset + delta;
> +   } else {
> +  return emit_reloc(brw, location, address, delta);
> +   }
> +}
> +
> +#include "genxml/genX_pack.h"
> +
> +#define _brw_cmd_length(cmd) cmd ## _length
> +#define _brw_cmd_length_bias(cmd) cmd ## _length_bias
> +#define _brw_cmd_header(cmd) cmd ## _header
> +#define _brw_cmd_pack(cmd) cmd ## _pack
> +
> +#define brw_batch_emit(brw, cmd, name)  \
> +   for (struct cmd name = { _brw_cmd_header(cmd) }, \
> +*_dst = emit_dwords(brw, _brw_cmd_length(cmd)); \
> +__builtin_expect(_dst != NULL, 1);  \
> +_brw_cmd_pack(cmd)(brw, (void *)_dst, ),   \
> +_dst = NULL)
> +
> +#define brw_batch_emitn(brw, cmd, n) ({  

Re: [Mesa-dev] [PATCH v03 17/38] genxml: Add rules to build gen4, gen45 and ge5.

[Pohjolainen, Topi]

On Thu, May 04, 2017 at 05:49:08AM +0300, Pohjolainen, Topi wrote:
> On Wed, May 03, 2017 at 05:08:12PM -0700, Rafael Antognolli wrote:
> > On Wed, May 03, 2017 at 09:10:10PM +0300, Pohjolainen, Topi wrote:
> > > 
> > > In the subject: s/ge5/gen5/
> > > 
> > > But don't we need to squash this into the previous patch? Alone that patch
> > > won't even link, right?
> > 
> > Yes, you are right, it should be squashed.
> 
> Ok, thanks. I already gave my r-b there before noticing it was broken. So
> now we are good regardging these two.

Now looking at patch 15 I realized that this patch actually can be separate -
we just need to put it between patches 15 and 16. Could you try that?
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[Mesa-dev] [PATCH] i965: Make INTEL_DEBUG=bat decode VS/CLIP/GS/SF/WM/CC_STATE on Gen4-5.

[Kenneth Graunke]

This is something the original decoder did, but I didn't bother with
until now.  I recently had to debug an Ironlake issue, and wanted to
inspect VS_STATE.  So, now it's back.

The other packets in the switch statement are all Gen6/7+, where we
use offsets from dynamic state base address, so we don't need the
gtt_offset subtraction introduced here.  We might want to make a
helper for this hack at some point - perhaps when we introduce the
next occurance.
---
 src/mesa/drivers/dri/i965/intel_batchbuffer.c | 22 +-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c 
b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 154c095aa9f..2818458384d 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -275,7 +275,27 @@ do_batch_dump(struct brw_context *brw)
 
   switch (gen_group_get_opcode(inst) >> 16) {
   case _3DSTATE_PIPELINED_POINTERS:
- /* TODO: Decode Gen4-5 pipelined pointers */
+ /* Note: these Gen4-5 pointers are full relocations rather than
+  * offsets from the start of the batch.  So we need to subtract
+  * gtt_offset (the start of the batch) to obtain an offset we
+  * can add to the map and get at the data.
+  */
+ decode_struct(brw, spec, "VS_STATE", data, gtt_offset,
+   (p[1] & ~0x1fu) - gtt_offset, color);
+ if (p[2] & 1) {
+decode_struct(brw, spec, "GS_STATE", data, gtt_offset,
+  (p[2] & ~0x1fu) - gtt_offset, color);
+ }
+ if (p[3] & 1) {
+decode_struct(brw, spec, "CLIP_STATE", data, gtt_offset,
+  (p[3] & ~0x1fu) - gtt_offset, color);
+ }
+ decode_struct(brw, spec, "SF_STATE", data, gtt_offset,
+   (p[4] & ~0x1fu) - gtt_offset, color);
+ decode_struct(brw, spec, "WM_STATE", data, gtt_offset,
+   (p[5] & ~0x1fu) - gtt_offset, color);
+ decode_struct(brw, spec, "COLOR_CALC_STATE", data, gtt_offset,
+   (p[6] & ~0x3fu) - gtt_offset, color);
  break;
   case _3DSTATE_BINDING_TABLE_POINTERS_VS:
   case _3DSTATE_BINDING_TABLE_POINTERS_HS:
-- 
2.12.2

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Re: [Mesa-dev] [PATCH v03 18/38] i965: Port Gen6+ DEPTH_STENCIL state to genxml.

[Pohjolainen, Topi]

On Mon, May 01, 2017 at 06:43:06PM -0700, Rafael Antognolli wrote:
> From: Kenneth Graunke 
> 
> This emits 3DSTATE_WM_DEPTH_STENCIL on Gen8+ or DEPTH_STENCIL_STATE
> (and the relevant pointer packets) on Gen6-7.5 from a single function.
> 
> v3:
>- Watch for BRW_NEW_BATCH too on gen8+ (Ken)
> 
> Signed-off-by: Kenneth Graunke 
> Signed-off-by: Rafael Antognolli 
> Reviewed-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources|   2 +-
>  src/mesa/drivers/dri/i965/brw_state.h |   2 +-
>  src/mesa/drivers/dri/i965/gen6_depthstencil.c | 114 +--
>  src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c | 118 +---
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 103 -
>  5 files changed, 101 insertions(+), 238 deletions(-)
>  delete mode 100644 src/mesa/drivers/dri/i965/gen6_depthstencil.c
>  delete mode 100644 src/mesa/drivers/dri/i965/gen8_wm_depth_stencil.c
> 
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index 41f4d83..b085251 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -80,7 +80,6 @@ i965_FILES = \
>   gen6_clip_state.c \
>   gen6_constant_state.c \
>   gen6_depth_state.c \
> - gen6_depthstencil.c \
>   gen6_gs_state.c \
>   gen6_multisample_state.c \
>   gen6_queryobj.c \
> @@ -119,7 +118,6 @@ i965_FILES = \
>   gen8_surface_state.c \
>   gen8_viewport_state.c \
>   gen8_vs_state.c \
> - gen8_wm_depth_stencil.c \
>   hsw_queryobj.c \
>   hsw_sol.c \
>   intel_batchbuffer.c \
> diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
> b/src/mesa/drivers/dri/i965/brw_state.h
> index 6403570..7b6d718 100644
> --- a/src/mesa/drivers/dri/i965/brw_state.h
> +++ b/src/mesa/drivers/dri/i965/brw_state.h
> @@ -112,7 +112,6 @@ extern const struct brw_tracked_state gen6_blend_state;
>  extern const struct brw_tracked_state gen6_clip_state;
>  extern const struct brw_tracked_state gen6_sf_and_clip_viewports;
>  extern const struct brw_tracked_state gen6_color_calc_state;
> -extern const struct brw_tracked_state gen6_depth_stencil_state;
>  extern const struct brw_tracked_state gen6_gs_state;
>  extern const struct brw_tracked_state gen6_gs_push_constants;
>  extern const struct brw_tracked_state gen6_gs_binding_table;
> @@ -157,7 +156,6 @@ extern const struct brw_tracked_state gen8_pma_fix;
>  extern const struct brw_tracked_state gen8_ps_blend;
>  extern const struct brw_tracked_state gen8_ps_extra;
>  extern const struct brw_tracked_state gen8_ps_state;
> -extern const struct brw_tracked_state gen8_wm_depth_stencil;
>  extern const struct brw_tracked_state gen8_wm_state;
>  extern const struct brw_tracked_state gen8_raster_state;
>  extern const struct brw_tracked_state gen8_sbe_state;
> diff --git a/src/mesa/drivers/dri/i965/gen6_depthstencil.c 
> b/src/mesa/drivers/dri/i965/gen6_depthstencil.c
> deleted file mode 100644
> index 0f9626c..000
> --- a/src/mesa/drivers/dri/i965/gen6_depthstencil.c
> +++ /dev/null
> @@ -1,114 +0,0 @@
> -/*
> - * Copyright © 2009 Intel Corporation
> - *
> - * Permission is hereby granted, free of charge, to any person obtaining a
> - * copy of this software and associated documentation files (the "Software"),
> - * to deal in the Software without restriction, including without limitation
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> - * and/or sell copies of the Software, and to permit persons to whom the
> - * Software is furnished to do so, subject to the following conditions:
> - *
> - * The above copyright notice and this permission notice (including the next
> - * paragraph) shall be included in all copies or substantial portions of the
> - * Software.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> - * IN THE SOFTWARE.
> - *
> - * Authors:
> - *Eric Anholt 
> - *
> - */
> -
> -#include "intel_batchbuffer.h"
> -#include "intel_fbo.h"
> -#include "brw_context.h"
> -#include "brw_defines.h"
> -#include "brw_state.h"
> -
> -static void
> -gen6_upload_depth_stencil_state(struct brw_context *brw)
> -{
> -   struct gl_context *ctx = >ctx;
> -   struct gen6_depth_stencil_state *ds;
> -   struct intel_renderbuffer *depth_irb;
> -
> -   /* _NEW_BUFFERS */
> -   depth_irb = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
> -
> -   

Re: [Mesa-dev] [PATCH 0/4] Call for testing: Gallium set_index_buffer removal etc.

[Brian Paul]

On 05/01/2017 10:03 AM, Brian Paul wrote:

On 05/01/2017 08:32 AM, Brian Paul wrote:

On 04/28/2017 05:12 PM, Marek Olšák wrote:

Hi,

This series shrinks various gallium structures and removes
set_index_buffer in order to decrease CPU overhead.


PART 1: Performance results

All testing below was done with radeonsi, and I used the drawoverhead
microbenchmark from mesa/demos ported to piglit and using GL 3.0
Compat and GL 3.2 Core (same GL states in both contexts).

1) Performance difference for the removal of set_index_buffer only:

   Compat: DrawElements: 5.1 -> 5.3 million draws/second
   Core:   DrawElements: 5.1 -> 5.5 million draws/second

The result is better for the core profile where u_vbuf is disabled.


2) Performance difference with all 4 patches (Core profile only)

DrawArrays: 8.3 -> 8.5 million draws/second
DrawElements: 5.2 -> 5.8 million draws/second


3) Performance difference with threaded Gallium (Core profile only):

DrawElements: 5.9 -> 7.1 million draws/second

Threaded Gallium is still work in progress and might require
a non-trivial amount of driver work.


PART 2: Call for testing

These drivers have been tested:
- ddebug
- llvmpipe
- r300 (also with SWTCL)
- r600
- radeonsi
- softpipe
- trace

These drivers need testing:
- etnaviv
- freedreno
- nv30
- nv50
- nvc0
- svga
- swr
- vc4
- virgl

The following state trackers might need testing:
- nine

You can get the patches by fetching:
   git://people.freedesktop.org/~mareko/mesa gallium-cleanup

I'd like to ask to you for testing drivers that I couldn't test.
Please let me know when you're done testing and if things are good.
After that, I'll push everything assuming the code review goes well.
You can also ignore this if you don't mind fixing your driver in
the master branch later.


With our VMware driver there's a whole bunch of clipflat failures.  I'll
try to see if it's something simple, otherwise, it may take a day or two
to look closer.


I think the attached patch fixes things (it should be merged with 3/4).
  I need to do another full piglit run, at least...


I see two more regressions from master:

spec/nv_primitive_restart/primitive-restart-vbo_combined_vertex_and_index

and

spec/!opengl 3.1/primitive-restart-xfb flush: pass fail

I spent a little time debugging without success.  I'm not sure when I'll 
have time to resume.  I guess you can push the changes anyway and I'll 
try to patch things up later.


-Brian

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Re: [Mesa-dev] [PATCH 7/7] mesa: add KHR_no_error support for glUseProgram

[Timothy Arceri]

On 04/05/17 13:31, Dave Airlie wrote:

+/* The ARB_separate_shader_object spec says:
+ *
+ * "The executable code for an individual shader stage is taken from
+ * the current program for that stage.  If there is a current program
+ * object established by UseProgram, that program is considered current
+ * for all stages.  Otherwise, if there is a bound program pipeline
+ * object (section 2.14.PPO), the program bound to the appropriate
+ * stage of the pipeline object is considered current."
+ */
+#define USE_PROGRAM(no_error)\
+   if (program) {\
+  /* Attach shader state to the binding point */ \
+  _mesa_reference_pipeline_object(ctx, >_Shader, >Shader); \
+  /* Update the program */   \
+  _mesa_use_shader_program(ctx, shProg); \
+   } else {  \
+  /* Must be done first: detach the progam */\
+  _mesa_use_shader_program(ctx, shProg); \
+  /* Unattach shader_state binding point */  \
+  _mesa_reference_pipeline_object(ctx, >_Shader,\
+  ctx->Pipeline.Default);\
+  /* If a pipeline was bound, rebind it */   \
+  if (ctx->Pipeline.Current) {   \
+ _mesa_BindProgramPipeline##no_error(ctx->Pipeline.Current->Name);   \
+  }  \
+   } \
+


why the macro, inline functions are a thing, or just one common
function that both entrypoints call.



So that we can avoid adding an if to call

_mesa_BindProgramPipeline_no_error vs _mesa_BindProgramPipeline


Dave.


+void GLAPIENTRY
+_mesa_UseProgram_no_error(GLuint program)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   struct gl_shader_program *shProg = NULL;
+
+   if (program) {
+  shProg = _mesa_lookup_shader_program(ctx, program);
+   }
+
+   USE_PROGRAM(_no_error)
+}
+

  void GLAPIENTRY
  _mesa_UseProgram(GLuint program)
  {
 GET_CURRENT_CONTEXT(ctx);
 struct gl_shader_program *shProg = NULL;

 if (MESA_VERBOSE & VERBOSE_API)
_mesa_debug(ctx, "glUseProgram %u\n", program);

@@ -1875,44 +1915,21 @@ _mesa_UseProgram(GLuint program)
   return;
}

  #ifdef DEBUG
if (ctx->_Shader->Flags & GLSL_USE_PROG) {
   print_shader_info(shProg);
}
  #endif
 }

-   /* The ARB_separate_shader_object spec says:
-*
-* "The executable code for an individual shader stage is taken from
-* the current program for that stage.  If there is a current program
-* object established by UseProgram, that program is considered current
-* for all stages.  Otherwise, if there is a bound program pipeline
-* object (section 2.14.PPO), the program bound to the appropriate
-* stage of the pipeline object is considered current."
-*/
-   if (program) {
-  /* Attach shader state to the binding point */
-  _mesa_reference_pipeline_object(ctx, >_Shader, >Shader);
-  /* Update the program */
-  _mesa_use_shader_program(ctx, shProg);
-   } else {
-  /* Must be done first: detach the progam */
-  _mesa_use_shader_program(ctx, shProg);
-  /* Unattach shader_state binding point */
-  _mesa_reference_pipeline_object(ctx, >_Shader, 
ctx->Pipeline.Default);
-  /* If a pipeline was bound, rebind it */
-  if (ctx->Pipeline.Current) {
- _mesa_BindProgramPipeline(ctx->Pipeline.Current->Name);
-  }
-   }
+   USE_PROGRAM()
  }


  void GLAPIENTRY
  _mesa_ValidateProgram(GLuint program)
  {
 GET_CURRENT_CONTEXT(ctx);
 validate_program(ctx, program);
  }

diff --git a/src/mesa/main/shaderapi.h b/src/mesa/main/shaderapi.h
index 99b4fe8..0a28185 100644
--- a/src/mesa/main/shaderapi.h
+++ b/src/mesa/main/shaderapi.h
@@ -120,20 +120,22 @@ _mesa_IsProgram(GLuint name);

  extern GLboolean GLAPIENTRY
  _mesa_IsShader(GLuint name);

  extern void GLAPIENTRY
  _mesa_LinkProgram(GLuint programObj);

  extern void GLAPIENTRY
  _mesa_ShaderSource(GLuint, GLsizei, const GLchar* const *, const GLint *);

+void GLAPIENTRY
+_mesa_UseProgram_no_error(GLuint);
  extern void GLAPIENTRY
  _mesa_UseProgram(GLuint);

  extern void GLAPIENTRY
  _mesa_ValidateProgram(GLuint);


  extern void GLAPIENTRY
  _mesa_BindAttribLocation(GLuint program, GLuint, const GLchar *);

--
2.9.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 7/7] mesa: add KHR_no_error support for glUseProgram

[Dave Airlie]

> +/* The ARB_separate_shader_object spec says:
> + *
> + * "The executable code for an individual shader stage is taken from
> + * the current program for that stage.  If there is a current program
> + * object established by UseProgram, that program is considered current
> + * for all stages.  Otherwise, if there is a bound program pipeline
> + * object (section 2.14.PPO), the program bound to the appropriate
> + * stage of the pipeline object is considered current."
> + */
> +#define USE_PROGRAM(no_error)
> \
> +   if (program) {
> \
> +  /* Attach shader state to the binding point */ 
> \
> +  _mesa_reference_pipeline_object(ctx, >_Shader, >Shader); 
> \
> +  /* Update the program */   
> \
> +  _mesa_use_shader_program(ctx, shProg); 
> \
> +   } else {  
> \
> +  /* Must be done first: detach the progam */
> \
> +  _mesa_use_shader_program(ctx, shProg); 
> \
> +  /* Unattach shader_state binding point */  
> \
> +  _mesa_reference_pipeline_object(ctx, >_Shader,
> \
> +  ctx->Pipeline.Default);
> \
> +  /* If a pipeline was bound, rebind it */   
> \
> +  if (ctx->Pipeline.Current) {   
> \
> + _mesa_BindProgramPipeline##no_error(ctx->Pipeline.Current->Name);   
> \
> +  }  
> \
> +   } 
> \
> +

why the macro, inline functions are a thing, or just one common
function that both entrypoints call.

Dave.

> +void GLAPIENTRY
> +_mesa_UseProgram_no_error(GLuint program)
> +{
> +   GET_CURRENT_CONTEXT(ctx);
> +   struct gl_shader_program *shProg = NULL;
> +
> +   if (program) {
> +  shProg = _mesa_lookup_shader_program(ctx, program);
> +   }
> +
> +   USE_PROGRAM(_no_error)
> +}
> +
>
>  void GLAPIENTRY
>  _mesa_UseProgram(GLuint program)
>  {
> GET_CURRENT_CONTEXT(ctx);
> struct gl_shader_program *shProg = NULL;
>
> if (MESA_VERBOSE & VERBOSE_API)
>_mesa_debug(ctx, "glUseProgram %u\n", program);
>
> @@ -1875,44 +1915,21 @@ _mesa_UseProgram(GLuint program)
>   return;
>}
>
>  #ifdef DEBUG
>if (ctx->_Shader->Flags & GLSL_USE_PROG) {
>   print_shader_info(shProg);
>}
>  #endif
> }
>
> -   /* The ARB_separate_shader_object spec says:
> -*
> -* "The executable code for an individual shader stage is taken from
> -* the current program for that stage.  If there is a current program
> -* object established by UseProgram, that program is considered 
> current
> -* for all stages.  Otherwise, if there is a bound program pipeline
> -* object (section 2.14.PPO), the program bound to the appropriate
> -* stage of the pipeline object is considered current."
> -*/
> -   if (program) {
> -  /* Attach shader state to the binding point */
> -  _mesa_reference_pipeline_object(ctx, >_Shader, >Shader);
> -  /* Update the program */
> -  _mesa_use_shader_program(ctx, shProg);
> -   } else {
> -  /* Must be done first: detach the progam */
> -  _mesa_use_shader_program(ctx, shProg);
> -  /* Unattach shader_state binding point */
> -  _mesa_reference_pipeline_object(ctx, >_Shader, 
> ctx->Pipeline.Default);
> -  /* If a pipeline was bound, rebind it */
> -  if (ctx->Pipeline.Current) {
> - _mesa_BindProgramPipeline(ctx->Pipeline.Current->Name);
> -  }
> -   }
> +   USE_PROGRAM()
>  }
>
>
>  void GLAPIENTRY
>  _mesa_ValidateProgram(GLuint program)
>  {
> GET_CURRENT_CONTEXT(ctx);
> validate_program(ctx, program);
>  }
>
> diff --git a/src/mesa/main/shaderapi.h b/src/mesa/main/shaderapi.h
> index 99b4fe8..0a28185 100644
> --- a/src/mesa/main/shaderapi.h
> +++ b/src/mesa/main/shaderapi.h
> @@ -120,20 +120,22 @@ _mesa_IsProgram(GLuint name);
>
>  extern GLboolean GLAPIENTRY
>  _mesa_IsShader(GLuint name);
>
>  extern void GLAPIENTRY
>  _mesa_LinkProgram(GLuint programObj);
>
>  extern void GLAPIENTRY
>  _mesa_ShaderSource(GLuint, GLsizei, const GLchar* const *, const GLint *);
>
> +void GLAPIENTRY
> +_mesa_UseProgram_no_error(GLuint);
>  extern void GLAPIENTRY
>  _mesa_UseProgram(GLuint);
>
>  extern void GLAPIENTRY
>  _mesa_ValidateProgram(GLuint);
>
>
>  extern void GLAPIENTRY
>  _mesa_BindAttribLocation(GLuint program, GLuint, const GLchar *);
>
> --
> 2.9.3
>
> ___
> mesa-dev mailing list
> 

[Mesa-dev] [PATCH 4/7] radv: add subpass resolve compute path

[Dave Airlie]

From: Dave Airlie 

This adds a path to allow compute resolves to be used
for subpass resolves.

This isn't used yet, but will be later.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_resolve_cs.c | 93 +++
 src/amd/vulkan/radv_private.h |  1 +
 2 files changed, 94 insertions(+)

diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c 
b/src/amd/vulkan/radv_meta_resolve_cs.c
index 7a38b87..a928381 100644
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -420,3 +420,96 @@ void radv_meta_resolve_compute_image(struct 
radv_cmd_buffer *cmd_buffer,
}
radv_meta_restore_compute(_state, cmd_buffer, 16);
 }
+
+/**
+ * Emit any needed resolves for the current subpass.
+ */
+void
+radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer)
+{
+   struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
+   const struct radv_subpass *subpass = cmd_buffer->state.subpass;
+   struct radv_meta_saved_compute_state saved_state;
+   /* FINISHME(perf): Skip clears for resolve attachments.
+*
+* From the Vulkan 1.0 spec:
+*
+*If the first use of an attachment in a render pass is as a resolve
+*attachment, then the loadOp is effectively ignored as the resolve 
is
+*guaranteed to overwrite all pixels in the render area.
+*/
+
+   if (!subpass->has_resolve)
+   return;
+
+   for (uint32_t i = 0; i < subpass->color_count; ++i) {
+   VkAttachmentReference src_att = subpass->color_attachments[i];
+   VkAttachmentReference dest_att = 
subpass->resolve_attachments[i];
+   struct radv_image *dst_img = 
cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image;
+   struct radv_image_view *src_iview = 
cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment;
+
+   if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
+   continue;
+   if (dst_img->surface.dcc_size) {
+   radv_initialize_dcc(cmd_buffer, dst_img, 0x);
+   
cmd_buffer->state.attachments[dest_att.attachment].current_layout = 
VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL;
+   }
+
+   VkImageSubresourceRange range;
+   range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT;
+   range.baseMipLevel = 0;
+   range.levelCount = 1;
+   range.baseArrayLayer = 0;
+   range.layerCount = 1;
+   radv_fast_clear_flush_image_inplace(cmd_buffer, 
src_iview->image, );
+   }
+
+   radv_meta_save_compute(_state, cmd_buffer, 16);
+
+   for (uint32_t i = 0; i < subpass->color_count; ++i) {
+   VkAttachmentReference src_att = subpass->color_attachments[i];
+   VkAttachmentReference dest_att = 
subpass->resolve_attachments[i];
+   struct radv_image_view *src_iview = 
cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment;
+   struct radv_image_view *dst_iview = 
cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment;
+   if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
+   continue;
+
+   struct radv_subpass resolve_subpass = {
+   .color_count = 1,
+   .color_attachments = (VkAttachmentReference[]) { 
dest_att },
+   .depth_stencil_attachment = { .attachment = 
VK_ATTACHMENT_UNUSED },
+   };
+
+   radv_cmd_buffer_set_subpass(cmd_buffer, _subpass, 
false);
+
+   /* Subpass resolves must respect the render area. We can ignore 
the
+* render area here because vkCmdBeginRenderPass set the render 
area
+* with 3DSTATE_DRAWING_RECTANGLE.
+*
+* XXX(chadv): Does the hardware really respect
+* 3DSTATE_DRAWING_RECTANGLE when draing a 3DPRIM_RECTLIST?
+*/
+   emit_resolve(cmd_buffer,
+src_iview,
+dst_iview,
+&(VkOffset2D) { 0, 0 },
+&(VkOffset2D) { 0, 0 },
+&(VkExtent2D) { fb->width, fb->height });
+   }
+
+   radv_meta_restore_compute(_state, cmd_buffer, 16);
+
+   for (uint32_t i = 0; i < subpass->color_count; ++i) {
+   VkAttachmentReference dest_att = 
subpass->resolve_attachments[i];
+   struct radv_image *dst_img = 
cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image;
+   if (dest_att.attachment == VK_ATTACHMENT_UNUSED)
+   continue;
+   VkImageSubresourceRange range;
+   range.aspectMask = 

[Mesa-dev] [PATCH 7/7] radv: drop resolve hack workarounds

[Dave Airlie]

From: Dave Airlie 

This drops the resolve workarounds that change an image
tiling mode behinds it's back, this is horrible and breaks
the image_view->image relationship. Remove all this.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_cmd_buffer.c | 40 --
 src/amd/vulkan/radv_image.c  | 62 
 src/amd/vulkan/radv_private.h|  3 +-
 3 files changed, 1 insertion(+), 104 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index edd7122..c1c1df3 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -952,36 +952,6 @@ radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer,
   ds->pa_su_poly_offset_db_fmt_cntl);
 }
 
-/*
- * To hw resolve multisample images both src and dst need to have the same
- * micro tiling mode. However we don't always know in advance when creating
- * the images. This function gets called if we have a resolve attachment,
- * and tests if the attachment image has the same tiling mode, then it
- * checks if the generated framebuffer data has the same tiling mode, and
- * updates it if not.
- */
-static void radv_set_optimal_micro_tile_mode(struct radv_device *device,
-struct radv_attachment_info *att,
-uint32_t micro_tile_mode)
-{
-   struct radv_image *image = att->attachment->image;
-   uint32_t tile_mode_index;
-   if (image->info.samples <= 1)
-   return;
-
-   if (image->surface.micro_tile_mode != micro_tile_mode) {
-   radv_image_set_optimal_micro_tile_mode(device, image, 
micro_tile_mode);
-   }
-
-   if (att->cb.micro_tile_mode != micro_tile_mode) {
-   tile_mode_index = image->surface.tiling_index[0];
-
-   att->cb.cb_color_attrib &= C_028C74_TILE_MODE_INDEX;
-   att->cb.cb_color_attrib |= 
S_028C74_TILE_MODE_INDEX(tile_mode_index);
-   att->cb.micro_tile_mode = micro_tile_mode;
-   }
-}
-
 void
 radv_set_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer,
  struct radv_image *image,
@@ -1110,21 +1080,11 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer 
*cmd_buffer)
int i;
struct radv_framebuffer *framebuffer = cmd_buffer->state.framebuffer;
const struct radv_subpass *subpass = cmd_buffer->state.subpass;
-   int dst_resolve_micro_tile_mode = -1;
 
-   if (subpass->has_resolve) {
-   uint32_t a = subpass->resolve_attachments[0].attachment;
-   const struct radv_image *image = 
framebuffer->attachments[a].attachment->image;
-   dst_resolve_micro_tile_mode = image->surface.micro_tile_mode;
-   }
for (i = 0; i < subpass->color_count; ++i) {
int idx = subpass->color_attachments[i].attachment;
struct radv_attachment_info *att = 
>attachments[idx];
 
-   if (dst_resolve_micro_tile_mode != -1) {
-   radv_set_optimal_micro_tile_mode(cmd_buffer->device,
-att, 
dst_resolve_micro_tile_mode);
-   }
cmd_buffer->device->ws->cs_add_buffer(cmd_buffer->cs, 
att->attachment->bo, 8);
 
assert(att->attachment->aspect_mask & 
VK_IMAGE_ASPECT_COLOR_BIT);
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index c6261d3..9cd4c0d 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -769,68 +769,6 @@ radv_image_view_init(struct radv_image_view *iview,
   blk_w, is_stencil, iview->descriptor);
 }
 
-void radv_image_set_optimal_micro_tile_mode(struct radv_device *device,
-   struct radv_image *image, uint32_t 
micro_tile_mode)
-{
-   /* These magic numbers were copied from addrlib. It doesn't use any
-* definitions for them either. They are all 2D_TILED_THIN1 modes with
-* different bpp and micro tile mode.
-*/
-   if (device->physical_device->rad_info.chip_class >= CIK) {
-   switch (micro_tile_mode) {
-   case 0: /* displayable */
-   image->surface.tiling_index[0] = 10;
-   break;
-   case 1: /* thin */
-   image->surface.tiling_index[0] = 14;
-   break;
-   case 3: /* rotated */
-   image->surface.tiling_index[0] = 28;
-   break;
-   default: /* depth, thick */
-   assert(!"unexpected micro mode");
-   return;
-   }
-   } else { /* SI */
-   switch (micro_tile_mode) {
-   case 0: /* displayable */
-   switch 

[Mesa-dev] [PATCH 3/7] radv/resolve: split resolve emission out for compute

[Dave Airlie]

From: Dave Airlie 

This will allow to add a subpass compute resolve path.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_resolve_cs.c | 141 +++---
 1 file changed, 78 insertions(+), 63 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c 
b/src/amd/vulkan/radv_meta_resolve_cs.c
index bb7b8b3..7a38b87 100644
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -253,6 +253,78 @@ radv_device_finish_meta_resolve_compute_state(struct 
radv_device *device)
   >alloc);
 }
 
+static void
+emit_resolve(struct radv_cmd_buffer *cmd_buffer,
+struct radv_image_view *src_iview,
+struct radv_image_view *dest_iview,
+const VkOffset2D *src_offset,
+ const VkOffset2D *dest_offset,
+ const VkExtent2D *resolve_extent)
+{
+   struct radv_device *device = cmd_buffer->device;
+   const uint32_t samples = src_iview->image->info.samples;
+   const uint32_t samples_log2 = ffs(samples) - 1;
+   radv_meta_push_descriptor_set(cmd_buffer,
+ VK_PIPELINE_BIND_POINT_COMPUTE,
+ 
device->meta_state.resolve_compute.p_layout,
+ 0, /* set */
+ 2, /* descriptorWriteCount */
+ (VkWriteDescriptorSet[]) {
+   {
+   .sType = 
VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
+   .dstBinding = 0,
+   .dstArrayElement = 0,
+   .descriptorCount = 1,
+   .descriptorType = 
VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
+ .pImageInfo = 
(VkDescriptorImageInfo[]) {
+ {
+ .sampler = VK_NULL_HANDLE,
+ .imageView = 
radv_image_view_to_handle(src_iview),
+ .imageLayout = 
VK_IMAGE_LAYOUT_GENERAL  },
+ }
+ },
+ {
+ .sType = 
VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
+ .dstBinding = 1,
+ .dstArrayElement = 0,
+ .descriptorCount = 1,
+ .descriptorType = 
VK_DESCRIPTOR_TYPE_STORAGE_IMAGE,
+ .pImageInfo = (VkDescriptorImageInfo[]) {
+  {
+  .sampler = VK_NULL_HANDLE,
+ .imageView = 
radv_image_view_to_handle(dest_iview),
+ .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
+  },
+  }
+ }
+ });
+
+   VkPipeline pipeline;
+   if (vk_format_is_int(src_iview->image->vk_format))
+   pipeline = 
device->meta_state.resolve_compute.rc[samples_log2].i_pipeline;
+   else if (vk_format_is_srgb(src_iview->image->vk_format))
+   pipeline = 
device->meta_state.resolve_compute.rc[samples_log2].srgb_pipeline;
+   else
+   pipeline = 
device->meta_state.resolve_compute.rc[samples_log2].pipeline;
+   if (cmd_buffer->state.compute_pipeline != 
radv_pipeline_from_handle(pipeline)) {
+   radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
+VK_PIPELINE_BIND_POINT_COMPUTE, pipeline);
+   }
+
+   unsigned push_constants[4] = {
+   src_offset->x,
+   src_offset->y,
+   dest_offset->x,
+   dest_offset->y,
+   };
+   radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
+ device->meta_state.resolve_compute.p_layout,
+ VK_SHADER_STAGE_COMPUTE_BIT, 0, 16,
+ push_constants);
+   radv_unaligned_dispatch(cmd_buffer, resolve_extent->width, 
resolve_extent->height, 1);
+
+}
+
 void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer,
 struct radv_image *src_image,
 VkImageLayout src_image_layout,
@@ -261,10 +333,7 @@ void radv_meta_resolve_compute_image(struct 
radv_cmd_buffer *cmd_buffer,
 uint32_t region_count,
 const VkImageResolve *regions)
 {
-   struct 

[Mesa-dev] [PATCH 5/7] radv/meta: add resolve pass using fragment/vertex shaders

[Dave Airlie]

From: Dave Airlie 

In order to resolve into DCC enabled dests we need to use
the fragment shader. This reuses the code from the compute
path and implements a resolve path in vertex/fragment shader.

This code isn't used until later.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/Makefile.sources   |   1 +
 src/amd/vulkan/radv_meta.c|   7 +
 src/amd/vulkan/radv_meta.h|  12 +
 src/amd/vulkan/radv_meta_resolve.c|  13 +-
 src/amd/vulkan/radv_meta_resolve_fs.c | 657 ++
 src/amd/vulkan/radv_private.h |  11 +
 6 files changed, 699 insertions(+), 2 deletions(-)
 create mode 100644 src/amd/vulkan/radv_meta_resolve_fs.c

diff --git a/src/amd/vulkan/Makefile.sources b/src/amd/vulkan/Makefile.sources
index 4896952..d3e0c81 100644
--- a/src/amd/vulkan/Makefile.sources
+++ b/src/amd/vulkan/Makefile.sources
@@ -51,6 +51,7 @@ VULKAN_FILES := \
radv_meta_fast_clear.c \
radv_meta_resolve.c \
radv_meta_resolve_cs.c \
+   radv_meta_resolve_fs.c \
radv_pass.c \
radv_pipeline.c \
radv_pipeline_cache.c \
diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c
index fc21639..7d1bf7c 100644
--- a/src/amd/vulkan/radv_meta.c
+++ b/src/amd/vulkan/radv_meta.c
@@ -347,8 +347,14 @@ radv_device_init_meta(struct radv_device *device)
result = radv_device_init_meta_resolve_compute_state(device);
if (result != VK_SUCCESS)
goto fail_resolve_compute;
+
+   result = radv_device_init_meta_resolve_fragment_state(device);
+   if (result != VK_SUCCESS)
+   goto fail_resolve_fragment;
return VK_SUCCESS;
 
+fail_resolve_fragment:
+   radv_device_finish_meta_resolve_compute_state(device);
 fail_resolve_compute:
radv_device_finish_meta_fast_clear_flush_state(device);
 fail_fast_clear:
@@ -385,6 +391,7 @@ radv_device_finish_meta(struct radv_device *device)
radv_device_finish_meta_buffer_state(device);
radv_device_finish_meta_fast_clear_flush_state(device);
radv_device_finish_meta_resolve_compute_state(device);
+   radv_device_finish_meta_resolve_fragment_state(device);
 
radv_store_meta_pipeline(device);
radv_pipeline_cache_finish(>meta_state.cache);
diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h
index c4311c3..3efa76d 100644
--- a/src/amd/vulkan/radv_meta.h
+++ b/src/amd/vulkan/radv_meta.h
@@ -91,6 +91,10 @@ void radv_device_finish_meta_query_state(struct radv_device 
*device);
 
 VkResult radv_device_init_meta_resolve_compute_state(struct radv_device 
*device);
 void radv_device_finish_meta_resolve_compute_state(struct radv_device *device);
+
+VkResult radv_device_init_meta_resolve_fragment_state(struct radv_device 
*device);
+void radv_device_finish_meta_resolve_fragment_state(struct radv_device 
*device);
+
 void radv_meta_save(struct radv_meta_saved_state *state,
const struct radv_cmd_buffer *cmd_buffer,
uint32_t dynamic_mask);
@@ -218,6 +222,14 @@ void radv_meta_resolve_compute_image(struct 
radv_cmd_buffer *cmd_buffer,
 uint32_t region_count,
 const VkImageResolve *regions);
 
+void radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer,
+ struct radv_image *src_image,
+ VkImageLayout src_image_layout,
+ struct radv_image *dest_image,
+ VkImageLayout dest_image_layout,
+ uint32_t region_count,
+ const VkImageResolve *regions);
+
 void radv_blit_to_prime_linear(struct radv_cmd_buffer *cmd_buffer,
   struct radv_image *image,
   struct radv_image *linear_image);
diff --git a/src/amd/vulkan/radv_meta_resolve.c 
b/src/amd/vulkan/radv_meta_resolve.c
index 784d39b..3e6633d 100644
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -319,7 +319,7 @@ void radv_CmdResolveImage(
struct radv_meta_saved_state saved_state;
VkDevice device_h = radv_device_to_handle(device);
bool use_compute_resolve = false;
-
+   bool use_fragment_resolve = false;
/* we can use the hw resolve only for single full resolves */
if (region_count == 1) {
if (regions[0].srcOffset.x ||
@@ -338,8 +338,17 @@ void radv_CmdResolveImage(
} else
use_compute_resolve = true;
 
-   if (use_compute_resolve) {
+   if (use_fragment_resolve) {
+   radv_meta_resolve_fragment_image(cmd_buffer,
+src_image,
+src_image_layout,
+ 

[Mesa-dev] [PATCH 1/7] radv/meta: add srgb conversion to end of resolve shader.

[Dave Airlie]

From: Dave Airlie 

If we are resolving into an srgb dest, we need to convert
to linear so the store does the conversion back.

This should fix some wierdness seen when we subresolves
hit the compute path.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_resolve_cs.c | 58 ---
 src/amd/vulkan/radv_private.h |  1 +
 src/amd/vulkan/vk_format.h|  7 +
 3 files changed, 61 insertions(+), 5 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c 
b/src/amd/vulkan/radv_meta_resolve_cs.c
index dc4a1bb..99a3a06 100644
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -32,7 +32,7 @@
 #include "vk_format.h"
 
 static nir_shader *
-build_resolve_compute_shader(struct radv_device *dev, bool is_integer, int 
samples)
+build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool 
is_srgb, int samples)
 {
nir_builder b;
char name[64];
@@ -45,7 +45,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool 
is_integer, int sampl
 false,
 false,
 GLSL_TYPE_FLOAT);
-   snprintf(name, 64, "meta_resolve_cs-%d-%s", samples, is_integer ? "int" 
: "float");
+   snprintf(name, 64, "meta_resolve_cs-%d-%s", samples, is_integer ? "int" 
: (is_srgb ? "srgb" : "float"));
nir_builder_init_simple_shader(, NULL, MESA_SHADER_COMPUTE, NULL);
b.shader->info->name = ralloc_strdup(b.shader, name);
b.shader->info->cs.local_size[0] = 16;
@@ -158,6 +158,44 @@ build_resolve_compute_shader(struct radv_device *dev, bool 
is_integer, int sampl
b.cursor = nir_after_cf_node(_if->cf_node);
 
nir_ssa_def *newv = nir_load_var(, color);
+
+   if (is_srgb) {
+   nir_const_value v;
+   unsigned i;
+   v.u32[0] = 0x3b4d2e1c; // 0.00313080009
+
+   nir_ssa_def *cmp[3];
+   for (i = 0; i < 3; i++)
+   cmp[i] = nir_flt(, nir_channel(, newv, i),
+nir_build_imm(, 1, 32, v));
+
+   nir_ssa_def *ltvals[3];
+   v.f32[0] = 12.92;
+   for (i = 0; i < 3; i++)
+   ltvals[i] = nir_fmul(, nir_channel(, newv, i),
+nir_build_imm(, 1, 32, v));
+
+   nir_ssa_def *gtvals[3];
+
+   for (i = 0; i < 3; i++) {
+   v.f32[0] = 1.0/2.4;
+   gtvals[i] = nir_fpow(, nir_channel(, newv, i),
+nir_build_imm(, 1, 32, v));
+   v.f32[0] = 1.055;
+   gtvals[i] = nir_fmul(, gtvals[i],
+nir_build_imm(, 1, 32, v));
+   v.f32[0] = 0.055;
+   gtvals[i] = nir_fsub(, gtvals[i],
+nir_build_imm(, 1, 32, v));
+   }
+
+   nir_ssa_def *comp[4];
+   for (i = 0; i < 3; i++)
+   comp[i] = nir_bcsel(, cmp[i], ltvals[i], gtvals[i]);
+   comp[3] = nir_channels(, newv, 3);
+   newv = nir_vec(, comp, 4);
+   }
+
nir_ssa_def *coord = nir_iadd(, global_id, _offset->dest.ssa);
nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, 
nir_intrinsic_image_store);
store->src[0] = nir_src_for_ssa(coord);
@@ -230,12 +268,13 @@ static VkResult
 create_resolve_pipeline(struct radv_device *device,
int samples,
bool is_integer,
+   bool is_srgb,
VkPipeline *pipeline)
 {
VkResult result;
struct radv_shader_module cs = { .nir = NULL };
 
-   cs.nir = build_resolve_compute_shader(device, is_integer, samples);
+   cs.nir = build_resolve_compute_shader(device, is_integer, is_srgb, 
samples);
 
/* compute shader */
 
@@ -282,12 +321,15 @@ radv_device_init_meta_resolve_compute_state(struct 
radv_device *device)
for (uint32_t i = 0; i < MAX_SAMPLES_LOG2; ++i) {
uint32_t samples = 1 << i;
 
-   res = create_resolve_pipeline(device, samples, false,
+   res = create_resolve_pipeline(device, samples, false, false,
  
>resolve_compute.rc[i].pipeline);
 
-   res = create_resolve_pipeline(device, samples, true,
+   res = create_resolve_pipeline(device, samples, true, false,
  
>resolve_compute.rc[i].i_pipeline);
 
+   res = create_resolve_pipeline(device, samples, false, true,
+ 

[Mesa-dev] radv image resolve rework

[Dave Airlie]

radv has had a hack in place to change some image details (tiling_mode)
to enable hw resolver to work, however this isn't at all how Vulkan
should work. Coupled with the compute resolve path hanging in some situations,
I decided to rework the lot.

This firstly refactors compute resolve to separate out some pieces,
and to add renderpass resolve support to it.
Then it adds fragment shader based resolve (which is slower than compute)
to handle the dest having dcc enabled on it, which is the one case compute
can't handle.

It then picks the hw, compute, fragment paths in that order. For the
mismatched tile case it now picks compute whereas before it would hack
the hw resolve (which is still faster). Finally it removes all the hacks
to enable hw resolve which were so not what Vulkan wants.

Dave.
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[Mesa-dev] [PATCH 6/7] radv/meta: select resolve paths

[Dave Airlie]

From: Dave Airlie 

There are 3 resolve paths, the fastest being the hw resolver
but it has restriction on tile modes and can't do subresolves,
the compute resolver is next speed wise, but can't handle DCC
destinations, the fragment resolver handles that case.

This will end up with a slow down as currently we hack the
hw resolver paths when they shouldn't work, but we shouldn't
keep doing that.

The next patch removes the hacks.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta_resolve.c | 58 --
 1 file changed, 50 insertions(+), 8 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_resolve.c 
b/src/amd/vulkan/radv_meta_resolve.c
index 3e6633d..565909a 100644
--- a/src/amd/vulkan/radv_meta_resolve.c
+++ b/src/amd/vulkan/radv_meta_resolve.c
@@ -303,6 +303,25 @@ emit_resolve(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;
 }
 
+enum radv_resolve_method {
+   RESOLVE_HW,
+   RESOLVE_COMPUTE,
+   RESOLVE_FRAGMENT,
+};
+
+static void radv_pick_resolve_method_images(struct radv_image *src_image,
+   struct radv_image *dest_image,
+   enum radv_resolve_method *method)
+
+{
+   if (dest_image->surface.micro_tile_mode != 
src_image->surface.micro_tile_mode) {
+   if (dest_image->surface.level[0].dcc_enabled)
+   *method = RESOLVE_FRAGMENT;
+   else
+   *method = RESOLVE_COMPUTE;
+   }
+}
+
 void radv_CmdResolveImage(
VkCommandBuffer cmd_buffer_h,
VkImage src_image_h,
@@ -318,27 +337,29 @@ void radv_CmdResolveImage(
struct radv_device *device = cmd_buffer->device;
struct radv_meta_saved_state saved_state;
VkDevice device_h = radv_device_to_handle(device);
-   bool use_compute_resolve = false;
-   bool use_fragment_resolve = false;
+   enum radv_resolve_method resolve_method = RESOLVE_HW;
/* we can use the hw resolve only for single full resolves */
if (region_count == 1) {
if (regions[0].srcOffset.x ||
regions[0].srcOffset.y ||
regions[0].srcOffset.z)
-   use_compute_resolve = true;
+   resolve_method = RESOLVE_COMPUTE;
if (regions[0].dstOffset.x ||
regions[0].dstOffset.y ||
regions[0].dstOffset.z)
-   use_compute_resolve = true;
+   resolve_method = RESOLVE_COMPUTE;
 
if (regions[0].extent.width != src_image->info.width ||
regions[0].extent.height != src_image->info.height ||
regions[0].extent.depth != src_image->info.depth)
-   use_compute_resolve = true;
+   resolve_method = RESOLVE_COMPUTE;
} else
-   use_compute_resolve = true;
+   resolve_method = RESOLVE_COMPUTE;
+
+   radv_pick_resolve_method_images(src_image, dest_image,
+   _method);
 
-   if (use_fragment_resolve) {
+   if (resolve_method == RESOLVE_FRAGMENT) {
radv_meta_resolve_fragment_image(cmd_buffer,
 src_image,
 src_image_layout,
@@ -348,7 +369,7 @@ void radv_CmdResolveImage(
return;
}
 
-   if (use_compute_resolve) {
+   if (resolve_method == RESOLVE_COMPUTE) {
radv_meta_resolve_compute_image(cmd_buffer,
src_image,
src_image_layout,
@@ -524,6 +545,7 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer 
*cmd_buffer)
struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
const struct radv_subpass *subpass = cmd_buffer->state.subpass;
struct radv_meta_saved_state saved_state;
+   enum radv_resolve_method resolve_method = RESOLVE_HW;
 
/* FINISHME(perf): Skip clears for resolve attachments.
 *
@@ -537,6 +559,26 @@ radv_cmd_buffer_resolve_subpass(struct radv_cmd_buffer 
*cmd_buffer)
if (!subpass->has_resolve)
return;
 
+   for (uint32_t i = 0; i < subpass->color_count; ++i) {
+   VkAttachmentReference src_att = subpass->color_attachments[i];
+   VkAttachmentReference dest_att = 
subpass->resolve_attachments[i];
+   struct radv_image *dst_img = 
cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image;
+   struct radv_image *src_img = 
cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment->image;
+
+   

[Mesa-dev] [PATCH 2/7] radv/meta: split out core part of resolve shader

[Dave Airlie]

From: Dave Airlie 

I want to reuse the same code for the fragment shader
version of the resolve shaders.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_meta.c| 127 ++
 src/amd/vulkan/radv_meta.h|   8 +++
 src/amd/vulkan/radv_meta_resolve_cs.c | 118 ++-
 3 files changed, 140 insertions(+), 113 deletions(-)

diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c
index aed2607..fc21639 100644
--- a/src/amd/vulkan/radv_meta.c
+++ b/src/amd/vulkan/radv_meta.c
@@ -489,3 +489,130 @@ radv_meta_build_nir_fs_noop(void)
 
return b.shader;
 }
+
+static nir_ssa_def *radv_meta_build_resolve_srgb_conversion(nir_builder *b,
+   nir_ssa_def *input)
+{
+   nir_const_value v;
+   unsigned i;
+   v.u32[0] = 0x3b4d2e1c; // 0.00313080009
+
+   nir_ssa_def *cmp[3];
+   for (i = 0; i < 3; i++)
+   cmp[i] = nir_flt(b, nir_channel(b, input, i),
+nir_build_imm(b, 1, 32, v));
+
+   nir_ssa_def *ltvals[3];
+   v.f32[0] = 12.92;
+   for (i = 0; i < 3; i++)
+   ltvals[i] = nir_fmul(b, nir_channel(b, input, i),
+nir_build_imm(b, 1, 32, v));
+
+   nir_ssa_def *gtvals[3];
+
+   for (i = 0; i < 3; i++) {
+   v.f32[0] = 1.0/2.4;
+   gtvals[i] = nir_fpow(b, nir_channel(b, input, i),
+nir_build_imm(b, 1, 32, v));
+   v.f32[0] = 1.055;
+   gtvals[i] = nir_fmul(b, gtvals[i],
+nir_build_imm(b, 1, 32, v));
+   v.f32[0] = 0.055;
+   gtvals[i] = nir_fsub(b, gtvals[i],
+nir_build_imm(b, 1, 32, v));
+   }
+
+   nir_ssa_def *comp[4];
+   for (i = 0; i < 3; i++)
+   comp[i] = nir_bcsel(b, cmp[i], ltvals[i], gtvals[i]);
+   comp[3] = nir_channels(b, input, 3);
+   return nir_vec(b, comp, 4);
+}
+
+void radv_meta_build_resolve_shader_core(nir_builder *b,
+bool is_integer,
+bool is_srgb,
+int samples,
+nir_variable *input_img,
+nir_variable *color,
+nir_ssa_def *img_coord)
+{
+   /* do a txf_ms on each sample */
+   nir_ssa_def *tmp;
+   nir_if *outer_if = NULL;
+
+   nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
+   tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
+   tex->op = nir_texop_txf_ms;
+   tex->src[0].src_type = nir_tex_src_coord;
+   tex->src[0].src = nir_src_for_ssa(img_coord);
+   tex->src[1].src_type = nir_tex_src_ms_index;
+   tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
+   tex->dest_type = nir_type_float;
+   tex->is_array = false;
+   tex->coord_components = 2;
+   tex->texture = nir_deref_var_create(tex, input_img);
+   tex->sampler = NULL;
+
+   nir_ssa_dest_init(>instr, >dest, 4, 32, "tex");
+   nir_builder_instr_insert(b, >instr);
+
+   tmp = >dest.ssa;
+
+   if (!is_integer && samples > 1) {
+   nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 
1);
+   tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
+   tex_all_same->op = nir_texop_samples_identical;
+   tex_all_same->src[0].src_type = nir_tex_src_coord;
+   tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
+   tex_all_same->dest_type = nir_type_float;
+   tex_all_same->is_array = false;
+   tex_all_same->coord_components = 2;
+   tex_all_same->texture = nir_deref_var_create(tex_all_same, 
input_img);
+   tex_all_same->sampler = NULL;
+
+   nir_ssa_dest_init(_all_same->instr, _all_same->dest, 1, 
32, "tex");
+   nir_builder_instr_insert(b, _all_same->instr);
+
+   nir_ssa_def *all_same = nir_ine(b, _all_same->dest.ssa, 
nir_imm_int(b, 0));
+   nir_if *if_stmt = nir_if_create(b->shader);
+   if_stmt->condition = nir_src_for_ssa(all_same);
+   nir_cf_node_insert(b->cursor, _stmt->cf_node);
+
+   b->cursor = nir_after_cf_list(_stmt->then_list);
+   for (int i = 1; i < samples; i++) {
+   nir_tex_instr *tex_add = 
nir_tex_instr_create(b->shader, 2);
+   tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
+   tex_add->op = nir_texop_txf_ms;
+   tex_add->src[0].src_type = nir_tex_src_coord;
+   tex_add->src[0].src = nir_src_for_ssa(img_coord);
+   tex_add->src[1].src_type = 

Re: [Mesa-dev] [PATCH] i965: Make the field computed_depth_mode an enum.

[Kenneth Graunke]

On Wednesday, May 3, 2017 7:19:24 PM PDT Matt Turner wrote:
> On Wed, May 3, 2017 at 6:03 PM, Kenneth Graunke  wrote:
> > On Tuesday, May 2, 2017 11:02:58 AM PDT Rafael Antognolli wrote:
> >> Since the enum is in the same header now, we can use it as the type of
> >> the field.
> >>
> >> Signed-off-by: Rafael Antognolli 
> >> ---
> >>
> >> PS: We can merge this with the previous patch too if that's better.
> >>
> >>  src/intel/compiler/brw_compiler.h | 2 +-
> >>  src/intel/compiler/brw_fs.cpp | 2 +-
> >>  2 files changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/src/intel/compiler/brw_compiler.h 
> >> b/src/intel/compiler/brw_compiler.h
> >> index b5b1ee9..92fd4a2 100644
> >> --- a/src/intel/compiler/brw_compiler.h
> >> +++ b/src/intel/compiler/brw_compiler.h
> >> @@ -504,7 +504,7 @@ struct brw_wm_prog_data {
> >>/** @} */
> >> } binding_table;
> >>
> >> -   uint8_t computed_depth_mode;
> >> +   enum brw_pixel_shader_computed_depth_mode computed_depth_mode;
> >> bool computed_stencil;
> >
> > I think this may expand it from an 8-bit value to a 32-bit value.
> > It might have been anyway.  Does the size of the struct stay the same?
> 
> If it's marked as "PACKED" it should stay the same size.
> 

It isn't.  I'd be fine with adding PACKED.

--Ken


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Re: [Mesa-dev] [PATCH v03 00/38] Rebased and reviewed series to convert state emitting code to genxml.

[Kenneth Graunke]

On Monday, May 1, 2017 6:42:48 PM PDT Rafael Antognolli wrote:
> The main difference for this one is that it includes the changes based on the
> review by Kenneth.
> 
> Current version here:
> https://github.com/rantogno/mesa/commits/review/genxml-v03

I've pushed patches 1-33.


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Re: [Mesa-dev] [PATCH v03 34/38] i965: Port push constant code to genxml.

[Kenneth Graunke]

On Monday, May 1, 2017 6:43:22 PM PDT Rafael Antognolli wrote:
> The following states are ported on this patch:
>- gen6_gs_push_constants
>- gen6_vs_push_constants
>- gen6_wm_push_constants
>- gen7_tes_push_constants
> 
> v2:
>- Use helper to setup brw_address (Kristian)
> v3:
>- Do not use macro for upload_constant_state (Ken)
>- Do not re-declare MOCS macro (Ken)
> 
> Signed-off-by: Rafael Antognolli 
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources|   4 +-
>  src/mesa/drivers/dri/i965/brw_state.h |   5 +-
>  src/mesa/drivers/dri/i965/gen6_gs_state.c |  33 +---
>  src/mesa/drivers/dri/i965/gen6_vs_state.c |  70 +--
>  src/mesa/drivers/dri/i965/gen6_wm_state.c |  70 +--
>  src/mesa/drivers/dri/i965/gen7_ds_state.c |  57 +-
>  src/mesa/drivers/dri/i965/gen7_hs_state.c |  60 +-
>  src/mesa/drivers/dri/i965/genX_state_upload.c | 240 +--
>  8 files changed, 227 insertions(+), 312 deletions(-)
>  delete mode 100644 src/mesa/drivers/dri/i965/gen6_vs_state.c
>  delete mode 100644 src/mesa/drivers/dri/i965/gen6_wm_state.c
>  delete mode 100644 src/mesa/drivers/dri/i965/gen7_ds_state.c
>  delete mode 100644 src/mesa/drivers/dri/i965/gen7_hs_state.c

Shouldn't gen7_upload_constant_state() in gen6_constant_state.c get
deleted in this patch?

> @@ -1752,6 +1764,145 @@ static const struct brw_tracked_state 
> genX(scissor_state) = {
> .emit = genX(upload_scissor_state),
>  };
>  
> +#if GEN_GEN >= 7
> +UNUSED static const uint32_t push_constant_opcodes[] = {
> +   [MESA_SHADER_VERTEX]  = 21,
> +   [MESA_SHADER_TESS_CTRL]   = 25, /* HS */
> +   [MESA_SHADER_TESS_EVAL]   = 26, /* DS */
> +   [MESA_SHADER_GEOMETRY]= 22,
> +   [MESA_SHADER_FRAGMENT]= 23,
> +   [MESA_SHADER_COMPUTE] = 0,
> +};
> +
> +static void
> +upload_constant_state(struct brw_context *brw,
> +  struct brw_stage_state *stage_state,
> +  bool active, uint32_t stage)
> +{
> +   UNUSED uint32_t mocs = GEN_GEN < 8 ? GEN7_MOCS_L3 : 0;
> +   active = active && stage_state->push_const_size != 0;
> +
> +   brw_batch_emit(brw, GENX(3DSTATE_CONSTANT_VS), pkt) {
> +  pkt._3DCommandSubOpcode = push_constant_opcodes[stage];
> +  if (active) {
> +#if GEN_GEN >= 9
> + pkt.ConstantBody.ConstantBuffer2ReadLength =
> +stage_state->push_const_size;
> + pkt.ConstantBody.PointerToConstantBuffer2 =
> +render_ro_bo(
> +   brw->batch.bo, stage_state->push_const_offset);

I don't think you need to line-wrap this.

> +#else
> + pkt.ConstantBody.ConstantBuffer0ReadLength =
> +stage_state->push_const_size;
> + pkt.ConstantBody.PointerToConstantBuffer0.offset =
> +stage_state->push_const_offset | mocs;
> +#endif
> +  }
> +   }
> +
> +   brw->ctx.NewDriverState |= GEN_GEN >= 9 ? BRW_NEW_SURFACES : 0;
> +}
> +#endif
> +
> +static void
> +genX(upload_vs_push_constants)(struct brw_context *brw)
> +{
> +   struct brw_stage_state *stage_state = >vs.base;
> +
> +   /* _BRW_NEW_VERTEX_PROGRAM */
> +   const struct brw_program *vp = brw_program_const(brw->vertex_program);
> +   /* BRW_NEW_VS_PROG_DATA */
> +   const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
> +
> +   _mesa_shader_write_subroutine_indices(>ctx, MESA_SHADER_VERTEX);
> +   gen6_upload_push_constants(brw, >program, prog_data, stage_state);
> +
> +#if GEN_GEN >= 7
> +   if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail)

   if (GEN_GEN == 7 && !GEN_IS_HASWELL && !brw->is_baytrail)

> +  gen7_emit_vs_workaround_flush(brw);
> +
> +   upload_constant_state(brw, stage_state, true /* active */,
> + MESA_SHADER_VERTEX);
> +#endif
> +}

With the old code deleted,
Reviewed-by: Kenneth Graunke 


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Re: [Mesa-dev] [PATCH v03 14/38] i965: Move MOCS macros to brw_context.h.

[Pohjolainen, Topi]

On Wed, May 03, 2017 at 05:11:45PM -0700, Rafael Antognolli wrote:
> On Wed, May 03, 2017 at 08:28:24PM +0300, Pohjolainen, Topi wrote:
> > On Mon, May 01, 2017 at 06:43:02PM -0700, Rafael Antognolli wrote:
> > > These macros are defined in brw_defines.h, which contains a lot of
> > > macros that conflict with autogenerated code from genxml. But we need to
> > > use them (the MOCS macros) in some of that same genxml code.
> > > 
> > > Moving them to brw_context.h solves that problem and we don't have to
> > > include brw_defines.h.
> > 
> > I've been hoping to remove things from brw_context.h - it starts to
> > resemble a dump yard for all sort of things. I think in this case we
> > could put these into brw_state.h instead? Or did you already try that?
> 
> I just tried this and it works fine too. I'm OK with either place to put
> these macros.

That would get my:

Reviewed-by: Topi Pohjolainen 

> 
> > > 
> > > Signed-off-by: Rafael Antognolli 
> > > ---
> > >  src/mesa/drivers/dri/i965/brw_context.h | 41 +-
> > >  src/mesa/drivers/dri/i965/brw_defines.h | 42 +--
> > >  2 files changed, 41 insertions(+), 42 deletions(-)
> > > 
> > > diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> > > b/src/mesa/drivers/dri/i965/brw_context.h
> > > index c7d6e49..5e627ae 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_context.h
> > > +++ b/src/mesa/drivers/dri/i965/brw_context.h
> > > @@ -397,6 +397,47 @@ struct brw_cache {
> > > bool bo_used_by_gpu;
> > >  };
> > >  
> > > +/* Memory Object Control State:
> > > + * Specifying zero for L3 means "uncached in L3", at least on Haswell
> > > + * and Baytrail, since there are no PTE flags for setting L3 
> > > cacheability.
> > > + * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
> > > + * may still respect that.
> > > + */
> > > +#define GEN7_MOCS_L31
> > > +
> > > +/* Ivybridge only: cache in LLC.
> > > + * Specifying zero here means to use the PTE values set by the kernel;
> > > + * non-zero overrides the PTE values.
> > > + */
> > > +#define IVB_MOCS_LLC(1 << 1)
> > > +
> > > +/* Baytrail only: snoop in CPU cache */
> > > +#define BYT_MOCS_SNOOP  (1 << 1)
> > > +
> > > +/* Haswell only: LLC/eLLC controls (write-back or uncached).
> > > + * Specifying zero here means to use the PTE values set by the kernel,
> > > + * which is useful since it offers additional control (write-through
> > > + * cacheing and age).  Non-zero overrides the PTE values.
> > > + */
> > > +#define HSW_MOCS_UC_LLC_UC_ELLC (1 << 1)
> > > +#define HSW_MOCS_WB_LLC_WB_ELLC (2 << 1)
> > > +#define HSW_MOCS_UC_LLC_WB_ELLC (3 << 1)
> > > +
> > > +/* Broadwell: these defines always use all available caches (L3, LLC, 
> > > eLLC),
> > > + * and let you force write-back (WB) or write-through (WT) caching, or 
> > > leave
> > > + * it up to the page table entry (PTE) specified by the kernel.
> > > + */
> > > +#define BDW_MOCS_WB  0x78
> > > +#define BDW_MOCS_WT  0x58
> > > +#define BDW_MOCS_PTE 0x18
> > > +
> > > +/* Skylake: MOCS is now an index into an array of 62 different caching
> > > + * configurations programmed by the kernel.
> > > + */
> > > +/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
> > > +#define SKL_MOCS_WB  (2 << 1)
> > > +/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
> > > +#define SKL_MOCS_PTE (1 << 1)
> > >  
> > >  /* Considered adding a member to this struct to document which flags
> > >   * an update might raise so that ordering of the state atoms can be
> > > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
> > > b/src/mesa/drivers/dri/i965/brw_defines.h
> > > index 08106c0..130a1ed 100644
> > > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > > @@ -1365,48 +1365,6 @@ enum brw_pixel_shader_coverage_mask_mode {
> > >   */
> > >  #define BRW_MAX_NUM_BUFFER_ENTRIES   (1 << 27)
> > >  
> > > -/* Memory Object Control State:
> > > - * Specifying zero for L3 means "uncached in L3", at least on Haswell
> > > - * and Baytrail, since there are no PTE flags for setting L3 
> > > cacheability.
> > > - * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
> > > - * may still respect that.
> > > - */
> > > -#define GEN7_MOCS_L31
> > > -
> > > -/* Ivybridge only: cache in LLC.
> > > - * Specifying zero here means to use the PTE values set by the kernel;
> > > - * non-zero overrides the PTE values.
> > > - */
> > > -#define IVB_MOCS_LLC(1 << 1)
> > > -
> > > -/* Baytrail only: snoop in CPU cache */
> > > -#define BYT_MOCS_SNOOP  (1 << 1)
> > > -
> > > -/* Haswell only: LLC/eLLC controls (write-back or uncached).
> > > - * Specifying zero here means to use the PTE values set by the kernel,
> > > - * which is useful since it offers additional control 

Re: [Mesa-dev] [PATCH v03 17/38] genxml: Add rules to build gen4, gen45 and ge5.

[Pohjolainen, Topi]

On Wed, May 03, 2017 at 05:08:12PM -0700, Rafael Antognolli wrote:
> On Wed, May 03, 2017 at 09:10:10PM +0300, Pohjolainen, Topi wrote:
> > 
> > In the subject: s/ge5/gen5/
> > 
> > But don't we need to squash this into the previous patch? Alone that patch
> > won't even link, right?
> 
> Yes, you are right, it should be squashed.

Ok, thanks. I already gave my r-b there before noticing it was broken. So
now we are good regardging these two.
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[Mesa-dev] [PATCH] i965: Don't try to unmap NULL program cache BO.

[Kenneth Graunke]

When running shader-db with intel_stub and recent Mesa, context creation
fails when making a logical hardware context.  In this case, we call
intelDestroyContext(), which gets here and tries to unmap the cache BO.

But there isn't one - we haven't made it yet.  So we try to unmap a
NULL pointer, which used to be safe (it did nothing), but crashes
after commit 7c3b8ed87859bfdfb985d21685115a729f9cd138.

The result is that we crash rather than failing context creation with
a nice message.  Either way nothing works, but this is more polite.
---
 src/mesa/drivers/dri/i965/brw_program_cache.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_program_cache.c 
b/src/mesa/drivers/dri/i965/brw_program_cache.c
index c06ee23781c..b0e2962f88f 100644
--- a/src/mesa/drivers/dri/i965/brw_program_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_program_cache.c
@@ -485,10 +485,13 @@ brw_destroy_cache(struct brw_context *brw, struct 
brw_cache *cache)
 
DBG("%s\n", __func__);
 
-   if (brw->has_llc)
-  brw_bo_unmap(cache->bo);
-   brw_bo_unreference(cache->bo);
-   cache->bo = NULL;
+   /* This can be NULL if context creation failed early on */
+   if (cache->bo) {
+  if (brw->has_llc)
+ brw_bo_unmap(cache->bo);
+  brw_bo_unreference(cache->bo);
+  cache->bo = NULL;
+   }
brw_clear_cache(brw, cache);
free(cache->items);
cache->items = NULL;
-- 
2.12.2

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[Mesa-dev] [PATCH shader-db 3/3] intel_stub: Return a non-zero context ID.

[Kenneth Graunke]

Recent Mesa has started detecting a hardware context ID of zero (which
is bogus - it's the default context ID) and failing GL context creation.
Previously it saw that the ioctl returned success and happily proceeded.

Don't bother assigning a real ID, but do assign a non-zero value.
---
 intel_stub.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/intel_stub.c b/intel_stub.c
index bbaceb4..7b6d193 100644
--- a/intel_stub.c
+++ b/intel_stub.c
@@ -221,6 +221,11 @@ ioctl(int fd, unsigned long request, ...)
 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
 return 0;
 }
+
+case DRM_IOCTL_I915_GEM_CONTEXT_CREATE: {
+struct drm_i915_gem_context_create *cc = argp;
+cc->ctx_id = 1; /* must be non-zero */
+}
default:
 return 0;
}
-- 
2.12.2

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[Mesa-dev] [PATCH shader-db 2/3] intel_stub: Pretend to support command parser version 9.

[Kenneth Graunke]

Haswell requires a relatively new command parser version to enable
GL 4.5, and we'd like to compile those shaders.  Since we don't actually
execute anything, it doesn't really matter.  Claim version 9, the
current version.
---
 intel_stub.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/intel_stub.c b/intel_stub.c
index 7f85678..bbaceb4 100644
--- a/intel_stub.c
+++ b/intel_stub.c
@@ -200,6 +200,9 @@ ioctl(int fd, unsigned long request, ...)
 case I915_PARAM_CHIPSET_ID:
 *getparam->value = 
strtod(getenv("INTEL_DEVID_OVERRIDE"), NULL);
 break;
+case I915_PARAM_CMD_PARSER_VERSION:
+*getparam->value = 9;
+break;
}
 
 return 0;
-- 
2.12.2

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[Mesa-dev] [PATCH shader-db 1/3] intel_stub: Handle HAS_WAIT_TIMEOUT getparam.

[Kenneth Graunke]

Newer Mesa requires this.  It's irrelevant for us; pretend to have it.
---
 intel_stub.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/intel_stub.c b/intel_stub.c
index 4917656..7f85678 100644
--- a/intel_stub.c
+++ b/intel_stub.c
@@ -192,11 +192,14 @@ ioctl(int fd, unsigned long request, ...)
case DRM_IOCTL_I915_GETPARAM: {
struct drm_i915_getparam *getparam = argp;
 
-if (getparam->param == I915_PARAM_HAS_RELAXED_DELTA)
+switch (getparam->param) {
+case I915_PARAM_HAS_RELAXED_DELTA:
+case I915_PARAM_HAS_WAIT_TIMEOUT:
 *getparam->value = 1;
-
-else if (getparam->param == I915_PARAM_CHIPSET_ID) {
-   *getparam->value = 
strtod(getenv("INTEL_DEVID_OVERRIDE"), NULL);
+break;
+case I915_PARAM_CHIPSET_ID:
+*getparam->value = 
strtod(getenv("INTEL_DEVID_OVERRIDE"), NULL);
+break;
}
 
 return 0;
-- 
2.12.2

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Re: [Mesa-dev] [RFC PATCH 00/17] Introducing SPIR-V support to clover

[Rob Clark]

On Wed, May 3, 2017 at 5:56 PM, Pierre Moreau  wrote:
>
> * As there is no upstream version of LLVM which can produce SPIR-V out of
>   OpenCL code, clCreateProgramWithSource will refuse to work if the target IR
>   is SPIR-V, for now.


hopefully this[1] will eventually happen, which would make this less
of an issue :-)

[1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112538.html
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Re: [Mesa-dev] [PATCH] i965: Make the field computed_depth_mode an enum.

[Matt Turner]

On Wed, May 3, 2017 at 6:03 PM, Kenneth Graunke  wrote:
> On Tuesday, May 2, 2017 11:02:58 AM PDT Rafael Antognolli wrote:
>> Since the enum is in the same header now, we can use it as the type of
>> the field.
>>
>> Signed-off-by: Rafael Antognolli 
>> ---
>>
>> PS: We can merge this with the previous patch too if that's better.
>>
>>  src/intel/compiler/brw_compiler.h | 2 +-
>>  src/intel/compiler/brw_fs.cpp | 2 +-
>>  2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/intel/compiler/brw_compiler.h 
>> b/src/intel/compiler/brw_compiler.h
>> index b5b1ee9..92fd4a2 100644
>> --- a/src/intel/compiler/brw_compiler.h
>> +++ b/src/intel/compiler/brw_compiler.h
>> @@ -504,7 +504,7 @@ struct brw_wm_prog_data {
>>/** @} */
>> } binding_table;
>>
>> -   uint8_t computed_depth_mode;
>> +   enum brw_pixel_shader_computed_depth_mode computed_depth_mode;
>> bool computed_stencil;
>
> I think this may expand it from an 8-bit value to a 32-bit value.
> It might have been anyway.  Does the size of the struct stay the same?

If it's marked as "PACKED" it should stay the same size.
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[Mesa-dev] [Bug 100613] Regression in Mesa 17 on s390x (zSystems)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=100613

--- Comment #20 from Ray Strode  ---
Hi,

> - if i leave vector_justify to FALSE, but change attachment 130980 
> to use fetch_width instead of format_desc->block.bits then all the
> 3 component sshort tests and half float tests start working, but then
> r32g32b32_sscaled start failing.  So, the above patch fudges it to make
> everything in draw-vertices and draw-vertices-half-float work.
Just to expand on this...  If we comment out the 3x32bit vector fetch special
case alluded to comment 10, and instead rely on a 96bit scalar fetch, (just as
we rely on a 48bit scalar fetch for r16g16b16), then using fetch_width instead
of format_desc->block.bits in the vec_nr computation works for the 32bit case,
too.  

So, Roland, your first intuition appears to be right, the scalar and vector
paths are different.  Probably attachment 131000 is wrong, or I mucked up the
testing, or something. But, of course, we should get the scalar case working
regardless...

For 3 r16g16b16 (well x16y16z16) vertices:

 short v3[] = {
   x1, y1, z1,
   x1, y2, z2,
   x2, y1, z3
 };

a scalar 48bit fetch leaves things like this:

packed[0] = [ pad x1 y1 z1 pad x1 y2 z2 ]
packed[1] = [ pad x2 y1 z3 pad x2 y1 z3 ]

(where pad means zeros from the zero-extend-to-64bits op)

which then get grouped into 32-bit quantities, merged and reordered like so:

dst[0] = [ [pad x1] [pad x1] [pad x2] [pad x2] ]
dst[1] = [ [ y1 z1] [ y2 z2] [ y1 z3] [ y1 z3] ]

in this layout, vec_nr needs to be 0, then 1, then 1 to get the correct values,
which is achieved with 

vec_nr = (fetch_width - (chan_desc.shift + chan_desc.size)) / type.width);

Of course, I think we want to unconditionally (on big endian) use: 

vec_nr = (format_desc->block.bits - (chan_desc.shift + chan_desc.size)) /
type.width;

instead, which leaves vec_nr as 0, then 0, then 1.  In order for that to work,
it requires dst[0]837060
 to look like:

dst[0] = [ [y1  x1]  [y2  x1]  [y1  x2]  [y1  x2] ]

We almost get there by using vector_justify = TRUE. it leaves us with:

packed[0] = [ x1  y1  z1 pad  x1  y2  z2 pad ]
packed[1] = [ x2  y1  z3 pad  x2  y1  z3 pad ]

dst[0] = [ [x1  y1] [x1  y2] [x2  y1] [x2  y1] ]

So, when vector_justify is TRUE, we end up with almost what we want.  Just the
x and y coordinates are sitting in each 32 bit word in reverse. (i'm omitting
dst[1] for brevity, but it works out to byteswap those, too).  This is why
adding the u_format.csv big endian entry for the very odd looking swizzle
format yxz1 worked.  It's letting the chan swizzle at the end do the swapping
for us.  I don't think it's a good idea to rely on that though. So I guess in
the cases we do a scalar fetch we need to justify and swap ?

I guess it's somewhat analogous to say

short foo[2] = [ 0x, 0x ];
int32_t bar = *(int32_t *) foo

where you normally would need to swap on bigendian if you want to keep 0x
first/least significant.

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[Mesa-dev] [PATCH 7/7] mesa: add KHR_no_error support for glUseProgram

[Timothy Arceri]

---
 src/mapi/glapi/gen/gl_API.xml |  2 +-
 src/mesa/main/shaderapi.c | 65 +++
 src/mesa/main/shaderapi.h |  2 ++
 3 files changed, 44 insertions(+), 25 deletions(-)

diff --git a/src/mapi/glapi/gen/gl_API.xml b/src/mapi/glapi/gen/gl_API.xml
index 83f4c01..c271887 100644
--- a/src/mapi/glapi/gen/gl_API.xml
+++ b/src/mapi/glapi/gen/gl_API.xml
@@ -5493,21 +5493,21 @@
 
 
 
 
 
 
 
 
 
 
-
+
 
 
 
 
 
 
 
 
 
 
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index eb75a3e..0a73d40 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -1841,20 +1841,60 @@ _mesa_ShaderSource(GLuint shaderObj, GLsizei count,
   free(source);
   source = replacement;
}
 #endif /* ENABLE_SHADER_CACHE */
 
shader_source(sh, source);
 
free(offsets);
 }
 
+/* The ARB_separate_shader_object spec says:
+ *
+ * "The executable code for an individual shader stage is taken from
+ * the current program for that stage.  If there is a current program
+ * object established by UseProgram, that program is considered current
+ * for all stages.  Otherwise, if there is a bound program pipeline
+ * object (section 2.14.PPO), the program bound to the appropriate
+ * stage of the pipeline object is considered current."
+ */
+#define USE_PROGRAM(no_error)\
+   if (program) {\
+  /* Attach shader state to the binding point */ \
+  _mesa_reference_pipeline_object(ctx, >_Shader, >Shader); \
+  /* Update the program */   \
+  _mesa_use_shader_program(ctx, shProg); \
+   } else {  \
+  /* Must be done first: detach the progam */\
+  _mesa_use_shader_program(ctx, shProg); \
+  /* Unattach shader_state binding point */  \
+  _mesa_reference_pipeline_object(ctx, >_Shader,\
+  ctx->Pipeline.Default);\
+  /* If a pipeline was bound, rebind it */   \
+  if (ctx->Pipeline.Current) {   \
+ _mesa_BindProgramPipeline##no_error(ctx->Pipeline.Current->Name);   \
+  }  \
+   } \
+
+void GLAPIENTRY
+_mesa_UseProgram_no_error(GLuint program)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   struct gl_shader_program *shProg = NULL;
+
+   if (program) {
+  shProg = _mesa_lookup_shader_program(ctx, program);
+   }
+
+   USE_PROGRAM(_no_error)
+}
+
 
 void GLAPIENTRY
 _mesa_UseProgram(GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
struct gl_shader_program *shProg = NULL;
 
if (MESA_VERBOSE & VERBOSE_API)
   _mesa_debug(ctx, "glUseProgram %u\n", program);
 
@@ -1875,44 +1915,21 @@ _mesa_UseProgram(GLuint program)
  return;
   }
 
 #ifdef DEBUG
   if (ctx->_Shader->Flags & GLSL_USE_PROG) {
  print_shader_info(shProg);
   }
 #endif
}
 
-   /* The ARB_separate_shader_object spec says:
-*
-* "The executable code for an individual shader stage is taken from
-* the current program for that stage.  If there is a current program
-* object established by UseProgram, that program is considered current
-* for all stages.  Otherwise, if there is a bound program pipeline
-* object (section 2.14.PPO), the program bound to the appropriate
-* stage of the pipeline object is considered current."
-*/
-   if (program) {
-  /* Attach shader state to the binding point */
-  _mesa_reference_pipeline_object(ctx, >_Shader, >Shader);
-  /* Update the program */
-  _mesa_use_shader_program(ctx, shProg);
-   } else {
-  /* Must be done first: detach the progam */
-  _mesa_use_shader_program(ctx, shProg);
-  /* Unattach shader_state binding point */
-  _mesa_reference_pipeline_object(ctx, >_Shader, 
ctx->Pipeline.Default);
-  /* If a pipeline was bound, rebind it */
-  if (ctx->Pipeline.Current) {
- _mesa_BindProgramPipeline(ctx->Pipeline.Current->Name);
-  }
-   }
+   USE_PROGRAM()
 }
 
 
 void GLAPIENTRY
 _mesa_ValidateProgram(GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
validate_program(ctx, program);
 }
 
diff --git a/src/mesa/main/shaderapi.h b/src/mesa/main/shaderapi.h
index 99b4fe8..0a28185 100644
--- a/src/mesa/main/shaderapi.h
+++ b/src/mesa/main/shaderapi.h
@@ -120,20 +120,22 @@ _mesa_IsProgram(GLuint name);
 
 

[Mesa-dev] [PATCH 2/7] mesa: add KHR_no_error support for glUseProgramStages()

[Timothy Arceri]

---
 src/mapi/glapi/gen/ARB_separate_shader_objects.xml |  2 +-
 src/mesa/main/pipelineobj.c| 21 +
 src/mesa/main/pipelineobj.h|  3 +++
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml 
b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
index 26a7afa..9b17a4e 100644
--- a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
+++ b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
@@ -8,21 +8,21 @@
   
   
   
   
   
   
   
   
   
 
-  
+  
  
  
  
   
   
  
  
   
   
  
diff --git a/src/mesa/main/pipelineobj.c b/src/mesa/main/pipelineobj.c
index 047c0a3..b6a4332 100644
--- a/src/mesa/main/pipelineobj.c
+++ b/src/mesa/main/pipelineobj.c
@@ -249,20 +249,41 @@ use_program_stages(struct gl_context *ctx, struct 
gl_shader_program *shProg,
 
if ((stages & GL_TESS_EVALUATION_SHADER_BIT) != 0)
   use_program_stage(ctx, GL_TESS_EVALUATION_SHADER, shProg, pipe);
 
if ((stages & GL_COMPUTE_SHADER_BIT) != 0)
   use_program_stage(ctx, GL_COMPUTE_SHADER, shProg, pipe);
 
pipe->Validated = false;
 }
 
+void GLAPIENTRY
+_mesa_UseProgramStages_no_error(GLuint pipeline, GLbitfield stages,
+GLuint prog)
+{
+   GET_CURRENT_CONTEXT(ctx);
+
+   struct gl_pipeline_object *pipe =
+  _mesa_lookup_pipeline_object(ctx, pipeline);
+   struct gl_shader_program *shProg = NULL;
+
+   if (prog)
+  _mesa_lookup_shader_program(ctx, prog);
+
+   /* Object is created by any Pipeline call but glGenProgramPipelines,
+* glIsProgramPipeline and GetProgramPipelineInfoLog
+*/
+   pipe->EverBound = GL_TRUE;
+
+   use_program_stages(ctx, shProg, stages, pipe);
+}
+
 /**
  * Bound program to severals stages of the pipeline
  */
 void GLAPIENTRY
 _mesa_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
 
struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, 
pipeline);
struct gl_shader_program *shProg = NULL;
diff --git a/src/mesa/main/pipelineobj.h b/src/mesa/main/pipelineobj.h
index fbcb765..048a4c7 100644
--- a/src/mesa/main/pipelineobj.h
+++ b/src/mesa/main/pipelineobj.h
@@ -64,20 +64,23 @@ _mesa_reference_pipeline_object(struct gl_context *ctx,
 
 extern void
 _mesa_bind_pipeline(struct gl_context *ctx,
 struct gl_pipeline_object *pipe);
 
 extern GLboolean
 _mesa_validate_program_pipeline(struct gl_context * ctx,
 struct gl_pipeline_object *pipe);
 
 
+void GLAPIENTRY
+_mesa_UseProgramStages_no_error(GLuint pipeline, GLbitfield stages,
+GLuint prog);
 extern void GLAPIENTRY
 _mesa_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program);
 
 extern void GLAPIENTRY
 _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program);
 
 extern void GLAPIENTRY
 _mesa_BindProgramPipeline(GLuint pipeline);
 
 extern void GLAPIENTRY
-- 
2.9.3

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[Mesa-dev] [PATCH 4/7] mesa: add KHR_no_error support for glBindProgramPipeline()

[Timothy Arceri]

---
 src/mapi/glapi/gen/ARB_separate_shader_objects.xml |  2 +-
 src/mesa/main/pipelineobj.c| 26 ++
 src/mesa/main/pipelineobj.h|  2 ++
 3 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml 
b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
index c3385e9..54c1be3 100644
--- a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
+++ b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
@@ -23,21 +23,21 @@
   
  
  
   
   
  
  
  
  
   
-  
+  
  
   
   
  
  
   
   
  
  
   
diff --git a/src/mesa/main/pipelineobj.c b/src/mesa/main/pipelineobj.c
index 993fc0a..f7c911f 100644
--- a/src/mesa/main/pipelineobj.c
+++ b/src/mesa/main/pipelineobj.c
@@ -424,20 +424,46 @@ _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program)
 
if ((shProg != NULL) && !shProg->data->LinkStatus) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
 "glActiveShaderProgram(program %u not linked)", shProg->Name);
   return;
}
 
_mesa_reference_shader_program(ctx, >ActiveProgram, shProg);
 }
 
+void GLAPIENTRY
+_mesa_BindProgramPipeline_no_error(GLuint pipeline)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   struct gl_pipeline_object *newObj = NULL;
+
+   /* Rebinding the same pipeline object: no change.
+*/
+   if (ctx->_Shader->Name == pipeline)
+  return;
+
+   /* Get pointer to new pipeline object (newObj)
+*/
+   if (pipeline) {
+  /* non-default pipeline object */
+  newObj = _mesa_lookup_pipeline_object(ctx, pipeline);
+
+  /* Object is created by any Pipeline call but glGenProgramPipelines,
+   * glIsProgramPipeline and GetProgramPipelineInfoLog
+   */
+  newObj->EverBound = GL_TRUE;
+   }
+
+   _mesa_bind_pipeline(ctx, newObj);
+}
+
 /**
  * Make program of the pipeline current
  */
 void GLAPIENTRY
 _mesa_BindProgramPipeline(GLuint pipeline)
 {
GET_CURRENT_CONTEXT(ctx);
struct gl_pipeline_object *newObj = NULL;
 
if (MESA_VERBOSE & VERBOSE_API)
diff --git a/src/mesa/main/pipelineobj.h b/src/mesa/main/pipelineobj.h
index 54aa409..1bf6b71 100644
--- a/src/mesa/main/pipelineobj.h
+++ b/src/mesa/main/pipelineobj.h
@@ -75,20 +75,22 @@ void GLAPIENTRY
 _mesa_UseProgramStages_no_error(GLuint pipeline, GLbitfield stages,
 GLuint prog);
 extern void GLAPIENTRY
 _mesa_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program);
 
 void GLAPIENTRY
 _mesa_ActiveShaderProgram_no_error(GLuint pipeline, GLuint program);
 extern void GLAPIENTRY
 _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program);
 
+void GLAPIENTRY
+_mesa_BindProgramPipeline_no_error(GLuint pipeline);
 extern void GLAPIENTRY
 _mesa_BindProgramPipeline(GLuint pipeline);
 
 extern void GLAPIENTRY
 _mesa_DeleteProgramPipelines(GLsizei n, const GLuint *pipelines);
 
 extern void GLAPIENTRY
 _mesa_GenProgramPipelines(GLsizei n, GLuint *pipelines);
 
 void GLAPIENTRY
-- 
2.9.3

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[Mesa-dev] [PATCH 1/7] mesa: create use_program_stages() helper

[Timothy Arceri]

This will be used to create a KHR_no_error version of
glUseProgramStages().
---
 src/mesa/main/pipelineobj.c | 71 +
 1 file changed, 39 insertions(+), 32 deletions(-)

diff --git a/src/mesa/main/pipelineobj.c b/src/mesa/main/pipelineobj.c
index dbca3c3..047c0a3 100644
--- a/src/mesa/main/pipelineobj.c
+++ b/src/mesa/main/pipelineobj.c
@@ -211,20 +211,58 @@ use_program_stage(struct gl_context *ctx, GLenum type,
   struct gl_shader_program *shProg,
   struct gl_pipeline_object *pipe) {
gl_shader_stage stage = _mesa_shader_enum_to_shader_stage(type);
struct gl_program *prog = NULL;
if (shProg && shProg->_LinkedShaders[stage])
   prog = shProg->_LinkedShaders[stage]->Program;
 
_mesa_use_program(ctx, stage, shProg, prog, pipe);
 }
 
+static void
+use_program_stages(struct gl_context *ctx, struct gl_shader_program *shProg,
+   GLbitfield stages, struct gl_pipeline_object *pipe) {
+
+   /* Enable individual stages from the program as requested by the
+* application.  If there is no shader for a requested stage in the
+* program, _mesa_use_shader_program will enable fixed-function processing
+* as dictated by the spec.
+*
+* Section 2.11.4 (Program Pipeline Objects) of the OpenGL 4.1 spec
+* says:
+*
+* "If UseProgramStages is called with program set to zero or with a
+* program object that contains no executable code for the given
+* stages, it is as if the pipeline object has no programmable stage
+* configured for the indicated shader stages."
+*/
+   if ((stages & GL_VERTEX_SHADER_BIT) != 0)
+  use_program_stage(ctx, GL_VERTEX_SHADER, shProg, pipe);
+
+   if ((stages & GL_FRAGMENT_SHADER_BIT) != 0)
+  use_program_stage(ctx, GL_FRAGMENT_SHADER, shProg, pipe);
+
+   if ((stages & GL_GEOMETRY_SHADER_BIT) != 0)
+  use_program_stage(ctx, GL_GEOMETRY_SHADER, shProg, pipe);
+
+   if ((stages & GL_TESS_CONTROL_SHADER_BIT) != 0)
+  use_program_stage(ctx, GL_TESS_CONTROL_SHADER, shProg, pipe);
+
+   if ((stages & GL_TESS_EVALUATION_SHADER_BIT) != 0)
+  use_program_stage(ctx, GL_TESS_EVALUATION_SHADER, shProg, pipe);
+
+   if ((stages & GL_COMPUTE_SHADER_BIT) != 0)
+  use_program_stage(ctx, GL_COMPUTE_SHADER, shProg, pipe);
+
+   pipe->Validated = false;
+}
+
 /**
  * Bound program to severals stages of the pipeline
  */
 void GLAPIENTRY
 _mesa_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
 
struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, 
pipeline);
struct gl_shader_program *shProg = NULL;
@@ -304,52 +342,21 @@ _mesa_UseProgramStages(GLuint pipeline, GLbitfield 
stages, GLuint program)
   }
 
   if (!shProg->SeparateShader) {
  _mesa_error(ctx, GL_INVALID_OPERATION,
  "glUseProgramStages(program wasn't linked with the "
  "PROGRAM_SEPARABLE flag)");
  return;
   }
}
 
-   /* Enable individual stages from the program as requested by the
-* application.  If there is no shader for a requested stage in the
-* program, _mesa_use_shader_program will enable fixed-function processing
-* as dictated by the spec.
-*
-* Section 2.11.4 (Program Pipeline Objects) of the OpenGL 4.1 spec
-* says:
-*
-* "If UseProgramStages is called with program set to zero or with a
-* program object that contains no executable code for the given
-* stages, it is as if the pipeline object has no programmable stage
-* configured for the indicated shader stages."
-*/
-   if ((stages & GL_VERTEX_SHADER_BIT) != 0)
-  use_program_stage(ctx, GL_VERTEX_SHADER, shProg, pipe);
-
-   if ((stages & GL_FRAGMENT_SHADER_BIT) != 0)
-  use_program_stage(ctx, GL_FRAGMENT_SHADER, shProg, pipe);
-
-   if ((stages & GL_GEOMETRY_SHADER_BIT) != 0)
-  use_program_stage(ctx, GL_GEOMETRY_SHADER, shProg, pipe);
-
-   if ((stages & GL_TESS_CONTROL_SHADER_BIT) != 0)
-  use_program_stage(ctx, GL_TESS_CONTROL_SHADER, shProg, pipe);
-
-   if ((stages & GL_TESS_EVALUATION_SHADER_BIT) != 0)
-  use_program_stage(ctx, GL_TESS_EVALUATION_SHADER, shProg, pipe);
-
-   if ((stages & GL_COMPUTE_SHADER_BIT) != 0)
-  use_program_stage(ctx, GL_COMPUTE_SHADER, shProg, pipe);
-
-   pipe->Validated = false;
+   use_program_stages(ctx, shProg, stages, pipe);
 }
 
 /**
  * Use the named shader program for subsequent glUniform calls (if pipeline
  * bound)
  */
 void GLAPIENTRY
 _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
-- 
2.9.3

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[Mesa-dev] [PATCH 6/7] mesa: small _mesa_UseProgram() tidy up

[Timothy Arceri]

Makes the code easier to follow
---
 src/mesa/main/shaderapi.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index b764fee..eb75a3e 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -1846,21 +1846,21 @@ _mesa_ShaderSource(GLuint shaderObj, GLsizei count,
shader_source(sh, source);
 
free(offsets);
 }
 
 
 void GLAPIENTRY
 _mesa_UseProgram(GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
-   struct gl_shader_program *shProg;
+   struct gl_shader_program *shProg = NULL;
 
if (MESA_VERBOSE & VERBOSE_API)
   _mesa_debug(ctx, "glUseProgram %u\n", program);
 
if (_mesa_is_xfb_active_and_unpaused(ctx)) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
   "glUseProgram(transform feedback active)");
   return;
}
 
@@ -1874,23 +1874,20 @@ _mesa_UseProgram(GLuint program)
  "glUseProgram(program %u not linked)", program);
  return;
   }
 
 #ifdef DEBUG
   if (ctx->_Shader->Flags & GLSL_USE_PROG) {
  print_shader_info(shProg);
   }
 #endif
}
-   else {
-  shProg = NULL;
-   }
 
/* The ARB_separate_shader_object spec says:
 *
 * "The executable code for an individual shader stage is taken from
 * the current program for that stage.  If there is a current program
 * object established by UseProgram, that program is considered current
 * for all stages.  Otherwise, if there is a bound program pipeline
 * object (section 2.14.PPO), the program bound to the appropriate
 * stage of the pipeline object is considered current."
 */
-- 
2.9.3

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[Mesa-dev] [PATCH 5/7] mesa: restrict UseProgram env var to debug builds

[Timothy Arceri]

I can't think of any reason you would want this in a release
build.
---
 src/mesa/main/shaderapi.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index c41f006..b764fee 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -78,22 +78,24 @@ _mesa_get_shader_flags(void)
   if (strstr(env, "log"))
  flags |= GLSL_LOG;
   if (strstr(env, "cache_info"))
  flags |= GLSL_CACHE_INFO;
   if (strstr(env, "nopvert"))
  flags |= GLSL_NOP_VERT;
   if (strstr(env, "nopfrag"))
  flags |= GLSL_NOP_FRAG;
   if (strstr(env, "uniform"))
  flags |= GLSL_UNIFORMS;
+#ifdef DEBUG
   if (strstr(env, "useprog"))
  flags |= GLSL_USE_PROG;
+#endif
   if (strstr(env, "errors"))
  flags |= GLSL_REPORT_ERRORS;
}
 
return flags;
 }
 
 /**
  * Memoized version of getenv("MESA_SHADER_CAPTURE_PATH").
  */
@@ -1181,55 +1183,50 @@ _mesa_link_program(struct gl_context *ctx, struct 
gl_shader_program *shProg)
   shProg->Shaders[i]->Name,
   shProg->Shaders[i]->Stage);
   }
}
 }
 
 
 /**
  * Print basic shader info (for debug).
  */
+#ifdef DEBUG
 static void
 print_shader_info(const struct gl_shader_program *shProg)
 {
GLuint i;
 
printf("Mesa: glUseProgram(%u)\n", shProg->Name);
for (i = 0; i < shProg->NumShaders; i++) {
-#ifdef DEBUG
   printf("  %s shader %u, checksum %u\n",
  _mesa_shader_stage_to_string(shProg->Shaders[i]->Stage),
 shProg->Shaders[i]->Name,
 shProg->Shaders[i]->SourceChecksum);
-#else
-  printf("  %s shader %u\n",
- _mesa_shader_stage_to_string(shProg->Shaders[i]->Stage),
- shProg->Shaders[i]->Name);
-#endif
}
if (shProg->_LinkedShaders[MESA_SHADER_VERTEX])
   printf("  vert prog %u\n",
 shProg->_LinkedShaders[MESA_SHADER_VERTEX]->Program->Id);
if (shProg->_LinkedShaders[MESA_SHADER_FRAGMENT])
   printf("  frag prog %u\n",
 shProg->_LinkedShaders[MESA_SHADER_FRAGMENT]->Program->Id);
if (shProg->_LinkedShaders[MESA_SHADER_GEOMETRY])
   printf("  geom prog %u\n",
 shProg->_LinkedShaders[MESA_SHADER_GEOMETRY]->Program->Id);
if (shProg->_LinkedShaders[MESA_SHADER_TESS_CTRL])
   printf("  tesc prog %u\n",
 shProg->_LinkedShaders[MESA_SHADER_TESS_CTRL]->Program->Id);
if (shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL])
   printf("  tese prog %u\n",
 shProg->_LinkedShaders[MESA_SHADER_TESS_EVAL]->Program->Id);
 }
-
+#endif
 
 /**
  * Use the named shader program for subsequent glUniform calls
  */
 void
 _mesa_active_program(struct gl_context *ctx, struct gl_shader_program *shProg,
 const char *caller)
 {
if ((shProg != NULL) && !shProg->data->LinkStatus) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
@@ -1871,24 +1868,25 @@ _mesa_UseProgram(GLuint program)
   shProg = _mesa_lookup_shader_program_err(ctx, program, "glUseProgram");
   if (!shProg) {
  return;
   }
   if (!shProg->data->LinkStatus) {
  _mesa_error(ctx, GL_INVALID_OPERATION,
  "glUseProgram(program %u not linked)", program);
  return;
   }
 
-  /* debug code */
+#ifdef DEBUG
   if (ctx->_Shader->Flags & GLSL_USE_PROG) {
  print_shader_info(shProg);
   }
+#endif
}
else {
   shProg = NULL;
}
 
/* The ARB_separate_shader_object spec says:
 *
 * "The executable code for an individual shader stage is taken from
 * the current program for that stage.  If there is a current program
 * object established by UseProgram, that program is considered current
-- 
2.9.3

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[Mesa-dev] [PATCH 3/7] mesa: add KHR_no_error support for glActiveShaderProgram()

[Timothy Arceri]

---
 src/mapi/glapi/gen/ARB_separate_shader_objects.xml |  2 +-
 src/mesa/main/pipelineobj.c| 18 ++
 src/mesa/main/pipelineobj.h|  2 ++
 3 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml 
b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
index 9b17a4e..c3385e9 100644
--- a/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
+++ b/src/mapi/glapi/gen/ARB_separate_shader_objects.xml
@@ -13,21 +13,21 @@
   
   
   
   
 
   
  
  
  
   
-  
+  
  
  
   
   
  
  
  
  
   
   
diff --git a/src/mesa/main/pipelineobj.c b/src/mesa/main/pipelineobj.c
index b6a4332..993fc0a 100644
--- a/src/mesa/main/pipelineobj.c
+++ b/src/mesa/main/pipelineobj.c
@@ -366,20 +366,38 @@ _mesa_UseProgramStages(GLuint pipeline, GLbitfield 
stages, GLuint program)
  _mesa_error(ctx, GL_INVALID_OPERATION,
  "glUseProgramStages(program wasn't linked with the "
  "PROGRAM_SEPARABLE flag)");
  return;
   }
}
 
use_program_stages(ctx, shProg, stages, pipe);
 }
 
+void GLAPIENTRY
+_mesa_ActiveShaderProgram_no_error(GLuint pipeline, GLuint program)
+{
+   GET_CURRENT_CONTEXT(ctx);
+   struct gl_shader_program *shProg = NULL;
+   struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, 
pipeline);
+
+   if (program)
+  shProg = _mesa_lookup_shader_program(ctx, program);
+
+   /* Object is created by any Pipeline call but glGenProgramPipelines,
+* glIsProgramPipeline and GetProgramPipelineInfoLog
+*/
+   pipe->EverBound = GL_TRUE;
+
+   _mesa_reference_shader_program(ctx, >ActiveProgram, shProg);
+}
+
 /**
  * Use the named shader program for subsequent glUniform calls (if pipeline
  * bound)
  */
 void GLAPIENTRY
 _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program)
 {
GET_CURRENT_CONTEXT(ctx);
struct gl_shader_program *shProg = NULL;
struct gl_pipeline_object *pipe = _mesa_lookup_pipeline_object(ctx, 
pipeline);
diff --git a/src/mesa/main/pipelineobj.h b/src/mesa/main/pipelineobj.h
index 048a4c7..54aa409 100644
--- a/src/mesa/main/pipelineobj.h
+++ b/src/mesa/main/pipelineobj.h
@@ -70,20 +70,22 @@ extern GLboolean
 _mesa_validate_program_pipeline(struct gl_context * ctx,
 struct gl_pipeline_object *pipe);
 
 
 void GLAPIENTRY
 _mesa_UseProgramStages_no_error(GLuint pipeline, GLbitfield stages,
 GLuint prog);
 extern void GLAPIENTRY
 _mesa_UseProgramStages(GLuint pipeline, GLbitfield stages, GLuint program);
 
+void GLAPIENTRY
+_mesa_ActiveShaderProgram_no_error(GLuint pipeline, GLuint program);
 extern void GLAPIENTRY
 _mesa_ActiveShaderProgram(GLuint pipeline, GLuint program);
 
 extern void GLAPIENTRY
 _mesa_BindProgramPipeline(GLuint pipeline);
 
 extern void GLAPIENTRY
 _mesa_DeleteProgramPipelines(GLsizei n, const GLuint *pipelines);
 
 extern void GLAPIENTRY
-- 
2.9.3

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Re: [Mesa-dev] [PATCH] genxml: Fix 3DSTATE_DEPTH_BUFFER length on gen5.

[Kenneth Graunke]

On Wednesday, May 3, 2017 5:53:35 PM PDT Rafael Antognolli wrote:
> The hardware docs are wrong, but the length used in the xml is also
> wrong.
> 
> Signed-off-by: Rafael Antognolli 
> ---
>  src/intel/genxml/gen5.xml | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
> index 0b84650..447499c 100644
> --- a/src/intel/genxml/gen5.xml
> +++ b/src/intel/genxml/gen5.xml
> @@ -649,14 +649,14 @@
>  
>
>  
> -  
> -
> +  
> +
>  
>  
>   default="3"/>
>   default="1"/>
>   default="5"/>
> -
> +
>  
>  
>
> 

Yep, the Ironlake docs are awful.  "DWord 6" claims to contain Render
Target View Extent - but it does not.  It does not exist on Gen5.
It contains MOCS on Gen6+.  It contains RTVE on Gen7+.

Reviewed-by: Kenneth Graunke 


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Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix the DCE pass in presence of loops

[Timothy Arceri]

On 04/05/17 10:43, Ilia Mirkin wrote:

I looked into removing these passes a while back. A little detail here
is that DCE has to get run at least a little bit for correctness
reasons -- some (lazy) glsl -> tgsi


Is there anyway to improve this? I was actually looking at this a little 
yesterday but to be honest I was getting a little lost in the code. It 
wasn't entirely clear to me how this conversion pass works and if we can 
stop doing this in the first place.


glsl_to_tgsi_visitor::visit_expression(ir_expression* ir, st_src_reg 
*op) and glsl_to_tgsi_visitor::visit(ir_texture *ir)


Have a comment:

   /* Storage for our result.  Ideally for an assignment we'd be using
* the actual storage for the result here, instead.
*/

The code all seems to be pretty much a copy of ir_to_mesa which has the 
same limitations.



code uses the dead_mask with the
assumption that DCE is run later.

Another observation was that while, indeed, those passes take a while,
they also remove a bunch of code. Not running those passes makes them
disappear from the profile, but then the logic down the line has more
work to do. It's not as obvious of a win as one might think.


Yes I noticed this also :)



Additionally, at least for nouveau, this logic does better than
nouveau's codegen in some cases. (Largely due to the fact that system
values get copy-propagated here but they don't by codegen, generally,
which can lead to large register live intervals. At least that's what
I recall from my analysis a while ago.)

This was my hack-branch: https://github.com/imirkin/mesa/commits/st-pass-cleanup

On Wed, May 3, 2017 at 8:36 PM, Timothy Arceri  wrote:

This and the tgsi copy_propagation pass are very slow, I'd really like it if
we both didn't require the pass for things to work and also didn't make it
any slower. perf is showing these 2 passes at ~11% during Deus Ex start-up
(cold cache).

Can we not just add a DCE call to the glsl linker/compiler calls e.g.

if (ctx->Const.GLSLOptimizeConservatively) {
   /* Run it just once. */
   do_common_optimization(ir, true, false,
 >Const.ShaderCompilerOptions[stage],
 ctx->Const.NativeIntegers);

  ---> call DCE here to clean up since we don't call the opt passes again
<---

} else {
   /* Repeat it until it stops making changes. */
   while (do_common_optimization(ir, true, false,

>Const.ShaderCompilerOptions[stage],
 ctx->Const.NativeIntegers))
  ;

}

On 03/05/17 00:43, Samuel Pitoiset wrote:


The TGSI DCE pass doesn't eliminate dead assignments like
MOV TEMP[0], TEMP[1] in presence of loops because it assumes
that the visitor doesn't emit dead code. This assumption is
actually wrong and this situation happens.

However, it appears that the merge_registers() pass accidentally
takes care of this for some weird reasons. But since this pass has
been disabled for RadeonSI and Nouveau, the renumber_registers()
pass which is called *after*, can't do its job correctly.

This is because it assumes that no dead code is present. But if
there is still a dead assignment, it might re-use the TEMP
register id incorrectly and emits wrong code.

This patches eliminates all dead assignments by tracking
all temporary register reads like what the renumber_registers()
actually does. The best solution would be to rewrite that DCE
pass entirely but it's more work.

This should fix Unigine Heaven on RadeonSI and Nouveau.

shader-db results with RadeonSI:

47109 shaders in 29632 tests
Totals:
SGPRS: 1919548 -> 1919572 (0.00 %)
VGPRS: 1139205 -> 1139209 (0.00 %)
Spilled SGPRs: 1865 -> 1867 (0.11 %)
Spilled VGPRs: 65 -> 65 (0.00 %)
Private memory VGPRs: 1184 -> 1184 (0.00 %)
Scratch size: 1308 -> 1308 (0.00 %) dwords per thread
Code Size: 60083036 -> 60083244 (0.00 %) bytes
LDS: 1077 -> 1077 (0.00 %) blocks
Max Waves: 431200 -> 431200 (0.00 %)
Wait states: 0 -> 0 (0.00 %)

It's still interesting to disable the merge_registers() pass.

Signed-off-by: Samuel Pitoiset 
---
   src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 36
+-
   1 file changed, 31 insertions(+), 5 deletions(-)

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0f8688a41c..01b5a4dc98 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5085,9 +5085,13 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)

glsl_to_tgsi_instruction *,
this->next_temp *
4);
  int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
+   int *first_reads = rzalloc_array(mem_ctx, int, this->next_temp);
  int level = 0;
  int removed = 0;
   +   for (int i = 0; i < this->next_temp; i++)
+  first_reads[i] = -1;
+
  

Re: [Mesa-dev] [PATCH] i965: Make the field computed_depth_mode an enum.

[Kenneth Graunke]

On Tuesday, May 2, 2017 11:02:58 AM PDT Rafael Antognolli wrote:
> Since the enum is in the same header now, we can use it as the type of
> the field.
> 
> Signed-off-by: Rafael Antognolli 
> ---
> 
> PS: We can merge this with the previous patch too if that's better.
> 
>  src/intel/compiler/brw_compiler.h | 2 +-
>  src/intel/compiler/brw_fs.cpp | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/src/intel/compiler/brw_compiler.h 
> b/src/intel/compiler/brw_compiler.h
> index b5b1ee9..92fd4a2 100644
> --- a/src/intel/compiler/brw_compiler.h
> +++ b/src/intel/compiler/brw_compiler.h
> @@ -504,7 +504,7 @@ struct brw_wm_prog_data {
>/** @} */
> } binding_table;
>  
> -   uint8_t computed_depth_mode;
> +   enum brw_pixel_shader_computed_depth_mode computed_depth_mode;
> bool computed_stencil;

I think this may expand it from an 8-bit value to a 32-bit value.
It might have been anyway.  Does the size of the struct stay the same?

> bool early_fragment_tests;
> diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
> index 4dcdc1b..a0c62a2 100644
> --- a/src/intel/compiler/brw_fs.cpp
> +++ b/src/intel/compiler/brw_fs.cpp
> @@ -6281,7 +6281,7 @@ brw_compute_flat_inputs(struct brw_wm_prog_data 
> *prog_data,
> }
>  }
>  
> -static uint8_t
> +static enum brw_pixel_shader_computed_depth_mode
>  computed_depth_mode(const nir_shader *shader)
>  {
> if (shader->info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
> 



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[Mesa-dev] [PATCH] genxml: Fix 3DSTATE_DEPTH_BUFFER length on gen5.

[Rafael Antognolli]

The hardware docs are wrong, but the length used in the xml is also
wrong.

Signed-off-by: Rafael Antognolli 
---
 src/intel/genxml/gen5.xml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intel/genxml/gen5.xml b/src/intel/genxml/gen5.xml
index 0b84650..447499c 100644
--- a/src/intel/genxml/gen5.xml
+++ b/src/intel/genxml/gen5.xml
@@ -649,14 +649,14 @@
 
   
 
-  
-
+  
+
 
 
 
 
 
-
+
 
 
   
-- 
2.9.3

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[Mesa-dev] [PATCH] radv: don't advertise transfer props unless we can do anything else

[Dave Airlie]

From: Dave Airlie 

There is no reason to advertise transfer ability for formats we can't
use for anything else. This stops some CTS tests hitting internal
error for 64-bit types when they see the transfer flags.

Signed-off-by: Dave Airlie 
---
 src/amd/vulkan/radv_formats.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c
index 07942e4..61cc673 100644
--- a/src/amd/vulkan/radv_formats.c
+++ b/src/amd/vulkan/radv_formats.c
@@ -597,13 +597,13 @@ radv_physical_device_get_format_properties(struct 
radv_physical_device *physical
tiled |= 
VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT;
}
}
-   if (util_is_power_of_two(vk_format_get_blocksize(format)) && 
!scaled) {
+   if (tiled && 
util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
tiled |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
 VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
}
}
 
-   if (util_is_power_of_two(vk_format_get_blocksize(format)) && !scaled) {
+   if (linear && util_is_power_of_two(vk_format_get_blocksize(format)) && 
!scaled) {
linear |= VK_FORMAT_FEATURE_TRANSFER_SRC_BIT_KHR |
  VK_FORMAT_FEATURE_TRANSFER_DST_BIT_KHR;
}
-- 
2.9.3

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Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix the DCE pass in presence of loops

[Ilia Mirkin]

I looked into removing these passes a while back. A little detail here
is that DCE has to get run at least a little bit for correctness
reasons -- some (lazy) glsl -> tgsi code uses the dead_mask with the
assumption that DCE is run later.

Another observation was that while, indeed, those passes take a while,
they also remove a bunch of code. Not running those passes makes them
disappear from the profile, but then the logic down the line has more
work to do. It's not as obvious of a win as one might think.

Additionally, at least for nouveau, this logic does better than
nouveau's codegen in some cases. (Largely due to the fact that system
values get copy-propagated here but they don't by codegen, generally,
which can lead to large register live intervals. At least that's what
I recall from my analysis a while ago.)

This was my hack-branch: https://github.com/imirkin/mesa/commits/st-pass-cleanup

On Wed, May 3, 2017 at 8:36 PM, Timothy Arceri  wrote:
> This and the tgsi copy_propagation pass are very slow, I'd really like it if
> we both didn't require the pass for things to work and also didn't make it
> any slower. perf is showing these 2 passes at ~11% during Deus Ex start-up
> (cold cache).
>
> Can we not just add a DCE call to the glsl linker/compiler calls e.g.
>
>if (ctx->Const.GLSLOptimizeConservatively) {
>   /* Run it just once. */
>   do_common_optimization(ir, true, false,
> >Const.ShaderCompilerOptions[stage],
> ctx->Const.NativeIntegers);
>
>  ---> call DCE here to clean up since we don't call the opt passes again
> <---
>
>} else {
>   /* Repeat it until it stops making changes. */
>   while (do_common_optimization(ir, true, false,
>
> >Const.ShaderCompilerOptions[stage],
> ctx->Const.NativeIntegers))
>  ;
>
>}
>
> On 03/05/17 00:43, Samuel Pitoiset wrote:
>>
>> The TGSI DCE pass doesn't eliminate dead assignments like
>> MOV TEMP[0], TEMP[1] in presence of loops because it assumes
>> that the visitor doesn't emit dead code. This assumption is
>> actually wrong and this situation happens.
>>
>> However, it appears that the merge_registers() pass accidentally
>> takes care of this for some weird reasons. But since this pass has
>> been disabled for RadeonSI and Nouveau, the renumber_registers()
>> pass which is called *after*, can't do its job correctly.
>>
>> This is because it assumes that no dead code is present. But if
>> there is still a dead assignment, it might re-use the TEMP
>> register id incorrectly and emits wrong code.
>>
>> This patches eliminates all dead assignments by tracking
>> all temporary register reads like what the renumber_registers()
>> actually does. The best solution would be to rewrite that DCE
>> pass entirely but it's more work.
>>
>> This should fix Unigine Heaven on RadeonSI and Nouveau.
>>
>> shader-db results with RadeonSI:
>>
>> 47109 shaders in 29632 tests
>> Totals:
>> SGPRS: 1919548 -> 1919572 (0.00 %)
>> VGPRS: 1139205 -> 1139209 (0.00 %)
>> Spilled SGPRs: 1865 -> 1867 (0.11 %)
>> Spilled VGPRs: 65 -> 65 (0.00 %)
>> Private memory VGPRs: 1184 -> 1184 (0.00 %)
>> Scratch size: 1308 -> 1308 (0.00 %) dwords per thread
>> Code Size: 60083036 -> 60083244 (0.00 %) bytes
>> LDS: 1077 -> 1077 (0.00 %) blocks
>> Max Waves: 431200 -> 431200 (0.00 %)
>> Wait states: 0 -> 0 (0.00 %)
>>
>> It's still interesting to disable the merge_registers() pass.
>>
>> Signed-off-by: Samuel Pitoiset 
>> ---
>>   src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 36
>> +-
>>   1 file changed, 31 insertions(+), 5 deletions(-)
>>
>> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
>> b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
>> index 0f8688a41c..01b5a4dc98 100644
>> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
>> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
>> @@ -5085,9 +5085,13 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)
>>
>> glsl_to_tgsi_instruction *,
>>this->next_temp *
>> 4);
>>  int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
>> +   int *first_reads = rzalloc_array(mem_ctx, int, this->next_temp);
>>  int level = 0;
>>  int removed = 0;
>>   +   for (int i = 0; i < this->next_temp; i++)
>> +  first_reads[i] = -1;
>> +
>>  foreach_in_list(glsl_to_tgsi_instruction, inst, >instructions)
>> {
>> assert(inst->dst[0].file != PROGRAM_TEMPORARY
>>|| inst->dst[0].index < this->next_temp);
>> @@ -5148,8 +5152,12 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)
>>  src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
>>for (int c = 0; c < 4; c++) {
>> -  if (src_chans & (1 << c))
>> +  if (src_chans & (1 << c)) {
>>writes[4 * 

Re: [Mesa-dev] [PATCH] st/glsl_to_tgsi: fix the DCE pass in presence of loops

[Timothy Arceri]

This and the tgsi copy_propagation pass are very slow, I'd really like 
it if we both didn't require the pass for things to work and also didn't 
make it any slower. perf is showing these 2 passes at ~11% during Deus 
Ex start-up (cold cache).


Can we not just add a DCE call to the glsl linker/compiler calls e.g.

   if (ctx->Const.GLSLOptimizeConservatively) {
  /* Run it just once. */
  do_common_optimization(ir, true, false,
>Const.ShaderCompilerOptions[stage],
ctx->Const.NativeIntegers);

 ---> call DCE here to clean up since we don't call the opt passes 
again <---


   } else {
  /* Repeat it until it stops making changes. */
  while (do_common_optimization(ir, true, false,

>Const.ShaderCompilerOptions[stage],
ctx->Const.NativeIntegers))
 ;
   }

On 03/05/17 00:43, Samuel Pitoiset wrote:

The TGSI DCE pass doesn't eliminate dead assignments like
MOV TEMP[0], TEMP[1] in presence of loops because it assumes
that the visitor doesn't emit dead code. This assumption is
actually wrong and this situation happens.

However, it appears that the merge_registers() pass accidentally
takes care of this for some weird reasons. But since this pass has
been disabled for RadeonSI and Nouveau, the renumber_registers()
pass which is called *after*, can't do its job correctly.

This is because it assumes that no dead code is present. But if
there is still a dead assignment, it might re-use the TEMP
register id incorrectly and emits wrong code.

This patches eliminates all dead assignments by tracking
all temporary register reads like what the renumber_registers()
actually does. The best solution would be to rewrite that DCE
pass entirely but it's more work.

This should fix Unigine Heaven on RadeonSI and Nouveau.

shader-db results with RadeonSI:

47109 shaders in 29632 tests
Totals:
SGPRS: 1919548 -> 1919572 (0.00 %)
VGPRS: 1139205 -> 1139209 (0.00 %)
Spilled SGPRs: 1865 -> 1867 (0.11 %)
Spilled VGPRs: 65 -> 65 (0.00 %)
Private memory VGPRs: 1184 -> 1184 (0.00 %)
Scratch size: 1308 -> 1308 (0.00 %) dwords per thread
Code Size: 60083036 -> 60083244 (0.00 %) bytes
LDS: 1077 -> 1077 (0.00 %) blocks
Max Waves: 431200 -> 431200 (0.00 %)
Wait states: 0 -> 0 (0.00 %)

It's still interesting to disable the merge_registers() pass.

Signed-off-by: Samuel Pitoiset 
---
  src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 36 +-
  1 file changed, 31 insertions(+), 5 deletions(-)

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp 
b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 0f8688a41c..01b5a4dc98 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5085,9 +5085,13 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)
   glsl_to_tgsi_instruction 
*,
   this->next_temp * 4);
 int *write_level = rzalloc_array(mem_ctx, int, this->next_temp * 4);
+   int *first_reads = rzalloc_array(mem_ctx, int, this->next_temp);
 int level = 0;
 int removed = 0;
  
+   for (int i = 0; i < this->next_temp; i++)

+  first_reads[i] = -1;
+
 foreach_in_list(glsl_to_tgsi_instruction, inst, >instructions) {
assert(inst->dst[0].file != PROGRAM_TEMPORARY
   || inst->dst[0].index < this->next_temp);
@@ -5148,8 +5152,12 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)
 src_chans |= 1 << GET_SWZ(inst->src[i].swizzle, 3);
  
 for (int c = 0; c < 4; c++) {

-  if (src_chans & (1 << c))
+  if (src_chans & (1 << c)) {
   writes[4 * inst->src[i].index + c] = NULL;
+
+ if (first_reads[inst->src[i].index] == -1)
+first_reads[inst->src[i].index] = level;
+  }
 }
  }
   }
@@ -5167,8 +5175,12 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)
 src_chans |= 1 << GET_SWZ(inst->tex_offsets[i].swizzle, 3);
  
 for (int c = 0; c < 4; c++) {

-  if (src_chans & (1 << c))
+  if (src_chans & (1 << c)) {
   writes[4 * inst->tex_offsets[i].index + c] = NULL;
+
+ if (first_reads[inst->tex_offsets[i].index] == -1)
+first_reads[inst->tex_offsets[i].index] = level;
+  }
 }
  }
   }
@@ -5211,17 +5223,30 @@ glsl_to_tgsi_visitor::eliminate_dead_code(void)
  * the writemask of other instructions with dead channels.
  */
 foreach_in_list_safe(glsl_to_tgsi_instruction, inst, >instructions) {
-  if (!inst->dead_mask || !inst->dst[0].writemask)
+  bool dead_inst = false;
+
+  if (!inst->dst[0].writemask)
   continue;
+
   

Re: [Mesa-dev] [PATCH v03 14/38] i965: Move MOCS macros to brw_context.h.

[Rafael Antognolli]

On Wed, May 03, 2017 at 08:28:24PM +0300, Pohjolainen, Topi wrote:
> On Mon, May 01, 2017 at 06:43:02PM -0700, Rafael Antognolli wrote:
> > These macros are defined in brw_defines.h, which contains a lot of
> > macros that conflict with autogenerated code from genxml. But we need to
> > use them (the MOCS macros) in some of that same genxml code.
> > 
> > Moving them to brw_context.h solves that problem and we don't have to
> > include brw_defines.h.
> 
> I've been hoping to remove things from brw_context.h - it starts to
> resemble a dump yard for all sort of things. I think in this case we
> could put these into brw_state.h instead? Or did you already try that?

I just tried this and it works fine too. I'm OK with either place to put
these macros.

> > 
> > Signed-off-by: Rafael Antognolli 
> > ---
> >  src/mesa/drivers/dri/i965/brw_context.h | 41 +-
> >  src/mesa/drivers/dri/i965/brw_defines.h | 42 +--
> >  2 files changed, 41 insertions(+), 42 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> > b/src/mesa/drivers/dri/i965/brw_context.h
> > index c7d6e49..5e627ae 100644
> > --- a/src/mesa/drivers/dri/i965/brw_context.h
> > +++ b/src/mesa/drivers/dri/i965/brw_context.h
> > @@ -397,6 +397,47 @@ struct brw_cache {
> > bool bo_used_by_gpu;
> >  };
> >  
> > +/* Memory Object Control State:
> > + * Specifying zero for L3 means "uncached in L3", at least on Haswell
> > + * and Baytrail, since there are no PTE flags for setting L3 cacheability.
> > + * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
> > + * may still respect that.
> > + */
> > +#define GEN7_MOCS_L31
> > +
> > +/* Ivybridge only: cache in LLC.
> > + * Specifying zero here means to use the PTE values set by the kernel;
> > + * non-zero overrides the PTE values.
> > + */
> > +#define IVB_MOCS_LLC(1 << 1)
> > +
> > +/* Baytrail only: snoop in CPU cache */
> > +#define BYT_MOCS_SNOOP  (1 << 1)
> > +
> > +/* Haswell only: LLC/eLLC controls (write-back or uncached).
> > + * Specifying zero here means to use the PTE values set by the kernel,
> > + * which is useful since it offers additional control (write-through
> > + * cacheing and age).  Non-zero overrides the PTE values.
> > + */
> > +#define HSW_MOCS_UC_LLC_UC_ELLC (1 << 1)
> > +#define HSW_MOCS_WB_LLC_WB_ELLC (2 << 1)
> > +#define HSW_MOCS_UC_LLC_WB_ELLC (3 << 1)
> > +
> > +/* Broadwell: these defines always use all available caches (L3, LLC, 
> > eLLC),
> > + * and let you force write-back (WB) or write-through (WT) caching, or 
> > leave
> > + * it up to the page table entry (PTE) specified by the kernel.
> > + */
> > +#define BDW_MOCS_WB  0x78
> > +#define BDW_MOCS_WT  0x58
> > +#define BDW_MOCS_PTE 0x18
> > +
> > +/* Skylake: MOCS is now an index into an array of 62 different caching
> > + * configurations programmed by the kernel.
> > + */
> > +/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
> > +#define SKL_MOCS_WB  (2 << 1)
> > +/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
> > +#define SKL_MOCS_PTE (1 << 1)
> >  
> >  /* Considered adding a member to this struct to document which flags
> >   * an update might raise so that ordering of the state atoms can be
> > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
> > b/src/mesa/drivers/dri/i965/brw_defines.h
> > index 08106c0..130a1ed 100644
> > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > @@ -1365,48 +1365,6 @@ enum brw_pixel_shader_coverage_mask_mode {
> >   */
> >  #define BRW_MAX_NUM_BUFFER_ENTRIES (1 << 27)
> >  
> > -/* Memory Object Control State:
> > - * Specifying zero for L3 means "uncached in L3", at least on Haswell
> > - * and Baytrail, since there are no PTE flags for setting L3 cacheability.
> > - * On Ivybridge, the PTEs do have a cache-in-L3 bit, so setting MOCS to 0
> > - * may still respect that.
> > - */
> > -#define GEN7_MOCS_L31
> > -
> > -/* Ivybridge only: cache in LLC.
> > - * Specifying zero here means to use the PTE values set by the kernel;
> > - * non-zero overrides the PTE values.
> > - */
> > -#define IVB_MOCS_LLC(1 << 1)
> > -
> > -/* Baytrail only: snoop in CPU cache */
> > -#define BYT_MOCS_SNOOP  (1 << 1)
> > -
> > -/* Haswell only: LLC/eLLC controls (write-back or uncached).
> > - * Specifying zero here means to use the PTE values set by the kernel,
> > - * which is useful since it offers additional control (write-through
> > - * cacheing and age).  Non-zero overrides the PTE values.
> > - */
> > -#define HSW_MOCS_UC_LLC_UC_ELLC (1 << 1)
> > -#define HSW_MOCS_WB_LLC_WB_ELLC (2 << 1)
> > -#define HSW_MOCS_UC_LLC_WB_ELLC (3 << 1)
> > -
> > -/* Broadwell: these defines always use all available caches (L3, LLC, 
> > eLLC),
> > - * and let you force write-back (WB) or 

Re: [Mesa-dev] [PATCH v03 17/38] genxml: Add rules to build gen4, gen45 and ge5.

[Rafael Antognolli]

On Wed, May 03, 2017 at 09:10:10PM +0300, Pohjolainen, Topi wrote:
> 
> In the subject: s/ge5/gen5/
> 
> But don't we need to squash this into the previous patch? Alone that patch
> won't even link, right?

Yes, you are right, it should be squashed.

> On Mon, May 01, 2017 at 06:43:05PM -0700, Rafael Antognolli wrote:
> > Signed-off-by: Rafael Antognolli 
> > ---
> >  src/mesa/drivers/dri/i965/Makefile.am  | 12 
> >  src/mesa/drivers/dri/i965/Makefile.sources |  9 +
> >  src/mesa/drivers/dri/i965/brw_state.h  |  1 +
> >  3 files changed, 22 insertions(+)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/Makefile.am 
> > b/src/mesa/drivers/dri/i965/Makefile.am
> > index 4e9b062..762aefc 100644
> > --- a/src/mesa/drivers/dri/i965/Makefile.am
> > +++ b/src/mesa/drivers/dri/i965/Makefile.am
> > @@ -46,12 +46,24 @@ AM_CFLAGS = \
> >  AM_CXXFLAGS = $(AM_CFLAGS)
> >  
> >  I965_PERGEN_LIBS = \
> > +   libi965_gen4.la \
> > +   libi965_gen45.la \
> > +   libi965_gen5.la \
> > libi965_gen6.la \
> > libi965_gen7.la \
> > libi965_gen75.la \
> > libi965_gen8.la \
> > libi965_gen9.la
> >  
> > +libi965_gen4_la_SOURCES = $(i965_gen4_FILES)
> > +libi965_gen4_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=40
> > +
> > +libi965_gen45_la_SOURCES = $(i965_gen45_FILES)
> > +libi965_gen45_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=45
> > +
> > +libi965_gen5_la_SOURCES = $(i965_gen5_FILES)
> > +libi965_gen5_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=50
> > +
> >  libi965_gen6_la_SOURCES = $(i965_gen6_FILES)
> >  libi965_gen6_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=60
> >  
> > diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> > b/src/mesa/drivers/dri/i965/Makefile.sources
> > index db55a3f..41f4d83 100644
> > --- a/src/mesa/drivers/dri/i965/Makefile.sources
> > +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> > @@ -160,6 +160,15 @@ i965_FILES = \
> > intel_upload.c \
> > libdrm_macros.h
> >  
> > +i965_gen4_FILES = \
> > +   genX_state_upload.c
> > +
> > +i965_gen45_FILES = \
> > +   genX_state_upload.c
> > +
> > +i965_gen5_FILES = \
> > +   genX_state_upload.c
> > +
> >  i965_gen6_FILES = \
> > genX_blorp_exec.c \
> > genX_state_upload.c
> > diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
> > b/src/mesa/drivers/dri/i965/brw_state.h
> > index 008326a..6403570 100644
> > --- a/src/mesa/drivers/dri/i965/brw_state.h
> > +++ b/src/mesa/drivers/dri/i965/brw_state.h
> > @@ -446,6 +446,7 @@ void brw_copy_pipeline_atoms(struct brw_context *brw,
> >   const struct brw_tracked_state **atoms,
> >   int num_atoms);
> >  void gen4_init_atoms(struct brw_context *brw);
> > +void gen45_init_atoms(struct brw_context *brw);
> >  void gen5_init_atoms(struct brw_context *brw);
> >  void gen6_init_atoms(struct brw_context *brw);
> >  void gen7_init_atoms(struct brw_context *brw);
> > -- 
> > git-series 0.9.1
> > ___
> > mesa-dev mailing list
> > mesa-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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Re: [Mesa-dev] i965: Use isl for hiz and stencil

[Rafael Antognolli]

On Wed, May 03, 2017 at 12:22:13PM +0300, Topi Pohjolainen wrote:
> Patches 1-17 are revision that
> 
>   - rework hiz on gen6 to use on-demand offset calculator allowing
> one to drop dependency to miptree structure and 
>   - rework all auxiliary surfaces to be created against isl directly.
> 
> Patches 18 and 19 introduce new surface layout in ISL. This is called
> back-to-back and similar to layout ALL_SLICES_AT_EACH_LOD found in
> i965 for gen6 hiz and stencil. This layout stacks slices for each level
> after one and other, or back to back. All slices ate each lod is almost
> the same except that it places levels one and two side-by-side trying
> to preserve space. Back-to-back wastes a little more memory but aligns
> each level on page boundary simplifying driver logic.
> 
> Patch 20 switches gen6 hiz to use back-to-back.
> 
> Patches 22-37 prepare i965 driver to work with miptrees based on isl.
> Patches 38 and 39 start to use isl for stencil surfaces and effectively
> switches to back-to-back stencil layout on gen6.
> Patch 25 is mostly unneeded but it doesn't hurt and it provides me the
> tiling converter I need in patch 36.
> 
> There are two uglies, patches 21 and 37. Perhaps Nanley, Jason or Chad
> can help me with 21...
> 
> Jason: You have reviewed most of 1-17, and I don't think they have
>changed that much.
> 
> Rafael: I have conflicting patches with your series addressing depth
> and stencil state emission. We should try to land your patches
> first and then I'll rebase this on top.

Hey Topi, thanks for letting me know. Yeah, I saw the conflicts you
mention, and there are also conflicts with depth buffer state, which I'm
also converting to genxml. But from what I looked, it doesn't seem like
it's going to be too hard to rebase/solve the conflicts.

> If we agree on the approach here, I'll continue with gen4/5 depth
> surface alignment workaround aiming to base depth surfaces also on
> isl. That should allow me to start using isl state emitter for
> depth-hiz-stencil.
> 
> CC: Jason Ekstrand 
> CC: Nanley Chery 
> CC: Chad Versace 
> CC: Rafael Antognolli 
> 
> Topi Pohjolainen (39):
>   i965/dbg: Add means for forcing stencil sampling using y-tiled copy
>   i965/gen6: Remove dead code in hiz surface setup
>   i965/blorp/gen6: Drop unnecessary stencil/hiz surf dimension adjust
>   i965/gen6: Calculate stencil offset on demand
>   i965/gen6: Calculate hiz offset on demand
>   i965/blorp/gen6: Use on-demand stencil/hiz offset resolvers
>   i965/gen6: Drop miptrees in depth/stencil offset resolvers
>   i965/blorp/gen6: Set aux pitch directly
>   i965/gen6/hiz: Add direct buffer size resolver
>   i965/gen6: Allocate hiz directly without miptree
>   i965/miptree: Refactor aux surface allocation
>   i965/miptree: Refactor ISL aux usage resolver
>   i965/miptree: Use ISL for MCS layouts
>   i965/miptree: Drop MIPTREE_LAYOUT_ACCELERATED_UPLOAD in mcs init
>   i965/miptree/gen7+: Use ISL for HIZ layouts
>   i965/blorp: Use hiz surface instead of creating copy
>   i965: Use stored hiz surface instead of creating copy
>   intel/isl/gen6: Add offsetting support for back-to-back layouts
>   intel/isl/gen6: Add size calculator for back-to-back layouts
>   i965/hiz/gen6: Use isl back-to-back layout
>   intel/isl/gen6/hack: Use hiz vertical alignment of 16 instead of 8
>   i965/miptree: Add support for resolving offsets using isl
>   i965/blorp: Add support for isl based miptrees
>   i965: Prepare up/downsampling for isl based miptrees
>   i965: Prepare blit engine for isl based miptrees
>   i965: Prepare image validation for isl based miptrees
>   i965: Refactor miptree to isl converter and adjustment
>   i965: Prepare tex, img and rt state emission for isl based miptrees
>   i965: Prepare slice validator for isl based miptrees
>   i965: Prepare framebuffer validator for isl based miptrees
>   i965/tex: Prepare image update for isl based miptrees
>   i965: Prepare texture validator for isl based miptrees
>   i965: Prepare slice copy for isl based miptrees
>   i965/gen7: Prepare depth state emission for isl based miptrees
>   i965/gen8+: Prepare depth state emission for isl based miptrees
>   i965: Add isl based miptree creator
>   intel/isl/gen7/hack: Use stencil vertical alignment of 8 instead of 4
>   i965/miptree: Represent w-tiled stencil surfaces with isl
>   i965/miptree: Represent y-tiled stencil copies with isl
> 
>  src/intel/blorp/blorp.c  |   4 +-
>  src/intel/blorp/blorp_blit.c |  11 +-
>  src/intel/common/gen_debug.c |   1 +
>  src/intel/common/gen_debug.h |   1 +
>  src/intel/isl/isl.c  |  55 +-
>  src/intel/isl/isl.h  |  20 +-
>  src/intel/isl/isl_gen6.c | 109 +++
>  src/intel/isl/isl_gen7.c

Re: [Mesa-dev] [PATCH v3 2/2] i965/vec4: load dvec3/4 uniforms first in the push constant buffer

[Francisco Jerez]

Samuel Iglesias Gonsálvez  writes:

> Reorder the uniforms to load first the dvec4-aligned variables
> in the push constant buffer and then push the vec4-aligned ones.
>
> This fixes a bug were the dvec3/4 might be loaded one part on a GRF and
> the rest in next GRF, so the region parameters to read that could break
> the HW rules.
>
> v2:
> - Fix broken logic.
> - Add a comment to explain what should be needed to optimise the usage
> of the push constant buffer slots, as this patch does not pack the
> uniforms.
>
> Signed-off-by: Samuel Iglesias Gonsálvez 
> Cc: "17.1" 
> ---
>  src/intel/compiler/brw_vec4.cpp | 97 
> +++--
>  1 file changed, 74 insertions(+), 23 deletions(-)
>
> diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
> index 0909ddb586..18bfd48fa1 100644
> --- a/src/intel/compiler/brw_vec4.cpp
> +++ b/src/intel/compiler/brw_vec4.cpp
> @@ -583,16 +583,44 @@ vec4_visitor::split_uniform_registers()
> }
>  }
>  
> +/* This function returns the register number where we placed the uniform */
> +static int
> +set_push_constant_loc(const int nr_uniforms, int *new_uniform_count,
> +  const int src, const int size,
> +  int *new_loc, int *new_chan,
> +  int *new_chans_used)
> +{
> +   int dst;
> +   /* Find the lowest place we can slot this uniform in. */
> +   for (dst = 0; dst < nr_uniforms; dst++) {
> +  if (new_chans_used[dst] + size <= 4)
> + break;
> +   }
> +
> +   assert(dst < nr_uniforms);
> +
> +   new_loc[src] = dst;
> +   new_chan[src] = new_chans_used[dst];
> +   new_chans_used[dst] += size;
> +
> +   *new_uniform_count = MAX2(*new_uniform_count, dst + 1);
> +   return dst;
> +}
> +
>  void
>  vec4_visitor::pack_uniform_registers()
>  {
> uint8_t chans_used[this->uniforms];
> int new_loc[this->uniforms];
> int new_chan[this->uniforms];
> +   bool is_aligned_to_dvec4[this->uniforms];
> +   int new_chans_used[this->uniforms];
>  
> memset(chans_used, 0, sizeof(chans_used));
> memset(new_loc, 0, sizeof(new_loc));
> memset(new_chan, 0, sizeof(new_chan));
> +   memset(new_chans_used, 0, sizeof(new_chans_used));
> +   memset(is_aligned_to_dvec4, 0, sizeof(is_aligned_to_dvec4));
>  
> /* Find which uniform vectors are actually used by the program.  We
>  * expect unused vector elements when we've moved array access out
> @@ -631,10 +659,19 @@ vec4_visitor::pack_uniform_registers()
>  
>  unsigned channel = BRW_GET_SWZ(inst->src[i].swizzle, c) + 1;
>  unsigned used = MAX2(chans_used[reg], channel * channel_size);
> -if (used <= 4)
> -   chans_used[reg] = used;
> -else
> -   chans_used[reg + 1] = used - 4;
> +/* FIXME: Marked all channels as used, so each uniform will
> + * fully use one or two vec4s. If we want to pack them, we need
> + * to, among other changes, set chans_used[reg] = used;
> + * chans_used[reg+1] = used - 4; and fix the swizzle at the
> + * end in order to set the proper location.
> + */
> +if (used <= 4) {
> +   chans_used[reg] = 4;

Uhm...  So this change prevents the uniform packing pass from actually
packing anything?  Might affect more applications negatively than broken
FP64 would.  Are you planning to send a v3 that fixes the issue without
disabling the optimization?  May be worth holding this off until then.
Even if that means it will miss the v17.1 release it will probably make
it for the next bug-fix release.

> +} else {
> +   is_aligned_to_dvec4[reg] = true;
> +   is_aligned_to_dvec4[reg + 1] = true;
> +   chans_used[reg + 1] = 4;
> +}
>   }
>}
>  
> @@ -659,42 +696,56 @@ vec4_visitor::pack_uniform_registers()
>  
> int new_uniform_count = 0;
>  
> +   /* As the uniforms are going to be reordered, take the data from a 
> temporary
> +* copy of the original param[].
> +*/
> +   gl_constant_value **param = ralloc_array(NULL, gl_constant_value*,
> +stage_prog_data->nr_params);
> +   memcpy(param, stage_prog_data->param,
> +  sizeof(gl_constant_value*) * stage_prog_data->nr_params);
> +
> /* Now, figure out a packing of the live uniform vectors into our
> -* push constants.
> +* push constants. Start with dvec{3,4} because they are aligned to
> +* dvec4 size (2 vec4).
>  */
> for (int src = 0; src < uniforms; src++) {
>int size = chans_used[src];
>  
> -  if (size == 0)
> +  if (size == 0 || !is_aligned_to_dvec4[src])
>   continue;
>  
> -  int dst;
> -  /* Find the lowest place we can slot this uniform in. */
> -  for (dst = 0; dst < src; dst++) {
> - if 

Re: [Mesa-dev] [PATCH 3/5 v2] glsl: Restrict func redeclarations (not just redefinitions) on GLSL 1.00.

[Matt Turner]

Thanks. This patch has no regressions.
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[Mesa-dev] [PATCH 1/3] egl: Emit error when EGLSurface is lost

[Chad Versace]

From: Chad Versace 

Add a new bool, _EGLSurface::Lost, and check it in eglMakeCurrent and
eglSwapBuffers. The EGL 1.5 spec says that those functions emit errors
when the native surface is no longer valid.

This patch just updates core EGL. No driver sets _EGLSurface::Lost yet.

I discovered that Mesa failed to detect lost surfaces while debugging an
Android CTS camera test,
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface.
This patch doesn't fix the test though, though, because the test expects
EGL_BAD_SURFACE when the surface becomes lost, and this patch actually
complies with the EGL spec. If I interpreted the EGL spec correctly,
EGL_BAD_NATIVE_WINDOW or EGL_BAD_CURRENT_SURFACE is the correct error.

Cc: Tomasz Figa 
Cc: Nicolas Boichat 
Cc: Tapani Pälli 
---
 src/egl/main/eglapi.c | 36 
 src/egl/main/eglsurface.c |  1 +
 src/egl/main/eglsurface.h |  5 +
 3 files changed, 42 insertions(+)

diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index fc243a58e8..a459b9ffcd 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -828,6 +828,33 @@ eglMakeCurrent(EGLDisplay dpy, EGLSurface draw, EGLSurface 
read,
  RETURN_EGL_ERROR(disp, EGL_BAD_MATCH, EGL_FALSE);
}
 
+   _EGLThreadInfo *t =_eglGetCurrentThread();
+   _EGLContext *old_ctx = t->CurrentContext;
+   _EGLSurface *old_draw_surf = old_ctx ? old_ctx->DrawSurface : NULL;
+   _EGLSurface *old_read_surf = old_ctx ? old_ctx->ReadSurface : NULL;
+
+   /* From the EGL 1.5 spec, Section 3.7.3 Binding Context and Drawables:
+*
+*If the previous context of the calling thread has unflushed commands,
+*and the previous surface is no longer valid, an
+*EGL_BAD_CURRENT_SURFACE error is generated.
+*
+* It's difficult to check if the context has unflushed commands, but it's
+* easy to check if the surface is no longer valid.
+*/
+   if (old_draw_surf && old_draw_surf->Lost)
+  RETURN_EGL_ERROR(disp, EGL_BAD_CURRENT_SURFACE, EGL_FALSE);
+   if (old_read_surf && old_read_surf->Lost)
+  RETURN_EGL_ERROR(disp, EGL_BAD_CURRENT_SURFACE, EGL_FALSE);
+
+   /*If a native window underlying either draw or read is no longer valid,
+*an EGL_BAD_NATIVE_WINDOW error is generated.
+*/
+   if (draw_surf && draw_surf->Lost)
+  RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
+   if (read_surf && read_surf->Lost)
+  RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
+
ret = drv->API.MakeCurrent(drv, disp, draw_surf, read_surf, context);
 
RETURN_EGL_EVAL(disp, ret);
@@ -1215,6 +1242,15 @@ eglSwapBuffers(EGLDisplay dpy, EGLSurface surface)
   RETURN_EGL_ERROR(disp, EGL_BAD_SURFACE, EGL_FALSE);
#endif
 
+   /* From the EGL 1.5 spec:
+*
+*If eglSwapBuffers is called and the native window associated with
+*surface is no longer valid, an EGL_BAD_NATIVE_WINDOW error is
+*generated.
+*/
+   if (surf->Lost)
+  RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_FALSE);
+
ret = drv->API.SwapBuffers(drv, disp, surf);
 
RETURN_EGL_EVAL(disp, ret);
diff --git a/src/egl/main/eglsurface.c b/src/egl/main/eglsurface.c
index 04f42caf79..e935c83271 100644
--- a/src/egl/main/eglsurface.c
+++ b/src/egl/main/eglsurface.c
@@ -295,6 +295,7 @@ _eglInitSurface(_EGLSurface *surf, _EGLDisplay *dpy, EGLint 
type,
_eglInitResource(>Resource, sizeof(*surf), dpy);
surf->Type = type;
surf->Config = conf;
+   surf->Lost = EGL_FALSE;
 
surf->Width = 0;
surf->Height = 0;
diff --git a/src/egl/main/eglsurface.h b/src/egl/main/eglsurface.h
index fc799ee43d..f13cf49741 100644
--- a/src/egl/main/eglsurface.h
+++ b/src/egl/main/eglsurface.h
@@ -56,6 +56,11 @@ struct _egl_surface
 
EGLint Type; /* one of EGL_WINDOW_BIT, EGL_PIXMAP_BIT or EGL_PBUFFER_BIT */
 
+   /* The native surface is lost. The EGL spec requires certain functions
+* to generate EGL_BAD_NATIVE_WINDOW when given this surface.
+*/
+   EGLBoolean Lost;
+
/* attributes set by attribute list */
EGLint Width, Height;
EGLenum TextureFormat;
-- 
2.12.0

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[Mesa-dev] [PATCH 3/3] egl/android: Mark surface as lost when dequeueBuffer fails

[Chad Versace]

From: Chad Versace 

This ensures that future calls to eglSwapBuffers and eglMakeCurrent emit
an error.

This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.

Cc: Tomasz Figa 
Cc: Nicolas Boichat 
Cc: Tapani Pälli 
---
 src/egl/drivers/dri2/platform_android.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index f45fcdf4ff..2450d9de47 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -431,12 +431,16 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *surf)
 static int
 update_buffers(struct dri2_egl_surface *dri2_surf)
 {
+   if (dri2_surf->base.Lost)
+  return -1;
+
if (dri2_surf->base.Type != EGL_WINDOW_BIT)
   return 0;
 
/* try to dequeue the next back buffer */
if (!dri2_surf->buffer && !droid_window_dequeue_buffer(dri2_surf)) {
   _eglLog(_EGL_WARNING, "Could not dequeue buffer from native window");
+  dri2_surf->base.Lost = true;
   return -1;
}
 
@@ -628,6 +632,12 @@ droid_swap_buffers(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *draw)
 
dri2_flush_drawable_for_swapbuffers(disp, draw);
 
+   /* dri2_surf->buffer can be null even when no error has occured. For
+* example, if the user has called no GL rendering commands since the
+* previous eglSwapBuffers, then the driver may have not triggered
+* a callback to ANativeWindow::dequeueBuffer, in which case
+* dri2_surf->buffer remains null.
+*/
if (dri2_surf->buffer)
   droid_window_enqueue_buffer(disp, dri2_surf);
 
-- 
2.12.0

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[Mesa-dev] [PATCH 2/3] egl/android: Cancel any outstanding ANativeBuffer in surface destructor

[Chad Versace]

From: Chad Versace 

That is, call ANativeWindow::cancelBuffer in droid_destroy_surface().

This should prevent application deadlock when the app destroys the
EGLSurface after EGL has acquired a buffer from SurfaceFlinger
(ANativeWindow::dequeueBuffer) but before EGL has released it
(ANativeWindow::enqueueBuffer).

This patch is part of a series for fixing
android.hardware.camera2.cts.RobustnessTest#testAbandonRepeatingRequestSurface
on Chrome OS x86 devices.

Cc: Tomasz Figa 
Cc: Nicolas Boichat 
Cc: Tapani Pälli 
---
 src/egl/drivers/dri2/platform_android.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 35f2e5dbe6..f45fcdf4ff 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -264,10 +264,15 @@ droid_window_enqueue_buffer(_EGLDisplay *disp, struct 
dri2_egl_surface *dri2_sur
 }
 
 static void
-droid_window_cancel_buffer(_EGLDisplay *disp, struct dri2_egl_surface 
*dri2_surf)
+droid_window_cancel_buffer(struct dri2_egl_surface *dri2_surf)
 {
-   /* no cancel buffer? */
-   droid_window_enqueue_buffer(disp, dri2_surf);
+   int ret;
+
+   ret = dri2_surf->window->cancelBuffer(dri2_surf->window, dri2_surf->buffer, 
-1);
+   if (ret < 0) {
+  _eglLog(_EGL_WARNING, "ANativeWindow::cancelBuffer failed");
+  dri2_surf->base.Lost = true;
+   }
 }
 
 static __DRIbuffer *
@@ -399,7 +404,7 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *surf)
 
if (dri2_surf->base.Type == EGL_WINDOW_BIT) {
   if (dri2_surf->buffer)
- droid_window_cancel_buffer(disp, dri2_surf);
+ droid_window_cancel_buffer(dri2_surf);
 
   dri2_surf->window->common.decRef(_surf->window->common);
}
-- 
2.12.0

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Re: [Mesa-dev] [PATCH] i965: Drop "Destination Element Offset" from Ironlake SGVs.

[Rafael Antognolli]

Reviewed-by: Rafael Antognolli 

On Fri, Apr 28, 2017 at 05:04:05PM -0700, Kenneth Graunke wrote:
> The Ironlake documentation is terrible, so it's unclear whether or not
> this field exists there.  It definitely doesn't exist on Sandybridge
> and later.  It definitely does exist on G45.
> 
> We haven't been setting it for our normal vertex attributes - just
> the SGVs (VertexID, InstanceID, BaseVertex, BaseInstance, DrawID).
> We should be consistent.  My guess is that it isn't necessary and
> doesn't exist - this patch drops it from the SGVs elements, making
> them follow the behavior of most attributes.
> ---
>  src/mesa/drivers/dri/i965/brw_draw_upload.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c 
> b/src/mesa/drivers/dri/i965/brw_draw_upload.c
> index 7846293cb1b..002e863a649 100644
> --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
> @@ -1096,7 +1096,8 @@ brw_emit_vertices(struct brw_context *brw)
>   dw0 |= BRW_VE0_VALID |
>  brw->vb.nr_buffers << BRW_VE0_INDEX_SHIFT |
>  ISL_FORMAT_R32G32_UINT << BRW_VE0_FORMAT_SHIFT;
> -  dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
> + if (brw->gen == 4)
> +dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
>}
>  
>/* Note that for gl_VertexID, gl_InstanceID, and gl_PrimitiveID values,
> @@ -1124,7 +1125,8 @@ brw_emit_vertices(struct brw_context *brw)
>  ((brw->vb.nr_buffers + 1) << BRW_VE0_INDEX_SHIFT) |
>  (ISL_FORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT);
>  
> -  dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
> + if (brw->gen == 4)
> +dw1 |= (i * 4) << BRW_VE1_DST_OFFSET_SHIFT;
>}
>  
>OUT_BATCH(dw0);
> -- 
> 2.12.2
> 
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Re: [Mesa-dev] [PATCH 00/22] anv: Move CCS resolves to layout transitions

[Jason Ekstrand]

Ok, I must say I'm a bit impressed.  This series is a bit nuts but you
pulled it off with style.  I don't think any hardware designers ever
intended for resolves to be done this way but it seems to work out really
well.  Good work!  I've sent a variety of comments throughout the series
but no reviews yet because I think there will probably be a v2.

On Thu, Apr 27, 2017 at 11:31 AM, Nanley Chery 
wrote:

> Resolves of CCS-enabled image subresources are currently tied to the
> scope of a subpass. This can cause us to lose clear data compression
> prematurely in some cases. For example, an application can record a
> render pass that only clears followed by another render pass that only
> draws. The driver would do a fast-clear then immediately resolve the
> color buffers before the second render pass.
>
> This series instead ties the lifetime of clear data compression to the
> scope of the image layout. In the above example, the application would
> presumably keep the image in the
> VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL layout across both render
> passes and so the driver would avoid the intermediate resolve.
>
> 
>
> This series improves the average frame rate of a Dota 2 benchmark by
> 3.04% on my SKL GT4. The frame rates are now similar to those seen when
> running it with INTEL_DEBUG=norbc. The benchmark was run three times at
> 1080p in release mode.
>
> Six tests in dEQP-VK.geometry.layered.3d.* now fail, but I've attributed
> the failures to a test bug and filed a bug report.
>
> 
>
> Cc: Jason Ekstrand 
>
> Nanley Chery (22):
>   intel/isl: Limit CCS to one subresource on gen7
>   intel/isl: Only create a CCS buffer if the image supports rendering
>   intel/isl: Add surface state clear value information
>   anv: Add color auxiliary buffer helpers
>   anv/image: Append CCS/MCS with a clear value buffer
>   anv/image: Remove incorrect assertion in anv_BindImage
>   anv/image: Initialize the clear values buffer
>   anv/cmd_buffer: Always enable CCS_D in render passes
>   anv/cmd_buffer: Don't partially fast-clear image layers
>   anv/cmd_buffer: Disable fast clears in the GENERAL layout
>   anv/cmd_buffer: Ensure the fast clear values are correct
>   anv/gpu_memcpy: Add a lighter-weight memcpy path
>   blorp/clear: Add a binding-table-based CCS resolve function
>   anv/blorp: Add a surface-state-based CCS resolve function
>   anv/cmd_buffer: Adjust the image view reloc function
>   anv/cmd_buffer: Add transition_color_buffer()
>   anv: Add anv_get_sliceCount()
>   anv/cmd_buffer: Perform color buffer layout transitions
>   anv/blorp: Stop resolving CCS implicitly
>   anv/pass: Get rid of anv_subpass_usage
>   intel/blorp: Allow BLORP calls to be predicated
>   anv: Predicate fast-clear resolves
>
>  src/intel/blorp/blorp.h|  12 +
>  src/intel/blorp/blorp_clear.c  |  64 +++--
>  src/intel/blorp/blorp_genX_exec.h  |   3 +
>  src/intel/isl/isl.c|  20 +-
>  src/intel/isl/isl.h|   4 +
>  src/intel/vulkan/anv_blorp.c   | 188 +++---
>  src/intel/vulkan/anv_image.c   | 153 ++-
>  src/intel/vulkan/anv_pass.c|  36 ++-
>  src/intel/vulkan/anv_private.h |  68 -
>  src/intel/vulkan/genX_cmd_buffer.c | 507 ++
> ---
>  src/intel/vulkan/genX_gpu_memcpy.c |  38 +++
>  11 files changed, 801 insertions(+), 292 deletions(-)
>
> --
> 2.12.2
>
>
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Re: [Mesa-dev] [PATCH 22/22] anv: Predicate fast-clear resolves

[Jason Ekstrand]

On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery 
wrote:

> There's no image layout to represent a full-RT-cleared color attachment.
> That's one reason we can end up with redundant resolves. Testing has
> shown that such resolves can measurably hurt performance and that
> predicating them can avoid the penalty.
>
> Signed-off-by: Nanley Chery 
> ---
>  src/intel/vulkan/anv_blorp.c   |   3 +-
>  src/intel/vulkan/anv_image.c   |   6 +++
>  src/intel/vulkan/genX_cmd_buffer.c | 106 ++
> ---
>  3 files changed, 108 insertions(+), 7 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
> index 821d01a077..32f0edf316 100644
> --- a/src/intel/vulkan/anv_blorp.c
> +++ b/src/intel/vulkan/anv_blorp.c
> @@ -1500,7 +1500,8 @@ anv_ccs_resolve(struct anv_cmd_buffer * const
> cmd_buffer,
>
> struct blorp_batch batch;
> blorp_batch_init(_buffer->device->blorp, , cmd_buffer,
> -BLORP_BATCH_NO_EMIT_DEPTH_STENCIL);
> +BLORP_BATCH_NO_EMIT_DEPTH_STENCIL |
> +BLORP_BATCH_PREDICATE_ENABLE);
>
> struct blorp_surf surf;
> get_blorp_surf_for_anv_image(image, VK_IMAGE_ASPECT_COLOR_BIT,
> diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
> index 751f2d6026..92ee86dab5 100644
> --- a/src/intel/vulkan/anv_image.c
> +++ b/src/intel/vulkan/anv_image.c
> @@ -208,6 +208,12 @@ anv_fill_ccs_resolve_ss(const struct anv_device *
> const device,
> .aux_usage = image->aux_usage ==
> ISL_AUX_USAGE_NONE ?
>  ISL_AUX_USAGE_CCS_D :
> image->aux_usage,
> .mocs = device->default_mocs);
> +
> +   /* The following dword is used as a flag to represent whether or not
> this
> +* CCS subresource needs resolving. We want this to be zero by default,
> +* which means that a resolve is not necessary.
> +*/
> +   assert(*(uint32_t *)(data + device->isl_dev.ss.addr_offset) == 0);
>

This seems like kind-of an odd place to put it... Not a problem, just odd.


>  }
>
>  /**
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> b/src/intel/vulkan/genX_cmd_buffer.c
> index 95729ec8a8..041301290e 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -402,6 +402,82 @@ transition_depth_buffer(struct anv_cmd_buffer
> *cmd_buffer,
>anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op);
>  }
>
> +static uint32_t
> +clear_value_buffer_offset(const struct anv_cmd_buffer * const cmd_buffer,
> +  const struct anv_image * const image,
> +  const uint8_t level)
> +{
> +   return image->offset +
> +  image->aux_surface.offset + image->aux_surface.isl.size +
> +  cmd_buffer->device->isl_dev.ss.size * level;
> +}
> +
> +#define MI_PREDICATE_SRC0  0x2400
> +#define MI_PREDICATE_SRC1  0x2408
> +
> +enum ccs_resolve_state {
> +   CCS_RESOLVE_NOT_NEEDED,
> +   CCS_RESOLVE_NEEDED,
> +   CCS_RESOLVE_STARTING,
> +};
> +
> +/* Manages the state of an color image subresource to ensure resolves are
> + * performed properly.
> + */
> +static void
> +genX(set_resolve_state)(struct anv_cmd_buffer * const cmd_buffer,
> +const struct anv_image * const image,
> +const uint8_t level,
> +const enum ccs_resolve_state state)
> +{
> +   assert(cmd_buffer && image);
> +
> +   /* The image subresource range must have a color auxiliary buffer. */
> +   assert(anv_image_has_color_aux(image));
> +   assert(level < anv_color_aux_levels(image));
> +
> +   /* We store the resolve flag in the location of the surface base
> address
> +* field for simplicity and because it is initialized to zero when the
> +* clear value buffer is initialized.
> +*/
> +   const uint32_t resolve_flag_offset =
> +  clear_value_buffer_offset(cmd_buffer, image, level) +
> +  cmd_buffer->device->isl_dev.ss.addr_offset;
> +
> +   /* An update operation should not overwrite the fast clear value. */
> +   if (cmd_buffer->device->isl_dev.ss.addr_offset <
> +   cmd_buffer->device->isl_dev.ss.clear_value_offset) {
> +  assert(cmd_buffer->device->isl_dev.ss.addr_offset + 4 <=
> + cmd_buffer->device->isl_dev.ss.clear_value_offset);
> +   }
> +
> +   if (state != CCS_RESOLVE_STARTING) {
> +  assert(state == CCS_RESOLVE_NEEDED || state ==
> CCS_RESOLVE_NOT_NEEDED);
> +  /* The HW docs say that there is no way to guarantee the completion
> of
> +   * the following command. We use it nevertheless because it shows no
> +   * issues in testing is currently being used in the GL driver.
> +   */
> +  anv_batch_emit(_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
> + sdi.Address = (struct anv_address) { image->bo,
> resolve_flag_offset };
> + sdi.ImmediateData = state == 

[Mesa-dev] [PATCH 2/5 v2] gallium: Add support for 5551 with the 1-bit field in the low bit.

[Eric Anholt]

This is how VC4 stores 5551 textures, which we need to support for
GL_OES_required_internalformat.

v2: Extend commit message, fix svga driver build, add BE ordering from
Roland.
---
 src/gallium/auxiliary/util/u_format.csv |  2 ++
 src/gallium/drivers/svga/svga_format.c  |  2 ++
 src/gallium/include/pipe/p_format.h |  3 +++
 src/mesa/state_tracker/st_format.c  | 16 +---
 4 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/src/gallium/auxiliary/util/u_format.csv 
b/src/gallium/auxiliary/util/u_format.csv
index cef530aae7c3..966b34bd722e 100644
--- a/src/gallium/auxiliary/util/u_format.csv
+++ b/src/gallium/auxiliary/util/u_format.csv
@@ -74,6 +74,8 @@ PIPE_FORMAT_X8B8G8R8_UNORM, plain, 1, 1, x8  , un8 , 
un8 , un8 , wzy1, r
 PIPE_FORMAT_R8G8B8X8_UNORM, plain, 1, 1, un8 , un8 , un8 , x8  , xyz1, 
rgb
 PIPE_FORMAT_B5G5R5X1_UNORM, plain, 1, 1, un5 , un5 , un5 , x1  , zyx1, 
rgb, x1  , un5 , un5 , un5 , yzw1
 PIPE_FORMAT_B5G5R5A1_UNORM, plain, 1, 1, un5 , un5 , un5 , un1 , zyxw, 
rgb, un1 , un5 , un5 , un5 , yzwx
+PIPE_FORMAT_X1B5G5R5_UNORM, plain, 1, 1, x1  , un5 , un5 , un5 , wzy1, 
rgb, un5 , un5 , un5 ,  x1 , xyz1
+PIPE_FORMAT_A1B5G5R5_UNORM, plain, 1, 1, un1 , un5 , un5 , un5 , wzyx, 
rgb, un5 , un5 , un5 , un1 , xyzw
 PIPE_FORMAT_B4G4R4A4_UNORM, plain, 1, 1, un4 , un4 , un4 , un4 , zyxw, 
rgb, un4 , un4 , un4 , un4 , yzwx
 PIPE_FORMAT_B4G4R4X4_UNORM, plain, 1, 1, un4 , un4 , un4 , x4  , zyx1, 
rgb, x4  , un4 , un4 , un4 , yzw1
 PIPE_FORMAT_B5G6R5_UNORM  , plain, 1, 1, un5 , un6 , un5 , , zyx1, 
rgb, un5 , un6 , un5 , , xyz1
diff --git a/src/gallium/drivers/svga/svga_format.c 
b/src/gallium/drivers/svga/svga_format.c
index 3a2f7df24277..8bac84c07002 100644
--- a/src/gallium/drivers/svga/svga_format.c
+++ b/src/gallium/drivers/svga/svga_format.c
@@ -58,6 +58,7 @@ static const struct vgpu10_format_entry 
format_conversion_table[] =
{ PIPE_FORMAT_A8R8G8B8_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_X8R8G8B8_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_B5G5R5A1_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_B5G5R5A1_UNORM,   TF_GEN_MIPS },
+   { PIPE_FORMAT_A1B5G5R5_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_B4G4R4A4_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_B5G6R5_UNORM,  SVGA3D_FORMAT_INVALID,  
SVGA3D_B5G6R5_UNORM, TF_GEN_MIPS },
{ PIPE_FORMAT_R10G10B10A2_UNORM, SVGA3D_R10G10B10A2_UNORM,   
SVGA3D_R10G10B10A2_UNORM,TF_GEN_MIPS },
@@ -175,6 +176,7 @@ static const struct vgpu10_format_entry 
format_conversion_table[] =
{ PIPE_FORMAT_R5SG5SB6U_NORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_A8B8G8R8_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_B5G5R5X1_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
+   { PIPE_FORMAT_X1B5G5R5_UNORM,SVGA3D_FORMAT_INVALID,  
SVGA3D_FORMAT_INVALID,   0 },
{ PIPE_FORMAT_R10G10B10A2_USCALED,   SVGA3D_R10G10B10A2_UNORM,   
SVGA3D_FORMAT_INVALID,   VF_PUINT_TO_USCALED },
{ PIPE_FORMAT_R11G11B10_FLOAT,   SVGA3D_FORMAT_INVALID,  
SVGA3D_R11G11B10_FLOAT,  TF_GEN_MIPS },
{ PIPE_FORMAT_R9G9B9E5_FLOAT,SVGA3D_FORMAT_INVALID,  
SVGA3D_R9G9B9E5_SHAREDEXP,   0 },
diff --git a/src/gallium/include/pipe/p_format.h 
b/src/gallium/include/pipe/p_format.h
index e4e09d8b4353..515ce62e2973 100644
--- a/src/gallium/include/pipe/p_format.h
+++ b/src/gallium/include/pipe/p_format.h
@@ -391,6 +391,9 @@ enum pipe_format {
 
PIPE_FORMAT_P016= 307,
 
+   PIPE_FORMAT_A1B5G5R5_UNORM  = 308,
+   PIPE_FORMAT_X1B5G5R5_UNORM  = 309,
+
PIPE_FORMAT_COUNT
 };
 
diff --git a/src/mesa/state_tracker/st_format.c 
b/src/mesa/state_tracker/st_format.c
index 012f1a40151f..25162fbb9e5c 100644
--- a/src/mesa/state_tracker/st_format.c
+++ b/src/mesa/state_tracker/st_format.c
@@ -79,6 +79,8 @@ st_mesa_format_to_pipe_format(const struct st_context *st, 
mesa_format mesaForma
   return PIPE_FORMAT_XRGB_UNORM;
case MESA_FORMAT_B5G5R5A1_UNORM:
   return PIPE_FORMAT_B5G5R5A1_UNORM;
+   case MESA_FORMAT_A1B5G5R5_UNORM:
+  return PIPE_FORMAT_A1B5G5R5_UNORM;
case MESA_FORMAT_B4G4R4A4_UNORM:
   return PIPE_FORMAT_B4G4R4A4_UNORM;
case MESA_FORMAT_B5G6R5_UNORM:
@@ -407,6 +409,8 @@ st_mesa_format_to_pipe_format(const struct st_context *st, 
mesa_format mesaForma
   return PIPE_FORMAT_B4G4R4X4_UNORM;
case MESA_FORMAT_B5G5R5X1_UNORM:
   return PIPE_FORMAT_B5G5R5X1_UNORM;
+   case MESA_FORMAT_X1B5G5R5_UNORM:
+  return PIPE_FORMAT_X1B5G5R5_UNORM;
case MESA_FORMAT_R8G8B8X8_SNORM:
   return 

Re: [Mesa-dev] [PATCH 2/5] gallium: Add support for 5551 with the 1-bit field in the low bit.

[Eric Anholt]

Roland Scheidegger  writes:

> Am 02.05.2017 um 21:33 schrieb Eric Anholt:
>> ---
>> 
>> Do I have the swizzles right here?  It's a bit complicated because I
>> have a reswizzle in vc4, so I may have just massaged things to work
>> out in my case.  I tried a lot of combinations trying to specify BE
>> swizzles in a way that wouldn't assertion fail in the python script,
>> with no luck.
>
> For BE shouldn't this just be un5,un5,un5,un1(x1),xyzw(1)?
> Otherwise this looks alright to me. But don't take my word for it I
> often get confused here :-).
> Though you only say "1-bit field in the low bit" so I don't know what
> ordering you really want - that still leaves the choice of the two
> common abgr and argb orderings :-). But the name and swizzles seem to
> agree here as far as I can tell...

That seems to work.  Not sure how I missed that option before.


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[Mesa-dev] [PATCH 3/5 v2] glsl: Restrict func redeclarations (not just redefinitions) on GLSL 1.00.

[Eric Anholt]

Fixes DEQP's scoping.invalid.redeclare_function_fragment/vertex.

v2: Fix accidental rejection of prototype+decl.

Reviewed-by: Samuel Pitoiset 
---

Thanks for testing!  Here's a new version with that fixed.  Piglit
series covering this regression and more, to follow.

 src/compiler/glsl/ast_to_hir.cpp | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp
index 4281fcef2da8..05e8afac0907 100644
--- a/src/compiler/glsl/ast_to_hir.cpp
+++ b/src/compiler/glsl/ast_to_hir.cpp
@@ -5712,6 +5712,16 @@ ast_function::hir(exec_list *instructions,
 */
return NULL;
 }
+ } else if (state->language_version == 100 && !is_definition) {
+/* From the GLSL 1.00 spec, section 4.2.7:
+ *
+ * "A particular variable, structure or function declaration
+ *  may occur at most once within a scope with the exception
+ *  that a single function prototype plus the corresponding
+ *  function definition are allowed."
+ */
+YYLTYPE loc = this->get_location();
+_mesa_glsl_error(, state, "function `%s' redeclared", name);
  }
   }
}
-- 
2.11.0

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Re: [Mesa-dev] [PATCH 2/2] wglgears: fix up wglChoosePixelFormatARB() attribute list

[Charmaine Lee]

Looks great.

For the series, Reviewed-by: Charmaine Lee 

From: Brian Paul 
Sent: Wednesday, May 3, 2017 12:49:40 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] wglgears: fix up wglChoosePixelFormatARB() attribute list

Specify WGL_DRAW_TO_WINDOW_ARB and WGL_COLOR_BITS_ARB.
Improve some comments, per Charmaine.
---
 src/wgl/wglgears.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/wgl/wglgears.c b/src/wgl/wglgears.c
index 7d43822..d673143 100644
--- a/src/wgl/wglgears.c
+++ b/src/wgl/wglgears.c
@@ -421,11 +421,12 @@ make_window(const char *name, int x, int y, int width, 
int height)
}

if (use_srgb) {
-  /* For sRGB we need to use the wglChoosePixelFormatARB() function,
-   * and then create a new context, window, etc.
+  /* We can't query/use extension functions until after we've
+   * created and bound a rendering context (done above).
*
-   * Note: we can't query/use extension functions until after we've
-   * creatend and bound a rendering context.
+   * We can only set the pixel format of the window once, so we need to
+   * create a new device context in order to use the pixel format returned
+   * from wglChoosePixelFormatARB, and then create a new window.
*/
   PFNWGLCHOOSEPIXELFORMATARBPROC wglChoosePixelFormatARB_func =
  (PFNWGLCHOOSEPIXELFORMATARBPROC)
@@ -434,8 +435,8 @@ make_window(const char *name, int x, int y, int width, int 
height)

   static const int int_attribs[] = {
  WGL_SUPPORT_OPENGL_ARB, TRUE,
- //WGL_COLOR_BITS_ARB, 24,
- //WGL_ALPHA_BITS_ARB, 8,
+ WGL_DRAW_TO_WINDOW_ARB, TRUE,
+ WGL_COLOR_BITS_ARB, 24,  // at least 24-bits of RGB
  WGL_DEPTH_BITS_ARB, 24,
  WGL_DOUBLE_BUFFER_ARB, TRUE,
  WGL_FRAMEBUFFER_SRGB_CAPABLE_ARB, TRUE,
--
1.9.1

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Re: [Mesa-dev] [PATCH 16/17] st/mesa: upload zero-stride vertex attributes here

[Marek Olšák]

On Wed, May 3, 2017 at 6:04 PM, Nicolai Hähnle  wrote:
> On 01.05.2017 14:53, Marek Olšák wrote:
>>
>> From: Marek Olšák 
>>
>> This is the best place to do it. Now drivers without u_vbuf don't have to
>> do it.
>> ---
>>  src/mesa/state_tracker/st_atom_array.c | 56
>> --
>>  src/mesa/state_tracker/st_context.c|  2 ++
>>  src/mesa/state_tracker/st_context.h|  1 +
>>  3 files changed, 43 insertions(+), 16 deletions(-)
>>
>> diff --git a/src/mesa/state_tracker/st_atom_array.c
>> b/src/mesa/state_tracker/st_atom_array.c
>> index cc9cac1..813468b 100644
>> --- a/src/mesa/state_tracker/st_atom_array.c
>> +++ b/src/mesa/state_tracker/st_atom_array.c
>> @@ -37,20 +37,21 @@
>>   */
>>
>>  #include "st_context.h"
>>  #include "st_atom.h"
>>  #include "st_cb_bufferobjects.h"
>>  #include "st_draw.h"
>>  #include "st_program.h"
>>
>>  #include "cso_cache/cso_context.h"
>>  #include "util/u_math.h"
>> +#include "util/u_upload_mgr.h"
>>  #include "main/bufferobj.h"
>>  #include "main/glformats.h"
>>
>>  /* vertex_formats[gltype - GL_BYTE][integer*2 + normalized][size - 1] */
>>  static const uint16_t vertex_formats[][4][4] = {
>> { /* GL_BYTE */
>>{
>>   PIPE_FORMAT_R8_SSCALED,
>>   PIPE_FORMAT_R8G8_SSCALED,
>>   PIPE_FORMAT_R8G8B8_SSCALED,
>> @@ -327,20 +328,25 @@ is_interleaved_arrays(const struct st_vertex_program
>> *vp,
>> for (attr = 0; attr < num_inputs; attr++) {
>>const struct gl_vertex_array *array;
>>const struct gl_buffer_object *bufObj;
>>GLsizei stride;
>>
>>array = get_client_array(arrays, vp->index_to_input[attr]);
>>if (!array)
>>  continue;
>>
>>stride = array->StrideB; /* in bytes */
>> +
>> +  /* To keep things simple, don't allow interleaved zero-stride
>> attribs. */
>> +  if (stride == 0)
>> + return false;
>> +
>>bufObj = array->BufferObj;
>>if (attr == 0) {
>>   /* save info about the first array */
>>   firstStride = stride;
>>   firstPtr = array->Ptr;
>>   firstBufObj = bufObj;
>>   userSpaceBuffer = !bufObj || !bufObj->Name;
>>}
>>else {
>>   /* check if other arrays interleave with the first, in same
>> buffer */
>> @@ -564,20 +570,21 @@ setup_interleaved_attribs(struct st_context *st,
>>  static void
>>  setup_non_interleaved_attribs(struct st_context *st,
>>const struct st_vertex_program *vp,
>>const struct gl_vertex_array **arrays,
>>unsigned num_inputs)
>>  {
>> struct gl_context *ctx = st->ctx;
>> struct pipe_vertex_buffer vbuffer[PIPE_MAX_ATTRIBS];
>> struct pipe_vertex_element velements[PIPE_MAX_ATTRIBS] = {{0}};
>> unsigned num_vbuffers = 0;
>> +   unsigned unref_buffers = 0;
>> GLuint attr;
>>
>> for (attr = 0; attr < num_inputs;) {
>>const unsigned mesaAttr = vp->index_to_input[attr];
>>const struct gl_vertex_array *array;
>>struct gl_buffer_object *bufobj;
>>GLsizei stride;
>>unsigned src_format;
>>unsigned bufidx;
>>
>> @@ -601,54 +608,71 @@ setup_non_interleaved_attribs(struct st_context *st,
>>   if (!stobj || !stobj->buffer) {
>>  st->vertex_array_out_of_memory = true;
>>  return; /* out-of-memory error probably */
>>   }
>>
>>   vbuffer[bufidx].buffer.resource = stobj->buffer;
>>   vbuffer[bufidx].is_user_buffer = false;
>>   vbuffer[bufidx].buffer_offset = pointer_to_offset(array->Ptr);
>>}
>>else {
>> - /* wrap user data */
>> - void *ptr;
>> -
>> - if (array->Ptr) {
>> -ptr = (void *) array->Ptr;
>> - }
>> - else {
>> -/* no array, use ctx->Current.Attrib[] value */
>> -ptr = (void *) ctx->Current.Attrib[mesaAttr];
>> -stride = 0;
>> + if (stride == 0) {
>> +void *ptr = array->Ptr ? (void*)array->Ptr :
>> +
>> (void*)ctx->Current.Attrib[mesaAttr];
>> +
>> +vbuffer[bufidx].is_user_buffer = false;
>> +vbuffer[bufidx].buffer.resource = NULL;
>> +
>> +/* Use const_uploader for zero-stride vertex attributes,
>> because
>> + * it may use a better memory placement than stream_uploader.
>> + * The reason is that zero-stride attributes can be fetched
>> many
>> + * times (thousands of times), so a better placement is going
>> to
>> + * perform better.
>> + *
>> + * Upload the maximum possible size, which is 4x GLdouble =
>> 32.
>> + */
>> +u_upload_data(st->can_bind_const_buffer_as_vertex ?
>> + st->pipe->const_uploader :
>> + st->pipe->stream_uploader,
>> +  

[Mesa-dev] [RFC PATCH 08/17] clover: Fill in the program byte-size in pipe_compute_state

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/kernel.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp 
b/src/gallium/state_trackers/clover/core/kernel.cpp
index 4716705323..328323b6b0 100644
--- a/src/gallium/state_trackers/clover/core/kernel.cpp
+++ b/src/gallium/state_trackers/clover/core/kernel.cpp
@@ -228,6 +228,7 @@ kernel::exec_context::bind(intrusive_ptr _q,
 
   cs.ir_type = q->device().ir_format();
   cs.prog = &(msec.data[0]);
+  cs.prog_num_bytes = msec.data.size();
   cs.req_local_mem = mem_local;
   cs.req_input_mem = input.size();
   st = q->pipe->create_compute_state(q->pipe, );
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 14/17] clover: Accept SPIR-V binaries in clCreateProgramWithBinary

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 35 ---
 1 file changed, 25 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 9d59668f8f..5f5971078d 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -22,6 +22,8 @@
 
 #include "api/util.hpp"
 #include "core/program.hpp"
+#include "spirv/invocation.hpp"
+#include "spirv/spirv_utils.h"
 #include "util/u_debug.h"
 
 #include 
@@ -92,22 +94,35 @@ clCreateProgramWithBinary(cl_context d_ctx, cl_uint n,
 
// Deserialize the provided binaries,
std::vector> result = map(
-  [](const unsigned char *p, size_t l) -> std::pair {
+  [](const unsigned char *p, size_t l, device ) -> std::pair {
  if (!p || !l)
 return { CL_INVALID_VALUE, {} };
 
- try {
-std::stringbuf bin( { (char*)p, l } );
-std::istream s();
-
-return { CL_SUCCESS, module::deserialize(s) };
-
- } catch (std::istream::failure ) {
-return { CL_INVALID_BINARY, {} };
+ if (spirv_is_binary_spirv(reinterpret_cast(p))) {
+if (!dev.supports_ir(PIPE_SHADER_IR_SPIRV))
+   return { CL_INVALID_BINARY, {} };
+
+try {
+   std::string log;
+   return { CL_SUCCESS, spirv::process_program(p, l, true, log) };
+} catch (build_error ) {
+   return { CL_INVALID_BINARY, {} };
+}
+ } else {
+try {
+   std::stringbuf bin( { (char*)p, l } );
+   std::istream s();
+
+   return { CL_SUCCESS, module::deserialize(s) };
+
+} catch (std::istream::failure ) {
+   return { CL_INVALID_BINARY, {} };
+}
  }
   },
   range(binaries, n),
-  range(lengths, n));
+  range(lengths, n),
+  devs);
 
// update the status array,
if (r_status)
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 17/17] clover: Handle CL_PROGRAM_IL in clGetProgramInfo

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 57b8aedb91..5357724939 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -386,6 +386,16 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
   buf.as_string() = prog.source();
   break;
 
+   // FIXME valid only if OpenCL 2.1 context
+   case CL_PROGRAM_IL:
+//  if (prog.context().properties())
+// throw error(CL_INVALID_VALUE);
+  if (prog.has_il)
+ buf.as_pointer() = std::make_pair(prog.il(), prog.length());
+  else if (r_size)
+ *r_size = 0u;
+  break;
+
case CL_PROGRAM_BINARY_SIZES:
   buf.as_vector() = map([&](const device ) {
 return prog.build(dev).binary.size();
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 15/17] clover: Implement clCreateProgramWithIL from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp  | 29 ++-
 src/gallium/state_trackers/clover/core/program.cpp | 57 --
 src/gallium/state_trackers/clover/core/program.hpp | 14 ++
 3 files changed, 95 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 5f5971078d..57b8aedb91 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -144,6 +144,31 @@ clCreateProgramWithBinary(cl_context d_ctx, cl_uint n,
 }
 
 CLOVER_API cl_program
+clCreateProgramWithIL(cl_context d_ctx,
+  const void *il,
+  const size_t length,
+  cl_int *r_errcode) try {
+   auto  = obj(d_ctx);
+
+   if (!il || !length)
+  throw error(CL_INVALID_VALUE);
+
+   uint32_t type = 0;
+   // Only SPIR-V is supported for now
+   if (!spirv_is_binary_spirv(reinterpret_cast(il)))
+  throw error(CL_INVALID_VALUE);
+   type = PIPE_SHADER_IR_SPIRV;
+
+   // initialize a program object with it.
+   ret_error(r_errcode, CL_SUCCESS);
+   return new program(ctx, il, length, type);
+
+} catch (error ) {
+   ret_error(r_errcode, e);
+   return NULL;
+}
+
+CLOVER_API cl_program
 clCreateProgramWithBuiltInKernels(cl_context d_ctx, cl_uint n,
   const cl_device_id *d_devs,
   const char *kernel_names,
@@ -198,7 +223,7 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
 
validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
 
-   if (prog.has_source) {
+   if (prog.has_source || prog.has_il) {
   prog.compile(devs, opts);
   prog.link(devs, opts, { prog });
}
@@ -228,7 +253,7 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
if (bool(num_headers) != bool(header_names))
   throw error(CL_INVALID_VALUE);
 
-   if (!prog.has_source)
+   if (!prog.has_source && !prog.has_il)
   throw error(CL_INVALID_OPERATION);
 
for_each([&](const char *name, const program ) {
diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 6a54500247..d9d197fffe 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -23,24 +23,43 @@
 #include "core/program.hpp"
 #include "llvm/invocation.hpp"
 #include "tgsi/invocation.hpp"
+#include "spirv/invocation.hpp"
+
+#include "spirv/spirv_utils.h"
+
+#include 
 
 using namespace clover;
 
 program::program(clover::context , const std::string ) :
-   has_source(true), context(ctx), _source(source), _kernel_ref_counter(0) {
+   has_source(true), has_il(false), il_type(0u), context(ctx), _source(source),
+   _kernel_ref_counter(0), _il(nullptr), _length(0) {
 }
 
 program::program(clover::context ,
  const ref_vector ,
  const std::vector ) :
-   has_source(false), context(ctx),
-   _devices(devs), _kernel_ref_counter(0) {
+   has_source(false), has_il(false), il_type(0u), context(ctx),
+   _devices(devs), _kernel_ref_counter(0), _il(nullptr), _length(0) {
for_each([&](device , const module ) {
  _builds[] = { bin };
   },
   devs, binaries);
 }
 
+program::program(clover::context , const void *il, const size_t length,
+ const uint32_t type) :
+   has_source(false), has_il(true), il_type(type), context(ctx),
+   _kernel_ref_counter(0), _il(nullptr), _length(length) {
+   const char *c_il = reinterpret_cast(il);
+   _il = spirv_spirv_to_cpu(c_il, length);
+}
+
+program::~program() {
+   if (has_il)
+  delete[] reinterpret_cast(_il);
+}
+
 void
 program::compile(const ref_vector , const std::string ,
  const header_map ) {
@@ -65,6 +84,28 @@ program::compile(const ref_vector , const 
std::string ,
 throw;
  }
   }
+   } else if (has_il) {
+  _devices = devs;
+
+  for (auto  : devs) {
+ std::string log;
+
+ try {
+if (il_type == PIPE_SHADER_IR_SPIRV) {
+   if (!dev.supports_ir(PIPE_SHADER_IR_SPIRV)) {
+  log = "Device does not support SPIR-V as IL\n";
+  throw error(CL_INVALID_BINARY);
+   }
+   _builds[] = { spirv::process_program(_il, _length, false, 
log), opts, log };
+} else {
+   log = "Only SPIR-V is supported as IL by clover for now\n";
+   throw error(CL_INVALID_BINARY);
+}
+ } catch (const error &) {
+_builds[] = { module(), opts, log };
+throw;
+ }
+  }
}
 }
 
@@ -101,6 +142,16 @@ program::link(const ref_vector , const 
std::string ,
}
 }
 
+const void *
+program::il() const {
+   return _il;
+}
+
+size_t
+program::length() const {
+   return _length;
+}
+

[Mesa-dev] [RFC PATCH 16/17] clover: Add a pointer property to return ILs

[Pierre Moreau]

OpenCL 2.1 gives the ability to query for a program’s IL, which is
returned as a pointer.

Signed-off-by: Pierre Moreau 
---
 .../state_trackers/clover/core/property.hpp| 39 ++
 1 file changed, 39 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/property.hpp 
b/src/gallium/state_trackers/clover/core/property.hpp
index 7f8e17684d..5beac372e7 100644
--- a/src/gallium/state_trackers/clover/core/property.hpp
+++ b/src/gallium/state_trackers/clover/core/property.hpp
@@ -23,6 +23,7 @@
 #ifndef CLOVER_CORE_PROPERTY_HPP
 #define CLOVER_CORE_PROPERTY_HPP
 
+#include 
 #include 
 
 #include "util/range.hpp"
@@ -84,6 +85,19 @@ namespace clover {
   private:
  property_buffer 
   };
+
+  template
+  class property_pointer {
+  public:
+ property_pointer(property_buffer ) : buf(buf) {
+ }
+
+ inline property_pointer &
+ operator=(const std::pair );
+
+  private:
+ property_buffer 
+  };
};
 
///
@@ -119,6 +133,12 @@ namespace clover {
   }
 
   template
+  detail::property_pointer
+  as_pointer() {
+ return { *this };
+  }
+
+  template
   iterator_range
   allocate(size_t n) {
  if (r_buf && size < n * sizeof(T))
@@ -133,6 +153,17 @@ namespace clover {
 return { };
   }
 
+  void
+  allocate_raw(const void *v, size_t n) {
+ if (r_buf && size < n)
+throw error(CL_INVALID_VALUE);
+
+ if (r_size)
+*r_size = n;
+
+ std::memcpy(r_buf, v, n);
+  }
+
private:
   void *const r_buf;
   const size_t size;
@@ -178,6 +209,14 @@ namespace clover {
  return *this;
   }
 
+  template
+  inline property_pointer &
+  property_pointer::operator=(const std::pair ) {
+ buf.allocate_raw(v.first, v.second);
+
+ return *this;
+  }
+
   inline property_string &
   property_string::operator=(const std::string ) {
  auto r = buf.allocate(v.size() + 1);
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 13/17] clover: Handle the case when linking SPIR-V binaries together

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/program.cpp | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 15d559cd93..6a54500247 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -80,11 +80,20 @@ program::link(const ref_vector , const 
std::string ,
   std::string log = _builds[].log;
 
   try {
- const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
-   tgsi::link_program(ms) :
-   llvm::link_program(ms, dev.ir_format(),
-  dev.ir_target(), opts, log));
- _builds[] = { m, opts, log };
+ switch (dev.ir_format()) {
+ case PIPE_SHADER_IR_TGSI:
+_builds[] = { tgsi::link_program(ms), opts, log };
+break;
+ case PIPE_SHADER_IR_LLVM:
+case PIPE_SHADER_IR_NATIVE:
+case PIPE_SHADER_IR_NIR:
+_builds[] = { llvm::link_program(ms, dev.ir_format(),
+dev.ir_target(), opts, log), 
opts, log };
+break;
+ case PIPE_SHADER_IR_SPIRV:
+_builds[] = { clover::spirv::link_program(ms, opts, log), 
opts, log };
+break;
+ }
   } catch (...) {
  _builds[] = { module(), opts, log };
  throw;
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 12/17] clover: Refuse to compile source code to SPIR-V

[Pierre Moreau]

Creating a program using clCreateProgramWithSource to SPIR-V requires a
non-upstreamed version of LLVM and clang, therefore it is currently not
supported.

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/program.cpp | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index ae4b50a879..15d559cd93 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -51,6 +51,10 @@ program::compile(const ref_vector , const 
std::string ,
  std::string log;
 
  try {
+if (dev.ir_format() == PIPE_SHADER_IR_SPIRV) {
+   log = "Compiling from source to SPIR-V is not supported yet\n";
+   throw error(CL_INVALID_DEVICE);
+}
 const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
   tgsi::compile_program(_source, log) :
   llvm::compile_program(_source, headers,
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 09/17] clover: Add additional functions to query supported IRs

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/device.cpp | 11 +++
 src/gallium/state_trackers/clover/core/device.hpp |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 158c9aa696..52ac5229a3 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -224,6 +224,12 @@ device::ir_format() const {
   pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_PREFERRED_IR);
 }
 
+cl_uint
+device::supported_irs() const {
+   return (enum pipe_shader_ir) pipe->get_shader_param(
+  pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_SUPPORTED_IRS);
+}
+
 std::string
 device::ir_target() const {
std::vector target = get_compute_param(
@@ -235,3 +241,8 @@ enum pipe_endian
 device::endianness() const {
return (enum pipe_endian)pipe->get_param(pipe, PIPE_CAP_ENDIANNESS);
 }
+
+bool
+device::supports_ir(cl_uint ir) const {
+   return supported_irs() & (1 << ir);
+}
diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
b/src/gallium/state_trackers/clover/core/device.hpp
index 94a61d1050..065e788fd3 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -74,9 +74,12 @@ namespace clover {
   std::string device_name() const;
   std::string vendor_name() const;
   enum pipe_shader_ir ir_format() const;
+  cl_uint supported_irs() const;
   std::string ir_target() const;
   enum pipe_endian endianness() const;
 
+  bool supports_ir(cl_uint ir) const;
+
   friend class command_queue;
   friend class root_resource;
   friend class hard_event;
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 11/17] clover/spirv: Add functions for parsing arguments, linking programs, etc.

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/Makefile.am  |  10 +-
 src/gallium/state_trackers/clover/Makefile.sources |   4 +
 .../state_trackers/clover/spirv/invocation.cpp | 481 +
 .../state_trackers/clover/spirv/invocation.hpp |  40 ++
 4 files changed, 533 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/state_trackers/clover/spirv/invocation.cpp
 create mode 100644 src/gallium/state_trackers/clover/spirv/invocation.hpp

diff --git a/src/gallium/state_trackers/clover/Makefile.am 
b/src/gallium/state_trackers/clover/Makefile.am
index 321393536d..e29457e948 100644
--- a/src/gallium/state_trackers/clover/Makefile.am
+++ b/src/gallium/state_trackers/clover/Makefile.am
@@ -28,7 +28,7 @@ cl_HEADERS = \
$(top_srcdir)/include/CL/opencl.h
 endif
 
-noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la
+noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la libspirv.la
 
 libcltgsi_la_CXXFLAGS = \
-std=c++11 \
@@ -50,13 +50,19 @@ libclllvm_la_CXXFLAGS = \
 
 libclllvm_la_SOURCES = $(LLVM_SOURCES)
 
+libspirv_la_CXXFLAGS = \
+   -std=c++11 \
+   $(VISIBILITY_CXXFLAGS)
+
+libspirv_la_SOURCES = $(SPIRV_SOURCES)
+
 libclover_la_CXXFLAGS = \
-std=c++11 \
$(CLOVER_STD_OVERRIDE) \
$(VISIBILITY_CXXFLAGS)
 
 libclover_la_LIBADD = \
-   libcltgsi.la libclllvm.la
+   libcltgsi.la libclllvm.la libspirv.la
 
 libclover_la_SOURCES = $(CPP_SOURCES)
 
diff --git a/src/gallium/state_trackers/clover/Makefile.sources 
b/src/gallium/state_trackers/clover/Makefile.sources
index e9828b107b..f223bebcd3 100644
--- a/src/gallium/state_trackers/clover/Makefile.sources
+++ b/src/gallium/state_trackers/clover/Makefile.sources
@@ -66,3 +66,7 @@ LLVM_SOURCES := \
 TGSI_SOURCES := \
tgsi/compiler.cpp \
tgsi/invocation.hpp
+
+SPIRV_SOURCES := \
+   spirv/invocation.cpp \
+   spirv/invocation.hpp
diff --git a/src/gallium/state_trackers/clover/spirv/invocation.cpp 
b/src/gallium/state_trackers/clover/spirv/invocation.cpp
new file mode 100644
index 00..3e740eb998
--- /dev/null
+++ b/src/gallium/state_trackers/clover/spirv/invocation.cpp
@@ -0,0 +1,481 @@
+//
+// Copyright 2017 Pierre Moreau
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the "Software"),
+// to deal in the Software without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Software, and to permit persons to whom the
+// Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+// OTHER DEALINGS IN THE SOFTWARE.
+//
+
+#include 
+#include 
+
+#include 
+
+#include "core/error.hpp"
+#include "invocation.hpp"
+#include "llvm/util.hpp"
+#include "spirv/spirv_linker.h"
+#include "spirv/spirv_utils.h"
+#include "util/algorithm.hpp"
+#include "util/functional.hpp"
+#include "util/u_debug.h"
+
+#include "spirv.hpp11"
+
+using namespace clover;
+
+namespace {
+
+   template
+   T get(const std::vector& source, size_t index) {
+  if (index * sizeof(spirv_word) + 3u > source.size())
+ return static_cast(0);
+  return static_cast(spirv_get_word(source.data(), index));
+   }
+
+   enum module::argument::type
+   convertStorageClass(spv::StorageClass storage_class) {
+  switch (storage_class) {
+  case spv::StorageClass::UniformConstant:
+ return module::argument::constant;
+  case spv::StorageClass::Workgroup:
+ return module::argument::local;
+  case spv::StorageClass::CrossWorkgroup:
+ return module::argument::global;
+  default:
+ throw build_error();
+  }
+   }
+
+   enum module::argument::type
+   convertImageType(spv::Id id, spv::Dim dim, spv::AccessQualifier access,
+std::string ) {
+#define APPEND_DIM(d) \
+  switch(access) { \
+  case spv::AccessQualifier::ReadOnly: \
+ return module::argument::image##d##_rd; \
+  case spv::AccessQualifier::WriteOnly: \
+ return module::argument::image##d##_wr; \
+  default: \
+ err += "Invalid access qualifier " #d " for image " + \
+std::to_string(static_cast(id)); \
+ throw build_error(); \
+  }
+
+  switch 

[Mesa-dev] [RFC PATCH 10/17] clover/spirv: Import spirv.hpp11 version 1.0 (rev 10)

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 .../state_trackers/clover/spirv/spirv.hpp11| 952 +
 1 file changed, 952 insertions(+)
 create mode 100644 src/gallium/state_trackers/clover/spirv/spirv.hpp11

diff --git a/src/gallium/state_trackers/clover/spirv/spirv.hpp11 
b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
new file mode 100644
index 00..62bb127a8a
--- /dev/null
+++ b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
@@ -0,0 +1,952 @@
+// Copyright (c) 2014-2017 The Khronos Group Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and/or associated documentation files (the "Materials"),
+// to deal in the Materials without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Materials, and to permit persons to whom the
+// Materials are furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Materials.
+//
+// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
+// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
+// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
+//
+// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+// FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS
+// IN THE MATERIALS.
+
+// This header is automatically generated by the same tool that creates
+// the Binary Section of the SPIR-V specification.
+
+// Enumeration tokens for SPIR-V, in various styles:
+//   C, C++, C++11, JSON, Lua, Python
+//
+// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
+// - C++ will have tokens in the "spv" name space, e.g.: 
spv::SourceLanguageGLSL
+// - C++11 will use enum classes in the spv namespace, e.g.: 
spv::SourceLanguage::GLSL
+// - Lua will use tables, e.g.: spv.SourceLanguage.GLSL
+// - Python will use dictionaries, e.g.: spv['SourceLanguage']['GLSL']
+//
+// Some tokens act like mask values, which can be OR'd together,
+// while others are mutually exclusive.  The mask-like ones have
+// "Mask" in their name, and a parallel enum that has the shift
+// amount (1 << x) for each corresponding enumerant.
+
+#ifndef spirv_HPP
+#define spirv_HPP
+
+namespace spv {
+
+typedef unsigned int Id;
+
+#define SPV_VERSION 0x1
+#define SPV_REVISION 10
+
+static const unsigned int MagicNumber = 0x07230203;
+static const unsigned int Version = 0x0001;
+static const unsigned int Revision = 10;
+static const unsigned int OpCodeMask = 0x;
+static const unsigned int WordCountShift = 16;
+
+enum class SourceLanguage : unsigned {
+Unknown = 0,
+ESSL = 1,
+GLSL = 2,
+OpenCL_C = 3,
+OpenCL_CPP = 4,
+Max = 0x7fff,
+};
+
+enum class ExecutionModel : unsigned {
+Vertex = 0,
+TessellationControl = 1,
+TessellationEvaluation = 2,
+Geometry = 3,
+Fragment = 4,
+GLCompute = 5,
+Kernel = 6,
+Max = 0x7fff,
+};
+
+enum class AddressingModel : unsigned {
+Logical = 0,
+Physical32 = 1,
+Physical64 = 2,
+Max = 0x7fff,
+};
+
+enum class MemoryModel : unsigned {
+Simple = 0,
+GLSL450 = 1,
+OpenCL = 2,
+Max = 0x7fff,
+};
+
+enum class ExecutionMode : unsigned {
+Invocations = 0,
+SpacingEqual = 1,
+SpacingFractionalEven = 2,
+SpacingFractionalOdd = 3,
+VertexOrderCw = 4,
+VertexOrderCcw = 5,
+PixelCenterInteger = 6,
+OriginUpperLeft = 7,
+OriginLowerLeft = 8,
+EarlyFragmentTests = 9,
+PointMode = 10,
+Xfb = 11,
+DepthReplacing = 12,
+DepthGreater = 14,
+DepthLess = 15,
+DepthUnchanged = 16,
+LocalSize = 17,
+LocalSizeHint = 18,
+InputPoints = 19,
+InputLines = 20,
+InputLinesAdjacency = 21,
+Triangles = 22,
+InputTrianglesAdjacency = 23,
+Quads = 24,
+Isolines = 25,
+OutputVertices = 26,
+OutputPoints = 27,
+OutputLineStrip = 28,
+OutputTriangleStrip = 29,
+VecTypeHint = 30,
+ContractionOff = 31,
+Max = 0x7fff,
+};
+
+enum class StorageClass : unsigned {
+UniformConstant = 0,
+Input = 1,
+Uniform = 2,
+Output = 3,
+Workgroup = 4,
+CrossWorkgroup = 5,
+Private = 6,
+Function = 7,
+Generic = 8,
+PushConstant = 9,
+AtomicCounter = 10,
+Image = 11,
+Max = 0x7fff,
+};
+
+enum class Dim : unsigned {
+Dim1D = 0,
+Dim2D = 1,
+Dim3D = 2,
+  

[Mesa-dev] [RFC PATCH 06/17] include/CL: Add new option to clGetProgramInfo from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 include/CL/cl.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/CL/cl.h b/include/CL/cl.h
index 44d7aedc3e..cc8d7ddf60 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -455,6 +455,7 @@ typedef struct _cl_buffer_region {
 #define CL_PROGRAM_BINARIES 0x1166
 #define CL_PROGRAM_NUM_KERNELS  0x1167
 #define CL_PROGRAM_KERNEL_NAMES 0x1168
+#define CL_PROGRAM_IL   0x1169
 
 /* cl_program_build_info */
 #define CL_PROGRAM_BUILD_STATUS 0x1181
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 00/17] Introducing SPIR-V support to clover

[Pierre Moreau]

Hello everyone,

I have been working on converting SPIR-V to NVIR in order to run OpenCL kernels
on Nouveau, and I would like to submit the first part of that work for review.
Pieces from the SPIR-V to NVIR conversion work will be submitted once I have
cleaned it up and this series has progressed through the reviewing process.


What’s in this Series?
--

The focus of this series is to let clover accept SPIR-V binaries, either
through `clCreateProgramWithBinary()`, or through `clCreateProgramWithIL()`.
The latter function is the proper way to feed SPIR-V binaries using the OpenCL
API, however it was only introduced in OpenCL 2.1 (more on “why supporting
SPIR-V through `clCreateProgramWithBinary()` can be interesting” further down).

As several SPIR-V binaries can be linked together using the OpenCL API, I
implemented a SPIR-V linker, which is not perfect, but does the job. I tested
linking against a variable, a function, a library, and a function containing a
switch statement; switch-statements require you to keep some extra stuff around
to be properly parsed.
I also added a few “utilities” functions for retrieving and setting a word /
retrieving a string from a SPIR-V binary, and converting a SPIR-V binary to the
same endianness as the host CPU.

For validating SPIR-V binaries, I use an external tool, SPIRV-Tools [1]. It
could also be used in anv, and possibly radv if there is no validation done
already, but I haven’t looked into that.

A few modifications have been made to the pipe interface, to add a define for
the SPIR-V IR, and store the program’s byte-size along the program in
`struct pipe_compute_state`. The latter will only be needed by the consumer of
the SPIR-V, which is not part of this series. However, since clover needs to
fill that information in and I was modifying clover already, I decided to add
the new attribute in this series.


Missing
---

* As there is no upstream version of LLVM which can produce SPIR-V out of
  OpenCL code, clCreateProgramWithSource will refuse to work if the target IR
  is SPIR-V, for now.

* Optimisation linking options are parsed by the SPIR-V code in clover but
  are not passed along to the linker as it does not support them.


To Improve
--

The SPIR-V binary resulting from the linking of multiple SPIR-V binaries could
be cleaned up:

* As capabilities are simply copied from all the involved binaries, you can end
  up with multiple times the same capabilities in the resulting binary; this
  shouldn’t have any impact though.

* Similarly, types can end up being duplicated under different IDs, which
  should have no other impact than making SPIR-V validators unhappy.


Misc.
-

Being able to feed SPIR-V binaries through `clCreateProgramWithBinary()` is not
really useful at the moment: the same can be achieved using
`clCreateProgramWithIL()`. However it will be interesting once there is an
upstream version of LLVM which can generate SPIR-V binaries, as the application
could query the binary created by `clCreateProgramWithSource()` on the first
run, and give it to `clCreateProgramWithBinary()`on later runs.

Once NIR supports pointers, and anything else that could be missing to support
OpenCL kernels, it should be possible and easy to convert input SPIR-V
binaries to NIR, for drivers that do not accept SPIR-V as IR.


I have sent patches to Mesa in the past, but never series, so the splitting of
the patches in the series could be completely wrong, and I apologise for that
in advance.
Also, I am sure I abused of macros, gotos and manual memory managements, as I
am not that comfortable at writing too much C code: I’ll try to learn from
your comments.


Thank you in advance for reviewing/commenting,
Pierre


[1]: https://github.com/KhronosGroup/SPIRV-Tools/


Pierre Moreau (17):
  auxiliary: Introduce utilities for SPIR-V binaries
  auxiliary: Implement a linker for SPIR-V binaries
  include/pipe: Define SPIRV as an IR
  include/pipe: Store the byte-size of a SPIR-V binary
  include/CL: Add clCreateProgramWithIL from OpenCL 2.1
  include/CL: Add new option to clGetProgramInfo from OpenCL 2.1
  configure.ac: Check for SPIRV-Tools header and library
  clover: Fill in the program byte-size in pipe_compute_state
  clover: Add additional functions to query supported IRs
  clover/spirv: Import spirv.hpp11 version 1.0 (rev 10)
  clover/spirv: Add functions for parsing arguments, linking programs,
etc.
  clover: Refuse to compile source code to SPIR-V
  clover: Handle the case when linking SPIR-V binaries together
  clover: Accept SPIR-V binaries in clCreateProgramWithBinary
  clover: Implement clCreateProgramWithIL from OpenCL 2.1
  clover: Add a pointer property to return ILs
  clover: Handle CL_PROGRAM_IL in clGetProgramInfo

 configure.ac   |   16 +
 include/CL/cl.h|7 +
 include/CL/cl_platform.h   |1 +
 

[Mesa-dev] [RFC PATCH 07/17] configure.ac: Check for SPIRV-Tools header and library

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 configure.ac | 16 
 1 file changed, 16 insertions(+)

diff --git a/configure.ac b/configure.ac
index ba042791ad..602aeb279d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2064,6 +2064,11 @@ AC_ARG_WITH([clang-libdir],
 
 PKG_CHECK_EXISTS([libclc], [have_libclc=yes], [have_libclc=no])
 
+AC_LANG_PUSH([C++])
+AC_SEARCH_LIBS([_ZNK8spvtools10SpirvTools8ValidateEPKjm], [SPIRV-Tools], 
[have_spirv_tools=yes], [have_spirv_tools=no])
+AC_CHECK_HEADER([spirv-tools/libspirv.hpp], [have_spirv_tools_headers=yes; 
break;])
+AC_LANG_POP([C++])
+
 if test "x$enable_opencl" = xyes; then
 if test -z "$with_gallium_drivers"; then
 AC_MSG_ERROR([cannot enable OpenCL without Gallium])
@@ -2123,6 +2128,17 @@ if test "x$enable_opencl" = xyes; then
 llvm_add_component "objcarcopts" "opencl"
 llvm_add_component "profiledata" "opencl"
 
+if test "x$have_spirv_tools_headers" != xyes; then
+   AC_MSG_ERROR([Failed to find spirv-tools/libspirv.hpp, which is
+ required to build clover])
+fi
+
+if test "x$have_spirv_tools" != xyes; then
+   AC_MSG_ERROR([Failed to find a library implementing
+ _ZNK8spvtools10SpirvTools8ValidateEPKjm which is required
+ to build clover])
+fi
+
 dnl Check for Clang internal headers
 if test -z "$CLANG_LIBDIR"; then
 CLANG_LIBDIR=${LLVM_LIBDIR}
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 01/17] auxiliary: Introduce utilities for SPIR-V binaries

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/auxiliary/Makefile.am |  1 +
 src/gallium/auxiliary/Makefile.sources|  4 ++
 src/gallium/auxiliary/spirv/spirv_utils.c | 75 +++
 src/gallium/auxiliary/spirv/spirv_utils.h | 86 +++
 4 files changed, 166 insertions(+)
 create mode 100644 src/gallium/auxiliary/spirv/spirv_utils.c
 create mode 100644 src/gallium/auxiliary/spirv/spirv_utils.h

diff --git a/src/gallium/auxiliary/Makefile.am 
b/src/gallium/auxiliary/Makefile.am
index dc4bd4a40c..d2530a1f90 100644
--- a/src/gallium/auxiliary/Makefile.am
+++ b/src/gallium/auxiliary/Makefile.am
@@ -19,6 +19,7 @@ AM_CXXFLAGS = \
 libgallium_la_SOURCES = \
$(C_SOURCES) \
$(NIR_SOURCES) \
+   $(SPIRV_SOURCES) \
$(GENERATED_SOURCES)
 
 if HAVE_LIBDRM
diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index dbdb3ca815..f4817742ff 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -312,6 +312,10 @@ NIR_SOURCES := \
nir/tgsi_to_nir.c \
nir/tgsi_to_nir.h
 
+SPIRV_SOURCES := \
+   spirv/spirv_utils.c \
+   spirv/spirv_utils.h
+
 VL_SOURCES := \
vl/vl_bicubic_filter.c \
vl/vl_bicubic_filter.h \
diff --git a/src/gallium/auxiliary/spirv/spirv_utils.c 
b/src/gallium/auxiliary/spirv/spirv_utils.c
new file mode 100644
index 00..a2334d6909
--- /dev/null
+++ b/src/gallium/auxiliary/spirv/spirv_utils.c
@@ -0,0 +1,75 @@
+/**
+ *
+ * Copyright 2017 Pierre Moreau
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include "spirv_utils.h"
+
+#include "compiler/spirv/spirv.h"
+#include "util/u_math.h"
+
+spirv_word
+spirv_get_word(const char *binary, unsigned word_offset)
+{
+   return ((spirv_word *) binary)[word_offset];
+}
+
+void
+spirv_set_word(char *binary, unsigned word_offset, spirv_word word)
+{
+   ((spirv_word *) binary)[word_offset] = word;
+}
+
+const char *
+spirv_get_string(const char *binary, unsigned word_offset)
+{
+   return binary + word_offset * sizeof(spirv_word);
+}
+
+bool
+spirv_is_binary_spirv(const char *binary)
+{
+   const spirv_word first_word = spirv_get_word(binary, 0u);
+   const bool ret = (first_word == SpvMagicNumber) ||
+(util_bswap32(first_word) == SpvMagicNumber);
+   return ret;
+}
+
+char *
+spirv_spirv_to_cpu(const char *binary, size_t length)
+{
+   spirv_word word = spirv_get_word(binary, 0u);
+   size_t i = 0;
+   char *cpu_endianness_binary = malloc(length);
+   if (word == SpvMagicNumber)
+  return memcpy(cpu_endianness_binary, binary, length);
+
+   for (i = 0; i < length; i += 4) {
+  word = spirv_get_word(binary, i);
+  spirv_set_word(cpu_endianness_binary, i, util_bswap32(word));
+   }
+
+   return cpu_endianness_binary;
+}
diff --git a/src/gallium/auxiliary/spirv/spirv_utils.h 
b/src/gallium/auxiliary/spirv/spirv_utils.h
new file mode 100644
index 00..2db7f3b9dd
--- /dev/null
+++ b/src/gallium/auxiliary/spirv/spirv_utils.h
@@ -0,0 +1,86 @@
+/**
+ *
+ * Copyright 2017 Pierre Moreau
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright 

[Mesa-dev] [RFC PATCH 05/17] include/CL: Add clCreateProgramWithIL from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 include/CL/cl.h  | 6 ++
 include/CL/cl_platform.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/include/CL/cl.h b/include/CL/cl.h
index 316565d6e4..44d7aedc3e 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -757,6 +757,12 @@ clCreateProgramWithBuiltInKernels(cl_context/* 
context */,
   const char *  /* kernel_names */,
   cl_int *  /* errcode_ret */) 
CL_API_SUFFIX__VERSION_1_2;
 
+extern CL_API_ENTRY cl_program CL_API_CALL
+clCreateProgramWithIL(cl_context/* context */,
+ const void*/* il */,
+ size_t /* length */,
+ cl_int*/* errcode_ret */) 
CL_API_SUFFIX__VERSION_2_1;
+
 extern CL_API_ENTRY cl_int CL_API_CALL
 clRetainProgram(cl_program /* program */) CL_API_SUFFIX__VERSION_1_0;
 
diff --git a/include/CL/cl_platform.h b/include/CL/cl_platform.h
index 7f6f5e8a74..105d3cc1f0 100644
--- a/include/CL/cl_platform.h
+++ b/include/CL/cl_platform.h
@@ -75,6 +75,7 @@ extern "C" {
 #define CL_EXT_SUFFIX__VERSION_1_1
 #define CL_API_SUFFIX__VERSION_1_2
 #define CL_EXT_SUFFIX__VERSION_1_2
+#define CL_API_SUFFIX__VERSION_2_1
 
 #ifdef __GNUC__
 #ifdef CL_USE_DEPRECATED_OPENCL_1_0_APIS
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 02/17] auxiliary: Implement a linker for SPIR-V binaries

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/auxiliary/Makefile.sources |4 +-
 src/gallium/auxiliary/spirv/spirv_linker.c | 1324 
 src/gallium/auxiliary/spirv/spirv_linker.h |   67 ++
 3 files changed, 1394 insertions(+), 1 deletion(-)
 create mode 100644 src/gallium/auxiliary/spirv/spirv_linker.c
 create mode 100644 src/gallium/auxiliary/spirv/spirv_linker.h

diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index f4817742ff..91aac49dfb 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -314,7 +314,9 @@ NIR_SOURCES := \
 
 SPIRV_SOURCES := \
spirv/spirv_utils.c \
-   spirv/spirv_utils.h
+   spirv/spirv_utils.h \
+   spirv/spirv_linker.c \
+   spirv/spirv_linker.h
 
 VL_SOURCES := \
vl/vl_bicubic_filter.c \
diff --git a/src/gallium/auxiliary/spirv/spirv_linker.c 
b/src/gallium/auxiliary/spirv/spirv_linker.c
new file mode 100644
index 00..9d060be0cc
--- /dev/null
+++ b/src/gallium/auxiliary/spirv/spirv_linker.c
@@ -0,0 +1,1324 @@
+/**
+ *
+ * Copyright 2017 Pierre Moreau
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include "spirv_linker.h"
+#include "spirv_utils.h"
+
+#include "compiler/spirv/spirv.h"
+#include "util/u_debug.h"
+#include "util/u_hash_table.h"
+#include "util/u_pointer.h"
+
+#include 
+#include 
+#include 
+
+#define PTR_TO_UINT(x) ((unsigned)pointer_to_uintptr(x))
+#define UINT_TO_PTR(x) (uintptr_to_pointer((uintptr_t)(x)))
+
+/**
+ * Extracts the opcode and the number of words making up this instruction.
+ *
+ * @param binary binary to extract the information from
+ * @param word_id index of the word to extract
+ * @param word_count if not null, will be set to the number of words making up
+ *   the instruction, otherwise will be left untouched
+ * @return the opcode
+ */
+static SpvOp
+spirv_get_opcode(const char *binary, size_t word_offset, unsigned *word_count)
+{
+   const unsigned desc_word = spirv_get_word(binary, word_offset);
+   if (word_count)
+  *word_count = desc_word >> SpvWordCountShift;
+   return (SpvOp) (desc_word & SpvOpCodeMask);
+}
+
+static unsigned
+spirv_spvid_hash(void *id)
+{
+   return PTR_TO_UINT(id);
+}
+
+static int
+spirv_spvid_compare(void *id1, void *id2)
+{
+   return PTR_TO_UINT(id1) != PTR_TO_UINT(id2);
+}
+
+/**
+ * Adds a specified base ID to the ID found at a specified position in the
+ * binary.
+ */
+static void
+spirv_bump_id(char *binary, unsigned word_offset, void *base_id)
+{
+   SpvId old_id = spirv_get_word(binary, word_offset);
+   spirv_set_word(binary, word_offset, PTR_TO_UINT(base_id) + old_id);
+}
+
+/**
+ * Replaces an ID with another one, if found in the link table.
+ */
+static void
+spirv_link_ids(char *binary, unsigned word_offset, void *link_table)
+{
+   SpvId old_id = spirv_get_word(binary, word_offset);
+   void *new_id_ptr = util_hash_table_get((struct util_hash_table *) 
link_table,
+  UINT_TO_PTR(old_id));
+   SpvId new_id = PTR_TO_UINT(new_id_ptr);
+   if (new_id_ptr != NULL)
+  spirv_set_word(binary, word_offset, new_id);
+}
+
+/**
+ * Associates the given variable to its width, if found.
+ */
+static void
+spirv_register_variable(char *binary, unsigned type_offset,
+unsigned variable_offset, struct util_hash_table 
*types,
+struct util_hash_table *variables)
+{
+   SpvId type_id = spirv_get_word(binary, type_offset);
+   SpvId var_id = spirv_get_word(binary, variable_offset);
+   void *width_ptr = util_hash_table_get(types, UINT_TO_PTR(type_id));
+   if (width_ptr != NULL)
+   

[Mesa-dev] [RFC PATCH 03/17] include/pipe: Define SPIRV as an IR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/include/pipe/p_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index ce2cfd1d88..71991383c2 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -850,6 +850,7 @@ enum pipe_shader_ir
PIPE_SHADER_IR_LLVM,
PIPE_SHADER_IR_NATIVE,
PIPE_SHADER_IR_NIR,
+   PIPE_SHADER_IR_SPIRV
 };
 
 /**
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 04/17] include/pipe: Store the byte-size of a SPIR-V binary

[Pierre Moreau]

Besides parsing all the opcodes until reaching the EOF character, there
is no way to compute the size of a SPIR-V binary. Therefore, it is
easier to pass it along the SPIR-V binary in pipe_compute_state.

Signed-off-by: Pierre Moreau 
---
 src/gallium/include/pipe/p_state.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/include/pipe/p_state.h 
b/src/gallium/include/pipe/p_state.h
index ce9ca34d29..1f8fdf530f 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -810,6 +810,7 @@ struct pipe_compute_state
 {
enum pipe_shader_ir ir_type; /**< IR type contained in prog. */
const void *prog; /**< Compute program to be executed. */
+   unsigned prog_num_bytes; /**< Program size in bytes, used by SPIR-V. */
unsigned req_local_mem; /**< Required size of the LOCAL resource. */
unsigned req_private_mem; /**< Required size of the PRIVATE resource. */
unsigned req_input_mem; /**< Required size of the INPUT resource. */
-- 
2.12.2

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Re: [Mesa-dev] [PATCH 2/2] wglgears: fix up wglChoosePixelFormatARB() attribute list

[Neha Bhende]

Looks good to me. For the series,


Reviewed-by: Neha Bhende


Regards,

Neha


From: Brian Paul 
Sent: Wednesday, May 3, 2017 12:49:40 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee; Neha Bhende
Subject: [PATCH 2/2] wglgears: fix up wglChoosePixelFormatARB() attribute list

Specify WGL_DRAW_TO_WINDOW_ARB and WGL_COLOR_BITS_ARB.
Improve some comments, per Charmaine.
---
 src/wgl/wglgears.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/wgl/wglgears.c b/src/wgl/wglgears.c
index 7d43822..d673143 100644
--- a/src/wgl/wglgears.c
+++ b/src/wgl/wglgears.c
@@ -421,11 +421,12 @@ make_window(const char *name, int x, int y, int width, 
int height)
}

if (use_srgb) {
-  /* For sRGB we need to use the wglChoosePixelFormatARB() function,
-   * and then create a new context, window, etc.
+  /* We can't query/use extension functions until after we've
+   * created and bound a rendering context (done above).
*
-   * Note: we can't query/use extension functions until after we've
-   * creatend and bound a rendering context.
+   * We can only set the pixel format of the window once, so we need to
+   * create a new device context in order to use the pixel format returned
+   * from wglChoosePixelFormatARB, and then create a new window.
*/
   PFNWGLCHOOSEPIXELFORMATARBPROC wglChoosePixelFormatARB_func =
  (PFNWGLCHOOSEPIXELFORMATARBPROC)
@@ -434,8 +435,8 @@ make_window(const char *name, int x, int y, int width, int 
height)

   static const int int_attribs[] = {
  WGL_SUPPORT_OPENGL_ARB, TRUE,
- //WGL_COLOR_BITS_ARB, 24,
- //WGL_ALPHA_BITS_ARB, 8,
+ WGL_DRAW_TO_WINDOW_ARB, TRUE,
+ WGL_COLOR_BITS_ARB, 24,  // at least 24-bits of RGB
  WGL_DEPTH_BITS_ARB, 24,
  WGL_DOUBLE_BUFFER_ARB, TRUE,
  WGL_FRAMEBUFFER_SRGB_CAPABLE_ARB, TRUE,
--
1.9.1

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Re: [Mesa-dev] [PATCH 16/22] anv/cmd_buffer: Add transition_color_buffer()

[Jason Ekstrand]

On Thu, Apr 27, 2017 at 11:32 AM, Nanley Chery 
wrote:

> Signed-off-by: Nanley Chery 
> ---
>  src/intel/vulkan/genX_cmd_buffer.c | 93 ++
> 
>  1 file changed, 93 insertions(+)
>
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> b/src/intel/vulkan/genX_cmd_buffer.c
> index d5cc358aec..1ae0c3256e 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -454,6 +454,99 @@ genX(transfer_clear_value)(struct anv_cmd_buffer *
> const cmd_buffer,
> }
>  }
>
> +/* Transitions a color buffer from one layout to another. */
> +static void
> +transition_color_buffer(struct anv_cmd_buffer * const cmd_buffer,
> +const struct anv_image * const image,
> +const uint32_t base_level, uint32_t level_count,
> +const uint32_t base_layer, uint32_t layer_count,
> +const VkImageLayout initial_layout,
> +const VkImageLayout final_layout)
> +{
> +   assert(cmd_buffer && image);
> +
> +   /* This must be a color image. */
> +   assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
> +
> +   /* Only color buffers with CCS need resolving.  */
> +   if (image->aux_surface.isl.size == 0 || image->samples > 1)
> +  return;
> +
> +   /* Don't transition this subresource range if it lacks auxiliary data.
> */
> +   if (base_level >= anv_color_aux_levels(image) ||
> +   base_layer >= anv_color_aux_layers(image, base_level))
> +  return;
> +
> +   /* The undefined layout indicates that the user doesn't care about the
> +* data that's currently in the buffer. The pre-initialized layout is
> +* equivalent to the undefined layout for optimally-tiled images.
> +*
> +* We can only skip the resolve for CCS_E images in this layout
> because it
> +* is enabled outside of render passes. This allows previously
> fast-cleared
> +* and undefined buffers to be defined with transfer operations.
> +*/
> +   const bool is_ccs_e = image->aux_usage == ISL_AUX_USAGE_CCS_E;
> +   const bool undef_layout = initial_layout == VK_IMAGE_LAYOUT_UNDEFINED
> ||
> + initial_layout == VK_IMAGE_LAYOUT_
> PREINITIALIZED;
> +   if (is_ccs_e && undef_layout)
> +  return;
> +
> +   /* A resolve isn't necessary when transitioning from a layout that
> doesn't
> +* have fast-clear data or to a layout that will be aware of the
> fast-clear
> +* value.
> +*/
> +   const bool maybe_fast_cleared = undef_layout || initial_layout ==
> +   VK_IMAGE_LAYOUT_COLOR_
> ATTACHMENT_OPTIMAL;
> +   if (!maybe_fast_cleared || final_layout ==
> +   VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL)
> +  return;
> +
> +   /* Determine the optimal resolve operation. For now we only need to
> resolve
> +* the clear color.
> +*/
> +   const enum blorp_fast_clear_op op = is_ccs_e ?
> +   BLORP_FAST_CLEAR_OP_RESOLVE_PARTIAL
> :
> +   BLORP_FAST_CLEAR_OP_RESOLVE_FULL;
> +
> +   /* The actual range that will be transitioned is limited by the number
> of
> +* subresources that have auxiliary data.
> +*/
> +   level_count = MIN2(level_count, anv_color_aux_levels(image));
> +
> +   /* A write cache flush with an end-of-pipe sync is required between
> +* rendering, clearing, and resolving operations. Perform a flush of
> the
> +* write cache before and after the resolve operation to meet this
> +* requirement.
> +*/
>

anv_blorp.c has a more detailed comment about this.  I think I'd rather we
copy it here so that it doesn't get lost when we delete
ccs_resolve_attachments.

Also, I have no idea whether we need to do it per-fast-clear-op or once
before we do fast-clear ops and once afterwards.  I think this is probably
fine.


> +   cmd_buffer->state.pending_pipe_bits |=
> +  ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT | ANV_PIPE_CS_STALL_BIT;
> +
> +   for (uint32_t level = base_level; level < base_level + level_count;
> level++) {
> +
> +  layer_count = MIN2(layer_count, anv_color_aux_layers(image, level));
> +  for (uint32_t layer = base_layer; layer < base_layer + layer_count;
> layer++) {
> +
> + /* Create a surface state with the right clear color and perform
> the
> +  * resolve.
> +  */
> + struct anv_state surface_state =
> +anv_cmd_buffer_alloc_surface_state(cmd_buffer);
> + anv_fill_ccs_resolve_ss(cmd_buffer->device, surface_state.map,
> image,
> + level, layer);
> + add_image_relocs(cmd_buffer, image, VK_IMAGE_ASPECT_COLOR_BIT,
> +  is_ccs_e ?  ISL_AUX_USAGE_CCS_E :
> ISL_AUX_USAGE_CCS_D,
> +  surface_state);
> + anv_state_flush(cmd_buffer->device, surface_state);
> + 

Re: [Mesa-dev] [PATCH v2 5/7] docs/releasing: added relevant people for build/check with Windows

[Jose Fonseca]

On 03/05/17 19:14, Andres Gomez wrote:

v2: Brian Paul as main contact point and Jose Fonseca as
fallback (Vinson, Jose)

Signed-off-by: Andres Gomez 
Cc: Emil Velikov 
Cc: Vinson Lee 
Cc: Brian Paul 
Cc: Jose Fonseca 
---
 docs/releasing.html | 5 +
 1 file changed, 5 insertions(+)

diff --git a/docs/releasing.html b/docs/releasing.html
index a96479ee56..22ede8dc9e 100644
--- a/docs/releasing.html
+++ b/docs/releasing.html
@@ -136,6 +136,11 @@ Github integration.
 

 
+For Windows related changes, the main contact point is Brian
+Paul. Jose Fonseca can also help as a fallback contact.
+
+
+
 Note: If a patch in the current queue needs any additional
 fix(es), then they should be squashed together.
 



Reviewed-by: Jose Fonseca 
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Re: [Mesa-dev] [PATCH 01/14] radeonsi/gfx9: make some PA & DB registers match the closed Vulkan driver

[Marek Olšák]

Ping

On Fri, Apr 28, 2017 at 11:42 PM, Marek Olšák  wrote:
> From: Marek Olšák 
>
> Cc: 17.1 
> ---
>  src/amd/common/gfx9d.h  |  4 
>  src/gallium/drivers/radeonsi/si_state.c | 21 ++---
>  2 files changed, 22 insertions(+), 3 deletions(-)
>
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[Mesa-dev] [PATCH 1/2] wglinfo: query format bitmap, pbuffer GDI rendering ability

[Brian Paul]

Only reported with -v option for now.
---
 src/wgl/wglinfo.c | 21 +++--
 1 file changed, 19 insertions(+), 2 deletions(-)

diff --git a/src/wgl/wglinfo.c b/src/wgl/wglinfo.c
index f81978b..faccbb1 100644
--- a/src/wgl/wglinfo.c
+++ b/src/wgl/wglinfo.c
@@ -44,6 +44,7 @@
 
 
 static GLboolean have_WGL_ARB_create_context;
+static GLboolean have_WGL_ARB_pbuffer;
 static GLboolean have_WGL_ARB_pixel_format;
 static GLboolean have_WGL_ARB_multisample;
 static GLboolean have_WGL_ARB_framebuffer_sRGB; /* or EXT version */
@@ -61,6 +62,9 @@ struct format_info {
int transparency;
bool floatComponents;
bool srgb;
+   bool draw_to_bitmap;
+   bool draw_to_pbuffer;
+   bool gdi_drawing;
 };
 
 
@@ -167,6 +171,9 @@ print_screen_info(HDC _hdc, const struct options *opts, 
GLboolean coreProfile)
 #if defined(WGL_ARB_extensions_string)
   if (wglGetExtensionsStringARB_func) {
  wglExtensions = wglGetExtensionsStringARB_func(hdc);
+ if (extension_supported("WGL_ARB_pbuffer", wglExtensions)) {
+have_WGL_ARB_pbuffer = GL_TRUE;
+ }
  if (extension_supported("WGL_ARB_pixel_format", wglExtensions)) {
 have_WGL_ARB_pixel_format = GL_TRUE;
  }
@@ -326,10 +333,13 @@ visual_render_type_name(BYTE iPixelType)
 static void
 print_visual_attribs_verbose(int iPixelFormat, const struct format_info *info)
 {
-   printf("Visual ID: %x  generic=%d  native=%d\n",
+   printf("Visual ID: %x generic=%d drawToWindow=%d drawToBitmap=%d 
drawToPBuffer=%d GDI=%d\n",
   iPixelFormat, 
   info->pfd.dwFlags & PFD_GENERIC_FORMAT ? 1 : 0,
-  info->pfd.dwFlags & PFD_DRAW_TO_WINDOW ? 1 : 0);
+  info->pfd.dwFlags & PFD_DRAW_TO_WINDOW ? 1 : 0,
+  info->draw_to_bitmap,
+  info->draw_to_pbuffer,
+  info->gdi_drawing);
printf("bufferSize=%d level=%d renderType=%s doubleBuffer=%d 
stereo=%d\n",
   0 /* info->pfd.bufferSize */, 0 /* info->pfd.level */,
  visual_render_type_name(info->pfd.iPixelType),
@@ -476,6 +486,13 @@ get_format_info(HDC hdc, int pf, struct format_info *info)
   if (get_pf_attrib(hdc, pf, WGL_STEREO_ARB))
  info->pfd.dwFlags |= PFD_STEREO;
 
+  if (get_pf_attrib(hdc, pf, WGL_DRAW_TO_BITMAP_ARB))
+ info->draw_to_bitmap = true;
+  if (have_WGL_ARB_pbuffer && get_pf_attrib(hdc, pf, 
WGL_DRAW_TO_PBUFFER_ARB))
+ info->draw_to_pbuffer = true;
+  if (get_pf_attrib(hdc, pf, WGL_SUPPORT_GDI_ARB))
+ info->gdi_drawing = true;
+
   swapMethod = get_pf_attrib(hdc, pf, WGL_SWAP_METHOD_ARB);
   if (swapMethod == WGL_SWAP_EXCHANGE_ARB)
  info->pfd.dwFlags |= PFD_SWAP_EXCHANGE;
-- 
1.9.1

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[Mesa-dev] [PATCH 2/2] wglgears: fix up wglChoosePixelFormatARB() attribute list

[Brian Paul]

Specify WGL_DRAW_TO_WINDOW_ARB and WGL_COLOR_BITS_ARB.
Improve some comments, per Charmaine.
---
 src/wgl/wglgears.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/wgl/wglgears.c b/src/wgl/wglgears.c
index 7d43822..d673143 100644
--- a/src/wgl/wglgears.c
+++ b/src/wgl/wglgears.c
@@ -421,11 +421,12 @@ make_window(const char *name, int x, int y, int width, 
int height)
}
 
if (use_srgb) {
-  /* For sRGB we need to use the wglChoosePixelFormatARB() function,
-   * and then create a new context, window, etc.
+  /* We can't query/use extension functions until after we've
+   * created and bound a rendering context (done above).
*
-   * Note: we can't query/use extension functions until after we've
-   * creatend and bound a rendering context.
+   * We can only set the pixel format of the window once, so we need to
+   * create a new device context in order to use the pixel format returned
+   * from wglChoosePixelFormatARB, and then create a new window.
*/
   PFNWGLCHOOSEPIXELFORMATARBPROC wglChoosePixelFormatARB_func =
  (PFNWGLCHOOSEPIXELFORMATARBPROC)
@@ -434,8 +435,8 @@ make_window(const char *name, int x, int y, int width, int 
height)
 
   static const int int_attribs[] = {
  WGL_SUPPORT_OPENGL_ARB, TRUE,
- //WGL_COLOR_BITS_ARB, 24,
- //WGL_ALPHA_BITS_ARB, 8,
+ WGL_DRAW_TO_WINDOW_ARB, TRUE,
+ WGL_COLOR_BITS_ARB, 24,  // at least 24-bits of RGB
  WGL_DEPTH_BITS_ARB, 24,
  WGL_DOUBLE_BUFFER_ARB, TRUE,
  WGL_FRAMEBUFFER_SRGB_CAPABLE_ARB, TRUE,
-- 
1.9.1

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Re: [Mesa-dev] [PATCH 16/21] anv: Implement VK_KHX_external_semaphore_fd

[Jason Ekstrand]

On Wed, May 3, 2017 at 12:04 PM, Chad Versace 
wrote:

> On Wed 03 May 2017, Jason Ekstrand wrote:
> > On Tue, May 2, 2017 at 5:15 PM, Chad Versace <[1]
> chadvers...@chromium.org>
> > wrote:
> >
> > On Fri 14 Apr 2017, Jason Ekstrand wrote:
> > > This implementation allocates a 4k BO for each semaphore that can
> be
> > > exported using OPAQUE_FD and uses the kernel's already-existing
> > > synchronization mechanism on BOs.
> > > ---
> > >  src/intel/vulkan/anv_batch_chain.c  |  53 ++--
> > >  src/intel/vulkan/anv_device.c   |   4 +
> > >  src/intel/vulkan/anv_entrypoints_gen.py |   1 +
> > >  src/intel/vulkan/anv_private.h  |  16 +++-
> > >  src/intel/vulkan/anv_queue.c| 141
> > ++--
> > >  5 files changed, 199 insertions(+), 16 deletions(-)
> >
> > [snip]
> >
> > > @@ -513,14 +533,33 @@ VkResult anv_CreateSemaphore(
> > >  VkExternalSemaphoreHandleTypeFlagsKHX handleTypes =
> > >export ? export->handleTypes : 0;
> > >
> > > -   /* External semaphores are not yet supported */
> > > -   assert(handleTypes == 0);
> > > +   if (handleTypes == 0) {
> > > +  /* The DRM execbuffer ioctl always execute in-oder so long
> as you
> > stay
> > > +   * on the same ring.  Since we don't expose the blit engine
> as a
> > DMA
> > > +   * queue, a dummy no-op semaphore is a perfectly valid
> > implementation.
> > > +   */
> > > +  semaphore->permanent.type = ANV_SEMAPHORE_TYPE_DUMMY;
> > > +   } else if (handleTypes & VK_EXTERNAL_SEMAPHORE_HANDLE_
> > TYPE_OPAQUE_FD_BIT_KHX) {
> > > +  assert(handleTypes == VK_EXTERNAL_SEMAPHORE_HANDLE_
> > TYPE_OPAQUE_FD_BIT_KHX);
> > > +
> > > +  semaphore->permanent.type = ANV_SEMAPHORE_TYPE_BO;
> > > +  VkResult result = anv_bo_cache_alloc(device,
> >bo_cache,
> > > +   4096, >[2]
> > permanent.bo);
> > > +  if (result != VK_SUCCESS) {
> > > + vk_free2(>alloc, pAllocator, semaphore);
> > > + return result;
> > > +  }
> > > +
> > > +  /* If we're going to use this as a fence, we need to *not*
> have
> > the
> > > +   * EXEC_OBJECT_ASYNC bit set.
> > > +   */
> > > +  semaphore->permanent.bo->flags &= ~EXEC_OBJECT_ASYNC;
> > > +   } else {
> > > +  assert(!"Unknown handle type");
> > > +  vk_free2(>alloc, pAllocator, semaphore);
> > > +  return vk_error(VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX);
> >
> > The Vulkan 1.0.49 spec does not list
> > VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX as a possible error code for
> > vkCreateSemaphore. The reason is that
> > VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX indicates that an external
> handle
> > does not match the expected handle type. Since vkCreateSemaphore has
> no
> > parameter that's an external handle, it can't return the error.
> > VK_ERROR_INVALID_EXTERNAL_HANDLE_KHX only makes sense for functions
> that
> > import a handle or query the properties of a handle.
> >
> > This 'else' branch is capturing invalid application usage the API.
> Since
> > invalid usages leads to undefined behavior, we could claim that
> Mesa's
> > undefined behavior is to return a helpful error code. But...
> >
> > I much prefer disastrous undefined behavior here instead of helpful
> > undefined behavior. If we return VK_ERROR_INVALID_EXTERNAL_
> HANDLE_KHX,
> > then appsy may accidentally rely on our out-of-spec behavior. It
> would
> > be better to just abort() or, like anvil does in most cases, silently
> > ignore the invalid case and continue blindly ahead.
> >
> >
> > They do get disastrous behavior in debug builds because of the assert.
> In
> > release builds, however, I'm not sure what I think.  I don't know that I
> like
> > the idea of silently continuing because it would most likely give them a
> > perfectly "valid" dummy semaphore and they would get an error much later
> when
> > they try to export from it.  We could abort().  I don't know.  I really
> don't
> > think apps will rely on that error.
>
> After sleeping on this, I also don't know what the best behavior is.
> I still *prefer* that vkCreateSemaphore fail with disaster rather than
> fail with a helpful error code, but I'm no longer *confident* that's the
> right choice.
>
> More below.
>
> > [snip]
>
> > > +static void
> > > +anv_semaphore_impl_cleanup(struct anv_device *device,
> > > +   struct anv_semaphore_impl *impl)
> > > +{
> > > +   switch (impl->type) {
> > > +   case ANV_SEMAPHORE_TYPE_NONE:
> > > +   case ANV_SEMAPHORE_TYPE_DUMMY:
> > > +  /* Dummy.  Nothing to do */
> > > +  break;
> > > +
> > > +   case 

Re: [Mesa-dev] [PATCH 2/3] egl/platform/drm: Don't take display ownership until gbm is initialized

[Eric Anholt]

Adam Jackson  writes:

> If the gbm_create_device() call here actually did fail, any subsequent
> eglTerminate on the display would segfault.

#1 and 2 are:

Reviewed-by: Eric Anholt 


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Re: [Mesa-dev] [PATCH 3/3] egl: Implement EGL_EXT_device_{base, query, enumeration}

[Eric Anholt]

Adam Jackson  writes:

> From: Jonny Lamb 
>
> This is a rebase/squash/rewrite of a series Jonny had sent long ago. The
> major change is implementing this in terms of the drmDevice API. Both
> relevant piglits go from skip to pass on i965.

Just some style notes and one "why are we duplicating this code
badly?".  With those fixed, I think it's past time to merge, so you can
put my r-b on.

I anticipate that the second device type implementation will end up
doing some refactoring, but I'm fine with not building the
infrastructure until we need it.

> Signed-off-by: Adam Jackson 
> ---
>  src/egl/Makefile.sources|   2 +
>  src/egl/drivers/dri2/egl_dri2.c |  64 +
>  src/egl/main/eglapi.c   |  79 
>  src/egl/main/eglapi.h   |   4 +
>  src/egl/main/egldevice.c| 280 
> 
>  src/egl/main/egldevice.h|  74 +++
>  src/egl/main/eglentrypoint.h|  10 ++
>  src/egl/main/eglglobals.c   |  12 +-
>  src/egl/main/eglglobals.h   |   2 +
>  src/egl/main/egltypedefs.h  |   4 +
>  10 files changed, 529 insertions(+), 2 deletions(-)
>  create mode 100644 src/egl/main/egldevice.c
>  create mode 100644 src/egl/main/egldevice.h
>
> diff --git a/src/egl/Makefile.sources b/src/egl/Makefile.sources
> index e6fd3f114c..bd13bfc06a 100644
> --- a/src/egl/Makefile.sources
> +++ b/src/egl/Makefile.sources
> @@ -11,6 +11,8 @@ LIBEGL_C_FILES := \
>   main/eglcurrent.c \
>   main/eglcurrent.h \
>   main/egldefines.h \
> + main/egldevice.c \
> + main/egldevice.h \
>   main/egldisplay.c \
>   main/egldisplay.h \
>   main/egldriver.c \
> diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
> index 91456b025d..717ab0f860 100644
> --- a/src/egl/drivers/dri2/egl_dri2.c
> +++ b/src/egl/drivers/dri2/egl_dri2.c
> @@ -57,6 +57,7 @@
>  
>  #include "egl_dri2.h"
>  #include "loader/loader.h"
> +#include "egldevice.h"
>  #include "util/u_atomic.h"
>  
>  /* The kernel header drm_fourcc.h defines the DRM formats below.  We 
> duplicate
> @@ -2861,6 +2862,67 @@ dri2_interop_export_object(_EGLDisplay *dpy, 
> _EGLContext *ctx,
> return dri2_dpy->interop->export_object(dri2_ctx->dri_context, in, out);
>  }
>  
> +#ifdef HAVE_LIBDRM
> +/* XXX kind of copypasta of drmCompareBusInfo */
> +static int
> +dri2_bus_info_equal(drmDevicePtr a, drmDevicePtr b)
> +{
> +if (a == NULL || b == NULL)
> + return 0;
> +
> +if (a->bustype != b->bustype)
> + return 0;
> +
> +if (a->bustype == DRM_BUS_PCI)
> + return !memcmp(a->businfo.pci, b->businfo.pci, sizeof(drmPciBusInfo));
> +
> +return 0;
> +}
> +#endif

Yeah, this looks like a worse version of drmCompareBusInfo().  Would you
be willing to export it from libdrm, instead?  If not, please re-copy it
to get the usb/platform/host1x bits.

> +static EGLBoolean
> +dri2_query_device_from_display(_EGLDisplay *disp, _EGLDeviceInfo *info,
> +EGLAttrib *value)
> +{
> +EGLBoolean ret = EGL_FALSE;
> +#ifdef HAVE_LIBDRM
> +struct dri2_egl_display *dri2_dpy = disp->DriverData;
> +drmDevicePtr dev;
> +int i;
> +
> +if (dri2_dpy->fd == -1) {
> + *value = (EGLAttrib) info; /* a dummy value is fine */
> + return EGL_TRUE;
> +}
> +
> +if (drmGetDevice(dri2_dpy->fd, ) < 0)
> + return ret;
> +
> +/* loop over _EGLDisplayInfo to find a match */
> +for (i = 0; i < info->num_drm_devices; i++) {
> + if (dri2_bus_info_equal(dev, info->drm_devices[i])) {
> + *value = (EGLAttrib) info->drm_devices[i];
> + ret = EGL_TRUE;
> + break;
> + }
> +}
> +
> +drmFreeDevice();
> +#endif
> +return ret;
> +}
> +
> +static const char *
> +dri2_query_device_name(_EGLDisplay *disp)
> +{
> +   struct dri2_egl_display *dri2_dpy = disp->DriverData;
> +
> +   if (dri2_dpy->fd == -1)
> +  return dri2_dpy->driver_name;
> +
> +   return loader_get_device_name_for_fd(dri2_dpy->fd);
> +}
> +
>  static void
>  dri2_unload(_EGLDriver *drv)
>  {
> @@ -2985,6 +3047,8 @@ _eglBuiltInDriverDRI2(const char *args)
> dri2_drv->base.API.GLInteropQueryDeviceInfo = 
> dri2_interop_query_device_info;
> dri2_drv->base.API.GLInteropExportObject = dri2_interop_export_object;
> dri2_drv->base.API.DupNativeFenceFDANDROID = dri2_dup_native_fence_fd;
> +   dri2_drv->base.API.QueryDeviceFromDisplay = 
> dri2_query_device_from_display;
> +   dri2_drv->base.API.QueryDeviceName = dri2_query_device_name;
>  
> dri2_drv->base.Name = "DRI2";
> dri2_drv->base.Unload = dri2_unload;
> diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
> index fc243a58e8..2f323e9fd4 100644
> --- a/src/egl/main/eglapi.c
> +++ b/src/egl/main/eglapi.c
> @@ -93,6 +93,7 @@
>  
>  #include "eglglobals.h"
>  #include "eglcontext.h"
> +#include "egldevice.h"
>  #include "egldisplay.h"
>  #include 

[Mesa-dev] [PATCH v2 13/14] Android: Add LLVM support for Android O

[Rob Herring]

Android O moves to LLVM 3.9 and also has some differences in header
dependencies as LLVM has moved to blueprint files. It seems libLLVMCore
was only needed for header dependencies, so we can drop that for O.

Signed-off-by: Rob Herring 
---
 Android.mk | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Android.mk b/Android.mk
index 600b37a52e62..ab6bf6adbd48 100644
--- a/Android.mk
+++ b/Android.mk
@@ -92,7 +92,10 @@ define mesa-build-with-llvm
   $(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
 $(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
 $(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
-$(eval LOCAL_C_INCLUDES += external/llvm/include 
external/llvm/device/include),)
+$(eval LOCAL_C_INCLUDES += external/llvm/include 
external/llvm/device/include),) \
+  $(if $(filter O,$(MESA_ANDROID_MAJOR_VERSION)), \
+$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0309 -DMESA_LLVM_VERSION_PATCH=0) \
+$(eval LOCAL_HEADER_LIBRARIES += llvm-headers),)
 endef
 
 # add subdirectories
-- 
2.11.0

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[Mesa-dev] [PATCH v2 14/14] Android: Drop linking libgcc

[Rob Herring]

Including libgcc breaks on Android O (master). This doesn't appear to be
needed any more as both Android M and N have also been built w/o libgcc.

Signed-off-by: Rob Herring 
Reviewed-by: Chih-Wei Huang 
---
 src/gallium/targets/dri/Android.mk | 4 
 1 file changed, 4 deletions(-)

diff --git a/src/gallium/targets/dri/Android.mk 
b/src/gallium/targets/dri/Android.mk
index a605f1f5f019..f72551c51cbf 100644
--- a/src/gallium/targets/dri/Android.mk
+++ b/src/gallium/targets/dri/Android.mk
@@ -57,9 +57,5 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
 # sort GALLIUM_SHARED_LIBS to remove any duplicates
 LOCAL_SHARED_LIBRARIES += $(sort $(GALLIUM_SHARED_LIBS))
 
-ifeq ($(MESA_ENABLE_LLVM),true)
-LOCAL_LDLIBS += -lgcc
-endif
-
 include $(GALLIUM_COMMON_MK)
 include $(BUILD_SHARED_LIBRARY)
-- 
2.11.0

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[Mesa-dev] [PATCH v2 12/14] Android: rework LLVM build support

[Rob Herring]

Currently, building with "mmma external/mesa3d" which builds all targets
and dependencies is broken for targets that require LLVM. This is due to
the build settings depending on MESA_ENABLE_LLVM. Instead of using a
conditional in the global Android.common.mk, make all the components that
need LLVM explicitly include the necessary build settings.

GALLIVM_CPP_SOURCES doesn't exist anymore, so remove that as well.

Signed-off-by: Rob Herring 
---
 Android.common.mk|  9 -
 Android.mk   | 13 +
 src/amd/Android.common.mk|  3 ++-
 src/gallium/Android.common.mk|  6 --
 src/gallium/auxiliary/Android.mk |  8 
 src/gallium/drivers/radeon/Android.mk|  7 ---
 src/gallium/drivers/radeonsi/Android.mk  |  2 ++
 src/gallium/winsys/amdgpu/drm/Android.mk |  2 ++
 8 files changed, 27 insertions(+), 23 deletions(-)

diff --git a/Android.common.mk b/Android.common.mk
index a7b78bb910fc..5d70ea6f2c07 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -83,15 +83,6 @@ LOCAL_CFLAGS += \
 endif
 endif
 
-ifeq ($(MESA_ENABLE_LLVM),true)
-  ifeq ($(MESA_ANDROID_MAJOR_VERSION),6)
-LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0
-  endif
-  ifeq ($(MESA_ANDROID_MAJOR_VERSION),7)
-LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0
-  endif
-endif
-
 ifneq ($(LOCAL_IS_HOST_MODULE),true)
 # add libdrm if there are hardware drivers
 LOCAL_CFLAGS += -DHAVE_LIBDRM
diff --git a/Android.mk b/Android.mk
index e2d792d8e4c4..600b37a52e62 100644
--- a/Android.mk
+++ b/Android.mk
@@ -82,6 +82,19 @@ ifneq ($(filter true, $(HAVE_GALLIUM_RADEONSI)),)
 MESA_ENABLE_LLVM := true
 endif
 
+define mesa-build-with-llvm
+  $(if $(filter $(MESA_ANDROID_MAJOR_VERSION), 4 5), \
+$(warning Unsupported LLVM version in Android 
$(MESA_ANDROID_MAJOR_VERSION)),) \
+  $(if $(filter 6,$(MESA_ANDROID_MAJOR_VERSION)), \
+$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0) \
+$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
+$(eval LOCAL_C_INCLUDES += external/llvm/include 
external/llvm/device/include),) \
+  $(if $(filter 7,$(MESA_ANDROID_MAJOR_VERSION)), \
+$(eval LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0) \
+$(eval LOCAL_STATIC_LIBRARIES += libLLVMCore) \
+$(eval LOCAL_C_INCLUDES += external/llvm/include 
external/llvm/device/include),)
+endef
+
 # add subdirectories
 SUBDIRS := \
src/gbm \
diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index 18ace02b90c1..62d4df15118a 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -61,11 +61,12 @@ LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(LOCAL_PATH)/common
 
 LOCAL_STATIC_LIBRARIES := \
-   libLLVMCore \
libmesa_nir
 
 LOCAL_WHOLE_STATIC_LIBRARIES := \
libelf
 
+$(call mesa-build-with-llvm)
+
 include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/Android.common.mk b/src/gallium/Android.common.mk
index b2eb95bcd646..782510ff0f47 100644
--- a/src/gallium/Android.common.mk
+++ b/src/gallium/Android.common.mk
@@ -29,10 +29,4 @@ LOCAL_C_INCLUDES += \
$(GALLIUM_TOP)/winsys \
$(GALLIUM_TOP)/drivers
 
-ifeq ($(MESA_ENABLE_LLVM),true)
-LOCAL_C_INCLUDES += \
-   external/llvm/include \
-   external/llvm/device/include
-endif
-
 include $(MESA_COMMON_MK)
diff --git a/src/gallium/auxiliary/Android.mk b/src/gallium/auxiliary/Android.mk
index e8628e43744a..10a5f474b3bf 100644
--- a/src/gallium/auxiliary/Android.mk
+++ b/src/gallium/auxiliary/Android.mk
@@ -38,12 +38,12 @@ LOCAL_C_INCLUDES := \
 
 ifeq ($(MESA_ENABLE_LLVM),true)
 LOCAL_SRC_FILES += \
-   $(GALLIVM_SOURCES) \
-   $(GALLIVM_CPP_SOURCES)
-LOCAL_STATIC_LIBRARIES += libLLVMCore
-LOCAL_CPPFLAGS := -std=c++11
+   $(GALLIVM_SOURCES)
+$(call mesa-build-with-llvm)
 endif
 
+LOCAL_CPPFLAGS += -std=c++11
+
 # We need libmesa_nir to get NIR's generated include directories.
 LOCAL_MODULE := libmesa_gallium
 LOCAL_STATIC_LIBRARIES += libmesa_nir
diff --git a/src/gallium/drivers/radeon/Android.mk 
b/src/gallium/drivers/radeon/Android.mk
index 64815f6f0847..eb1a32182bb0 100644
--- a/src/gallium/drivers/radeon/Android.mk
+++ b/src/gallium/drivers/radeon/Android.mk
@@ -30,13 +30,14 @@ include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := $(C_SOURCES)
 
+LOCAL_SHARED_LIBRARIES := libdrm_radeon libLLVM
+LOCAL_MODULE := libmesa_pipe_radeon
+
 ifeq ($(MESA_ENABLE_LLVM),true)
 LOCAL_CFLAGS += -DFORCE_BUILD_AMDGPU   # instructs LLVM to declare 
LLVMInitializeAMDGPU* functions
+$(call mesa-build-with-llvm)
 endif
 
-LOCAL_SHARED_LIBRARIES := libdrm_radeon libLLVM
-LOCAL_MODULE := libmesa_pipe_radeon
-
 include $(GALLIUM_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
 
diff --git a/src/gallium/drivers/radeonsi/Android.mk 
b/src/gallium/drivers/radeonsi/Android.mk
index cd768751518c..5676c55983fc 100644
--- 

[Mesa-dev] [PATCH v2 11/14] Android: rework libelf dependencies

[Rob Herring]

Add libelf as a library dependency rather than explicitly listing its
include paths. This should work for Android M and later which have the
necessary exported directories in libelf.

Signed-off-by: Rob Herring 
---
 Android.common.mk  | 2 --
 src/amd/Android.common.mk  | 6 --
 src/gallium/Android.common.mk  | 3 +--
 src/gallium/targets/dri/Android.mk | 3 ---
 4 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/Android.common.mk b/Android.common.mk
index 2cd4c1eef4bb..a7b78bb910fc 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -86,11 +86,9 @@ endif
 ifeq ($(MESA_ENABLE_LLVM),true)
   ifeq ($(MESA_ANDROID_MAJOR_VERSION),6)
 LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0
-ELF_INCLUDES := external/elfutils/src/libelf
   endif
   ifeq ($(MESA_ANDROID_MAJOR_VERSION),7)
 LOCAL_CFLAGS += -DHAVE_LLVM=0x0308 -DMESA_LLVM_VERSION_PATCH=0
-ELF_INCLUDES := external/elfutils/libelf
   endif
 endif
 
diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index a6c0deb2d726..18ace02b90c1 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -55,8 +55,7 @@ LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/gallium/auxiliary \
$(intermediates)/common \
external/llvm/include \
-   external/llvm/device/include \
-   $(ELF_INCLUDES)
+   external/llvm/device/include
 
 LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(LOCAL_PATH)/common
@@ -65,5 +64,8 @@ LOCAL_STATIC_LIBRARIES := \
libLLVMCore \
libmesa_nir
 
+LOCAL_WHOLE_STATIC_LIBRARIES := \
+   libelf
+
 include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/Android.common.mk b/src/gallium/Android.common.mk
index ff4c30dabd6e..b2eb95bcd646 100644
--- a/src/gallium/Android.common.mk
+++ b/src/gallium/Android.common.mk
@@ -32,8 +32,7 @@ LOCAL_C_INCLUDES += \
 ifeq ($(MESA_ENABLE_LLVM),true)
 LOCAL_C_INCLUDES += \
external/llvm/include \
-   external/llvm/device/include \
-   $(ELF_INCLUDES)
+   external/llvm/device/include
 endif
 
 include $(MESA_COMMON_MK)
diff --git a/src/gallium/targets/dri/Android.mk 
b/src/gallium/targets/dri/Android.mk
index e95e24a23177..a605f1f5f019 100644
--- a/src/gallium/targets/dri/Android.mk
+++ b/src/gallium/targets/dri/Android.mk
@@ -57,10 +57,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
 # sort GALLIUM_SHARED_LIBS to remove any duplicates
 LOCAL_SHARED_LIBRARIES += $(sort $(GALLIUM_SHARED_LIBS))
 
-LOCAL_STATIC_LIBRARIES :=
-
 ifeq ($(MESA_ENABLE_LLVM),true)
-LOCAL_STATIC_LIBRARIES += libelf
 LOCAL_LDLIBS += -lgcc
 endif
 
-- 
2.11.0

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[Mesa-dev] [PATCH v2 08/14] Android: push driver build details to driver makefiles

[Rob Herring]

src/gallium/targets/dri/Android.mk contains lots of conditional for
individual drivers. Let's move these details into the individual driver
makefiles.

In the process, align the make driver conditionals with automake
(i.e. HAVE_GALLIUM_*).

Signed-off-by: Rob Herring 
---
 Android.mk| 50 +-
 src/egl/Android.mk| 18 +-
 src/gallium/Android.mk| 13 ---
 src/gallium/drivers/freedreno/Android.mk  |  5 +++
 src/gallium/drivers/i915/Android.mk   |  4 +++
 src/gallium/drivers/nouveau/Android.mk|  5 +++
 src/gallium/drivers/r300/Android.mk   |  4 +++
 src/gallium/drivers/r600/Android.mk   |  9 +
 src/gallium/drivers/radeon/Android.mk |  7 +++-
 src/gallium/drivers/radeonsi/Android.mk   | 13 ++-
 src/gallium/drivers/softpipe/Android.mk   |  4 +++
 src/gallium/drivers/svga/Android.mk   |  4 +++
 src/gallium/drivers/vc4/Android.mk|  4 +++
 src/gallium/drivers/virgl/Android.mk  |  4 +++
 src/gallium/state_trackers/dri/Android.mk |  2 +-
 src/gallium/targets/dri/Android.mk| 60 ---
 src/gallium/winsys/amdgpu/drm/Android.mk  |  5 +++
 src/gallium/winsys/i915/drm/Android.mk|  4 +++
 18 files changed, 121 insertions(+), 94 deletions(-)

diff --git a/Android.mk b/Android.mk
index 08daf770f26b..71140df02c63 100644
--- a/Android.mk
+++ b/Android.mk
@@ -40,19 +40,31 @@ MESA_DRI_MODULE_UNSTRIPPED_PATH := 
$(TARGET_OUT_SHARED_LIBRARIES_UNSTRIPPED)/$(M
 MESA_COMMON_MK := $(MESA_TOP)/Android.common.mk
 MESA_PYTHON2 := python
 
-classic_drivers := i915 i965
-gallium_drivers := swrast freedreno i915g nouveau r300g r600g radeonsi vmwgfx 
vc4 virgl
+# Lists to convert driver names to boolean variables
+# in form of .
+classic_drivers := i915.HAVE_I915_DRI i965.HAVE_I965_DRI
+gallium_drivers := \
+   swrast.HAVE_GALLIUM_SOFTPIPE \
+   freedreno.HAVE_GALLIUM_FREEDRENO \
+   i915g.HAVE_GALLIUM_I915 \
+   nouveau.HAVE_GALLIUM_NOUVEAU \
+   r300g.HAVE_GALLIUM_R300 \
+   r600g.HAVE_GALLIUM_R600 \
+   radeonsi.HAVE_GALLIUM_RADEONSI \
+   vmwgfx.HAVE_GALLIUM_VMWGFX \
+   vc4.HAVE_GALLIUM_VC4 \
+   virgl.HAVE_GALLIUM_VIRGL
 
-MESA_GPU_DRIVERS := $(strip $(BOARD_GPU_DRIVERS))
-
-# warn about invalid drivers
-invalid_drivers := $(filter-out \
-   $(classic_drivers) $(gallium_drivers), $(MESA_GPU_DRIVERS))
-ifneq ($(invalid_drivers),)
-$(warning invalid GPU drivers: $(invalid_drivers))
-# tidy up
-MESA_GPU_DRIVERS := $(filter-out $(invalid_drivers), $(MESA_GPU_DRIVERS))
-endif
+# Warn if we have any invalid driver names
+$(foreach d, $(BOARD_GPU_DRIVERS), \
+   $(if $(findstring $(d).,$(classic_drivers) $(gallium_drivers)), \
+   , \
+   $(warning invalid GPU driver: $(d)) \
+   ) \
+)
+MESA_BUILD_CLASSIC := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst 
$(d).%,%, $(filter $(d).%, $(classic_drivers)
+MESA_BUILD_GALLIUM := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst 
$(d).%,%, $(filter $(d).%, $(gallium_drivers)
+$(foreach d, $(MESA_BUILD_CLASSIC) $(MESA_BUILD_GALLIUM), $(eval $(d) := true))
 
 # host and target must be the same arch to generate matypes.h
 ifeq ($(TARGET_ARCH),$(HOST_ARCH))
@@ -61,20 +73,10 @@ else
 MESA_ENABLE_ASM := false
 endif
 
-ifneq ($(filter $(classic_drivers), $(MESA_GPU_DRIVERS)),)
-MESA_BUILD_CLASSIC := true
-else
-MESA_BUILD_CLASSIC := false
+ifneq ($(filter true, $(HAVE_GALLIUM_RADEONSI)),)
+MESA_ENABLE_LLVM := true
 endif
 
-ifneq ($(filter $(gallium_drivers), $(MESA_GPU_DRIVERS)),)
-MESA_BUILD_GALLIUM := true
-else
-MESA_BUILD_GALLIUM := false
-endif
-
-MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false)
-
 # add subdirectories
 SUBDIRS := \
src/gbm \
diff --git a/src/egl/Android.mk b/src/egl/Android.mk
index 8bbd4605cdca..5fc37e1709d5 100644
--- a/src/egl/Android.mk
+++ b/src/egl/Android.mk
@@ -57,16 +57,16 @@ LOCAL_SHARED_LIBRARIES := \
libcutils \
libsync
 
-ifeq ($(strip $(MESA_BUILD_CLASSIC)),true)
-# require i915_dri and/or i965_dri
-LOCAL_REQUIRED_MODULES += \
-   $(addsuffix _dri, $(filter i915 i965, $(MESA_GPU_DRIVERS)))
-endif # MESA_BUILD_CLASSIC
-
-ifeq ($(strip $(MESA_BUILD_GALLIUM)),true)
+# This controls enabling building of driver libraries
+ifneq ($(HAVE_I915_DRI),)
+LOCAL_REQUIRED_MODULES += i915_dri
+endif
+ifneq ($(HAVE_I965_DRI),)
+LOCAL_REQUIRED_MODULES += i965_dri
+endif
+ifneq ($(MESA_BUILD_GALLIUM),)
 LOCAL_REQUIRED_MODULES += gallium_dri
-endif # MESA_BUILD_GALLIUM
-
+endif
 
 LOCAL_MODULE := libGLES_mesa
 LOCAL_MODULE_RELATIVE_PATH := egl
diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk
index 7c6bda68d59f..3473641b4934 100644
--- a/src/gallium/Android.mk
+++ b/src/gallium/Android.mk
@@ -37,12 +37,17 @@ SUBDIRS += winsys/sw/dri drivers/softpipe
 SUBDIRS += winsys/freedreno/drm drivers/freedreno
 SUBDIRS += 

[Mesa-dev] [PATCH v2 09/14] Android: Add driver "all" option to enable all drivers

[Rob Herring]

Add a driver string "all" so that if BOARD_GPU_DRIVERS is set to "all",
all the drivers are enabled in the build. This makes build testing all
drivers easier to maintain.

Signed-off-by: Rob Herring 
---
 Android.mk | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Android.mk b/Android.mk
index 71140df02c63..e2d792d8e4c4 100644
--- a/Android.mk
+++ b/Android.mk
@@ -55,6 +55,10 @@ gallium_drivers := \
vc4.HAVE_GALLIUM_VC4 \
virgl.HAVE_GALLIUM_VIRGL
 
+ifeq ($(BOARD_GPU_DRIVERS),all)
+MESA_BUILD_CLASSIC := $(filter HAVE_%, $(subst ., , $(classic_drivers)))
+MESA_BUILD_GALLIUM := $(filter HAVE_%, $(subst ., , $(gallium_drivers)))
+else
 # Warn if we have any invalid driver names
 $(foreach d, $(BOARD_GPU_DRIVERS), \
$(if $(findstring $(d).,$(classic_drivers) $(gallium_drivers)), \
@@ -64,6 +68,7 @@ $(foreach d, $(BOARD_GPU_DRIVERS), \
 )
 MESA_BUILD_CLASSIC := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst 
$(d).%,%, $(filter $(d).%, $(classic_drivers)
 MESA_BUILD_GALLIUM := $(strip $(foreach d, $(BOARD_GPU_DRIVERS), $(patsubst 
$(d).%,%, $(filter $(d).%, $(gallium_drivers)
+endif
 $(foreach d, $(MESA_BUILD_CLASSIC) $(MESA_BUILD_GALLIUM), $(eval $(d) := true))
 
 # host and target must be the same arch to generate matypes.h
-- 
2.11.0

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[Mesa-dev] [PATCH v2 10/14] Android: drop LLVM support on Lollipop

[Rob Herring]

Mesa no longer supports LLVM 3.5 for any targets we support.
Android-x86 adds support for llvmpipe which could work, but android-x86
for L is using mesa 11.0 anyway.

Dropping this support enables clean-up of libelf dependencies.

Signed-off-by: Rob Herring 
Reviewed-by: Chih-Wei Huang 
---
 Android.common.mk | 4 
 1 file changed, 4 deletions(-)

diff --git a/Android.common.mk b/Android.common.mk
index c9ec9ca66990..2cd4c1eef4bb 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -84,10 +84,6 @@ endif
 endif
 
 ifeq ($(MESA_ENABLE_LLVM),true)
-  ifeq ($(MESA_ANDROID_MAJOR_VERSION),5)
-LOCAL_CFLAGS += -DHAVE_LLVM=0x0305 -DMESA_LLVM_VERSION_PATCH=2
-ELF_INCLUDES := external/elfutils/0.153/libelf
-  endif
   ifeq ($(MESA_ANDROID_MAJOR_VERSION),6)
 LOCAL_CFLAGS += -DHAVE_LLVM=0x0307 -DMESA_LLVM_VERSION_PATCH=0
 ELF_INCLUDES := external/elfutils/src/libelf
-- 
2.11.0

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[Mesa-dev] [PATCH v2 07/14] Android: remove needless conditional including of child makefiles

[Rob Herring]

It is not necessary to filter driver and winsys directories based on the
list of enabled drivers. Selecting the included driver libraries or not is
sufficient to control what is built.

Signed-off-by: Rob Herring 
Reviewed-by: Chih-Wei Huang 
---
 Android.mk  |  8 --
 src/gallium/Android.mk  | 52 +++--
 src/mesa/Android.libmesa_dricore.mk |  4 ---
 src/mesa/Android.libmesa_st_mesa.mk |  4 ---
 src/mesa/drivers/dri/Android.mk | 11 +---
 5 files changed, 4 insertions(+), 75 deletions(-)

diff --git a/Android.mk b/Android.mk
index fdbf22fe643a..08daf770f26b 100644
--- a/Android.mk
+++ b/Android.mk
@@ -76,8 +76,6 @@ endif
 MESA_ENABLE_LLVM := $(if $(filter radeonsi,$(MESA_GPU_DRIVERS)),true,false)
 
 # add subdirectories
-ifneq ($(strip $(MESA_GPU_DRIVERS)),)
-
 SUBDIRS := \
src/gbm \
src/loader \
@@ -92,11 +90,5 @@ SUBDIRS := \
src/vulkan
 
 INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS))
-
-ifeq ($(strip $(MESA_BUILD_GALLIUM)),true)
 INC_DIRS += $(call all-named-subdir-makefiles,src/gallium)
-endif
-
 include $(INC_DIRS)
-
-endif
diff --git a/src/gallium/Android.mk b/src/gallium/Android.mk
index e67cfab5b316..7c6bda68d59f 100644
--- a/src/gallium/Android.mk
+++ b/src/gallium/Android.mk
@@ -33,62 +33,16 @@ SUBDIRS += auxiliary/pipe-loader
 # Gallium drivers and their respective winsys
 #
 
-# swrast
-ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),)
 SUBDIRS += winsys/sw/dri drivers/softpipe
-endif
-
-# freedreno
-ifneq ($(filter freedreno, $(MESA_GPU_DRIVERS)),)
 SUBDIRS += winsys/freedreno/drm drivers/freedreno
-endif
-
-# i915g
-ifneq ($(filter i915g, $(MESA_GPU_DRIVERS)),)
 SUBDIRS += winsys/i915/drm drivers/i915
-endif
-
-# nouveau
-ifneq ($(filter nouveau, $(MESA_GPU_DRIVERS)),)
-SUBDIRS += \
-   winsys/nouveau/drm \
-   drivers/nouveau
-endif
-
-# r300g/r600g/radeonsi
-ifneq ($(filter r300g r600g radeonsi, $(MESA_GPU_DRIVERS)),)
-SUBDIRS += winsys/radeon/drm
-ifneq ($(filter r300g, $(MESA_GPU_DRIVERS)),)
-SUBDIRS += drivers/r300
-endif
-ifneq ($(filter r600g radeonsi, $(MESA_GPU_DRIVERS)),)
-SUBDIRS += drivers/radeon
-ifneq ($(filter r600g, $(MESA_GPU_DRIVERS)),)
-SUBDIRS += drivers/r600
-endif
-ifneq ($(filter radeonsi, $(MESA_GPU_DRIVERS)),)
-SUBDIRS += drivers/radeonsi
-SUBDIRS += winsys/amdgpu/drm
-endif
-endif
-endif
-
-# vc4
-ifneq ($(filter vc4, $(MESA_GPU_DRIVERS)),)
+SUBDIRS += winsys/nouveau/drm drivers/nouveau
+SUBDIRS += drivers/r300 drivers/r600 drivers/radeon drivers/radeonsi
+SUBDIRS += winsys/amdgpu/drm winsys/radeon/drm
 SUBDIRS += winsys/vc4/drm drivers/vc4
-endif
-
-# virgl
-ifneq ($(filter virgl, $(MESA_GPU_DRIVERS)),)
 SUBDIRS += winsys/virgl/drm winsys/virgl/vtest drivers/virgl
-endif
-
-# vmwgfx
-ifneq ($(filter vmwgfx, $(MESA_GPU_DRIVERS)),)
 SUBDIRS += winsys/svga/drm drivers/svga
-endif
 
-# Gallium state trackers and target for dri
 SUBDIRS += state_trackers/dri targets/dri
 
 include $(call all-named-subdir-makefiles,$(SUBDIRS))
diff --git a/src/mesa/Android.libmesa_dricore.mk 
b/src/mesa/Android.libmesa_dricore.mk
index 86196ceb36ab..599b9ccd71ed 100644
--- a/src/mesa/Android.libmesa_dricore.mk
+++ b/src/mesa/Android.libmesa_dricore.mk
@@ -24,8 +24,6 @@
 # libmesa_dricore.a
 # --
 
-ifeq ($(strip $(MESA_BUILD_CLASSIC)),true)
-
 LOCAL_PATH := $(call my-dir)
 
 # Import the following variables:
@@ -72,5 +70,3 @@ LOCAL_WHOLE_STATIC_LIBRARIES += \
 include $(LOCAL_PATH)/Android.gen.mk
 include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
-
-endif # MESA_BUILD_CLASSIC
diff --git a/src/mesa/Android.libmesa_st_mesa.mk 
b/src/mesa/Android.libmesa_st_mesa.mk
index 92df4ad2845b..de2a60a70ed9 100644
--- a/src/mesa/Android.libmesa_st_mesa.mk
+++ b/src/mesa/Android.libmesa_st_mesa.mk
@@ -24,8 +24,6 @@
 # libmesa_st_mesa.a
 # --
 
-ifeq ($(strip $(MESA_BUILD_GALLIUM)),true)
-
 LOCAL_PATH := $(call my-dir)
 
 # Import variables:
@@ -72,5 +70,3 @@ LOCAL_STATIC_LIBRARIES += libmesa_nir libmesa_glsl
 include $(LOCAL_PATH)/Android.gen.mk
 include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
-
-endif # MESA_BUILD_GALLIUM
diff --git a/src/mesa/drivers/dri/Android.mk b/src/mesa/drivers/dri/Android.mk
index 72a5593fefad..d4fb670f84ce 100644
--- a/src/mesa/drivers/dri/Android.mk
+++ b/src/mesa/drivers/dri/Android.mk
@@ -56,14 +56,5 @@ MESA_DRI_SHARED_LIBRARIES := \
 #---
 # Build drivers and libmesa_dri_common
 
-SUBDIRS := common
-
-ifneq ($(filter i915, $(MESA_GPU_DRIVERS)),)
-   SUBDIRS += i915
-endif
-
-ifneq ($(filter i965, $(MESA_GPU_DRIVERS)),)
-   SUBDIRS += i965
-endif
-
+SUBDIRS := common i915 i965
 include $(foreach d, $(SUBDIRS), $(LOCAL_PATH)/$(d)/Android.mk)
-- 
2.11.0

___
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[Mesa-dev] [PATCH v2 05/14] Android: amd/common: fix dependency on libmesa_nir

[Rob Herring]

Building libmesa_amd_common fails with:

external/mesa/src/amd/common/ac_shader_info.c:23:10: fatal error: 'nir/nir.h' 
file not found
 ^

external/mesa/src/compiler/nir/nir.h:48:10: fatal error: 'nir_opcodes.h' file 
not found
 ^

libmesa_amd_common now depends on libmesa_nir, so add it as a dependency
and export the necessary directories.

Fixes: 224cf29 "radv/ac: add initial pre-pass for shader info gathering"
Signed-off-by: Rob Herring 
Reviewed-by: Chih-Wei Huang 
---
 src/amd/Android.common.mk   | 4 +++-
 src/compiler/Android.nir.gen.mk | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index a770aca65005..a6c0deb2d726 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -61,7 +61,9 @@ LOCAL_C_INCLUDES := \
 LOCAL_EXPORT_C_INCLUDE_DIRS := \
$(LOCAL_PATH)/common
 
-LOCAL_STATIC_LIBRARIES := libLLVMCore
+LOCAL_STATIC_LIBRARIES := \
+   libLLVMCore \
+   libmesa_nir
 
 include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
diff --git a/src/compiler/Android.nir.gen.mk b/src/compiler/Android.nir.gen.mk
index 96fc750ec646..908875d7eb56 100644
--- a/src/compiler/Android.nir.gen.mk
+++ b/src/compiler/Android.nir.gen.mk
@@ -37,6 +37,7 @@ LOCAL_C_INCLUDES += \
 
 LOCAL_EXPORT_C_INCLUDE_DIRS += \
$(intermediates)/nir \
+   $(MESA_TOP)/src/compiler \
$(MESA_TOP)/src/compiler/nir
 
 LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
-- 
2.11.0

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[Mesa-dev] [PATCH v2 06/14] Android: Fix swrast only build

[Rob Herring]

A build of only swrast is broken as the Android EGL now depends on
libdrm as does GBM. While we could make EGL conditionally depend on
libdrm, we probably want to enable kms_dri winsys as well and that will
need libdrm enabled. So just always enable libdrm and simplify the
Android makefiles a bit.

Signed-off-by: Rob Herring 
Reviewed-by: Chih-Wei Huang 
---
 Android.common.mk| 2 --
 src/gallium/auxiliary/pipe-loader/Android.mk | 7 +++
 src/gallium/state_trackers/dri/Android.mk| 8 +++-
 3 files changed, 6 insertions(+), 11 deletions(-)

diff --git a/Android.common.mk b/Android.common.mk
index ba3d1203ac11..c9ec9ca66990 100644
--- a/Android.common.mk
+++ b/Android.common.mk
@@ -100,11 +100,9 @@ endif
 
 ifneq ($(LOCAL_IS_HOST_MODULE),true)
 # add libdrm if there are hardware drivers
-ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),)
 LOCAL_CFLAGS += -DHAVE_LIBDRM
 LOCAL_SHARED_LIBRARIES += libdrm
 endif
-endif
 
 LOCAL_CFLAGS_32 += 
-DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\"
 LOCAL_CFLAGS_64 += 
-DDEFAULT_DRIVER_DIR=\"/system/lib64/$(MESA_DRI_MODULE_REL_PATH)\"
diff --git a/src/gallium/auxiliary/pipe-loader/Android.mk 
b/src/gallium/auxiliary/pipe-loader/Android.mk
index 006bb0ebfd9f..1e1bb11153fc 100644
--- a/src/gallium/auxiliary/pipe-loader/Android.mk
+++ b/src/gallium/auxiliary/pipe-loader/Android.mk
@@ -33,14 +33,13 @@ LOCAL_CFLAGS := \
-DDROP_PIPE_LOADER_MISC \
-DGALLIUM_STATIC_TARGETS
 
-LOCAL_SRC_FILES := $(COMMON_SOURCES)
+LOCAL_SRC_FILES := \
+   $(COMMON_SOURCES) \
+   $(DRM_SOURCES)
 
 LOCAL_MODULE := libmesa_pipe_loader
 
-ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),)
-LOCAL_SRC_FILES += $(DRM_SOURCES)
 LOCAL_STATIC_LIBRARIES := libmesa_loader
-endif
 
 include $(GALLIUM_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/state_trackers/dri/Android.mk 
b/src/gallium/state_trackers/dri/Android.mk
index fd322a313832..97cf9376e199 100644
--- a/src/gallium/state_trackers/dri/Android.mk
+++ b/src/gallium/state_trackers/dri/Android.mk
@@ -27,7 +27,9 @@ include $(LOCAL_PATH)/Makefile.sources
 
 include $(CLEAR_VARS)
 
-LOCAL_SRC_FILES := $(common_SOURCES)
+LOCAL_SRC_FILES := \
+   $(common_SOURCES) \
+   $(dri2_SOURCES)
 
 LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
@@ -44,10 +46,6 @@ ifneq ($(filter swrast,$(MESA_GPU_DRIVERS)),)
 LOCAL_SRC_FILES += $(drisw_SOURCES)
 endif
 
-ifneq ($(filter-out swrast,$(MESA_GPU_DRIVERS)),)
-LOCAL_SRC_FILES += $(dri2_SOURCES)
-endif
-
 LOCAL_MODULE := libmesa_st_dri
 
 LOCAL_GENERATED_SOURCES := $(MESA_DRI_OPTIONS_H)
-- 
2.11.0

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[Mesa-dev] [PATCH v2 00/14] Android build cleanup/fixes

[Rob Herring]

This is a series of clean-ups and fixes to the Android build files.
Overall, it removes a lot of the if conditions that aren't necessary for
normal builds and also enables "mmma external/mesa3d" to build
everything for easier build testing.

This fixes LLVM enabled builds on master though that requires changes
to LLVM as well. In the process, LLVM builds with Lollipop are dropped
as L doesn't have the minimum LLVM version for several drivers. Also,
android-x86 L support is using mesa 11.0.

I've only tested against AOSP master so far. Mauro tested M and N with 
the previous version of the series. I don't think there's anything 
really different here that would break M or N. A git branch including 
llvmpipe building is here[1].

v2 highlights:
- Rework handling of LLVM settings
- Cleanup of libcxx includes
- Clarify the "all" driver option
- Make libelf a whole static lib
- Warn on LLVM enabled on L or earlier
- Various comments requested by Emil

Rob

[1] https://github.com/robherring/mesa.git android-make-cleanup

Mauro Rossi (2):
  Android: drop static linking of R600 LLVM libraries
  Android: define required __STDC* macros as cflags

Rob Herring (12):
  Android: remove remaining explicit libcxx includes
  Android: amd: use exported include dirs instead of explicit includes
  Android: amd/common: fix dependency on libmesa_nir
  Android: Fix swrast only build
  Android: remove needless conditional including of child makefiles
  Android: push driver build details to driver makefiles
  Android: Add driver "all" option to enable all drivers
  Android: drop LLVM support on Lollipop
  Android: rework libelf dependencies
  Android: rework LLVM build support
  Android: Add LLVM support for Android O
  Android: Drop linking libgcc

 Android.common.mk| 19 +--
 Android.mk   | 77 +---
 src/amd/Android.addrlib.mk   |  6 +++
 src/amd/Android.common.mk| 15 --
 src/compiler/Android.nir.gen.mk  |  1 +
 src/egl/Android.mk   | 18 +++
 src/gallium/Android.common.mk|  8 ---
 src/gallium/Android.mk   | 61 --
 src/gallium/auxiliary/Android.mk |  8 +--
 src/gallium/auxiliary/pipe-loader/Android.mk |  7 ++-
 src/gallium/drivers/freedreno/Android.mk |  5 ++
 src/gallium/drivers/i915/Android.mk  |  4 ++
 src/gallium/drivers/nouveau/Android.mk   |  6 ++-
 src/gallium/drivers/r300/Android.mk  |  4 ++
 src/gallium/drivers/r600/Android.mk  | 12 +++--
 src/gallium/drivers/radeon/Android.mk| 12 +++--
 src/gallium/drivers/radeonsi/Android.mk  | 15 +-
 src/gallium/drivers/softpipe/Android.mk  |  4 ++
 src/gallium/drivers/svga/Android.mk  |  4 ++
 src/gallium/drivers/vc4/Android.mk   |  4 ++
 src/gallium/drivers/virgl/Android.mk |  4 ++
 src/gallium/state_trackers/dri/Android.mk| 10 ++--
 src/gallium/targets/dri/Android.mk   | 70 ++---
 src/gallium/winsys/amdgpu/drm/Android.mk | 14 ++---
 src/gallium/winsys/i915/drm/Android.mk   |  4 ++
 src/mesa/Android.libmesa_dricore.mk  |  4 --
 src/mesa/Android.libmesa_st_mesa.mk  |  4 --
 src/mesa/drivers/dri/Android.mk  | 11 +---
 28 files changed, 180 insertions(+), 231 deletions(-)

-- 
2.11.0

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[Mesa-dev] [PATCH v2 03/14] Android: remove remaining explicit libcxx includes

[Rob Herring]

Explicitly including libcxx includes is not necessary at least on
Android M and later. It appears that libc++ was made the default in
commit "Make libc++ the default STL." in Android build system post L.
However, if L support is still needed, using "LOCAL_CXX_STL=libc++" is
the preferred way.

Signed-off-by: Rob Herring 
---
 src/amd/Android.common.mk  | 1 -
 src/gallium/Android.common.mk  | 1 -
 src/gallium/drivers/nouveau/Android.mk | 1 -
 src/gallium/drivers/r600/Android.mk| 3 +--
 4 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index 8be38dd3f414..aa0b1742b6be 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -56,7 +56,6 @@ LOCAL_C_INCLUDES := \
$(intermediates)/common \
external/llvm/include \
external/llvm/device/include \
-   external/libcxx/include \
$(ELF_INCLUDES)
 
 LOCAL_STATIC_LIBRARIES := libLLVMCore
diff --git a/src/gallium/Android.common.mk b/src/gallium/Android.common.mk
index 8559b5bce794..ff4c30dabd6e 100644
--- a/src/gallium/Android.common.mk
+++ b/src/gallium/Android.common.mk
@@ -33,7 +33,6 @@ ifeq ($(MESA_ENABLE_LLVM),true)
 LOCAL_C_INCLUDES += \
external/llvm/include \
external/llvm/device/include \
-   external/libcxx/include \
$(ELF_INCLUDES)
 endif
 
diff --git a/src/gallium/drivers/nouveau/Android.mk 
b/src/gallium/drivers/nouveau/Android.mk
index 3b26b592cdd6..d499d9918d86 100644
--- a/src/gallium/drivers/nouveau/Android.mk
+++ b/src/gallium/drivers/nouveau/Android.mk
@@ -39,6 +39,5 @@ LOCAL_SRC_FILES := \
 LOCAL_SHARED_LIBRARIES := libdrm_nouveau
 LOCAL_MODULE := libmesa_pipe_nouveau
 
-LOCAL_C_INCLUDES := external/libcxx/include
 include $(GALLIUM_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
diff --git a/src/gallium/drivers/r600/Android.mk 
b/src/gallium/drivers/r600/Android.mk
index 7be3614c03eb..a2fa62360880 100644
--- a/src/gallium/drivers/r600/Android.mk
+++ b/src/gallium/drivers/r600/Android.mk
@@ -30,8 +30,7 @@ include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES)
 
-LOCAL_C_INCLUDES := $(MESA_TOP)/src/amd/common \
-   external/libcxx/include
+LOCAL_C_INCLUDES := $(MESA_TOP)/src/amd/common
 
 LOCAL_STATIC_LIBRARIES := libmesa_amd_common
 LOCAL_SHARED_LIBRARIES := libdrm_radeon
-- 
2.11.0

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[Mesa-dev] [PATCH v2 01/14] Android: drop static linking of R600 LLVM libraries

[Rob Herring]

From: Mauro Rossi 

Inspired by Chih-Wei Huang and Zhen Wu similar patches

Linking against llvm with both static and shared may be avoided,
provided that libLLVM shared library for device supports
whole static R600/AMDGPU libraries, necessary for radeonsi/amdgpu.

Complementary changes, limited to android external/llvm project
are necessary to correclty build libLLVM

Tested with marshmallow-x86 and nougat-x86 builds

Reviewed-by: Chih-Wei Huang 
Signed-off-by: Rob Herring 
---
 src/gallium/targets/dri/Android.mk | 7 +--
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/src/gallium/targets/dri/Android.mk 
b/src/gallium/targets/dri/Android.mk
index 39d2b6a8983a..f5f0124882fd 100644
--- a/src/gallium/targets/dri/Android.mk
+++ b/src/gallium/targets/dri/Android.mk
@@ -108,12 +108,7 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
 LOCAL_STATIC_LIBRARIES :=
 
 ifeq ($(MESA_ENABLE_LLVM),true)
-LOCAL_STATIC_LIBRARIES += \
-   libLLVMR600CodeGen \
-   libLLVMR600Desc \
-   libLLVMR600Info \
-   libLLVMR600AsmPrinter \
-   libelf
+LOCAL_STATIC_LIBRARIES += libelf
 LOCAL_LDLIBS += -lgcc
 endif
 
-- 
2.11.0

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[Mesa-dev] [PATCH v2 04/14] Android: amd: use exported include dirs instead of explicit includes

[Rob Herring]

Add exported include paths rather than explicitly adding the includes
in each user of the common AMD libs.

Signed-off-by: Rob Herring 
Reviewed-by: Chih-Wei Huang 
---
 src/amd/Android.addrlib.mk   | 6 ++
 src/amd/Android.common.mk| 3 +++
 src/gallium/drivers/r600/Android.mk  | 2 --
 src/gallium/winsys/amdgpu/drm/Android.mk | 7 +--
 4 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/src/amd/Android.addrlib.mk b/src/amd/Android.addrlib.mk
index 540de5554bdd..a29f7c16d179 100644
--- a/src/amd/Android.addrlib.mk
+++ b/src/amd/Android.addrlib.mk
@@ -42,5 +42,11 @@ LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/amd/addrlib/gfx9/chip \
$(MESA_TOP)/src/amd/addrlib/r800/chip
 
+LOCAL_EXPORT_C_INCLUDE_DIRS := \
+   $(LOCAL_PATH) \
+   $(LOCAL_PATH)/addrlib/core \
+   $(LOCAL_PATH)/addrlib/inc/chip/r800 \
+   $(LOCAL_PATH)/addrlib/r800/chip
+
 include $(MESA_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)
diff --git a/src/amd/Android.common.mk b/src/amd/Android.common.mk
index aa0b1742b6be..a770aca65005 100644
--- a/src/amd/Android.common.mk
+++ b/src/amd/Android.common.mk
@@ -58,6 +58,9 @@ LOCAL_C_INCLUDES := \
external/llvm/device/include \
$(ELF_INCLUDES)
 
+LOCAL_EXPORT_C_INCLUDE_DIRS := \
+   $(LOCAL_PATH)/common
+
 LOCAL_STATIC_LIBRARIES := libLLVMCore
 
 include $(MESA_COMMON_MK)
diff --git a/src/gallium/drivers/r600/Android.mk 
b/src/gallium/drivers/r600/Android.mk
index a2fa62360880..cc89d8f6aeda 100644
--- a/src/gallium/drivers/r600/Android.mk
+++ b/src/gallium/drivers/r600/Android.mk
@@ -30,8 +30,6 @@ include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := $(C_SOURCES) $(CXX_SOURCES)
 
-LOCAL_C_INCLUDES := $(MESA_TOP)/src/amd/common
-
 LOCAL_STATIC_LIBRARIES := libmesa_amd_common
 LOCAL_SHARED_LIBRARIES := libdrm_radeon
 LOCAL_MODULE := libmesa_pipe_r600
diff --git a/src/gallium/winsys/amdgpu/drm/Android.mk 
b/src/gallium/winsys/amdgpu/drm/Android.mk
index 9030a83880d3..1b9439c4f886 100644
--- a/src/gallium/winsys/amdgpu/drm/Android.mk
+++ b/src/gallium/winsys/amdgpu/drm/Android.mk
@@ -34,12 +34,7 @@ LOCAL_CFLAGS := \
$(AMDGPU_CFLAGS) \
-DBRAHMA_BUILD=1
 
-LOCAL_C_INCLUDES := \
-   $(MESA_TOP)/src \
-   $(MESA_TOP)/src/amd \
-   $(MESA_TOP)/src/amd/addrlib/core \
-   $(MESA_TOP)/src/amd/addrlib/inc/chip/r800 \
-   $(MESA_TOP)/src/amd/addrlib/r800/chip
+LOCAL_STATIC_LIBRARIES := libmesa_amdgpu_addrlib
 
 LOCAL_SHARED_LIBRARIES := libdrm_amdgpu
 LOCAL_MODULE := libmesa_winsys_amdgpu
-- 
2.11.0

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Re: [Mesa-dev] [PATCH v2] glsl: Corrected some typos and error messages

[Eric Anholt]

Andres Gomez  writes:

> v2: left code style/formatting corrections out.
>
> Signed-off-by: Andres Gomez 

Reviewed-by: Eric Anholt 


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