[Mesa-dev] [PATCH] nv50/ir: check for origin insn in findOriginForTestWithZero

[Pierre Moreau]

Function arguments do not have an "origin" instruction, causing a
NULL-pointer dereference without this check.

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 79403c93df..d358abc5bd 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -410,6 +410,8 @@ ConstantFolding::findOriginForTestWithZero(Value *value)
if (!value)
   return NULL;
Instruction *insn = value->getInsn();
+   if (!insn)
+  return NULL;
 
if (insn->asCmp() && insn->op != OP_SLCT)
   return insn->asCmp();
-- 
2.11.1

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Re: [Mesa-dev] [PATCH] nv50/ir: optimize sub(a, 0) to a

[Pierre Moreau]

Reviewed-by: Pierre Moreau 

On 12:36 am - Oct 06 2016, Karol Herbst wrote:
> helped some ue4 demos and divinity OS shaders
> 
> total instructions in shared programs : 2818674 -> 2818606 (-0.00%)
> total gprs used in shared programs: 379273 -> 379273 (0.00%)
> total local used in shared programs   : 9505 -> 9505 (0.00%)
> total bytes used in shared programs   : 25837792 -> 25837192 (-0.00%)
> 
> localgpr   inst  bytes
> helped   0   0  33  33
>   hurt   0   0   0   0
> 
> Signed-off-by: Karol Herbst 
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> index 9875738..1c71155 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> @@ -1037,12 +1037,15 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
> &imm0, int s)
>}
>break;
> case OP_ADD:
> +   case OP_SUB:
>if (i->usesFlags())
>   break;
>if (imm0.isInteger(0)) {
>   if (s == 0) {
>  i->setSrc(0, i->getSrc(1));
>  i->src(0).mod = i->src(1).mod;
> +if (i->op == OP_SUB)
> +   i->src(0).mod = i->src(0).mod ^ Modifier(NV50_IR_MOD_NEG);
>   }
>   i->setSrc(1, NULL);
>   i->op = i->src(0).mod.getOp();
> -- 
> 2.10.0
> 
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[Mesa-dev] [PATCH] nv50/ir: Split 64-bit integer MAD/MUL operations

[Pierre Moreau]

Hardware does not support 64-bit integers MAD and MUL operations, so we need
to transform them in 32-bit operations.

Signed-off-by: Pierre Moreau 
---
 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 121 +
 1 file changed, 121 insertions(+)

Tested with (the GPU result was compared to the CPU result):
* 0xfff3lu * 0xfff2lu + 0x80070002lu
* 0xfff3lu * 0x80070002lu + 0x80070002lu
* 0x80010003lu * 0xfff2lu + 0x80070002lu
* 0x80010003lu * 0x80070002lu + 0x80070002lu

* -523456791234l * 929835793793l + -15793793l
*  523456791234l * 929835793793l + -15793793l
* -523456791234l * -929835793793l + -15793793l
*  523456791234l * -929835793793l + -15793793l

v2:
* Completely re-write the patch, as it was completely flawed (Ilia Mirkin)
* Move pass prior to Register Allocation, as some temporaries need to
  be created.

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index d88bb34..a610eb5 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -2218,6 +2218,126 @@ LateAlgebraicOpt::visit(Instruction *i)
 
 // 
=
 
+// Split 64-bit MUL and MAD
+class Split64BitOpPreRA : public Pass
+{
+private:
+   virtual bool visit(BasicBlock *);
+   void split64BitReg(Function *, Instruction *, Instruction *,
+  Instruction *, Value *, int);
+   void split64MulMad(Function *, Instruction *, DataType);
+
+   BuildUtil bld;
+};
+
+bool
+Split64BitOpPreRA::visit(BasicBlock *bb)
+{
+   Instruction *i, *next;
+   Modifier mod;
+
+   for (i = bb->getEntry(); i; i = next) {
+  next = i->next;
+
+  if (typeSizeof(i->dType) != 8)
+ continue;
+
+  DataType hTy;
+  switch (i->dType) {
+  case TYPE_U64: hTy = TYPE_U32; break;
+  case TYPE_S64: hTy = TYPE_S32; break;
+  default:
+ continue;
+  }
+
+  if (i->op == OP_MAD || i->op == OP_MUL)
+ split64MulMad(bb->getFunction(), i, hTy);
+   }
+
+   return true;
+}
+
+void
+Split64BitOpPreRA::split64MulMad(Function *fn, Instruction *i, DataType hTy)
+{
+   assert(i->op == OP_MAD || i->op == OP_MUL);
+   if (isFloatType(i->dType) || isFloatType(i->sType))
+  return;
+
+   bld.setPosition(i, true);
+
+   Value *zero = bld.mkImm(0u);
+   Value *carry = bld.getSSA(1, FILE_FLAGS);
+
+   // We want to compute `d = a * b (+ c)?`, where a, b, c and d are 64-bit
+   // values (a, b and c might be 32-bit values), using 32-bit operations. This
+   // gives the following operations:
+   // * `d.low = low(a.low * b.low) (+ c.low)?`
+   // * `d.high = low(a.high * b.low) + low(a.low * b.high)
+   //   + high(a.low * b.low) (+ c.high)?`
+   //
+   // To compute the high bits, we can split in the following operations:
+   // * `tmp1   = low(a.high * b.low) (+ c.high)?`
+   // * `tmp2   = low(a.low * b.high) + tmp1`
+   // * `d.high = high(a.low * b.low) + tmp2`
+   //
+   // mkSplit put lower bits at index 0 and higher bits at index 1
+
+   Value *op1[2];
+   if (i->getSrc(0)->reg.size == 8)
+  bld.mkSplit(op1, typeSizeof(hTy), i->getSrc(0));
+   else {
+  op1[0] = i->getSrc(0);
+  op1[1] = zero;
+   }
+   Value *op2[2];
+   if (i->getSrc(1)->reg.size == 8)
+  bld.mkSplit(op2, typeSizeof(hTy), i->getSrc(1));
+   else {
+  op2[0] = i->getSrc(1);
+  op2[1] = zero;
+   }
+
+   Value *op3[2] = { NULL, NULL };
+   if (i->op == OP_MAD) {
+  if (i->getSrc(2)->reg.size == 8)
+ bld.mkSplit(op3, typeSizeof(hTy), i->getSrc(2));
+  else {
+ op3[0] = i->getSrc(2);
+ op3[1] = zero;
+  }
+   }
+
+   Value *tmpRes1Hi = bld.getSSA();
+   if (i->op == OP_MAD)
+  bld.mkOp3(OP_MAD, hTy, tmpRes1Hi, op1[1], op2[0], op3[1]);
+   else
+  bld.mkOp2(OP_MUL, hTy, tmpRes1Hi, op1[1], op2[0]);
+
+   Value *tmpRes2Hi = bld.mkOp3v(OP_MAD, hTy, bld.getSSA(), op1[0], op2[1], 
tmpRes1Hi);
+
+   Value *def[2] = { bld.getSSA(), bld.getSSA() };
+
+   // If it was a MAD, add the carry from the low bits
+   // It is not needed if it was a MUL, since we added high(a.low * b.low) to
+   // d.high
+   if (i->op == OP_MAD)
+  bld.mkOp3(OP_MAD, hTy, def[0], op1[0], op2[0], op3[0])->setFlagsDef(1, 
carry);
+   else
+  bld.mkOp2(OP_MUL, hTy, def[0], op1[0], op2[0]);
+
+   Instruction *hiPart3 = bld.mkOp3(OP_MAD, hTy, def[1], op1[0], op2[0], 
tmpRes2Hi);
+   hiPart3->subOp = NV50_IR_SUBOP_MUL_HIGH;
+   if (i->op == OP_MAD)
+  hiPart3->setFlagsSrc(3, carry);
+
+   bld.mkOp2(OP_MERGE, i->dType, i->getDef(0), def[0], def[1]);
+
+   delete_Instruction(fn->getProgram(), i);
+}
+
+// 
==

Re: [Mesa-dev] [PATCH] nv50/ir: Split 64-bit integer MAD/MUL operations

[Pierre Moreau]

Sorry, there should have been a v2 next to PATCH in the subject…

Pierre


On 12:24 am - Oct 16 2016, Pierre Moreau wrote:
> Hardware does not support 64-bit integers MAD and MUL operations, so we need
> to transform them in 32-bit operations.
> 
> Signed-off-by: Pierre Moreau 
> ---
>  .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 121 
> +
>  1 file changed, 121 insertions(+)
> 
> Tested with (the GPU result was compared to the CPU result):
> * 0xfff3lu * 0xfff2lu + 0x80070002lu
> * 0xfff3lu * 0x80070002lu + 0x80070002lu
> * 0x80010003lu * 0xfff2lu + 0x80070002lu
> * 0x80010003lu * 0x80070002lu + 0x80070002lu
> 
> * -523456791234l * 929835793793l + -15793793l
> *  523456791234l * 929835793793l + -15793793l
> * -523456791234l * -929835793793l + -15793793l
> *  523456791234l * -929835793793l + -15793793l
> 
> v2:
> * Completely re-write the patch, as it was completely flawed (Ilia Mirkin)
> * Move pass prior to Register Allocation, as some temporaries need to
>   be created.
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> index d88bb34..a610eb5 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> @@ -2218,6 +2218,126 @@ LateAlgebraicOpt::visit(Instruction *i)
>  
>  // 
> =
>  
> +// Split 64-bit MUL and MAD
> +class Split64BitOpPreRA : public Pass
> +{
> +private:
> +   virtual bool visit(BasicBlock *);
> +   void split64BitReg(Function *, Instruction *, Instruction *,
> +  Instruction *, Value *, int);
> +   void split64MulMad(Function *, Instruction *, DataType);
> +
> +   BuildUtil bld;
> +};
> +
> +bool
> +Split64BitOpPreRA::visit(BasicBlock *bb)
> +{
> +   Instruction *i, *next;
> +   Modifier mod;
> +
> +   for (i = bb->getEntry(); i; i = next) {
> +  next = i->next;
> +
> +  if (typeSizeof(i->dType) != 8)
> + continue;
> +
> +  DataType hTy;
> +  switch (i->dType) {
> +  case TYPE_U64: hTy = TYPE_U32; break;
> +  case TYPE_S64: hTy = TYPE_S32; break;
> +  default:
> + continue;
> +  }
> +
> +  if (i->op == OP_MAD || i->op == OP_MUL)
> + split64MulMad(bb->getFunction(), i, hTy);
> +   }
> +
> +   return true;
> +}
> +
> +void
> +Split64BitOpPreRA::split64MulMad(Function *fn, Instruction *i, DataType hTy)
> +{
> +   assert(i->op == OP_MAD || i->op == OP_MUL);
> +   if (isFloatType(i->dType) || isFloatType(i->sType))
> +  return;
> +
> +   bld.setPosition(i, true);
> +
> +   Value *zero = bld.mkImm(0u);
> +   Value *carry = bld.getSSA(1, FILE_FLAGS);
> +
> +   // We want to compute `d = a * b (+ c)?`, where a, b, c and d are 64-bit
> +   // values (a, b and c might be 32-bit values), using 32-bit operations. 
> This
> +   // gives the following operations:
> +   // * `d.low = low(a.low * b.low) (+ c.low)?`
> +   // * `d.high = low(a.high * b.low) + low(a.low * b.high)
> +   //   + high(a.low * b.low) (+ c.high)?`
> +   //
> +   // To compute the high bits, we can split in the following operations:
> +   // * `tmp1   = low(a.high * b.low) (+ c.high)?`
> +   // * `tmp2   = low(a.low * b.high) + tmp1`
> +   // * `d.high = high(a.low * b.low) + tmp2`
> +   //
> +   // mkSplit put lower bits at index 0 and higher bits at index 1
> +
> +   Value *op1[2];
> +   if (i->getSrc(0)->reg.size == 8)
> +  bld.mkSplit(op1, typeSizeof(hTy), i->getSrc(0));
> +   else {
> +  op1[0] = i->getSrc(0);
> +  op1[1] = zero;
> +   }
> +   Value *op2[2];
> +   if (i->getSrc(1)->reg.size == 8)
> +  bld.mkSplit(op2, typeSizeof(hTy), i->getSrc(1));
> +   else {
> +  op2[0] = i->getSrc(1);
> +  op2[1] = zero;
> +   }
> +
> +   Value *op3[2] = { NULL, NULL };
> +   if (i->op == OP_MAD) {
> +  if (i->getSrc(2)->reg.size == 8)
> + bld.mkSplit(op3, typeSizeof(hTy), i->getSrc(2));
> +  else {
> + op3[0] = i->getSrc(2);
> + op3[1] = zero;
> +  }
> +   }
> +
> +   Value *tmpRes1Hi = bld.getSSA();
> +   if (i->op == OP_MAD)
> +  bld.mkOp3(OP_MAD, hTy, tmpRes1Hi, op1[1], op2[0], op3[1]);
> +   else
> +  bld.mkOp2(OP_MUL, hTy, tmpRes1Hi, op1[1], op2[0]);
> +
> +   Value *tmpRes2Hi = bld.mkOp3v(OP_MAD, hTy, bld.

Re: [Mesa-dev] [PATCH] nv50/ir: Split 64-bit integer MAD/MUL operations

[Pierre Moreau]

On 06:38 pm - Oct 15 2016, Ilia Mirkin wrote:
> On Sat, Oct 15, 2016 at 6:24 PM, Pierre Moreau  wrote:
> > Hardware does not support 64-bit integers MAD and MUL operations, so we need
> > to transform them in 32-bit operations.
> >
> > Signed-off-by: Pierre Moreau 
> > ---
> >  .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 121 
> > +
> >  1 file changed, 121 insertions(+)
> >
> > Tested with (the GPU result was compared to the CPU result):
> > * 0xfff3lu * 0xfff2lu + 0x80070002lu
> > * 0xfff3lu * 0x80070002lu + 0x80070002lu
> > * 0x80010003lu * 0xfff2lu + 0x80070002lu
> > * 0x80010003lu * 0x80070002lu + 0x80070002lu
> >
> > * -523456791234l * 929835793793l + -15793793l
> > *  523456791234l * 929835793793l + -15793793l
> > * -523456791234l * -929835793793l + -15793793l
> > *  523456791234l * -929835793793l + -15793793l
> >
> > v2:
> > * Completely re-write the patch, as it was completely flawed (Ilia Mirkin)
> > * Move pass prior to Register Allocation, as some temporaries need to
> >   be created.
> 
> In principle I like this approach. I don't remember what your old one
> was, but this is good. I think that nearly all of our "legalize" step
> items, including the gpu-family specific ones, need to be moved to
> this type of pass.

The old one inserted itself within the existing
`BuildUtil::split64BitOpPostRA()`.

> 
> >
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > index d88bb34..a610eb5 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > @@ -2218,6 +2218,126 @@ LateAlgebraicOpt::visit(Instruction *i)
> >
> >  // 
> > =
> >
> > +// Split 64-bit MUL and MAD
> > +class Split64BitOpPreRA : public Pass
> > +{
> > +private:
> > +   virtual bool visit(BasicBlock *);
> > +   void split64BitReg(Function *, Instruction *, Instruction *,
> > +  Instruction *, Value *, int);

Oops, forgot to remove the above prototype, will do it for v3.

> > +   void split64MulMad(Function *, Instruction *, DataType);
> > +
> > +   BuildUtil bld;
> > +};
> > +
> > +bool
> > +Split64BitOpPreRA::visit(BasicBlock *bb)
> > +{
> > +   Instruction *i, *next;
> > +   Modifier mod;
> > +
> > +   for (i = bb->getEntry(); i; i = next) {
> > +  next = i->next;
> > +
> > +  if (typeSizeof(i->dType) != 8)
> > + continue;
> 
> Is this necessary? You exclusively operate on U64/S64 below.

The above was added as I thought this pass could be reused for other 64-bit
operations that need to be split, while the below switch statement is more of a
remaining from when the code was in `BuildUtil::split64BitOpPostRA()`.
I guess that even if the pass gets support for more operations, FP64 are not
going to be part of it as the hardware supports them. In which case, only
64-bit integers are left, and the below switch statement would indeed be
enough.

> 
> > +
> > +  DataType hTy;
> > +  switch (i->dType) {
> > +  case TYPE_U64: hTy = TYPE_U32; break;
> > +  case TYPE_S64: hTy = TYPE_S32; break;
> > +  default:
> > + continue;
> > +  }
> > +
> > +  if (i->op == OP_MAD || i->op == OP_MUL)
> > + split64MulMad(bb->getFunction(), i, hTy);
> 
> There's an instance variable "func" (and "prog") you can use.

Oh, nice! Will use it.

> 
> > +   }
> > +
> > +   return true;
> > +}
> > +
> > +void
> > +Split64BitOpPreRA::split64MulMad(Function *fn, Instruction *i, DataType 
> > hTy)
> > +{
> > +   assert(i->op == OP_MAD || i->op == OP_MUL);
> > +   if (isFloatType(i->dType) || isFloatType(i->sType))
> > +  return;
> 
> I'd make this into an assert. Given the checks before calling this
> function, it can't really happen.

True, I’ll change that.

> 
> > +
> > +   bld.setPosition(i, true);
> > +
> > +   Value *zero = bld.mkImm(0u);
> > +   Value *carry = bld.getSSA(1, FILE_FLAGS);
> > +
> > +   // We want to compute `d = a * b (+ c)?`, where a, b, c and d are 64-bit
> > +   // values (a, b and c might be

Re: [Mesa-dev] [PATCH] nv50/ir: Split 64-bit integer MAD/MUL operations

[Pierre Moreau]

Hello Ian,

Since I am working on a direct SPIR-V to NV50 IR translator, ultimately to be
used for OpenCL kernels, I will still need the patch for that work. (I even
wrote that patch because I needed it when handling 64-bit addresses. :-) )
But thanks for the heads-up!

Pierre


On 02:07 pm - Oct 17 2016, Ian Romanick wrote:
> I know know if it will make this patch unnecessary, but I have a GLSL
> IR-level lowering pass for 64-bit multiplication.  I'm going to send
> that out with the rest of the GL_ARB_gpu_shader_int64 series within the
> next day or so.
> 
> On 10/15/2016 03:24 PM, Pierre Moreau wrote:
> > Hardware does not support 64-bit integers MAD and MUL operations, so we need
> > to transform them in 32-bit operations.
> > 
> > Signed-off-by: Pierre Moreau 
> > ---
> >  .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 121 
> > +
> >  1 file changed, 121 insertions(+)
> > 
> > Tested with (the GPU result was compared to the CPU result):
> > * 0xfff3lu * 0xfff2lu + 0x80070002lu
> > * 0xfff3lu * 0x80070002lu + 0x80070002lu
> > * 0x80010003lu * 0xfff2lu + 0x80070002lu
> > * 0x80010003lu * 0x80070002lu + 0x80070002lu
> > 
> > * -523456791234l * 929835793793l + -15793793l
> > *  523456791234l * 929835793793l + -15793793l
> > * -523456791234l * -929835793793l + -15793793l
> > *  523456791234l * -929835793793l + -15793793l
> > 
> > v2:
> > * Completely re-write the patch, as it was completely flawed (Ilia Mirkin)
> > * Move pass prior to Register Allocation, as some temporaries need to
> >   be created.
> > 
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > index d88bb34..a610eb5 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > @@ -2218,6 +2218,126 @@ LateAlgebraicOpt::visit(Instruction *i)
> >  
> >  // 
> > =
> >  
> > +// Split 64-bit MUL and MAD
> > +class Split64BitOpPreRA : public Pass
> > +{
> > +private:
> > +   virtual bool visit(BasicBlock *);
> > +   void split64BitReg(Function *, Instruction *, Instruction *,
> > +  Instruction *, Value *, int);
> > +   void split64MulMad(Function *, Instruction *, DataType);
> > +
> > +   BuildUtil bld;
> > +};
> > +
> > +bool
> > +Split64BitOpPreRA::visit(BasicBlock *bb)
> > +{
> > +   Instruction *i, *next;
> > +   Modifier mod;
> > +
> > +   for (i = bb->getEntry(); i; i = next) {
> > +  next = i->next;
> > +
> > +  if (typeSizeof(i->dType) != 8)
> > + continue;
> > +
> > +  DataType hTy;
> > +  switch (i->dType) {
> > +  case TYPE_U64: hTy = TYPE_U32; break;
> > +  case TYPE_S64: hTy = TYPE_S32; break;
> > +  default:
> > + continue;
> > +  }
> > +
> > +  if (i->op == OP_MAD || i->op == OP_MUL)
> > + split64MulMad(bb->getFunction(), i, hTy);
> > +   }
> > +
> > +   return true;
> > +}
> > +
> > +void
> > +Split64BitOpPreRA::split64MulMad(Function *fn, Instruction *i, DataType 
> > hTy)
> > +{
> > +   assert(i->op == OP_MAD || i->op == OP_MUL);
> > +   if (isFloatType(i->dType) || isFloatType(i->sType))
> > +  return;
> > +
> > +   bld.setPosition(i, true);
> > +
> > +   Value *zero = bld.mkImm(0u);
> > +   Value *carry = bld.getSSA(1, FILE_FLAGS);
> > +
> > +   // We want to compute `d = a * b (+ c)?`, where a, b, c and d are 64-bit
> > +   // values (a, b and c might be 32-bit values), using 32-bit operations. 
> > This
> > +   // gives the following operations:
> > +   // * `d.low = low(a.low * b.low) (+ c.low)?`
> > +   // * `d.high = low(a.high * b.low) + low(a.low * b.high)
> > +   //   + high(a.low * b.low) (+ c.high)?`
> > +   //
> > +   // To compute the high bits, we can split in the following operations:
> > +   // * `tmp1   = low(a.high * b.low) (+ c.high)?`
> > +   // * `tmp2   = low(a.low * b.high) + tmp1`
> > +   // * `d.high = high(a.low * b.low) + tmp2`
> > +   //
> > +   // mkSplit put lower bits at index 0 and higher bits at index 1
> > +
> > +   Va

[Mesa-dev] [PATCH v3] nv50/ir: Split 64-bit integer MAD/MUL operations

[Pierre Moreau]

Hardware does not support 64-bit integers MAD and MUL operations, so we need
to transform them in 32-bit operations.

Signed-off-by: Pierre Moreau 
---
 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 116 +
 1 file changed, 116 insertions(+)

Tested with (the GPU result was compared to the CPU result):
* 0xfff3lu * 0xfff2lu + 0x80070002lu
* 0xfff3lu * 0x80070002lu + 0x80070002lu
* 0x80010003lu * 0xfff2lu + 0x80070002lu
* 0x80010003lu * 0x80070002lu + 0x80070002lu

* -523456791234l * 929835793793l + -15793793l
*  523456791234l * 929835793793l + -15793793l
* -523456791234l * -929835793793l + -15793793l
*  523456791234l * -929835793793l + -15793793l

v2:
* Completely re-write the patch, as it was completely flawed (Ilia Mirkin)
* Move pass prior to Register Allocation, as some temporaries need to
  be created.

v3:
* Remove left-over prototype `split64Reg()`
* Remove redundant check for 64-bit destination type in `visit()` (Ilia Mirkin)
* Use the `func` attribute when calling split64MulMad (Ilia Mirkin)
* Change test of source and destination as float types, to an assert (Ilia
  Mirkin)
* Replace `typeSizeof(hTy)` by 4, as it will always be the case, and add an
  assert for it in `split64MulMad()`

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 0fb1a78..da6bbc4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -2234,6 +2234,121 @@ LateAlgebraicOpt::visit(Instruction *i)
 
 // 
=
 
+// Split 64-bit MUL and MAD
+class Split64BitOpPreRA : public Pass
+{
+private:
+   virtual bool visit(BasicBlock *);
+   void split64MulMad(Function *, Instruction *, DataType);
+
+   BuildUtil bld;
+};
+
+bool
+Split64BitOpPreRA::visit(BasicBlock *bb)
+{
+   Instruction *i, *next;
+   Modifier mod;
+
+   for (i = bb->getEntry(); i; i = next) {
+  next = i->next;
+
+  DataType hTy;
+  switch (i->dType) {
+  case TYPE_U64: hTy = TYPE_U32; break;
+  case TYPE_S64: hTy = TYPE_S32; break;
+  default:
+ continue;
+  }
+
+  if (i->op == OP_MAD || i->op == OP_MUL)
+ split64MulMad(func, i, hTy);
+   }
+
+   return true;
+}
+
+void
+Split64BitOpPreRA::split64MulMad(Function *fn, Instruction *i, DataType hTy)
+{
+   assert(i->op == OP_MAD || i->op == OP_MUL);
+   assert(!isFloatType(i->dType) && !isFloatType(i->sType));
+   assert(typeSizeof(hTy) == 4);
+
+   bld.setPosition(i, true);
+
+   Value *zero = bld.mkImm(0u);
+   Value *carry = bld.getSSA(1, FILE_FLAGS);
+
+   // We want to compute `d = a * b (+ c)?`, where a, b, c and d are 64-bit
+   // values (a, b and c might be 32-bit values), using 32-bit operations. This
+   // gives the following operations:
+   // * `d.low = low(a.low * b.low) (+ c.low)?`
+   // * `d.high = low(a.high * b.low) + low(a.low * b.high)
+   //   + high(a.low * b.low) (+ c.high)?`
+   //
+   // To compute the high bits, we can split in the following operations:
+   // * `tmp1   = low(a.high * b.low) (+ c.high)?`
+   // * `tmp2   = low(a.low * b.high) + tmp1`
+   // * `d.high = high(a.low * b.low) + tmp2`
+   //
+   // mkSplit put lower bits at index 0 and higher bits at index 1
+
+   Value *op1[2];
+   if (i->getSrc(0)->reg.size == 8)
+  bld.mkSplit(op1, 4, i->getSrc(0));
+   else {
+  op1[0] = i->getSrc(0);
+  op1[1] = zero;
+   }
+   Value *op2[2];
+   if (i->getSrc(1)->reg.size == 8)
+  bld.mkSplit(op2, 4, i->getSrc(1));
+   else {
+  op2[0] = i->getSrc(1);
+  op2[1] = zero;
+   }
+
+   Value *op3[2] = { NULL, NULL };
+   if (i->op == OP_MAD) {
+  if (i->getSrc(2)->reg.size == 8)
+ bld.mkSplit(op3, 4, i->getSrc(2));
+  else {
+ op3[0] = i->getSrc(2);
+ op3[1] = zero;
+  }
+   }
+
+   Value *tmpRes1Hi = bld.getSSA();
+   if (i->op == OP_MAD)
+  bld.mkOp3(OP_MAD, hTy, tmpRes1Hi, op1[1], op2[0], op3[1]);
+   else
+  bld.mkOp2(OP_MUL, hTy, tmpRes1Hi, op1[1], op2[0]);
+
+   Value *tmpRes2Hi = bld.mkOp3v(OP_MAD, hTy, bld.getSSA(), op1[0], op2[1], 
tmpRes1Hi);
+
+   Value *def[2] = { bld.getSSA(), bld.getSSA() };
+
+   // If it was a MAD, add the carry from the low bits
+   // It is not needed if it was a MUL, since we added high(a.low * b.low) to
+   // d.high
+   if (i->op == OP_MAD)
+  bld.mkOp3(OP_MAD, hTy, def[0], op1[0], op2[0], op3[0])->setFlagsDef(1, 
carry);
+   else
+  bld.mkOp2(OP_MUL, hTy, def[0], op1[0], op2[0]);
+
+   Instruction *hiPart3 = bld.mkOp3(OP_MAD, hTy, def[1], op1[0], op2[0], 
tmpRes2Hi);
+   hiPart3->subOp = NV50_IR_SUBOP_MUL_HIGH;
+   if (i->op == OP_MAD)
+  hiPart

Re: [Mesa-dev] [PATCH] nvc0: do not duplicate similar performance metrics

[Pierre Moreau]

Reviewed-by: Pierre Moreau 

On 02:54 pm - Oct 31 2016, Samuel Pitoiset wrote:
> Signed-off-by: Samuel Pitoiset 
> ---
>  .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c| 50 
> +++---
>  1 file changed, 7 insertions(+), 43 deletions(-)
> 
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c 
> b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c
> index 2f85c32..36534ba 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c
> @@ -257,24 +257,6 @@ static const struct nvc0_hw_metric_query_cfg 
> *sm21_hw_metric_queries[] =
>  
>  /*  Compute capability 3.0 (GK104/GK106/GK107)  */
>  static const struct nvc0_hw_metric_query_cfg
> -sm30_achieved_occupancy =
> -{
> -   .type= NVC0_HW_METRIC_QUERY_ACHIEVED_OCCUPANCY,
> -   .queries[0]  = _SM(ACTIVE_WARPS),
> -   .queries[1]  = _SM(ACTIVE_CYCLES),
> -   .num_queries = 2,
> -};
> -
> -static const struct nvc0_hw_metric_query_cfg
> -sm30_branch_efficiency =
> -{
> -   .type= NVC0_HW_METRIC_QUERY_BRANCH_EFFICIENCY,
> -   .queries[0]  = _SM(BRANCH),
> -   .queries[1]  = _SM(DIVERGENT_BRANCH),
> -   .num_queries = 2,
> -};
> -
> -static const struct nvc0_hw_metric_query_cfg
>  sm30_inst_issued =
>  {
> .type= NVC0_HW_METRIC_QUERY_INST_ISSUED,
> @@ -284,15 +266,6 @@ sm30_inst_issued =
>  };
>  
>  static const struct nvc0_hw_metric_query_cfg
> -sm30_inst_per_wrap =
> -{
> -   .type= NVC0_HW_METRIC_QUERY_INST_PER_WRAP,
> -   .queries[0]  = _SM(INST_EXECUTED),
> -   .queries[1]  = _SM(WARPS_LAUNCHED),
> -   .num_queries = 2,
> -};
> -
> -static const struct nvc0_hw_metric_query_cfg
>  sm30_inst_replay_overhead =
>  {
> .type= NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD,
> @@ -332,15 +305,6 @@ sm30_issue_slot_utilization =
>  };
>  
>  static const struct nvc0_hw_metric_query_cfg
> -sm30_ipc =
> -{
> -   .type= NVC0_HW_METRIC_QUERY_IPC,
> -   .queries[0]  = _SM(INST_EXECUTED),
> -   .queries[1]  = _SM(ACTIVE_CYCLES),
> -   .num_queries = 2,
> -};
> -
> -static const struct nvc0_hw_metric_query_cfg
>  sm30_shared_replay_overhead =
>  {
> .type= NVC0_HW_METRIC_QUERY_SHARED_REPLAY_OVERHEAD,
> @@ -352,29 +316,29 @@ sm30_shared_replay_overhead =
>  
>  static const struct nvc0_hw_metric_query_cfg *sm30_hw_metric_queries[] =
>  {
> -   &sm30_achieved_occupancy,
> -   &sm30_branch_efficiency,
> +   &sm20_achieved_occupancy,
> +   &sm20_branch_efficiency,
> &sm30_inst_issued,
> -   &sm30_inst_per_wrap,
> +   &sm20_inst_per_wrap,
> &sm30_inst_replay_overhead,
> &sm30_issued_ipc,
> &sm30_issue_slots,
> &sm30_issue_slot_utilization,
> -   &sm30_ipc,
> +   &sm20_ipc,
> &sm30_shared_replay_overhead,
>  };
>  
>  /*  Compute capability 3.5 (GK110)  */
>  static const struct nvc0_hw_metric_query_cfg *sm35_hw_metric_queries[] =
>  {
> -   &sm30_achieved_occupancy,
> +   &sm20_achieved_occupancy,
> &sm30_inst_issued,
> -   &sm30_inst_per_wrap,
> +   &sm20_inst_per_wrap,
> &sm30_inst_replay_overhead,
> &sm30_issued_ipc,
> &sm30_inst_issued,
> &sm30_issue_slot_utilization,
> -   &sm30_ipc,
> +   &sm20_ipc,
> &sm30_shared_replay_overhead,
>  };
>  
> -- 
> 2.10.1
> 
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev


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Re: [Mesa-dev] [PATCH] gm107/ir: emit RED instead of ATOM when no dst

[Pierre Moreau]

Are reduction doable on shared atomics as well?

Pierre

On 08:08 pm - Nov 04 2016, Samuel Pitoiset wrote:
> This is similar to NVC0 and GK110 emitters where we emit
> reduction operations instead of atomic operations when the
> destination is not used.
> 
> Found after writing some tests which check if performance counters
> return the expected value. In that case, gred_count returned 0
> on gm107 while at least gk106 returned the correct value.
> 
> Signed-off-by: Samuel Pitoiset 
> ---
>  .../drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 29 
> +-
>  1 file changed, 28 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
> index 5ed2ad4..5bd0fa0 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
> @@ -180,6 +180,7 @@ private:
> void emitIPA();
> void emitATOM();
> void emitATOMS();
> +   void emitRED();
> void emitCCTL();
>  
> void emitPIXLD();
> @@ -2496,6 +2497,29 @@ CodeEmitterGM107::emitATOMS()
>  }
>  
>  void
> +CodeEmitterGM107::emitRED()
> +{
> +   unsigned dType;
> +
> +   switch (insn->dType) {
> +   case TYPE_U32: dType = 0; break;
> +   case TYPE_S32: dType = 1; break;
> +   case TYPE_U64: dType = 2; break;
> +   case TYPE_F32: dType = 3; break;
> +   case TYPE_B128: dType = 4; break;
> +   case TYPE_S64: dType = 5; break;
> +   default: assert(!"unexpected dType"); dType = 0; break;
> +   }
> +
> +   emitInsn (0xebf8);
> +   emitField(0x30, 1, insn->src(0).getIndirect(0)->getSize() == 8);
> +   emitField(0x17, 3, insn->subOp);
> +   emitField(0x14, 3, dType);
> +   emitADDR (0x08, 0x1c, 20, 0, insn->src(0));
> +   emitGPR  (0x00, insn->src(1));
> +}
> +
> +void
>  CodeEmitterGM107::emitCCTL()
>  {
> unsigned width;
> @@ -3237,7 +3261,10 @@ CodeEmitterGM107::emitInstruction(Instruction *i)
>if (insn->src(0).getFile() == FILE_MEMORY_SHARED)
>   emitATOMS();
>else
> - emitATOM();
> + if (!insn->defExists(0) && insn->subOp < NV50_IR_SUBOP_ATOM_CAS)
> +emitRED();
> + else
> +emitATOM();
>break;
> case OP_CCTL:
>emitCCTL();
> -- 
> 2.10.1
> 
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> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev


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[Mesa-dev] Where to place the SPIR-V headers

[Pierre Moreau]

Hello everyone,

I have been working on translating SPIR-V to NV50 IR inside Nouveau in order to
run OpenCL kernels, received as SPIR-V binaries, on Nouveau. I have some
patches for clover as well as gallium, but before sending those for review, I
would like to know how to handle the SPIR-V header files.

Currently, some of the SPIR-V headers (the C version + the GLSL instruction-
set) can be found in `src/compiler/spirv`. Clover and Nouveau will both use the
C++ version of the SPIR-V header and the OpenCL instruction-set header; to
support ARB_gl_spirv, Nouveau will also need the GLSL instruction-set header.
Should all headers be moved to a common folder, or should each project have its
own copy?

Regards,
Pierre


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Re: [Mesa-dev] [PATCH] nv50/ir: Change chipset constants to ISA constants.

[Pierre Moreau]

I would agree with Ilia on making it an enum (maybe even an enum class?),
rather than a define.
If keeping it as a define, maybe we should also change the value while at it,
and have NVISA_SM30 equal 0x1d or 0x30 (or by numbering from 0 and on), rather
than keeping it linked to a chipset.

Pierre

On 01:03 am - Apr 11 2017, Samuel Pitoiset wrote:
> Karol told me that over IRC. Introducing ->getIsa() looks good to me.
> 
> On 04/11/2017 01:01 AM, Ilia Mirkin wrote:
> > I wanted to flip things over and use smxx notation...
> > 
> > On Apr 10, 2017 6:20 PM, "Samuel Pitoiset"  > > wrote:
> > 
> > Not sure why you get confused here. The chipset names are globally
> > consistent inside the codegen part and we never use SMxx. Maybe add
> > a comment like:
> > 
> > #define NVISA_GK104_CHIPSET0xe0 /* SM30 */
> > 
> > If you really need this?
> > 
> > On 04/10/2017 11:41 PM, Matthew Mondazzi wrote:
> > 
> > Define references to chipset did not actually use chipset,
> > leading to confusion. More relevant ISA constants put in place
> > of chipset compares.
> > 
> > Signed-off-by: Matthew Mondazzi  > >
> > ---
> >.../drivers/nouveau/codegen/nv50_ir_driver.h   |  7 ++--
> >.../drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp  | 24
> > +--
> >.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp  | 46
> > +++---
> >.../nouveau/codegen/nv50_ir_target_nvc0.cpp|  6 +--
> >4 files changed, 42 insertions(+), 41 deletions(-)
> > 
> > diff --git
> > a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> > index e7d840d..76c815e 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> > @@ -75,9 +75,10 @@ struct nv50_ir_prog_symbol
> >   uint32_t offset;
> >};
> >-#define NVISA_GK104_CHIPSET0xe0
> > -#define NVISA_GK20A_CHIPSET0xea
> > -#define NVISA_GM107_CHIPSET0x110
> > +#define NVISA_SM30   0xe0
> > +#define NVISA_SM35   0xea
> > +#define NVISA_SM50   0x110
> > +
> >  struct nv50_ir_prog_info
> >{
> > diff --git
> > a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> > index 5467447..ed29661 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> > @@ -806,7 +806,7 @@ CodeEmitterNVC0::emitSHLADD(const
> > Instruction *i)
> >void
> >CodeEmitterNVC0::emitMADSP(const Instruction *i)
> >{
> > -   assert(targ->getChipset() >= NVISA_GK104_CHIPSET);
> > +   assert(targ->getChipset() >= NVISA_SM30);
> > emitForm_A(i, HEX64(, 0003));
> >@@ -1852,7 +1852,7 @@ CodeEmitterNVC0::emitSTORE(const
> > Instruction *i)
> >   case FILE_MEMORY_LOCAL:  opc = 0xc800; break;
> >   case FILE_MEMORY_SHARED:
> >  if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
> > - if (targ->getChipset() >= NVISA_GK104_CHIPSET)
> > + if (targ->getChipset() >= NVISA_SM30)
> >opc = 0xb800;
> > else
> >opc = 0xcc00;
> > @@ -1868,7 +1868,7 @@ CodeEmitterNVC0::emitSTORE(const
> > Instruction *i)
> >   code[0] = 0x0005;
> >   code[1] = opc;
> >-   if (targ->getChipset() >= NVISA_GK104_CHIPSET) {
> > +   if (targ->getChipset() >= NVISA_SM30) {
> >  // Unlocked store on shared memory can fail.
> >  if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
> >  i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
> > @@ -1901,7 +1901,7 @@ CodeEmitterNVC0::emitLOAD(const
> > Instruction *i)
> >   case FILE_MEMORY_LOCAL:  opc = 0xc000; break;
> >   case FILE_MEMORY_SHARED:
> >  if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
> > - if (targ->getChipset() >= NVISA_GK104_CHIPSET)
> > + if (targ->getChipset() >= NVISA_SM30)
> >opc = 0xa800;
> > else
> >opc = 0xc400;
> > @@ -1944,7 +1944,7 @@ CodeEmitterNVC0::emitLOAD(const
> > Instruction *i)
> >  code[0] |= 63 << 14;
> > if (p >= 0) {
> > -  if (targ->getChipset() >= NVISA_GK104_CHIPSET)
> >   

[Mesa-dev] Leaked hardware event if kernel launch fails?

[Pierre Moreau]

Hello,

I noticed that, if trying to enqueue a kernel which had no
`module::section::text_executable` attached to its clover module, I would get a
`std::out_of_range` exception, instead of the expected
CL_INVALID_PROGRAM_EXECUTABLE (see [0]; I tried enqueueing using
`clEnqueueNDRangeKernel). I modified the `kernel::exec_context::bind()` method
to catch the out-of-range exceptions, and throw the proper clover exception
instead:

```
diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp 
b/src/gallium/state_trackers/clover/core/kernel.cpp
index 328323b6b0..1bb4f612cb 100644
--- a/src/gallium/state_trackers/clover/core/kernel.cpp
+++ b/src/gallium/state_trackers/clover/core/kernel.cpp
@@ -161,8 +161,18 @@ kernel::exec_context::bind(intrusive_ptr _q,
 
// Bind kernel arguments.
auto &m = kern.program().build(q->device()).binary;
-   auto margs = find(name_equals(kern.name()), m.syms).args;
-   auto msec = find(type_equals(module::section::text_executable), m.secs);
+   std::vector margs;
+   try {
+  margs = find(name_equals(kern.name()), m.syms).args;
+   } catch (const std::out_of_range &e) {
+  throw error(CL_INVALID_KERNEL);
+   }
+   module::section msec;
+   try {
+  msec = find(type_equals(module::section::text_executable), m.secs);
+   } catch (const std::out_of_range &e) {
+  throw error(CL_INVALID_PROGRAM_EXECUTABLE);
+   }
auto explicit_arg = kern._args.begin();
 
for (auto &marg : margs) {
```

But now, when my OpenCL program exists after the error, the destruction of the
`cl::CommandQueue` object doesn’t happen in a peaceful manner:

```
Program received signal SIGSEGV, Segmentation fault.
0x00652e40 in ?? ()
(gdb) bt
#0  0x00652e40 in ?? ()
#1  0x77b2d29a in clover::command_queue::flush 
(this=this@entry=0x653310) at 
../../../../../mesa_spirv/src/gallium/state_trackers/clover/core/queue.cpp:77
#2  0x77b0ebc0 in clReleaseCommandQueue (d_q=0x653318) at 
../../../../../mesa_spirv/src/gallium/state_trackers/clover/api/queue.cpp:63
#3  0x00405125 in 
cl::detail::ReferenceHandler<_cl_command_queue*>::release (queue=0x653318) at 
/usr/include/CL/cl.hpp:1686
#4  0x00405108 in cl::detail::Wrapper<_cl_command_queue*>::release 
(this=0x7fffda98) at /usr/include/CL/cl.hpp:1863
#5  0x004050c7 in cl::detail::Wrapper<_cl_command_queue*>::~Wrapper 
(this=0x7fffda98) at /usr/include/CL/cl.hpp:1802
#6  0x004047e5 in cl::CommandQueue::~CommandQueue (this=0x7fffda98) 
at /usr/include/CL/cl.hpp:5482
#7  0x004046f8 in main () at instruction-set_OpenCL-std.cpp:58
(gdb) up
#1  0x77b2d29a in clover::command_queue::flush 
(this=this@entry=0x653310) at 
../../../../../mesa_spirv/src/gallium/state_trackers/clover/core/queue.cpp:77
77   queued_events.front()().fence(fence);
```

(I am using the OpenCL-C++ binding, and Mesa is quite recent (88b5acfa09) with
custom patches to get some OpenCL support for Nouveau.)

Looking around a bit with the debugger, it seems like the event created by the
`clEnqueueNDRangeKernel()` function still exists within the command queue:
shouldn’t it have been automatically removed from the queue as the enqueue
function failed?


Thank you for your help!
Pierre


[0]: 
https://www.khronos.org/registry/cl/sdk/1.0/docs/man/xhtml/clEnqueueNDRangeKernel.html


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Re: [Mesa-dev] Leaked hardware event if kernel launch fails?

[Pierre Moreau]

Hello Francisco!

Thank you for your quick reply!

On 02:33 pm - Dec 25 2016, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > Hello,
> >
> Hi Pierre!
> 
> > I noticed that, if trying to enqueue a kernel which had no
> > `module::section::text_executable` attached to its clover module, I would 
> > get a
> > `std::out_of_range` exception, instead of the expected
> > CL_INVALID_PROGRAM_EXECUTABLE (see [0]; I tried enqueueing using
> > `clEnqueueNDRangeKernel). I modified the `kernel::exec_context::bind()` 
> > method
> > to catch the out-of-range exceptions, and throw the proper clover exception
> > instead:
> >
> > ```
> > diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp 
> > b/src/gallium/state_trackers/clover/core/kernel.cpp
> > index 328323b6b0..1bb4f612cb 100644
> > --- a/src/gallium/state_trackers/clover/core/kernel.cpp
> > +++ b/src/gallium/state_trackers/clover/core/kernel.cpp
> > @@ -161,8 +161,18 @@ 
> > kernel::exec_context::bind(intrusive_ptr _q,
> >  
> > // Bind kernel arguments.
> > auto &m = kern.program().build(q->device()).binary;
> > -   auto margs = find(name_equals(kern.name()), m.syms).args;
> > -   auto msec = find(type_equals(module::section::text_executable), m.secs);
> > +   std::vector margs;
> > +   try {
> > +  margs = find(name_equals(kern.name()), m.syms).args;
> > +   } catch (const std::out_of_range &e) {
> > +  throw error(CL_INVALID_KERNEL);
> > +   }
> > +   module::section msec;
> > +   try {
> > +  msec = find(type_equals(module::section::text_executable), m.secs);
> > +   } catch (const std::out_of_range &e) {
> > +  throw error(CL_INVALID_PROGRAM_EXECUTABLE);
> > +   }
> 
> I think we should be validating this condition beforehand in the
> clEnqueueNDRangeKernel() entry point.  The reason is that
> clover::kernel::launch() will in general be executed asynchronously, so
> the exceptions you're throwing above won't necessarily cause
> clEnqueueNDRangeKernel() to return a failure status code as you'd expect
> [Consider e.g. what would happen if the clEnqueueNDRangeKernel() call
> was made explicitly dependent on a user event which wasn't initially
> signalled, what would delay the execution of clover::kernel::launch()
> until *after* clEnqueueNDRangeKernel() has returned control to the
> user].

I hadn’t really thought of what would happen if the launch happened after
clEnqueueNDRangeKernel() had returned…
I had looked at validate_common() too quickly, and missed that it was already
returning CL_INVALID_PROGRAM_EXECUTABLE, but only when the program was not set
up for the current device. This new patch should be less intrusive than the
previous one, and it does work better. :-) I’ll send a proper patch tomorrow.

Pierre


diff --git a/src/gallium/state_trackers/clover/api/kernel.cpp 
b/src/gallium/state_trackers/clover/api/kernel.cpp
index 73ba34abe8..61737ede5e 100644
--- a/src/gallium/state_trackers/clover/api/kernel.cpp
+++ b/src/gallium/state_trackers/clover/api/kernel.cpp
@@ -215,7 +215,8 @@ namespace {
 }, kern.args()))
  throw error(CL_INVALID_KERNEL_ARGS);
 
-  if (!count(q.device(), kern.program().devices()))
+  auto &m = kern.program().build(q.device()).binary;
+  if (!any_of(type_equals(module::section::text_executable), m.secs))
  throw error(CL_INVALID_PROGRAM_EXECUTABLE);
}
 

> 
> > auto explicit_arg = kern._args.begin();
> >  
> > for (auto &marg : margs) {
> > ```
> >
> > But now, when my OpenCL program exists after the error, the destruction of 
> > the
> > `cl::CommandQueue` object doesn’t happen in a peaceful manner:
> >
> > ```
> > Program received signal SIGSEGV, Segmentation fault.
> > 0x00652e40 in ?? ()
> > (gdb) bt
> > #0  0x00652e40 in ?? ()
> > #1  0x77b2d29a in clover::command_queue::flush 
> > (this=this@entry=0x653310) at 
> > ../../../../../mesa_spirv/src/gallium/state_trackers/clover/core/queue.cpp:77
> > #2  0x77b0ebc0 in clReleaseCommandQueue (d_q=0x653318) at 
> > ../../../../../mesa_spirv/src/gallium/state_trackers/clover/api/queue.cpp:63
> > #3  0x00405125 in 
> > cl::detail::ReferenceHandler<_cl_command_queue*>::release (queue=0x653318) 
> > at /usr/include/CL/cl.hpp:1686
> > #4  0x00405108 in cl::detail::Wrapper<_cl_command_queue*>::release 
> > (this=0x7fffda98) at /usr/include/CL/cl.hpp:1863
> > #5  0x004050c7 in cl::detail::Wrapper<_cl_command_queue*>::~Wrapper 
> > (this=0x7fffda98) at /usr/i

[Mesa-dev] [PATCH] clover: Check for executables before enqueueing a kernel

[Pierre Moreau]

Without this check, the kernel::bind() method would fail with a
std::out_of_range exception, letting an exception escape from the
library into the client, rather than returning the corresponding error
code CL_INVALID_PROGRAM_EXECUTABLE.

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/kernel.cpp | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/kernel.cpp 
b/src/gallium/state_trackers/clover/api/kernel.cpp
index 73ba34abe8..e3d75af972 100644
--- a/src/gallium/state_trackers/clover/api/kernel.cpp
+++ b/src/gallium/state_trackers/clover/api/kernel.cpp
@@ -215,7 +215,10 @@ namespace {
 }, kern.args()))
  throw error(CL_INVALID_KERNEL_ARGS);
 
-  if (!count(q.device(), kern.program().devices()))
+  // If the command queue's device is not associated to the program, we get
+  // a module, with no sections, which will also fail the following test.
+  auto &m = kern.program().build(q.device()).binary;
+  if (!any_of(type_equals(module::section::text_executable), m.secs))
  throw error(CL_INVALID_PROGRAM_EXECUTABLE);
}
 
-- 
2.11.0

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Re: [Mesa-dev] [PATCH] nvc0: allow TK1 (NVEA) queries to work

[Pierre Moreau]

On 07:13 pm - Jan 15 2017, Samuel Pitoiset wrote:
> 
> 
> On 01/14/2017 02:35 AM, Ilia Mirkin wrote:
> > The NVEA 3D class is numerically larger than the NVF0 3D class. The TK1
> > chip uses the SM35 ISA and likely has the same hw counters. Allow these
> > to be used like on all the other supported chips.
> 
> This actually needs more testing. Perf counters are pretty different for
> each generation. The kernel used for reading the counters will work though,
> but the configuration has to be double checked.
> 
> More comments inline.
> 
> > 
> > Signed-off-by: Ilia Mirkin 
> > ---
> >  src/gallium/drivers/nouveau/nvc0/nvc0_query.c |  4 ++--
> >  .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c   |  3 +++
> >  src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c   | 19 
> > ++-
> >  3 files changed, 15 insertions(+), 11 deletions(-)
> > 
> > diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c 
> > b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
> > index 8b9e6b6..6bf2285 100644
> > --- a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
> > +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
> > @@ -205,7 +205,7 @@ nvc0_screen_get_driver_query_group_info(struct 
> > pipe_screen *pscreen,
> > 
> > if (screen->base.drm->version >= 0x01000101) {
> >if (screen->compute) {
> > - if (screen->base.class_3d <= NVF0_3D_CLASS) {
> > + if (screen->base.class_3d < GM107_3D_CLASS) {
> >  count += 2;
> >   }
> >}
> > @@ -229,7 +229,7 @@ nvc0_screen_get_driver_query_group_info(struct 
> > pipe_screen *pscreen,
> > } else
> > if (id == NVC0_HW_METRIC_QUERY_GROUP) {
> >if (screen->compute) {
> > -  if (screen->base.class_3d <= NVF0_3D_CLASS) {
> > +  if (screen->base.class_3d < GM107_3D_CLASS) {
> 
> Oops, I forgot to expose these groups when I added Maxwell support. These
> groups are only used for AMD_performance_monitor. Presumably this ext
> currently doesn't expose the counters on Maxwell.
> 
> We should enable them in a separate patch just before this one (for
> maxwell).

Do you need me to test anything on Maxwell?

Pierre

> 
> Otherwise, looks good.
> 
> >  info->name = "Performance metrics";
> >  info->max_active_queries = 4; /* A metric uses at least 2 
> > queries */
> >  info->num_queries = nvc0_hw_metric_get_num_queries(screen);
> > diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c 
> > b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c
> > index 089af61..494f2dd 100644
> > --- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c
> > +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_metric.c
> > @@ -403,6 +403,7 @@ nvc0_hw_metric_get_queries(struct nvc0_screen *screen)
> > case GM200_3D_CLASS:
> > case GM107_3D_CLASS:
> >return sm50_hw_metric_queries;
> > +   case NVEA_3D_CLASS:
> > case NVF0_3D_CLASS:
> >return sm35_hw_metric_queries;
> > case NVE4_3D_CLASS:
> > @@ -425,6 +426,7 @@ nvc0_hw_metric_get_num_queries(struct nvc0_screen 
> > *screen)
> > case GM200_3D_CLASS:
> > case GM107_3D_CLASS:
> >return ARRAY_SIZE(sm50_hw_metric_queries);
> > +   case NVEA_3D_CLASS:
> > case NVF0_3D_CLASS:
> >return ARRAY_SIZE(sm35_hw_metric_queries);
> > case NVE4_3D_CLASS:
> > @@ -684,6 +686,7 @@ nvc0_hw_metric_get_query_result(struct nvc0_context 
> > *nvc0,
> > switch (screen->base.class_3d) {
> > case GM200_3D_CLASS:
> > case GM107_3D_CLASS:
> > +   case NVEA_3D_CLASS:
> > case NVF0_3D_CLASS:
> >value = sm35_hw_metric_calc_result(hq, res64);
> >break;
> > diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c 
> > b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
> > index df5723d..440e5d3 100644
> > --- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
> > +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
> > @@ -2239,6 +2239,7 @@ nvc0_hw_sm_get_queries(struct nvc0_screen *screen)
> >return sm52_hw_sm_queries;
> > case GM107_3D_CLASS:
> >return sm50_hw_sm_queries;
> > +   case NVEA_3D_CLASS:
> > case NVF0_3D_CLASS:
> >return sm35_hw_sm_queries;
> > case NVE4_3D_CLASS:
> > @@ -2262,6 +2263,7 @@ nvc0_hw_sm_get_num_queries(struct nvc0_screen *screen)
> >return ARRAY_SIZE(sm52_hw_sm_queries);
> > case GM107_3D_CLASS:
> >return ARRAY_SIZE(sm50_hw_sm_queries);
> > +   case NVEA_3D_CLASS:
> > case NVF0_3D_CLASS:
> >return ARRAY_SIZE(sm35_hw_sm_queries);
> > case NVE4_3D_CLASS:
> > @@ -2475,15 +2477,14 @@ nvc0_hw_sm_get_program(struct nvc0_screen *screen)
> >prog->code_size = sizeof(gm107_read_hw_sm_counters_code);
> >prog->num_gprs = 14;
> > } else
> > -   if (screen->base.class_3d == NVE4_3D_CLASS ||
> > -   screen->base.class_3d == NVF0_3D_CLASS) {
> > -  if (screen->base.class_3d == NVE4_3D_CLASS) {
> > - prog->cod

Re: [Mesa-dev] [PATCH] nv50/ir: always return 0 when trying to read thread id along unit dim

[Pierre Moreau]

Reviewed-by: Pierre Moreau 

On 10:20 pm - Jan 25 2017, Ilia Mirkin wrote:
> Many many many compute shaders only define a 1- or 2-dimensional block,
> but then continue to use system values that take the full 3d into
> account (like gl_LocalInvocationIndex, etc). So for the special case
> that a dimension is exactly 1, we know that the thread id along that
> axis will always be 0, so return it as such and allow constant folding
> to fix things up.
> 
> Signed-off-by: Ilia Mirkin 
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir.cpp   |  6 +-
>  src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h  |  2 +-
>  src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 10 --
>  src/gallium/drivers/nouveau/codegen/nv50_ir_target.h  |  4 +++-
>  4 files changed, 17 insertions(+), 5 deletions(-)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> index 186c9fd..b67a1dd 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
> @@ -1179,7 +1179,11 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info)
>info->prop.gp.instanceCount = 1;
>info->prop.gp.maxVertices = 1;
> }
> -   info->prop.cp.numThreads = 1;
> +   if (info->type == PIPE_SHADER_COMPUTE) {
> +  info->prop.cp.numThreads[0] =
> +  info->prop.cp.numThreads[1] =
> +  info->prop.cp.numThreads[2] = 1;
> +   }
> info->io.pointSize = 0xff;
> info->io.instanceId = 0xff;
> info->io.vertexId = 0xff;
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index 65d0904..e7d840d 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -152,7 +152,7 @@ struct nv50_ir_prog_info
>   uint32_t inputOffset; /* base address for user args */
>   uint32_t sharedOffset; /* reserved space in s[] */
>   uint32_t gridInfoBase;  /* base address for NTID,NCTAID */
> - uint32_t numThreads; /* max number of threads */
> + uint16_t numThreads[3]; /* max number of threads */
>} cp;
> } prop;
>  
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> index 6320e52..51f8b29 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
> @@ -1047,7 +1047,6 @@ bool Source::scanSource()
> }
>  
> info->io.viewportId = -1;
> -   info->prop.cp.numThreads = 1;
>  
> info->immd.data = (uint32_t *)MALLOC(scan.immediate_count * 16);
> info->immd.type = (ubyte *)MALLOC(scan.immediate_count * sizeof(ubyte));
> @@ -1150,9 +1149,13 @@ void Source::scanProperty(const struct 
> tgsi_full_property *prop)
>   info->prop.tp.outputPrim = PIPE_PRIM_TRIANGLES; /* anything but 
> points */
>break;
> case TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH:
> +  info->prop.cp.numThreads[0] = prop->u[0].Data;
> +  break;
> case TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT:
> +  info->prop.cp.numThreads[1] = prop->u[0].Data;
> +  break;
> case TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH:
> -  info->prop.cp.numThreads *= prop->u[0].Data;
> +  info->prop.cp.numThreads[2] = prop->u[0].Data;
>break;
> case TGSI_PROPERTY_NUM_CLIPDIST_ENABLED:
>info->io.clipDistances = prop->u[0].Data;
> @@ -1941,6 +1944,9 @@ Converter::fetchSrc(tgsi::Instruction::SrcRegister src, 
> int c, Value *ptr)
>return ld->getDef(0);
> case TGSI_FILE_SYSTEM_VALUE:
>assert(!ptr);
> +  if (info->sv[idx].sn == TGSI_SEMANTIC_THREAD_ID &&
> +  info->prop.cp.numThreads[swz] == 1)
> + return zero;
>ld = mkOp1(OP_RDSV, TYPE_U32, getSSA(), srcToSym(src, c));
>ld->perPatch = info->sv[idx].patch;
>return ld->getDef(0);
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
> index eaf50cc..e9d1057 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
> @@ -174,7 +174,9 @@ public:
> virtual void getBuiltinCode(const uint32_t **code, uint32_t *size) const 
> = 0;
>  
> virtual void parseDriverInfo(const struct nv50_ir_prog_info *info) {
> -  threads = info->prop.cp.numThreads;
> +  threads 

Re: [Mesa-dev] [PATCH v4] clover: restore support for LLVM <= 3.9

[Pierre Moreau]

Mesa master builds again against LLVM 3.6.

Tested-by: Pierre Moreau 

On 07:57 pm - Nov 18 2016, Vedran Miletić wrote:
> The commit 8e430ff8b060b4e8e922bae24b3c57837da6ea77 support for LLVM
> 3.9 and older versionsin  Clover. This patch restores it and refactors
> the support using Clover compatibility layer for LLVM.
> 
> Signed-off-by: Vedran Miletić 
> ---
>  .../state_trackers/clover/llvm/codegen/bitcode.cpp |  9 ++
>  src/gallium/state_trackers/clover/llvm/compat.hpp  | 35 
> ++
>  2 files changed, 37 insertions(+), 7 deletions(-)
> 
> diff --git a/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp 
> b/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
> index 5dcc4f8..4b4ae41 100644
> --- a/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
> +++ b/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
> @@ -32,6 +32,7 @@
>  ///
>  
>  #include "llvm/codegen.hpp"
> +#include "llvm/compat.hpp"
>  #include "llvm/metadata.hpp"
>  #include "core/error.hpp"
>  #include "util/algorithm.hpp"
> @@ -99,13 +100,7 @@ clover::llvm::parse_module_library(const module &m, 
> ::llvm::LLVMContext &ctx,
> auto mod = ::llvm::parseBitcodeFile(::llvm::MemoryBufferRef(
>  as_string(m.secs[0].data), " "), 
> ctx);
>  
> -   if (::llvm::Error err = mod.takeError()) {
> -  std::string msg;
> -  ::llvm::handleAllErrors(std::move(err), [&](::llvm::ErrorInfoBase 
> &EIB) {
> - msg = EIB.message();
> - fail(r_log, error(CL_INVALID_PROGRAM), msg.c_str());
> -  });
> -   }
> +   compat::handle_module_error(mod, r_log);
>  
> return std::unique_ptr<::llvm::Module>(std::move(*mod));
>  }
> diff --git a/src/gallium/state_trackers/clover/llvm/compat.hpp 
> b/src/gallium/state_trackers/clover/llvm/compat.hpp
> index a963cff..b29100f 100644
> --- a/src/gallium/state_trackers/clover/llvm/compat.hpp
> +++ b/src/gallium/state_trackers/clover/llvm/compat.hpp
> @@ -39,6 +39,11 @@
>  #include 
>  #include 
>  #include 
> +#if HAVE_LLVM >= 0x0400
> +#include 
> +#else
> +#include 
> +#endif
>  
>  #if HAVE_LLVM >= 0x0307
>  #include 
> @@ -53,6 +58,14 @@
>  #include 
>  #include 
>  
> +#if HAVE_LLVM >= 0x0307
> +#include 
> +#endif
> +
> +namespace llvm {
> +   class Module;
> +}
> +
>  namespace clover {
> namespace llvm {
>namespace compat {
> @@ -158,6 +171,28 @@ namespace clover {
>  #else
>   const auto default_reloc_model = ::llvm::Reloc::Default;
>  #endif
> +
> +#if HAVE_LLVM >= 0x0400
> + typedef ::llvm::Expected> 
> bitcode_module;
> +#elif HAVE_LLVM >= 0x0307
> + typedef ::llvm::ErrorOr> 
> bitcode_module;
> +#else
> + typedef ::llvm::ErrorOr<::llvm::Module *> bitcode_module;
> +#endif
> +
> + inline void
> + handle_module_error(bitcode_module &mod, std::string &r_log) {
> +#if HAVE_LLVM >= 0x0400
> +if (::llvm::Error err = mod.takeError()) {
> +   ::llvm::handleAllErrors(std::move(err), 
> [&](::llvm::ErrorInfoBase &EIB) {
> +  fail(r_log, error(CL_INVALID_PROGRAM), 
> EIB.message().c_str());
> +   });
> +}
> +#else
> +if (!mod)
> +   fail(r_log, error(CL_INVALID_PROGRAM), 
> mod.getError().message());
> +#endif
> + }
>}
> }
>  }
> -- 
> 2.7.4
> 
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Re: [Mesa-dev] [PATCH 4/5] clover/llvm: Use -cl-std and device version to select language defaults

[Pierre Moreau]

Hi Aaron,

On 2017-07-21 — 23:19, Aaron Watry wrote:
> According to section 5.8.4.5 of the 2.0 spec, the CL C version is chosen by:
>  1) If you have -cl-std=CL1.1+ use the version specified
>  2) If not, use the highest 1.x version that the device supports

According to that same part of the spec, clBuildProgram and clCompileProgram
should fail if the specified CL C version is strictly greater than the version
the device supports. You could add a check in `get_language_version()` to
compare `ver` and `device_version`, and throw a `build_error()` exception if
`ver > device_version`.

I have two more comments further down.

> Curiously, there is no valid value for -cl-std=CL1.0
> 
> Signed-off-by: Aaron Watry 
> ---
>  .../state_trackers/clover/llvm/invocation.cpp  | 48 
> --
>  1 file changed, 45 insertions(+), 3 deletions(-)
> 
> diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp 
> b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> index 364aaf1517..92d72e5b73 100644
> --- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> +++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> @@ -93,6 +93,48 @@ namespace {
>return ctx;
> }
>  
> +   clang::LangStandard::Kind
> +   get_language_from_version_str(const std::string &version_str,
> + bool is_opt = false) {
> +   /**
> +* Per CL 2.0 spec, section 5.8.4.5:
> +* If it's an option, use the value directly.
> +* If it's a device version, clamp to max 1.x version, a.k.a. 1.2
> +*/
> +   if (version_str == "1.1")
> +  return clang::LangStandard::lang_opencl11;
> +   if (version_str == "1.2")
> +  return clang::LangStandard::lang_opencl12;
> +   if (version_str == "2.0"){
> +  if (is_opt) return clang::LangStandard::lang_opencl20;
> +  else return clang::LangStandard::lang_opencl12;
> +   }
> +
> +   /*
> +* At this point, it's not a recognized language version option or
> +* 1.1+ device version, which just leaves 1.0 as a possible device
> +* version (or an invalid version string).
> +*/
> +   return clang::LangStandard::lang_opencl10;
> +  }
> +
> +   clang::LangStandard::Kind
> +   get_language_version(const std::vector &opts,
> +const std::string &device_version) {
> +
> +  const std::string search = "-cl-std=CL";
> +
> +   for(auto opt: opts){
> +   auto pos = opt.find(search);
> +   if (pos == 0){
> +   auto ver = opt.substr(pos+search.size());
> +   return get_language_from_version_str(ver, true);
> +   }
> +   }
> +
> +   return get_language_from_version_str(device_version);
> +}
> +
> std::unique_ptr
> create_compiler_instance(const target &target,
>  const std::vector &opts,
> @@ -129,7 +171,7 @@ namespace {
>compat::set_lang_defaults(c->getInvocation(), c->getLangOpts(),
>  compat::ik_opencl, 
> ::llvm::Triple(target.triple),
>  c->getPreprocessorOpts(),
> -clang::LangStandard::lang_opencl11);
> +get_language_version(opts, device_version));
>  
>c->createDiagnostics(new clang::TextDiagnosticPrinter(
>*new raw_string_ostream(r_log),
> @@ -211,7 +253,7 @@ clover::llvm::compile_program(const std::string &source,
>  
> auto ctx = create_context(r_log);
> auto c = create_compiler_instance(target, tokenize(opts + " input.cl"),
> - r_log);
> + device_version, r_log);

This should be part of patch 3 as that patch doesn't build otherwise.

> auto mod = compile(*ctx, *c, "input.cl", source, headers, target, opts,
>r_log);
>  
> @@ -280,7 +322,7 @@ clover::llvm::link_program(const std::vector 
> &modules,
> erase_if(equals("-create-library"), options);
>  
> auto ctx = create_context(r_log);
> -   auto c = create_compiler_instance(target, options, r_log);
> +   auto c = create_compiler_instance(target, options, device_version, r_log);

Same here, this should be in patch 3.

Thank you,
Pierre

> auto mod = link(*ctx, *c, modules, r_log);
>  
> optimize(*mod, c->getCodeGenOpts().OptimizationLevel, !create_library);
> -- 
> 2.11.0
> 
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Re: [Mesa-dev] A few clover fixes for both CTS and eventual 1.2 support

[Pierre Moreau]

With the comments in patch 4 taken care of, this series is

Reviewed-by: Pierre Moreau 


On 2017-07-21 — 23:19, Aaron Watry wrote:
> The first patch is one I've been sitting on for a few weeks while
> I've tried to chase down other issues with clover/llvm/libclc. It
> fixes at least one CTS test that I know of for CL 1.2.
> 
> The other 4 patches move the device version declaration to core/device
> and then use that along with the -cl-std option to determine which
> OpenCL language version to enable in clang.
> 
> I've done a full piglit run before/after, and there are no changes for me
> on radeonsi/pitcairn if the device is left at CL 1.1.
> 
> When I bump my platform/device versions to 1.2, the clang instance has
> been confirmed to enable 1.2 language features (like the static keyword
> required in test/cl/program/execute/static.cl, which goes skip->pass).
> 
> Anyway, happy reviewing.
> 
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[Mesa-dev] [PATCH 2/3] nv50, nvc0/ir: Copy shared memory per block to the program info structure and back

[Pierre Moreau]

In OpenCL/CUDA kernels, shared memory usage can be defined within the
kernel code. Those usage will only be picked up while parsing the
SPIR-V, during the translation phase of the program.

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/nv50/nv50_program.c | 2 ++
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c 
b/src/gallium/drivers/nouveau/nv50/nv50_program.c
index 92e73f8c12..6b472d7fdd 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
@@ -336,6 +336,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t 
chipset,
info->bin.sourceRep = PIPE_SHADER_IR_TGSI;
info->bin.source = (void *)prog->pipe.tokens;
 
+   info->bin.smemSize = prog->cp.smem_size;
info->io.auxCBSlot = 15;
info->io.ucpBase = NV50_CB_AUX_UCP_OFFSET;
info->io.genUserClip = prog->vp.clpd_nr;
@@ -382,6 +383,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t 
chipset,
prog->interps = info->bin.fixupData;
prog->max_gpr = MAX2(4, (info->bin.maxGPR >> 1) + 1);
prog->tls_space = info->bin.tlsSpace;
+   prog->cp.smem_size = info->bin.smemSize;
prog->mul_zero_wins = info->io.mul_zero_wins;
prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS;
 
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index e43a8de9f5..a6112f401e 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -579,6 +579,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t 
chipset,
info->optLevel = 3;
 #endif
 
+   info->bin.smemSize = prog->cp.smem_size;
info->io.genUserClip = prog->vp.num_ucps;
info->io.auxCBSlot = 15;
info->io.msInfoCBSlot = 15;
@@ -618,6 +619,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t 
chipset,
prog->relocs = info->bin.relocData;
prog->fixups = info->bin.fixupData;
prog->num_gprs = MAX2(4, (info->bin.maxGPR + 1));
+   prog->cp.smem_size = info->bin.smemSize;
prog->num_barriers = info->numBarriers;
 
prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS;
-- 
2.14.2

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[Mesa-dev] [PATCH 1/3] nv50/ir: Store shared memory per block in nv50_ir_prog_info

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index 76f08b1c3d..ffd53c9cd3 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -87,6 +87,7 @@ struct nv50_ir_prog_info
   int16_t maxGPR; /* may be -1 if none used */
   int16_t maxOutput;
   uint32_t tlsSpace;  /* required local memory per thread */
+  uint32_t smemSize;  /* required shared memory per block */
   uint32_t *code;
   uint32_t codeSize;
   uint32_t instructions;
-- 
2.14.2

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[Mesa-dev] [PATCH 3/3] nv50, nvc0/ir: Display shared memory usage in pipe_debug_message

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/nv50/nv50_program.c | 7 ---
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 7 ---
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c 
b/src/gallium/drivers/nouveau/nv50/nv50_program.c
index 6b472d7fdd..6e943a3d94 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
@@ -431,9 +431,10 @@ nv50_program_translate(struct nv50_program *prog, uint16_t 
chipset,
&prog->pipe.stream_output);
 
pipe_debug_message(debug, SHADER_INFO,
-  "type: %d, local: %d, gpr: %d, inst: %d, bytes: %d",
-  prog->type, info->bin.tlsSpace, prog->max_gpr,
-  info->bin.instructions, info->bin.codeSize);
+  "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, 
bytes: %d",
+  prog->type, info->bin.tlsSpace, info->bin.smemSize,
+  prog->max_gpr, info->bin.instructions,
+  info->bin.codeSize);
 
 out:
FREE(info);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index a6112f401e..c95a96c717 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -684,9 +684,10 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t 
chipset,
 &prog->pipe.stream_output);
 
pipe_debug_message(debug, SHADER_INFO,
-  "type: %d, local: %d, gpr: %d, inst: %d, bytes: %d",
-  prog->type, info->bin.tlsSpace, prog->num_gprs,
-  info->bin.instructions, info->bin.codeSize);
+  "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, 
bytes: %d",
+  prog->type, info->bin.tlsSpace, info->bin.smemSize,
+  prog->num_gprs, info->bin.instructions,
+  info->bin.codeSize);
 
 #ifdef DEBUG
if (debug_get_option("NV50_PROG_CHIPSET", NULL) && info->dbgFlags)
-- 
2.14.2

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Re: [Mesa-dev] [PATCH 3/3] nv50, nvc0/ir: Display shared memory usage in pipe_debug_message

[Pierre Moreau]

On 2017-10-02 — 19:24, Ilia Mirkin wrote:
> Looks like this will upset my parser which is the only consumer of this info:
> 
> https://cgit.freedesktop.org/mesa/shader-db/tree/nv-report.py
> 
> Should be doable to rewrite it to not care about order. Or stick your
> new thing at the end. Either way.

I placed it there to group it with other memory storage information such as
local, and gpr in some way.
I’ll send a patch to update nv-report (to which ML should I send it?).

> On Mon, Oct 2, 2017 at 2:57 PM, Pierre Moreau  wrote:
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/drivers/nouveau/nv50/nv50_program.c | 7 ---
> >  src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 7 ---
> >  2 files changed, 8 insertions(+), 6 deletions(-)
> >
> > diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c 
> > b/src/gallium/drivers/nouveau/nv50/nv50_program.c
> > index 6b472d7fdd..6e943a3d94 100644
> > --- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
> > +++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
> > @@ -431,9 +431,10 @@ nv50_program_translate(struct nv50_program *prog, 
> > uint16_t chipset,
> > 
> > &prog->pipe.stream_output);
> >
> > pipe_debug_message(debug, SHADER_INFO,
> > -  "type: %d, local: %d, gpr: %d, inst: %d, bytes: %d",
> > -  prog->type, info->bin.tlsSpace, prog->max_gpr,
> > -  info->bin.instructions, info->bin.codeSize);
> > +  "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, 
> > bytes: %d",
> > +  prog->type, info->bin.tlsSpace, info->bin.smemSize,
> > +  prog->max_gpr, info->bin.instructions,
> > +  info->bin.codeSize);
> >
> >  out:
> > FREE(info);
> > diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
> > b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> > index a6112f401e..c95a96c717 100644
> > --- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> > +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> > @@ -684,9 +684,10 @@ nvc0_program_translate(struct nvc0_program *prog, 
> > uint16_t chipset,
> >  &prog->pipe.stream_output);
> >
> > pipe_debug_message(debug, SHADER_INFO,
> > -  "type: %d, local: %d, gpr: %d, inst: %d, bytes: %d",
> > -  prog->type, info->bin.tlsSpace, prog->num_gprs,
> > -  info->bin.instructions, info->bin.codeSize);
> > +  "type: %d, local: %d, shared: %d, gpr: %d, inst: %d, 
> > bytes: %d",
> > +  prog->type, info->bin.tlsSpace, info->bin.smemSize,
> > +  prog->num_gprs, info->bin.instructions,
> > +  info->bin.codeSize);
> >
> >  #ifdef DEBUG
> > if (debug_get_option("NV50_PROG_CHIPSET", NULL) && info->dbgFlags)
> > --
> > 2.14.2
> >
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[Mesa-dev] [PATCH 1/2] nvir/nvc0: Properly lower 64-bit shifts when the shift value is >32

[Pierre Moreau]

Fixes: 61d7676df77 "nvc0/ir: add support for 64-bit shift lowering on SM20/SM30"

Fixes fs-shift-scalar-by-scalar.shader_test from piglit for the current
set-up:

uniform int64_t ival -0x7dfcfefbdf6536ff # bit pattern: 0x82030104209ac901
uniform uint64_t uval 0x140085010203
uniform int shl 36
uniform int shr 36
uniform int64_t iexpected_shl 0x09ac9010
uniform int64_t iexpected_shr -0x7dfcff0 # bit pattern: 0xf8203010
uniform uint64_t uexpected_shl 0x50102030
uniform uint64_t uexpected_shr 0x0140
draw rect ortho 12 0 4 4

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 7243b1d2e4..6b51b7607c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -216,7 +216,7 @@ NVC0LegalizeSSA::handleShift(Instruction *lo)
   // Compute LO (all shift values)
   bld.mkOp2(op, type, (dst[0] = bld.getSSA()), src[0], shift);
   // Compute HI (shift > 32)
-  bld.mkOp2(op, type, (hi2 = bld.getSSA()), src[1],
+  bld.mkOp2(op, type, (hi2 = bld.getSSA()), src[0],
 bld.mkOp1v(OP_NEG, TYPE_S32, bld.getSSA(), x32_minus_shift))
  ->setPredicate(CC_NOT_P, pred);
   bld.mkOp2(OP_UNION, TYPE_U32, (dst[1] = bld.getSSA()), hi1, hi2);
-- 
2.15.0

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[Mesa-dev] [PATCH 2/2] nvir/nvc0: Properly lower 64-bit SHL/SHR when the shift is an imm

[Pierre Moreau]

The existing lowering code assumed the shift would not be an immediate
but did not guard against it. However, in the constant folding pass, a
multiplication by a power-of-2 immediate would get optimised into a
shift-left instruction, with the shift value being an immediate.

Signed-off-by: Pierre Moreau 
---
 .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp  | 57 +++---
 1 file changed, 40 insertions(+), 17 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 6b51b7607c..2b09caa737 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -199,27 +199,50 @@ NVC0LegalizeSSA::handleShift(Instruction *lo)
   // between the right/left cases. The main difference is swapping hi/lo
   // on input and output.
 
-  Value *x32_minus_shift, *pred, *hi1, *hi2;
   DataType type = isSignedIntType(lo->dType) ? TYPE_S32 : TYPE_U32;
   operation antiop = op == OP_SHR ? OP_SHL : OP_SHR;
   if (op == OP_SHR)
  std::swap(src[0], src[1]);
-  bld.mkOp2(OP_ADD, TYPE_U32, (x32_minus_shift = bld.getSSA()), shift, 
bld.mkImm(0x20))
- ->src(0).mod = Modifier(NV50_IR_MOD_NEG);
-  bld.mkCmp(OP_SET, CC_LE, TYPE_U8, (pred = bld.getSSA(1, FILE_PREDICATE)),
-TYPE_U32, shift, bld.mkImm(32));
-  // Compute HI (shift <= 32)
-  bld.mkOp2(OP_OR, TYPE_U32, (hi1 = bld.getSSA()),
-bld.mkOp2v(op, TYPE_U32, bld.getSSA(), src[1], shift),
-bld.mkOp2v(antiop, TYPE_U32, bld.getSSA(), src[0], 
x32_minus_shift))
- ->setPredicate(CC_P, pred);
-  // Compute LO (all shift values)
-  bld.mkOp2(op, type, (dst[0] = bld.getSSA()), src[0], shift);
-  // Compute HI (shift > 32)
-  bld.mkOp2(op, type, (hi2 = bld.getSSA()), src[0],
-bld.mkOp1v(OP_NEG, TYPE_S32, bld.getSSA(), x32_minus_shift))
- ->setPredicate(CC_NOT_P, pred);
-  bld.mkOp2(OP_UNION, TYPE_U32, (dst[1] = bld.getSSA()), hi1, hi2);
+
+  ImmediateValue *shiftImm = shift->asImm();
+  if (shiftImm) {
+ if (shift->reg.data.u32 <= 32) {
+Value *x32_minus_shift = bld.getSSA();
+x32_minus_shift->reg.data.u32 = 32u - shiftImm->reg.data.u32;
+// Compute LO
+bld.mkOp2(op, type, (dst[0] = bld.getSSA()), src[0], shiftImm);
+// Compute HI
+bld.mkOp2(OP_OR, TYPE_U32, (dst[1] = bld.getSSA()),
+  bld.mkOp2v(op, TYPE_U32, bld.getSSA(), src[1], shiftImm),
+  bld.mkOp2v(antiop, TYPE_U32, bld.getSSA(), src[0], 
x32_minus_shift));
+ } else {
+Value *shift_minus_x32 = bld.getSSA();
+shift_minus_x32->reg.data.u32 = 32u - shiftImm->reg.data.u32;
+// Compute LO (shift >= 32, therefore filled with 0s)
+bld.mkOp1(OP_MOV, type, (dst[0] = bld.getSSA()), bld.mkImm(0x0));
+// Compute HI
+bld.mkOp2(op, type, (dst[1] = bld.getSSA()), src[0], 
shift_minus_x32);
+ }
+  } else {
+ Value *x32_minus_shift, *pred, *hi1, *hi2;
+ bld.mkOp2(OP_ADD, TYPE_U32, (x32_minus_shift = bld.getSSA()), shift, 
bld.mkImm(0x20))
+->src(0).mod = Modifier(NV50_IR_MOD_NEG);
+ bld.mkCmp(OP_SET, CC_LE, TYPE_U8, (pred = bld.getSSA(1, 
FILE_PREDICATE)),
+   TYPE_U32, shift, bld.mkImm(32));
+ // Compute HI (shift <= 32)
+ bld.mkOp2(OP_OR, TYPE_U32, (hi1 = bld.getSSA()),
+   bld.mkOp2v(op, TYPE_U32, bld.getSSA(), src[1], shift),
+   bld.mkOp2v(antiop, TYPE_U32, bld.getSSA(), src[0], 
x32_minus_shift))
+->setPredicate(CC_P, pred);
+ // Compute LO (all shift values)
+ bld.mkOp2(op, type, (dst[0] = bld.getSSA()), src[0], shift);
+ // Compute HI (shift > 32)
+ bld.mkOp2(op, type, (hi2 = bld.getSSA()), src[0],
+   bld.mkOp1v(OP_NEG, TYPE_S32, bld.getSSA(), x32_minus_shift))
+->setPredicate(CC_NOT_P, pred);
+ bld.mkOp2(OP_UNION, TYPE_U32, (dst[1] = bld.getSSA()), hi1, hi2);
+  }
+
   if (op == OP_SHR)
  std::swap(dst[0], dst[1]);
   bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
-- 
2.15.0

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Re: [Mesa-dev] [PATCH 2/2] nvir/nvc0: Properly lower 64-bit SHL/SHR when the shift is an imm

[Pierre Moreau]

On 2017-12-03 — 15:36, Ilia Mirkin wrote:
> On Sun, Dec 3, 2017 at 3:28 PM, Pierre Moreau  wrote:
> > The existing lowering code assumed the shift would not be an immediate
> > but did not guard against it. However, in the constant folding pass, a
> > multiplication by a power-of-2 immediate would get optimised into a
> > shift-left instruction, with the shift value being an immediate.
> 
> Given this support, it might make sense to allow immediates to be
> propagated into 64-bit shl/shr's in target_nvc0.cpp::insnCanLoad(), if
> it's not already there.
> 
> And please add some piglit tests which shift using immediates so that
> these might be better tested.
> 
> Please make sure that the SM35+ path is also read to have immediates
> in the shift arg -- I'm not sure that the SHF.L op's emission was
> written to fully handle that if it never happened in practice.

Will do that! I also realised this patch contains a few errors.

> 
> >
> > Signed-off-by: Pierre Moreau 
> > ---
> >  .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp  | 57 
> > +++---
> >  1 file changed, 40 insertions(+), 17 deletions(-)
> >
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > index 6b51b7607c..2b09caa737 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> > @@ -199,27 +199,50 @@ NVC0LegalizeSSA::handleShift(Instruction *lo)
> >// between the right/left cases. The main difference is swapping 
> > hi/lo
> >// on input and output.
> >
> > -  Value *x32_minus_shift, *pred, *hi1, *hi2;
> >DataType type = isSignedIntType(lo->dType) ? TYPE_S32 : TYPE_U32;
> >operation antiop = op == OP_SHR ? OP_SHL : OP_SHR;
> >if (op == OP_SHR)
> >   std::swap(src[0], src[1]);
> > -  bld.mkOp2(OP_ADD, TYPE_U32, (x32_minus_shift = bld.getSSA()), shift, 
> > bld.mkImm(0x20))
> > - ->src(0).mod = Modifier(NV50_IR_MOD_NEG);
> > -  bld.mkCmp(OP_SET, CC_LE, TYPE_U8, (pred = bld.getSSA(1, 
> > FILE_PREDICATE)),
> > -TYPE_U32, shift, bld.mkImm(32));
> > -  // Compute HI (shift <= 32)
> > -  bld.mkOp2(OP_OR, TYPE_U32, (hi1 = bld.getSSA()),
> > -bld.mkOp2v(op, TYPE_U32, bld.getSSA(), src[1], shift),
> > -bld.mkOp2v(antiop, TYPE_U32, bld.getSSA(), src[0], 
> > x32_minus_shift))
> > - ->setPredicate(CC_P, pred);
> > -  // Compute LO (all shift values)
> > -  bld.mkOp2(op, type, (dst[0] = bld.getSSA()), src[0], shift);
> > -  // Compute HI (shift > 32)
> > -  bld.mkOp2(op, type, (hi2 = bld.getSSA()), src[0],
> > -bld.mkOp1v(OP_NEG, TYPE_S32, bld.getSSA(), 
> > x32_minus_shift))
> > - ->setPredicate(CC_NOT_P, pred);
> > -  bld.mkOp2(OP_UNION, TYPE_U32, (dst[1] = bld.getSSA()), hi1, hi2);
> > +
> > +  ImmediateValue *shiftImm = shift->asImm();
> > +  if (shiftImm) {
> > + if (shift->reg.data.u32 <= 32) {
> > +Value *x32_minus_shift = bld.getSSA();
> > +x32_minus_shift->reg.data.u32 = 32u - shiftImm->reg.data.u32;
> > +// Compute LO
> > +bld.mkOp2(op, type, (dst[0] = bld.getSSA()), src[0], shiftImm);
> > +// Compute HI
> > +bld.mkOp2(OP_OR, TYPE_U32, (dst[1] = bld.getSSA()),
> > +  bld.mkOp2v(op, TYPE_U32, bld.getSSA(), src[1], 
> > shiftImm),
> > +  bld.mkOp2v(antiop, TYPE_U32, bld.getSSA(), src[0], 
> > x32_minus_shift));
> > + } else {
> > +Value *shift_minus_x32 = bld.getSSA();
> > +shift_minus_x32->reg.data.u32 = 32u - shiftImm->reg.data.u32;
> > +// Compute LO (shift >= 32, therefore filled with 0s)
> > +bld.mkOp1(OP_MOV, type, (dst[0] = bld.getSSA()), 
> > bld.mkImm(0x0));
> > +// Compute HI
> > +bld.mkOp2(op, type, (dst[1] = bld.getSSA()), src[0], 
> > shift_minus_x32);
> > + }
> > +  } else {
> > + Value *x32_minus_shift, *pred, *hi1, *hi2;
> > + bld.mkOp2(OP_ADD, TYPE_U32, (x32_minus_shift = bld.getSSA()), 
> > shift, bld.mkImm(0x20))
> > +->src(0).mod = Modifier(NV50_IR_MOD_NEG);
> > + bld.mkCmp(OP_SET, CC_LE, TYPE_U8, (pred = bld.getSSA(1, 
> &g

[Mesa-dev] [PATCH] nvir: Always split 64-bit IMAD/IMUL operations

[Pierre Moreau]

Those operations do not map to actual hardware instructions, therefore
those should always be lowered to 32-bit instructions.

Fixes: 009c54aa7af "nv50/ir: Split 64-bit integer MAD/MUL operations"
Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 61d4e6a2d0..14bdcea2ca 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -3794,7 +3794,7 @@ Program::optimizeSSA(int level)
RUN_PASS(2, AlgebraicOpt, run);
RUN_PASS(2, ModifierFolding, run); // before load propagation -> less checks
RUN_PASS(1, ConstantFolding, foldAll);
-   RUN_PASS(1, Split64BitOpPreRA, run);
+   RUN_PASS(0, Split64BitOpPreRA, run);
RUN_PASS(1, LoadPropagation, run);
RUN_PASS(1, IndirectPropagation, run);
RUN_PASS(2, MemoryOpt, run);
-- 
2.15.0

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Re: [Mesa-dev] [PATCH] mesa: define nir_spirv_supported_capabilities

[Pierre Moreau]

Hello Alejandro,

As far as I understand, nir_spirv_supported_capabilities is being filled in by
the driver and then fetched by the API entrypoint to check the capabilities
required by the SPIR-V binary given as input. And this is done regardless of
the input IR used by the driver, be it NIR, LLVM IR, TGSI or others. So
couldn’t it be just named spirv_supported_capabilities? Unless it also reflects
the capabilities supported by the IR being used.

I guess nir_spirv_supported_capabilities could be extended later on to also add
capabilities specific to OpenCL when clover reaches OpenCL 1.2 support (and can
start accepting SPIR-V binaries as input through the cl_khr_il_program
extension), or would it be better to have a separate one for OpenCL?

I haven’t had time to look at the whole gl_spirv series yet, so I am sorry if
this is something that has already been brought and answered in that thread.

Regards,
Pierre

On 2017-12-06 — 09:57, Alejandro Piñeiro wrote:
> Until now it was part of spirv_to_nir_options. But it will be used on
> the implementation of ARB_gl_spirv and ARB_spirv_extensions, and added
> to the OpenGL context, as a way to save what SPIR-V capabilities the
> current OpenGL implementation supports.
> ---
> 
> We are sending this commit in advance of a v3 of the initial gl_spirv
> and spirv_extensions support series. The issue is that lately there
> were a lot of activity on the spirv/spir_to_nir code base, and we are
> being fixing rebase conflicts constantly. Getting this commit on
> master would make things easier.
> 
> FWIW, this patch is similar to one that Ian Romanick already granted
> Rb, but that was dropped after all the mentioned changes:
> https://lists.freedesktop.org/archives/mesa-dev/2017-November/178261.html
> 
>  src/compiler/spirv/nir_spirv.h | 16 +++-
>  src/mesa/main/mtypes.h | 12 
>  2 files changed, 15 insertions(+), 13 deletions(-)
> 
> diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
> index 43ec19d5a50..113bd710a00 100644
> --- a/src/compiler/spirv/nir_spirv.h
> +++ b/src/compiler/spirv/nir_spirv.h
> @@ -28,7 +28,8 @@
>  #ifndef _NIR_SPIRV_H_
>  #define _NIR_SPIRV_H_
>  
> -#include "nir/nir.h"
> +#include "compiler/nir/nir.h"
> +#include "main/mtypes.h"
>  
>  #ifdef __cplusplus
>  extern "C" {
> @@ -57,18 +58,7 @@ struct spirv_to_nir_options {
>  */
> bool lower_workgroup_access_to_offsets;
>  
> -   struct {
> -  bool float64;
> -  bool image_ms_array;
> -  bool tessellation;
> -  bool draw_parameters;
> -  bool image_read_without_format;
> -  bool image_write_without_format;
> -  bool int64;
> -  bool multiview;
> -  bool variable_pointers;
> -  bool storage_16bit;
> -   } caps;
> +   struct nir_spirv_supported_capabilities caps;
>  
> struct {
>void (*func)(void *private_data,
> diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
> index b478f6158e2..7da05aa3ee9 100644
> --- a/src/mesa/main/mtypes.h
> +++ b/src/mesa/main/mtypes.h
> @@ -3579,6 +3579,18 @@ struct gl_program_constants
> GLuint MaxShaderStorageBlocks;
>  };
>  
> +struct nir_spirv_supported_capabilities {
> +   bool float64;
> +   bool image_ms_array;
> +   bool tessellation;
> +   bool draw_parameters;
> +   bool image_read_without_format;
> +   bool image_write_without_format;
> +   bool int64;
> +   bool multiview;
> +   bool variable_pointers;
> +   bool storage_16bit;
> +};
>  
>  /**
>   * Constants which may be overridden by device driver during context creation
> -- 
> 2.11.0
> 
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Re: [Mesa-dev] [PATCH v3] mesa/spirv: move and rename nir_spirv_supported_capabilities

[Pierre Moreau]

Thank you for the changes!

Reviewed-by: Pierre Moreau 

On 2017-12-07 — 17:12, Alejandro Piñeiro wrote:
> To avoid any vulkan driver to include the GL mtypes.h. Renamed as
> eventually this could be used by drivers not using nir.
> 
> v2: remove compiler/spirv/spirv.h from mtypes (Alejandro)
> v3: added the definition at compiler/shader_info.h (Jason Ekstrand)
> ---
> 
> Sorry for not realizing that spirv.h was a generated file. I also
> preferred to add it to shader_info.h. Both options 2 and 3 seemed
> somewhat an overkill
> 
>  src/compiler/shader_info.h | 13 +
>  src/compiler/spirv/nir_spirv.h |  4 ++--
>  src/mesa/main/mtypes.h | 13 -
>  3 files changed, 15 insertions(+), 15 deletions(-)
> 
> diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
> index bcb3f0fffac..c9140ba9752 100644
> --- a/src/compiler/shader_info.h
> +++ b/src/compiler/shader_info.h
> @@ -31,6 +31,19 @@
>  extern "C" {
>  #endif
>  
> +struct spirv_supported_capabilities {
> +   bool float64;
> +   bool image_ms_array;
> +   bool tessellation;
> +   bool draw_parameters;
> +   bool image_read_without_format;
> +   bool image_write_without_format;
> +   bool int64;
> +   bool multiview;
> +   bool variable_pointers;
> +   bool storage_16bit;
> +};
> +
>  typedef struct shader_info {
> const char *name;
>  
> diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
> index 113bd710a00..a2c40e57d18 100644
> --- a/src/compiler/spirv/nir_spirv.h
> +++ b/src/compiler/spirv/nir_spirv.h
> @@ -29,7 +29,7 @@
>  #define _NIR_SPIRV_H_
>  
>  #include "compiler/nir/nir.h"
> -#include "main/mtypes.h"
> +#include "compiler/shader_info.h"
>  
>  #ifdef __cplusplus
>  extern "C" {
> @@ -58,7 +58,7 @@ struct spirv_to_nir_options {
>  */
> bool lower_workgroup_access_to_offsets;
>  
> -   struct nir_spirv_supported_capabilities caps;
> +   struct spirv_supported_capabilities caps;
>  
> struct {
>void (*func)(void *private_data,
> diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
> index 7b7137624c7..397b113dfbc 100644
> --- a/src/mesa/main/mtypes.h
> +++ b/src/mesa/main/mtypes.h
> @@ -3578,19 +3578,6 @@ struct gl_program_constants
> GLuint MaxShaderStorageBlocks;
>  };
>  
> -struct nir_spirv_supported_capabilities {
> -   bool float64;
> -   bool image_ms_array;
> -   bool tessellation;
> -   bool draw_parameters;
> -   bool image_read_without_format;
> -   bool image_write_without_format;
> -   bool int64;
> -   bool multiview;
> -   bool variable_pointers;
> -   bool storage_16bit;
> -};
> -
>  /**
>   * Constants which may be overridden by device driver during context creation
>   * but are never changed after that.
> -- 
> 2.11.0
> 
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Re: [Mesa-dev] [PATCH v2 0/3] nouveau compiler warning cleanups

[Pierre Moreau]

Series is

Reviewed-by: Pierre Moreau 

On 2017-12-16 — 23:00, Rhys Kidd wrote:
> Couple of little compiler warning cleanups so that nouveau builds without any
> warnings for meson's debug and release builds with gcc 7.2.0
> 
> v2: Add preventative comment (Ilia Mirkin)
> 
> Rhys Kidd (3):
>   nv50: Fix unused var warning in release build
>   nvc0: Fix unused var warnings in release build
>   nv50/ir: Fix unused var warnings in release build
> 
>  src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 2 +-
>  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp  | 4 +++-
>  src/gallium/drivers/nouveau/nv50/nv98_video.c | 3 ++-
>  src/gallium/drivers/nouveau/nvc0/nvc0_video.c | 7 ---
>  4 files changed, 10 insertions(+), 6 deletions(-)
> 
> -- 
> 2.14.1
> 
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Re: [Mesa-dev] [PATCH v2 03/31] nvir: move common converter code in base class

[Pierre Moreau]

With the comments below addressed, this patch is

Reviewed-by: Pierre Moreau 

On 2018-01-04 — 16:01, Karol Herbst wrote:
> v2: remove TGSI related bits
> 
> Signed-off-by: Karol Herbst 
> ---
>  src/gallium/drivers/nouveau/Makefile.sources   |   2 +
>  .../nouveau/codegen/nv50_ir_from_common.cpp| 107 
> +
>  .../drivers/nouveau/codegen/nv50_ir_from_common.h  |  58 +++
>  .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp  | 106 +---
>  src/gallium/drivers/nouveau/meson.build|   2 +
>  5 files changed, 172 insertions(+), 103 deletions(-)
>  create mode 100644 
> src/gallium/drivers/nouveau/codegen/nv50_ir_from_common.cpp
>  create mode 100644 src/gallium/drivers/nouveau/codegen/nv50_ir_from_common.h
> 
> diff --git a/src/gallium/drivers/nouveau/Makefile.sources 
> b/src/gallium/drivers/nouveau/Makefile.sources
> index 65f08c7d8d..fee5e59522 100644
> --- a/src/gallium/drivers/nouveau/Makefile.sources
> +++ b/src/gallium/drivers/nouveau/Makefile.sources
> @@ -115,6 +115,8 @@ NV50_CODEGEN_SOURCES := \
>   codegen/nv50_ir_build_util.h \
>   codegen/nv50_ir_driver.h \
>   codegen/nv50_ir_emit_nv50.cpp \
> + codegen/nv50_ir_from_common.cpp \
> + codegen/nv50_ir_from_common.h \
>   codegen/nv50_ir_from_tgsi.cpp \
>   codegen/nv50_ir_graph.cpp \
>   codegen/nv50_ir_graph.h \
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_common.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_common.cpp
> new file mode 100644
> index 00..58e9ab311b
> --- /dev/null
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_common.cpp
> @@ -0,0 +1,107 @@
> +/*
> + * Copyright 2011 Christoph Bumiller
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "codegen/nv50_ir_from_common.h"
> +
> +namespace nv50_ir {
> +
> +ConverterCommon::ConverterCommon(Program *prog, nv50_ir_prog_info *info)
> +   :  BuildUtil(prog),
> +  info(info) {}
> +
> +ConverterCommon::Subroutine *
> +ConverterCommon::getSubroutine(unsigned ip)
> +{
> +   std::map::iterator it = sub.map.find(ip);
> +
> +   if (it == sub.map.end())
> +  it = sub.map.insert(std::make_pair(
> +  ip, Subroutine(new Function(prog, "SUB", ip.first;
> +
> +   return &it->second;
> +}
> +
> +ConverterCommon::Subroutine *
> +ConverterCommon::getSubroutine(Function *f)
> +{
> +   unsigned ip = f->getLabel();
> +   std::map::iterator it = sub.map.find(ip);
> +
> +   if (it == sub.map.end())
> +  it = sub.map.insert(std::make_pair(ip, Subroutine(f))).first;
> +
> +   return &it->second;
> +}
> +
> +uint8_t
> +ConverterCommon::translateInterpMode(const nv50_ir_varying *var, operation& 
> op)

As you are only moving code around, I would not make any modifications to that
code, therefore I would keep the “struct” of “const struct nv50_ir_varying *”,
even if it does not matter in C++.

> +{
> +   uint8_t mode = NV50_IR_INTERP_PERSPECTIVE;
> +
> +   if (var->flat)
> +  mode = NV50_IR_INTERP_FLAT;
> +   else
> +   if (var->linear)
> +  mode = NV50_IR_INTERP_LINEAR;
> +   else
> +   if (var->sc)
> +  mode = NV50_IR_INTERP_SC;
> +
> +   op = (mode == NV50_IR_INTERP_PERSPECTIVE || mode == NV50_IR_INTERP_SC)
> +  ? OP_PINTERP : OP_LINTERP;
> +
> +   if (var->centroid)
> +  mode |= NV50_IR_INTERP_CENTROID;
> +
> +   return mode;
> +}
> +
> +void
> +ConverterCommon::handleUserClipPlanes()
> +{
> +   Value *res[8];
> +   int 

[Mesa-dev] [PATCH] nv50/ir: Properly fold constants in SPLIT operation

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index e032255178..57223d311c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -975,8 +975,9 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, 
int s)
   bld.setPosition(i, false);
 
   uint8_t size = i->getDef(0)->reg.size;
-  uint32_t mask = (1ULL << size) - 1;
-  assert(size <= 32);
+  uint8_t bitsize = size * 8;
+  uint32_t mask = (1ULL << bitsize) - 1;
+  assert(bitsize <= 32);
 
   uint64_t val = imm0.reg.data.u64;
   for (int8_t d = 0; i->defExists(d); ++d) {
@@ -984,7 +985,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, 
int s)
  assert(def->reg.size == size);
 
  newi = bld.mkMov(def, bld.mkImm((uint32_t)(val & mask)), TYPE_U32);
- val >>= size;
+ val >>= bitsize;
   }
   delete_Instruction(prog, i);
   break;
-- 
2.13.1

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Re: [Mesa-dev] [RFC PATCH 00/17] Introducing SPIR-V support to clover

[Pierre Moreau]

Hello,

I am working on an updated version of this series, which will include changes
that have been suggested, as well as support for structures as a kernel
argument. Along those, I was also thinking of doing some other changes to the
SPIR-V linker:

a) Store some metadata about the SPIR-V module, such as the word offset of
   each of the different sections: if one wants to run an operation on a single
   section of the module, it is no longer needed to iterate over everything in
   front of that section.
   It could also contain the width of the literals used in the switch
   statements, avoiding having to track those every time one iterate over the
   module.
   Maybe tables for imported and exported symbols, as well?

b) Change the code from having a single loop iterating over the whole module,
   into having one loop per section. This will avoid testing for entry points,
   decorations, types, etc. when we are already iterating over the function
   bodies, possibly improving performance.

c) Remove duplicate decorations, capabilities, names? and types found in the
   linked module. Types is the most important one, as it currently prevents us
   from validating the linked module.

I am still thinking of leaving out of this series, the linking options support
for the linker.

As for clover, it should check that the devices actually support the
capabilities present in the module, so I will add that as well.

Do you think this would make sense, and should I be implementing them in this
series, or should I leave them be for later? (Point b), if deemed useful,
should be part of this series as it would rewrite a decent chunk of the code.)
If you have any other comments, feel free to share it. :-)

Best regards,
Pierre


On 11:56 pm - May 03 2017, Pierre Moreau wrote:
> Hello everyone,
> 
> I have been working on converting SPIR-V to NVIR in order to run OpenCL 
> kernels
> on Nouveau, and I would like to submit the first part of that work for review.
> Pieces from the SPIR-V to NVIR conversion work will be submitted once I have
> cleaned it up and this series has progressed through the reviewing process.
> 
> 
> What’s in this Series?
> --
> 
> The focus of this series is to let clover accept SPIR-V binaries, either
> through `clCreateProgramWithBinary()`, or through `clCreateProgramWithIL()`.
> The latter function is the proper way to feed SPIR-V binaries using the OpenCL
> API, however it was only introduced in OpenCL 2.1 (more on “why supporting
> SPIR-V through `clCreateProgramWithBinary()` can be interesting” further 
> down).
> 
> As several SPIR-V binaries can be linked together using the OpenCL API, I
> implemented a SPIR-V linker, which is not perfect, but does the job. I tested
> linking against a variable, a function, a library, and a function containing a
> switch statement; switch-statements require you to keep some extra stuff 
> around
> to be properly parsed.
> I also added a few “utilities” functions for retrieving and setting a word /
> retrieving a string from a SPIR-V binary, and converting a SPIR-V binary to 
> the
> same endianness as the host CPU.
> 
> For validating SPIR-V binaries, I use an external tool, SPIRV-Tools [1]. It
> could also be used in anv, and possibly radv if there is no validation done
> already, but I haven’t looked into that.
> 
> A few modifications have been made to the pipe interface, to add a define for
> the SPIR-V IR, and store the program’s byte-size along the program in
> `struct pipe_compute_state`. The latter will only be needed by the consumer of
> the SPIR-V, which is not part of this series. However, since clover needs to
> fill that information in and I was modifying clover already, I decided to add
> the new attribute in this series.
> 
> 
> Missing
> ---
> 
> * As there is no upstream version of LLVM which can produce SPIR-V out of
>   OpenCL code, clCreateProgramWithSource will refuse to work if the target IR
>   is SPIR-V, for now.
> 
> * Optimisation linking options are parsed by the SPIR-V code in clover but
>   are not passed along to the linker as it does not support them.
> 
> 
> To Improve
> --
> 
> The SPIR-V binary resulting from the linking of multiple SPIR-V binaries could
> be cleaned up:
> 
> * As capabilities are simply copied from all the involved binaries, you can 
> end
>   up with multiple times the same capabilities in the resulting binary; this
>   shouldn’t have any impact though.
> 
> * Similarly, types can end up being duplicated under different IDs, which
>   should have no other impact than making SPIR-V validators unhappy.
> 
> 
> Misc.
> -
> 
> Being able to feed SPIR-V binaries through `clCreateProgramWithBinary()` is 
> not
> really useful at the moment: the sa

Re: [Mesa-dev] [PATCH] nv50/ir: Properly fold constants in SPLIT operation

[Pierre Moreau]

I think we never split values that are < 64-bit wide, as the RA pass does not
support < 32-bit wide values. And 64-bit values aren’t used that often, I would
guess.

Does adding the Fixes: tag here work, or should I send a new version?

Fixes: b7d9677d ("nv50/ir: constant fold OP_SPLIT")

On 02:46 pm - Jun 21 2017, Ilia Mirkin wrote:
> Wait, this is actively buggy! How did this ever work :( I guess we
> don't split immediates too frequently, and I was testing it with
> zero's or something.
> 
> Can you figure out the commit where I added this idiotic code and add
> a Fixes: tag?
> 
> Reviewed-by: Ilia Mirkin 
> Cc: mesa-sta...@lists.freedesktop.org
> 
> On Mon, Jun 12, 2017 at 4:53 PM, Pierre Moreau  wrote:
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 7 ---
> >  1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
> > b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > index e032255178..57223d311c 100644
> > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> > @@ -975,8 +975,9 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
> > &imm0, int s)
> >bld.setPosition(i, false);
> >
> >uint8_t size = i->getDef(0)->reg.size;
> > -  uint32_t mask = (1ULL << size) - 1;
> > -  assert(size <= 32);
> > +  uint8_t bitsize = size * 8;
> > +  uint32_t mask = (1ULL << bitsize) - 1;
> > +  assert(bitsize <= 32);
> >
> >uint64_t val = imm0.reg.data.u64;
> >for (int8_t d = 0; i->defExists(d); ++d) {
> > @@ -984,7 +985,7 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
> > &imm0, int s)
> >   assert(def->reg.size == size);
> >
> >   newi = bld.mkMov(def, bld.mkImm((uint32_t)(val & mask)), 
> > TYPE_U32);
> 
> Is that what you want here? Should this be typeOfSize(size) ?
> 
> I guess you want to split this into 32-bit values anyways since that's
> what everything processes... eventually we might want to play around
> with the SIMD opcodes but probably not soon.
> 
> > - val >>= size;
> > + val >>= bitsize;
> >}
> >delete_Instruction(prog, i);
> >break;
> > --
> > 2.13.1
> >
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Re: [Mesa-dev] [PATCH 1/2] nv50/ir: move POW lowering into BuildUtil

[Pierre Moreau]

Reviewed-by: Pierre Moreau 

On 09:28 pm - Jun 22 2017, Karol Herbst wrote:
> It's the same for all supported chipsets.
> 
> Signed-off-by: Karol Herbst 
> ---
>  .../drivers/nouveau/codegen/nv50_ir_build_util.cpp| 16 
>  .../drivers/nouveau/codegen/nv50_ir_build_util.h  |  2 ++
>  .../drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 19 
> +--
>  .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 18 +-
>  .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h   |  1 -
>  5 files changed, 20 insertions(+), 36 deletions(-)
> 
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> index 84ebfdb1cb..5756e1b4d4 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
> @@ -636,4 +636,20 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction 
> *i,
> return hi;
>  }
>  
> +bool
> +BuildUtil::lowerPOW(Instruction *i)
> +{
> +   LValue *val = getScratch();
> +
> +   mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
> +   mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
> +   mkOp1(OP_PREEX2, TYPE_F32, val, val);
> +
> +   i->op = OP_EX2;
> +   i->setSrc(0, val);
> +   i->setSrc(1, NULL);
> +
> +   return true;
> +}
> +
>  } // namespace nv50_ir
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
> index d171f64d9a..aac5b609e2 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
> @@ -103,6 +103,8 @@ public:
>  
> Value *loadImm(Value *dst, int i) { return loadImm(dst, (uint32_t)i); }
>  
> +   bool lowerPOW(Instruction *);
> +
> // returns high part of the operation
> static Instruction *split64BitOpPostRA(Function *, Instruction *,
>Value *zero, Value *carry);
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
> index 36ab837f6e..2b187086cf 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
> @@ -626,7 +626,6 @@ private:
>  
> bool handleDIV(Instruction *);
> bool handleSQRT(Instruction *);
> -   bool handlePOW(Instruction *);
>  
> bool handleSET(Instruction *);
> bool handleSLCT(CmpInstruction *);
> @@ -1245,22 +1244,6 @@ NV50LoweringPreSSA::handleSQRT(Instruction *i)
>  }
>  
>  bool
> -NV50LoweringPreSSA::handlePOW(Instruction *i)
> -{
> -   LValue *val = bld.getScratch();
> -
> -   bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
> -   bld.mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
> -   bld.mkOp1(OP_PREEX2, TYPE_F32, val, val);
> -
> -   i->op = OP_EX2;
> -   i->setSrc(0, val);
> -   i->setSrc(1, NULL);
> -
> -   return true;
> -}
> -
> -bool
>  NV50LoweringPreSSA::handleEXPORT(Instruction *i)
>  {
> if (prog->getType() == Program::TYPE_FRAGMENT) {
> @@ -1416,7 +1399,7 @@ NV50LoweringPreSSA::visit(Instruction *i)
> case OP_SELP:
>return handleSELP(i);
> case OP_POW:
> -  return handlePOW(i);
> +  return bld.lowerPOW(i);
> case OP_DIV:
>return handleDIV(i);
> case OP_SQRT:
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> index 64d743708a..bb9ef7a468 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
> @@ -2700,22 +2700,6 @@ NVC0LoweringPass::handleSQRT(Instruction *i)
>  }
>  
>  bool
> -NVC0LoweringPass::handlePOW(Instruction *i)
> -{
> -   LValue *val = bld.getScratch();
> -
> -   bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
> -   bld.mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
> -   bld.mkOp1(OP_PREEX2, TYPE_F32, val, val);
> -
> -   i->op = OP_EX2;
> -   i->setSrc(0, val);
> -   i->setSrc(1, NULL);
> -
> -   return true;
> -}
> -
> -bool
>  NVC0LoweringPass::handleEXPORT(Instruction *i)
>  {
> if (prog->getType() == Program::TYPE_FRAGMENT) {
> @@ -2813,7 +2797,7 @@ NVC0LoweringPass::visit(Instruction *i)
>i->setSrc(0, i->getDef(0));
>break;
> case OP_POW:
> -  return handlePOW(i);
> +  retu

[Mesa-dev] [RFC PATCH 03/17] include/pipe: Define SPIRV as an IR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/include/pipe/p_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index ce2cfd1d88..71991383c2 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -850,6 +850,7 @@ enum pipe_shader_ir
PIPE_SHADER_IR_LLVM,
PIPE_SHADER_IR_NATIVE,
PIPE_SHADER_IR_NIR,
+   PIPE_SHADER_IR_SPIRV
 };
 
 /**
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 04/17] include/pipe: Store the byte-size of a SPIR-V binary

[Pierre Moreau]

Besides parsing all the opcodes until reaching the EOF character, there
is no way to compute the size of a SPIR-V binary. Therefore, it is
easier to pass it along the SPIR-V binary in pipe_compute_state.

Signed-off-by: Pierre Moreau 
---
 src/gallium/include/pipe/p_state.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/include/pipe/p_state.h 
b/src/gallium/include/pipe/p_state.h
index ce9ca34d29..1f8fdf530f 100644
--- a/src/gallium/include/pipe/p_state.h
+++ b/src/gallium/include/pipe/p_state.h
@@ -810,6 +810,7 @@ struct pipe_compute_state
 {
enum pipe_shader_ir ir_type; /**< IR type contained in prog. */
const void *prog; /**< Compute program to be executed. */
+   unsigned prog_num_bytes; /**< Program size in bytes, used by SPIR-V. */
unsigned req_local_mem; /**< Required size of the LOCAL resource. */
unsigned req_private_mem; /**< Required size of the PRIVATE resource. */
unsigned req_input_mem; /**< Required size of the INPUT resource. */
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 01/17] auxiliary: Introduce utilities for SPIR-V binaries

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/auxiliary/Makefile.am |  1 +
 src/gallium/auxiliary/Makefile.sources|  4 ++
 src/gallium/auxiliary/spirv/spirv_utils.c | 75 +++
 src/gallium/auxiliary/spirv/spirv_utils.h | 86 +++
 4 files changed, 166 insertions(+)
 create mode 100644 src/gallium/auxiliary/spirv/spirv_utils.c
 create mode 100644 src/gallium/auxiliary/spirv/spirv_utils.h

diff --git a/src/gallium/auxiliary/Makefile.am 
b/src/gallium/auxiliary/Makefile.am
index dc4bd4a40c..d2530a1f90 100644
--- a/src/gallium/auxiliary/Makefile.am
+++ b/src/gallium/auxiliary/Makefile.am
@@ -19,6 +19,7 @@ AM_CXXFLAGS = \
 libgallium_la_SOURCES = \
$(C_SOURCES) \
$(NIR_SOURCES) \
+   $(SPIRV_SOURCES) \
$(GENERATED_SOURCES)
 
 if HAVE_LIBDRM
diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index dbdb3ca815..f4817742ff 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -312,6 +312,10 @@ NIR_SOURCES := \
nir/tgsi_to_nir.c \
nir/tgsi_to_nir.h
 
+SPIRV_SOURCES := \
+   spirv/spirv_utils.c \
+   spirv/spirv_utils.h
+
 VL_SOURCES := \
vl/vl_bicubic_filter.c \
vl/vl_bicubic_filter.h \
diff --git a/src/gallium/auxiliary/spirv/spirv_utils.c 
b/src/gallium/auxiliary/spirv/spirv_utils.c
new file mode 100644
index 00..a2334d6909
--- /dev/null
+++ b/src/gallium/auxiliary/spirv/spirv_utils.c
@@ -0,0 +1,75 @@
+/**
+ *
+ * Copyright 2017 Pierre Moreau
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include "spirv_utils.h"
+
+#include "compiler/spirv/spirv.h"
+#include "util/u_math.h"
+
+spirv_word
+spirv_get_word(const char *binary, unsigned word_offset)
+{
+   return ((spirv_word *) binary)[word_offset];
+}
+
+void
+spirv_set_word(char *binary, unsigned word_offset, spirv_word word)
+{
+   ((spirv_word *) binary)[word_offset] = word;
+}
+
+const char *
+spirv_get_string(const char *binary, unsigned word_offset)
+{
+   return binary + word_offset * sizeof(spirv_word);
+}
+
+bool
+spirv_is_binary_spirv(const char *binary)
+{
+   const spirv_word first_word = spirv_get_word(binary, 0u);
+   const bool ret = (first_word == SpvMagicNumber) ||
+(util_bswap32(first_word) == SpvMagicNumber);
+   return ret;
+}
+
+char *
+spirv_spirv_to_cpu(const char *binary, size_t length)
+{
+   spirv_word word = spirv_get_word(binary, 0u);
+   size_t i = 0;
+   char *cpu_endianness_binary = malloc(length);
+   if (word == SpvMagicNumber)
+  return memcpy(cpu_endianness_binary, binary, length);
+
+   for (i = 0; i < length; i += 4) {
+  word = spirv_get_word(binary, i);
+  spirv_set_word(cpu_endianness_binary, i, util_bswap32(word));
+   }
+
+   return cpu_endianness_binary;
+}
diff --git a/src/gallium/auxiliary/spirv/spirv_utils.h 
b/src/gallium/auxiliary/spirv/spirv_utils.h
new file mode 100644
index 00..2db7f3b9dd
--- /dev/null
+++ b/src/gallium/auxiliary/spirv/spirv_utils.h
@@ -0,0 +1,86 @@
+/******
+ *
+ * Copyright 2017 Pierre Moreau
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the fo

[Mesa-dev] [RFC PATCH 05/17] include/CL: Add clCreateProgramWithIL from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 include/CL/cl.h  | 6 ++
 include/CL/cl_platform.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/include/CL/cl.h b/include/CL/cl.h
index 316565d6e4..44d7aedc3e 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -757,6 +757,12 @@ clCreateProgramWithBuiltInKernels(cl_context/* 
context */,
   const char *  /* kernel_names */,
   cl_int *  /* errcode_ret */) 
CL_API_SUFFIX__VERSION_1_2;
 
+extern CL_API_ENTRY cl_program CL_API_CALL
+clCreateProgramWithIL(cl_context/* context */,
+ const void*/* il */,
+ size_t /* length */,
+ cl_int*/* errcode_ret */) 
CL_API_SUFFIX__VERSION_2_1;
+
 extern CL_API_ENTRY cl_int CL_API_CALL
 clRetainProgram(cl_program /* program */) CL_API_SUFFIX__VERSION_1_0;
 
diff --git a/include/CL/cl_platform.h b/include/CL/cl_platform.h
index 7f6f5e8a74..105d3cc1f0 100644
--- a/include/CL/cl_platform.h
+++ b/include/CL/cl_platform.h
@@ -75,6 +75,7 @@ extern "C" {
 #define CL_EXT_SUFFIX__VERSION_1_1
 #define CL_API_SUFFIX__VERSION_1_2
 #define CL_EXT_SUFFIX__VERSION_1_2
+#define CL_API_SUFFIX__VERSION_2_1
 
 #ifdef __GNUC__
 #ifdef CL_USE_DEPRECATED_OPENCL_1_0_APIS
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 02/17] auxiliary: Implement a linker for SPIR-V binaries

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/auxiliary/Makefile.sources |4 +-
 src/gallium/auxiliary/spirv/spirv_linker.c | 1324 
 src/gallium/auxiliary/spirv/spirv_linker.h |   67 ++
 3 files changed, 1394 insertions(+), 1 deletion(-)
 create mode 100644 src/gallium/auxiliary/spirv/spirv_linker.c
 create mode 100644 src/gallium/auxiliary/spirv/spirv_linker.h

diff --git a/src/gallium/auxiliary/Makefile.sources 
b/src/gallium/auxiliary/Makefile.sources
index f4817742ff..91aac49dfb 100644
--- a/src/gallium/auxiliary/Makefile.sources
+++ b/src/gallium/auxiliary/Makefile.sources
@@ -314,7 +314,9 @@ NIR_SOURCES := \
 
 SPIRV_SOURCES := \
spirv/spirv_utils.c \
-   spirv/spirv_utils.h
+   spirv/spirv_utils.h \
+   spirv/spirv_linker.c \
+   spirv/spirv_linker.h
 
 VL_SOURCES := \
vl/vl_bicubic_filter.c \
diff --git a/src/gallium/auxiliary/spirv/spirv_linker.c 
b/src/gallium/auxiliary/spirv/spirv_linker.c
new file mode 100644
index 00..9d060be0cc
--- /dev/null
+++ b/src/gallium/auxiliary/spirv/spirv_linker.c
@@ -0,0 +1,1324 @@
+/**
+ *
+ * Copyright 2017 Pierre Moreau
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include "spirv_linker.h"
+#include "spirv_utils.h"
+
+#include "compiler/spirv/spirv.h"
+#include "util/u_debug.h"
+#include "util/u_hash_table.h"
+#include "util/u_pointer.h"
+
+#include 
+#include 
+#include 
+
+#define PTR_TO_UINT(x) ((unsigned)pointer_to_uintptr(x))
+#define UINT_TO_PTR(x) (uintptr_to_pointer((uintptr_t)(x)))
+
+/**
+ * Extracts the opcode and the number of words making up this instruction.
+ *
+ * @param binary binary to extract the information from
+ * @param word_id index of the word to extract
+ * @param word_count if not null, will be set to the number of words making up
+ *   the instruction, otherwise will be left untouched
+ * @return the opcode
+ */
+static SpvOp
+spirv_get_opcode(const char *binary, size_t word_offset, unsigned *word_count)
+{
+   const unsigned desc_word = spirv_get_word(binary, word_offset);
+   if (word_count)
+  *word_count = desc_word >> SpvWordCountShift;
+   return (SpvOp) (desc_word & SpvOpCodeMask);
+}
+
+static unsigned
+spirv_spvid_hash(void *id)
+{
+   return PTR_TO_UINT(id);
+}
+
+static int
+spirv_spvid_compare(void *id1, void *id2)
+{
+   return PTR_TO_UINT(id1) != PTR_TO_UINT(id2);
+}
+
+/**
+ * Adds a specified base ID to the ID found at a specified position in the
+ * binary.
+ */
+static void
+spirv_bump_id(char *binary, unsigned word_offset, void *base_id)
+{
+   SpvId old_id = spirv_get_word(binary, word_offset);
+   spirv_set_word(binary, word_offset, PTR_TO_UINT(base_id) + old_id);
+}
+
+/**
+ * Replaces an ID with another one, if found in the link table.
+ */
+static void
+spirv_link_ids(char *binary, unsigned word_offset, void *link_table)
+{
+   SpvId old_id = spirv_get_word(binary, word_offset);
+   void *new_id_ptr = util_hash_table_get((struct util_hash_table *) 
link_table,
+  UINT_TO_PTR(old_id));
+   SpvId new_id = PTR_TO_UINT(new_id_ptr);
+   if (new_id_ptr != NULL)
+  spirv_set_word(binary, word_offset, new_id);
+}
+
+/**
+ * Associates the given variable to its width, if found.
+ */
+static void
+spirv_register_variable(char *binary, unsigned type_offset,
+unsigned variable_offset, struct util_hash_table 
*types,
+struct util_hash_table *variables)
+{
+   SpvId type_id = spirv_get_word(binary, type_offset);
+   SpvId var_id = spirv_get_word(binary, variable_offset);
+   void *width_ptr = util_hash_tab

[Mesa-dev] [RFC PATCH 07/17] configure.ac: Check for SPIRV-Tools header and library

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 configure.ac | 16 
 1 file changed, 16 insertions(+)

diff --git a/configure.ac b/configure.ac
index ba042791ad..602aeb279d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2064,6 +2064,11 @@ AC_ARG_WITH([clang-libdir],
 
 PKG_CHECK_EXISTS([libclc], [have_libclc=yes], [have_libclc=no])
 
+AC_LANG_PUSH([C++])
+AC_SEARCH_LIBS([_ZNK8spvtools10SpirvTools8ValidateEPKjm], [SPIRV-Tools], 
[have_spirv_tools=yes], [have_spirv_tools=no])
+AC_CHECK_HEADER([spirv-tools/libspirv.hpp], [have_spirv_tools_headers=yes; 
break;])
+AC_LANG_POP([C++])
+
 if test "x$enable_opencl" = xyes; then
 if test -z "$with_gallium_drivers"; then
 AC_MSG_ERROR([cannot enable OpenCL without Gallium])
@@ -2123,6 +2128,17 @@ if test "x$enable_opencl" = xyes; then
 llvm_add_component "objcarcopts" "opencl"
 llvm_add_component "profiledata" "opencl"
 
+if test "x$have_spirv_tools_headers" != xyes; then
+   AC_MSG_ERROR([Failed to find spirv-tools/libspirv.hpp, which is
+ required to build clover])
+fi
+
+if test "x$have_spirv_tools" != xyes; then
+   AC_MSG_ERROR([Failed to find a library implementing
+ _ZNK8spvtools10SpirvTools8ValidateEPKjm which is required
+ to build clover])
+fi
+
 dnl Check for Clang internal headers
 if test -z "$CLANG_LIBDIR"; then
 CLANG_LIBDIR=${LLVM_LIBDIR}
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 06/17] include/CL: Add new option to clGetProgramInfo from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 include/CL/cl.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/CL/cl.h b/include/CL/cl.h
index 44d7aedc3e..cc8d7ddf60 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -455,6 +455,7 @@ typedef struct _cl_buffer_region {
 #define CL_PROGRAM_BINARIES 0x1166
 #define CL_PROGRAM_NUM_KERNELS  0x1167
 #define CL_PROGRAM_KERNEL_NAMES 0x1168
+#define CL_PROGRAM_IL   0x1169
 
 /* cl_program_build_info */
 #define CL_PROGRAM_BUILD_STATUS 0x1181
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 00/17] Introducing SPIR-V support to clover

[Pierre Moreau]

Hello everyone,

I have been working on converting SPIR-V to NVIR in order to run OpenCL kernels
on Nouveau, and I would like to submit the first part of that work for review.
Pieces from the SPIR-V to NVIR conversion work will be submitted once I have
cleaned it up and this series has progressed through the reviewing process.


What’s in this Series?
--

The focus of this series is to let clover accept SPIR-V binaries, either
through `clCreateProgramWithBinary()`, or through `clCreateProgramWithIL()`.
The latter function is the proper way to feed SPIR-V binaries using the OpenCL
API, however it was only introduced in OpenCL 2.1 (more on “why supporting
SPIR-V through `clCreateProgramWithBinary()` can be interesting” further down).

As several SPIR-V binaries can be linked together using the OpenCL API, I
implemented a SPIR-V linker, which is not perfect, but does the job. I tested
linking against a variable, a function, a library, and a function containing a
switch statement; switch-statements require you to keep some extra stuff around
to be properly parsed.
I also added a few “utilities” functions for retrieving and setting a word /
retrieving a string from a SPIR-V binary, and converting a SPIR-V binary to the
same endianness as the host CPU.

For validating SPIR-V binaries, I use an external tool, SPIRV-Tools [1]. It
could also be used in anv, and possibly radv if there is no validation done
already, but I haven’t looked into that.

A few modifications have been made to the pipe interface, to add a define for
the SPIR-V IR, and store the program’s byte-size along the program in
`struct pipe_compute_state`. The latter will only be needed by the consumer of
the SPIR-V, which is not part of this series. However, since clover needs to
fill that information in and I was modifying clover already, I decided to add
the new attribute in this series.


Missing
---

* As there is no upstream version of LLVM which can produce SPIR-V out of
  OpenCL code, clCreateProgramWithSource will refuse to work if the target IR
  is SPIR-V, for now.

* Optimisation linking options are parsed by the SPIR-V code in clover but
  are not passed along to the linker as it does not support them.


To Improve
--

The SPIR-V binary resulting from the linking of multiple SPIR-V binaries could
be cleaned up:

* As capabilities are simply copied from all the involved binaries, you can end
  up with multiple times the same capabilities in the resulting binary; this
  shouldn’t have any impact though.

* Similarly, types can end up being duplicated under different IDs, which
  should have no other impact than making SPIR-V validators unhappy.


Misc.
-

Being able to feed SPIR-V binaries through `clCreateProgramWithBinary()` is not
really useful at the moment: the same can be achieved using
`clCreateProgramWithIL()`. However it will be interesting once there is an
upstream version of LLVM which can generate SPIR-V binaries, as the application
could query the binary created by `clCreateProgramWithSource()` on the first
run, and give it to `clCreateProgramWithBinary()`on later runs.

Once NIR supports pointers, and anything else that could be missing to support
OpenCL kernels, it should be possible and easy to convert input SPIR-V
binaries to NIR, for drivers that do not accept SPIR-V as IR.


I have sent patches to Mesa in the past, but never series, so the splitting of
the patches in the series could be completely wrong, and I apologise for that
in advance.
Also, I am sure I abused of macros, gotos and manual memory managements, as I
am not that comfortable at writing too much C code: I’ll try to learn from
your comments.


Thank you in advance for reviewing/commenting,
Pierre


[1]: https://github.com/KhronosGroup/SPIRV-Tools/


Pierre Moreau (17):
  auxiliary: Introduce utilities for SPIR-V binaries
  auxiliary: Implement a linker for SPIR-V binaries
  include/pipe: Define SPIRV as an IR
  include/pipe: Store the byte-size of a SPIR-V binary
  include/CL: Add clCreateProgramWithIL from OpenCL 2.1
  include/CL: Add new option to clGetProgramInfo from OpenCL 2.1
  configure.ac: Check for SPIRV-Tools header and library
  clover: Fill in the program byte-size in pipe_compute_state
  clover: Add additional functions to query supported IRs
  clover/spirv: Import spirv.hpp11 version 1.0 (rev 10)
  clover/spirv: Add functions for parsing arguments, linking programs,
etc.
  clover: Refuse to compile source code to SPIR-V
  clover: Handle the case when linking SPIR-V binaries together
  clover: Accept SPIR-V binaries in clCreateProgramWithBinary
  clover: Implement clCreateProgramWithIL from OpenCL 2.1
  clover: Add a pointer property to return ILs
  clover: Handle CL_PROGRAM_IL in clGetProgramInfo

 configure.ac   |   16 +
 include/CL/cl.h|7 +
 include/CL/cl_platform.h   |1 +
 src/gallium/auxiliary

[Mesa-dev] [RFC PATCH 11/17] clover/spirv: Add functions for parsing arguments, linking programs, etc.

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/Makefile.am  |  10 +-
 src/gallium/state_trackers/clover/Makefile.sources |   4 +
 .../state_trackers/clover/spirv/invocation.cpp | 481 +
 .../state_trackers/clover/spirv/invocation.hpp |  40 ++
 4 files changed, 533 insertions(+), 2 deletions(-)
 create mode 100644 src/gallium/state_trackers/clover/spirv/invocation.cpp
 create mode 100644 src/gallium/state_trackers/clover/spirv/invocation.hpp

diff --git a/src/gallium/state_trackers/clover/Makefile.am 
b/src/gallium/state_trackers/clover/Makefile.am
index 321393536d..e29457e948 100644
--- a/src/gallium/state_trackers/clover/Makefile.am
+++ b/src/gallium/state_trackers/clover/Makefile.am
@@ -28,7 +28,7 @@ cl_HEADERS = \
$(top_srcdir)/include/CL/opencl.h
 endif
 
-noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la
+noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la libspirv.la
 
 libcltgsi_la_CXXFLAGS = \
-std=c++11 \
@@ -50,13 +50,19 @@ libclllvm_la_CXXFLAGS = \
 
 libclllvm_la_SOURCES = $(LLVM_SOURCES)
 
+libspirv_la_CXXFLAGS = \
+   -std=c++11 \
+   $(VISIBILITY_CXXFLAGS)
+
+libspirv_la_SOURCES = $(SPIRV_SOURCES)
+
 libclover_la_CXXFLAGS = \
-std=c++11 \
$(CLOVER_STD_OVERRIDE) \
$(VISIBILITY_CXXFLAGS)
 
 libclover_la_LIBADD = \
-   libcltgsi.la libclllvm.la
+   libcltgsi.la libclllvm.la libspirv.la
 
 libclover_la_SOURCES = $(CPP_SOURCES)
 
diff --git a/src/gallium/state_trackers/clover/Makefile.sources 
b/src/gallium/state_trackers/clover/Makefile.sources
index e9828b107b..f223bebcd3 100644
--- a/src/gallium/state_trackers/clover/Makefile.sources
+++ b/src/gallium/state_trackers/clover/Makefile.sources
@@ -66,3 +66,7 @@ LLVM_SOURCES := \
 TGSI_SOURCES := \
tgsi/compiler.cpp \
tgsi/invocation.hpp
+
+SPIRV_SOURCES := \
+   spirv/invocation.cpp \
+   spirv/invocation.hpp
diff --git a/src/gallium/state_trackers/clover/spirv/invocation.cpp 
b/src/gallium/state_trackers/clover/spirv/invocation.cpp
new file mode 100644
index 00..3e740eb998
--- /dev/null
+++ b/src/gallium/state_trackers/clover/spirv/invocation.cpp
@@ -0,0 +1,481 @@
+//
+// Copyright 2017 Pierre Moreau
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the "Software"),
+// to deal in the Software without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Software, and to permit persons to whom the
+// Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+// OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+// ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+// OTHER DEALINGS IN THE SOFTWARE.
+//
+
+#include 
+#include 
+
+#include 
+
+#include "core/error.hpp"
+#include "invocation.hpp"
+#include "llvm/util.hpp"
+#include "spirv/spirv_linker.h"
+#include "spirv/spirv_utils.h"
+#include "util/algorithm.hpp"
+#include "util/functional.hpp"
+#include "util/u_debug.h"
+
+#include "spirv.hpp11"
+
+using namespace clover;
+
+namespace {
+
+   template
+   T get(const std::vector& source, size_t index) {
+  if (index * sizeof(spirv_word) + 3u > source.size())
+ return static_cast(0);
+  return static_cast(spirv_get_word(source.data(), index));
+   }
+
+   enum module::argument::type
+   convertStorageClass(spv::StorageClass storage_class) {
+  switch (storage_class) {
+  case spv::StorageClass::UniformConstant:
+ return module::argument::constant;
+  case spv::StorageClass::Workgroup:
+ return module::argument::local;
+  case spv::StorageClass::CrossWorkgroup:
+ return module::argument::global;
+  default:
+ throw build_error();
+  }
+   }
+
+   enum module::argument::type
+   convertImageType(spv::Id id, spv::Dim dim, spv::AccessQualifier access,
+std::string &err) {
+#define APPEND_DIM(d) \
+  switch(access) { \
+  case spv::AccessQualifier::ReadOnly: \
+ return module::argument::image##d##_rd; \
+  case spv::AccessQualifier::WriteOnly: \
+ return module::argument::image##d##_wr; \
+  default: \
+ err += "Invalid access qualifier " #d " for image &qu

[Mesa-dev] [RFC PATCH 10/17] clover/spirv: Import spirv.hpp11 version 1.0 (rev 10)

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 .../state_trackers/clover/spirv/spirv.hpp11| 952 +
 1 file changed, 952 insertions(+)
 create mode 100644 src/gallium/state_trackers/clover/spirv/spirv.hpp11

diff --git a/src/gallium/state_trackers/clover/spirv/spirv.hpp11 
b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
new file mode 100644
index 00..62bb127a8a
--- /dev/null
+++ b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
@@ -0,0 +1,952 @@
+// Copyright (c) 2014-2017 The Khronos Group Inc.
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and/or associated documentation files (the "Materials"),
+// to deal in the Materials without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Materials, and to permit persons to whom the
+// Materials are furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Materials.
+//
+// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
+// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
+// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
+//
+// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+// FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS
+// IN THE MATERIALS.
+
+// This header is automatically generated by the same tool that creates
+// the Binary Section of the SPIR-V specification.
+
+// Enumeration tokens for SPIR-V, in various styles:
+//   C, C++, C++11, JSON, Lua, Python
+//
+// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
+// - C++ will have tokens in the "spv" name space, e.g.: 
spv::SourceLanguageGLSL
+// - C++11 will use enum classes in the spv namespace, e.g.: 
spv::SourceLanguage::GLSL
+// - Lua will use tables, e.g.: spv.SourceLanguage.GLSL
+// - Python will use dictionaries, e.g.: spv['SourceLanguage']['GLSL']
+//
+// Some tokens act like mask values, which can be OR'd together,
+// while others are mutually exclusive.  The mask-like ones have
+// "Mask" in their name, and a parallel enum that has the shift
+// amount (1 << x) for each corresponding enumerant.
+
+#ifndef spirv_HPP
+#define spirv_HPP
+
+namespace spv {
+
+typedef unsigned int Id;
+
+#define SPV_VERSION 0x1
+#define SPV_REVISION 10
+
+static const unsigned int MagicNumber = 0x07230203;
+static const unsigned int Version = 0x0001;
+static const unsigned int Revision = 10;
+static const unsigned int OpCodeMask = 0x;
+static const unsigned int WordCountShift = 16;
+
+enum class SourceLanguage : unsigned {
+Unknown = 0,
+ESSL = 1,
+GLSL = 2,
+OpenCL_C = 3,
+OpenCL_CPP = 4,
+Max = 0x7fff,
+};
+
+enum class ExecutionModel : unsigned {
+Vertex = 0,
+TessellationControl = 1,
+TessellationEvaluation = 2,
+Geometry = 3,
+Fragment = 4,
+GLCompute = 5,
+Kernel = 6,
+Max = 0x7fff,
+};
+
+enum class AddressingModel : unsigned {
+Logical = 0,
+Physical32 = 1,
+Physical64 = 2,
+Max = 0x7fff,
+};
+
+enum class MemoryModel : unsigned {
+Simple = 0,
+GLSL450 = 1,
+OpenCL = 2,
+Max = 0x7fff,
+};
+
+enum class ExecutionMode : unsigned {
+Invocations = 0,
+SpacingEqual = 1,
+SpacingFractionalEven = 2,
+SpacingFractionalOdd = 3,
+VertexOrderCw = 4,
+VertexOrderCcw = 5,
+PixelCenterInteger = 6,
+OriginUpperLeft = 7,
+OriginLowerLeft = 8,
+EarlyFragmentTests = 9,
+PointMode = 10,
+Xfb = 11,
+DepthReplacing = 12,
+DepthGreater = 14,
+DepthLess = 15,
+DepthUnchanged = 16,
+LocalSize = 17,
+LocalSizeHint = 18,
+InputPoints = 19,
+InputLines = 20,
+InputLinesAdjacency = 21,
+Triangles = 22,
+InputTrianglesAdjacency = 23,
+Quads = 24,
+Isolines = 25,
+OutputVertices = 26,
+OutputPoints = 27,
+OutputLineStrip = 28,
+OutputTriangleStrip = 29,
+VecTypeHint = 30,
+ContractionOff = 31,
+Max = 0x7fff,
+};
+
+enum class StorageClass : unsigned {
+UniformConstant = 0,
+Input = 1,
+Uniform = 2,
+Output = 3,
+Workgroup = 4,
+CrossWorkgroup = 5,
+Private = 6,
+Function = 7,
+Generic = 8,
+PushConstant = 9,
+AtomicCounter = 10,
+Image = 11,
+Max = 0x7fff,
+};
+
+enum class Dim : un

[Mesa-dev] [RFC PATCH 09/17] clover: Add additional functions to query supported IRs

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/device.cpp | 11 +++
 src/gallium/state_trackers/clover/core/device.hpp |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 158c9aa696..52ac5229a3 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -224,6 +224,12 @@ device::ir_format() const {
   pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_PREFERRED_IR);
 }
 
+cl_uint
+device::supported_irs() const {
+   return (enum pipe_shader_ir) pipe->get_shader_param(
+  pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_SUPPORTED_IRS);
+}
+
 std::string
 device::ir_target() const {
std::vector target = get_compute_param(
@@ -235,3 +241,8 @@ enum pipe_endian
 device::endianness() const {
return (enum pipe_endian)pipe->get_param(pipe, PIPE_CAP_ENDIANNESS);
 }
+
+bool
+device::supports_ir(cl_uint ir) const {
+   return supported_irs() & (1 << ir);
+}
diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
b/src/gallium/state_trackers/clover/core/device.hpp
index 94a61d1050..065e788fd3 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -74,9 +74,12 @@ namespace clover {
   std::string device_name() const;
   std::string vendor_name() const;
   enum pipe_shader_ir ir_format() const;
+  cl_uint supported_irs() const;
   std::string ir_target() const;
   enum pipe_endian endianness() const;
 
+  bool supports_ir(cl_uint ir) const;
+
   friend class command_queue;
   friend class root_resource;
   friend class hard_event;
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 16/17] clover: Add a pointer property to return ILs

[Pierre Moreau]

OpenCL 2.1 gives the ability to query for a program’s IL, which is
returned as a pointer.

Signed-off-by: Pierre Moreau 
---
 .../state_trackers/clover/core/property.hpp| 39 ++
 1 file changed, 39 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/property.hpp 
b/src/gallium/state_trackers/clover/core/property.hpp
index 7f8e17684d..5beac372e7 100644
--- a/src/gallium/state_trackers/clover/core/property.hpp
+++ b/src/gallium/state_trackers/clover/core/property.hpp
@@ -23,6 +23,7 @@
 #ifndef CLOVER_CORE_PROPERTY_HPP
 #define CLOVER_CORE_PROPERTY_HPP
 
+#include 
 #include 
 
 #include "util/range.hpp"
@@ -84,6 +85,19 @@ namespace clover {
   private:
  property_buffer &buf;
   };
+
+  template
+  class property_pointer {
+  public:
+ property_pointer(property_buffer &buf) : buf(buf) {
+ }
+
+ inline property_pointer &
+ operator=(const std::pair &v);
+
+  private:
+ property_buffer &buf;
+  };
};
 
///
@@ -119,6 +133,12 @@ namespace clover {
   }
 
   template
+  detail::property_pointer
+  as_pointer() {
+ return { *this };
+  }
+
+  template
   iterator_range
   allocate(size_t n) {
  if (r_buf && size < n * sizeof(T))
@@ -133,6 +153,17 @@ namespace clover {
 return { };
   }
 
+  void
+  allocate_raw(const void *v, size_t n) {
+ if (r_buf && size < n)
+throw error(CL_INVALID_VALUE);
+
+ if (r_size)
+*r_size = n;
+
+ std::memcpy(r_buf, v, n);
+  }
+
private:
   void *const r_buf;
   const size_t size;
@@ -178,6 +209,14 @@ namespace clover {
  return *this;
   }
 
+  template
+  inline property_pointer &
+  property_pointer::operator=(const std::pair &v) {
+ buf.allocate_raw(v.first, v.second);
+
+ return *this;
+  }
+
   inline property_string &
   property_string::operator=(const std::string &v) {
  auto r = buf.allocate(v.size() + 1);
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 13/17] clover: Handle the case when linking SPIR-V binaries together

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/program.cpp | 19 ++-
 1 file changed, 14 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 15d559cd93..6a54500247 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -80,11 +80,20 @@ program::link(const ref_vector &devs, const 
std::string &opts,
   std::string log = _builds[&dev].log;
 
   try {
- const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
-   tgsi::link_program(ms) :
-   llvm::link_program(ms, dev.ir_format(),
-  dev.ir_target(), opts, log));
- _builds[&dev] = { m, opts, log };
+ switch (dev.ir_format()) {
+ case PIPE_SHADER_IR_TGSI:
+_builds[&dev] = { tgsi::link_program(ms), opts, log };
+break;
+ case PIPE_SHADER_IR_LLVM:
+case PIPE_SHADER_IR_NATIVE:
+case PIPE_SHADER_IR_NIR:
+_builds[&dev] = { llvm::link_program(ms, dev.ir_format(),
+dev.ir_target(), opts, log), 
opts, log };
+break;
+ case PIPE_SHADER_IR_SPIRV:
+_builds[&dev] = { clover::spirv::link_program(ms, opts, log), 
opts, log };
+break;
+ }
   } catch (...) {
  _builds[&dev] = { module(), opts, log };
  throw;
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 12/17] clover: Refuse to compile source code to SPIR-V

[Pierre Moreau]

Creating a program using clCreateProgramWithSource to SPIR-V requires a
non-upstreamed version of LLVM and clang, therefore it is currently not
supported.

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/program.cpp | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index ae4b50a879..15d559cd93 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -51,6 +51,10 @@ program::compile(const ref_vector &devs, const 
std::string &opts,
  std::string log;
 
  try {
+if (dev.ir_format() == PIPE_SHADER_IR_SPIRV) {
+   log = "Compiling from source to SPIR-V is not supported yet\n";
+   throw error(CL_INVALID_DEVICE);
+}
 const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
   tgsi::compile_program(_source, log) :
   llvm::compile_program(_source, headers,
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 08/17] clover: Fill in the program byte-size in pipe_compute_state

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/kernel.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp 
b/src/gallium/state_trackers/clover/core/kernel.cpp
index 4716705323..328323b6b0 100644
--- a/src/gallium/state_trackers/clover/core/kernel.cpp
+++ b/src/gallium/state_trackers/clover/core/kernel.cpp
@@ -228,6 +228,7 @@ kernel::exec_context::bind(intrusive_ptr _q,
 
   cs.ir_type = q->device().ir_format();
   cs.prog = &(msec.data[0]);
+  cs.prog_num_bytes = msec.data.size();
   cs.req_local_mem = mem_local;
   cs.req_input_mem = input.size();
   st = q->pipe->create_compute_state(q->pipe, &cs);
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 14/17] clover: Accept SPIR-V binaries in clCreateProgramWithBinary

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 35 ---
 1 file changed, 25 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 9d59668f8f..5f5971078d 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -22,6 +22,8 @@
 
 #include "api/util.hpp"
 #include "core/program.hpp"
+#include "spirv/invocation.hpp"
+#include "spirv/spirv_utils.h"
 #include "util/u_debug.h"
 
 #include 
@@ -92,22 +94,35 @@ clCreateProgramWithBinary(cl_context d_ctx, cl_uint n,
 
// Deserialize the provided binaries,
std::vector> result = map(
-  [](const unsigned char *p, size_t l) -> std::pair {
+  [](const unsigned char *p, size_t l, device &dev) -> std::pair {
  if (!p || !l)
 return { CL_INVALID_VALUE, {} };
 
- try {
-std::stringbuf bin( { (char*)p, l } );
-std::istream s(&bin);
-
-return { CL_SUCCESS, module::deserialize(s) };
-
- } catch (std::istream::failure &e) {
-return { CL_INVALID_BINARY, {} };
+ if (spirv_is_binary_spirv(reinterpret_cast(p))) {
+if (!dev.supports_ir(PIPE_SHADER_IR_SPIRV))
+   return { CL_INVALID_BINARY, {} };
+
+try {
+   std::string log;
+   return { CL_SUCCESS, spirv::process_program(p, l, true, log) };
+} catch (build_error &e) {
+   return { CL_INVALID_BINARY, {} };
+}
+ } else {
+try {
+   std::stringbuf bin( { (char*)p, l } );
+   std::istream s(&bin);
+
+   return { CL_SUCCESS, module::deserialize(s) };
+
+} catch (std::istream::failure &e) {
+   return { CL_INVALID_BINARY, {} };
+}
  }
   },
   range(binaries, n),
-  range(lengths, n));
+  range(lengths, n),
+  devs);
 
// update the status array,
if (r_status)
-- 
2.12.2

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[Mesa-dev] [RFC PATCH 17/17] clover: Handle CL_PROGRAM_IL in clGetProgramInfo

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 57b8aedb91..5357724939 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -386,6 +386,16 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
   buf.as_string() = prog.source();
   break;
 
+   // FIXME valid only if OpenCL 2.1 context
+   case CL_PROGRAM_IL:
+//  if (prog.context().properties())
+// throw error(CL_INVALID_VALUE);
+  if (prog.has_il)
+ buf.as_pointer() = std::make_pair(prog.il(), prog.length());
+  else if (r_size)
+ *r_size = 0u;
+  break;
+
case CL_PROGRAM_BINARY_SIZES:
   buf.as_vector() = map([&](const device &dev) {
 return prog.build(dev).binary.size();
-- 
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[Mesa-dev] [RFC PATCH 15/17] clover: Implement clCreateProgramWithIL from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp  | 29 ++-
 src/gallium/state_trackers/clover/core/program.cpp | 57 --
 src/gallium/state_trackers/clover/core/program.hpp | 14 ++
 3 files changed, 95 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 5f5971078d..57b8aedb91 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -144,6 +144,31 @@ clCreateProgramWithBinary(cl_context d_ctx, cl_uint n,
 }
 
 CLOVER_API cl_program
+clCreateProgramWithIL(cl_context d_ctx,
+  const void *il,
+  const size_t length,
+  cl_int *r_errcode) try {
+   auto &ctx = obj(d_ctx);
+
+   if (!il || !length)
+  throw error(CL_INVALID_VALUE);
+
+   uint32_t type = 0;
+   // Only SPIR-V is supported for now
+   if (!spirv_is_binary_spirv(reinterpret_cast(il)))
+  throw error(CL_INVALID_VALUE);
+   type = PIPE_SHADER_IR_SPIRV;
+
+   // initialize a program object with it.
+   ret_error(r_errcode, CL_SUCCESS);
+   return new program(ctx, il, length, type);
+
+} catch (error &e) {
+   ret_error(r_errcode, e);
+   return NULL;
+}
+
+CLOVER_API cl_program
 clCreateProgramWithBuiltInKernels(cl_context d_ctx, cl_uint n,
   const cl_device_id *d_devs,
   const char *kernel_names,
@@ -198,7 +223,7 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
 
validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
 
-   if (prog.has_source) {
+   if (prog.has_source || prog.has_il) {
   prog.compile(devs, opts);
   prog.link(devs, opts, { prog });
}
@@ -228,7 +253,7 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
if (bool(num_headers) != bool(header_names))
   throw error(CL_INVALID_VALUE);
 
-   if (!prog.has_source)
+   if (!prog.has_source && !prog.has_il)
   throw error(CL_INVALID_OPERATION);
 
for_each([&](const char *name, const program &header) {
diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 6a54500247..d9d197fffe 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -23,24 +23,43 @@
 #include "core/program.hpp"
 #include "llvm/invocation.hpp"
 #include "tgsi/invocation.hpp"
+#include "spirv/invocation.hpp"
+
+#include "spirv/spirv_utils.h"
+
+#include 
 
 using namespace clover;
 
 program::program(clover::context &ctx, const std::string &source) :
-   has_source(true), context(ctx), _source(source), _kernel_ref_counter(0) {
+   has_source(true), has_il(false), il_type(0u), context(ctx), _source(source),
+   _kernel_ref_counter(0), _il(nullptr), _length(0) {
 }
 
 program::program(clover::context &ctx,
  const ref_vector &devs,
  const std::vector &binaries) :
-   has_source(false), context(ctx),
-   _devices(devs), _kernel_ref_counter(0) {
+   has_source(false), has_il(false), il_type(0u), context(ctx),
+   _devices(devs), _kernel_ref_counter(0), _il(nullptr), _length(0) {
for_each([&](device &dev, const module &bin) {
  _builds[&dev] = { bin };
   },
   devs, binaries);
 }
 
+program::program(clover::context &ctx, const void *il, const size_t length,
+ const uint32_t type) :
+   has_source(false), has_il(true), il_type(type), context(ctx),
+   _kernel_ref_counter(0), _il(nullptr), _length(length) {
+   const char *c_il = reinterpret_cast(il);
+   _il = spirv_spirv_to_cpu(c_il, length);
+}
+
+program::~program() {
+   if (has_il)
+  delete[] reinterpret_cast(_il);
+}
+
 void
 program::compile(const ref_vector &devs, const std::string &opts,
  const header_map &headers) {
@@ -65,6 +84,28 @@ program::compile(const ref_vector &devs, const 
std::string &opts,
 throw;
  }
   }
+   } else if (has_il) {
+  _devices = devs;
+
+  for (auto &dev : devs) {
+ std::string log;
+
+ try {
+if (il_type == PIPE_SHADER_IR_SPIRV) {
+   if (!dev.supports_ir(PIPE_SHADER_IR_SPIRV)) {
+  log = "Device does not support SPIR-V as IL\n";
+  throw error(CL_INVALID_BINARY);
+   }
+   _builds[&dev] = { spirv::process_program(_il, _length, false, 
log), opts, log };
+} else {
+   log = "Only SPIR-V is supported as IL by clover for now\n";
+   throw error(CL_INVALID_BINARY);
+}
+ } catch (const error &) {
+_builds[&dev] = { module(), opts, log };
+   

Re: [Mesa-dev] [RFC PATCH 00/17] Introducing SPIR-V support to clover

[Pierre Moreau]

> hopefully this[1] will eventually happen, which would make this less
> of an issue :-)
> 
> [1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112538.html

Indeed! I have seen that thread and made sure to subscribe to the ML not to
miss anything there.
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Re: [Mesa-dev] [RFC PATCH 04/17] include/pipe: Store the byte-size of a SPIR-V binary

[Pierre Moreau]

This seems like a good idea. I changed the code locally to use
`pipe_llvm_program_header` instead; it does not seem worth it to create a
`pipe_spirv_program_header`, since it would only contain a `num_bytes`
attributes for now.


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[Mesa-dev] [PATCH 4/4] nv50/ir: Replace NV50_PROGRAM_IR_* by PIPE_SHADER_IR_*

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp  | 2 +-
 src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 7 +--
 src/gallium/drivers/nouveau/nouveau_compiler.c   | 2 +-
 src/gallium/drivers/nouveau/nv50/nv50_program.c  | 4 +++-
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c  | 2 +-
 5 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index f811781756..a000bcbd32 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1233,7 +1233,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
prog->optLevel = info->optLevel;
 
switch (info->bin.sourceRep) {
-   case NV50_PROGRAM_IR_TGSI:
+   case PIPE_SHADER_IR_TGSI:
   ret = prog->makeFromTGSI(info) ? 0 : -2;
   break;
default:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index e7d840df00..1962ead35a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -54,11 +54,6 @@ struct nv50_ir_varying
ubyte si; /* TGSI semantic index */
 };
 
-#define NV50_PROGRAM_IR_TGSI 0
-#define NV50_PROGRAM_IR_SM4  1
-#define NV50_PROGRAM_IR_GLSL 2
-#define NV50_PROGRAM_IR_LLVM 3
-
 #ifdef DEBUG
 # define NV50_IR_DEBUG_BASIC (1 << 0)
 # define NV50_IR_DEBUG_VERBOSE   (2 << 0)
@@ -95,7 +90,7 @@ struct nv50_ir_prog_info
   uint32_t *code;
   uint32_t codeSize;
   uint32_t instructions;
-  uint8_t sourceRep;  /* NV50_PROGRAM_IR */
+  uint8_t sourceRep;  /* PIPE_SHADER_IR_* */
   const void *source;
   void *relocData;
   void *fixupData;
diff --git a/src/gallium/drivers/nouveau/nouveau_compiler.c 
b/src/gallium/drivers/nouveau/nouveau_compiler.c
index d8009f5bfe..3151a6f420 100644
--- a/src/gallium/drivers/nouveau/nouveau_compiler.c
+++ b/src/gallium/drivers/nouveau/nouveau_compiler.c
@@ -109,7 +109,7 @@ nouveau_codegen(int chipset, int type, struct tgsi_token 
tokens[],
 
info.type = type;
info.target = chipset;
-   info.bin.sourceRep = NV50_PROGRAM_IR_TGSI;
+   info.bin.sourceRep = PIPE_SHADER_IR_TGSI;
info.bin.source = tokens;
 
info.io.auxCBSlot = 15;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_program.c 
b/src/gallium/drivers/nouveau/nv50/nv50_program.c
index 76d06aeddf..92e73f8c12 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
@@ -20,6 +20,8 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include "pipe/p_defines.h"
+
 #include "nv50/nv50_program.h"
 #include "nv50/nv50_context.h"
 
@@ -331,7 +333,7 @@ nv50_program_translate(struct nv50_program *prog, uint16_t 
chipset,
 
info->type = prog->type;
info->target = chipset;
-   info->bin.sourceRep = NV50_PROGRAM_IR_TGSI;
+   info->bin.sourceRep = PIPE_SHADER_IR_TGSI;
info->bin.source = (void *)prog->pipe.tokens;
 
info->io.auxCBSlot = 15;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index 6cc518309c..27740bc87f 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -567,7 +567,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t 
chipset,
 
info->type = prog->type;
info->target = chipset;
-   info->bin.sourceRep = NV50_PROGRAM_IR_TGSI;
+   info->bin.sourceRep = PIPE_SHADER_IR_TGSI;
info->bin.source = (void *)prog->pipe.tokens;
 
 #ifdef DEBUG
-- 
2.12.2

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[Mesa-dev] [PATCH 1/4] nv50/ir: Fail if encountering unknown shader type

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index b67a1ddbd5..1f640a348a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1214,8 +1214,8 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
PROG_TYPE_CASE(FRAGMENT, FRAGMENT);
PROG_TYPE_CASE(COMPUTE, COMPUTE);
default:
-  type = nv50_ir::Program::TYPE_COMPUTE;
-  break;
+  INFO_DBG(info->dbgFlags, VERBOSE, "unsupported program type %u\n", type);
+  return -1;
}
INFO_DBG(info->dbgFlags, VERBOSE, "translating program of type %u\n", type);
 
-- 
2.12.2

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[Mesa-dev] [PATCH 3/4] nv50/ir: Remove unused translation methods

[Pierre Moreau]

This code was merged commented out, and has stayed that way ever since.

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 12 +++-
 src/gallium/drivers/nouveau/codegen/nv50_ir.h   |  1 -
 2 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index a4b46eb13f..f811781756 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1233,17 +1233,11 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
prog->optLevel = info->optLevel;
 
switch (info->bin.sourceRep) {
-#if 0
-   case PIPE_IR_LLVM:
-   case PIPE_IR_GLSL:
-  return -1;
-   case PIPE_IR_SM4:
-  ret = prog->makeFromSM4(info) ? 0 : -2;
+   case NV50_PROGRAM_IR_TGSI:
+  ret = prog->makeFromTGSI(info) ? 0 : -2;
   break;
-   case PIPE_IR_TGSI:
-#endif
default:
-  ret = prog->makeFromTGSI(info) ? 0 : -2;
+  ret = -1;
   break;
}
if (ret < 0)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h 
b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
index de6c110536..5c09fed05c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h
@@ -1253,7 +1253,6 @@ public:
inline void add(Value *rval, int& id) { allRValues.insert(rval, id); }
 
bool makeFromTGSI(struct nv50_ir_prog_info *);
-   bool makeFromSM4(struct nv50_ir_prog_info *);
bool convertToSSA();
bool optimizeSSA(int level);
bool optimizePostRA(int level);
-- 
2.12.2

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[Mesa-dev] [PATCH 2/4] nv50/ir: Free target if we failed to create a program

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index 1f640a348a..a4b46eb13f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1224,8 +1224,10 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
   return -1;
 
nv50_ir::Program *prog = new nv50_ir::Program(type, targ);
-   if (!prog)
+   if (!prog) {
+  nv50_ir::Target::destroy(targ);
   return -1;
+   }
prog->driver = info;
prog->dbgFlags = info->dbgFlags;
prog->optLevel = info->optLevel;
-- 
2.12.2

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[Mesa-dev] [PATCH] nv50/ir: Report wrong prog types using proper var

[Pierre Moreau]

Coverity caught the use of the uninitialised variable `type`.
However, it was `info->type`, which is initialised, which was meant to
be used.

CID: 1406000
Reported-by: Ilia Mirkin 
Fixes: b490ca9a387d ("nv50/ir: Fail if encountering unknown shader type")
Signed-off-by: Pierre Moreau 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index a000bcbd32..21641a4746 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1214,7 +1214,7 @@ nv50_ir_generate_code(struct nv50_ir_prog_info *info)
PROG_TYPE_CASE(FRAGMENT, FRAGMENT);
PROG_TYPE_CASE(COMPUTE, COMPUTE);
default:
-  INFO_DBG(info->dbgFlags, VERBOSE, "unsupported program type %u\n", type);
+  INFO_DBG(info->dbgFlags, VERBOSE, "unsupported program type %u\n", 
info->type);
   return -1;
}
INFO_DBG(info->dbgFlags, VERBOSE, "translating program of type %u\n", type);
-- 
2.13.0

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Re: [Mesa-dev] [RFC PATCH 02/17] auxiliary: Implement a linker for SPIR-V binaries

[Pierre Moreau]

This version tries to link builtins, as they are marked as imported, but nothing
exports them, resulting in the linker failing and throwing an error. As
builtins are target dependent, it is best to let the driver handles those
cases. I changed the code locally to also track which IDs are builtins, and
remove from the import table all builtins, right before generating the linking
table.

Other comments are welcomed (on this patch, and on the others as well). :-)

Pierre

On 11:56 pm - May 03 2017, Pierre Moreau wrote:
> Signed-off-by: Pierre Moreau 
> ---
>  src/gallium/auxiliary/Makefile.sources |4 +-
>  src/gallium/auxiliary/spirv/spirv_linker.c | 1324 
> 
>  src/gallium/auxiliary/spirv/spirv_linker.h |   67 ++
>  3 files changed, 1394 insertions(+), 1 deletion(-)
>  create mode 100644 src/gallium/auxiliary/spirv/spirv_linker.c
>  create mode 100644 src/gallium/auxiliary/spirv/spirv_linker.h
> 
> diff --git a/src/gallium/auxiliary/Makefile.sources 
> b/src/gallium/auxiliary/Makefile.sources
> index f4817742ff..91aac49dfb 100644
> --- a/src/gallium/auxiliary/Makefile.sources
> +++ b/src/gallium/auxiliary/Makefile.sources
> @@ -314,7 +314,9 @@ NIR_SOURCES := \
>  
>  SPIRV_SOURCES := \
>   spirv/spirv_utils.c \
> - spirv/spirv_utils.h
> + spirv/spirv_utils.h \
> + spirv/spirv_linker.c \
> + spirv/spirv_linker.h
>  
>  VL_SOURCES := \
>   vl/vl_bicubic_filter.c \
> diff --git a/src/gallium/auxiliary/spirv/spirv_linker.c 
> b/src/gallium/auxiliary/spirv/spirv_linker.c
> new file mode 100644
> index 00..9d060be0cc
> --- /dev/null
> +++ b/src/gallium/auxiliary/spirv/spirv_linker.c
> @@ -0,0 +1,1324 @@
> +/******
> + *
> + * Copyright 2017 Pierre Moreau
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction, including
> + * without limitation the rights to use, copy, modify, merge, publish,
> + * distribute, sub license, and/or sell copies of the Software, and to
> + * permit persons to whom the Software is furnished to do so, subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> + * next paragraph) shall be included in all copies or substantial portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR
> + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + *
> + **/
> +
> +#include "spirv_linker.h"
> +#include "spirv_utils.h"
> +
> +#include "compiler/spirv/spirv.h"
> +#include "util/u_debug.h"
> +#include "util/u_hash_table.h"
> +#include "util/u_pointer.h"
> +
> +#include 
> +#include 
> +#include 
> +
> +#define PTR_TO_UINT(x) ((unsigned)pointer_to_uintptr(x))
> +#define UINT_TO_PTR(x) (uintptr_to_pointer((uintptr_t)(x)))
> +
> +/**
> + * Extracts the opcode and the number of words making up this instruction.
> + *
> + * @param binary binary to extract the information from
> + * @param word_id index of the word to extract
> + * @param word_count if not null, will be set to the number of words making 
> up
> + *   the instruction, otherwise will be left untouched
> + * @return the opcode
> + */
> +static SpvOp
> +spirv_get_opcode(const char *binary, size_t word_offset, unsigned 
> *word_count)
> +{
> +   const unsigned desc_word = spirv_get_word(binary, word_offset);
> +   if (word_count)
> +  *word_count = desc_word >> SpvWordCountShift;
> +   return (SpvOp) (desc_word & SpvOpCodeMask);
> +}
> +
> +static unsigned
> +spirv_spvid_hash(void *id)
> +{
> +   return PTR_TO_UINT(id);
> +}
> +
> +static int
> +spirv_spvid_compare(void *id1, void *id2)
> +{
> +   return PTR_TO_UINT(id1) != PTR_TO_UINT(id2);
> +}
> +
> +/**
> + * Adds a specified base ID to the ID found at a specified position in the
> + * binary.
> + */
> +static void
> +spirv_bump_id(char *binary, unsigne

[Mesa-dev] [PATCH v2 01/22] clover/api: Fix tab indentation to spaces

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/device.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 3572bb0c92..576555a9af 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -326,7 +326,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
 #ifdef MESA_GIT_SHA1
 " (" MESA_GIT_SHA1 ")"
 #endif
-   ;
+;
   break;
 
case CL_DEVICE_EXTENSIONS:
-- 
2.16.0

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[Mesa-dev] [PATCH v2 02/22] clover: Add additional functions to query supported IRs

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/device.cpp | 11 +++
 src/gallium/state_trackers/clover/core/device.hpp |  3 +++
 2 files changed, 14 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 9dd7eed3f1..7eaa0ca2cb 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -247,6 +247,12 @@ device::ir_format() const {
   pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_PREFERRED_IR);
 }
 
+cl_uint
+device::supported_irs() const {
+   return (enum pipe_shader_ir) pipe->get_shader_param(
+  pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_SUPPORTED_IRS);
+}
+
 std::string
 device::ir_target() const {
std::vector target = get_compute_param(
@@ -268,3 +274,8 @@ std::string
 device::device_clc_version() const {
 return "1.1";
 }
+
+bool
+device::supports_ir(cl_uint ir) const {
+   return supported_irs() & (1 << ir);
+}
diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
b/src/gallium/state_trackers/clover/core/device.hpp
index 85cd031676..eed644e919 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -80,9 +80,12 @@ namespace clover {
   std::string device_version() const;
   std::string device_clc_version() const;
   enum pipe_shader_ir ir_format() const;
+  cl_uint supported_irs() const;
   std::string ir_target() const;
   enum pipe_endian endianness() const;
 
+  bool supports_ir(cl_uint ir) const;
+
   friend class command_queue;
   friend class root_resource;
   friend class hard_event;
-- 
2.16.0

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[Mesa-dev] [PATCH v2 00/22] Introducing SPIR-V support to clover

[Pierre Moreau]

Hello,

Here is the second version of my initial series for adding SPIR-V support to
clover, after the RFC back in May 2017.

For recap, the focus of this series is to let clover accept SPIR-V binaries
through the cl_khr_il_program extension (from OpenCL 1.2 and on), as well as
through some core features (since OpenCL 2.1). Even if OpenCL 2.1 support in
clover is some way off, there is another motivation for supporting SPIR-V in
clover, as multiple drivers are interested in adding OpenCL support by
converting SPIR-V to NIR.

Note: the series is based on master + Karol’s patch “clover: add functions up
to 2.2 to ICD dispatch table”.


The various patches can be split in different categories:

* Patches 1 through 7: some clover clean-up, adding and moving some
  functionalities around to make the implementation easier in the rest of the
  series.

* Patches 8 through 13: define SPIR-V as a new IR, add a new frontend to clover
  to deal with SPIR-V, and edit compile and link operations to handle SPIR-V as
  well.

* Patches 14 through 19: implement cl_khr_il_program

* Patches 20 through 22: implement OpenCL 2.1 support on top of
  cl_khr_il_program


Changes since the RFC
-

* Most SPIR-V utilities were dropped, and the remaining ones have been moved to
  the clover SPIR-V frontend rather than sitting in src/gallium/auxiliary/spirv.

* The SPIR-V linker has been completely dropped from this series and instead
  merge in SPIRV-Tools [1].

* Since SPIRV-Tools now exports a pkgconfig .pc file, use it for detecting the
  library.

* Integrate the series with Meson.

* Use pipe_llvm_program_header to pass in the size of the SPIR-V module, rather
  than adding a new attribute to pipe_compute_state, as suggested by Francisco
  Jerez.

* Check that the device supports the capabilities defined in the SPIR-V binary.

* Check that the platform/device supports the extensions used in the SPIR-V
  binary.

* Fix the implementation responsible for filling up the symbols of the clover
  module based on the input SPIR-V binary.

* No longer raw SPIR-V binaries through clCreateProgramWithBinary, but instead
  keep the current de-serialisation of the clover module, which may contain a
  SPIR-V binary.

* Track whether a library was created with the --enable-link-options flag or
  not. This is currently not useful as the linker ignores most link options,
  but it will become useful when the linker handles those options.

* Implement cl_khr_il_program.

* Most of patches 1 through 8 (apart from patch 2).


Discussions
---

* Before, when linking different modules together, you knew that all modules
  would use the same IR, as all were created using clCreateProgramWithSource,
  therefore the linker could just call the linking function corresponding to
  the target’s preferred IR. But with the introduction of
  clCreateProgramWithIL(KHR)?, we can now end up in a case where we try to link
  a module using NIR as IR (created through clCreateProgramWithSource, assuming
  that is the driver’s preferred IR), with another module using SPIR-V as IR
  (created through clCreateProgramWithIL). How do we handle such a case: should
  we translate the SPIR-V to NIR and use a NIR linker on them, or convert NIR
  to SPIR-V and use the SPIR-V linker? NIR and LLVM IR can be handled
  relatively easily, but what about TGSI?

* In that regard, is anyone using the TGSI frontend in clover? If not, is
  anyone planning to use it? And if still not, shouldn’t we just remove it?

* In the same vein as the linking discussion just above, what should happen
  when the driver’s preferred IR is one of the IRs not currently supported by
  clover, like NIR for example? Should `compile()` generate a SPIR-V binary
  which is directly translated to NIR, or should we keep everything in SPIR-V
  until the very last moment, right before sending the IR to the driver?  If
  all the drivers supporting compute through clover support an IR that can be
  translated from SPIR-V, it might be easier to keep everything inside clover
  as SPIR-V binaries, until we need to pass the program to the driver, in which
  case we convert it on the fly.


(Still) missing
---

* As there is no upstream version of LLVM which can produce SPIR-V out of
  OpenCL code, clCreateProgramWithSource will refuse to work if the target’s
  preferred IR is SPIR-V, for now.

* Optimisation linking options are ignored for now as SPIRV-Tools’ linker does
  not supported them yet.


Thank you in advance for reviewing/commenting,
Pierre

[1]: https://github.com/KhronosGroup/SPIRV-Tools/


Pierre Moreau (22):
  clover/api: Fix tab indentation to spaces
  clover: Add additional functions to query supported IRs
  clover/api: Fail if trying to build a non-executable binary
  clover: Disallow creating libraries from other libraries
  clover: Track flags per module section
  clover: Move device extensions definitions to core/device.cpp
  clover: Move platform extensions

[Mesa-dev] [PATCH v2 03/22] clover/api: Fail if trying to build a non-executable binary

[Pierre Moreau]

From the OpenCL 1.2 Specification, Section 5.6.2 (about clBuildProgram:

> If program is created with clCreateProgramWithBinary, then the
> program binary must be an executable binary (not a compiled binary or
> library).

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 9d59668f8f..6044179587 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -186,6 +186,14 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
if (prog.has_source) {
   prog.compile(devs, opts);
   prog.link(devs, opts, { prog });
+   } else if (any_of([&](const device &dev){
+ return prog.build(dev).binary_type() != 
CL_PROGRAM_BINARY_TYPE_EXECUTABLE;
+ }, objs(d_devs, num_devs))) {
+  // OpenCL 1.2 Specification, Section 5.6.2:
+  // > If program is created with clCreateProgramWithBinary, then the
+  // > program binary must be an executable binary (not a compiled binary 
or
+  // > library).
+  throw error(CL_INVALID_BINARY);
}
 
return CL_SUCCESS;
-- 
2.16.0

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[Mesa-dev] [PATCH v2 05/22] clover: Track flags per module section

[Pierre Moreau]

One flag that needs to be tracked is whether a library is allowed to
received mathematics optimisations or not, as the authorisation is given
when creating the library while the optimisations are specified when
creating the executable.

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/core/module.cpp  |  1 +
 src/gallium/state_trackers/clover/core/module.hpp  | 13 +
 src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp |  3 ++-
 src/gallium/state_trackers/clover/llvm/codegen/common.cpp  |  2 +-
 src/gallium/state_trackers/clover/tgsi/compiler.cpp|  3 ++-
 5 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/src/gallium/state_trackers/clover/core/module.cpp 
b/src/gallium/state_trackers/clover/core/module.cpp
index a6c5b98d8e..0e11506d0d 100644
--- a/src/gallium/state_trackers/clover/core/module.cpp
+++ b/src/gallium/state_trackers/clover/core/module.cpp
@@ -163,6 +163,7 @@ namespace {
   proc(S &s, QT &x) {
  _proc(s, x.id);
  _proc(s, x.type);
+ _proc(s, x.flags);
  _proc(s, x.size);
  _proc(s, x.data);
   }
diff --git a/src/gallium/state_trackers/clover/core/module.hpp 
b/src/gallium/state_trackers/clover/core/module.hpp
index 2ddd26426f..ff7e9b6234 100644
--- a/src/gallium/state_trackers/clover/core/module.hpp
+++ b/src/gallium/state_trackers/clover/core/module.hpp
@@ -41,14 +41,19 @@ namespace clover {
 data_local,
 data_private
  };
+ enum class flags_t {
+none,
+allow_link_options
+ };
 
- section(resource_id id, enum type type, size_t size,
- const std::vector &data) :
- id(id), type(type), size(size), data(data) { }
- section() : id(0), type(text_intermediate), size(0), data() { }
+ section(resource_id id, enum type type, flags_t flags,
+ size_t size, const std::vector &data) :
+ id(id), type(type), flags(flags), size(size), data(data) { }
+ section() : id(0), type(text_intermediate), flags(flags_t::none), 
size(0), data() { }
 
  resource_id id;
  type type;
+ flags_t flags;
  size_t size;
  std::vector data;
   };
diff --git a/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp 
b/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
index 6737f7af0a..5dbaebf640 100644
--- a/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
+++ b/src/gallium/state_trackers/clover/llvm/codegen/bitcode.cpp
@@ -90,7 +90,8 @@ clover::llvm::build_module_library(const ::llvm::Module &mod,
enum module::section::type section_type) {
module m;
const auto code = emit_code(mod);
-   m.secs.emplace_back(0, section_type, code.size(), code);
+   m.secs.emplace_back(0, section_type, module::section::flags_t::none,
+   code.size(), code);
return m;
 }
 
diff --git a/src/gallium/state_trackers/clover/llvm/codegen/common.cpp 
b/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
index ddf2083f37..3a08f11fcc 100644
--- a/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
+++ b/src/gallium/state_trackers/clover/llvm/codegen/common.cpp
@@ -179,7 +179,7 @@ namespace {
make_text_section(const std::vector &code) {
   const pipe_llvm_program_header header { uint32_t(code.size()) };
   module::section text { 0, module::section::text_executable,
- header.num_bytes, {} };
+ module::section::flags_t::none, header.num_bytes, 
{} };
 
   text.data.insert(text.data.end(), reinterpret_cast(&header),
reinterpret_cast(&header) + 
sizeof(header));
diff --git a/src/gallium/state_trackers/clover/tgsi/compiler.cpp 
b/src/gallium/state_trackers/clover/tgsi/compiler.cpp
index e165311fa4..bbe55825a0 100644
--- a/src/gallium/state_trackers/clover/tgsi/compiler.cpp
+++ b/src/gallium/state_trackers/clover/tgsi/compiler.cpp
@@ -91,7 +91,8 @@ namespace {
 
   unsigned sz = tgsi_num_tokens(prog) * sizeof(tgsi_token);
   std::vector data( (char *)prog, (char *)prog + sz );
-  m.secs.push_back({ 0, module::section::text_executable, sz, data });
+  m.secs.push_back({ 0, module::section::text_executable,
+module::section::flags_t::none, sz, data });
}
 }
 
-- 
2.16.0

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[Mesa-dev] [PATCH v2 04/22] clover: Disallow creating libraries from other libraries

[Pierre Moreau]

If creating a library, do not allow non-compiled object in it, as
executables are not allowed, and libraries would make it really hard to
enforce the "-enable-link-options" flag.

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 19 ---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 6044179587..8f0b103a4d 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -251,9 +251,13 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
 namespace {
ref_vector
validate_link_devices(const ref_vector &progs,
- const ref_vector &all_devs) {
+ const ref_vector &all_devs,
+ const std::string &opts) {
   std::vector devs;
 
+  const std::string flag = "-create-library";
+  const bool create_library = opts.find("-create-library") != 
std::string::npos;
+
   for (auto &dev : all_devs) {
  const auto has_binary = [&](const program &prog) {
 const auto t = prog.build(dev).binary_type();
@@ -261,10 +265,19 @@ namespace {
t == CL_PROGRAM_BINARY_TYPE_LIBRARY;
  };
 
+ // If creating a library, do not allow non-compiled object in it, as
+ // executables are not allowed, and libraries would make it really
+ // hard to enforce the "-enable-link-options".
+ if (create_library && any_of([&](const program &prog) {
+  const auto t = prog.build(dev).binary_type();
+  return t != CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT;
+   }, progs))
+throw error(CL_INVALID_OPERATION);
+
  // According to the CL 1.2 spec, when "all programs specified [..]
  // contain a compiled binary or library for the device [..] a link is
  // performed",
- if (all_of(has_binary, progs))
+ else if (all_of(has_binary, progs))
 devs.push_back(&dev);
 
  // otherwise if "none of the programs contain a compiled binary or
@@ -290,7 +303,7 @@ clLinkProgram(cl_context d_ctx, cl_uint num_devs, const 
cl_device_id *d_devs,
auto prog = create(ctx);
auto devs = validate_link_devices(progs,
  (d_devs ? objs(d_devs, num_devs) :
-  ref_vector(ctx.devices(;
+  ref_vector(ctx.devices())), 
opts);
 
validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
 
-- 
2.16.0

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[Mesa-dev] [PATCH v2 14/22] clover: Add a pointer property to return ILs

[Pierre Moreau]

OpenCL 2.1, and cl_khr_il_program, gives the ability to query for a
program’s IL, which is returned as a pointer.

Signed-off-by: Pierre Moreau 
---
 .../state_trackers/clover/core/property.hpp| 39 ++
 1 file changed, 39 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/property.hpp 
b/src/gallium/state_trackers/clover/core/property.hpp
index 7f8e17684d..5beac372e7 100644
--- a/src/gallium/state_trackers/clover/core/property.hpp
+++ b/src/gallium/state_trackers/clover/core/property.hpp
@@ -23,6 +23,7 @@
 #ifndef CLOVER_CORE_PROPERTY_HPP
 #define CLOVER_CORE_PROPERTY_HPP
 
+#include 
 #include 
 
 #include "util/range.hpp"
@@ -84,6 +85,19 @@ namespace clover {
   private:
  property_buffer &buf;
   };
+
+  template
+  class property_pointer {
+  public:
+ property_pointer(property_buffer &buf) : buf(buf) {
+ }
+
+ inline property_pointer &
+ operator=(const std::pair &v);
+
+  private:
+ property_buffer &buf;
+  };
};
 
///
@@ -118,6 +132,12 @@ namespace clover {
  return { *this };
   }
 
+  template
+  detail::property_pointer
+  as_pointer() {
+ return { *this };
+  }
+
   template
   iterator_range
   allocate(size_t n) {
@@ -133,6 +153,17 @@ namespace clover {
 return { };
   }
 
+  void
+  allocate_raw(const void *v, size_t n) {
+ if (r_buf && size < n)
+throw error(CL_INVALID_VALUE);
+
+ if (r_size)
+*r_size = n;
+
+ std::memcpy(r_buf, v, n);
+  }
+
private:
   void *const r_buf;
   const size_t size;
@@ -178,6 +209,14 @@ namespace clover {
  return *this;
   }
 
+  template
+  inline property_pointer &
+  property_pointer::operator=(const std::pair &v) {
+ buf.allocate_raw(v.first, v.second);
+
+ return *this;
+  }
+
   inline property_string &
   property_string::operator=(const std::string &v) {
  auto r = buf.allocate(v.size() + 1);
-- 
2.16.0

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[Mesa-dev] [PATCH v2 15/22] include/CL: Add cl_khr_il_program

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 include/CL/cl_ext.h | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/include/CL/cl_ext.h b/include/CL/cl_ext.h
index 710bea8837..2e4845d27d 100644
--- a/include/CL/cl_ext.h
+++ b/include/CL/cl_ext.h
@@ -308,6 +308,40 @@ typedef struct _cl_mem_ion_host_ptr
 
 #endif /* CL_VERSION_1_1 */
 
+
+/***
+ * cl_khr_il_program extension *
+ ***/
+
+#ifndef cl_khr_il_program
+#define cl_khr_il_program 1
+
+/* New property to clGetDeviceInfo for retrieving supported intermediate
+ * languages
+ */
+#define CL_DEVICE_IL_VERSION_KHR0x105B
+
+/* New property to clGetProgramInfo for retrieving for retrieving the IL of a
+ * program
+ */
+#define CL_PROGRAM_IL_KHR   0x1169
+
+extern CL_API_ENTRY cl_program
+  CL_API_CALL clCreateProgramWithILKHR(
+  cl_context /* context */,
+  const void * /* il */,
+  size_t /* length */,
+  cl_int * /* errcode_ret */) CL_EXT_SUFFIX__VERSION_1_2;
+
+typedef CL_API_ENTRY cl_program
+  (CL_API_CALL *clCreateProgramWithILKHR_fn)(
+  cl_context /* context */,
+  const void * /* il */,
+  size_t /* length */,
+  cl_int * /* errcode_ret */) CL_EXT_SUFFIX__VERSION_1_2;
+
+#endif /* cl_khr_il_program */
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.16.0

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[Mesa-dev] [PATCH v2 08/22] include/pipe: Define SPIRV as an IR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/include/pipe/p_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/include/pipe/p_defines.h 
b/src/gallium/include/pipe/p_defines.h
index b34e7a8570..082d4c4d87 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -896,6 +896,7 @@ enum pipe_shader_ir
PIPE_SHADER_IR_LLVM,
PIPE_SHADER_IR_NATIVE,
PIPE_SHADER_IR_NIR,
+   PIPE_SHADER_IR_SPIRV
 };
 
 /**
-- 
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[Mesa-dev] [PATCH v2 09/22] configure.ac, meson: Check for SPIRV-Tools

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 configure.ac | 5 +
 meson.build  | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/configure.ac b/configure.ac
index 7c1fbe0ed1..8c50ea6792 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2373,6 +2373,11 @@ AM_CONDITIONAL(HAVE_CLOVER_ICD, test 
"x$enable_opencl_icd" = xyes)
 AC_SUBST([OPENCL_LIBNAME])
 AC_SUBST([CLANG_RESOURCE_DIR])
 
+AS_IF([test "x$enable_opencl" = xyes], [
+PKG_CHECK_MODULES([SPIRV_TOOLS], [SPIRV-Tools >= 2017.3])])
+AC_SUBST([SPIRV_TOOLS_CFLAGS])
+AC_SUBST([SPIRV_TOOLS_LIBS])
+
 dnl
 dnl Gallium configuration
 dnl
diff --git a/meson.build b/meson.build
index f3179c3806..78315020fa 100644
--- a/meson.build
+++ b/meson.build
@@ -596,10 +596,12 @@ if _opencl != 'disabled'
 
   # TODO: alitvec?
   dep_clc = dependency('libclc')
+  dep_spirv_tools = dependency('SPIRV-Tools', version : '>= 2017.3')
   with_gallium_opencl = true
   with_opencl_icd = _opencl == 'icd'
 else
   dep_clc = []
+  dep_spirv_tools = []
   with_gallium_opencl = false
   with_gallium_icd = false
 endif
-- 
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[Mesa-dev] [PATCH v2 10/22] clover/spirv: Import spirv.hpp11 version 1.0 (rev 12)

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 .../state_trackers/clover/spirv/spirv.hpp11| 997 +
 1 file changed, 997 insertions(+)
 create mode 100644 src/gallium/state_trackers/clover/spirv/spirv.hpp11

diff --git a/src/gallium/state_trackers/clover/spirv/spirv.hpp11 
b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
new file mode 100644
index 00..792eeb1aa0
--- /dev/null
+++ b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
@@ -0,0 +1,997 @@
+// Copyright (c) 2014-2017 The Khronos Group Inc.
+// 
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and/or associated documentation files (the "Materials"),
+// to deal in the Materials without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Materials, and to permit persons to whom the
+// Materials are furnished to do so, subject to the following conditions:
+// 
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Materials.
+// 
+// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
+// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
+// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ 
+// 
+// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+// FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS
+// IN THE MATERIALS.
+
+// This header is automatically generated by the same tool that creates
+// the Binary Section of the SPIR-V specification.
+
+// Enumeration tokens for SPIR-V, in various styles:
+//   C, C++, C++11, JSON, Lua, Python
+// 
+// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
+// - C++ will have tokens in the "spv" name space, e.g.: 
spv::SourceLanguageGLSL
+// - C++11 will use enum classes in the spv namespace, e.g.: 
spv::SourceLanguage::GLSL
+// - Lua will use tables, e.g.: spv.SourceLanguage.GLSL
+// - Python will use dictionaries, e.g.: spv['SourceLanguage']['GLSL']
+// 
+// Some tokens act like mask values, which can be OR'd together,
+// while others are mutually exclusive.  The mask-like ones have
+// "Mask" in their name, and a parallel enum that has the shift
+// amount (1 << x) for each corresponding enumerant.
+
+#ifndef spirv_HPP
+#define spirv_HPP
+
+namespace spv {
+
+typedef unsigned int Id;
+
+#define SPV_VERSION 0x1
+#define SPV_REVISION 12
+
+static const unsigned int MagicNumber = 0x07230203;
+static const unsigned int Version = 0x0001;
+static const unsigned int Revision = 12;
+static const unsigned int OpCodeMask = 0x;
+static const unsigned int WordCountShift = 16;
+
+enum class SourceLanguage : unsigned {
+Unknown = 0,
+ESSL = 1,
+GLSL = 2,
+OpenCL_C = 3,
+OpenCL_CPP = 4,
+HLSL = 5,
+Max = 0x7fff,
+};
+
+enum class ExecutionModel : unsigned {
+Vertex = 0,
+TessellationControl = 1,
+TessellationEvaluation = 2,
+Geometry = 3,
+Fragment = 4,
+GLCompute = 5,
+Kernel = 6,
+Max = 0x7fff,
+};
+
+enum class AddressingModel : unsigned {
+Logical = 0,
+Physical32 = 1,
+Physical64 = 2,
+Max = 0x7fff,
+};
+
+enum class MemoryModel : unsigned {
+Simple = 0,
+GLSL450 = 1,
+OpenCL = 2,
+Max = 0x7fff,
+};
+
+enum class ExecutionMode : unsigned {
+Invocations = 0,
+SpacingEqual = 1,
+SpacingFractionalEven = 2,
+SpacingFractionalOdd = 3,
+VertexOrderCw = 4,
+VertexOrderCcw = 5,
+PixelCenterInteger = 6,
+OriginUpperLeft = 7,
+OriginLowerLeft = 8,
+EarlyFragmentTests = 9,
+PointMode = 10,
+Xfb = 11,
+DepthReplacing = 12,
+DepthGreater = 14,
+DepthLess = 15,
+DepthUnchanged = 16,
+LocalSize = 17,
+LocalSizeHint = 18,
+InputPoints = 19,
+InputLines = 20,
+InputLinesAdjacency = 21,
+Triangles = 22,
+InputTrianglesAdjacency = 23,
+Quads = 24,
+Isolines = 25,
+OutputVertices = 26,
+OutputPoints = 27,
+OutputLineStrip = 28,
+OutputTriangleStrip = 29,
+VecTypeHint = 30,
+ContractionOff = 31,
+PostDepthCoverage = 4446,
+StencilRefReplacingEXT = 5027,
+Max = 0x7fff,
+};
+
+enum class StorageClass : unsigned {
+UniformConstant = 0,
+Input = 1,
+Uniform = 2,
+Output = 3,
+Workgroup = 4,
+CrossWorkgroup = 5,
+Private = 6,
+Function = 7,
+Generic = 8,
+PushConstant

[Mesa-dev] [PATCH v2 06/22] clover: Move device extensions definitions to core/device.cpp

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/device.cpp  | 11 +--
 src/gallium/state_trackers/clover/core/device.cpp | 14 ++
 src/gallium/state_trackers/clover/core/device.hpp |  1 +
 3 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 576555a9af..4e274c5005 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -330,16 +330,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
   break;
 
case CL_DEVICE_EXTENSIONS:
-  buf.as_string() =
- "cl_khr_byte_addressable_store"
- " cl_khr_global_int32_base_atomics"
- " cl_khr_global_int32_extended_atomics"
- " cl_khr_local_int32_base_atomics"
- " cl_khr_local_int32_extended_atomics"
- + std::string(dev.has_int64_atomics() ? " cl_khr_int64_base_atomics" 
: "")
- + std::string(dev.has_int64_atomics() ? " 
cl_khr_int64_extended_atomics" : "")
- + std::string(dev.has_doubles() ? " cl_khr_fp64" : "")
- + std::string(dev.has_halves() ? " cl_khr_fp16" : "");
+  buf.as_string() = dev.supported_extensions();
   break;
 
case CL_DEVICE_PLATFORM:
diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 7eaa0ca2cb..9fb233aa72 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -279,3 +279,17 @@ bool
 device::supports_ir(cl_uint ir) const {
return supported_irs() & (1 << ir);
 }
+
+std::string
+device::supported_extensions() const {
+   return
+  "cl_khr_byte_addressable_store"
+  " cl_khr_global_int32_base_atomics"
+  " cl_khr_global_int32_extended_atomics"
+  " cl_khr_local_int32_base_atomics"
+  " cl_khr_local_int32_extended_atomics"
+  + std::string(has_int64_atomics() ? " cl_khr_int64_base_atomics" : "")
+  + std::string(has_int64_atomics() ? " cl_khr_int64_extended_atomics" : 
"")
+  + std::string(has_doubles() ? " cl_khr_fp64" : "")
+  + std::string(has_halves() ? " cl_khr_fp16" : "");
+}
diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
b/src/gallium/state_trackers/clover/core/device.hpp
index eed644e919..98b9637ace 100644
--- a/src/gallium/state_trackers/clover/core/device.hpp
+++ b/src/gallium/state_trackers/clover/core/device.hpp
@@ -83,6 +83,7 @@ namespace clover {
   cl_uint supported_irs() const;
   std::string ir_target() const;
   enum pipe_endian endianness() const;
+  std::string supported_extensions() const;
 
   bool supports_ir(cl_uint ir) const;
 
-- 
2.16.0

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[Mesa-dev] [PATCH v2 07/22] clover: Move platform extensions definitions to clover/platform.cpp

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/platform.cpp  | 4 ++--
 src/gallium/state_trackers/clover/core/platform.cpp | 5 +
 src/gallium/state_trackers/clover/core/platform.hpp | 2 ++
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/platform.cpp 
b/src/gallium/state_trackers/clover/api/platform.cpp
index ed86163311..887dfd0a22 100644
--- a/src/gallium/state_trackers/clover/api/platform.cpp
+++ b/src/gallium/state_trackers/clover/api/platform.cpp
@@ -50,7 +50,7 @@ clover::GetPlatformInfo(cl_platform_id d_platform, 
cl_platform_info param,
 size_t size, void *r_buf, size_t *r_size) try {
property_buffer buf { r_buf, size, r_size };
 
-   obj(d_platform);
+   auto &platform = obj(d_platform);
 
switch (param) {
case CL_PLATFORM_PROFILE:
@@ -74,7 +74,7 @@ clover::GetPlatformInfo(cl_platform_id d_platform, 
cl_platform_info param,
   break;
 
case CL_PLATFORM_EXTENSIONS:
-  buf.as_string() = "cl_khr_icd";
+  buf.as_string() = platform.supported_extensions();
   break;
 
case CL_PLATFORM_ICD_SUFFIX_KHR:
diff --git a/src/gallium/state_trackers/clover/core/platform.cpp 
b/src/gallium/state_trackers/clover/core/platform.cpp
index 489e8dc5a8..ddd63fc5a0 100644
--- a/src/gallium/state_trackers/clover/core/platform.cpp
+++ b/src/gallium/state_trackers/clover/core/platform.cpp
@@ -39,3 +39,8 @@ platform::platform() : adaptor_range(evals(), devs) {
   }
}
 }
+
+std::string
+platform::supported_extensions() const {
+   return "cl_khr_icd";
+}
diff --git a/src/gallium/state_trackers/clover/core/platform.hpp 
b/src/gallium/state_trackers/clover/core/platform.hpp
index e849645bbe..b94434c983 100644
--- a/src/gallium/state_trackers/clover/core/platform.hpp
+++ b/src/gallium/state_trackers/clover/core/platform.hpp
@@ -40,6 +40,8 @@ namespace clover {
   platform &
   operator=(const platform &platform) = delete;
 
+  std::string supported_extensions() const;
+
protected:
   std::vector> devs;
};
-- 
2.16.0

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[Mesa-dev] [PATCH v2 18/22] clover/api: Implement CL_DEVICE_IL_VERSION_KHR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/device.cpp | 5 +
 1 file changed, 5 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 4e274c5005..6bede21ca4 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -333,6 +333,11 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
   buf.as_string() = dev.supported_extensions();
   break;
 
+   case CL_DEVICE_IL_VERSION_KHR:
+  buf.as_string() =
+ std::string(dev.supports_ir(PIPE_SHADER_IR_SPIRV) ? "SPIR-V_1.0" : 
"");
+  break;
+
case CL_DEVICE_PLATFORM:
   buf.as_scalar() = desc(dev.platform);
   break;
-- 
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[Mesa-dev] [PATCH v2 16/22] clover: Implement clCreateProgramWithILKHR

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/dispatch.hpp |  4 ++
 src/gallium/state_trackers/clover/api/program.cpp  | 29 -
 src/gallium/state_trackers/clover/core/program.cpp | 68 +-
 src/gallium/state_trackers/clover/core/program.hpp | 14 +
 4 files changed, 110 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/dispatch.hpp 
b/src/gallium/state_trackers/clover/api/dispatch.hpp
index 0910e19422..21bd379fe6 100644
--- a/src/gallium/state_trackers/clover/api/dispatch.hpp
+++ b/src/gallium/state_trackers/clover/api/dispatch.hpp
@@ -900,6 +900,10 @@ namespace clover {
cl_int
IcdGetPlatformIDsKHR(cl_uint num_entries, cl_platform_id *rd_platforms,
 cl_uint *rnum_platforms);
+
+   cl_program
+   CreateProgramWithILKHR(cl_context d_ctx, const void *il,
+  const size_t length, cl_int *r_errcode);
 }
 
 #endif
diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 6ec87ad128..ed3b679c7c 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -22,6 +22,7 @@
 
 #include "api/util.hpp"
 #include "core/program.hpp"
+#include "spirv/invocation.hpp"
 #include "util/u_debug.h"
 
 #include 
@@ -128,6 +129,30 @@ clCreateProgramWithBinary(cl_context d_ctx, cl_uint n,
return NULL;
 }
 
+cl_program
+clover::CreateProgramWithILKHR(cl_context d_ctx, const void *il,
+   const size_t length, cl_int *r_errcode) try {
+   auto &ctx = obj(d_ctx);
+
+   if (!il || !length)
+  throw error(CL_INVALID_VALUE);
+
+   uint32_t type = UINT32_MAX;
+   if (spirv::is_binary_spirv(reinterpret_cast(il)))
+  type = PIPE_SHADER_IR_SPIRV;
+
+   if (type == UINT32_MAX)
+  throw error(CL_INVALID_VALUE);
+
+   // initialize a program object with it.
+   ret_error(r_errcode, CL_SUCCESS);
+   return new program(ctx, il, length, type);
+
+} catch (error &e) {
+   ret_error(r_errcode, e);
+   return NULL;
+}
+
 CLOVER_API cl_program
 clCreateProgramWithBuiltInKernels(cl_context d_ctx, cl_uint n,
   const cl_device_id *d_devs,
@@ -183,7 +208,7 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
 
validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
 
-   if (prog.has_source) {
+   if (prog.has_source || prog.has_il) {
   prog.compile(devs, opts);
   prog.link(devs, opts, { prog });
} else if (any_of([&](const device &dev){
@@ -221,7 +246,7 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
if (bool(num_headers) != bool(header_names))
   throw error(CL_INVALID_VALUE);
 
-   if (!prog.has_source)
+   if (!prog.has_source && !prog.has_il)
   throw error(CL_INVALID_OPERATION);
 
for_each([&](const char *name, const program &header) {
diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 976213ef95..b9ba38d4e6 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -24,24 +24,51 @@
 #include "llvm/invocation.hpp"
 #include "spirv/invocation.hpp"
 #include "tgsi/invocation.hpp"
+#include "spirv/invocation.hpp"
+
+#include 
 
 using namespace clover;
 
 program::program(clover::context &ctx, const std::string &source) :
-   has_source(true), context(ctx), _source(source), _kernel_ref_counter(0) {
+   has_source(true), has_il(false), il_type(UINT32_MAX), context(ctx),
+   _source(source), _kernel_ref_counter(0), _il(nullptr), _length(0) {
 }
 
 program::program(clover::context &ctx,
  const ref_vector &devs,
  const std::vector &binaries) :
-   has_source(false), context(ctx),
-   _devices(devs), _kernel_ref_counter(0) {
+   has_source(false), has_il(false), il_type(UINT32_MAX), context(ctx),
+   _devices(devs), _kernel_ref_counter(0), _il(nullptr), _length(0) {
for_each([&](device &dev, const module &bin) {
  _builds[&dev] = { bin };
   },
   devs, binaries);
 }
 
+program::program(clover::context &ctx, const void *il, const size_t length,
+ const uint32_t type) :
+   has_source(false), has_il(true), il_type(type), context(ctx),
+   _kernel_ref_counter(0), _il(nullptr), _length(length) {
+   switch (il_type) {
+   case PIPE_SHADER_IR_SPIRV: {
+ const char *c_il = reinterpret_cast(il);
+ _il = spirv::spirv_to_cpu(c_il, length);
+  }
+  break;
+   }
+}
+
+program::~program() {
+   if (has_il) {
+  switch (il_type) {
+  case PIPE_SHADER_IR_SPIRV:
+ delete[] reinterpret_cast(_il);
+ break;
+  }
+   }
+}
+
 void
 program::compile(const ref_vector &devs, 

[Mesa-dev] [PATCH v2 17/22] clover: Handle CL_PROGRAM_IL_KHR in clGetProgramInfo

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/program.cpp | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index ed3b679c7c..754a5f2b00 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -391,6 +391,13 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
   buf.as_string() = prog.source();
   break;
 
+   case CL_PROGRAM_IL_KHR:
+  if (prog.has_il)
+ buf.as_pointer() = std::make_pair(prog.il(), prog.length());
+  else if (r_size)
+ *r_size = 0u;
+  break;
+
case CL_PROGRAM_BINARY_SIZES:
   buf.as_vector() = map([&](const device &dev) {
 return prog.build(dev).binary.size();
-- 
2.16.0

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[Mesa-dev] [PATCH v2 20/22] include/CL: Export OpenCL 2.1 functions

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 include/CL/cl.h  | 8 
 include/CL/cl_platform.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/include/CL/cl.h b/include/CL/cl.h
index 316565d6e4..2130c19c5e 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -280,6 +280,7 @@ typedef struct _cl_buffer_region {
 #define CL_DEVICE_PRINTF_BUFFER_SIZE0x1049
 #define CL_DEVICE_IMAGE_PITCH_ALIGNMENT 0x104A
 #define CL_DEVICE_IMAGE_BASE_ADDRESS_ALIGNMENT  0x104B
+#define CL_DEVICE_IL_VERSION0x105B
 
 /* cl_device_fp_config - bitfield */
 #define CL_FP_DENORM(1 << 0)
@@ -455,6 +456,7 @@ typedef struct _cl_buffer_region {
 #define CL_PROGRAM_BINARIES 0x1166
 #define CL_PROGRAM_NUM_KERNELS  0x1167
 #define CL_PROGRAM_KERNEL_NAMES 0x1168
+#define CL_PROGRAM_IL   0x1169
 
 /* cl_program_build_info */
 #define CL_PROGRAM_BUILD_STATUS 0x1181
@@ -757,6 +759,12 @@ clCreateProgramWithBuiltInKernels(cl_context/* 
context */,
   const char *  /* kernel_names */,
   cl_int *  /* errcode_ret */) 
CL_API_SUFFIX__VERSION_1_2;
 
+extern CL_API_ENTRY cl_program CL_API_CALL
+clCreateProgramWithIL(cl_context/* context */,
+ const void*/* il */,
+ size_t /* length */,
+ cl_int*/* errcode_ret */) 
CL_API_SUFFIX__VERSION_2_1;
+
 extern CL_API_ENTRY cl_int CL_API_CALL
 clRetainProgram(cl_program /* program */) CL_API_SUFFIX__VERSION_1_0;
 
diff --git a/include/CL/cl_platform.h b/include/CL/cl_platform.h
index 7f6f5e8a74..105d3cc1f0 100644
--- a/include/CL/cl_platform.h
+++ b/include/CL/cl_platform.h
@@ -75,6 +75,7 @@ extern "C" {
 #define CL_EXT_SUFFIX__VERSION_1_1
 #define CL_API_SUFFIX__VERSION_1_2
 #define CL_EXT_SUFFIX__VERSION_1_2
+#define CL_API_SUFFIX__VERSION_2_1
 
 #ifdef __GNUC__
 #ifdef CL_USE_DEPRECATED_OPENCL_1_0_APIS
-- 
2.16.0

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[Mesa-dev] [PATCH v2 19/22] clover: Advertise cl_khr_il_program

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/platform.cpp | 2 ++
 src/gallium/state_trackers/clover/core/device.cpp  | 3 ++-
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/platform.cpp 
b/src/gallium/state_trackers/clover/api/platform.cpp
index 887dfd0a22..7f4c959abb 100644
--- a/src/gallium/state_trackers/clover/api/platform.cpp
+++ b/src/gallium/state_trackers/clover/api/platform.cpp
@@ -107,6 +107,8 @@ clover::GetExtensionFunctionAddress(const char *p_name) {
 
if (name == "clIcdGetPlatformIDsKHR")
   return reinterpret_cast(IcdGetPlatformIDsKHR);
+   else if (name == "clCreateProgramWithILKHR")
+  return reinterpret_cast(CreateProgramWithILKHR);
else
   return NULL;
 }
diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
b/src/gallium/state_trackers/clover/core/device.cpp
index 9fb233aa72..f73740e0bd 100644
--- a/src/gallium/state_trackers/clover/core/device.cpp
+++ b/src/gallium/state_trackers/clover/core/device.cpp
@@ -291,5 +291,6 @@ device::supported_extensions() const {
   + std::string(has_int64_atomics() ? " cl_khr_int64_base_atomics" : "")
   + std::string(has_int64_atomics() ? " cl_khr_int64_extended_atomics" : 
"")
   + std::string(has_doubles() ? " cl_khr_fp64" : "")
-  + std::string(has_halves() ? " cl_khr_fp16" : "");
+  + std::string(has_halves() ? " cl_khr_fp16" : "")
+  + std::string(supports_ir(PIPE_SHADER_IR_SPIRV) ? " cl_khr_il_program" : 
"");
 }
-- 
2.16.0

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[Mesa-dev] [PATCH v2 22/22] clover: Use OpenCL 2.1 defines in place of cl_khr_il_program

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/device.cpp  | 2 +-
 src/gallium/state_trackers/clover/api/program.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
b/src/gallium/state_trackers/clover/api/device.cpp
index 6bede21ca4..5624ee47fb 100644
--- a/src/gallium/state_trackers/clover/api/device.cpp
+++ b/src/gallium/state_trackers/clover/api/device.cpp
@@ -333,7 +333,7 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info param,
   buf.as_string() = dev.supported_extensions();
   break;
 
-   case CL_DEVICE_IL_VERSION_KHR:
+   case CL_DEVICE_IL_VERSION:
   buf.as_string() =
  std::string(dev.supports_ir(PIPE_SHADER_IR_SPIRV) ? "SPIR-V_1.0" : 
"");
   break;
diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 134272b085..c5ef31d502 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -399,7 +399,7 @@ clGetProgramInfo(cl_program d_prog, cl_program_info param,
   buf.as_string() = prog.source();
   break;
 
-   case CL_PROGRAM_IL_KHR:
+   case CL_PROGRAM_IL:
   if (prog.has_il)
  buf.as_pointer() = std::make_pair(prog.il(), prog.length());
   else if (r_size)
-- 
2.16.0

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[Mesa-dev] [PATCH v2 21/22] clover: Implement clCreateProgramWithIL from OpenCL 2.1

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---
 src/gallium/state_trackers/clover/api/dispatch.cpp | 2 +-
 src/gallium/state_trackers/clover/api/program.cpp  | 8 
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/clover/api/dispatch.cpp 
b/src/gallium/state_trackers/clover/api/dispatch.cpp
index f362c84819..f5f3248f26 100644
--- a/src/gallium/state_trackers/clover/api/dispatch.cpp
+++ b/src/gallium/state_trackers/clover/api/dispatch.cpp
@@ -162,7 +162,7 @@ namespace clover {
   NULL, // clSetKernelExecInfo
   NULL, // clGetKernelSubGroupInfoKHR
   NULL, // clCloneKernel
-  NULL, // clCreateProgramWithIL,
+  clCreateProgramWithIL,
   NULL, // clEnqueueSVMMigrateMem
   NULL, // clGetDeviceAndHostTimer
   NULL, // clGetHostTimer
diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 754a5f2b00..134272b085 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -153,6 +153,14 @@ clover::CreateProgramWithILKHR(cl_context d_ctx, const 
void *il,
return NULL;
 }
 
+CLOVER_API cl_program
+clCreateProgramWithIL(cl_context d_ctx,
+  const void *il,
+  const size_t length,
+  cl_int *r_errcode) {
+   return CreateProgramWithILKHR(d_ctx, il, length, r_errcode);
+}
+
 CLOVER_API cl_program
 clCreateProgramWithBuiltInKernels(cl_context d_ctx, cl_uint n,
   const cl_device_id *d_devs,
-- 
2.16.0

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[Mesa-dev] [PATCH v2 11/22] clover/spirv: Add functions for parsing arguments, linking programs, etc.

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Resending to the ML, as gabe ran out of memory.

 src/gallium/state_trackers/clover/Makefile.am  |  15 +-
 src/gallium/state_trackers/clover/Makefile.sources |   4 +
 src/gallium/state_trackers/clover/api/program.cpp  |   1 -
 src/gallium/state_trackers/clover/meson.build  |  10 +-
 .../state_trackers/clover/spirv/invocation.cpp | 668 +
 .../state_trackers/clover/spirv/invocation.hpp |  54 ++
 6 files changed, 748 insertions(+), 4 deletions(-)
 create mode 100644 src/gallium/state_trackers/clover/spirv/invocation.cpp
 create mode 100644 src/gallium/state_trackers/clover/spirv/invocation.hpp

diff --git a/src/gallium/state_trackers/clover/Makefile.am 
b/src/gallium/state_trackers/clover/Makefile.am
index a7befb4605..9bbe8b6d9c 100644
--- a/src/gallium/state_trackers/clover/Makefile.am
+++ b/src/gallium/state_trackers/clover/Makefile.am
@@ -28,7 +28,7 @@ cl_HEADERS = \
$(top_srcdir)/include/CL/opencl.h
 endif
 
-noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la
+noinst_LTLIBRARIES = libclover.la libcltgsi.la libclllvm.la libclspirv.la
 
 libcltgsi_la_CXXFLAGS = \
$(CXX11_CXXFLAGS) \
@@ -50,13 +50,24 @@ libclllvm_la_CXXFLAGS = \
 
 libclllvm_la_SOURCES = $(LLVM_SOURCES)
 
+libclspirv_la_CXXFLAGS = \
+   $(CXX11_CXXFLAGS) \
+   $(CLOVER_STD_OVERRIDE) \
+   $(VISIBILITY_CXXFLAGS) \
+   $(SPIRV_TOOLS_CFLAGS)
+
+libclspirv_la_SOURCES = $(SPIRV_SOURCES)
+
+libclspirv_la_LDFLAGS = \
+   $(SPIRV_TOOLS_LIBS)
+
 libclover_la_CXXFLAGS = \
$(CXX11_CXXFLAGS) \
$(CLOVER_STD_OVERRIDE) \
$(VISIBILITY_CXXFLAGS)
 
 libclover_la_LIBADD = \
-   libcltgsi.la libclllvm.la
+   libcltgsi.la libclllvm.la libclspirv.la
 
 libclover_la_SOURCES = $(CPP_SOURCES)
 
diff --git a/src/gallium/state_trackers/clover/Makefile.sources 
b/src/gallium/state_trackers/clover/Makefile.sources
index e9828b107b..f223bebcd3 100644
--- a/src/gallium/state_trackers/clover/Makefile.sources
+++ b/src/gallium/state_trackers/clover/Makefile.sources
@@ -66,3 +66,7 @@ LLVM_SOURCES := \
 TGSI_SOURCES := \
tgsi/compiler.cpp \
tgsi/invocation.hpp
+
+SPIRV_SOURCES := \
+   spirv/invocation.cpp \
+   spirv/invocation.hpp
diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
b/src/gallium/state_trackers/clover/api/program.cpp
index 8f0b103a4d..6ec87ad128 100644
--- a/src/gallium/state_trackers/clover/api/program.cpp
+++ b/src/gallium/state_trackers/clover/api/program.cpp
@@ -255,7 +255,6 @@ namespace {
  const std::string &opts) {
   std::vector devs;
 
-  const std::string flag = "-create-library";
   const bool create_library = opts.find("-create-library") != 
std::string::npos;
 
   for (auto &dev : all_devs) {
diff --git a/src/gallium/state_trackers/clover/meson.build 
b/src/gallium/state_trackers/clover/meson.build
index d1497e657e..cc3c7253de 100644
--- a/src/gallium/state_trackers/clover/meson.build
+++ b/src/gallium/state_trackers/clover/meson.build
@@ -58,6 +58,14 @@ libclllvm = static_library(
   dependencies : [dep_llvm, dep_elf],
 )
 
+libclspirv = static_library(
+  'clspirv',
+  files('spirv/invocation.cpp', 'spirv/invocation.hpp'),
+  include_directories : clover_incs,
+  cpp_args : [cpp_vis_args],
+  dependencies : [dep_spirv_tools],
+)
+
 clover_files = files(
   'api/context.cpp',
   'api/device.cpp',
@@ -118,5 +126,5 @@ libclover = static_library(
   clover_files,
   include_directories : clover_incs,
   cpp_args : [clover_cpp_args, cpp_vis_args],
-  link_with : [libcltgsi, libclllvm],
+  link_with : [libcltgsi, libclllvm, libclspirv],
 )
diff --git a/src/gallium/state_trackers/clover/spirv/invocation.cpp 
b/src/gallium/state_trackers/clover/spirv/invocation.cpp
new file mode 100644
index 00..3087947948
--- /dev/null
+++ b/src/gallium/state_trackers/clover/spirv/invocation.cpp
@@ -0,0 +1,668 @@
+//
+// Copyright 2017 Pierre Moreau
+//
+// Permission is hereby granted, free of charge, to any person obtaining a
+// copy of this software and associated documentation files (the "Software"),
+// to deal in the Software without restriction, including without limitation
+// the rights to use, copy, modify, merge, publish, distribute, sublicense,
+// and/or sell copies of the Software, and to permit persons to whom the
+// Software is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR

[Mesa-dev] [PATCH v2 12/22] clover: Refuse to compile source code to SPIR-V

[Pierre Moreau]

Creating a program using clCreateProgramWithSource to SPIR-V requires a
non-upstreamed version of LLVM and clang, therefore it is currently not
supported.

Signed-off-by: Pierre Moreau 
---

Resending to the ML, as gabe ran out of memory.

 src/gallium/state_trackers/clover/core/program.cpp | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index ae4b50a879..15d559cd93 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -51,6 +51,10 @@ program::compile(const ref_vector &devs, const 
std::string &opts,
  std::string log;
 
  try {
+if (dev.ir_format() == PIPE_SHADER_IR_SPIRV) {
+   log = "Compiling from source to SPIR-V is not supported yet\n";
+   throw error(CL_INVALID_DEVICE);
+}
 const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
   tgsi::compile_program(_source, log) :
   llvm::compile_program(_source, headers,
-- 
2.16.0

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[Mesa-dev] [PATCH v2 13/22] clover: Handle the case when linking SPIR-V binaries together

[Pierre Moreau]

Signed-off-by: Pierre Moreau 
---

Resending to the ML, as gabe ran out of memory.

 src/gallium/state_trackers/clover/core/program.cpp | 22 +-
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
b/src/gallium/state_trackers/clover/core/program.cpp
index 15d559cd93..976213ef95 100644
--- a/src/gallium/state_trackers/clover/core/program.cpp
+++ b/src/gallium/state_trackers/clover/core/program.cpp
@@ -22,6 +22,7 @@
 
 #include "core/program.hpp"
 #include "llvm/invocation.hpp"
+#include "spirv/invocation.hpp"
 #include "tgsi/invocation.hpp"
 
 using namespace clover;
@@ -80,11 +81,22 @@ program::link(const ref_vector &devs, const 
std::string &opts,
   std::string log = _builds[&dev].log;
 
   try {
- const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
-   tgsi::link_program(ms) :
-   llvm::link_program(ms, dev.ir_format(),
-  dev.ir_target(), opts, log));
- _builds[&dev] = { m, opts, log };
+ switch (dev.ir_format()) {
+ case PIPE_SHADER_IR_TGSI:
+_builds[&dev] = { tgsi::link_program(ms), opts, log };
+break;
+ case PIPE_SHADER_IR_LLVM:
+ case PIPE_SHADER_IR_NATIVE:
+ case PIPE_SHADER_IR_NIR:
+_builds[&dev] = { llvm::link_program(ms, dev.ir_format(),
+ dev.ir_target(), opts, log),
+  opts, log };
+break;
+ case PIPE_SHADER_IR_SPIRV:
+_builds[&dev] = { clover::spirv::link_program(ms, opts, log), opts,
+  log };
+break;
+ }
   } catch (...) {
  _builds[&dev] = { module(), opts, log };
  throw;
-- 
2.16.0

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Re: [Mesa-dev] [PATCH v2 13/22] clover: Handle the case when linking SPIR-V binaries together

[Pierre Moreau]

On 2018-01-23 — 08:32, Karol Herbst wrote:
> On Tue, Jan 23, 2018 at 1:33 AM, Pierre Moreau  wrote:
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/state_trackers/clover/core/program.cpp | 22 
> > +-
> >  1 file changed, 17 insertions(+), 5 deletions(-)
> >
> > diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
> > b/src/gallium/state_trackers/clover/core/program.cpp
> > index 15d559cd93..976213ef95 100644
> > --- a/src/gallium/state_trackers/clover/core/program.cpp
> > +++ b/src/gallium/state_trackers/clover/core/program.cpp
> > @@ -22,6 +22,7 @@
> >
> >  #include "core/program.hpp"
> >  #include "llvm/invocation.hpp"
> > +#include "spirv/invocation.hpp"
> >  #include "tgsi/invocation.hpp"
> >
> >  using namespace clover;
> > @@ -80,11 +81,22 @@ program::link(const ref_vector &devs, const 
> > std::string &opts,
> >std::string log = _builds[&dev].log;
> >
> >try {
> > - const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
> > -   tgsi::link_program(ms) :
> > -   llvm::link_program(ms, dev.ir_format(),
> > -  dev.ir_target(), opts, log));
> > - _builds[&dev] = { m, opts, log };
> > + switch (dev.ir_format()) {
> > + case PIPE_SHADER_IR_TGSI:
> > +_builds[&dev] = { tgsi::link_program(ms), opts, log };
> > +break;
> > + case PIPE_SHADER_IR_LLVM:
> > + case PIPE_SHADER_IR_NATIVE:
> > + case PIPE_SHADER_IR_NIR:
> 
> is adding NIR here actually want to do? I am not aware of any path
> that would allow any NIR driver to support llvm at all.

That NIR case is not supposed to be there, and I have no idea how it got in. :o
I’ll remove it asap. Thanks for pointing it out!

Pierre

> 
> > +_builds[&dev] = { llvm::link_program(ms, dev.ir_format(),
> > + dev.ir_target(), opts, 
> > log),
> > +  opts, log };
> > +break;
> > + case PIPE_SHADER_IR_SPIRV:
> > +_builds[&dev] = { clover::spirv::link_program(ms, opts, log), 
> > opts,
> > +  log };
> > +break;
> > + }
> >} catch (...) {
> >   _builds[&dev] = { module(), opts, log };
> >   throw;
> > --
> > 2.16.0
> >


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Re: [Mesa-dev] [PATCH v2 08/22] include/pipe: Define SPIRV as an IR

[Pierre Moreau]

On 2018-01-23 — 14:07, Jan Vesely wrote:
> On Tue, 2018-01-23 at 01:33 +0100, Pierre Moreau wrote:
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/include/pipe/p_defines.h | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/src/gallium/include/pipe/p_defines.h 
> > b/src/gallium/include/pipe/p_defines.h
> > index b34e7a8570..082d4c4d87 100644
> > --- a/src/gallium/include/pipe/p_defines.h
> > +++ b/src/gallium/include/pipe/p_defines.h
> > @@ -896,6 +896,7 @@ enum pipe_shader_ir
> > PIPE_SHADER_IR_LLVM,
> > PIPE_SHADER_IR_NATIVE,
> > PIPE_SHADER_IR_NIR,
> > +   PIPE_SHADER_IR_SPIRV
> 
> Why is this needed/useful? presumably the pipe driver will convert
> SPIRV to NIR or LLVM anyway, why not convert it in clover and pass one
> of the already existing IRs ?
> 
> Jan

It is true it’s not really needed for this series, it’s mainly for my SPIR-V
frontend for Nouveau. I could drop it from this series for now, especially if
SPIR-V get directly translated to another IR and never stays as such, or going
the opposite and always keeping SPIR-V until the very last moment.

Pierre

> 
> >  };
> >  
> >  /**


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Re: [Mesa-dev] [PATCH v2 09/22] configure.ac, meson: Check for SPIRV-Tools

[Pierre Moreau]

On 2018-01-23 — 14:20, Jan Vesely wrote:
> On Tue, 2018-01-23 at 01:33 +0100, Pierre Moreau wrote:
> > Signed-off-by: Pierre Moreau 
> 
> do these tools handle the original SPIR format as well? can this be
> used to support cl_khr_spir?
> 
> Jan

They do not I’m afraid. I just saw that SPIR-Tools [1] exists, hosted by
Khronos as well, but I haven’t interacted with those tools in the slightest.

[1]: https://github.com/KhronosGroup/SPIR-Tools

Pierre

> 
> > ---
> >  configure.ac | 5 +
> >  meson.build  | 2 ++
> >  2 files changed, 7 insertions(+)
> > 
> > diff --git a/configure.ac b/configure.ac
> > index 7c1fbe0ed1..8c50ea6792 100644
> > --- a/configure.ac
> > +++ b/configure.ac
> > @@ -2373,6 +2373,11 @@ AM_CONDITIONAL(HAVE_CLOVER_ICD, test 
> > "x$enable_opencl_icd" = xyes)
> >  AC_SUBST([OPENCL_LIBNAME])
> >  AC_SUBST([CLANG_RESOURCE_DIR])
> >  
> > +AS_IF([test "x$enable_opencl" = xyes], [
> > +PKG_CHECK_MODULES([SPIRV_TOOLS], [SPIRV-Tools >= 2017.3])])
> > +AC_SUBST([SPIRV_TOOLS_CFLAGS])
> > +AC_SUBST([SPIRV_TOOLS_LIBS])
> > +
> >  dnl
> >  dnl Gallium configuration
> >  dnl
> > diff --git a/meson.build b/meson.build
> > index f3179c3806..78315020fa 100644
> > --- a/meson.build
> > +++ b/meson.build
> > @@ -596,10 +596,12 @@ if _opencl != 'disabled'
> >  
> ># TODO: alitvec?
> >dep_clc = dependency('libclc')
> > +  dep_spirv_tools = dependency('SPIRV-Tools', version : '>= 2017.3')
> >with_gallium_opencl = true
> >with_opencl_icd = _opencl == 'icd'
> >  else
> >dep_clc = []
> > +  dep_spirv_tools = []
> >with_gallium_opencl = false
> >with_gallium_icd = false
> >  endif


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Re: [Mesa-dev] [PATCH v2 08/22] include/pipe: Define SPIRV as an IR

[Pierre Moreau]

On 2018-01-23 — 13:33, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > On 2018-01-23 — 14:07, Jan Vesely wrote:
> >> On Tue, 2018-01-23 at 01:33 +0100, Pierre Moreau wrote:
> >> > Signed-off-by: Pierre Moreau 
> >> > ---
> >> >  src/gallium/include/pipe/p_defines.h | 1 +
> >> >  1 file changed, 1 insertion(+)
> >> > 
> >> > diff --git a/src/gallium/include/pipe/p_defines.h 
> >> > b/src/gallium/include/pipe/p_defines.h
> >> > index b34e7a8570..082d4c4d87 100644
> >> > --- a/src/gallium/include/pipe/p_defines.h
> >> > +++ b/src/gallium/include/pipe/p_defines.h
> >> > @@ -896,6 +896,7 @@ enum pipe_shader_ir
> >> > PIPE_SHADER_IR_LLVM,
> >> > PIPE_SHADER_IR_NATIVE,
> >> > PIPE_SHADER_IR_NIR,
> >> > +   PIPE_SHADER_IR_SPIRV
> >> 
> >> Why is this needed/useful? presumably the pipe driver will convert
> >> SPIRV to NIR or LLVM anyway, why not convert it in clover and pass one
> >> of the already existing IRs ?
> >> 
> >> Jan
> >
> > It is true it’s not really needed for this series, it’s mainly for my SPIR-V
> > frontend for Nouveau. I could drop it from this series for now, especially 
> > if
> > SPIR-V get directly translated to another IR and never stays as such, or 
> > going
> > the opposite and always keeping SPIR-V until the very last moment.
> >
> 
> I don't have any objection against plumbing through SPIRV directly if
> that's the path you're planning to pursue.  But wouldn't it make sense
> to have working back-end code able to consume it as input before adding
> a new IR to the pipe driver interface?  Otherwise this is basically dead
> code.

A one liner, but still dead code nonetheless. You are right, it should be part
of the series adding a SPIR-V consumer to Nouveau.

I guess half of this series is dead code as well, as there is currently nothing
that can be done with the SPIR-V binary: 1) no driver can consume it directly,
2) it can’t be translated to LLVM IR because there is no upstream code for that
currently, and 3) spirv_to_nir does not currently support OpenCL SPIR-V.

> 
> > Pierre
> >
> >> 
> >> >  };
> >> >  
> >> >  /**



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Re: [Mesa-dev] [PATCH v2 10/22] clover/spirv: Import spirv.hpp11 version 1.0 (rev 12)

[Pierre Moreau]

On 2018-01-23 — 14:06, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > Signed-off-by: Pierre Moreau 
> > ---
> >  .../state_trackers/clover/spirv/spirv.hpp11| 997 
> > +
> >  1 file changed, 997 insertions(+)
> >  create mode 100644 src/gallium/state_trackers/clover/spirv/spirv.hpp11
> 
> Can you import this with an hpp extension please?  All other .hpp files
> under clover/ are also C++11, no need to confuse text editors.  With
> that fixed:

I kept the original ending from SPIRV-Headers, but they need to differentiate
it from the other C++ header which does not use C++11 features. I could drop
it, but I am a little concerned that someone might think it would be the
spirv.hpp file from SPIRV-Headers, which it isn’t.
If you think this is not an issue, I will drop it.

> 
> Acked-by: Francisco Jerez 
> 
> >
> > diff --git a/src/gallium/state_trackers/clover/spirv/spirv.hpp11 
> > b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
> > new file mode 100644
> > index 00..792eeb1aa0
> > --- /dev/null
> > +++ b/src/gallium/state_trackers/clover/spirv/spirv.hpp11
> > @@ -0,0 +1,997 @@
> > +// Copyright (c) 2014-2017 The Khronos Group Inc.
> > +// 
> > +// Permission is hereby granted, free of charge, to any person obtaining a 
> > copy
> > +// of this software and/or associated documentation files (the 
> > "Materials"),
> > +// to deal in the Materials without restriction, including without 
> > limitation
> > +// the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > +// and/or sell copies of the Materials, and to permit persons to whom the
> > +// Materials are furnished to do so, subject to the following conditions:
> > +// 
> > +// The above copyright notice and this permission notice shall be included 
> > in
> > +// all copies or substantial portions of the Materials.
> > +// 
> > +// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS 
> > KHRONOS
> > +// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS 
> > AND
> > +// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ 
> > +// 
> > +// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 
> > EXPRESS
> > +// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
> > MERCHANTABILITY,
> > +// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > +// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 
> > OTHER
> > +// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > +// FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER 
> > DEALINGS
> > +// IN THE MATERIALS.
> > +
> > +// This header is automatically generated by the same tool that creates
> > +// the Binary Section of the SPIR-V specification.
> > +
> > +// Enumeration tokens for SPIR-V, in various styles:
> > +//   C, C++, C++11, JSON, Lua, Python
> > +// 
> > +// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
> > +// - C++ will have tokens in the "spv" name space, e.g.: 
> > spv::SourceLanguageGLSL
> > +// - C++11 will use enum classes in the spv namespace, e.g.: 
> > spv::SourceLanguage::GLSL
> > +// - Lua will use tables, e.g.: spv.SourceLanguage.GLSL
> > +// - Python will use dictionaries, e.g.: spv['SourceLanguage']['GLSL']
> > +// 
> > +// Some tokens act like mask values, which can be OR'd together,
> > +// while others are mutually exclusive.  The mask-like ones have
> > +// "Mask" in their name, and a parallel enum that has the shift
> > +// amount (1 << x) for each corresponding enumerant.
> > +
> > +#ifndef spirv_HPP
> > +#define spirv_HPP
> > +
> > +namespace spv {
> > +
> > +typedef unsigned int Id;
> > +
> > +#define SPV_VERSION 0x1
> > +#define SPV_REVISION 12
> > +
> > +static const unsigned int MagicNumber = 0x07230203;
> > +static const unsigned int Version = 0x0001;
> > +static const unsigned int Revision = 12;
> > +static const unsigned int OpCodeMask = 0x;
> > +static const unsigned int WordCountShift = 16;
> > +
> > +enum class SourceLanguage : unsigned {
> > +Unknown = 0,
> > +ESSL = 1,
> > +GLSL = 2,
> > +OpenCL_C = 3,
> > +OpenCL_CPP = 4,
> > +HLSL = 5,
> > +Max = 0x7fff,
> > +};
> > +
> > +enum class ExecutionModel

Re: [Mesa-dev] [PATCH v2 15/22] include/CL: Add cl_khr_il_program

[Pierre Moreau]

On 2018-01-23 — 14:08, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > Signed-off-by: Pierre Moreau 
> 
> Same comment as Karol, let's update the header instead.

I will do that. Though that won’t impact this patch, as cl_khr_il_program is
not part of the official OpenCL headers. I have sent a pull request to their
repo, but have yet to hear back from someone with merge rights.

> 
> > ---
> >  include/CL/cl_ext.h | 34 ++
> >  1 file changed, 34 insertions(+)
> >
> > diff --git a/include/CL/cl_ext.h b/include/CL/cl_ext.h
> > index 710bea8837..2e4845d27d 100644
> > --- a/include/CL/cl_ext.h
> > +++ b/include/CL/cl_ext.h
> > @@ -308,6 +308,40 @@ typedef struct _cl_mem_ion_host_ptr
> >  
> >  #endif /* CL_VERSION_1_1 */
> >  
> > +
> > +/***
> > + * cl_khr_il_program extension *
> > + ***/
> > +
> > +#ifndef cl_khr_il_program
> > +#define cl_khr_il_program 1
> > +
> > +/* New property to clGetDeviceInfo for retrieving supported intermediate
> > + * languages
> > + */
> > +#define CL_DEVICE_IL_VERSION_KHR0x105B
> > +
> > +/* New property to clGetProgramInfo for retrieving for retrieving the IL 
> > of a
> > + * program
> > + */
> > +#define CL_PROGRAM_IL_KHR   0x1169
> > +
> > +extern CL_API_ENTRY cl_program
> > +  CL_API_CALL clCreateProgramWithILKHR(
> > +  cl_context /* context */,
> > +  const void * /* il */,
> > +  size_t /* length */,
> > +  cl_int * /* errcode_ret */) CL_EXT_SUFFIX__VERSION_1_2;
> > +
> > +typedef CL_API_ENTRY cl_program
> > +  (CL_API_CALL *clCreateProgramWithILKHR_fn)(
> > +  cl_context /* context */,
> > +  const void * /* il */,
> > +  size_t /* length */,
> > +  cl_int * /* errcode_ret */) CL_EXT_SUFFIX__VERSION_1_2;
> > +
> > +#endif /* cl_khr_il_program */
> > +
> >  #ifdef __cplusplus
> >  }
> >  #endif
> > -- 
> > 2.16.0



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Re: [Mesa-dev] [PATCH v2 13/22] clover: Handle the case when linking SPIR-V binaries together

[Pierre Moreau]

On 2018-01-23 — 14:08, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/state_trackers/clover/core/program.cpp | 22 
> > +-
> >  1 file changed, 17 insertions(+), 5 deletions(-)
> >
> > diff --git a/src/gallium/state_trackers/clover/core/program.cpp 
> > b/src/gallium/state_trackers/clover/core/program.cpp
> > index 15d559cd93..976213ef95 100644
> > --- a/src/gallium/state_trackers/clover/core/program.cpp
> > +++ b/src/gallium/state_trackers/clover/core/program.cpp
> > @@ -22,6 +22,7 @@
> >  
> >  #include "core/program.hpp"
> >  #include "llvm/invocation.hpp"
> > +#include "spirv/invocation.hpp"
> >  #include "tgsi/invocation.hpp"
> >  
> >  using namespace clover;
> > @@ -80,11 +81,22 @@ program::link(const ref_vector &devs, const 
> > std::string &opts,
> >std::string log = _builds[&dev].log;
> >  
> >try {
> > - const module m = (dev.ir_format() == PIPE_SHADER_IR_TGSI ?
> > -   tgsi::link_program(ms) :
> > -   llvm::link_program(ms, dev.ir_format(),
> > -  dev.ir_target(), opts, log));
> > - _builds[&dev] = { m, opts, log };
> > + switch (dev.ir_format()) {
> > + case PIPE_SHADER_IR_TGSI:
> > +_builds[&dev] = { tgsi::link_program(ms), opts, log };
> > +break;
> > + case PIPE_SHADER_IR_LLVM:
> > + case PIPE_SHADER_IR_NATIVE:
> > + case PIPE_SHADER_IR_NIR:
> > +_builds[&dev] = { llvm::link_program(ms, dev.ir_format(),
> > + dev.ir_target(), opts, 
> > log),
> > +  opts, log };
> > +break;
> > + case PIPE_SHADER_IR_SPIRV:
> > +_builds[&dev] = { clover::spirv::link_program(ms, opts, log), 
> > opts,
> > +  log };
> > +break;
> > + }
> 
> I'd prefer to implement this in a separate "module link_program(ms, dev,
> opts, log)" demux-function with the switch-case statement that calls the
> right linking function based on the IR of the program (and possibly
> converts it into the drivers's preferred IR in the future).  Then just do
> the following in this block:
> 
> | _builds[&dev] = { link_program(ms, dev, opts, log), opts, log };

This sounds like a good idea, as it will make it cleaner and easier to also
handle translating to other IRs.

> 
> >} catch (...) {
> >   _builds[&dev] = { module(), opts, log };
> >   throw;
> > -- 
> > 2.16.0



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Re: [Mesa-dev] [PATCH v2 00/22] Introducing SPIR-V support to clover

[Pierre Moreau]

On 2018-01-23 — 14:02, Francisco Jerez wrote:
> Karol Herbst  writes:
> 
> > there seem to be some patches missing?
> >
> > On Tue, Jan 23, 2018 at 1:33 AM, Pierre Moreau  
> > wrote:
> >> Hello,
> >>
> >> Here is the second version of my initial series for adding SPIR-V support 
> >> to
> >> clover, after the RFC back in May 2017.
> >>
> >> For recap, the focus of this series is to let clover accept SPIR-V binaries
> >> through the cl_khr_il_program extension (from OpenCL 1.2 and on), as well 
> >> as
> >> through some core features (since OpenCL 2.1). Even if OpenCL 2.1 support 
> >> in
> >> clover is some way off, there is another motivation for supporting SPIR-V 
> >> in
> >> clover, as multiple drivers are interested in adding OpenCL support by
> >> converting SPIR-V to NIR.
> >>
> >> Note: the series is based on master + Karol’s patch “clover: add functions 
> >> up
> >> to 2.2 to ICD dispatch table”.
> >>
> >>
> >> The various patches can be split in different categories:
> >>
> >> * Patches 1 through 7: some clover clean-up, adding and moving some
> >>   functionalities around to make the implementation easier in the rest of 
> >> the
> >>   series.
> >>
> >> * Patches 8 through 13: define SPIR-V as a new IR, add a new frontend to 
> >> clover
> >>   to deal with SPIR-V, and edit compile and link operations to handle 
> >> SPIR-V as
> >>   well.
> >>
> >> * Patches 14 through 19: implement cl_khr_il_program
> >>
> >> * Patches 20 through 22: implement OpenCL 2.1 support on top of
> >>   cl_khr_il_program
> >>
> >>
> >> Changes since the RFC
> >> -
> >>
> >> * Most SPIR-V utilities were dropped, and the remaining ones have been 
> >> moved to
> >>   the clover SPIR-V frontend rather than sitting in 
> >> src/gallium/auxiliary/spirv.
> >>
> >> * The SPIR-V linker has been completely dropped from this series and 
> >> instead
> >>   merge in SPIRV-Tools [1].
> >>
> >> * Since SPIRV-Tools now exports a pkgconfig .pc file, use it for detecting 
> >> the
> >>   library.
> >>
> >> * Integrate the series with Meson.
> >>
> >> * Use pipe_llvm_program_header to pass in the size of the SPIR-V module, 
> >> rather
> >>   than adding a new attribute to pipe_compute_state, as suggested by 
> >> Francisco
> >>   Jerez.
> >>
> >> * Check that the device supports the capabilities defined in the SPIR-V 
> >> binary.
> >>
> >> * Check that the platform/device supports the extensions used in the SPIR-V
> >>   binary.
> >>
> >> * Fix the implementation responsible for filling up the symbols of the 
> >> clover
> >>   module based on the input SPIR-V binary.
> >>
> >> * No longer raw SPIR-V binaries through clCreateProgramWithBinary, but 
> >> instead
> >>   keep the current de-serialisation of the clover module, which may 
> >> contain a
> >>   SPIR-V binary.
> >>
> >> * Track whether a library was created with the --enable-link-options flag 
> >> or
> >>   not. This is currently not useful as the linker ignores most link 
> >> options,
> >>   but it will become useful when the linker handles those options.
> >>
> >> * Implement cl_khr_il_program.
> >>
> >> * Most of patches 1 through 8 (apart from patch 2).
> >>
> >>
> >> Discussions
> >> ---
> >>
> >> * Before, when linking different modules together, you knew that all 
> >> modules
> >>   would use the same IR, as all were created using 
> >> clCreateProgramWithSource,
> >>   therefore the linker could just call the linking function corresponding 
> >> to
> >>   the target’s preferred IR. But with the introduction of
> >>   clCreateProgramWithIL(KHR)?, we can now end up in a case where we try to 
> >> link
> >>   a module using NIR as IR (created through clCreateProgramWithSource, 
> >> assuming
> >>   that is the driver’s preferred IR), with another module using SPIR-V as 
> >> IR
> >>   (created through clCreateProgramWithIL). How do we handle such a case: 
> >> should
> >>   we translate the SPIR-V to NIR and use a NIR linker on them

Re: [Mesa-dev] [PATCH v2 04/22] clover: Disallow creating libraries from other libraries

[Pierre Moreau]

On 2018-01-23 — 14:04, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > If creating a library, do not allow non-compiled object in it, as
> > executables are not allowed, and libraries would make it really hard to
> > enforce the "-enable-link-options" flag.
> >
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/state_trackers/clover/api/program.cpp | 19 ---
> >  1 file changed, 16 insertions(+), 3 deletions(-)
> >
> > diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
> > b/src/gallium/state_trackers/clover/api/program.cpp
> > index 6044179587..8f0b103a4d 100644
> > --- a/src/gallium/state_trackers/clover/api/program.cpp
> > +++ b/src/gallium/state_trackers/clover/api/program.cpp
> > @@ -251,9 +251,13 @@ clCompileProgram(cl_program d_prog, cl_uint num_devs,
> >  namespace {
> > ref_vector
> > validate_link_devices(const ref_vector &progs,
> > - const ref_vector &all_devs) {
> > + const ref_vector &all_devs,
> > + const std::string &opts) {
> >std::vector devs;
> >  
> > +  const std::string flag = "-create-library";
> > +  const bool create_library = opts.find("-create-library") != 
> > std::string::npos;
> > +
> >for (auto &dev : all_devs) {
> >   const auto has_binary = [&](const program &prog) {
> >  const auto t = prog.build(dev).binary_type();
> > @@ -261,10 +265,19 @@ namespace {
> > t == CL_PROGRAM_BINARY_TYPE_LIBRARY;
> >   };
> >  
> > + // If creating a library, do not allow non-compiled object in it, 
> > as
> > + // executables are not allowed, and libraries would make it really
> > + // hard to enforce the "-enable-link-options".
> > + if (create_library && any_of([&](const program &prog) {
> > +  const auto t = prog.build(dev).binary_type();
> > +  return t != CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT;
> > +   }, progs))
> > +throw error(CL_INVALID_OPERATION);
> > +
> 
> Do you have any spec quote justifying this?  "Hard" is hardly a
> justification for emitting an unexpected API error ;).  If doing such a
> thing would rely on unimplemented behavior somewhere else it would
> probably be cleaner to assert-fail wherever an implementation is missing
> rather than returning an API error under conditions not expected by the
> application.

Re-reading the spec, I am quite sure that libraries can’t be made of libraries.
From Section 5.6.5.1:

> The following options can be specified when creating a library of compiled 
> binaries.
>
> -create-library
> Create a library of compiled binaries specified in input_programs 
> argument to
> clLinkProgram

and earlier on, in Section 5.6.3 when defining clLinkProgram, it makes the
distinction between compiled binaries, libraries, and executables:

> input_programs is an array of program objects that are compiled binaries or
> libraries that are to be linked to create the program executable.

(both extracts come from the 1.2 specification)

> 
> >   // According to the CL 1.2 spec, when "all programs specified [..]
> >   // contain a compiled binary or library for the device [..] a 
> > link is
> >   // performed",
> > - if (all_of(has_binary, progs))
> > + else if (all_of(has_binary, progs))
> >  devs.push_back(&dev);
> >  
> >   // otherwise if "none of the programs contain a compiled binary or
> > @@ -290,7 +303,7 @@ clLinkProgram(cl_context d_ctx, cl_uint num_devs, const 
> > cl_device_id *d_devs,
> > auto prog = create(ctx);
> > auto devs = validate_link_devices(progs,
> >   (d_devs ? objs(d_devs, num_devs) :
> > -  ref_vector(ctx.devices(;
> > +  ref_vector(ctx.devices())), 
> > opts);
> >  
> > validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
> >  
> > -- 
> > 2.16.0



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Re: [Mesa-dev] [PATCH v2 03/22] clover/api: Fail if trying to build a non-executable binary

[Pierre Moreau]

On 2018-01-23 — 14:03, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > From the OpenCL 1.2 Specification, Section 5.6.2 (about clBuildProgram:
> >
> >> If program is created with clCreateProgramWithBinary, then the
> >> program binary must be an executable binary (not a compiled binary or
> >> library).
> >
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/state_trackers/clover/api/program.cpp | 8 
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
> > b/src/gallium/state_trackers/clover/api/program.cpp
> > index 9d59668f8f..6044179587 100644
> > --- a/src/gallium/state_trackers/clover/api/program.cpp
> > +++ b/src/gallium/state_trackers/clover/api/program.cpp
> > @@ -186,6 +186,14 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
> > if (prog.has_source) {
> >prog.compile(devs, opts);
> >prog.link(devs, opts, { prog });
> > +   } else if (any_of([&](const device &dev){
> > + return prog.build(dev).binary_type() != 
> > CL_PROGRAM_BINARY_TYPE_EXECUTABLE;
> > + }, objs(d_devs, num_devs))) {
> 
> Shouldn't this be using the range of devices the application requested
> to build for (which might be the whole set of devices associated with
> prog if d_devs was null) instead of the objs expression?

I had missed that part of the specification, when d_devs is null. I’ll fix the
code, and reformat the specification extract as suggested further down.

> 
> > +  // OpenCL 1.2 Specification, Section 5.6.2:
> > +  // > If program is created with clCreateProgramWithBinary, then the
> > +  // > program binary must be an executable binary (not a compiled 
> > binary or
> > +  // > library).
> 
> I'd format this like:
> 
> |  // According to the OpenCL 1.2 specification, "if program is created 
> with
> |  // clCreateProgramWithBinary, then the program binary must be an 
> executable
> |  // binary (not a compiled binary or library)."
> 
> > +  throw error(CL_INVALID_BINARY);
> > }
> >  
> > return CL_SUCCESS;
> > -- 
> > 2.16.0



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Re: [Mesa-dev] [PATCH v2 02/22] clover: Add additional functions to query supported IRs

[Pierre Moreau]

On 2018-01-23 — 14:03, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/state_trackers/clover/core/device.cpp | 11 +++
> >  src/gallium/state_trackers/clover/core/device.hpp |  3 +++
> >  2 files changed, 14 insertions(+)
> >
> > diff --git a/src/gallium/state_trackers/clover/core/device.cpp 
> > b/src/gallium/state_trackers/clover/core/device.cpp
> > index 9dd7eed3f1..7eaa0ca2cb 100644
> > --- a/src/gallium/state_trackers/clover/core/device.cpp
> > +++ b/src/gallium/state_trackers/clover/core/device.cpp
> > @@ -247,6 +247,12 @@ device::ir_format() const {
> >pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_PREFERRED_IR);
> >  }
> >  
> > +cl_uint
> > +device::supported_irs() const {
> > +   return (enum pipe_shader_ir) pipe->get_shader_param(
> > +  pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_SUPPORTED_IRS);
> > +}
> > +
> 
> I don't think we need this as a public method of clover::device, the
> bitmask can be a local variable definition within supports_ir below.

If we need to iterate over those IRs until we find one that suits us (for
example, one to each we can convert from LLVM IR or SPIR-V), then that function
could be of some use, but that’s pretty much the only one I can think of, and
it shouldn’t happen that often, making the overhead of calling the function
multiple times through supports_ir() relatively small.
I’ll follow your suggestion.

> 
> >  std::string
> >  device::ir_target() const {
> > std::vector target = get_compute_param(
> > @@ -268,3 +274,8 @@ std::string
> >  device::device_clc_version() const {
> >  return "1.1";
> >  }
> > +
> > +bool
> > +device::supports_ir(cl_uint ir) const {
> > +   return supported_irs() & (1 << ir);
> > +}
> > diff --git a/src/gallium/state_trackers/clover/core/device.hpp 
> > b/src/gallium/state_trackers/clover/core/device.hpp
> > index 85cd031676..eed644e919 100644
> > --- a/src/gallium/state_trackers/clover/core/device.hpp
> > +++ b/src/gallium/state_trackers/clover/core/device.hpp
> > @@ -80,9 +80,12 @@ namespace clover {
> >std::string device_version() const;
> >std::string device_clc_version() const;
> >enum pipe_shader_ir ir_format() const;
> > +  cl_uint supported_irs() const;
> >std::string ir_target() const;
> >enum pipe_endian endianness() const;
> >  
> > +  bool supports_ir(cl_uint ir) const;
> 
> The argument of this method is a pipe_shader_ir enumerant, we should
> declare it as such.

This is true. I thought I had changed that already, but apparently not.

> 
> > +
> >friend class command_queue;
> >friend class root_resource;
> >friend class hard_event;
> > -- 
> > 2.16.0



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Re: [Mesa-dev] [PATCH v2 04/22] clover: Disallow creating libraries from other libraries

[Pierre Moreau]

On 2018-01-23 — 15:16, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > On 2018-01-23 — 14:04, Francisco Jerez wrote:
> >> Pierre Moreau  writes:
> >> 
> >> > If creating a library, do not allow non-compiled object in it, as
> >> > executables are not allowed, and libraries would make it really hard to
> >> > enforce the "-enable-link-options" flag.
> >> >
> >> > Signed-off-by: Pierre Moreau 
> >> > ---
> >> >  src/gallium/state_trackers/clover/api/program.cpp | 19 
> >> > ---
> >> >  1 file changed, 16 insertions(+), 3 deletions(-)
> >> >
> >> > diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
> >> > b/src/gallium/state_trackers/clover/api/program.cpp
> >> > index 6044179587..8f0b103a4d 100644
> >> > --- a/src/gallium/state_trackers/clover/api/program.cpp
> >> > +++ b/src/gallium/state_trackers/clover/api/program.cpp
> >> > @@ -251,9 +251,13 @@ clCompileProgram(cl_program d_prog, cl_uint 
> >> > num_devs,
> >> >  namespace {
> >> > ref_vector
> >> > validate_link_devices(const ref_vector &progs,
> >> > - const ref_vector &all_devs) {
> >> > + const ref_vector &all_devs,
> >> > + const std::string &opts) {
> >> >std::vector devs;
> >> >  
> >> > +  const std::string flag = "-create-library";
> 
> This seems to be unused.
> 
> >> > +  const bool create_library = opts.find("-create-library") != 
> >> > std::string::npos;
> >> > +
> >> >for (auto &dev : all_devs) {
> >> >   const auto has_binary = [&](const program &prog) {
> >> >  const auto t = prog.build(dev).binary_type();
> >> > @@ -261,10 +265,19 @@ namespace {
> >> > t == CL_PROGRAM_BINARY_TYPE_LIBRARY;
> >> >   };
> >> >  
> >> > + // If creating a library, do not allow non-compiled object in 
> >> > it, as
> >> > + // executables are not allowed, and libraries would make it 
> >> > really
> >> > + // hard to enforce the "-enable-link-options".
> >> > + if (create_library && any_of([&](const program &prog) {
> >> > +  const auto t = prog.build(dev).binary_type();
> >> > +  return t != CL_PROGRAM_BINARY_TYPE_COMPILED_OBJECT;
> >> > +   }, progs))
> >> > +throw error(CL_INVALID_OPERATION);
> >> > +
> >> 
> >> Do you have any spec quote justifying this?  "Hard" is hardly a
> >> justification for emitting an unexpected API error ;).  If doing such a
> >> thing would rely on unimplemented behavior somewhere else it would
> >> probably be cleaner to assert-fail wherever an implementation is missing
> >> rather than returning an API error under conditions not expected by the
> >> application.
> >
> > Re-reading the spec, I am quite sure that libraries can’t be made of 
> > libraries.
> > From Section 5.6.5.1:
> >
> >> The following options can be specified when creating a library of compiled 
> >> binaries.
> >>
> >> -create-library
> >> Create a library of compiled binaries specified in input_programs 
> >> argument to
> >> clLinkProgram
> >
> 
> Fair enough, can you add this sentence as a spec quote to the comment
> above?  With that taken into account:

And I’ll also remove the sentence about it being ”hard”. :-)

Thank you very much for all the reviews! Much appreciated!

> 
> Reviewed-by: Francisco Jerez 
> 
> > and earlier on, in Section 5.6.3 when defining clLinkProgram, it makes the
> > distinction between compiled binaries, libraries, and executables:
> >
> >> input_programs is an array of program objects that are compiled binaries or
> >> libraries that are to be linked to create the program executable.
> >
> > (both extracts come from the 1.2 specification)
> >
> >> 
> >> >   // According to the CL 1.2 spec, when "all programs specified 
> >> > [..]
> >> >   // contain a compiled binary or library for the device [..] a 
> >> > link is
> >> >   // performed",
> >> > - if (all_of(has_binary, progs))
> >> > + else if (all_of(has_binary, progs))
> >> >  devs.push_back(&dev);
> >> >  
> >> >   // otherwise if "none of the programs contain a compiled 
> >> > binary or
> >> > @@ -290,7 +303,7 @@ clLinkProgram(cl_context d_ctx, cl_uint num_devs, 
> >> > const cl_device_id *d_devs,
> >> > auto prog = create(ctx);
> >> > auto devs = validate_link_devices(progs,
> >> >   (d_devs ? objs(d_devs, num_devs) :
> >> > -  
> >> > ref_vector(ctx.devices(;
> >> > +  
> >> > ref_vector(ctx.devices())), opts);
> >> >  
> >> > validate_build_common(prog, num_devs, d_devs, pfn_notify, user_data);
> >> >  
> >> > -- 
> >> > 2.16.0



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Re: [Mesa-dev] [PATCH v2 03/22] clover/api: Fail if trying to build a non-executable binary

[Pierre Moreau]

On 2018-01-23 — 15:09, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > On 2018-01-23 — 14:03, Francisco Jerez wrote:
> >> Pierre Moreau  writes:
> >> 
> >> > From the OpenCL 1.2 Specification, Section 5.6.2 (about clBuildProgram:
> >> >
> >> >> If program is created with clCreateProgramWithBinary, then the
> >> >> program binary must be an executable binary (not a compiled binary or
> >> >> library).
> >> >
> >> > Signed-off-by: Pierre Moreau 
> >> > ---
> >> >  src/gallium/state_trackers/clover/api/program.cpp | 8 
> >> >  1 file changed, 8 insertions(+)
> >> >
> >> > diff --git a/src/gallium/state_trackers/clover/api/program.cpp 
> >> > b/src/gallium/state_trackers/clover/api/program.cpp
> >> > index 9d59668f8f..6044179587 100644
> >> > --- a/src/gallium/state_trackers/clover/api/program.cpp
> >> > +++ b/src/gallium/state_trackers/clover/api/program.cpp
> >> > @@ -186,6 +186,14 @@ clBuildProgram(cl_program d_prog, cl_uint num_devs,
> >> > if (prog.has_source) {
> >> >prog.compile(devs, opts);
> >> >prog.link(devs, opts, { prog });
> >> > +   } else if (any_of([&](const device &dev){
> >> > + return prog.build(dev).binary_type() != 
> >> > CL_PROGRAM_BINARY_TYPE_EXECUTABLE;
> >> > + }, objs(d_devs, num_devs))) {
> >> 
> >> Shouldn't this be using the range of devices the application requested
> >> to build for (which might be the whole set of devices associated with
> >> prog if d_devs was null) instead of the objs expression?
> >
> > I had missed that part of the specification, when d_devs is null. I’ll fix 
> > the
> > code, and reformat the specification extract as suggested further down.
> >
> 
> I think this could just use the "devs" variable defined above, but from
> the look of it the current definition probably has a bug, it should be
> using prog.devices() instead of prog.context().devices() in cases where
> d_devs is specified as NULL.

Indeed! I reworked the code to also check for invalid combinations of num_devs
and d_devs, as well as num_progs and d_progs for clLinkProgram; I’ll put those
changes and the `prog.context().devices()` -> `prog.devices()` fix into a
separate patch.
> 
> >> 
> >> > +  // OpenCL 1.2 Specification, Section 5.6.2:
> >> > +  // > If program is created with clCreateProgramWithBinary, then 
> >> > the
> >> > +  // > program binary must be an executable binary (not a compiled 
> >> > binary or
> >> > +  // > library).
> >> 
> >> I'd format this like:
> >> 
> >> |  // According to the OpenCL 1.2 specification, "if program is 
> >> created with
> >> |  // clCreateProgramWithBinary, then the program binary must be an 
> >> executable
> >> |  // binary (not a compiled binary or library)."
> >> 
> >> > +  throw error(CL_INVALID_BINARY);
> >> > }
> >> >  
> >> > return CL_SUCCESS;
> >> > -- 
> >> > 2.16.0





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Re: [Mesa-dev] [PATCH v2 00/22] Introducing SPIR-V support to clover

[Pierre Moreau]

On 2018-01-24 — 09:19, Tomeu Vizoso wrote:
> On 01/24/2018 12:03 AM, Karol Herbst wrote:
> > On Tue, Jan 23, 2018 at 11:46 PM, Francisco Jerez  
> > wrote:
> > > Pierre Moreau  writes:
> > > 
> > > > On 2018-01-23 — 14:02, Francisco Jerez wrote:
> > > > > Karol Herbst  writes:
> > > > > 
> > > > > > there seem to be some patches missing?
> > > > > > 
> > > > > > On Tue, Jan 23, 2018 at 1:33 AM, Pierre Moreau 
> > > > > >  wrote:
> > > > > > > 
> > > > > > > * Before, when linking different modules together, you knew that 
> > > > > > > all modules
> > > > > > >would use the same IR, as all were created using 
> > > > > > > clCreateProgramWithSource,
> > > > > > >therefore the linker could just call the linking function 
> > > > > > > corresponding to
> > > > > > >the target’s preferred IR. But with the introduction of
> > > > > > >clCreateProgramWithIL(KHR)?, we can now end up in a case where 
> > > > > > > we try to link
> > > > > > >a module using NIR as IR (created through 
> > > > > > > clCreateProgramWithSource, assuming
> > > > > > >that is the driver’s preferred IR), with another module using 
> > > > > > > SPIR-V as IR
> > > > > > >(created through clCreateProgramWithIL). How do we handle such 
> > > > > > > a case: should
> > > > > > >we translate the SPIR-V to NIR and use a NIR linker on them, 
> > > > > > > or convert NIR
> > > > > > >to SPIR-V and use the SPIR-V linker? NIR and LLVM IR can be 
> > > > > > > handled
> > > > > > >relatively easily, but what about TGSI?
> > > > > > > 
> > > > > > 
> > > > > > I think we will never be able to convert all IRs into any other IR, 
> > > > > > so
> > > > > > that I would suggest to leave those IRs unconverted until they get
> > > > > > linked together and there the code can decide on a common IR for
> > > > > > linking. So if we get source code, we can parse it to llvm IR and
> > > > > > leave it like that until it gets linked. Converting back and forth
> > > > > > would require us to write all those conversion paths and I am assume
> > > > > > this wouldn't be worth the trouble.
> > > > > > 
> > > > > 
> > > > > I think it would be more straightforward to compile source programs 
> > > > > into
> > > > > SPIRV if the driver supports it (or if it supports any other IR that
> > > > > could possibly be translated from SPIRV after link time, e.g. NIR or
> > > > > maybe even TGSI).  That means that there is a single canonical IR for
> > > > > each CL device and we don't need to deal with linking different
> > > > > combinations of IRs together.  If the driver doesn't support SPIRV nor
> > > > > any of the IRs derived from it, it better support LLVM IR instead, so 
> > > > > we
> > > > > can just use that as canonical IR within the state tracker, and 
> > > > > possibly
> > > > > accept the same representation as input to clCreateProgramWithIL()
> > > > > instead of SPIRV.
> > > > 
> > > > “On top of” SPIR-V, not “instead of”, as SPIR-V is the only IL which is
> > > > mandatory to support, according to the specification.
> > > 
> > > That's right, but it just means that devices that have LLVM as canonical
> > > IR don't get support for cl_khr_il_program for the time being, until
> > > Khronos' SPIRV-to-LLVM converter gets upstreamed.
> > > 
> > 
> > we could use tomeus out of tree llvm-spirv module though, but this
> > would also need some maintenance. It would be a better solution than
> > using that llvm-spirv fork from khronos
> 
> Though I still cannot commit at the moment to maintain it, there's so many
> people whose plans could benefit from it, that maybe it won't be such a
> problem to maintain such a "packagable" fork until it gets merged in LLVM
> proper.
> 
> Besides Mesa, there's interest from compiler writers such as D and Volt.

I am currently 

Re: [Mesa-dev] [PATCH v2 18/22] clover/api: Implement CL_DEVICE_IL_VERSION_KHR

[Pierre Moreau]

On 2018-01-23 — 14:12, Francisco Jerez wrote:
> Pierre Moreau  writes:
> 
> > Signed-off-by: Pierre Moreau 
> > ---
> >  src/gallium/state_trackers/clover/api/device.cpp | 5 +
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/src/gallium/state_trackers/clover/api/device.cpp 
> > b/src/gallium/state_trackers/clover/api/device.cpp
> > index 4e274c5005..6bede21ca4 100644
> > --- a/src/gallium/state_trackers/clover/api/device.cpp
> > +++ b/src/gallium/state_trackers/clover/api/device.cpp
> > @@ -333,6 +333,11 @@ clGetDeviceInfo(cl_device_id d_dev, cl_device_info 
> > param,
> >buf.as_string() = dev.supported_extensions();
> >break;
> >  
> > +   case CL_DEVICE_IL_VERSION_KHR:
> 
> This should probably just throw CL_INVALID_VALUE if PIPE_SHADER_IR_SPIRV
> is unsupported.

You are right, and I should change the check to test if the cl_khr_il_program
extension is supported instead. And I’ll have in supported_extensions the code
for checking whether the device supports SPIR-V, or an IR to which we can
convert SPIR-V.

> 
> > +  buf.as_string() =
> > + std::string(dev.supports_ir(PIPE_SHADER_IR_SPIRV) ? "SPIR-V_1.0" 
> > : "");
> > +  break;
> > +
> > case CL_DEVICE_PLATFORM:
> >buf.as_scalar() = desc(dev.platform);
> >break;
> > -- 
> > 2.16.0





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Re: [Mesa-dev] [PATCH 11/11] r600/radeonsi/clover: always assume PIPE_SHADER_IR_NATIVE for clover

[Pierre Moreau]

On 2018-02-02 — 18:07, Timothy Arceri wrote:
> 
> 
> On 02/02/18 17:21, Timothy Arceri wrote:
> > On 02/02/18 16:38, Jan Vesely wrote:
> > > On Fri, 2018-02-02 at 15:03 +1100, Timothy Arceri wrote:
> > > > When PIPE_SHADER_IR_LLVM existed this query made sense but now it
> > > > always returns PIPE_SHADER_IR_NATIVE. Also it is now conlicting
> > > > with PIPE_SHADER_IR_NIR for compute shaders, so just assume this
> > > > is always PIPE_SHADER_IR_NATIVE for clover.
> > > > 
> > > > This change indirectly enables NIR support for compute shaders
> > > > on radeonsi.
> > > > ---
> > > >   src/gallium/drivers/r600/r600_pipe.c  | 6 +-
> > > >   src/gallium/drivers/radeonsi/si_get.c | 3 ---
> > > >   src/gallium/state_trackers/clover/core/device.cpp | 3 +--
> > > >   3 files changed, 2 insertions(+), 10 deletions(-)
> > > > 
> > > > diff --git a/src/gallium/drivers/r600/r600_pipe.c
> > > > b/src/gallium/drivers/r600/r600_pipe.c
> > > > index 6c021e568d..287fe497ca 100644
> > > > --- a/src/gallium/drivers/r600/r600_pipe.c
> > > > +++ b/src/gallium/drivers/r600/r600_pipe.c
> > > > @@ -595,11 +595,7 @@ static int r600_get_shader_param(struct
> > > > pipe_screen* pscreen,
> > > >   case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> > > >   return 16;
> > > >   case PIPE_SHADER_CAP_PREFERRED_IR:
> > > > -    if (shader == PIPE_SHADER_COMPUTE) {
> > > > -    return PIPE_SHADER_IR_NATIVE;
> > > > -    } else {
> > > > -    return PIPE_SHADER_IR_TGSI;
> > > > -    }
> > > > +    return PIPE_SHADER_IR_TGSI;
> > > >   case PIPE_SHADER_CAP_SUPPORTED_IRS:
> > > >   if (rscreen->b.family >= CHIP_CEDAR)
> > > >   return (1 << PIPE_SHADER_IR_TGSI);
> > > > diff --git a/src/gallium/drivers/radeonsi/si_get.c
> > > > b/src/gallium/drivers/radeonsi/si_get.c
> > > > index 40f4cc267e..46cc190db1 100644
> > > > --- a/src/gallium/drivers/radeonsi/si_get.c
> > > > +++ b/src/gallium/drivers/radeonsi/si_get.c
> > > > @@ -391,9 +391,6 @@ static int si_get_shader_param(struct
> > > > pipe_screen* pscreen,
> > > >   break;
> > > >   case PIPE_SHADER_COMPUTE:
> > > >   switch (param) {
> > > > -    case PIPE_SHADER_CAP_PREFERRED_IR:
> > > > -    return PIPE_SHADER_IR_NATIVE;
> > > > -
> > > >   case PIPE_SHADER_CAP_SUPPORTED_IRS: {
> > > >   int ir = 1 << PIPE_SHADER_IR_NATIVE;
> > > > diff --git a/src/gallium/state_trackers/clover/core/device.cpp
> > > > b/src/gallium/state_trackers/clover/core/device.cpp
> > > > index 9dd7eed3f1..116f0c7604 100644
> > > > --- a/src/gallium/state_trackers/clover/core/device.cpp
> > > > +++ b/src/gallium/state_trackers/clover/core/device.cpp
> > > > @@ -243,8 +243,7 @@ device::vendor_name() const {
> > > >   enum pipe_shader_ir
> > > >   device::ir_format() const {
> > > > -   return (enum pipe_shader_ir) pipe->get_shader_param(
> > > > -  pipe, PIPE_SHADER_COMPUTE, PIPE_SHADER_CAP_PREFERRED_IR);
> > > > +   return PIPE_SHADER_IR_NATIVE;
> > > 
> > > This looks like it forces IR_NATIVE for absolutely everybody. Why
> > > should other devices use IR_NATIVE just because radeonsi wants
> > > experimental NIR for GL?
> > 
> > It's not just about experimental NIR. If say freedreno or any other nir
> > driver was to use clover they would have the same problem.
> 
> Well it would be return PIPE_SHADER_IR_NIR here at least.
> 
> > Also I'm 99% certain that no drivers other than radeonsi and r600 even
> > care what this value is. All other drivers have this set to 
> > PIPE_SHADER_IR_TGSI does that make anymore sense?
> 
> I see no there is indeed a tgsi path for clover. I guess maybe this change
> has more impact than I first thought.

I’ll be removing the tgsi path for clover in my v3 for adding SPIR-V support
series for clover, as that path is unused.

> Happy to here suggestions for solving the current conflict in uses of
> PIPE_SHADER_CAP_PREFERRED_IR.

One option could be to:
* look at the preferred IR
  |-> if clover supports it, use it
  |-> else, check if any IR supported by clover are supported by the driver,
  and pick the first one that works

Also, clover will be switching (experimentally first) to using SPIR-V as the
canonical IR, for all the compiling and linking internally, before translating
the resulting executable to a representation the driver can handle. So once
spirv_to_nir supports OpenCL SPIR-V (which I believe is being worked on by Rob
Clark for freedreno, and Karol Herbst for Nouveau), RadeonSI could start
accepting even OpenCL kernels as NIR.

Pierre


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