Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-28 Thread Manjukumar Harthikote Matha 
Hi Mike and all,

Are there any specific configurations? PMU/Linux ?

We are not able to replicate this issue, we tested it on zcu102 board

Thanks,
Manju

> -Original Message-
> From: meta-xilinx-boun...@yoctoproject.org [mailto:meta-xilinx-
> boun...@yoctoproject.org] On Behalf Of Mike Looijmans
> Sent: Thursday, March 21, 2019 10:09 AM
> To: Peter Smith 
> Cc: meta-xil...@lists.yoctoproject.org
> Subject: Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 
> 2018.1
> to 2018.3
> 
> Have only tried the MPSoC.
> 
> I haven't tried the 7k yet with 2018.3, may get to that tomorrow. I
> suspect it's something with the PMU interface and/or clock dividers.
> 
> 
> On 21-03-19 17:54, Peter Smith wrote:
> > Mike, although I have not made any measurements I have noticed in the
> > last few days (coincidentally I have been doing a lot of work with a
> > ZCU102) that the SD interface seemed a bit slow. Are you seeing this on
> > Zynq 7K or US+ MPSoC?
> > Best Regards
> > Peter
> >
> >
> > On Thu, 21 Mar 2019 at 16:38, Mike Looijmans  > <mailto:mike.looijm...@topic.nl>> wrote:
> >
> > The SD and eMMC controller has become terribly slow in 2018.3:
> >
> > # echo 3 > /proc/sys/vm/drop_caches
> >
> > # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
> > 20+0 records in
> > 20+0 records out
> > 20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
> >
> > # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
> > 20+0 records in
> > 20+0 records out
> > 20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
> >
> >
> > This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s
> > for the
> > SD card (mmcblk0) with the 2018.1 kernel and bootloader.
> >
> > This is only in Linux, the bootloader still reads at about 10MB/s
> > from the SD
> > card. So apparently the clocks are set up okay.
> >
> > According to the kernel, the clocks and interface are running at
> > full speed:
> >
> > # cat /sys/kernel/debug/mmc0/ios
> > clock:          2 Hz
> > actual clock:   2 Hz
> > vdd:            21 (3.3 ~ 3.4 V)
> > bus mode:       2 (push-pull)
> > chip select:    0 (don't care)
> > power mode:     2 (on)
> > bus width:      3 (8 bits)
> > timing spec:    9 (mmc HS200)
> > signal voltage: 1 (1.80 V)
> > driver type:    0 (driver type B)
> >
> > # cat /sys/kernel/debug/mmc1/ios
> > clock:          5000 Hz
> > actual clock:   5000 Hz
> > vdd:            21 (3.3 ~ 3.4 V)
> > bus mode:       2 (push-pull)
> > chip select:    0 (don't care)
> > power mode:     2 (on)
> > bus width:      2 (4 bits)
> > timing spec:    2 (sd high-speed)
> > signal voltage: 0 (3.30 V)
> > driver type:    0 (driver type B)
> >
> >
> > Any insights?
> > --
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> >
> 
> 
> --
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Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-26 Thread Mike Looijmans 
On 25-03-19 09:01, Mike Looijmans wrote:

> I did notice that even on the 7 series programming the FPGA from Linux (using
> fpga-manager framework) is broken in the 2018.3 release now:
> 
> fpga_manager fpga0: writing fpga.bin to Xilinx Zynq FPGA Manager
> fpga_manager fpga0: Error after writing image data to FPGA

Strike that, the problem was that the bistream was for a different FPGA.
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Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-26 Thread Mike Looijmans 
It's definitely the PMU or ATF that causes this.

If I use the 2018.1 ATF and PMU, the SDIO controller performance is okay with 
either the 2018.1 or 2018.3 kernel. With the 2018.3 release of PMU and ATF, 
the SD performance is horrible. I also noticed it stopped USB from working.

Maybe something in the PMU-kernel or ATF-kernel interface has changed and e.g. 
clock settings aren't properly communicated?

Mike

On 21-03-19 14:03, Mike Looijmans wrote:
> The SD and eMMC controller has become terribly slow in 2018.3:
> 
> # echo 3 > /proc/sys/vm/drop_caches
> 
> # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
> 
> # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
> 
> 
> This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s for the
> SD card (mmcblk0) with the 2018.1 kernel and bootloader.
> 
> This is only in Linux, the bootloader still reads at about 10MB/s from the SD
> card. So apparently the clocks are set up okay.
> 
> According to the kernel, the clocks and interface are running at full speed:
> 
> # cat /sys/kernel/debug/mmc0/ios
> clock:  2 Hz
> actual clock:   2 Hz
> vdd:21 (3.3 ~ 3.4 V)
> bus mode:   2 (push-pull)
> chip select:0 (don't care)
> power mode: 2 (on)
> bus width:  3 (8 bits)
> timing spec:9 (mmc HS200)
> signal voltage: 1 (1.80 V)
> driver type:0 (driver type B)
> 
> # cat /sys/kernel/debug/mmc1/ios
> clock:  5000 Hz
> actual clock:   5000 Hz
> vdd:21 (3.3 ~ 3.4 V)
> bus mode:   2 (push-pull)
> chip select:0 (don't care)
> power mode: 2 (on)
> bus width:  2 (4 bits)
> timing spec:2 (sd high-speed)
> signal voltage: 0 (3.30 V)
> driver type:0 (driver type B)
> 
> 
> Any insights?
> 

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Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-25 Thread Mike Looijmans 
On the 7-series, SD performance is as usual:

# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
20+0 records in
20+0 records out
20971520 bytes (20.0MB) copied, 0.997935 seconds, 20.0MB/s


I did notice that even on the 7 series programming the FPGA from Linux (using 
fpga-manager framework) is broken in the 2018.3 release now:

fpga_manager fpga0: writing fpga.bin to Xilinx Zynq FPGA Manager
fpga_manager fpga0: Error after writing image data to FPGA


On 21-03-19 18:08, Mike Looijmans wrote:
> Have only tried the MPSoC.
> 
> I haven't tried the 7k yet with 2018.3, may get to that tomorrow. I
> suspect it's something with the PMU interface and/or clock dividers.
> 
> 
> On 21-03-19 17:54, Peter Smith wrote:
>> Mike, although I have not made any measurements I have noticed in the
>> last few days (coincidentally I have been doing a lot of work with a
>> ZCU102) that the SD interface seemed a bit slow. Are you seeing this on
>> Zynq 7K or US+ MPSoC?
>> Best Regards
>> Peter
>>
>>
>> On Thu, 21 Mar 2019 at 16:38, Mike Looijmans > > wrote:
>>
>>  The SD and eMMC controller has become terribly slow in 2018.3:
>>
>>  # echo 3 > /proc/sys/vm/drop_caches
>>
>>  # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
>>  20+0 records in
>>  20+0 records out
>>  20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
>>
>>  # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
>>  20+0 records in
>>  20+0 records out
>>  20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
>>
>>
>>  This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s
>>  for the
>>  SD card (mmcblk0) with the 2018.1 kernel and bootloader.
>>
>>  This is only in Linux, the bootloader still reads at about 10MB/s
>>  from the SD
>>  card. So apparently the clocks are set up okay.
>>
>>  According to the kernel, the clocks and interface are running at
>>  full speed:
>>
>>  # cat /sys/kernel/debug/mmc0/ios
>>  clock:          2 Hz
>>  actual clock:   2 Hz
>>  vdd:            21 (3.3 ~ 3.4 V)
>>  bus mode:       2 (push-pull)
>>  chip select:    0 (don't care)
>>  power mode:     2 (on)
>>  bus width:      3 (8 bits)
>>  timing spec:    9 (mmc HS200)
>>  signal voltage: 1 (1.80 V)
>>  driver type:    0 (driver type B)
>>
>>  # cat /sys/kernel/debug/mmc1/ios
>>  clock:          5000 Hz
>>  actual clock:   5000 Hz
>>  vdd:            21 (3.3 ~ 3.4 V)
>>  bus mode:       2 (push-pull)
>>  chip select:    0 (don't care)
>>  power mode:     2 (on)
>>  bus width:      2 (4 bits)
>>  timing spec:    2 (sd high-speed)
>>  signal voltage: 0 (3.30 V)
>>  driver type:    0 (driver type B)
>>
>>
>>  Any insights?
>>  --
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>>  meta-xilinx@yoctoproject.org 
>>  https://lists.yoctoproject.org/listinfo/meta-xilinx
>>
> 
> 

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Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-22 Thread Mike Looijmans 
Have only tried the MPSoC.

I haven't tried the 7k yet with 2018.3, may get to that tomorrow. I 
suspect it's something with the PMU interface and/or clock dividers.


On 21-03-19 17:54, Peter Smith wrote:
> Mike, although I have not made any measurements I have noticed in the 
> last few days (coincidentally I have been doing a lot of work with a 
> ZCU102) that the SD interface seemed a bit slow. Are you seeing this on 
> Zynq 7K or US+ MPSoC?
> Best Regards
> Peter
> 
> 
> On Thu, 21 Mar 2019 at 16:38, Mike Looijmans  > wrote:
> 
> The SD and eMMC controller has become terribly slow in 2018.3:
> 
> # echo 3 > /proc/sys/vm/drop_caches
> 
> # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
> 
> # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
> 
> 
> This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s
> for the
> SD card (mmcblk0) with the 2018.1 kernel and bootloader.
> 
> This is only in Linux, the bootloader still reads at about 10MB/s
> from the SD
> card. So apparently the clocks are set up okay.
> 
> According to the kernel, the clocks and interface are running at
> full speed:
> 
> # cat /sys/kernel/debug/mmc0/ios
> clock:          2 Hz
> actual clock:   2 Hz
> vdd:            21 (3.3 ~ 3.4 V)
> bus mode:       2 (push-pull)
> chip select:    0 (don't care)
> power mode:     2 (on)
> bus width:      3 (8 bits)
> timing spec:    9 (mmc HS200)
> signal voltage: 1 (1.80 V)
> driver type:    0 (driver type B)
> 
> # cat /sys/kernel/debug/mmc1/ios
> clock:          5000 Hz
> actual clock:   5000 Hz
> vdd:            21 (3.3 ~ 3.4 V)
> bus mode:       2 (push-pull)
> chip select:    0 (don't care)
> power mode:     2 (on)
> bus width:      2 (4 bits)
> timing spec:    2 (sd high-speed)
> signal voltage: 0 (3.30 V)
> driver type:    0 (driver type B)
> 
> 
> Any insights?
> -- 
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> 


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Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-21 Thread Jean-Francois Dagenais 
Hi guys,

> On Mar 21, 2019, at 09:03, Mike Looijmans  wrote:
> 
> The SD and eMMC controller has become terribly slow in 2018.3:
> 
> # echo 3 > /proc/sys/vm/drop_caches
> 
> # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
> 
> # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
> 
> 
> This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s for the 
> SD card (mmcblk0) with the 2018.1 kernel and bootloader.
> 
> This is only in Linux, the bootloader still reads at about 10MB/s from the SD 
> card. So apparently the clocks are set up okay.
> 
> According to the kernel, the clocks and interface are running at full speed:
> 
> # cat /sys/kernel/debug/mmc0/ios
> clock:  2 Hz
> actual clock:   2 Hz
> vdd:21 (3.3 ~ 3.4 V)
> bus mode:   2 (push-pull)
> chip select:0 (don't care)
> power mode: 2 (on)
> bus width:  3 (8 bits)
> timing spec:9 (mmc HS200)
> signal voltage: 1 (1.80 V)
> driver type:0 (driver type B)
> 
> # cat /sys/kernel/debug/mmc1/ios
> clock:  5000 Hz
> actual clock:   5000 Hz
> vdd:21 (3.3 ~ 3.4 V)
> bus mode:   2 (push-pull)
> chip select:0 (don't care)
> power mode: 2 (on)
> bus width:  2 (4 bits)
> timing spec:2 (sd high-speed)
> signal voltage: 0 (3.30 V)
> driver type:0 (driver type B)
> 
> 
> Any insights?

We also had a long standing performance test which only recently (2018.3) 
started acting up. Our drill down though showed that is seemed to have been 
related to previous write operations causing the internal eMMC chip's 
controller to perform outstanding background operations (BKOPS). We sort of 
worked around the problem by doing a full blkdiscard of the entire device 
(because we could) prior to the write test.

Not sure if it is related to your query but it might help.

Cheers!
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Re: [meta-xilinx] Really bad SD/eMMC performance after upgrading 2018.1 to 2018.3

2019-03-21 Thread Peter Smith 
Mike, although I have not made any measurements I have noticed in the last
few days (coincidentally I have been doing a lot of work with a ZCU102)
that the SD interface seemed a bit slow. Are you seeing this on Zynq 7K or
US+ MPSoC?
Best Regards
Peter


On Thu, 21 Mar 2019 at 16:38, Mike Looijmans 
wrote:

> The SD and eMMC controller has become terribly slow in 2018.3:
>
> # echo 3 > /proc/sys/vm/drop_caches
>
> # dd if=/dev/mmcblk0 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 4.972666 seconds, 4.0MB/s
>
> # dd if=/dev/mmcblk1 of=/dev/null bs=1M count=20
> 20+0 records in
> 20+0 records out
> 20971520 bytes (20.0MB) copied, 38.899436 seconds, 526.5KB/s
>
>
> This used to be over 160MB/s for the eMMC (mmcblk0) and over 20 MB/s for
> the
> SD card (mmcblk0) with the 2018.1 kernel and bootloader.
>
> This is only in Linux, the bootloader still reads at about 10MB/s from the
> SD
> card. So apparently the clocks are set up okay.
>
> According to the kernel, the clocks and interface are running at full
> speed:
>
> # cat /sys/kernel/debug/mmc0/ios
> clock:  2 Hz
> actual clock:   2 Hz
> vdd:21 (3.3 ~ 3.4 V)
> bus mode:   2 (push-pull)
> chip select:0 (don't care)
> power mode: 2 (on)
> bus width:  3 (8 bits)
> timing spec:9 (mmc HS200)
> signal voltage: 1 (1.80 V)
> driver type:0 (driver type B)
>
> # cat /sys/kernel/debug/mmc1/ios
> clock:  5000 Hz
> actual clock:   5000 Hz
> vdd:21 (3.3 ~ 3.4 V)
> bus mode:   2 (push-pull)
> chip select:0 (don't care)
> power mode: 2 (on)
> bus width:  2 (4 bits)
> timing spec:2 (sd high-speed)
> signal voltage: 0 (3.30 V)
> driver type:0 (driver type B)
>
>
> Any insights?
> --
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