Re: Pimp my APU
On 2023/11/11 11:31, Lucas Gabriel Vuotto wrote: > On Sat, Nov 11, 2023 at 10:42:22AM -, Stuart Henderson wrote: > > > 3) There is a simple watchdog timer in the NCT5104D that can be > > > connected to the reset line. Would this be implemented? > > > > also AFAIK no. > > > > wbsio(4) has code to probe for the device these days so it's unlikely > > to be difficult for someone with an interest in such a thing to add > > support for watchdog and/or gpio. Look at other superio drivers which > > already have this functionality, in particular look at cvs history > > from when it was added. As far as device driver coding goes, adding > > GPIO/sensors/watchdog support to an existing driver for a device with > > an available datasheet is fairly straightforward and doesn't need deep > > coding skills. > > There is https://marc.info/?l=openbsd-tech=158113851919238=2 from > 2020. Ah that's in a different device - the FCH is in the SoC (system-on-chip) used in the APU - so the same IC that also contains the CPU, but not part of the CPU itself. That looks not too far from being ready, but see Claudio's comments in the reply.
Re: Pimp my APU
On Sat, Nov 11, 2023 at 10:42:22AM -, Stuart Henderson wrote: > > 3) There is a simple watchdog timer in the NCT5104D that can be > > connected to the reset line. Would this be implemented? > > also AFAIK no. > > wbsio(4) has code to probe for the device these days so it's unlikely > to be difficult for someone with an interest in such a thing to add > support for watchdog and/or gpio. Look at other superio drivers which > already have this functionality, in particular look at cvs history > from when it was added. As far as device driver coding goes, adding > GPIO/sensors/watchdog support to an existing driver for a device with > an available datasheet is fairly straightforward and doesn't need deep > coding skills. There is https://marc.info/?l=openbsd-tech=158113851919238=2 from 2020.
Re: Pimp my APU
On 2023-11-10, Anders Andersson wrote: > I'm running OpenBSD on my (recently EOL) APU4 and I'm wondering how > much of the "extra" hardware is expected to work on OpenBSD. > > 1) On the back of the board is a button "S1" and three status LEDs, > The documentation says they are handled by the AMD FCH south bridge. > Is there a way to control these in software from OpenBSD? see gpio(4), gpioctl(8). you need to assign pins in rc.securelevel and can then control them after boot. while you're figuring out how to set it up in the first place, you might want to temporarily set kern.securelevel=-1 in sysctl.conf. > 2) There are 16 additional GPIO on a header, via the Nuvoton NCT5104D > chip on the LPC bus. I've seen a few patches circulating that mentions > gpio and the wbsio(4) driver but I could not figure out if anything > has been committed or not. AFAIK no: DESCRIPTION The wbsio driver provides support for the Winbond LPC Super I/O ICs. Only the hardware monitoring function is currently supported. > 3) There is a simple watchdog timer in the NCT5104D that can be > connected to the reset line. Would this be implemented? also AFAIK no. wbsio(4) has code to probe for the device these days so it's unlikely to be difficult for someone with an interest in such a thing to add support for watchdog and/or gpio. Look at other superio drivers which already have this functionality, in particular look at cvs history from when it was added. As far as device driver coding goes, adding GPIO/sensors/watchdog support to an existing driver for a device with an available datasheet is fairly straightforward and doesn't need deep coding skills. > Would this be implemented? I'm not sure > it's really useful, I assume there's an integrated watchdog in the > CPU. I don't think there's a watchdog in the cpu either. While I've used watchdogs in the past, my feeling is that they're not really a good fit for using with standard OpenBSD. OK so the machine reboots, but then what? You're probably going to hit an unclean filesystem (and if you're unlucky, it'll trigger during kernel relinking which takes place in the background - after watchdogd has started - which is both a time when it's more likely to happen as there's often memory pressure, and a time when filesystems are seeing more activity than usual). They seem better suited to a non-standard installation which avoids RW disk mounts. -- Please keep replies on the mailing list.
Re: Pimp my APU
https://pcengines.ch/howto.htm#gpio -Stefan Ronald Dahlgren hat am 11.11.2023 01:03 CET geschrieben: I’ve got several APUs and a couple Alix boards. The s1 button should work as a power / reset button out of the box. On Fri, Nov 10, 2023 at 6:54 PM Anders Andersson wrote: I'm running OpenBSD on my (recently EOL) APU4 and I'm wondering how much of the "extra" hardware is expected to work on OpenBSD. 1) On the back of the board is a button "S1" and three status LEDs, The documentation says they are handled by the AMD FCH south bridge. Is there a way to control these in software from OpenBSD? 2) There are 16 additional GPIO on a header, via the Nuvoton NCT5104D chip on the LPC bus. I've seen a few patches circulating that mentions gpio and the wbsio(4) driver but I could not figure out if anything has been committed or not. 3) There is a simple watchdog timer in the NCT5104D that can be connected to the reset line. Would this be implemented? I'm not sure it's really useful, I assume there's an integrated watchdog in the CPU. Would be interested in hearing from any OpenBSD APUx user who put these to good use! // Anders >
Re: Pimp my APU
I’ve got several APUs and a couple Alix boards. The s1 button should work as a power / reset button out of the box. On Fri, Nov 10, 2023 at 6:54 PM Anders Andersson wrote: > I'm running OpenBSD on my (recently EOL) APU4 and I'm wondering how > much of the "extra" hardware is expected to work on OpenBSD. > > 1) On the back of the board is a button "S1" and three status LEDs, > The documentation says they are handled by the AMD FCH south bridge. > Is there a way to control these in software from OpenBSD? > > 2) There are 16 additional GPIO on a header, via the Nuvoton NCT5104D > chip on the LPC bus. I've seen a few patches circulating that mentions > gpio and the wbsio(4) driver but I could not figure out if anything > has been committed or not. > > 3) There is a simple watchdog timer in the NCT5104D that can be > connected to the reset line. Would this be implemented? I'm not sure > it's really useful, I assume there's an integrated watchdog in the > CPU. > > Would be interested in hearing from any OpenBSD APUx user who put > these to good use! > > // Anders > >
Pimp my APU
I'm running OpenBSD on my (recently EOL) APU4 and I'm wondering how much of the "extra" hardware is expected to work on OpenBSD. 1) On the back of the board is a button "S1" and three status LEDs, The documentation says they are handled by the AMD FCH south bridge. Is there a way to control these in software from OpenBSD? 2) There are 16 additional GPIO on a header, via the Nuvoton NCT5104D chip on the LPC bus. I've seen a few patches circulating that mentions gpio and the wbsio(4) driver but I could not figure out if anything has been committed or not. 3) There is a simple watchdog timer in the NCT5104D that can be connected to the reset line. Would this be implemented? I'm not sure it's really useful, I assume there's an integrated watchdog in the CPU. Would be interested in hearing from any OpenBSD APUx user who put these to good use! // Anders
