Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Brian Gladman
-Original Message- 
From: Bill Hart

Sent: Thursday, October 25, 2012 2:12 PM
To: mpir-devel@googlegroups.com
Subject: [mpir-devel] Re: MPIR tuning -- help needed

OK, I've added the parameters from JP. I'll wait until Leif supplies
us with the AMD Bobcat timings and that will probably have to do.

The one major thing we don't have is ARM tuning values. But we just
don't seem to have any ARMs online anywhere at the moment (except in
our pockets).

I'll move the *nix tuning values over to Windows tonight if Brian
doesn't beat me to it. Then we'll issue a beta.

=
I've been doing these as you add them and I have just done the latest one a 
few minutes ago.


   Brian

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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread leif

Bill Hart wrote:

OK, I've added the parameters from JP. I'll wait until Leif supplies
us with the AMD Bobcat timings and that will probably have to do.


On the way...  Some figures vary quite a lot (despite the machine being 
otherwise idle), so I'm running tuneup a couple more times.




The one major thing we don't have is ARM tuning values. But we just
don't seem to have any ARMs online anywhere at the moment (except in
our pockets).


I asked Julien Puydt, and he gracefully contributed the attached ones 
for ARM/Linux, GCC 4.6.? (ARM v7l, cf. attached cpuinfo).



-leif

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Processor   : ARMv7 Processor rev 0 (v7l)
processor   : 0
BogoMIPS: 1987.37

processor   : 1
BogoMIPS: 1987.37

Features: swp half thumb fastmult vfp edsp thumbee vfpv3 vfpv3d16 
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x1
CPU part: 0xc09
CPU revision: 0

Hardware: Toshiba AC100 / Dynabook AZ
Revision: 
Serial  : 
/* Generated by tuneup.c, 2012-10-25, gcc 4.6 */

#define MUL_KARATSUBA_THRESHOLD  22
#define MUL_TOOM3_THRESHOLD 121
#define MUL_TOOM4_THRESHOLD 180
#define MUL_TOOM8H_THRESHOLD274

#define SQR_BASECASE_THRESHOLD7
#define SQR_KARATSUBA_THRESHOLD  44
#define SQR_TOOM3_THRESHOLD 145
#define SQR_TOOM4_THRESHOLD 375
#define SQR_TOOM8_THRESHOLD 375

#define POWM_THRESHOLD  190

#define HGCD_THRESHOLD   61
#define GCD_DC_THRESHOLD   1737
#define GCDEXT_DC_THRESHOLD1240
#define JACOBI_BASE_METHOD1

#define DIVREM_1_NORM_THRESHOLD   0  /* preinv always */
#define DIVREM_1_UNNORM_THRESHOLD 0  /* always */
#define MOD_1_NORM_THRESHOLD  0  /* always */
#define MOD_1_UNNORM_THRESHOLD0  /* always */
#define USE_PREINV_DIVREM_1   1  /* preinv always */
#define USE_PREINV_MOD_1  1  /* preinv always */
#define DIVREM_2_THRESHOLD0  /* preinv always */
#define DIVEXACT_1_THRESHOLD  0  /* always */
#define MODEXACT_1_ODD_THRESHOLD  0  /* always */
#define MOD_1_1_THRESHOLD 5
#define MOD_1_2_THRESHOLD10
#define MOD_1_3_THRESHOLD34
#define DIVREM_HENSEL_QR_1_THRESHOLD 11
#define RSH_DIVREM_HENSEL_QR_1_THRESHOLD996
#define DIVREM_EUCLID_HENSEL_THRESHOLD  8

#define ROOTREM_THRESHOLD 6

#define GET_STR_DC_THRESHOLD 10
#define GET_STR_PRECOMPUTE_THRESHOLD 19
#define SET_STR_DC_THRESHOLD   4183
#define SET_STR_PRECOMPUTE_THRESHOLD  30759

#define MUL_FFT_FULL_THRESHOLD 3776

#define SQR_FFT_FULL_THRESHOLD 6912

#define MULLOW_BASECASE_THRESHOLD 0  /* always */
#define MULLOW_DC_THRESHOLD  53
#define MULLOW_MUL_THRESHOLD   4437

#define MULHIGH_BASECASE_THRESHOLD0  /* always */
#define MULHIGH_DC_THRESHOLD 54
#define MULHIGH_MUL_THRESHOLD  9970

#define MULMOD_2EXPM1_THRESHOLD  26

#define FAC_UI_THRESHOLD   1203
#define DC_DIV_QR_THRESHOLD 358
#define DC_DIVAPPR_Q_N_THRESHOLD229
#define INV_DIV_QR_THRESHOLD   1187
#define INV_DIVAPPR_Q_N_THRESHOLD   229
#define DC_DIV_Q_THRESHOLD  263
#define INV_DIV_Q_THRESHOLD4318
#define DC_DIVAPPR_Q_THRESHOLD  229
#define INV_DIVAPPR_Q_THRESHOLD   10153
#define DC_BDIV_QR_THRESHOLD358
#define DC_BDIV_Q_THRESHOLD 112

/* fft_tuning -- autogenerated by tune-fft */

#define FFT_TAB \
   { { 3, 2 }, { 3, 2 }, { 2, 1 }, { 1, 0 }, { 1, 0 } }

#define MULMOD_TAB \
   { 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1 }

#define FFT_N_NUM 15

#define FFT_MULMOD_2EXPP1_CUTOFF 128


/* Tuneup completed successfully, took 1044 seconds */


Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Bill Hart
On 25 October 2012 21:34, leif not.rea...@online.de wrote:
 Bill Hart wrote:

 OK, I've added the parameters from JP. I'll wait until Leif supplies
 us with the AMD Bobcat timings and that will probably have to do.


 On the way...  Some figures vary quite a lot (despite the machine being
 otherwise idle), so I'm running tuneup a couple more times.

That's ok, some of the crossovers are pretty wide.




 The one major thing we don't have is ARM tuning values. But we just
 don't seem to have any ARMs online anywhere at the moment (except in
 our pockets).


 I asked Julien Puydt, and he gracefully contributed the attached ones for
 ARM/Linux, GCC 4.6.? (ARM v7l, cf. attached cpuinfo).


Fantastic! Thanks Julien!

Bill.


 -leif


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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Jean-Pierre Flori
Here is another x86:

uname -a
Linux pichou 3.2.0-29-generic #46-Ubuntu SMP Fri Jul 27 17:04:05 UTC 2012 
i686 i686 i386 GNU/Linux

cat /proc/cpuinfo
model name: Intel(R) Atom(TM) CPU N450   @ 1.66GHz

gcc -v
Utilisation des specs internes.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/lib/gcc/i686-linux-gnu/4.6/lto-wrapper
Target: i686-linux-gnu
Configuré avec: ../src/configure -v --with-pkgversion='Ubuntu/Linaro 
4.6.3-1ubuntu5' --with-bugurl=file:///usr/share/doc/gcc-4.6/README.Bugs 
--enable-languages=c,c++,fortran,objc,obj-c++ --prefix=/usr 
--program-suffix=-4.6 --enable-shared --enable-linker-build-id 
--with-system-zlib --libexecdir=/usr/lib --without-included-gettext 
--enable-threads=posix --with-gxx-include-dir=/usr/include/c++/4.6 
--libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu 
--enable-libstdcxx-debug --enable-libstdcxx-time=yes 
--enable-gnu-unique-object --enable-plugin --enable-objc-gc 
--enable-targets=all --disable-werror --with-arch-32=i686 
--with-tune=generic --enable-checking=release --build=i686-linux-gnu 
--host=i686-linux-gnu --target=i686-linux-gnu
Modèle de thread: posix
gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5)

./config.guess
atom-pc-linux-gnu

./tuneup
Parameters for ./mpn/x86/k7/gmp-mparam.h
Using: CPU cycle counter, supplemented by microsecond getrusage()
speed_precision 100, speed_unittime 6.00e-10 secs, CPU freq 1667.00 MHz
DEFAULT_MAX_SIZE 1000, fft_max_size 5

/* Generated by tuneup.c, 2012-10-25, gcc 4.6 */

#define MUL_KARATSUBA_THRESHOLD  20
#define MUL_TOOM3_THRESHOLD 131
#define MUL_TOOM4_THRESHOLD 200
#define MUL_TOOM8H_THRESHOLD327

#define SQR_BASECASE_THRESHOLD0  /* always (native) */
#define SQR_KARATSUBA_THRESHOLD  39
#define SQR_TOOM3_THRESHOLD 132
#define SQR_TOOM4_THRESHOLD 315
#define SQR_TOOM8_THRESHOLD 372

#define POWM_THRESHOLD  110

#define HGCD_THRESHOLD   37
#define GCD_DC_THRESHOLD 77
#define GCDEXT_DC_THRESHOLD 951
#define JACOBI_BASE_METHOD2

#define USE_PREINV_DIVREM_1   1  /* native */
#define USE_PREINV_MOD_1  1  /* native */
#define DIVREM_2_THRESHOLD5
#define DIVEXACT_1_THRESHOLD  0  /* always (native) */
#define MODEXACT_1_ODD_THRESHOLD  0  /* always (native) */
#define MOD_1_1_THRESHOLD37
#define MOD_1_2_THRESHOLD38
#define MOD_1_3_THRESHOLD40
#define DIVREM_HENSEL_QR_1_THRESHOLD996
#define RSH_DIVREM_HENSEL_QR_1_THRESHOLD996
#define DIVREM_EUCLID_HENSEL_THRESHOLD 52

#define ROOTREM_THRESHOLD 6

#define GET_STR_DC_THRESHOLD 13
#define GET_STR_PRECOMPUTE_THRESHOLD 24
#define SET_STR_DC_THRESHOLD254
#define SET_STR_PRECOMPUTE_THRESHOLD254

#define MUL_FFT_FULL_THRESHOLD 2240

#define SQR_FFT_FULL_THRESHOLD 2752

#define MULLOW_BASECASE_THRESHOLD 4
#define MULLOW_DC_THRESHOLD  50
#define MULLOW_MUL_THRESHOLD458

#define MULHIGH_BASECASE_THRESHOLD6
#define MULHIGH_DC_THRESHOLD 36
#define MULHIGH_MUL_THRESHOLD  2937

#define MULMOD_2EXPM1_THRESHOLD  20

#define FAC_UI_THRESHOLD   1024
#define DC_DIV_QR_THRESHOLD 100
#define DC_DIVAPPR_Q_N_THRESHOLD233
#define INV_DIV_QR_THRESHOLD465
#define INV_DIVAPPR_Q_N_THRESHOLD   233
#define DC_DIV_Q_THRESHOLD  233
#define INV_DIV_Q_THRESHOLD2914
#define DC_DIVAPPR_Q_THRESHOLD  225
#define INV_DIVAPPR_Q_THRESHOLD5624
#define DC_BDIV_QR_THRESHOLD278
#define DC_BDIV_Q_THRESHOLD 162

/* fft_tuning -- autogenerated by tune-fft */

#define FFT_TAB \
   { { 4, 3 }, { 3, 2 }, { 2, 1 }, { 1, 1 }, { 1, 0 } }

#define MULMOD_TAB \
   { 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1 }

#define FFT_N_NUM 15

#define FFT_MULMOD_2EXPP1_CUTOFF 128


/* Tuneup completed successfully, took 788 seconds */

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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread leif

Bill Hart wrote:

On 25 October 2012 21:34, leif not.rea...@online.de wrote:

Bill Hart wrote:


OK, I've added the parameters from JP. I'll wait until Leif supplies
us with the AMD Bobcat timings and that will probably have to do.



On the way...  Some figures vary quite a lot (despite the machine being
otherwise idle), so I'm running tuneup a couple more times.


That's ok, some of the crossovers are pretty wide.


Ok, I took the dominant or approx. average ones; see below for those 
that vary broadly.



Have fun,

-leif


#define DIVREM_EUCLID_HENSEL_THRESHOLD  8
#define DIVREM_EUCLID_HENSEL_THRESHOLD  8
#define DIVREM_EUCLID_HENSEL_THRESHOLD 15
#define DIVREM_EUCLID_HENSEL_THRESHOLD 17
#define DIVREM_EUCLID_HENSEL_THRESHOLD 18
#define DIVREM_EUCLID_HENSEL_THRESHOLD 18
#define DIVREM_EUCLID_HENSEL_THRESHOLD 21
#define DIVREM_EUCLID_HENSEL_THRESHOLD 23
#define DIVREM_EUCLID_HENSEL_THRESHOLD 23
#define DIVREM_EUCLID_HENSEL_THRESHOLD 75
#define DIVREM_EUCLID_HENSEL_THRESHOLD 89
#define DIVREM_EUCLID_HENSEL_THRESHOLD 91
#define DIVREM_EUCLID_HENSEL_THRESHOLD141
#define DIVREM_EUCLID_HENSEL_THRESHOLD170
#define DIVREM_EUCLID_HENSEL_THRESHOLD208


#define HGCD_THRESHOLD   30
#define HGCD_THRESHOLD   30
#define HGCD_THRESHOLD   30
#define HGCD_THRESHOLD   30
#define HGCD_THRESHOLD   30
#define HGCD_THRESHOLD   31
#define HGCD_THRESHOLD   35
#define HGCD_THRESHOLD   37
#define HGCD_THRESHOLD   52
#define HGCD_THRESHOLD   54
#define HGCD_THRESHOLD   92
#define HGCD_THRESHOLD  109
#define HGCD_THRESHOLD  110
#define HGCD_THRESHOLD  318
#define HGCD_THRESHOLD  422


#define SET_STR_PRECOMPUTE_THRESHOLD214
#define SET_STR_PRECOMPUTE_THRESHOLD214
#define SET_STR_PRECOMPUTE_THRESHOLD222
#define SET_STR_PRECOMPUTE_THRESHOLD230
#define SET_STR_PRECOMPUTE_THRESHOLD240
#define SET_STR_PRECOMPUTE_THRESHOLD382
#define SET_STR_PRECOMPUTE_THRESHOLD399
#define SET_STR_PRECOMPUTE_THRESHOLD411
#define SET_STR_PRECOMPUTE_THRESHOLD427
#define SET_STR_PRECOMPUTE_THRESHOLD499
#define SET_STR_PRECOMPUTE_THRESHOLD671
#define SET_STR_PRECOMPUTE_THRESHOLD716
#define SET_STR_PRECOMPUTE_THRESHOLD752
#define SET_STR_PRECOMPUTE_THRESHOLD828
#define SET_STR_PRECOMPUTE_THRESHOLD984



bobcat-unknown-linux-gnu (btver1)


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processor   : 0
vendor_id   : AuthenticAMD
cpu family  : 20
model   : 2
model name  : AMD E-450 APU with Radeon(tm) HD Graphics
stepping: 0
cpu MHz : 1650.000
cache size  : 512 KB
physical id : 0
siblings: 2
core id : 0
cpu cores   : 2
apicid  : 0
initial apicid  : 0
fpu : yes
fpu_exception   : yes
cpuid level : 6
wp  : yes
flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov 
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb 
rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf pni 
monitor ssse3 cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a 
misalignsse 3dnowprefetch ibs skinit wdt arat npt lbrv svm_lock nrip_save 
pausefilter
bogomips: 3292.78
TLB size: 1024 4K pages
clflush size: 64
cache_alignment : 64
address sizes   : 36 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate

processor   : 1
vendor_id   : AuthenticAMD
cpu family  : 20
model   : 2
model name  : AMD E-450 APU with Radeon(tm) HD Graphics
stepping: 0
cpu MHz : 1650.000
cache size  : 512 KB
physical id : 0
siblings: 2
core id : 1
cpu cores   : 2
apicid  : 1
initial apicid  : 1
fpu : yes
fpu_exception   : yes
cpuid level : 6
wp  : yes
flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov 
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb 
rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf pni 
monitor ssse3 cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a 
misalignsse 3dnowprefetch ibs skinit wdt arat npt lbrv svm_lock nrip_save 
pausefilter
bogomips: 3292.91
TLB size: 1024 4K pages
clflush size: 64
cache_alignment : 64
address sizes   : 36 bits physical, 48 bits 

Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Bill Hart
Hi Leif,

Some of the tuning code is absolute rubbish, so it produces almost
worthless values. Some of it is relatively stable though.

We need to do a major overhaul of the entire tuning system some day.

Thanks for these values. I think we've done pretty well, covering all
of x86_64 and most of the other major platforms still in use.

I'll commit them and once Brian indicates he's finished on the Windows
side I'll upload a beta.

Bill.

On 25 October 2012 23:04, leif not.rea...@online.de wrote:
 Bill Hart wrote:

 On 25 October 2012 21:34, leif not.rea...@online.de wrote:

 Bill Hart wrote:


 OK, I've added the parameters from JP. I'll wait until Leif supplies
 us with the AMD Bobcat timings and that will probably have to do.



 On the way...  Some figures vary quite a lot (despite the machine being
 otherwise idle), so I'm running tuneup a couple more times.


 That's ok, some of the crossovers are pretty wide.


 Ok, I took the dominant or approx. average ones; see below for those that
 vary broadly.


 Have fun,

 -leif


 #define DIVREM_EUCLID_HENSEL_THRESHOLD  8
 #define DIVREM_EUCLID_HENSEL_THRESHOLD  8
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 15
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 17
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 18
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 18
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 21
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 23
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 23
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 75
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 89
 #define DIVREM_EUCLID_HENSEL_THRESHOLD 91
 #define DIVREM_EUCLID_HENSEL_THRESHOLD141
 #define DIVREM_EUCLID_HENSEL_THRESHOLD170
 #define DIVREM_EUCLID_HENSEL_THRESHOLD208


 #define HGCD_THRESHOLD   30
 #define HGCD_THRESHOLD   30
 #define HGCD_THRESHOLD   30
 #define HGCD_THRESHOLD   30
 #define HGCD_THRESHOLD   30
 #define HGCD_THRESHOLD   31
 #define HGCD_THRESHOLD   35
 #define HGCD_THRESHOLD   37
 #define HGCD_THRESHOLD   52
 #define HGCD_THRESHOLD   54
 #define HGCD_THRESHOLD   92
 #define HGCD_THRESHOLD  109
 #define HGCD_THRESHOLD  110
 #define HGCD_THRESHOLD  318
 #define HGCD_THRESHOLD  422


 #define SET_STR_PRECOMPUTE_THRESHOLD214
 #define SET_STR_PRECOMPUTE_THRESHOLD214
 #define SET_STR_PRECOMPUTE_THRESHOLD222
 #define SET_STR_PRECOMPUTE_THRESHOLD230
 #define SET_STR_PRECOMPUTE_THRESHOLD240
 #define SET_STR_PRECOMPUTE_THRESHOLD382
 #define SET_STR_PRECOMPUTE_THRESHOLD399
 #define SET_STR_PRECOMPUTE_THRESHOLD411
 #define SET_STR_PRECOMPUTE_THRESHOLD427
 #define SET_STR_PRECOMPUTE_THRESHOLD499
 #define SET_STR_PRECOMPUTE_THRESHOLD671
 #define SET_STR_PRECOMPUTE_THRESHOLD716
 #define SET_STR_PRECOMPUTE_THRESHOLD752
 #define SET_STR_PRECOMPUTE_THRESHOLD828
 #define SET_STR_PRECOMPUTE_THRESHOLD984



 bobcat-unknown-linux-gnu (btver1)



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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Brian Gladman
-Original Message- 
From: Bill Hart 
Sent: Thursday, October 25, 2012 11:11 PM 
To: mpir-devel@googlegroups.com 
Subject: Re: [mpir-devel] Re: MPIR tuning -- help needed 


Hi Leif,

Some of the tuning code is absolute rubbish, so it produces almost
worthless values. Some of it is relatively stable though.

We need to do a major overhaul of the entire tuning system some day.

Thanks for these values. I think we've done pretty well, covering all
of x86_64 and most of the other major platforms still in use.

I'll commit them and once Brian indicates he's finished on the Windows
side I'll upload a beta.

==

My bit won't happen until tomorrow now as I'm almost asleep already!

   Brian

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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Bill Hart
Brian,

that's ok. It's only the bobcat timings I think. Do you want me to do
it, or is there other stuff you need to take care of on the Windows
side?

Bill.

On 25 October 2012 23:17, Brian Gladman b...@gladman.plus.com wrote:
 -Original Message- From: Bill Hart Sent: Thursday, October 25, 2012
 11:11 PM To: mpir-devel@googlegroups.com Subject: Re: [mpir-devel] Re: MPIR
 tuning -- help needed
 Hi Leif,

 Some of the tuning code is absolute rubbish, so it produces almost
 worthless values. Some of it is relatively stable though.

 We need to do a major overhaul of the entire tuning system some day.

 Thanks for these values. I think we've done pretty well, covering all
 of x86_64 and most of the other major platforms still in use.

 I'll commit them and once Brian indicates he's finished on the Windows
 side I'll upload a beta.

 ==

 My bit won't happen until tomorrow now as I'm almost asleep already!

Brian


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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Brian Gladman
-Original Message- 
From: Bill Hart

Sent: Thursday, October 25, 2012 11:19 PM
To: mpir-devel@googlegroups.com
Subject: Re: [mpir-devel] Re: MPIR tuning -- help needed

Brian,

that's ok. It's only the bobcat timings I think. Do you want me to do
it, or is there other stuff you need to take care of on the Windows
side?

=

Be my guest Bill - putting any tuning not yet committed into Windows is all 
that needs to be done.


   Brian

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Re: [mpir-devel] Re: MPIR tuning -- help needed

2012-10-25 Thread Bill Hart
OK, I think nehalem/westmere is also not there. I'll put that in too.
Not sure if it gets used or not, but it can't hurt anyway.

Bill.

On 25 October 2012 23:22, Brian Gladman b...@gladman.plus.com wrote:
 -Original Message- From: Bill Hart
 Sent: Thursday, October 25, 2012 11:19 PM

 To: mpir-devel@googlegroups.com
 Subject: Re: [mpir-devel] Re: MPIR tuning -- help needed

 Brian,

 that's ok. It's only the bobcat timings I think. Do you want me to do
 it, or is there other stuff you need to take care of on the Windows
 side?

 =

 Be my guest Bill - putting any tuning not yet committed into Windows is all
 that needs to be done.


Brian

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 mpir-devel group.
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