Bill Hart wrote:
On 25 October 2012 21:34, leif <not.rea...@online.de> wrote:
Bill Hart wrote:
OK, I've added the parameters from JP. I'll wait until Leif supplies
us with the AMD Bobcat timings and that will probably have to do.
On the way... Some figures vary quite a lot (despite the machine being
otherwise idle), so I'm running tuneup a couple more times.
That's ok, some of the crossovers are pretty wide.
Ok, I took the dominant or approx. average ones; see below for those
that vary broadly.
Have fun,
-leif
#define DIVREM_EUCLID_HENSEL_THRESHOLD 8
#define DIVREM_EUCLID_HENSEL_THRESHOLD 8
#define DIVREM_EUCLID_HENSEL_THRESHOLD 15
#define DIVREM_EUCLID_HENSEL_THRESHOLD 17
#define DIVREM_EUCLID_HENSEL_THRESHOLD 18
#define DIVREM_EUCLID_HENSEL_THRESHOLD 18
#define DIVREM_EUCLID_HENSEL_THRESHOLD 21
#define DIVREM_EUCLID_HENSEL_THRESHOLD 23
#define DIVREM_EUCLID_HENSEL_THRESHOLD 23
#define DIVREM_EUCLID_HENSEL_THRESHOLD 75
#define DIVREM_EUCLID_HENSEL_THRESHOLD 89
#define DIVREM_EUCLID_HENSEL_THRESHOLD 91
#define DIVREM_EUCLID_HENSEL_THRESHOLD 141
#define DIVREM_EUCLID_HENSEL_THRESHOLD 170
#define DIVREM_EUCLID_HENSEL_THRESHOLD 208
#define HGCD_THRESHOLD 30
#define HGCD_THRESHOLD 30
#define HGCD_THRESHOLD 30
#define HGCD_THRESHOLD 30
#define HGCD_THRESHOLD 30
#define HGCD_THRESHOLD 31
#define HGCD_THRESHOLD 35
#define HGCD_THRESHOLD 37
#define HGCD_THRESHOLD 52
#define HGCD_THRESHOLD 54
#define HGCD_THRESHOLD 92
#define HGCD_THRESHOLD 109
#define HGCD_THRESHOLD 110
#define HGCD_THRESHOLD 318
#define HGCD_THRESHOLD 422
#define SET_STR_PRECOMPUTE_THRESHOLD 214
#define SET_STR_PRECOMPUTE_THRESHOLD 214
#define SET_STR_PRECOMPUTE_THRESHOLD 222
#define SET_STR_PRECOMPUTE_THRESHOLD 230
#define SET_STR_PRECOMPUTE_THRESHOLD 240
#define SET_STR_PRECOMPUTE_THRESHOLD 382
#define SET_STR_PRECOMPUTE_THRESHOLD 399
#define SET_STR_PRECOMPUTE_THRESHOLD 411
#define SET_STR_PRECOMPUTE_THRESHOLD 427
#define SET_STR_PRECOMPUTE_THRESHOLD 499
#define SET_STR_PRECOMPUTE_THRESHOLD 671
#define SET_STR_PRECOMPUTE_THRESHOLD 716
#define SET_STR_PRECOMPUTE_THRESHOLD 752
#define SET_STR_PRECOMPUTE_THRESHOLD 828
#define SET_STR_PRECOMPUTE_THRESHOLD 984
bobcat-unknown-linux-gnu (btver1)
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processor : 0
vendor_id : AuthenticAMD
cpu family : 20
model : 2
model name : AMD E-450 APU with Radeon(tm) HD Graphics
stepping : 0
cpu MHz : 1650.000
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fpu : yes
fpu_exception : yes
cpuid level : 6
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb
rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf pni
monitor ssse3 cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a
misalignsse 3dnowprefetch ibs skinit wdt arat npt lbrv svm_lock nrip_save
pausefilter
bogomips : 3292.78
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate
processor : 1
vendor_id : AuthenticAMD
cpu family : 20
model : 2
model name : AMD E-450 APU with Radeon(tm) HD Graphics
stepping : 0
cpu MHz : 1650.000
cache size : 512 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
apicid : 1
initial apicid : 1
fpu : yes
fpu_exception : yes
cpuid level : 6
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb
rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid aperfmperf pni
monitor ssse3 cx16 popcnt lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a
misalignsse 3dnowprefetch ibs skinit wdt arat npt lbrv svm_lock nrip_save
pausefilter
bogomips : 3292.91
TLB size : 1024 4K pages
clflush size : 64
cache_alignment : 64
address sizes : 36 bits physical, 48 bits virtual
power management: ts ttp tm stc 100mhzsteps hwpstate
/* Generated by tuneup.c, 2012-10-25, gcc 4.6 */
#define MUL_KARATSUBA_THRESHOLD 14
#define MUL_TOOM3_THRESHOLD 90
#define MUL_TOOM4_THRESHOLD 214
#define MUL_TOOM8H_THRESHOLD 286
#define SQR_BASECASE_THRESHOLD 0 /* always (native) */
#define SQR_KARATSUBA_THRESHOLD 27
#define SQR_TOOM3_THRESHOLD 90
#define SQR_TOOM4_THRESHOLD 996
#define SQR_TOOM8_THRESHOLD 996
#define POWM_THRESHOLD 113
#define HGCD_THRESHOLD 30
#define GCD_DC_THRESHOLD 2279
#define GCDEXT_DC_THRESHOLD 1502
#define JACOBI_BASE_METHOD 1
#define DIVREM_1_NORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define DIVREM_1_UNNORM_THRESHOLD MP_SIZE_T_MAX /* never */
#define MOD_1_NORM_THRESHOLD 0 /* always */
#define MOD_1_UNNORM_THRESHOLD 0 /* always */
#define USE_PREINV_DIVREM_1 1 /* native */
#define USE_PREINV_MOD_1 1
#define DIVEXACT_1_THRESHOLD 0 /* always */
#define MODEXACT_1_ODD_THRESHOLD 0 /* always (native) */
#define MOD_1_1_THRESHOLD 6
#define MOD_1_2_THRESHOLD 20
#define MOD_1_3_THRESHOLD 20
#define DIVREM_HENSEL_QR_1_THRESHOLD 14
#define RSH_DIVREM_HENSEL_QR_1_THRESHOLD 19
#define DIVREM_EUCLID_HENSEL_THRESHOLD 23
#define ROOTREM_THRESHOLD 6
#define GET_STR_DC_THRESHOLD 16
#define GET_STR_PRECOMPUTE_THRESHOLD 25
#define SET_STR_DC_THRESHOLD 210
#define SET_STR_PRECOMPUTE_THRESHOLD 382
#define MUL_FFT_FULL_THRESHOLD 3520
#define SQR_FFT_FULL_THRESHOLD 5440
#define MULLOW_BASECASE_THRESHOLD 7
#define MULLOW_DC_THRESHOLD 39
#define MULLOW_MUL_THRESHOLD 5297
#define MULHIGH_BASECASE_THRESHOLD 8
#define MULHIGH_DC_THRESHOLD 39
#define MULHIGH_MUL_THRESHOLD 3239
#define MULMOD_2EXPM1_THRESHOLD 16
#define FAC_UI_THRESHOLD 1735
#define DC_DIV_QR_THRESHOLD 258
#define DC_DIVAPPR_Q_N_THRESHOLD 110
#define INV_DIV_QR_THRESHOLD 501
#define INV_DIVAPPR_Q_N_THRESHOLD 110
#define DC_DIV_Q_THRESHOLD 156
#define INV_DIV_Q_THRESHOLD 6535
#define DC_DIVAPPR_Q_THRESHOLD 110
#define INV_DIVAPPR_Q_THRESHOLD 13752
#define DC_BDIV_QR_THRESHOLD 258
#define DC_BDIV_Q_THRESHOLD 62
/* fft_tuning -- autogenerated by tune-fft */
#define FFT_TAB \
{ { 4, 3 }, { 3, 3 }, { 3, 2 }, { 2, 1 }, { 1, 0 } }
#define MULMOD_TAB \
{ 4, 3, 3, 4, 4, 3, 3, 3, 3, 2, 2, 3, 2, 2, 2, 2, 2, 1, 1 }
#define FFT_N_NUM 19
#define FFT_MULMOD_2EXPP1_CUTOFF 128
/* Tuneup completed successfully, took 356 seconds */
