Re: [neonixie-l] My NixiChron is sick, what do I do?

[Mitch]

I think I answered my own question. Max771 datasheet, pin 4:

"Active-high TTL/CMOS logic-level shutdown input. In shutdown mode, VOUT is 
a diode drop below V+ (due to the DC path from V+ to the output) and the 
supply current drops to 5µA maximum. Connect to ground for normal 
operation. 1.5V reference output that can source 100µA for external loads. 
Bypass to GND with 0.1µF". 

Apparently it is just an enable line for HV, not a PWM controlled supply. 
Is that correct?


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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Mitch]

Can someone scope the hvenable line? I'd like to know the frequency it is set 
to, or is it just high or low?

Again, replace the Max232. That fixed the exact problem with my nixiechron.  I 
also changed the surrounding electrolytics, but I'm not sure if that made a 
difference. 

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Nick]

It uses a max771-based supply. For the FET to get really hot a number of things 
could have happened, including the MAX771 latching up, the FET dying, and the 
feedback network topend resistor going o/c, HF oscillation etc...

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Terry Kennedy]

On Thursday, May 26, 2016 at 12:34:03 AM UTC-4, jrehwin wrote:
>
> Actually it was the MOSFET that was smoking. 
>

I'm not sure if the NixiChron has the same issue, but the FLW has an issue 
that if the microprocessor is held in a reset state (or stops running for 
some reason) the HV supply burns up. That's one of the reasons I don't like 
CPU-driven HV supplies. 

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[John Rehwinkel]

> And again it's current failing state is a weird one.  It is clearly still 
> "trying" to work.  It does a normal-ish start up beep sequence and digit 
> check, but the digits are muddled, showing multiple digits, and the first two 
> digits are most strongly showing "25" (which, being greater than 23, should 
> never happen on this clock).  And I think the second digit keep changing if 
> the clock is left on, I think -- not sure about this, I didn't spend much 
> time with it after John replaced the high voltage circuit since the old IC 
> was actually smoking and we hoped initially that was the only problem.

Actually it was the MOSFET that was smoking.

- John

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Niek]

It may be simpler to delay it with a couple of NOT gates (e.g. you use a 7400 
and use 2 NANDs in series with their inputs tied together for an approx. 20ns 
delay). This clock seems quite poorly designed though if it uses such low 
tolerances, maybe it's better to switch to something better and reuse the 
nixies :) But it could be worth trying the delay fix. A 7400 should only cost a 
few cents.

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[gregebert]

Per the datasheet, the HV5530 data hold-time requirement is 10nsec but that 
is only guaranteed when the part is operated at-spec. Cant really say if 
the timing requirements are met with 5V signal-levels even with the 
measured hold-time of 30nsec.

Clock pulsewidth is spec'd at 62nsec, but again, hard to say what impact 
the TTL-level signals have.

I know from my many years of chip-design that low-amplitude signals get 
degraded thru logic gates; the only way to determine what happens is to run 
SPICE simulations, and I can assure you that you wont get that info from 
the manufacturer.

If the clk and data signals were running at 10-12V, then adding some 
capacitance to the data line to improve hold-time  would be an option, *but 
it would only be necessary if the hold-time requirement of 10ns was 
violated*. It's entirely possible no timing violations exist at 10-12V 
signal levels

I didn't compare the datasheet of the 4504 to confirm it's same/similar to 
the MC14504 [works good on my latest clock]. The $64,000 question is if the 
PCB is laid-out so it can be reworked to accommodate one of these.

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[John Rehwinkel]

> Nice to have the scope shots.

A couple more below.

> Previously, you mentioned "The clock signal is nice and clean, but the data 
> signal has a bizarre triangle wave on it.": did you not reproduce this 
> particular issue?

I was probing the wrong pin!

I dialed up the sweep speed to see the timing between the clock signal (from 
the CPU) and the data signal (from the first HV5530) and they don't look happy.

Here's the clock signal relative to a falling edge of data in:




The clock pulse is the narrow one, the data in signal is the one that drops 
about 30 nanoseconds later.  Since the HV5530 samples the data in level when it 
sees the falling edge of the clock signal, it's likely to get the wrong level.  
The situation is basically the same for rising edges:

The data signal again changes state about 30ns after the falling edge of the 
clock signal.

I looked at the PC board, and the clock trace between the two HV5530s is not 
easy to get to.  However, the trace from the CPU is accessible, so I think I'm 
going to try using a 555 to produce a version of teh clock signal delayed by 
150ns or so.  The signal to the first HV5530 has plenty of time, so the delayed 
version shouldn't cause any problems with it, and it will change the timing for 
the second HV5530 so the data will have settled to the correct value and stayed 
there for more than the minimum holding time before the clock pulse arrives.  
I'm thinking if I power a 555 from the 11V supply for the HV5530, it'll also 
act as a level translator, which will improve the clock signal voltage margin.  
Alternatively, I could use a 4504 level shifter: translating from TTL to CMOS, 
it has a high-to-low propagation delay of about 140ns.  For maximum signal 
integrity, I could run the data signal through one section, and the clock 
signal through two*, so both of them would have the best possible timing and 
voltage margins.

* You will note that this would route an 11V signal into a 5V input, but the 
4504 documentation specifically allows input signals to exceed both Vcc and 
Vdd, so this doesn't violate any specifications.

I also looked at the GPS inputs from the MAX232 (the 1PPS signal and the RX 
data signal), they're both clean.  In any case, I plan to replace all the 
electrolytic capacitors, and the 1µF electrolytic capacitors for the MAX232 
voltage charge pump will be replaced with long-life monolithic ceramic units.

- John


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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Niek]

Nice to have the scope shots. Previously, you mentioned "The clock signal is 
nice and clean, but the data signal has a bizarre triangle wave on it.": did 
you not reproduce this particular issue?

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RE: [neonixie-l] My NixiChron is sick, what do I do?

[Jeff Walton]

It has been VERY interesting to follow this thread.  

It seems there are many opinions about how to do schematics, intellectual 
property, best design practices and more.  The aspect that I have found the 
most encouraging is that the comments have not been snarky or condescending and 
there has been a real exchange of ideas and willingness to help the original 
poster get his clock fixed.  Even when people seem to disagree with each other, 
the conversation has been thoughtful and has given everyone the opportunity to 
learn.

That is what I have found to be most valuable and a cause for optimism.  I hope 
that Quincy, or whomever works on the Jeff Thomas clock, will share what it 
took to fix it!


Jeff Walton


-Original Message-
From: neonixie-l@googlegroups.com [mailto:neonixie-l@googlegroups.com] On 
Behalf Of David Forbes
Sent: Monday, May 16, 2016 12:31 PM
To: neonixie-l@googlegroups.com
Subject: Re: [neonixie-l] My NixiChron is sick, what do I do?

Terry,

The issue is that the schematic diagrams are useful for existing owners of 
these clocks to get them repaired, which maximizes enjoyment of Jeff's products.

Whether someone else earned royalties from the firmware is largely irrelevant. 
We're discussing the hardware, not the firmware.

No one's life will be improved by hiding this information, and several peoples' 
lives will be improved by revealing it.

Please make decisions based on what is best for the world.

Thanks for listening to my rant.


On 5/15/16 11:05 PM, Terry Kennedy wrote:
> On Wednesday, May 11, 2016 at 2:07:14 AM UTC-4, nixiebunny wrote:
>
> The man is dead. What possible harm could come from revealing his
> innermost Nixie secrets now?
>
>
> I don't know. And because I don't know, I didn't want to post the 
> whole thing. I have worked with a variety of possibly-proprietary 
> information over the years, in both professional and hobbyist roles. 
> Unless I have a record of receiving the information with the 
> understanding I could redistribute it, or unless I know it is an 
> archived copy of something previously published, I won't redistribute 
> it. In this case, I posted an excerpt which was sufficient to answer 
> the question posed (the serial path between the CPU and the HV drivers).
>
> Jeff told me that the clocks were a collaborative design, with Jeff 
> doing the hardware and packaging designs and the assembly and someone 
> else doing the firmware, which Jeff paid a per-piece royalty for. So 
> there is likely someone who still has a financial interest in the 
> design.
>
> Speaking of which, I'd be interested in getting an updated CPU with 
> the latest US DST tables. I purchased an upgrade from Jeff 
> way-back-when, but it still doesn't change at the correct dates. I 
> believe the person who did the firmware posts here occasionally. If 
> there are some other people interested, it might be worthwhile to see 
> what a batch of new CPUs would cost.
>
>

--
David Forbes, Tucson AZ

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[David Forbes]

Terry,

The issue is that the schematic diagrams are useful for existing owners 
of these clocks to get them repaired, which maximizes enjoyment of 
Jeff's products.


Whether someone else earned royalties from the firmware is largely 
irrelevant. We're discussing the hardware, not the firmware.


No one's life will be improved by hiding this information, and several 
peoples' lives will be improved by revealing it.


Please make decisions based on what is best for the world.

Thanks for listening to my rant.


On 5/15/16 11:05 PM, Terry Kennedy wrote:

On Wednesday, May 11, 2016 at 2:07:14 AM UTC-4, nixiebunny wrote:

The man is dead. What possible harm could come from revealing his
innermost Nixie secrets now?


I don't know. And because I don't know, I didn't want to post the whole
thing. I have worked with a variety of possibly-proprietary information
over the years, in both professional and hobbyist roles. Unless I have a
record of receiving the information with the understanding I could
redistribute it, or unless I know it is an archived copy of something
previously published, I won't redistribute it. In this case, I posted an
excerpt which was sufficient to answer the question posed (the serial
path between the CPU and the HV drivers).

Jeff told me that the clocks were a collaborative design, with Jeff
doing the hardware and packaging designs and the assembly and
someone else doing the firmware, which Jeff paid a per-piece royalty
for. So there is likely someone who still has a financial interest in
the design.

Speaking of which, I'd be interested in getting an updated CPU with the
latest US DST tables. I purchased an upgrade from Jeff way-back-when,
but it still doesn't change at the correct dates. I believe the person
who did the firmware posts here occasionally. If there are some other
people interested, it might be worthwhile to see what a batch of new
CPUs would cost.




--
David Forbes, Tucson AZ

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Terry Kennedy]

On Wednesday, May 11, 2016 at 2:07:14 AM UTC-4, nixiebunny wrote:
>
> The man is dead. What possible harm could come from revealing his 
> innermost Nixie secrets now? 
>

I don't know. And because I don't know, I didn't want to post the whole 
thing. I have worked with a variety of possibly-proprietary information 
over the years, in both professional and hobbyist roles. Unless I have a 
record of receiving the information with the understanding I could 
redistribute it, or unless I know it is an archived copy of something 
previously published, I won't redistribute it. In this case, I posted an 
excerpt which was sufficient to answer the question posed (the serial path 
between the CPU and the HV drivers).

Jeff told me that the clocks were a collaborative design, with Jeff doing 
the hardware and packaging designs and the assembly and someone else doing 
the firmware, which Jeff paid a per-piece royalty for. So there is likely 
someone who still has a financial interest in the design.

Speaking of which, I'd be interested in getting an updated CPU with the 
latest US DST tables. I purchased an upgrade from Jeff way-back-when, but 
it still doesn't change at the correct dates. I believe the person who did 
the firmware posts here occasionally. If there are some other people 
interested, it might be worthwhile to see what a batch of new CPUs would 
cost.

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[GastonP]

I don't know how the law in the US goes, but does the IP get inherited? If 
the family was thinking in earning some money from this design (faulty as 
it could prove to be), then releasing the plans would mean hurting 
somebody..
Just my 2 cents...

On Wednesday, May 11, 2016 at 3:07:14 AM UTC-3, nixiebunny wrote:
>
> Terry, 
>
> The man is dead. What possible harm could come from revealing his 
> innermost Nixie secrets now? 
>


>
>
> On 5/10/16 7:02 PM, Terry Kennedy wrote: 
> > 
> > I don't want to go posting the whole NixiChron schematic here without 
> > some sort of consensus that it's OK (although I note that Jeff sent it 
> > to me on request way-back-when with no NDA), but here's the section 
> > showing the clock and data lines from the CPU to the HV chips. 
> > 
> > <
> https://lh3.googleusercontent.com/-Jv9Esn9apQk/VzKSlGjAVeI/ABM/833miwKGKkcRgmO6XK5RFGrnwuAcnUG8ACLcB/s1600/5-10-2016%2B9-56-40%2BPM.jpg>
>  
>
>
>
> -- 
> David Forbes, Tucson AZ 
>
>

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Niek]

Indeed, it may be worth trying to run the clock from lower voltages, e.g. 9V or 
7V instead of 12V, so the VDD-2V Vih is not so far off the mark. I think the 
cascading issue mentioned above shouldn't be a problem at the likely low clock 
frequency. But he mentioned a triangle wave on the data line: is it ok when not 
connected to the 5530? (i.e., is the PIC at least outputting a correct data 
signal?)

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[petehand]

It's not necessary. The HV5530 is a CMOS chip, so its low and high logic 
thresholds are 30% and 70% of whatever the VCC happens to be. It only needs 
to be run at 12V if you want to meet the datasheet specs for maximum clock 
rates (8MHz). I have never seen a nixie clock design that clocks out at 
more than 2MHz, and it works quite well at 3.3V at that frequency. My only 
concern about supply voltage is whether it's high enough to turn on the 
output HV FETs properly, so I wouldn't run it at less than 5V.


On Tuesday, May 10, 2016 at 4:44:39 PM UTC-7, gregebert wrote:
>
> Is there a level-shifter going into the HV5530 to drive the inputs to +12V 
> ? I've heard some folks are driving at 5V or 3.3V levels, which doesn't 
> meet datasheet specs.
>
>
>

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Nick]

OK - I've looked at my NixiSat schematic, and although the 5530 symbol 
implies that Vdd is connected to +5V, it's actually connected to a rail 
called... VDD which in turn goes directly to the input jack via a 1N4741 
11V Zener and a 100R resistor, i.e. if Vin from the wall wart is truly 12V 
(as it should be), then VDD should be 11V.

This is still driving the 5530s way out of spec, as the drive logic from 
the PIC is standard TTL with a 5V Vcc. Vih should be Vdd-2, i.e. 9V in this 
case, and it'll be nothing like that.

For the PIC, Vol = 0.2V and Voh is Vcc-0.7, i.e. 4V3 and only half what the 
datasheet says the 5530 needs in this use case.

One idea might be rotating the 5530s around and seeing if the problem moves 
with the driver...

Whatever happens, there are no level shifters and it "just worked", so that 
was OK then :)

Nick

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Jonathan F.]

Yes that would be possible. I used a smiliar IC in my project. The HV51222. I 
tested these with 4.8V output pins. 95% of them worked well. 3% didnt worked at 
all. And 2% did weird things. 

Seems like some of them see a "High" at a less Voltage, but as in the 
Datasheet, they should see 10.8V.

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[David Forbes]

Terry,

The man is dead. What possible harm could come from revealing his 
innermost Nixie secrets now?




On 5/10/16 7:02 PM, Terry Kennedy wrote:


I don't want to go posting the whole NixiChron schematic here without
some sort of consensus that it's OK (although I note that Jeff sent it
to me on request way-back-when with no NDA), but here's the section
showing the clock and data lines from the CPU to the HV chips.





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David Forbes, Tucson AZ

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Nick]

Vdd on the 5530 should be about 12V - the schematic snippet implies that Vdd is 
5V - the data sheet explicitly states that normal operation is not guaranteed 
with Vdd below 10.8V.

It may have worked at 5V, but that's just luck... over time, who knows what 
else has drifted..

Nick

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[gregebert]

On the schematic, it looks like there's a direct connection between the CPU 
and the HV5530's, so I'd say there isn't proper level-shifting.

It's hard to guess what the HV5530 will do with out-of-spec inputs; it 
might work under certain conditions (temperature, voltage), or it might be 
more susceptible to noise, or it might even be susceptible to aging 
effects. Also, the HV5530's are cascaded using the same clock signal; my 
read of the datasheet says you cannot guarantee proper hold-time at the 
data-in pin of the second HV5530.

I *dont* recommend adding pullup resistors in a attempt to boost the 
signal-level; the ESD-protection on the CPU will kick-in around (Vcc+0.7) 
volts. And it's not practical to mod the circuit board.

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Terry Kennedy]

On Tuesday, May 10, 2016 at 1:48:52 PM UTC-4, jrehwin wrote:
>
> I've been working on Quincy's clock.  I saw some serious squegging in the 
> high voltage power supply, and its switching MOSFET was overheating badly. 
>  The filter capacitor was also warm.  I tried powering the HV from a 
> Tayloredge supply, and it looks better but a couple of digits are still 
> misbehaving (blurry, more than one cathode lit at a time).  I hooked an 
> oscilloscope to the clock and data inputs to the HV5530 driver chips.  The 
> clock signal is nice and clean, but the data signal has a bizarre triangle 
> wave on it.  I don't know if it's AC coupled in order to adapt the PIC 
> logic threshold to the HV5530 or what, I still need to trace out that 
> circuitry.  The 12V power looks fine (there's a small amount of ripple on 
> it, but nothing objectionable), and the 5V power is clean. 
>

I don't want to go posting the whole NixiChron schematic here without some 
sort of consensus that it's OK (although I note that Jeff sent it to me on 
request way-back-when with no NDA), but here's the section showing the 
clock and data lines from the CPU to the HV chips.



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Re: [neonixie-l] My NixiChron is sick, what do I do?

[gregebert]

Is there a level-shifter going into the HV5530 to drive the inputs to +12V 
? I've heard some folks are driving at 5V or 3.3V levels, which doesn't 
meet datasheet specs.


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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Niek]

By the way, someone posted a Nixisat schematic to this group before, which may 
well be similar to the NixiChron. Maybe it can help you.

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[Niek]

Hmm, sounds like that capacitor may have reached the end of its life. 
Interesting about the triangle wave: can you post some scope shots?

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Re: [neonixie-l] My NixiChron is sick, what do I do?

[John Rehwinkel]

> Quincy, were you able to fix your clock? It may be helpful to make a little 
> video and post it on YouTube so that we get a better idea of how it's 
> failing. Also, try it with and without the GPS plugged in, and try reseating 
> the MCU as suggested. Also take some close up pictures of the circuit board 
> (front and back) so we can check if anything looks suspicious.

I've been working on Quincy's clock.  I saw some serious squegging in the high 
voltage power supply, and its switching MOSFET was overheating badly.  The 
filter capacitor was also warm.  I tried powering the HV from a Tayloredge 
supply, and it looks better but a couple of digits are still misbehaving 
(blurry, more than one cathode lit at a time).  I hooked an oscilloscope to the 
clock and data inputs to the HV5530 driver chips.  The clock signal is nice and 
clean, but the data signal has a bizarre triangle wave on it.  I don't know if 
it's AC coupled in order to adapt the PIC logic threshold to the HV5530 or 
what, I still need to trace out that circuitry.  The 12V power looks fine 
(there's a small amount of ripple on it, but nothing objectionable), and the 5V 
power is clean.

- John

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