> Nice to have the scope shots.

A couple more below.

> Previously, you mentioned "The clock signal is nice and clean, but the data 
> signal has a bizarre triangle wave on it.": did you not reproduce this 
> particular issue?

I was probing the wrong pin!

I dialed up the sweep speed to see the timing between the clock signal (from 
the CPU) and the data signal (from the first HV5530) and they don't look happy.

Here's the clock signal relative to a falling edge of data in:




The clock pulse is the narrow one, the data in signal is the one that drops 
about 30 nanoseconds later.  Since the HV5530 samples the data in level when it 
sees the falling edge of the clock signal, it's likely to get the wrong level.  
The situation is basically the same for rising edges:

The data signal again changes state about 30ns after the falling edge of the 
clock signal.

I looked at the PC board, and the clock trace between the two HV5530s is not 
easy to get to.  However, the trace from the CPU is accessible, so I think I'm 
going to try using a 555 to produce a version of teh clock signal delayed by 
150ns or so.  The signal to the first HV5530 has plenty of time, so the delayed 
version shouldn't cause any problems with it, and it will change the timing for 
the second HV5530 so the data will have settled to the correct value and stayed 
there for more than the minimum holding time before the clock pulse arrives.  
I'm thinking if I power a 555 from the 11V supply for the HV5530, it'll also 
act as a level translator, which will improve the clock signal voltage margin.  
Alternatively, I could use a 4504 level shifter: translating from TTL to CMOS, 
it has a high-to-low propagation delay of about 140ns.  For maximum signal 
integrity, I could run the data signal through one section, and the clock 
signal through two*, so both of them would have the best possible timing and 
voltage margins.

* You will note that this would route an 11V signal into a 5V input, but the 
4504 documentation specifically allows input signals to exceed both Vcc and 
Vdd, so this doesn't violate any specifications.

I also looked at the GPS inputs from the MAX232 (the 1PPS signal and the RX 
data signal), they're both clean.  In any case, I plan to replace all the 
electrolytic capacitors, and the 1µF electrolytic capacitors for the MAX232 
voltage charge pump will be replaced with long-life monolithic ceramic units.

- John


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