Re: [linux-sunxi] [PATCH 4/5] arm64: allwinner: h6: add EMAC device nodes

[Corentin Labbe]

On Sun, Jul 22, 2018 at 01:39:54PM +0800, Icenowy Zheng wrote:
> Allwinner H6 SoC has an EMAC like the one in A64.
> 
> Add device tree nodes for the H6 DTSI file.
> 
> Signed-off-by: Icenowy Zheng 
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 30 
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi 
> b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 3ab6cf0256ca..c65311de301a 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -149,6 +149,14 @@
>   interrupt-controller;
>   #interrupt-cells = <3>;
>  
> + ext_rgmii_pins: rgmii_pins {
> + pins = "PD0", "PD1", "PD2", "PD3", "PD4",
> +"PD5", "PD7", "PD8", "PD9", "PD10",
> +"PD11", "PD12", "PD13", "PD19", "PD20";
> + function = "emac";
> + drive-strength = <40>;
> + };
> +
>   mmc0_pins: mmc0-pins {
>   pins = "PF0", "PF1", "PF2", "PF3",
>  "PF4", "PF5";
> @@ -258,6 +266,28 @@
>   status = "disabled";
>   };
>  
> + emac: ethernet@502 {
> + compatible = "allwinner,sun50i-a64-emac",
> +  "allwinner,sun50i-h6-emac";
> + syscon = <>;
> + reg = <0x0502 0x1>;
> + interrupts = ;
> + interrupt-names = "macirq";
> + resets = < RST_BUS_EMAC>;
> + reset-names = "stmmaceth";
> + clocks = < CLK_BUS_EMAC>;
> + clock-names = "stmmaceth";
> + status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <0>;

#address-cells and #size-cells is unnecessary in emac node.

Regards

Re: [PATCH v3 net-next 00/12] net: stmmac: Clean-up and tune-up

[Corentin Labbe]

On Fri, May 18, 2018 at 03:23:44PM +0100, Jose Abreu wrote:
> Hi Corentin,
> 
> On 18-05-2018 15:12, Corentin Labbe wrote:
> > On Fri, May 18, 2018 at 02:55:57PM +0100, Jose Abreu wrote:
> >> This targets to uniformize the handling of the different GMAC versions in
> >> stmmac_main.c file and also tune-up the HW.
> >>
> >> Currently there are some if/else conditions in the main source file which
> >> calls different callbacks depending on the ID of GMAC.
> >>
> >> With the introducion of a generic HW interface handling which automatically
> >> selects the GMAC callbacks to be used, it is now unpleasant to see if
> >> conditions in the main code because this should be completely agnostic of 
> >> the
> >> GMAC version.
> >>
> >> This series removes most of these conditions. There are some if conditions
> >> that remain untouched but the callbacks handling are now uniformized.
> >>
> >> Tested in GMAC5, hope I didn't break any previous versions.
> >>
> >> Please check [1] for performance analisys of patches 3-12.
> >>
> >> ---
> >> David,
> >>
> >> This will probably generate a merge conflict with [2] (which was not merged
> >> yet). I'm waiting for Corentin input and then, if this series is merged
> >> before, I will rebase [2]. Or the other way around if you prefer :D
> >>
> >> Thanks
> >> ---
> >>
> >> Cc: David S. Miller <da...@davemloft.net>
> >> Cc: Joao Pinto <jpi...@synopsys.com>
> >> Cc: Vitor Soares <soa...@synopsys.com>
> >> Cc: Giuseppe Cavallaro <peppe.cavall...@st.com>
> >> Cc: Alexandre Torgue <alexandre.tor...@st.com>
> >>
> >> [1] 
> >> https://urldefense.proofpoint.com/v2/url?u=https-3A__marc.info_-3Fl-3Dlinux-2Dnetdev-26m-3D152656352607905-26w-3D2=DwIBAg=DPL6_X_6JkXFx7AXWqB0tg=WHDsc6kcWAl4i96Vm5hJ_19IJiuxx_p_Rzo2g-uHDKw=a7bgrSQpisaMSa5fT-je94smZ_TM7QTxNFKqkvI5Nns=Tr23Xj_UCR_PaJp8AYiy18hfhbILnsaCsKDT5_4m2z4=
> >> [2] 
> >> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.ozlabs.org_patch_915286_=DwIBAg=DPL6_X_6JkXFx7AXWqB0tg=WHDsc6kcWAl4i96Vm5hJ_19IJiuxx_p_Rzo2g-uHDKw=a7bgrSQpisaMSa5fT-je94smZ_TM7QTxNFKqkvI5Nns=Q0SV-ZR35zIJWjiaLNXqlOWchppQ2CsO-Fh-BFCjCB8=
> >>
> >> Jose Abreu (12):
> >>   net: stmmac: Enable OSP for GMAC4
> >>   net: stmmac: Do not keep rearming the coalesce timer in stmmac_xmit
> >>   net: stmmac: Let descriptor code set skbuff address
> >>   net: stmmac: Let descriptor code clear the descriptor
> >>   net: stmmac: Uniformize the use of dma_{rx/tx}_mode callbacks
> >>   net: stmmac: Remove uneeded checks for GMAC version
> >>   net: stmmac: Move PTP and MMC base address calculation to hwif.c
> >>   net: stmmac: Uniformize the use of dma_init_* callbacks
> >>   net: stmmac: Remove uneeded check for GMAC version in stmmac_xmit
> >>   net: stmmac: Uniformize set_rx_owner()
> >>   net: stmmac: Let descriptor code get skbuff address
> >>   net: stmmac: Remove if condition by taking advantage of hwif return
> >> code
> >>
> >>  drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  |   82 +---
> >>  .../net/ethernet/stmicro/stmmac/dwmac1000_dma.c|   92 ++
> >>  drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c |   35 +++--
> >>  drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c |   34 +++-
> >>  drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c   |7 +-
> >>  drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h   |1 -
> >>  drivers/net/ethernet/stmicro/stmmac/enh_desc.c |   20 ++-
> >>  drivers/net/ethernet/stmicro/stmmac/hwif.c |   34 
> >>  drivers/net/ethernet/stmicro/stmmac/hwif.h |   27 ++-
> >>  drivers/net/ethernet/stmicro/stmmac/norm_desc.c|   20 ++-
> >>  drivers/net/ethernet/stmicro/stmmac/stmmac.h   |1 +
> >>  drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  |  198 
> >> +++-
> >>  12 files changed, 323 insertions(+), 228 deletions(-)
> >>
> >>
> > Hello
> >
> > You didnt have put in CC linux-ker...@vger.kernel.org as required by 
> > get_maintener.pl letting more people to see this series.
> > Since this series touch dwmac-sun8i.c you should have also added Chen-Yu 
> > Tsai/Maxime Ripard (as also asked by get_maintainer).
> 
> Usually I just cc according to MAINTAINERS file but thanks for
> noticing. Added in cc now.
> 

./scripts/get_maintainer.pl does this for you (and it use MAINTAINERS).
You have to use it at least, since it handle regex that could be easily unseen 
like for dwmac-sun8i.

Re: [PATCH net-next] net: stmmac: Populate missing callbacks in HWIF initialization

[Corentin Labbe]

On Thu, May 17, 2018 at 10:57:28AM +0100, Jose Abreu wrote:
> Some HW specific setusp, like sun8i, do not populate all the necessary
> callbacks, which is what HWIF helpers were expecting.
> 
> Fix this by always trying to get the generic helpers and populate them
> if they were not previously populated by HW specific setup.
> 
> Signed-off-by: Jose Abreu <joab...@synopsys.com>
> Fixes: 5f0456b43140 ("net: stmmac: Implement logic to automatically
> select HW Interface")
> Reported-by: Corentin Labbe <clabbe.montj...@gmail.com>
> Cc: Corentin Labbe <clabbe.montj...@gmail.com>
> Cc: David S. Miller <da...@davemloft.net>
> Cc: Joao Pinto <jpi...@synopsys.com>
> Cc: Giuseppe Cavallaro <peppe.cavall...@st.com>
> Cc: Alexandre Torgue <alexandre.tor...@st.com>
> ---
> Hi Corentin,
> 
> Please check if this patch makes sun8i work again.
> 
> Thanks and Best Regards,
> Jose Miguel Abreu
> ---

Hello

Tested-by: Corentin Labbe <clabbe.montj...@gmail.com>

Thanks for the quick fix.

Note that this patch conflict with your next v3 serie

Regards

Re: [PATCH v3 net-next 00/12] net: stmmac: Clean-up and tune-up

[Corentin Labbe]

On Fri, May 18, 2018 at 02:55:57PM +0100, Jose Abreu wrote:
> This targets to uniformize the handling of the different GMAC versions in
> stmmac_main.c file and also tune-up the HW.
> 
> Currently there are some if/else conditions in the main source file which
> calls different callbacks depending on the ID of GMAC.
> 
> With the introducion of a generic HW interface handling which automatically
> selects the GMAC callbacks to be used, it is now unpleasant to see if
> conditions in the main code because this should be completely agnostic of the
> GMAC version.
> 
> This series removes most of these conditions. There are some if conditions
> that remain untouched but the callbacks handling are now uniformized.
> 
> Tested in GMAC5, hope I didn't break any previous versions.
> 
> Please check [1] for performance analisys of patches 3-12.
> 
> ---
> David,
> 
> This will probably generate a merge conflict with [2] (which was not merged
> yet). I'm waiting for Corentin input and then, if this series is merged
> before, I will rebase [2]. Or the other way around if you prefer :D
> 
> Thanks
> ---
> 
> Cc: David S. Miller 
> Cc: Joao Pinto 
> Cc: Vitor Soares 
> Cc: Giuseppe Cavallaro 
> Cc: Alexandre Torgue 
> 
> [1] https://marc.info/?l=linux-netdev=152656352607905=2
> [2] https://patchwork.ozlabs.org/patch/915286/
> 
> Jose Abreu (12):
>   net: stmmac: Enable OSP for GMAC4
>   net: stmmac: Do not keep rearming the coalesce timer in stmmac_xmit
>   net: stmmac: Let descriptor code set skbuff address
>   net: stmmac: Let descriptor code clear the descriptor
>   net: stmmac: Uniformize the use of dma_{rx/tx}_mode callbacks
>   net: stmmac: Remove uneeded checks for GMAC version
>   net: stmmac: Move PTP and MMC base address calculation to hwif.c
>   net: stmmac: Uniformize the use of dma_init_* callbacks
>   net: stmmac: Remove uneeded check for GMAC version in stmmac_xmit
>   net: stmmac: Uniformize set_rx_owner()
>   net: stmmac: Let descriptor code get skbuff address
>   net: stmmac: Remove if condition by taking advantage of hwif return
> code
> 
>  drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  |   82 +---
>  .../net/ethernet/stmicro/stmmac/dwmac1000_dma.c|   92 ++
>  drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c |   35 +++--
>  drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c |   34 +++-
>  drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c   |7 +-
>  drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h   |1 -
>  drivers/net/ethernet/stmicro/stmmac/enh_desc.c |   20 ++-
>  drivers/net/ethernet/stmicro/stmmac/hwif.c |   34 
>  drivers/net/ethernet/stmicro/stmmac/hwif.h |   27 ++-
>  drivers/net/ethernet/stmicro/stmmac/norm_desc.c|   20 ++-
>  drivers/net/ethernet/stmicro/stmmac/stmmac.h   |1 +
>  drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  |  198 
> +++-
>  12 files changed, 323 insertions(+), 228 deletions(-)
> 
> 

Hello

You didnt have put in CC linux-ker...@vger.kernel.org as required by 
get_maintener.pl letting more people to see this series.
Since this series touch dwmac-sun8i.c you should have also added Chen-Yu 
Tsai/Maxime Ripard (as also asked by get_maintainer).

Regards

[BUG] net: stmmac: dwmac-sun8i broken in linux-next

[Corentin Labbe]

Hello

The dwmac-sun8i driver is broken in next-20180515, symptom are no RX and TX 
errors as shown by ifconfig:
eth0: flags=4163  mtu 1500
inet 192.168.1.204  netmask 255.255.255.0  broadcast 192.168.1.255
ether 96:75:ff:0d:f6:d8  txqueuelen 1000  (Ethernet)
RX packets 0  bytes 0 (0.0 B)
RX errors 0  dropped 0  overruns 0  frame 0
TX packets 0  bytes 4956 (4.8 KiB)
TX errors 118  dropped 0 overruns 0  carrier 0  collisions 0

Reverting the following commit made the driver working:
4dbbe8dde8485b89bce8bbbe7564337fd7eed69f ("net: stmmac: Add support for U32 TC 
filter using Flexible RX Parser")
5f0456b43140af9413397cc11d03d18b9f2fc2fc ("net: stmmac: Implement logic to 
automatically select HW Interface")

Note that reverting only 4dbbe8dde8485b89bce8bbbe7564337fd7eed69f lead to crash:
[   31.385110] Backtrace: 
[   31.387576] [] (stmmac_open) from [] 
(__dev_open+0xe4/0x180)
[   31.394972]  r10:ed447d04 r9:edc5d010 r8:ef02002c r7:c08670a4 r6: 
r5:c0c08488
[   31.402793]  r4:ef02
[   31.405335] [] (__dev_open) from [] 
(__dev_change_flags+0x190/0x1e8)
[   31.413421]  r8:1002 r7:c0c08488 r6:1003 r5:0001 r4:ef02
[   31.420122] [] (__dev_change_flags) from [] 
(dev_change_flags+0x20/0x50)
[   31.428555]  r9:edc5d010 r8:ed447c18 r7:ef020134 r6: r5:1002 
r4:ef02
[   31.436300] [] (dev_change_flags) from [] 
(do_setlink+0x28c/0xbdc)
[   31.444213]  r9:edc5d010 r8:ed447c18 r7: r6:c0c08488 r5:ed447b50 
r4:ef02
[   31.451955] [] (do_setlink) from [] 
(rtnl_newlink+0x54c/0x7a8)
[   31.459522]  r10:ed447d04 r9: r8: r7: r6: 
r5:
[   31.467343]  r4:ef02
[   31.469885] [] (rtnl_newlink) from [] 
(rtnetlink_rcv_msg+0x38c/0x544)
[   31.478058]  r10:ed447d04 r9: r8:ee242840 r7: r6:edc5d000 
r5:c0c08488
[   31.485879]  r4:
[   31.488422] [] (rtnetlink_rcv_msg) from [] 
(netlink_rcv_skb+0xc0/0x118)
[   31.496768]  r10:c0c08488 r9: r8:0020 r7:edc5d000 r6:c064466c 
r5:c0c08488
[   31.504589]  r4:ee242840
[   31.507129] [] (netlink_rcv_skb) from [] 
(rtnetlink_rcv+0x18/0x1c)
[   31.515042]  r8:ed447d60 r7:ee242840 r6:0020 r5:ee37d800 r4:ee5fac00
[   31.521742] [] (rtnetlink_rcv) from [] 
(netlink_unicast+0x190/0x1fc)
[   31.529829] [] (netlink_unicast) from [] 
(netlink_sendmsg+0x3cc/0x410)
[   31.538089]  r10: r9:0020 r8:014000c0 r7:ee242840 r6:ee37d800 
r5:c0c08488
[   31.545910]  r4:ed447f44
[   31.548452] [] (netlink_sendmsg) from [] 
(sock_sendmsg+0x1c/0x2c)
[   31.556279]  r10: r9:ed447edc r8: r7:eefce640 r6: 
r5:c0c08488
[   31.564100]  r4:ed447f44
[   31.566640] [] (sock_sendmsg) from [] 
(___sys_sendmsg+0x250/0x264)
[   31.574555] [] (___sys_sendmsg) from [] 
(__sys_sendmsg+0x58/0x94)
[   31.582382]  r10: r9:ed446000 r8:c01011c4 r7:eefce640 r6: 
r5:bec25150
[   31.590203]  r4:c0c08488
[   31.592743] [] (__sys_sendmsg) from [] 
(sys_sendmsg+0x14/0x18)
[   31.600307]  r7:0128 r6:bec2d17c r5:bec25144 r4:00093ee0
[   31.605969] [] (sys_sendmsg) from [] 
(ret_fast_syscall+0x0/0x28)
[   31.613704] Exception stack(0xed447fa8 to 0xed447ff0)
[   31.618756] 7fa0:   00093ee0 bec25144 0003 bec25150 
 85ce
[   31.626929] 7fc0: 00093ee0 bec25144 bec2d17c 0128 000942a8 5afc783a 
00094000 bec25150
[   31.635099] 7fe0:  bec250f0 012c b6e10b5c
[   31.640152] Code: e59a261c e59a013c e50b306c e592300c (e593300c) 
[   31.646632] ---[ end trace 407964b7deb937bf ]---

For the moment, I stil didnt find the issue.
What to we do now ? do you want that I send revert patchs ?

Regards

[PATCH] net: ethernet: i40e: remove i40e_fcoe files

[Corentin Labbe]

i40e_fcoe support was removed via commit 9eed69a9147c ("i40e: Drop FCoE code 
from core driver files")
But this left files in place but uncompilable.
Let's finish the cleaning.

Signed-off-by: Corentin Labbe <cla...@baylibre.com>
---
 drivers/net/ethernet/intel/i40e/i40e_fcoe.c | 1571 ---
 drivers/net/ethernet/intel/i40e/i40e_fcoe.h |  127 ---
 2 files changed, 1698 deletions(-)
 delete mode 100644 drivers/net/ethernet/intel/i40e/i40e_fcoe.c
 delete mode 100644 drivers/net/ethernet/intel/i40e/i40e_fcoe.h

diff --git a/drivers/net/ethernet/intel/i40e/i40e_fcoe.c 
b/drivers/net/ethernet/intel/i40e/i40e_fcoe.c
deleted file mode 100644
index 2d1253c5b7a1..
--- a/drivers/net/ethernet/intel/i40e/i40e_fcoe.c
+++ /dev/null
@@ -1,1571 +0,0 @@
-/***
- *
- * Intel Ethernet Controller XL710 Family Linux Driver
- * Copyright(c) 2013 - 2016 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program.  If not, see <http://www.gnu.org/licenses/>.
- *
- * The full GNU General Public License is included in this distribution in
- * the file called "COPYING".
- *
- * Contact Information:
- * e1000-devel Mailing List <e1000-de...@lists.sourceforge.net>
- * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
- *
- 
**/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#include "i40e.h"
-#include "i40e_fcoe.h"
-
-/**
- * i40e_fcoe_sof_is_class2 - returns true if this is a FC Class 2 SOF
- * @sof: the FCoE start of frame delimiter
- **/
-static inline bool i40e_fcoe_sof_is_class2(u8 sof)
-{
-   return (sof == FC_SOF_I2) || (sof == FC_SOF_N2);
-}
-
-/**
- * i40e_fcoe_sof_is_class3 - returns true if this is a FC Class 3 SOF
- * @sof: the FCoE start of frame delimiter
- **/
-static inline bool i40e_fcoe_sof_is_class3(u8 sof)
-{
-   return (sof == FC_SOF_I3) || (sof == FC_SOF_N3);
-}
-
-/**
- * i40e_fcoe_sof_is_supported - returns true if the FC SOF is supported by HW
- * @sof: the input SOF value from the frame
- **/
-static inline bool i40e_fcoe_sof_is_supported(u8 sof)
-{
-   return i40e_fcoe_sof_is_class2(sof) ||
-  i40e_fcoe_sof_is_class3(sof);
-}
-
-/**
- * i40e_fcoe_fc_sof - pull the SOF from FCoE header in the frame
- * @skb: the frame whose EOF is to be pulled from
- **/
-static inline int i40e_fcoe_fc_sof(struct sk_buff *skb, u8 *sof)
-{
-   *sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
-
-   if (!i40e_fcoe_sof_is_supported(*sof))
-   return -EINVAL;
-   return 0;
-}
-
-/**
- * i40e_fcoe_eof_is_supported - returns true if the EOF is supported by HW
- * @eof: the input EOF value from the frame
- **/
-static inline bool i40e_fcoe_eof_is_supported(u8 eof)
-{
-   return (eof == FC_EOF_N) || (eof == FC_EOF_T) ||
-  (eof == FC_EOF_NI) || (eof == FC_EOF_A);
-}
-
-/**
- * i40e_fcoe_fc_eof - pull EOF from FCoE trailer in the frame
- * @skb: the frame whose EOF is to be pulled from
- **/
-static inline int i40e_fcoe_fc_eof(struct sk_buff *skb, u8 *eof)
-{
-   /* the first byte of the last dword is EOF */
-   skb_copy_bits(skb, skb->len - 4, eof, 1);
-
-   if (!i40e_fcoe_eof_is_supported(*eof))
-   return -EINVAL;
-   return 0;
-}
-
-/**
- * i40e_fcoe_ctxt_eof - convert input FC EOF for descriptor programming
- * @eof: the input eof value from the frame
- *
- * The FC EOF is converted to the value understood by HW for descriptor
- * programming. Never call this w/o calling i40e_fcoe_eof_is_supported()
- * first and that already checks for all supported valid eof values.
- **/
-static inline u32 i40e_fcoe_ctxt_eof(u8 eof)
-{
-   switch (eof) {
-   case FC_EOF_N:
-   return I40E_TX_DESC_CMD_L4T_EOFT_EOF_N;
-   case FC_EOF_T:
-   return I40E_TX_DESC_CMD_L4T_EOFT_EOF_T;
-   case FC_EOF_NI:
-   return I40E_TX_DESC_CMD_L4T_EOFT_EOF_NI;
-   case FC_EOF_A:
-   return I40E_TX_DESC_CMD_L4T_EOFT_EOF_A;
-   default:
-   /* Supported valid eof shall be already checked by
-* calling i40e_fcoe_eof_is_supported() first,
-* therefore this default case shall never hit.
- 

Re: [PATCH] net: stmmac: dwmac-sun8i: fix allwinner,leds-active-low handling

[Corentin Labbe]

On Tue, Nov 28, 2017 at 06:38:26PM +0100, Andrew Lunn wrote:
> On Tue, Nov 28, 2017 at 05:48:22PM +0100, Corentin Labbe wrote:
> > The driver expect "allwinner,leds-active-low" to be in PHY node, but
> > the binding doc expect it to be in MAC node.
> > 
> > Since all board DT use it also in MAC node, the driver need to search
> > allwinner,leds-active-low in MAC node.
> 
> Hi Corentin
> 
> I'm having trouble working out how this worked before. This is code
> you moved around, when adding external/internal MDIOs. But the very
> first version of this driver code used priv->plat->phy_node. Did that
> somehow point to the MAC node when the internal PHY is used? Or has it
> been broken all the time?
> 

Hello

Since this feature control only when the activity LED need to blink, nobody see 
that it was broken.
It is indepedant of other internal PHY stuff.

Regards

[PATCH] net: stmmac: dwmac-sun8i: fix allwinner,leds-active-low handling

[Corentin Labbe]

The driver expect "allwinner,leds-active-low" to be in PHY node, but
the binding doc expect it to be in MAC node.

Since all board DT use it also in MAC node, the driver need to search
allwinner,leds-active-low in MAC node.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index e5ff734d4f9b..9eb7f65d8000 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -808,8 +808,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
 val, reg);
 
if (gmac->variant->soc_has_internal_phy) {
-   if (of_property_read_bool(priv->plat->phy_node,
- "allwinner,leds-active-low"))
+   if (of_property_read_bool(node, "allwinner,leds-active-low"))
reg |= H3_EPHY_LED_POL;
else
reg &= ~H3_EPHY_LED_POL;
-- 
2.13.6

[PATCH v10 1/8] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
binding")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+   "allwinner,sun8i-a83t-emac"
+   "allwinner,sun8i-h3-emac"
+   "allwinner,sun8i-v3s-emac"
+   "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+  - allwinner,sun8i-h3-system-controller
+  - allwinner,sun8i-v3s-system-controller
+  - allwinner,sun50i-a64-system-controller
+  - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+};
-- 
2.13.6

[PATCH v10 0/8] net: stmmac: dwmac-sun8i: Handle integrated PHY

[Corentin Labbe]

Hello

The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.

This patchs series adds a new way to handle this problem via a mdio-mux.

The first try was to create a new MDIO mux "mdio-mux-syscon".
mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception
that the register is used via syscon/regmap.
But this solution does not work for two reason:
- changing the MDIO selection need the reset of MAC which cannot be done by the
mdio-mux-syscon driver
- There were driver loading order problem:
- mdio-mux-syscon needing that stmmac register the parent MDIO
- stmmac needing that child MDIO was registered just after registering 
parent MDIO

So we cannot use any external MDIO-mux.

The final solution was to represent the mdio-mux in MAC node and let the MAC 
handle all things.

Since DT bits was reverted in 4.13, this patch series include the revert of the 
revert.

I have let patch splited for easy review. (for seeing what's new)
But the final serie could have some patch squashed if someone want.
Like squashing patch and 1 and 2 (documentation)

All patchs should go via the sunxi tree

Regards

Changes since v9:
- added a line before mdio-parent-bus
- removed mdio-mux compatible from doc
- fix arm prefix uppercase
- splitted changes between A64 and H5
- removed already merge patchs for net

Changes since v8:
- added reference to mdio-mux.txt in documentation
- removed compatible mdio-mux
- added mdio-parent-bus

Changes since v7:
- moved mdio-mux ouf of mdio as asked by Andrew Lunn
- reordered patchs order

Changes since v6:
- renamed external mdio to "external_mdio"
- added compatible to mdio-mux and internal-mdio
- removed usage of phy-is-integrated
- renamed do_not_scan to compatible_muxes (patch 10)
- patch 8 9 of v6 are squashed

Changes since v5:
- reordered patch 1 and 2
- mdio-mux node is now a mdio's child
- added patch 11 for removing unnecessary scan of mdio-mux

Changes since v4:
- Update documentation for new bindings
- Added 4 patchs for bring back reverted stuff of 4.13
- dwmac-sun8i now handle mdio-mux
- MDIO use now compatible = "snps,dwmac-mdio";

Changes since v3:
- Added a patch for handling fixed-link
- Updated documentation

Changes since v2:
- Add a MDIO mux for creating distinction between integrated and external MDIO.
- phy-is-integrated is not set in dtsi.

Changes since v1:
- Dropped phy-is-integrated documentation patch since another same patch was 
already merged
- Moved phy-is-integrated from SoC dtsi to final board DT.

Corentin Labbe (8):
  dt-bindings: net: Restore sun8i dwmac binding
  dt-bindings: net: dwmac-sun8i: update documentation about integrated
PHY
  arm: dts: sunxi: h3/h5: Restore EMAC changes
  ARM: dts: sunxi: h3/h5: represent the mdio switch used by
sun8i-h3-emac
  ARM: dts: sunxi: Restore EMAC changes (boards)
  arm64: dts: allwinner: A64: Restore EMAC changes
  arm64: dts: allwinner: H5: Restore EMAC changes
  arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

 .../devicetree/bindings/net/dwmac-sun8i.txt| 207 +
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts  |   9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts|  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts  |  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts  |   7 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts  |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts|   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts|   5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts   |  22 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts |  16 ++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi |  49 +
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  16 ++
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  15 ++
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  17 ++
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts  |  16 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi  |  21 +++
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts   |  17 ++
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  |  17 ++
 .../dts/allwinner/sun50i-h5-orangepi-prime.dts |  17 ++
 20 files changed, 513 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

-- 
2.13.6

[PATCH v10 2/8] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 147 +++--
 1 file changed, 135 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..3d6d5fa0c4d5 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
 Please see stmmac.txt for the other unchanged properties.
 
 Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
 - reg: address and length of the register for the device.
 - interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
 - clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
 - resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
 - phy-mode: See ethernet.txt
 - phy-handle: See ethernet.txt
 - #address-cells: shall be 1
@@ -39,23 +39,42 @@ Optional properties for the following compatibles:
 - allwinner,leds-active-low: EPHY LEDs are active low
 
 Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
 
 Required properties of the mdio node:
 - #address-cells: shall be 1
 - #size-cells: shall be 0
 
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
 of the mdio node. See phy.txt for the generic PHY bindings.
 
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the emac node have a mdio-mux child
+node called "mdio-mux":
+  - "allwinner,sun8i-h3-emac"
+  - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+  - compatible = "allwinner,sun8i-h3-mdio-mux"
+  - mdio-parent-bus: a phandle to EMAC mdio
+  - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+  - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
   - "allwinner,sun8i-h3-emac",
   - "allwinner,sun8i-v3s-emac":
+
+Additional information regarding generic multiplexer properties can be found
+at Documentation/devicetree/bindings/net/mdio-mux.txt
+
+Required properties of the integrated phy node:
 - clocks: a phandle to the reference clock for the EPHY
 - resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
 
-Example:
-
+Example with integrated PHY:
 emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <>;
@@ -72,13 +91,117 @@ emac: ethernet@1c0b000 {
phy-handle = <_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mdio-parent-bus = <>;
+
+   int_mdio: mdio@1 {
+   compatible = "allwinner,sun8i-h3-mdio-internal";
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   

[PATCH v10 3/8] arm: dts: sunxi: h3/h5: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c1bd09dab3da..d762098fc589 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -408,6 +408,32 @@
clocks = <>;
};
 
+   emac: ethernet@1c3 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c3 0x1>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+   };
+
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
-- 
2.13.6

[PATCH v10 6/8] arm64: dts: allwinner: A64: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore arm64 DT about dwmac-sun8i for A64
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
 5 files changed, 84 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -69,6 +70,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
 
/* TODO: Camera, touchscreen, etc. */
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
serial2 = 
@@ -71,6 +72,15 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rmii";
+   phy-handle = <_rmii_phy1>;
+   status = "okay";
+
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rmii_phy1: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
 "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -76,6 +77,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 

[PATCH v10 5/8] ARM: dts: sunxi: Restore EMAC changes (boards)

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 
 10 files changed, 121 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
aliases {
serial0 = 
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -102,6 +104,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -111,6 +112,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <7>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -117,6 +118,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = &

[PATCH v10 7/8] arm64: dts: allwinner: H5: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore arm64 DT about dwmac-sun8i for H5
This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
 .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +
 3 files changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 1c2387bd5df6..6eb8092d8e57 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -50,6 +50,7 @@
compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -108,6 +109,22 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@7 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <7>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 4f77c8470f6c..a0ca925175aa 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -59,6 +59,7 @@
};
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -136,6 +137,22 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 6be06873e5af..b47790650144 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -54,6 +54,7 @@
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -143,6 +144,22 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
-- 
2.13.6

[PATCH v10 8/8] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
 
mdio: mdio {
+   compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
-- 
2.13.6

[PATCH v10 4/8] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Florian Fainelli <f.faine...@gmail.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++
 1 file changed, 27 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..408df33e947b 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -425,11 +425,34 @@
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   mdio-parent-bus = <>;
+   /* Only one MDIO is usable at the time */
+   internal_mdio: mdio@1 {
+   compatible = 
"allwinner,sun8i-h3-mdio-internal";
reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+
+   external_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
};
};
};
-- 
2.13.6

Re: [PATCH v9 06/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

On Fri, Oct 27, 2017 at 05:11:14PM +0200, Maxime Ripard wrote:
> On Tue, Oct 24, 2017 at 07:57:10PM +0200, Corentin Labbe wrote:
> > The original dwmac-sun8i DT bindings have some issue on how to handle
> > integrated PHY and was reverted in last RC of 4.13.
> > But now we have a solution so we need to get back that was reverted.
> > 
> > This patch restore arm64 DT about dwmac-sun8i
> > This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC 
> > changes")
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
> >  .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
> >  .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
> >  arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
> >  .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
> >  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
> > 
> >  .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
> >  .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
> >  .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +
> >  8 files changed, 135 insertions(+)
> 
> Can you split the changes between the A64 and the H5? It's going to be
> difficult to merge otherwise.
> 
> (You also forgot to add Florian's Acked-by on your whole serie).
> 

Will do

Thanks
Regards

Re: [PATCH v9 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Fri, Oct 27, 2017 at 09:37:10AM -0500, Rob Herring wrote:
> On Tue, Oct 24, 2017 at 07:57:06PM +0200, Corentin Labbe wrote:
> > This patch add documentation about the MDIO switch used on sun8i-h3-emac
> > for integrated PHY.
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
> >  .../devicetree/bindings/net/dwmac-sun8i.txt| 145 
> > +++--
> >  1 file changed, 133 insertions(+), 12 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
> > b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > index 725f3b187886..2600ce9ad3cc 100644
> > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > @@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
> >  Please see stmmac.txt for the other unchanged properties.
> >  
> >  Required properties:
> > -- compatible: should be one of the following string:
> > +- compatible: must be one of the following string:
> > "allwinner,sun8i-a83t-emac"
> > "allwinner,sun8i-h3-emac"
> > "allwinner,sun8i-v3s-emac"
> > "allwinner,sun50i-a64-emac"
> >  - reg: address and length of the register for the device.
> >  - interrupts: interrupt for the device
> > -- interrupt-names: should be "macirq"
> > +- interrupt-names: must be "macirq"
> >  - clocks: A phandle to the reference clock for this device
> > -- clock-names: should be "stmmaceth"
> > +- clock-names: must be "stmmaceth"
> >  - resets: A phandle to the reset control for this device
> > -- reset-names: should be "stmmaceth"
> > +- reset-names: must be "stmmaceth"
> >  - phy-mode: See ethernet.txt
> >  - phy-handle: See ethernet.txt
> >  - #address-cells: shall be 1
> > @@ -39,23 +39,42 @@ Optional properties for the following compatibles:
> >  - allwinner,leds-active-low: EPHY LEDs are active low
> >  
> >  Required child node of emac:
> > -- mdio bus node: should be named mdio
> > +- mdio bus node: with compatible "snps,dwmac-mdio"
> 
> It should still be named mdio.
> 
> >  
> >  Required properties of the mdio node:
> >  - #address-cells: shall be 1
> >  - #size-cells: shall be 0
> >  
> > -The device node referenced by "phy" or "phy-handle" should be a child node
> > +The device node referenced by "phy" or "phy-handle" must be a child node
> >  of the mdio node. See phy.txt for the generic PHY bindings.
> >  
> > -Required properties of the phy node with the following compatibles:
> > +The following compatibles require that the emac node have a mdio-mux child
> > +node called "mdio-mux":
> > +  - "allwinner,sun8i-h3-emac"
> > +  - "allwinner,sun8i-v3s-emac":
> > +Required properties for the mdio-mux node:
> > +  - compatible = "allwinner,sun8i-h3-mdio-mux"
> > +  - mdio-parent-bus: a phandle to EMAC mdio
> > +  - one child mdio for the integrated mdio with the compatible
> > +"allwinner,sun8i-h3-mdio-internal"
> > +  - one child mdio for the external mdio if present (V3s have none)
> > +Required properties for the mdio-mux children node:
> > +  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
> > +
> > +The following compatibles require a PHY node representing the integrated
> > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:
> >- "allwinner,sun8i-h3-emac",
> >- "allwinner,sun8i-v3s-emac":
> > +
> > +Additional information regarding generic multiplexer properties can be 
> > found
> > +at Documentation/devicetree/bindings/net/mdio-mux.txt
> > +
> > +Required properties of the integrated phy node:
> >  - clocks: a phandle to the reference clock for the EPHY
> >  - resets: a phandle to the reset control for the EPHY
> > +- Must be a child of the integrated mdio
> >  
> > -Example:
> > -
> > +Example with integrated PHY:
> >  emac: ethernet@1c0b000 {
> > compatible = "allwinner,sun8i-h3-emac";
> > syscon = <>;
> > @@ -72,13 +91,115 @@ emac: ethernet@1c0b000 {
> > phy-handle = <_mii_phy>;
> > phy-mode = "mii";
> > allwinner,leds-active-low;
> > +
> > +   mdio0: mdio {
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   compatible = "snps,dwmac-mdio";
> > +   };
> > +
> > +   mdio-mux {
> > +   compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
> 
> Drop mdio-mux.
> 
> With those fixed,
> 
> Acked-by: Rob Herring <r...@kernel.org>

Will change what you ask.

Thanks
Regards

Re: [PATCH v7 10/10] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

[Corentin Labbe]

On Tue, Oct 24, 2017 at 01:46:54PM -0500, Rob Herring wrote:
> On Wed, Oct 18, 2017 at 01:44:58PM +0200, Corentin Labbe wrote:
> > Each child node of an MDIO node is scanned as a PHY when calling
> > of_mdiobus_register() givint the following result:
> > [   18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has 
> > invalid PHY address
> > [   18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0
> > [   18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1
> > [...]
> > [   18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30
> > [   18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31
> > 
> > Since mdio-mux nodes are not PHY, this patch a way to to not scan
> > them.
> 
> This can be dropped now, right?

Yes and it is dropped in my two last serie.
Forgot to said it in changelog

[PATCH v9 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY

[Corentin Labbe]

Hello

The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.

This patchs series adds a new way to handle this problem via a mdio-mux.

The first try was to create a new MDIO mux "mdio-mux-syscon".
mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception
that the register is used via syscon/regmap.
But this solution does not work for two reason:
- changing the MDIO selection need the reset of MAC which cannot be done by the
mdio-mux-syscon driver
- There were driver loading order problem:
- mdio-mux-syscon needing that stmmac register the parent MDIO
- stmmac needing that child MDIO was registered just after registering 
parent MDIO

So we cannot use any external MDIO-mux.

The final solution was to represent the mdio-mux in MAC node and let the MAC 
handle all things.

Since DT bits was reverted in 4.13, this patch series include the revert of the 
revert.

I have let patch splited for easy review. (for seeing what's new)
But the final serie could have some patch squashed if someone want.
Like squashing patch and 1 and 2 (documentation)

The first 7 patch should go via the sunxi tree, the last three via the net tree.

Regards

Changes since v8:
- added reference to mdio-mux.txt in documentation
- removed compatible mdio-mux
- added mdio-parent-bus

Changes since v7:
- moved mdio-mux ouf of mdio as asked by Andrew Lunn
- reordered patchs order

Changes since v6:
- renamed external mdio to "external_mdio"
- added compatible to mdio-mux and internal-mdio
- removed usage of phy-is-integrated
- renamed do_not_scan to compatible_muxes (patch 10)
- patch 8 9 of v6 are squashed

Changes since v5:
- reordered patch 1 and 2
- mdio-mux node is now a mdio's child
- added patch 11 for removing unnecessary scan of mdio-mux

Changes since v4:
- Update documentation for new bindings
- Added 4 patchs for bring back reverted stuff of 4.13
- dwmac-sun8i now handle mdio-mux
- MDIO use now compatible = "snps,dwmac-mdio";

Changes since v3:
- Added a patch for handling fixed-link
- Updated documentation

Changes since v2:
- Add a MDIO mux for creating distinction between integrated and external MDIO.
- phy-is-integrated is not set in dtsi.

Changes since v1:
- Dropped phy-is-integrated documentation patch since another same patch was 
already merged
- Moved phy-is-integrated from SoC dtsi to final board DT.

Acked-by: Florian Fainelli <f.faine...@gmail.com>

Corentin Labbe (10):
  dt-bindings: net: Restore sun8i dwmac binding
  dt-bindings: net: dwmac-sun8i: update documentation about integrated
PHY
  arm: dts: sunxi: h3/h5: Restore EMAC changes
  arm: dts: sunxi: h3/h5: represent the mdio switch used by
sun8i-h3-emac
  arm: dts: sunxi: Restore EMAC changes (boards)
  arm64: dts: allwinner: Restore EMAC changes
  arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
  net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
  net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
  net: stmmac: sun8i: Restore the compatibles

 .../devicetree/bindings/net/dwmac-sun8i.txt| 205 
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts  |   9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts|  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts  |  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts  |   7 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts  |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts|   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts|   5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts   |  22 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts |  16 +
 arch/arm/boot/dts/sunxi-h3-h5.dtsi |  48 +++
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  16 +
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  15 +
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts  |  16 +
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi  |  21 ++
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts   |  17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  |  17 +
 .../dts/allwinner/sun50i-h5-orangepi-prime.dts |  17 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  | 361 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   4 -
 23 files changed, 742 insertions(+), 134 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

-- 
2.13.6

[PATCH v9 01/10] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
binding")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+   "allwinner,sun8i-a83t-emac"
+   "allwinner,sun8i-h3-emac"
+   "allwinner,sun8i-v3s-emac"
+   "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+  - allwinner,sun8i-h3-system-controller
+  - allwinner,sun8i-v3s-system-controller
+  - allwinner,sun50i-a64-system-controller
+  - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+};
-- 
2.13.6

[PATCH v9 05/10] arm: dts: sunxi: Restore EMAC changes (boards)

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 
 10 files changed, 121 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
aliases {
serial0 = 
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -102,6 +104,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -111,6 +112,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <7>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -117,6 +118,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+  

[PATCH v9 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 145 +++--
 1 file changed, 133 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..2600ce9ad3cc 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
 Please see stmmac.txt for the other unchanged properties.
 
 Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
 - reg: address and length of the register for the device.
 - interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
 - clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
 - resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
 - phy-mode: See ethernet.txt
 - phy-handle: See ethernet.txt
 - #address-cells: shall be 1
@@ -39,23 +39,42 @@ Optional properties for the following compatibles:
 - allwinner,leds-active-low: EPHY LEDs are active low
 
 Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: with compatible "snps,dwmac-mdio"
 
 Required properties of the mdio node:
 - #address-cells: shall be 1
 - #size-cells: shall be 0
 
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
 of the mdio node. See phy.txt for the generic PHY bindings.
 
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the emac node have a mdio-mux child
+node called "mdio-mux":
+  - "allwinner,sun8i-h3-emac"
+  - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+  - compatible = "allwinner,sun8i-h3-mdio-mux"
+  - mdio-parent-bus: a phandle to EMAC mdio
+  - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+  - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
   - "allwinner,sun8i-h3-emac",
   - "allwinner,sun8i-v3s-emac":
+
+Additional information regarding generic multiplexer properties can be found
+at Documentation/devicetree/bindings/net/mdio-mux.txt
+
+Required properties of the integrated phy node:
 - clocks: a phandle to the reference clock for the EPHY
 - resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
 
-Example:
-
+Example with integrated PHY:
 emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <>;
@@ -72,13 +91,115 @@ emac: ethernet@1c0b000 {
phy-handle = <_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+   mdio0: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   mdio-parent-bus = <>;
+
+   int_mdio: mdio@1 {
+   compatible = "allwinner,sun8i-h3-mdio-internal";
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   ext_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+  

[PATCH v9 07/10] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
 
mdio: mdio {
+   compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
-- 
2.13.6

[PATCH v9 06/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +
 8 files changed, 135 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -69,6 +70,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
 
/* TODO: Camera, touchscreen, etc. */
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
serial2 = 
@@ -71,6 +72,15 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rmii";
+   phy-handle = <_rmii_phy1>;
+   status = "okay";
+
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rmii_phy1: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
 "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -76,6 +77,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+ 

[PATCH v9 04/10] arm: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 32 +++-
 1 file changed, 27 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..0e97df490aba 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,36 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   mdio-parent-bus = <>;
+   /* Only one MDIO is usable at the time */
+   internal_mdio: mdio@1 {
+   compatible = 
"allwinner,sun8i-h3-mdio-internal";
reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+
+   external_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
};
};
};
-- 
2.13.6

[PATCH v9 08/10] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 8a280b48e3a9..9e616da0745d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
-   { .compatible = "allwinner,sun8i-a83t-emac" },
-   { .compatible = "allwinner,sun8i-h3-emac" },
-   { .compatible = "allwinner,sun8i-v3s-emac" },
-   { .compatible = "allwinner,sun50i-a64-emac" },
{},
};
 
-- 
2.13.6

[PATCH v9 10/10] net: stmmac: sun8i: Restore the compatibles

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index b3eb344bb158..e5ff734d4f9b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -1072,6 +1072,14 @@ return ret;
 }
 
 static const struct of_device_id sun8i_dwmac_match[] = {
+   { .compatible = "allwinner,sun8i-h3-emac",
+   .data = _variant_h3 },
+   { .compatible = "allwinner,sun8i-v3s-emac",
+   .data = _variant_v3s },
+   { .compatible = "allwinner,sun8i-a83t-emac",
+   .data = _variant_a83t },
+   { .compatible = "allwinner,sun50i-a64-emac",
+   .data = _variant_a64 },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.13.6

[PATCH v9 09/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.

This patch implement this MDIO switch via a custom MDIO-mux.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++
 2 files changed, 224 insertions(+), 130 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+   select MDIO_BUS_MUX
---help---
  Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..b3eb344bb158 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -41,14 +42,14 @@
  * This value is used for disabling properly EMAC
  * and used as a good starting value in case of the
  * boot process(uboot) leave some stuff.
- * @internal_phy:  Does the MAC embed an internal PHY
+ * @soc_has_internal_phy:  Does the MAC embed an internal PHY
  * @support_mii:   Does the MAC handle MII
  * @support_rmii:  Does the MAC handle RMII
  * @support_rgmii: Does the MAC handle RGMII
  */
 struct emac_variant {
u32 default_syscon_value;
-   int internal_phy;
+   bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -61,7 +62,8 @@ struct emac_variant {
  * @rst_ephy:  reference to the optional EPHY reset for the internal PHY
  * @variant:   reference to the current board variant
  * @regmap:regmap for using the syscon
- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
+ * @internal_phy_powered: Does the internal PHY is enabled
+ * @mux_handle:Internal pointer used by mdio-mux lib
  */
 struct sunxi_priv_data {
struct clk *tx_clk;
@@ -70,12 +72,13 @@ struct sunxi_priv_data {
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap *regmap;
-   bool use_internal_phy;
+   bool internal_phy_powered;
+   void *mux_handle;
 };
 
 static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = {
 
 static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true
 };
 
 static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
 };
 
 static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = {
 #define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active 
high */
 #define H3_EPHY_SHUTDOWN   BIT(16) /* 1: shutdown, 0: power up */
 #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK   (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID   1
+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID   2
 
 /* H3/A64 specific bits */
 #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
 }
 
+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
+static int get_ephy_nodes(struct stmmac_priv *priv)
+{
+   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+   struct device_node *mdio_mux, *iphynode;
+   struct device_node *mdio_internal;
+   int ret;
+
+   mdio_mux = of_get_child_by_name(pr

[PATCH v9 03/10] arm: dts: sunxi: h3/h5: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c1bd09dab3da..d762098fc589 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -408,6 +408,32 @@
clocks = <>;
};
 
+   emac: ethernet@1c3 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c3 0x1>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+   };
+
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
-- 
2.13.6

[PATCH v8 03/10] arm: dts: sunxi: h3/h5: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore sunxi-h3-h5.dtsi
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c1bd09dab3da..d762098fc589 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -408,6 +408,32 @@
clocks = <>;
};
 
+   emac: ethernet@1c3 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c3 0x1>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+   };
+
spi0: spi@1c68000 {
compatible = "allwinner,sun8i-h3-spi";
reg = <0x01c68000 0x1000>;
-- 
2.13.6

[PATCH v8 04/10] arm: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 ++-
 1 file changed, 26 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..aa60b7fd18f2 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,35 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux", 
"allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   /* Only one MDIO is usable at the time */
+   internal_mdio: mdio@1 {
+   compatible = 
"allwinner,sun8i-h3-mdio-internal";
reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+
+   external_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
};
};
};
-- 
2.13.6

[PATCH v8 01/10] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
binding")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+   "allwinner,sun8i-a83t-emac"
+   "allwinner,sun8i-h3-emac"
+   "allwinner,sun8i-v3s-emac"
+   "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+  - allwinner,sun8i-h3-system-controller
+  - allwinner,sun8i-v3s-system-controller
+  - allwinner,sun50i-a64-system-controller
+  - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+};
-- 
2.13.6

[PATCH v8 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY

[Corentin Labbe]

Hello

The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.

This patchs series adds a new way to handle this problem via a mdio-mux.

The first try was to create a new MDIO mux "mdio-mux-syscon".
mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception
that the register is used via syscon/regmap.
But this solution does not work for two reason:
- changing the MDIO selection need the reset of MAC which cannot be done by the
mdio-mux-syscon driver
- There were driver loading order problem:
- mdio-mux-syscon needing that stmmac register the parent MDIO
- stmmac needing that child MDIO was registered just after registering 
parent MDIO

So we cannot use any external MDIO-mux.

The final solution was to represent the mdio-mux in MAC node and let the MAC 
handle all things.

Since DT bits was reverted in 4.13, this patch series include the revert of the 
revert.

I have let patch splited for easy review. (for seeing what's new)
But the final serie could have some patch squashed if someone want.
Like squashing patch and 1 and 2 (documentation)

Regards

Changes since v7:
- moved mdio-mux ouf of mdio as asked by Andrew Lunn
- reordered patchs order

Changes since v6:
- renamed external mdio to "external_mdio"
- added compatible to mdio-mux and internal-mdio
- removed usage of phy-is-integrated
- renamed do_not_scan to compatible_muxes (patch 10)
- patch 8 9 of v6 are squashed

Changes since v5:
- reordered patch 1 and 2
- mdio-mux node is now a mdio's child
- added patch 11 for removing unnecessary scan of mdio-mux

Changes since v4:
- Update documentation for new bindings
- Added 4 patchs for bring back reverted stuff of 4.13
- dwmac-sun8i now handle mdio-mux
- MDIO use now compatible = "snps,dwmac-mdio";

Changes since v3:
- Added a patch for handling fixed-link
- Updated documentation

Changes since v2:
- Add a MDIO mux for creating distinction between integrated and external MDIO.
- phy-is-integrated is not set in dtsi.

Changes since v1:
- Dropped phy-is-integrated documentation patch since another same patch was 
already merged
- Moved phy-is-integrated from SoC dtsi to final board DT.


Corentin Labbe (10):
  dt-bindings: net: Restore sun8i dwmac binding
  dt-bindings: net: dwmac-sun8i: update documentation about integrated
PHY
  arm: dts: sunxi: h3/h5: Restore EMAC changes
  arm: dts: sunxi: h3/h5: represent the mdio switch used by
sun8i-h3-emac
  arm: dts: sunxi: Restore EMAC changes (boards)
  arm64: dts: allwinner: Restore EMAC changes
  arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
  net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
  net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
  net: stmmac: sun8i: Restore the compatibles

 .../devicetree/bindings/net/dwmac-sun8i.txt| 199 
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts  |   9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts|  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts  |  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts  |   7 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts  |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts|   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts|   5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts   |  22 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts |  16 +
 arch/arm/boot/dts/sunxi-h3-h5.dtsi |  47 +++
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  16 +
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  15 +
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts  |  16 +
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi  |  21 ++
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts   |  17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  |  17 +
 .../dts/allwinner/sun50i-h5-orangepi-prime.dts |  17 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  | 361 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   4 -
 23 files changed, 735 insertions(+), 134 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

-- 
2.13.6

[PATCH v8 05/10] arm: dts: sunxi: Restore EMAC changes (boards)

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore all boards DT about dwmac-sun8i
This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC 
changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 
 10 files changed, 121 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
aliases {
serial0 = 
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -102,6 +104,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -111,6 +112,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <7>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -117,6 +118,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+  

[PATCH v8 02/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 139 +++--
 1 file changed, 127 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..3e37db10fa02 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
 Please see stmmac.txt for the other unchanged properties.
 
 Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
 - reg: address and length of the register for the device.
 - interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
 - clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
 - resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
 - phy-mode: See ethernet.txt
 - phy-handle: See ethernet.txt
 - #address-cells: shall be 1
@@ -39,23 +39,38 @@ Optional properties for the following compatibles:
 - allwinner,leds-active-low: EPHY LEDs are active low
 
 Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: with compatible "snps,dwmac-mdio"
 
 Required properties of the mdio node:
 - #address-cells: shall be 1
 - #size-cells: shall be 0
 
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
 of the mdio node. See phy.txt for the generic PHY bindings.
 
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the emac node have a mdio-mux child
+node called "mdio-mux":
+  - "allwinner,sun8i-h3-emac"
+  - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+  - compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux"
+  - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+  - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
   - "allwinner,sun8i-h3-emac",
   - "allwinner,sun8i-v3s-emac":
+
+Required properties of the integrated phy node:
 - clocks: a phandle to the reference clock for the EPHY
 - resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
 
-Example:
-
+Example with integrated PHY:
 emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <>;
@@ -72,13 +87,113 @@ emac: ethernet@1c0b000 {
phy-handle = <_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+   mdio0: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mdio: mdio@1 {
+   compatible = "allwinner,sun8i-h3-mdio-internal";
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   ext_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+};
+
+Example with external PHY:
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   sys

[PATCH v8 07/10] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
 
mdio: mdio {
+   compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
-- 
2.13.6

[PATCH v8 06/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +
 8 files changed, 135 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -69,6 +70,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
 
/* TODO: Camera, touchscreen, etc. */
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
serial2 = 
@@ -71,6 +72,15 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rmii";
+   phy-handle = <_rmii_phy1>;
+   status = "okay";
+
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rmii_phy1: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
 "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -76,6 +77,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+ 

[PATCH v8 08/10] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 8a280b48e3a9..9e616da0745d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
-   { .compatible = "allwinner,sun8i-a83t-emac" },
-   { .compatible = "allwinner,sun8i-h3-emac" },
-   { .compatible = "allwinner,sun8i-v3s-emac" },
-   { .compatible = "allwinner,sun50i-a64-emac" },
{},
};
 
-- 
2.13.6

[PATCH v8 09/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.

This patch implement this MDIO switch via a custom MDIO-mux.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++
 2 files changed, 224 insertions(+), 130 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+   select MDIO_BUS_MUX
---help---
  Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..b3eb344bb158 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -41,14 +42,14 @@
  * This value is used for disabling properly EMAC
  * and used as a good starting value in case of the
  * boot process(uboot) leave some stuff.
- * @internal_phy:  Does the MAC embed an internal PHY
+ * @soc_has_internal_phy:  Does the MAC embed an internal PHY
  * @support_mii:   Does the MAC handle MII
  * @support_rmii:  Does the MAC handle RMII
  * @support_rgmii: Does the MAC handle RGMII
  */
 struct emac_variant {
u32 default_syscon_value;
-   int internal_phy;
+   bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -61,7 +62,8 @@ struct emac_variant {
  * @rst_ephy:  reference to the optional EPHY reset for the internal PHY
  * @variant:   reference to the current board variant
  * @regmap:regmap for using the syscon
- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
+ * @internal_phy_powered: Does the internal PHY is enabled
+ * @mux_handle:Internal pointer used by mdio-mux lib
  */
 struct sunxi_priv_data {
struct clk *tx_clk;
@@ -70,12 +72,13 @@ struct sunxi_priv_data {
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap *regmap;
-   bool use_internal_phy;
+   bool internal_phy_powered;
+   void *mux_handle;
 };
 
 static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = {
 
 static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true
 };
 
 static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
 };
 
 static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = {
 #define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active 
high */
 #define H3_EPHY_SHUTDOWN   BIT(16) /* 1: shutdown, 0: power up */
 #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK   (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID   1
+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID   2
 
 /* H3/A64 specific bits */
 #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
 }
 
+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
+static int get_ephy_nodes(struct stmmac_priv *priv)
+{
+   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+   struct device_node *mdio_mux, *iphynode;
+   struct device_node *mdio_internal;
+   int ret;
+
+   mdio_mux = of_get_child_by_name(pr

[PATCH v8 10/10] net: stmmac: sun8i: Restore the compatibles

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index b3eb344bb158..e5ff734d4f9b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -1072,6 +1072,14 @@ return ret;
 }
 
 static const struct of_device_id sun8i_dwmac_match[] = {
+   { .compatible = "allwinner,sun8i-h3-emac",
+   .data = _variant_h3 },
+   { .compatible = "allwinner,sun8i-v3s-emac",
+   .data = _variant_v3s },
+   { .compatible = "allwinner,sun8i-a83t-emac",
+   .data = _variant_a83t },
+   { .compatible = "allwinner,sun50i-a64-emac",
+   .data = _variant_a64 },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.13.6

Re: [PATCH v7 02/10] arm: dts: sunxi: Restore EMAC changes

[Corentin Labbe]

On Wed, Oct 18, 2017 at 06:44:50PM +0200, Andrew Lunn wrote:
> On Wed, Oct 18, 2017 at 01:44:50PM +0200, Corentin Labbe wrote:
> > The original dwmac-sun8i DT bindings have some issue on how to handle
> > integrated PHY and was reverted in last RC of 4.13.
> > But now we have a solution so we need to get back that was reverted.
> > 
> > This patch restore arm DT about dwmac-sun8i
> > This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
> >  arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 
> >  arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +
> >  arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +
> >  arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 ++
> >  arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 +++
> >  arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 +++
> >  arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
> >  arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 +++
> >  arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 +++
> >  arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 ++
> >  arch/arm/boot/dts/sunxi-h3-h5.dtsi| 26 
> > +++
> >  11 files changed, 147 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
> > b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > index b1502df7b509..6713d0f2b3f4 100644
> > --- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > +++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
> > @@ -56,6 +56,8 @@
> >  
> > aliases {
> > serial0 = 
> > +   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
> > +   ethernet0 = 
> > ethernet1 = 
> > };
> >  
> > @@ -102,6 +104,13 @@
> > status = "okay";
> >  };
> >  
> > + {
> > +   phy-handle = <_mii_phy>;
> > +   phy-mode = "mii";
> > +   allwinner,leds-active-low;
> > +   status = "okay";
> > +};
> > +
> >   {
> > pinctrl-names = "default";
> > pinctrl-0 = <_pins_a>;
> > diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
> > b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > index e1dba9ffa94b..f2292deaa590 100644
> > --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
> > @@ -52,6 +52,7 @@
> > compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
> >  
> > aliases {
> > +   ethernet0 = 
> > serial0 = 
> > serial1 = 
> > };
> > @@ -111,6 +112,24 @@
> > status = "okay";
> >  };
> >  
> > + {
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <_rgmii_pins>;
> > +   phy-supply = <_gmac_3v3>;
> > +   phy-handle = <_rgmii_phy>;
> > +   phy-mode = "rgmii";
> > +
> > +   allwinner,leds-active-low;
> > +   status = "okay";
> > +};
> > +
> 
> 
> > +_mdio {
> > +   ext_rgmii_phy: ethernet-phy@1 {
> > +   compatible = "ethernet-phy-ieee802.3-c22";
> > +   reg = <0>;
> > +   };
> > +};
> > +
> 
> Hi Corentin
> 
> I'm wondering about the order of the patches. Does the external_mdio
> node actually exist at this point? Or only later when other patches
> are applied?
> 

You are right order of patch are wrong, I need to cut this one in two.
"Revert²" sunxi-h3-h5.dtsi
apply mdiomux
"Revert²" all board nodes

Regards
Corentin Labbe

[PATCH v7 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY

[Corentin Labbe]

Hello

The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.

This patchs series adds a new way to handle this problem via a mdio-mux.

The first try was to create a new MDIO mux "mdio-mux-syscon".
mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception
that the register is used via syscon/regmap.
But this solution does not work for two reason:
- changing the MDIO selection need the reset of MAC which cannot be done by the
mdio-mux-syscon driver
- There were driver loading order problem:
- mdio-mux-syscon needing that stmmac register the parent MDIO
- stmmac needing that child MDIO was registered just after registering 
parent MDIO

So we cannot use any external MDIO-mux.

The final solution was to represent the mdio-mux in MAC node and let the MAC 
handle all things.

Since DT bits was reverted in 4.13, this patch series include the revert of the 
revert.
So
- the first four patchs bring back DT/stmmac stuff that was in 4.13 (and 
reverted)
- fifth patch document how DT MDIO mux is implemented
- patch 6 and 7 modify DT
- patch 8, 9 Modify stmmac according to the new bindings

I have let patch splited for easy review. (for seeing what's new)
But the final serie could have some patch squashed if someone want.
Like squashing patch and 2 and 5 (documentation)

Regards

Changes since v6:
- renamed external mdio to "external_mdio"
- added compatible to mdio-mux and internal-mdio
- removed usage of phy-is-integrated
- renamed do_not_scan to compatible_muxes (patch 10)
- patch 8 9 of v6 are squashed

Changes since v5:
- reordered patch 1 and 2
- mdio-mux node is now a mdio's child
- added patch 11 for removing unnecessary scan of mdio-mux

Changes since v4:
- Update documentation for new bindings
- Added 4 patchs for bring back reverted stuff of 4.13
- dwmac-sun8i now handle mdio-mux
- MDIO use now compatible = "snps,dwmac-mdio";

Changes since v3:
- Added a patch for handling fixed-link
- Updated documentation

Changes since v2:
- Add a MDIO mux for creating distinction between integrated and external MDIO.
- phy-is-integrated is not set in dtsi.

Changes since v1:
- Dropped phy-is-integrated documentation patch since another same patch was 
already merged
- Moved phy-is-integrated from SoC dtsi to final board DT.

Corentin Labbe (10):
  dt-bindings: net: Restore sun8i dwmac binding
  arm: dts: sunxi: Restore EMAC changes
  arm64: dts: allwinner: Restore EMAC changes
  net: stmmac: sun8i: Restore the compatibles
  dt-bindings: net: dwmac-sun8i: update documentation about integrated
PHY
  ARM: dts: sunxi: h3/h5: represent the mdio switch used by
sun8i-h3-emac
  arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
  net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
  net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
  of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

 .../devicetree/bindings/net/dwmac-sun8i.txt| 199 
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts  |   9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts|  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts  |  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts  |   7 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts  |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts|   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts|   5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts   |  22 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts |  16 +
 arch/arm/boot/dts/sunxi-h3-h5.dtsi |  47 +++
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  16 +
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  15 +
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts  |  16 +
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi  |  21 ++
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts   |  17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  |  17 +
 .../dts/allwinner/sun50i-h5-orangepi-prime.dts |  17 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  | 361 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   4 -
 drivers/of/of_mdio.c   |  10 +
 24 files changed, 745 insertions(+), 134 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

-- 
2.13.6

[PATCH v7 01/10] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
binding")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+   "allwinner,sun8i-a83t-emac"
+   "allwinner,sun8i-h3-emac"
+   "allwinner,sun8i-v3s-emac"
+   "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+  - allwinner,sun8i-h3-system-controller
+  - allwinner,sun8i-v3s-system-controller
+  - allwinner,sun50i-a64-system-controller
+  - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+};
-- 
2.13.6

[PATCH v7 02/10] arm: dts: sunxi: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore arm DT about dwmac-sun8i
This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +
 arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 ++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi| 26 +++
 11 files changed, 147 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
aliases {
serial0 = 
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -102,6 +104,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..f2292deaa590 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -111,6 +112,24 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 73766d38ee6c..cfb96da3cfef 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -66,6 +66,25 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+
+   status = "okay";
+};
+
+_mdio {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <7>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 1bf51802f5aa..b20be95b49d5 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -117,6 +118,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mi

[PATCH v7 03/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +
 8 files changed, 135 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -69,6 +70,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
 
/* TODO: Camera, touchscreen, etc. */
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
serial2 = 
@@ -71,6 +72,15 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rmii";
+   phy-handle = <_rmii_phy1>;
+   status = "okay";
+
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rmii_phy1: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
 "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -76,6 +77,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+ 

[PATCH v7 07/10] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0650a1cda107..0a2074f86f2c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -532,6 +532,7 @@
#size-cells = <0>;
 
mdio: mdio {
+   compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
-- 
2.13.6

[PATCH v7 04/10] net: stmmac: sun8i: Restore the compatibles

[Corentin Labbe]

The original dwmac-sun8i DT bindings have some issue on how to handle
integrated PHY and was reverted in last RC of 4.13.
But now we have a solution so we need to get back that was reverted.

This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..fffd6d5fc907 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id sun8i_dwmac_match[] = {
+   { .compatible = "allwinner,sun8i-h3-emac",
+   .data = _variant_h3 },
+   { .compatible = "allwinner,sun8i-v3s-emac",
+   .data = _variant_v3s },
+   { .compatible = "allwinner,sun8i-a83t-emac",
+   .data = _variant_a83t },
+   { .compatible = "allwinner,sun50i-a64-emac",
+   .data = _variant_a64 },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.13.6

[PATCH v7 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 139 +++--
 1 file changed, 127 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..0ae7d2096375 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
 Please see stmmac.txt for the other unchanged properties.
 
 Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
 - reg: address and length of the register for the device.
 - interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
 - clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
 - resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
 - phy-mode: See ethernet.txt
 - phy-handle: See ethernet.txt
 - #address-cells: shall be 1
@@ -39,23 +39,38 @@ Optional properties for the following compatibles:
 - allwinner,leds-active-low: EPHY LEDs are active low
 
 Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: with compatible "snps,dwmac-mdio"
 
 Required properties of the mdio node:
 - #address-cells: shall be 1
 - #size-cells: shall be 0
 
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
 of the mdio node. See phy.txt for the generic PHY bindings.
 
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the mdio node have a mdio-mux child
+node called "mdio-mux":
+  - "allwinner,sun8i-h3-emac"
+  - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+  - compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux"
+  - one child mdio for the integrated mdio with the compatible
+"allwinner,sun8i-h3-mdio-internal"
+  - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
   - "allwinner,sun8i-h3-emac",
   - "allwinner,sun8i-v3s-emac":
+
+Required properties of the integrated phy node:
 - clocks: a phandle to the reference clock for the EPHY
 - resets: a phandle to the reset control for the EPHY
+- Must be a child of the integrated mdio
 
-Example:
-
+Example with integrated PHY:
 emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <>;
@@ -72,13 +87,113 @@ emac: ethernet@1c0b000 {
phy-handle = <_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+   mdio0: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+
+   mdio-mux {
+   compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mdio: mdio@1 {
+   compatible = "allwinner,sun8i-h3-mdio-internal";
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   ext_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+  

[PATCH v7 08/10] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 8a280b48e3a9..9e616da0745d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
-   { .compatible = "allwinner,sun8i-a83t-emac" },
-   { .compatible = "allwinner,sun8i-h3-emac" },
-   { .compatible = "allwinner,sun8i-v3s-emac" },
-   { .compatible = "allwinner,sun50i-a64-emac" },
{},
};
 
-- 
2.13.6

[PATCH v7 09/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.

This patch implement this MDIO switch via a custom MDIO-mux.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++
 2 files changed, 224 insertions(+), 130 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+   select MDIO_BUS_MUX
---help---
  Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index fffd6d5fc907..7741235093b9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -41,14 +42,14 @@
  * This value is used for disabling properly EMAC
  * and used as a good starting value in case of the
  * boot process(uboot) leave some stuff.
- * @internal_phy:  Does the MAC embed an internal PHY
+ * @soc_has_internal_phy:  Does the MAC embed an internal PHY
  * @support_mii:   Does the MAC handle MII
  * @support_rmii:  Does the MAC handle RMII
  * @support_rgmii: Does the MAC handle RGMII
  */
 struct emac_variant {
u32 default_syscon_value;
-   int internal_phy;
+   bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -61,7 +62,8 @@ struct emac_variant {
  * @rst_ephy:  reference to the optional EPHY reset for the internal PHY
  * @variant:   reference to the current board variant
  * @regmap:regmap for using the syscon
- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
+ * @internal_phy_powered: Does the internal PHY is enabled
+ * @mux_handle:Internal pointer used by mdio-mux lib
  */
 struct sunxi_priv_data {
struct clk *tx_clk;
@@ -70,12 +72,13 @@ struct sunxi_priv_data {
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap *regmap;
-   bool use_internal_phy;
+   bool internal_phy_powered;
+   void *mux_handle;
 };
 
 static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = {
 
 static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true
 };
 
 static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
 };
 
 static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = {
 #define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active 
high */
 #define H3_EPHY_SHUTDOWN   BIT(16) /* 1: shutdown, 0: power up */
 #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK   (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID   1
+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID   2
 
 /* H3/A64 specific bits */
 #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
 }
 
+/* Search in mdio-mux node for internal PHY node and get its clk/reset */
+static int get_ephy_nodes(struct stmmac_priv *priv)
+{
+   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+   struct device_node *mdio_mux, *iphynode;
+   struct device_node *mdio_internal;
+   int ret;
+
+   mdio_mux = of_get_child_by_name(pr

[PATCH v7 10/10] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

[Corentin Labbe]

Each child node of an MDIO node is scanned as a PHY when calling
of_mdiobus_register() givint the following result:
[   18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has 
invalid PHY address
[   18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0
[   18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1
[...]
[   18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30
[   18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31

Since mdio-mux nodes are not PHY, this patch a way to to not scan
them.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/of/of_mdio.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
index d94dd8b77abd..90f3ac87c98f 100644
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -190,6 +190,10 @@ int of_mdiobus_register(struct mii_bus *mdio, struct 
device_node *np)
struct device_node *child;
bool scanphys = false;
int addr, rc;
+   static const struct of_device_id compatible_muxes[] = {
+   { .compatible = "mdio-mux" },
+   {}
+   };
 
/* Do not continue if the node is disabled */
if (!of_device_is_available(np))
@@ -212,6 +216,9 @@ int of_mdiobus_register(struct mii_bus *mdio, struct 
device_node *np)
 
/* Loop over the child nodes and register a phy_device for each phy */
for_each_available_child_of_node(np, child) {
+   if (of_match_node(compatible_muxes, child))
+   continue;
+
addr = of_mdio_parse_addr(>dev, child);
if (addr < 0) {
scanphys = true;
@@ -229,6 +236,9 @@ int of_mdiobus_register(struct mii_bus *mdio, struct 
device_node *np)
 
/* auto scan for PHYs with empty reg property */
for_each_available_child_of_node(np, child) {
+   if (of_match_node(compatible_muxes, child))
+   continue;
+
/* Skip PHYs with reg property set */
if (of_find_property(child, "reg", NULL))
continue;
-- 
2.13.6

[PATCH v7 06/10] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 33 +++--
 1 file changed, 27 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d762098fc589..895816f4d741 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,35 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
-   reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   compatible = "snps,dwmac-mdio";
+
+   mdio-mux {
+   compatible = "mdio-mux", 
"allwinner,sun8i-h3-mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   /* Only one MDIO is usable at the time 
*/
+   internal_mdio: mdio@1 {
+   compatible = 
"allwinner,sun8i-h3-mdio-internal";
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < 
CLK_BUS_EPHY>;
+   resets = < 
RST_BUS_EPHY>;
+   };
+   };
+
+   external_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
};
};
};
-- 
2.13.6

Re: [PATCH v6 05/11] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Thu, Sep 28, 2017 at 09:37:08AM +0200, Corentin Labbe wrote:
> On Wed, Sep 27, 2017 at 04:02:10PM +0200, Andrew Lunn wrote:
> > Hi Corentin
> > 
> > > +Required properties for the mdio-mux node:
> > > +  - compatible = "mdio-mux"
> > 
> > This is too generic. Please add a more specific compatible for this
> > particular mux. You can keep "mdio-mux", since that is what the MDIO
> > subsystem will look for.
> > 
> 
> I will add allwinner,sun8i-h3-mdio-mux
> 
> > > +Required properties of the integrated phy node:
> > >  - clocks: a phandle to the reference clock for the EPHY
> > >  - resets: a phandle to the reset control for the EPHY
> > > +- phy-is-integrated
> > 
> > So the last thing you said is that the mux is not the problem
> > here. Something else is locking up. Did you discover what?
> > 
> > I really would like phy-is-integrated to go away.
> > 
> 
> I have found the problem: by enabling ephy clk/reset the timeout does not 
> occur anymore.
> So we could remove phy-is-integrated by:
> Moving internal phy clk/reset handling in mdio_mux_syscon_switch_fn()
> But this means:
> - getting internalphy node always by manually get internal_mdio/internal_phy 
> (and not by the given phyhandle)
> - doing some unnecessary tasks (enable/scan/disable) when external_phy is 
> needed
> 
> Regards

Hello all

Below is the current patch, as you can read, it does not use anymore the 
phy-is-integrated property.
So now, the mdio-mux must always enable the internal mdio when switch_fn ask 
for it and so reset MAC and so need to enable ephy clk/reset.
But for this I need a reference to thoses clock and reset. (this is done in 
get_ephy_nodes)
The current version set those clock in mdio-mux node, and as you can see it is 
already ugly (lots of get next node),
if the clk/rst nodes were as it should be, in phy nodes, it will be more bad.

So, since the MAC have a dependency on thoses clk/rst nodes for doing reset(), 
I seek a proper way to get references on it.
OR do you agree that putting ephy clk/rst in emac is acceptable ?

thanks
regards

--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -41,14 +42,14 @@
  * This value is used for disabling properly EMAC
  * and used as a good starting value in case of the
  * boot process(uboot) leave some stuff.
- * @internal_phy:  Does the MAC embed an internal PHY
+ * @soc_has_internal_phy:  Does the MAC embed an internal PHY
  * @support_mii:   Does the MAC handle MII
  * @support_rmii:  Does the MAC handle RMII
  * @support_rgmii: Does the MAC handle RGMII
  */
 struct emac_variant {
u32 default_syscon_value;
-   int internal_phy;
+   bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -61,7 +62,7 @@ struct emac_variant {
  * @rst_ephy:  reference to the optional EPHY reset for the internal PHY
  * @variant:   reference to the current board variant
  * @regmap:regmap for using the syscon
- * @use_internal_phy: Does the current PHY choice imply using the internal PHY
+ * @internal_phy_powered: Does the internal PHY is enabled
  */
 struct sunxi_priv_data {
struct clk *tx_clk;
@@ -70,12 +71,13 @@ struct sunxi_priv_data {
struct reset_control *rst_ephy;
const struct emac_variant *variant;
struct regmap *regmap;
-   bool use_internal_phy;
+   bool internal_phy_powered;
+   void *mux_handle;
 };
 
 static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +85,20 @@ static const struct emac_variant emac_variant_h3 = {
 
 static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true
 };
 
 static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
 };
 
 static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -195,6 +197,9 @@ static const struct emac_variant emac_variant_a6

Re: [PATCH v6 05/11] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Thu, Sep 28, 2017 at 09:37:08AM +0200, Corentin Labbe wrote:
> On Wed, Sep 27, 2017 at 04:02:10PM +0200, Andrew Lunn wrote:
> > Hi Corentin
> > 
> > > +Required properties for the mdio-mux node:
> > > +  - compatible = "mdio-mux"
> > 
> > This is too generic. Please add a more specific compatible for this
> > particular mux. You can keep "mdio-mux", since that is what the MDIO
> > subsystem will look for.
> > 
> 
> I will add allwinner,sun8i-h3-mdio-mux
> 
> > > +Required properties of the integrated phy node:
> > >  - clocks: a phandle to the reference clock for the EPHY
> > >  - resets: a phandle to the reset control for the EPHY
> > > +- phy-is-integrated
> > 
> > So the last thing you said is that the mux is not the problem
> > here. Something else is locking up. Did you discover what?
> > 
> > I really would like phy-is-integrated to go away.
> > 
> 
> I have found the problem: by enabling ephy clk/reset the timeout does not 
> occur anymore.
> So we could remove phy-is-integrated by:
> Moving internal phy clk/reset handling in mdio_mux_syscon_switch_fn()
> But this means:
> - getting internalphy node always by manually get internal_mdio/internal_phy 
> (and not by the given phyhandle)
> - doing some unnecessary tasks (enable/scan/disable) when external_phy is 
> needed
> 

Hello

I have get rid of phy-is-integrated, but mdio_mux_syscon_switch_fn need to 
enable/disable ephy clk/reset.
And so access to internal PHY node.
But current DT made this ugly: (need to find mdio-mux then internalmdio then 
internal PHY)

Since MAC cannot reset/choose internal MDIO without ephy clk/rst, could we 
interpret this as thoses clk/rst must be set in emac node.
This will simplify a lot the code.

Regards

Re: [PATCH v6 05/11] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Wed, Sep 27, 2017 at 04:02:10PM +0200, Andrew Lunn wrote:
> Hi Corentin
> 
> > +Required properties for the mdio-mux node:
> > +  - compatible = "mdio-mux"
> 
> This is too generic. Please add a more specific compatible for this
> particular mux. You can keep "mdio-mux", since that is what the MDIO
> subsystem will look for.
> 

I will add allwinner,sun8i-h3-mdio-mux

> > +Required properties of the integrated phy node:
> >  - clocks: a phandle to the reference clock for the EPHY
> >  - resets: a phandle to the reset control for the EPHY
> > +- phy-is-integrated
> 
> So the last thing you said is that the mux is not the problem
> here. Something else is locking up. Did you discover what?
> 
> I really would like phy-is-integrated to go away.
> 

I have found the problem: by enabling ephy clk/reset the timeout does not occur 
anymore.
So we could remove phy-is-integrated by:
Moving internal phy clk/reset handling in mdio_mux_syscon_switch_fn()
But this means:
- getting internalphy node always by manually get internal_mdio/internal_phy 
(and not by the given phyhandle)
- doing some unnecessary tasks (enable/scan/disable) when external_phy is needed

Regards

Re: [PATCH v6 05/11] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Wed, Sep 27, 2017 at 09:53:15PM -0700, Florian Fainelli wrote:
> 
> 
> On 09/27/2017 12:34 AM, Corentin Labbe wrote:
> > This patch add documentation about the MDIO switch used on sun8i-h3-emac
> > for integrated PHY.
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
> >  .../devicetree/bindings/net/dwmac-sun8i.txt| 138 
> > +++--
> >  1 file changed, 126 insertions(+), 12 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
> > b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > index 725f3b187886..e2ef4683df08 100644
> > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > @@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
> >  Please see stmmac.txt for the other unchanged properties.
> >  
> >  Required properties:
> > -- compatible: should be one of the following string:
> > +- compatible: must be one of the following string:
> > "allwinner,sun8i-a83t-emac"
> > "allwinner,sun8i-h3-emac"
> > "allwinner,sun8i-v3s-emac"
> > "allwinner,sun50i-a64-emac"
> >  - reg: address and length of the register for the device.
> >  - interrupts: interrupt for the device
> > -- interrupt-names: should be "macirq"
> > +- interrupt-names: must be "macirq"
> >  - clocks: A phandle to the reference clock for this device
> > -- clock-names: should be "stmmaceth"
> > +- clock-names: must be "stmmaceth"
> >  - resets: A phandle to the reset control for this device
> > -- reset-names: should be "stmmaceth"
> > +- reset-names: must be "stmmaceth"
> >  - phy-mode: See ethernet.txt
> >  - phy-handle: See ethernet.txt
> >  - #address-cells: shall be 1
> > @@ -39,23 +39,38 @@ Optional properties for the following compatibles:
> >  - allwinner,leds-active-low: EPHY LEDs are active low
> >  
> >  Required child node of emac:
> > -- mdio bus node: should be named mdio
> > +- mdio bus node: with compatible "snps,dwmac-mdio"
> >  
> >  Required properties of the mdio node:
> >  - #address-cells: shall be 1
> >  - #size-cells: shall be 0
> >  
> > -The device node referenced by "phy" or "phy-handle" should be a child node
> > +The device node referenced by "phy" or "phy-handle" must be a child node
> >  of the mdio node. See phy.txt for the generic PHY bindings.
> >  
> > -Required properties of the phy node with the following compatibles:
> > +The following compatibles require that the mdio node have a mdio-mux child
> > +node called "mdio-mux":
> > +  - "allwinner,sun8i-h3-emac"
> > +  - "allwinner,sun8i-v3s-emac":
> > +Required properties for the mdio-mux node:
> > +  - compatible = "mdio-mux"
> > +  - one child mdio for the integrated mdio
> > +  - one child mdio for the external mdio if present (V3s have none)
> > +Required properties for the mdio-mux children node:
> > +  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
> > +
> > +The following compatibles require a PHY node representing the integrated
> > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:
> >- "allwinner,sun8i-h3-emac",
> >- "allwinner,sun8i-v3s-emac":
> > +
> > +Required properties of the integrated phy node:
> >  - clocks: a phandle to the reference clock for the EPHY
> >  - resets: a phandle to the reset control for the EPHY
> > +- phy-is-integrated
> > +- Must be a child of the integrated mdio
> >  
> > -Example:
> > -
> > +Example with integrated PHY:
> >  emac: ethernet@1c0b000 {
> > compatible = "allwinner,sun8i-h3-emac";
> > syscon = <>;
> > @@ -72,13 +87,112 @@ emac: ethernet@1c0b000 {
> > phy-handle = <_mii_phy>;
> > phy-mode = "mii";
> > allwinner,leds-active-low;
> > +
> > +   mdio0: mdio {
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   compatible = "snps,dwmac-mdio";
> > +
> > +   mdio-mux {
> > +   compatible = "mdio-mux";
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> 
> Sorry for chiming in so late, but why don't we have the mdio-mux be the
> root node here in the mdio bus hierarchy? I understand that with this
> binding proposed here, we need to have patch 11 included (which btw,
> should come before any DTS change), but this does not seem to accurately
> model the HW.
> 
> The mux itself is not a child node of the MDIO bus controller, it does
> not really belong in that address space although it does mangle the MDIO
> bus controller address space between the two ends of the mux.
> 
> If this has been debated before, apologies for missing that part of the
> discussion.
> 

I have done it as asked by Rob.
https://lkml.org/lkml/2017/9/13/422
https://lkml.org/lkml/2017/9/19/849

Regards

Re: [PATCH v6 06/11] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

On Wed, Sep 27, 2017 at 12:16:22PM +0200, Maxime Ripard wrote:
> On Wed, Sep 27, 2017 at 07:34:09AM +0000, Corentin Labbe wrote:
> > Since dwmac-sun8i could use either an integrated PHY or an external PHY
> > (which could be at same MDIO address), we need to represent this selection
> > by a MDIO switch.
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
> >  arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +--
> >  1 file changed, 25 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
> > b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> > index 3b7d953429a6..a8e9b8f378ba 100644
> > --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> > +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
> > @@ -422,14 +422,33 @@
> > #size-cells = <0>;
> > status = "disabled";
> >  
> > -   mdio: mdio {
> > +   mdio0: mdio {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > -   int_mii_phy: ethernet-phy@1 {
> > -   compatible = 
> > "ethernet-phy-ieee802.3-c22";
> > -   reg = <1>;
> > -   clocks = < CLK_BUS_EPHY>;
> > -   resets = < RST_BUS_EPHY>;
> > +   compatible = "snps,dwmac-mdio";
> > +
> > +   mdio-mux {
> > +   compatible = "mdio-mux";
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> 
> Newline
> 
> > +   /* Only one MDIO is usable at the time 
> > */
> > +   internal_mdio: mdio@1 {
> > +   reg = <1>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> 
> Newline
> 
> > +   int_mii_phy: ethernet-phy@1 {
> > +   compatible = 
> > "ethernet-phy-ieee802.3-c22";
> > +   reg = <1>;
> > +   clocks = < 
> > CLK_BUS_EPHY>;
> > +   resets = < 
> > RST_BUS_EPHY>;
> > +   phy-is-integrated;
> > +   };
> > +   };
> 
> Newline
> 
> > +   mdio: mdio@2 {
> 
> This is quite confusing. Why not call the label external_mdio?
> 

I will do it. (at origin I was not changing it for limiting changes on board 
with external PHY, but now all DT are reverted, it will be easy)

Regards

[PATCH v6 01/11] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
binding")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+   "allwinner,sun8i-a83t-emac"
+   "allwinner,sun8i-h3-emac"
+   "allwinner,sun8i-v3s-emac"
+   "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+  - allwinner,sun8i-h3-system-controller
+  - allwinner,sun8i-v3s-system-controller
+  - allwinner,sun50i-a64-system-controller
+  - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+};
-- 
2.13.5

[PATCH v6 04/11] net: stmmac: sun8i: Restore the compatibles

[Corentin Labbe]

This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..fffd6d5fc907 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id sun8i_dwmac_match[] = {
+   { .compatible = "allwinner,sun8i-h3-emac",
+   .data = _variant_h3 },
+   { .compatible = "allwinner,sun8i-v3s-emac",
+   .data = _variant_v3s },
+   { .compatible = "allwinner,sun8i-a83t-emac",
+   .data = _variant_a83t },
+   { .compatible = "allwinner,sun50i-a64-emac",
+   .data = _variant_a64 },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.13.5

[PATCH v6 00/11] net: stmmac: dwmac-sun8i: Handle integrated PHY

[Corentin Labbe]

Hello

The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.

This patchs series adds a new way to find if the PHY is integrated, via
the phy-is-integrated DT property.

Since it exists both integrated and external ethernet-phy@1, they are merged in
the final DTB and so share all properties.
For avoiding this, and better represent the reality, we use a MDIO mux.

The first try was to create a new MDIO mux "mdio-mux-syscon".
mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception
that the register is used via syscon/regmap.
But this solution does not work for two reason:
- changing the MDIO selection need the reset of MAC which cannot be done by the
mdio-mux-syscon driver
- There were driver loading order problem:
- mdio-mux-syscon needing that stmmac register the parent MDIO
- stmmac needing that child MDIO was registered just after registering 
parent MDIO

So we cannot use any external MDIO-mux.

The final solution was to represent a mdio-mux and let the MAC handle all 
things.
Note that phy-is-integrated is still needed (even if we use a MDIO mux) since
some properties apply only on integrated PHY and we need to know the final MDIO
bus in mdio_mux_syscon_switch_fn().

Since DT bits was reverted in 4.13, this patch series include the revert of the 
revert.
So
- the first four patchs bring back DT/stmmac stuff that was in 4.13 (and 
reverted)
- fifth patch document how DT MDIO mux is implemented
- patch 6 and 7 modify DT
- patch 8, 9, 10 Modify stmmac according to the new bindings

I have let patch splited for easy review. (for seeing what's new)
But the final serie could have some patch squashed if someone want.
Like squashing patch and 2 and 5 (documentation)

Since DT worked well in 4.13, could it be targeted for 4.14 ?
If necessary I could split this serie in two:
- bring back A64/A83T (patchs 1, 2, 4, 7, 9)
- add MXIO-mux and H3 (patchs 3, 4, 5, 6, 8, 10)

Regards

Changes since v5:
- reordered patch 1 and 2
- mdio-mux node is now a mdio's child
- added patch 11 for removing unnecessary scan of mdio-mux

Changes since v4:
- Update documentation for new bindings
- Added 4 patchs for bring back reverted stuff of 4.13
- dwmac-sun8i now handle mdio-mux
- MDIO use now compatible = "snps,dwmac-mdio";

Changes since v3:
- Added a patch for handling fixed-link
- Updated documentation

Changes since v2:
- Add a MDIO mux for creating distinction between integrated and external MDIO.
- phy-is-integrated is not set in dtsi.

Changes since v1:
- Dropped phy-is-integrated documentation patch since another same patch was 
already merged
- Moved phy-is-integrated from SoC dtsi to final board DT.

Corentin Labbe (11):
  dt-bindings: net: Restore sun8i dwmac binding
  arm: dts: sunxi: Restore EMAC changes
  arm64: dts: allwinner: Restore EMAC changes
  net: stmmac: sun8i: Restore the compatibles
  dt-bindings: net: dwmac-sun8i: update documentation about integrated
PHY
  ARM: dts: sunxi: h3/h5: represent the mdio switch used by
sun8i-h3-emac
  arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
  net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
  net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated
  net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs
  of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

 .../devicetree/bindings/net/dwmac-sun8i.txt| 198 +
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts  |   9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts|  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts  |   7 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts  |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts|   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts|   5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts   |  22 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts |  16 ++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi |  45 +
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  16 ++
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  15 ++
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  17 ++
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts  |  16 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi  |  21 +++
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts   |  17 ++
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  |  17 ++
 .../dts/allwinner/sun50i-h5-orangepi-prime.dts |  17 ++
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  | 140 ---
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   4 -
 drivers/of/of_mdio.c   |  10 ++
 2

[PATCH v6 05/11] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 138 +++--
 1 file changed, 126 insertions(+), 12 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..e2ef4683df08 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac.
 Please see stmmac.txt for the other unchanged properties.
 
 Required properties:
-- compatible: should be one of the following string:
+- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
 - reg: address and length of the register for the device.
 - interrupts: interrupt for the device
-- interrupt-names: should be "macirq"
+- interrupt-names: must be "macirq"
 - clocks: A phandle to the reference clock for this device
-- clock-names: should be "stmmaceth"
+- clock-names: must be "stmmaceth"
 - resets: A phandle to the reset control for this device
-- reset-names: should be "stmmaceth"
+- reset-names: must be "stmmaceth"
 - phy-mode: See ethernet.txt
 - phy-handle: See ethernet.txt
 - #address-cells: shall be 1
@@ -39,23 +39,38 @@ Optional properties for the following compatibles:
 - allwinner,leds-active-low: EPHY LEDs are active low
 
 Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: with compatible "snps,dwmac-mdio"
 
 Required properties of the mdio node:
 - #address-cells: shall be 1
 - #size-cells: shall be 0
 
-The device node referenced by "phy" or "phy-handle" should be a child node
+The device node referenced by "phy" or "phy-handle" must be a child node
 of the mdio node. See phy.txt for the generic PHY bindings.
 
-Required properties of the phy node with the following compatibles:
+The following compatibles require that the mdio node have a mdio-mux child
+node called "mdio-mux":
+  - "allwinner,sun8i-h3-emac"
+  - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+  - compatible = "mdio-mux"
+  - one child mdio for the integrated mdio
+  - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+  - reg: 1 for internal MDIO bus, 2 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
   - "allwinner,sun8i-h3-emac",
   - "allwinner,sun8i-v3s-emac":
+
+Required properties of the integrated phy node:
 - clocks: a phandle to the reference clock for the EPHY
 - resets: a phandle to the reset control for the EPHY
+- phy-is-integrated
+- Must be a child of the integrated mdio
 
-Example:
-
+Example with integrated PHY:
 emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <>;
@@ -72,13 +87,112 @@ emac: ethernet@1c0b000 {
phy-handle = <_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+   mdio0: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+
+   mdio-mux {
+   compatible = "mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mdio: mdio@1 {
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   ext_mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+   };
+};
+
+Example with external PHY:
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+

[PATCH v6 03/11] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +
 8 files changed, 135 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -69,6 +70,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
 
/* TODO: Camera, touchscreen, etc. */
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index d06e34b5d192..806442d3e846 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
serial2 = 
@@ -71,6 +72,15 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rmii";
+   phy-handle = <_rmii_phy1>;
+   status = "okay";
+
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -81,6 +91,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rmii_phy1: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
 "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -76,6 +77,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a

[PATCH v6 02/11] arm: dts: sunxi: Restore EMAC changes

[Corentin Labbe]

This patch restore arm DT about dwmac-sun8i
This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 ++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi| 26 +++
 10 files changed, 128 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
aliases {
serial0 = 
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -102,6 +104,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index e1dba9ffa94b..cc20d676a642 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -111,12 +112,30 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 8ff71b1bb45b..17cdeae19c6f 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -117,6 +118,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 5fea430e0eb1..6880268e8b87 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -52,6 +52,7 @@
compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -97,6 +98,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
diff --gi

[PATCH v6 08/11] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 8a280b48e3a9..9e616da0745d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
-   { .compatible = "allwinner,sun8i-a83t-emac" },
-   { .compatible = "allwinner,sun8i-h3-emac" },
-   { .compatible = "allwinner,sun8i-v3s-emac" },
-   { .compatible = "allwinner,sun50i-a64-emac" },
{},
};
 
-- 
2.13.5

[PATCH v6 06/11] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +--
 1 file changed, 25 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 3b7d953429a6..a8e9b8f378ba 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -422,14 +422,33 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
-   reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   compatible = "snps,dwmac-mdio";
+
+   mdio-mux {
+   compatible = "mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   /* Only one MDIO is usable at the time 
*/
+   internal_mdio: mdio@1 {
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < 
CLK_BUS_EPHY>;
+   resets = < 
RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   mdio: mdio@2 {
+   reg = <2>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
};
};
};
-- 
2.13.5

[PATCH v6 07/11] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 75494cd90e40..e30476f05802 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -517,6 +517,7 @@
#size-cells = <0>;
 
mdio: mdio {
+   compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
-- 
2.13.5

[PATCH v6 10/11] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.

This patch implement this MDIO switch via a custom MDIO-mux.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 116 +++---
 2 files changed, 104 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+   select MDIO_BUS_MUX
---help---
  Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 672553b652bd..8bd500c351b4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -71,6 +72,7 @@ struct sunxi_priv_data {
const struct emac_variant *variant;
struct regmap *regmap;
bool use_internal_phy;
+   void *mux_handle;
 };
 
 static const struct emac_variant emac_variant_h3 = {
@@ -195,6 +197,9 @@ static const struct emac_variant emac_variant_a64 = {
 #define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active 
high */
 #define H3_EPHY_SHUTDOWN   BIT(16) /* 1: shutdown, 0: power up */
 #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK   (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID   1
+#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID   2
 
 /* H3/A64 specific bits */
 #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +639,76 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
 }
 
+/* MDIO multiplexing switch function
+ * This function is called by the mdio-mux layer when it thinks the mdio bus
+ * multiplexer needs to switch.
+ * 'current_child' is the current value of the mux register
+ * 'desired_child' is the value of the 'reg' property of the target child MDIO
+ * node.
+ * The first time this function is called, current_child == -1.
+ * If current_child == desired_child, then the mux is already set to the
+ * correct bus.
+ *
+ * Note that we do not use reg/mask like mdio-mux-mmioreg because we need to
+ * know easily which bus is used (reset must be done only for desired bus).
+ */
+static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
+void *data)
+{
+   struct stmmac_priv *priv = data;
+   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+   u32 reg, val;
+   int ret = 0;
+   bool need_reset = false;
+
+   if (current_child ^ desired_child) {
+   regmap_read(gmac->regmap, SYSCON_EMAC_REG, );
+   switch (desired_child) {
+   case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID:
+   dev_info(priv->device, "Switch mux to internal PHY");
+   val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
+   if (gmac->use_internal_phy)
+   need_reset = true;
+   break;
+   case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID:
+   dev_info(priv->device, "Switch mux to external PHY");
+   val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
+   if (!gmac->use_internal_phy)
+   need_reset = true;
+   break;
+   default:
+   dev_err(priv->device, "Invalid child id %x\n", 
desired_child);
+   return -EINVAL;
+   }
+   regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
+   /* After changing syscon value, the MAC need reset or it will 
use
+* the last value (and so the last PHY set).
+* Reset is necessary only when we reach the needed MDIO,
+* it timeout in other case.
+*/
+   if (need_reset)
+   ret = sun8i_dwmac_reset(priv);
+   else
+   dev_dbg(priv->device, "skipped reset\n");
+   }
+   return ret;
+}
+
+static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
+{
+ 

[PATCH v6 09/11] net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated

[Corentin Labbe]

The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.

This patch adds a new way to find if the PHY is internal, via
the phy-is-integrated property.

Since the internal_phy variable does not need anymore to contain the xMII mode
used by the internal PHY, it is still used for knowing the presence of an
internal PHY, so it is modified to a boolean soc_has_internal_phy.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Chen-Yu Tsai <w...@csie.org>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index fffd6d5fc907..672553b652bd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -41,14 +41,14 @@
  * This value is used for disabling properly EMAC
  * and used as a good starting value in case of the
  * boot process(uboot) leave some stuff.
- * @internal_phy:  Does the MAC embed an internal PHY
+ * @soc_has_internal_phy:  Does the MAC embed an internal PHY
  * @support_mii:   Does the MAC handle MII
  * @support_rmii:  Does the MAC handle RMII
  * @support_rgmii: Does the MAC handle RGMII
  */
 struct emac_variant {
u32 default_syscon_value;
-   int internal_phy;
+   bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -75,7 +75,7 @@ struct sunxi_priv_data {
 
 static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +83,20 @@ static const struct emac_variant emac_variant_h3 = {
 
 static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true
 };
 
 static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
 };
 
 static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -648,7 +648,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
 "Current syscon value is not the default %x (expect 
%x)\n",
 val, reg);
 
-   if (gmac->variant->internal_phy) {
+   if (gmac->variant->soc_has_internal_phy) {
if (!gmac->use_internal_phy) {
/* switch to external PHY interface */
reg &= ~H3_EPHY_SELECT;
@@ -932,7 +932,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
}
 
plat_dat->interface = of_get_phy_mode(dev->of_node);
-   if (plat_dat->interface == gmac->variant->internal_phy) {
+   if (of_property_read_bool(plat_dat->phy_node, "phy-is-integrated")) {
dev_info(>dev, "Will use internal PHY\n");
gmac->use_internal_phy = true;
gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
-- 
2.13.5

[PATCH v6 11/11] of: mdio: Prevent of_mdiobus_register from scanning mdio-mux nodes

[Corentin Labbe]

Each child node of an MDIO node is scanned as a PHY when calling
of_mdiobus_register() givint the following result:
[   18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has 
invalid PHY address
[   18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0
[   18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1
[...]
[   18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30
[   18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31

Since mdio-mux nodes are not PHY, this patch a way to to not scan
them.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/of/of_mdio.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
index d94dd8b77abd..d90ddb0d90f2 100644
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -190,6 +190,10 @@ int of_mdiobus_register(struct mii_bus *mdio, struct 
device_node *np)
struct device_node *child;
bool scanphys = false;
int addr, rc;
+   static const struct of_device_id do_not_scan[] = {
+   { .compatible = "mdio-mux" },
+   {}
+   };
 
/* Do not continue if the node is disabled */
if (!of_device_is_available(np))
@@ -212,6 +216,9 @@ int of_mdiobus_register(struct mii_bus *mdio, struct 
device_node *np)
 
/* Loop over the child nodes and register a phy_device for each phy */
for_each_available_child_of_node(np, child) {
+   if (of_match_node(do_not_scan, child))
+   continue;
+
addr = of_mdio_parse_addr(>dev, child);
if (addr < 0) {
scanphys = true;
@@ -229,6 +236,9 @@ int of_mdiobus_register(struct mii_bus *mdio, struct 
device_node *np)
 
/* auto scan for PHYs with empty reg property */
for_each_available_child_of_node(np, child) {
+   if (of_match_node(do_not_scan, child))
+   continue;
+
/* Skip PHYs with reg property set */
if (of_find_property(child, "reg", NULL))
continue;
-- 
2.13.5

Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Tue, Sep 19, 2017 at 09:49:52PM -0500, Rob Herring wrote:
> On Thu, Sep 14, 2017 at 2:19 PM, Andrew Lunn  wrote:
> >> > Is the MDIO controller "allwinner,sun8i-h3-emac" or "snps,dwmac-mdio"?
> >> > If the latter, then I think the node is fine, but then the mux should be
> >> > a child node of it. IOW, the child of an MDIO controller should either
> >> > be a mux node or slave devices.
> >
> > Hi Rob
> >
> > Up until now, children of an MDIO bus have been MDIO devices. Those
> > MDIO devices are either Ethernet PHYs, Ethernet Switches, or the
> > oddball devices that Broadcom iProc has, like generic PHYs.
> >
> > We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO
> > device, and does not have the properties of an MDIO device. It is not
> > addressable on the MDIO bus. The current MUXes are addressed via GPIOs
> > or MMIO.
> 
> The DT parent/child relationship defines the bus topology. We describe
> MDIO buses in that way and if a mux is sitting between the controller
> and the devices, then the DT hierarchy should reflect that. Now
> sometimes we have 2 options for what interface has the parent/child
> relationship (e.g. an I2C controlled USB hub chip), but in this case
> we don't.
> 

Putting mdio-mux as a child of it (the mdio node) give me:
[   18.175338] libphy: stmmac: probed
[   18.175379] mdio_bus stmmac-0: /soc/ethernet@1c3/mdio/mdio-mux has 
invalid PHY address
[   18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0
[   18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1
[   18.175482] mdio_bus stmmac-0: scan phy mdio-mux at address 2
[   18.175513] mdio_bus stmmac-0: scan phy mdio-mux at address 3
[   18.175544] mdio_bus stmmac-0: scan phy mdio-mux at address 4
[   18.175575] mdio_bus stmmac-0: scan phy mdio-mux at address 5
[   18.175607] mdio_bus stmmac-0: scan phy mdio-mux at address 6
[   18.175638] mdio_bus stmmac-0: scan phy mdio-mux at address 7
[   18.175669] mdio_bus stmmac-0: scan phy mdio-mux at address 8
[   18.175700] mdio_bus stmmac-0: scan phy mdio-mux at address 9
[   18.175731] mdio_bus stmmac-0: scan phy mdio-mux at address 10
[   18.175762] mdio_bus stmmac-0: scan phy mdio-mux at address 11
[   18.175795] mdio_bus stmmac-0: scan phy mdio-mux at address 12
[   18.175827] mdio_bus stmmac-0: scan phy mdio-mux at address 13
[   18.175858] mdio_bus stmmac-0: scan phy mdio-mux at address 14
[   18.175889] mdio_bus stmmac-0: scan phy mdio-mux at address 15
[   18.175919] mdio_bus stmmac-0: scan phy mdio-mux at address 16
[   18.175951] mdio_bus stmmac-0: scan phy mdio-mux at address 17
[   18.175982] mdio_bus stmmac-0: scan phy mdio-mux at address 18
[   18.176014] mdio_bus stmmac-0: scan phy mdio-mux at address 19
[   18.176045] mdio_bus stmmac-0: scan phy mdio-mux at address 20
[   18.176076] mdio_bus stmmac-0: scan phy mdio-mux at address 21
[   18.176107] mdio_bus stmmac-0: scan phy mdio-mux at address 22
[   18.176139] mdio_bus stmmac-0: scan phy mdio-mux at address 23
[   18.176170] mdio_bus stmmac-0: scan phy mdio-mux at address 24
[   18.176202] mdio_bus stmmac-0: scan phy mdio-mux at address 25
[   18.176233] mdio_bus stmmac-0: scan phy mdio-mux at address 26
[   18.176271] mdio_bus stmmac-0: scan phy mdio-mux at address 27
[   18.176320] mdio_bus stmmac-0: scan phy mdio-mux at address 28
[   18.176371] mdio_bus stmmac-0: scan phy mdio-mux at address 29
[   18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30
[   18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31

Adding a fake  to mdio-mux remove it, but I found that a bit ugly.
Or perhaps patching of_mdiobus_register() to not scan node with compatible 
"mdio-mux".

What do you think ?

Regards

Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Thu, Sep 14, 2017 at 09:19:49PM +0200, Andrew Lunn wrote:
> > > Is the MDIO controller "allwinner,sun8i-h3-emac" or "snps,dwmac-mdio"? 
> > > If the latter, then I think the node is fine, but then the mux should be 
> > > a child node of it. IOW, the child of an MDIO controller should either 
> > > be a mux node or slave devices.
> 
> Hi Rob
> 
> Up until now, children of an MDIO bus have been MDIO devices. Those
> MDIO devices are either Ethernet PHYs, Ethernet Switches, or the
> oddball devices that Broadcom iProc has, like generic PHYs.
> 
> We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO
> device, and does not have the properties of an MDIO device. It is not
> addressable on the MDIO bus. The current MUXes are addressed via GPIOs
> or MMIO.
> 
> There other similar cases. i2c-mux-gpio is not a child of an i2c bus,
> nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c
> bus, because it is an i2c device itself...
> 
> If the MDIO mux was an MDIO device, i would agree with you. Bit it is
> not, so lets not make it a child.
> 
>   Andrew

Hello Rob, could you anwser/confirm please.
I wait on this for sending the next version.

Thanks
Regards
Corentin Labbe

[PATCH v2] net: stmmac: dwmac-sun8i: Use reset exclusive

[Corentin Labbe]

The current dwmac_sun8i module cannot be rmmod/modprobe due to that
the reset controller was not released when removed.

This patch remove ambiguity, by using of_reset_control_get_exclusive and
add the missing reset_control_put().

Note that we cannot use devm_reset_control_get, since the reset is not
in the device node.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
Changes since v1:
- added a note about devm_reset_control_get in commit message

 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 57bb6dd7b401..1736d7cb0d96 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -854,6 +854,7 @@ static int sun8i_dwmac_unpower_internal_phy(struct 
sunxi_priv_data *gmac)
 
clk_disable_unprepare(gmac->ephy_clk);
reset_control_assert(gmac->rst_ephy);
+   reset_control_put(gmac->rst_ephy);
return 0;
 }
 
@@ -1010,7 +1011,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
return -EINVAL;
}
 
-   gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL);
+   gmac->rst_ephy = 
of_reset_control_get_exclusive(plat_dat->phy_node, NULL);
if (IS_ERR(gmac->rst_ephy)) {
ret = PTR_ERR(gmac->rst_ephy);
if (ret == -EPROBE_DEFER)
-- 
2.13.5

[PATCH] vsock: vmci: Remove unneeded linux/miscdevice.h include

[Corentin Labbe]

net/vmw_vsock/vmci_transport.c does not use any miscdevice so this patch
remove this unnecessary inclusion.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 net/vmw_vsock/vmci_transport.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/net/vmw_vsock/vmci_transport.c b/net/vmw_vsock/vmci_transport.c
index 10ae7823a19d..0206155bff53 100644
--- a/net/vmw_vsock/vmci_transport.c
+++ b/net/vmw_vsock/vmci_transport.c
@@ -21,7 +21,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.13.5

[PATCH] vhost: remove unneeded linux/miscdevice.h include

[Corentin Labbe]

drivers/vhost/vhost.c does not use any miscdevice, so this patch
remove this unnecessary inclusion.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/vhost/vhost.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
index 33ac2b186b85..33ab839696f9 100644
--- a/drivers/vhost/vhost.c
+++ b/drivers/vhost/vhost.c
@@ -16,7 +16,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.13.5

Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Wed, Sep 13, 2017 at 01:20:04PM -0500, Rob Herring wrote:
> On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote:
> > On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:
> > > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:
> > > > This patch add documentation about the MDIO switch used on sun8i-h3-emac
> > > > for integrated PHY.
> > > > 
> > > > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > > > ---
> > > >  .../devicetree/bindings/net/dwmac-sun8i.txt| 127 
> > > > +++--
> > > >  1 file changed, 120 insertions(+), 7 deletions(-)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
> > > > b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > > > index 725f3b187886..3fa0e54825ea 100644
> > > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:
> > > >  - allwinner,leds-active-low: EPHY LEDs are active low
> > > >  
> > > >  Required child node of emac:
> > > > -- mdio bus node: should be named mdio
> > > > +- mdio bus node: should be labelled mdio
> > > 
> > > labels do not end up in the final DT (while the names do) so why are
> > > you making this change?
> > > 
> > 
> > I misunderstood label/name.
> > Anyway, this contrainst should leave due to "snps,dwmac-mdio MDIOs are 
> > automatically registered"
> > 
> > > >  
> > > >  Required properties of the mdio node:
> > > >  - #address-cells: shall be 1
> > > > @@ -48,14 +48,28 @@ Required properties of the mdio node:
> > > >  The device node referenced by "phy" or "phy-handle" should be a child 
> > > > node
> > > >  of the mdio node. See phy.txt for the generic PHY bindings.
> > > >  
> > > > -Required properties of the phy node with the following compatibles:
> > > > +The following compatibles require an mdio-mux node called "mdio-mux":
> > > > +  - "allwinner,sun8i-h3-emac"
> > > > +  - "allwinner,sun8i-v3s-emac":
> > > > +Required properties for the mdio-mux node:
> > > > +  - compatible = "mdio-mux"
> > > > +  - one child mdio for the integrated mdio
> > > > +  - one child mdio for the external mdio if present (V3s have none)
> > > > +Required properties for the mdio-mux children node:
> > > > +  - reg: 0 for internal MDIO bus, 1 for external MDIO bus
> > > > +
> > > > +The following compatibles require a PHY node representing the 
> > > > integrated
> > > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:
> > > >- "allwinner,sun8i-h3-emac",
> > > >- "allwinner,sun8i-v3s-emac":
> > > > +
> > > > +Required properties of the integrated phy node:
> > > >  - clocks: a phandle to the reference clock for the EPHY
> > > >  - resets: a phandle to the reset control for the EPHY
> > > > +- phy-is-integrated
> > > > +- Should be a child of the integrated mdio
> > > 
> > > I'm not sure what you mean by that, you ask that it should (so not
> > > required?) be a child of the integrated mdio...
> > > 
> > 
> > I will change words to "must"
> > 
> > > >  
> > > > -Example:
> > > > -
> > > > +Example with integrated PHY:
> > > >  emac: ethernet@1c0b000 {
> > > > compatible = "allwinner,sun8i-h3-emac";
> > > > syscon = <>;
> > > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {
> > > > phy-handle = <_mii_phy>;
> > > > phy-mode = "mii";
> > > > allwinner,leds-active-low;
> > > > +
> > > > +   mdio0: mdio {
> > > 
> > > (You don't label it mdio here, unlike what was asked before)
> > > 
> > > > +   #address-cells = <1>;
> > > > +   #size-cells = <0>;
> > > > +   compatible = "snps,dwmac-mdio";
> > > > +   };
> > > 
> > > I think Rob wanted that node gone?
> > >

Re: [PATCH v5 02/10] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

On Wed, Sep 13, 2017 at 01:07:34PM -0500, Rob Herring wrote:
> On Fri, Sep 08, 2017 at 09:11:48AM +0200, Corentin Labbe wrote:
> > This patch restore dt-bindings documentation about dwmac-sun8i
> > This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
> > binding")
> 
> Why?
> 

I have put the reason in cover-letter and forget to put it in here also.
I fix that in next series.

Thanks

Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

On Mon, Sep 11, 2017 at 10:19:20PM +0200, Andrew Lunn wrote:
> > Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout.
> > So no the CLK/RST are really for the PHY.
> 
> Thanks for trying that.
> 
> You said it was probably during scanning of the bus it times out. What
> address is causing the timeout? 0 or 1? If the internal bus can only
> have one PHY on it, maybe we need to set bus->phy_mask to 0x1?
> 

I have added a trace in begin and end of stmmac_mdio_read()

[   18.145451] libphy: stmmac: probed
[   18.148398] libphy: mdio_mux: probed
[   18.148650] dwmac-sun8i 1c3.ethernet: Switch mux to internal PHY
[   18.248751] dwmac-sun8i 1c3.ethernet: EMAC reset timeout
[   18.249297] libphy: mdio_mux: probed
[   18.249362] dwmac-sun8i 1c3.ethernet: Switch mux to external PHY
[   18.249391] stmmac_mdio_read 0 2
[   18.249598] stmmac_mdio_read 0 2 1c
[   18.249623] stmmac_mdio_read 0 3
[   18.249811] stmmac_mdio_read 0 3 c915
[   20.737271] EXT4-fs (mmcblk0p1): re-mounted. Opts: (null)
[   31.294868] stmmac_mdio_read 0 0
[   31.295311] stmmac_mdio_read 0 0 1140

It seems that the timeout is unrelated to MDIO bus.

Regards

Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

On Mon, Sep 11, 2017 at 06:11:24PM +0200, Andrew Lunn wrote:
> On Fri, Sep 08, 2017 at 04:28:25PM +0200, Corentin Labbe wrote:
> > On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote:
> > > > > Do you know why the reset times out/fails?
> > > > > 
> > > > 
> > > > Because there are nothing connected to it.
> > > 
> > > That should not be an issue. A read should just return 0x.  And it
> > > should return 0x fast. The timing of the MDIO protocol is fixed. A
> > > read or a write takes a fixed number of cycles, independent of if
> > > there is a device there or not. The bus data line has a pullup, so if
> > > you try to access a missing device, you automatically read 0x.
> > > 
> > 
> > Perhaps, but the reality is that with nothing connected to it, the reset of 
> > the MAC timeout.
> > Certainly, the MAC does not support finding no PHY.
> 
> Are you sure this is not because of the clock and reset?
> 
> +   #address-cells = <1>;
> +   #size-cells = <0>;
> +   int_mii_phy: ethernet-phy@1 {
> +   compatible = 
> "ethernet-phy-ieee802.3-c22";
> +   reg = <1>;
> +   clocks = < CLK_BUS_EPHY>;
> +   resets = < RST_BUS_EPHY>;
> 
> The way you describe it here, the clock and reset are for the PHY. But
> maybe it is actually for the bus? I can understand a bus timing out if
> it has no clock, or it is held in reset. Try enabling the clock and
> reset when the internal bus is selected, not when the PHY on the bus
> is selected.
> 

Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout.
So no the CLK/RST are really for the PHY.

Regards

PS: patch and result with "integrated CLK/RST always on"
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -659,7 +659,7 @@ static int mdio_mux_syscon_switch_fn(int current_child, int 
desired_child,
struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
u32 reg, val;
int ret = 0;
-   bool need_reset = false;
+   bool need_reset = true;
 
if (current_child ^ desired_child) {
regmap_read(gmac->regmap, SYSCON_EMAC_REG, );
@@ -824,7 +824,7 @@ static int sun8i_dwmac_power_internal_phy(struct 
stmmac_priv *priv)
int ret;
 
if (!gmac->use_internal_phy)
-   return 0;
+   dev_info(priv->device, "IPHY BYPASS\n");
 
ret = clk_prepare_enable(gmac->ephy_clk);
if (ret) {

[   18.057162] dwmac-sun8i 1c3.ethernet: Will use external PHY
[   18.183789] dwmac-sun8i 1c3.ethernet: IPHY BYPASS
[   18.184136] dwmac-sun8i 1c3.ethernet: Chain mode enabled
[   18.184158] dwmac-sun8i 1c3.ethernet: No HW DMA feature register 
supported
[   18.184175] dwmac-sun8i 1c3.ethernet: Normal descriptors
[   18.184192] dwmac-sun8i 1c3.ethernet: RX Checksum Offload Engine 
supported
[   18.184214] dwmac-sun8i 1c3.ethernet: COE Type 2
[   18.184231] dwmac-sun8i 1c3.ethernet: TX Checksum insertion supported
[   18.185491] libphy: stmmac: probed
[   18.188481] libphy: mdio_mux: probed
[   18.188831] dwmac-sun8i 1c3.ethernet: Switch mux to internal PHY
[   18.288981] dwmac-sun8i 1c3.ethernet: EMAC reset timeout
[   18.289559] libphy: mdio_mux: probed
[   18.289629] dwmac-sun8i 1c3.ethernet: Switch mux to external PHY
[   20.578316] EXT4-fs (mmcblk0p1): re-mounted. Opts: (null)
[   31.240650] RTL8211E Gigabit Ethernet 0.1:00: attached PHY driver [RTL8211E 
Gigabit Ethernet] (mii_bus:phy_addr=0.1:00, irq=POLL)

Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

On Fri, Sep 08, 2017 at 03:39:04PM +0800, Chen-Yu Tsai wrote:
> On Fri, Sep 8, 2017 at 3:36 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote:
> >> On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote:
> >> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts 
> >> > b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> >> > index 1c2387bd5df6..968908761194 100644
> >> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> >> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> >> > @@ -50,6 +50,7 @@
> >> > compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
> >> >
> >> > aliases {
> >> > +   ethernet0 = 
> >> > serial0 = 
> >> > };
> >> >
> >> > @@ -108,6 +109,22 @@
> >> > status = "okay";
> >> >  };
> >> >
> >> > + {
> >> > +   pinctrl-names = "default";
> >> > +   pinctrl-0 = <_rgmii_pins>;
> >> > +   phy-supply = <_gmac_3v3>;
> >> > +   phy-handle = <_rgmii_phy>;
> >> > +   phy-mode = "rgmii";
> >> > +   status = "okay";
> >> > +};
> >> > +
> >> > + {
> >> > +   ext_rgmii_phy: ethernet-phy@7 {
> >> > +   compatible = "ethernet-phy-ieee802.3-c22";
> >> > +   reg = <7>;
> >> > +   };
> >> > +};
> >> > +
> >>
> >> This won't compile, you don't have that node in the H5 DTSI.
> >>
> >
> > Since H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles.
> > Furthermore, I restested just now and confirm, it compiles fine.
> 
> The order of your patches are wrong. No individual patch should
> introduce build failures, not just the whole patch series.
> 

Yes, I just miss-understood the reason of build failure.
I will fix the order in the next serie.

Thanks
Corentin Labbe

Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote:
> > > Do you know why the reset times out/fails?
> > > 
> > 
> > Because there are nothing connected to it.
> 
> That should not be an issue. A read should just return 0x.  And it
> should return 0x fast. The timing of the MDIO protocol is fixed. A
> read or a write takes a fixed number of cycles, independent of if
> there is a device there or not. The bus data line has a pullup, so if
> you try to access a missing device, you automatically read 0x.
> 

Perhaps, but the reality is that with nothing connected to it, the reset of the 
MAC timeout.
Certainly, the MAC does not support finding no PHY.

So, to prevent an error message, and a "freeze" of the net process, the 
need_reset trick is necessary.

Regards
Corentin Labbe

Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

On Fri, Sep 08, 2017 at 04:00:20PM +0200, Andrew Lunn wrote:
> > > > +static int mdio_mux_syscon_switch_fn(int current_child, int 
> > > > desired_child,
> > > > +void *data)
> > > > +{
> > > > +   struct stmmac_priv *priv = data;
> > > > +   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> > > > +   u32 reg, val;
> > > > +   int ret = 0;
> > > > +   bool need_reset = false;
> > > > +
> > > > +   if (current_child ^ desired_child) {
> > > > +   regmap_read(gmac->regmap, SYSCON_EMAC_REG, );
> > > > +   switch (desired_child) {
> > > > +   case DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:
> > > > +   dev_info(priv->device, "Switch mux to internal 
> > > > PHY");
> > > > +   val = (reg & ~H3_EPHY_MUX_MASK) | 
> > > > H3_EPHY_SELECT;
> > > > +   if (gmac->use_internal_phy)
> > > > +   need_reset = true;
> > > > +   break;
> > > 
> > > This i don't get. Why do you need use_internal_phy? Isn't that
> > > implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to
> > > use an external PHY on the internal MDIO bus?
> > > 
> > 
> > On my H3 box with external PHY, the MDIO mux library first select (for scan 
> > ?) the internal MDIO.
> > Without use_internal_phy usage, this board will launch a reset to use the 
> > internal MDIO... and this reset timeout/fail.
> 
> Do you know why the reset times out/fails?
> 

Because there are nothing connected to it.
I got also reset timeout on integrated MDIO when the integrated PHY is not 
powered.

Re: [PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

On Fri, Sep 08, 2017 at 03:05:20PM +0200, Andrew Lunn wrote:
> > +#define DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID   0
> > +#define DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID   1
> >  
> >  /* H3/A64 specific bits */
> >  #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides 
> > EPIT) */
> > @@ -634,6 +639,76 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
> > return 0;
> >  }
> >  
> > +/* MDIO multiplexing switch function
> > + * This function is called by the mdio-mux layer when it thinks the mdio 
> > bus
> > + * multiplexer needs to switch.
> > + * 'current_child' is the current value of the mux register
> > + * 'desired_child' is the value of the 'reg' property of the target child 
> > MDIO
> > + * node.
> > + * The first time this function is called, current_child == -1.
> > + * If current_child == desired_child, then the mux is already set to the
> > + * correct bus.
> > + *
> > + * Note that we do not use reg/mask like mdio-mux-mmioreg because we need 
> > to
> > + * know easily which bus is used (reset must be done only for desired bus).
> > + */
> > +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
> > +void *data)
> > +{
> > +   struct stmmac_priv *priv = data;
> > +   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
> > +   u32 reg, val;
> > +   int ret = 0;
> > +   bool need_reset = false;
> > +
> > +   if (current_child ^ desired_child) {
> > +   regmap_read(gmac->regmap, SYSCON_EMAC_REG, );
> > +   switch (desired_child) {
> > +   case DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:
> > +   dev_info(priv->device, "Switch mux to internal PHY");
> > +   val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
> > +   if (gmac->use_internal_phy)
> > +   need_reset = true;
> > +   break;
> 
> This i don't get. Why do you need use_internal_phy? Isn't that
> implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to
> use an external PHY on the internal MDIO bus?
> 

On my H3 box with external PHY, the MDIO mux library first select (for scan ?) 
the internal MDIO.
Without use_internal_phy usage, this board will launch a reset to use the 
internal MDIO... and this reset timeout/fail.
After the MDIO mux select the external MDIO.

> > +   case DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID:
> > +   dev_info(priv->device, "Switch mux to external PHY");
> > +   val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
> > +   if (!gmac->use_internal_phy)
> > +   need_reset = true;
> > +   break;
> 
> And is it possible to use the internal PHY on the external bus?
> 

I need to check that.

Regards

Re: [PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote:
> On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote:
> > This patch add documentation about the MDIO switch used on sun8i-h3-emac
> > for integrated PHY.
> > 
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
> >  .../devicetree/bindings/net/dwmac-sun8i.txt| 127 
> > +++--
> >  1 file changed, 120 insertions(+), 7 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
> > b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > index 725f3b187886..3fa0e54825ea 100644
> > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
> > @@ -39,7 +39,7 @@ Optional properties for the following compatibles:
> >  - allwinner,leds-active-low: EPHY LEDs are active low
> >  
> >  Required child node of emac:
> > -- mdio bus node: should be named mdio
> > +- mdio bus node: should be labelled mdio
> 
> labels do not end up in the final DT (while the names do) so why are
> you making this change?
> 

I misunderstood label/name.
Anyway, this contrainst should leave due to "snps,dwmac-mdio MDIOs are 
automatically registered"

> >  
> >  Required properties of the mdio node:
> >  - #address-cells: shall be 1
> > @@ -48,14 +48,28 @@ Required properties of the mdio node:
> >  The device node referenced by "phy" or "phy-handle" should be a child node
> >  of the mdio node. See phy.txt for the generic PHY bindings.
> >  
> > -Required properties of the phy node with the following compatibles:
> > +The following compatibles require an mdio-mux node called "mdio-mux":
> > +  - "allwinner,sun8i-h3-emac"
> > +  - "allwinner,sun8i-v3s-emac":
> > +Required properties for the mdio-mux node:
> > +  - compatible = "mdio-mux"
> > +  - one child mdio for the integrated mdio
> > +  - one child mdio for the external mdio if present (V3s have none)
> > +Required properties for the mdio-mux children node:
> > +  - reg: 0 for internal MDIO bus, 1 for external MDIO bus
> > +
> > +The following compatibles require a PHY node representing the integrated
> > +PHY, under the integrated MDIO bus node if an mdio-mux node is used:
> >- "allwinner,sun8i-h3-emac",
> >- "allwinner,sun8i-v3s-emac":
> > +
> > +Required properties of the integrated phy node:
> >  - clocks: a phandle to the reference clock for the EPHY
> >  - resets: a phandle to the reset control for the EPHY
> > +- phy-is-integrated
> > +- Should be a child of the integrated mdio
> 
> I'm not sure what you mean by that, you ask that it should (so not
> required?) be a child of the integrated mdio...
> 

I will change words to "must"

> >  
> > -Example:
> > -
> > +Example with integrated PHY:
> >  emac: ethernet@1c0b000 {
> > compatible = "allwinner,sun8i-h3-emac";
> > syscon = <>;
> > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {
> > phy-handle = <_mii_phy>;
> > phy-mode = "mii";
> > allwinner,leds-active-low;
> > +
> > +   mdio0: mdio {
> 
> (You don't label it mdio here, unlike what was asked before)
> 
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   compatible = "snps,dwmac-mdio";
> > +   };
> 
> I think Rob wanted that node gone?
> 

MDIO mux does not work without a parent MDIO, either gived by "parent-bus" or 
directly via mdio_mux_init() (like it is the case in dwmac-sun8i)

> > +   mdio-mux {
> > +   compatible = "mdio-mux";
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +
> > +   int_mdio: mdio@1 {
> > +   reg = <0>;
> > +   #address-cells = <1>;
> > +   #size-cells = <0>;
> > +   int_mii_phy: ethernet-phy@1 {
> > +   reg = <1>;
> > +   clocks = < CLK_BUS_EPHY>;
> > +   resets = < RST_BUS_EPHY>;
> > +   phy-is-integrated
> > +   };
> > +   };
> 
> ... And in your example it's a child of the mdio mux?
> 

So I confirm, integrated PHY must be a child of integrated MDIO (that must be a 
child of mdio-mux).
The e

Re: [PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote:
> On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote:
> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts 
> > b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> > index 1c2387bd5df6..968908761194 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
> > @@ -50,6 +50,7 @@
> > compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
> >  
> > aliases {
> > +   ethernet0 = 
> > serial0 = 
> > };
> >  
> > @@ -108,6 +109,22 @@
> > status = "okay";
> >  };
> >  
> > + {
> > +   pinctrl-names = "default";
> > +   pinctrl-0 = <_rgmii_pins>;
> > +   phy-supply = <_gmac_3v3>;
> > +   phy-handle = <_rgmii_phy>;
> > +   phy-mode = "rgmii";
> > +   status = "okay";
> > +};
> > +
> > + {
> > +   ext_rgmii_phy: ethernet-phy@7 {
> > +   compatible = "ethernet-phy-ieee802.3-c22";
> > +   reg = <7>;
> > +   };
> > +};
> > +
> 
> This won't compile, you don't have that node in the H5 DTSI.
> 

Since H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles.
Furthermore, I restested just now and confirm, it compiles fine.

Regards

[PATCH v5 01/10] arm64: dts: allwinner: Restore EMAC changes

[Corentin Labbe]

This patch restore arm64 DT about dwmac-sun8i
This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts   | 16 
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts| 15 +++
 arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts  | 17 +
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts| 16 
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi| 20 
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts| 17 +
 .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts  | 17 +
 8 files changed, 135 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
index d347f52e27f6..45bdbfb96126 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
@@ -51,6 +51,7 @@
compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -69,6 +70,14 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -79,6 +88,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
index f82ccf332c0f..24f1aac366d6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts
@@ -48,3 +48,18 @@
 
/* TODO: Camera, touchscreen, etc. */
 };
+
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index caf8b6fbe5e3..6f209bb10a2f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -51,6 +51,7 @@
compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
serial2 = 
@@ -78,6 +79,15 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rmii";
+   phy-handle = <_rmii_phy1>;
+   status = "okay";
+
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
@@ -88,6 +98,13 @@
bias-pull-up;
 };
 
+ {
+   ext_rmii_phy1: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts 
b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 17ccc12b58df..0eb2acedf8c3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -53,6 +53,7 @@
 "allwinner,sun50i-a64";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -76,6 +77,21 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   phy-mode = "rgmii";
+   phy-handle = <_rgmii_phy>;
+   status = "okay";
+};
+
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins>;
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a

[PATCH v5 00/10] net: stmmac: dwmac-sun8i: Handle integrated PHY

[Corentin Labbe]

Hello

The current way to find if the PHY is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the integrated one.

This patchs series adds a new way to find if the PHY is integrated, via
the phy-is-integrated DT property.

Since it exists both integrated and external ethernet-phy@1, they are merged in
the final DTB and so share all properties.
For avoiding this, and better represent the reality, we use a MDIO mux.

The first try was to create a new MDIO mux "mdio-mux-syscon".
mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception
that the register is used via syscon/regmap.
But this solution does not work for two reason:
- changing the MDIO selection need the reset of MAC which cannot be done by the
mdio-mux-syscon driver
- There were driver loading order problem:
- mdio-mux-syscon needing that stmmac register the parent MDIO
- stmmac needing that child MDIO was registered just after registering 
parent MDIO

So we cannot use any external MDIO-mux.

The final solution was to represent a mdio-mux and let the MAC handle all 
things.
Note that phy-is-integrated is still needed (even if we use a MDIO mux) since
some properties apply only on integrated PHY and we need to know the final MDIO
bus in mdio_mux_syscon_switch_fn().

Since DT bits was reverted in 4.13, this patch series include the revert of the 
revert.
So
- the first four patchs bring back DT/stmmac stuff that was in 4.13 (and 
reverted)
- fifth patch document how DT MDIO mux is implemented
- patch 6 and 7 modify DT
- patch 8, 9, 10 Modify stmmac according to the new bindings

I have let patch splited for easy review. (for seeing what's new)
But the final serie could have some patch squashed if someone want.
Like squashing patch and 2 and 5 (documentation)

Since DT worked well in 4.13, could it be targeted for 4.14 ?
If necessary I could split this serie in two:
- bring back A64/A83T (patchs 1, 2, 4, 7, 9)
- add MXIO-mux and H3 (patchs 3, 4, 5, 6, 8, 10)

Regards

Changes since v4:
- Update documentation for new bindings
- Added 4 patchs for bring back reverted stuff of 4.13
- dwmac-sun8i now handle mdio-mux
- MDIO use now compatible = "snps,dwmac-mdio";

Changes since v3:
- Added a patch for handling fixed-link
- Updated documentation

Changes since v2:
- Add a MDIO mux for creating distinction between integrated and external MDIO.
- phy-is-integrated is not set in dtsi.

Changes since v1:
- Dropped phy-is-integrated documentation patch since another same patch was 
already merged
- Moved phy-is-integrated from SoC dtsi to final board DT.


Corentin Labbe (10):
  arm64: dts: allwinner: Restore EMAC changes
  dt-bindings: net: Restore sun8i dwmac binding
  arm: dts: sunxi: Restore EMAC changes
  net: stmmac: sun8i: Restore the compatibles
  dt-bindings: net: dwmac-sun8i: update documentation about integrated
PHY
  ARM: dts: sunxi: h3/h5: represent the mdio switch used by
sun8i-h3-emac
  arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio
  net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated
  net: stmmac: snps,dwmac-mdio MDIOs are automatically registered
  net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

 .../devicetree/bindings/net/dwmac-sun8i.txt| 197 +
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts  |   9 +
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts|  19 ++
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts  |   7 +
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts  |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts|   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts|   5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts |   8 +
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts   |  22 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts |  16 ++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi |  46 +
 .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts |  16 ++
 .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts  |  15 ++
 .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts |  17 ++
 .../dts/allwinner/sun50i-a64-sopine-baseboard.dts  |  16 ++
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi  |  21 +++
 .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts   |  17 ++
 .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts  |  17 ++
 .../dts/allwinner/sun50i-h5-orangepi-prime.dts |  17 ++
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c  | 140 ---
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   4 -
 22 files changed, 601 insertions(+), 25 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

-- 
2.13.5

[PATCH v5 03/10] arm: dts: sunxi: Restore EMAC changes

[Corentin Labbe]

This patch restore arm DT about dwmac-sun8i
This reverts commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts |  9 
 arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts   | 19 +
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts |  7 ++
 arch/arm/boot/dts/sun8i-h3-orangepi-2.dts |  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-one.dts   |  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts   |  5 +
 arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts|  8 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts  | 22 +++
 arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts| 16 ++
 arch/arm/boot/dts/sunxi-h3-h5.dtsi| 26 +++
 10 files changed, 128 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts 
b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index b1502df7b509..6713d0f2b3f4 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -56,6 +56,8 @@
 
aliases {
serial0 = 
+   /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -102,6 +104,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts 
b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index a337af1de322..d756ff825116 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -52,6 +52,7 @@
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
serial1 = 
};
@@ -114,12 +115,30 @@
status = "okay";
 };
 
+ {
+   pinctrl-names = "default";
+   pinctrl-0 = <_rgmii_pins>;
+   phy-supply = <_gmac_3v3>;
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
status = "okay";
 };
 
+ {
+   ext_rgmii_phy: ethernet-phy@1 {
+   compatible = "ethernet-phy-ieee802.3-c22";
+   reg = <0>;
+   };
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts 
b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 8d2cc6e9a03f..78f6c24952dd 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -46,3 +46,10 @@
model = "FriendlyARM NanoPi NEO";
compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
+
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 8ff71b1bb45b..17cdeae19c6f 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -54,6 +54,7 @@
aliases {
serial0 = 
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
+   ethernet0 = 
ethernet1 = 
};
 
@@ -117,6 +118,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>;
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts 
b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
index 5fea430e0eb1..6880268e8b87 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
@@ -52,6 +52,7 @@
compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3";
 
aliases {
+   ethernet0 = 
serial0 = 
};
 
@@ -97,6 +98,13 @@
status = "okay";
 };
 
+ {
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   status = "okay";
+};
+
  {
pinctrl-names = "default";
pinctrl-0 = <_pins_a>, <_cd_pin>;
diff --gi

[PATCH v5 04/10] net: stmmac: sun8i: Restore the compatibles

[Corentin Labbe]

This patch restore compatibles about dwmac-sun8i
This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 39c2122a4f26..fffd6d5fc907 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id sun8i_dwmac_match[] = {
+   { .compatible = "allwinner,sun8i-h3-emac",
+   .data = _variant_h3 },
+   { .compatible = "allwinner,sun8i-v3s-emac",
+   .data = _variant_v3s },
+   { .compatible = "allwinner,sun8i-a83t-emac",
+   .data = _variant_a83t },
+   { .compatible = "allwinner,sun50i-a64-emac",
+   .data = _variant_a64 },
{ }
 };
 MODULE_DEVICE_TABLE(of, sun8i_dwmac_match);
-- 
2.13.5

[PATCH v5 02/10] dt-bindings: net: Restore sun8i dwmac binding

[Corentin Labbe]

This patch restore dt-bindings documentation about dwmac-sun8i
This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac 
binding")

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
new file mode 100644
index ..725f3b187886
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -0,0 +1,84 @@
+* Allwinner sun8i GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+- compatible: should be one of the following string:
+   "allwinner,sun8i-a83t-emac"
+   "allwinner,sun8i-h3-emac"
+   "allwinner,sun8i-v3s-emac"
+   "allwinner,sun50i-a64-emac"
+- reg: address and length of the register for the device.
+- interrupts: interrupt for the device
+- interrupt-names: should be "macirq"
+- clocks: A phandle to the reference clock for this device
+- clock-names: should be "stmmaceth"
+- resets: A phandle to the reset control for this device
+- reset-names: should be "stmmaceth"
+- phy-mode: See ethernet.txt
+- phy-handle: See ethernet.txt
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+- syscon: A phandle to the syscon of the SoC with one of the following
+ compatible string:
+  - allwinner,sun8i-h3-system-controller
+  - allwinner,sun8i-v3s-system-controller
+  - allwinner,sun50i-a64-system-controller
+  - allwinner,sun8i-a83t-system-controller
+
+Optional properties:
+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 
0-700. Default is 0)
+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 
0-3100. Default is 0)
+Both delay properties need to be a multiple of 100. They control the delay for
+external PHY.
+
+Optional properties for the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- allwinner,leds-active-low: EPHY LEDs are active low
+
+Required child node of emac:
+- mdio bus node: should be named mdio
+
+Required properties of the mdio node:
+- #address-cells: shall be 1
+- #size-cells: shall be 0
+
+The device node referenced by "phy" or "phy-handle" should be a child node
+of the mdio node. See phy.txt for the generic PHY bindings.
+
+Required properties of the phy node with the following compatibles:
+  - "allwinner,sun8i-h3-emac",
+  - "allwinner,sun8i-v3s-emac":
+- clocks: a phandle to the reference clock for the EPHY
+- resets: a phandle to the reset control for the EPHY
+
+Example:
+
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_mii_phy>;
+   phy-mode = "mii";
+   allwinner,leds-active-low;
+   mdio: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   };
+   };
+};
-- 
2.13.5

[PATCH v5 05/10] dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY

[Corentin Labbe]

This patch add documentation about the MDIO switch used on sun8i-h3-emac
for integrated PHY.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 .../devicetree/bindings/net/dwmac-sun8i.txt| 127 +++--
 1 file changed, 120 insertions(+), 7 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt 
b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
index 725f3b187886..3fa0e54825ea 100644
--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt
@@ -39,7 +39,7 @@ Optional properties for the following compatibles:
 - allwinner,leds-active-low: EPHY LEDs are active low
 
 Required child node of emac:
-- mdio bus node: should be named mdio
+- mdio bus node: should be labelled mdio
 
 Required properties of the mdio node:
 - #address-cells: shall be 1
@@ -48,14 +48,28 @@ Required properties of the mdio node:
 The device node referenced by "phy" or "phy-handle" should be a child node
 of the mdio node. See phy.txt for the generic PHY bindings.
 
-Required properties of the phy node with the following compatibles:
+The following compatibles require an mdio-mux node called "mdio-mux":
+  - "allwinner,sun8i-h3-emac"
+  - "allwinner,sun8i-v3s-emac":
+Required properties for the mdio-mux node:
+  - compatible = "mdio-mux"
+  - one child mdio for the integrated mdio
+  - one child mdio for the external mdio if present (V3s have none)
+Required properties for the mdio-mux children node:
+  - reg: 0 for internal MDIO bus, 1 for external MDIO bus
+
+The following compatibles require a PHY node representing the integrated
+PHY, under the integrated MDIO bus node if an mdio-mux node is used:
   - "allwinner,sun8i-h3-emac",
   - "allwinner,sun8i-v3s-emac":
+
+Required properties of the integrated phy node:
 - clocks: a phandle to the reference clock for the EPHY
 - resets: a phandle to the reset control for the EPHY
+- phy-is-integrated
+- Should be a child of the integrated mdio
 
-Example:
-
+Example with integrated PHY:
 emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <>;
@@ -72,13 +86,112 @@ emac: ethernet@1c0b000 {
phy-handle = <_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
+
+   mdio0: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mdio: mdio@1 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated
+   };
+   };
+   ext_mdio: mdio@0 {
+   reg = <1>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   };
+   };
+};
+
+Example with external PHY:
+emac: ethernet@1c0b000 {
+   compatible = "allwinner,sun8i-h3-emac";
+   syscon = <>;
+   reg = <0x01c0b000 0x104>;
+   interrupts = ;
+   interrupt-names = "macirq";
+   resets = < RST_BUS_EMAC>;
+   reset-names = "stmmaceth";
+   clocks = < CLK_BUS_EMAC>;
+   clock-names = "stmmaceth";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   phy-handle = <_rgmii_phy>;
+   phy-mode = "rgmii";
+   allwinner,leds-active-low;
+
+   mdio0: mdio {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   int_mdio: mdio@1 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated
+   };
+   };
+   ext_mdio: mdio@0 {
+   reg = <1>;
+   

[PATCH v5 07/10] arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 4dd9ffef0d80..5dceebd81f09 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -476,6 +476,7 @@
#size-cells = <0>;
 
mdio: mdio {
+   compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
-- 
2.13.5

[PATCH v5 06/10] ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac

[Corentin Labbe]

Since dwmac-sun8i could use either an integrated PHY or an external PHY
(which could be at same MDIO address), we need to represent this selection
by a MDIO switch.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 arch/arm/boot/dts/sunxi-h3-h5.dtsi | 30 +-
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi 
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 4b599b5d26f6..e137377b312d 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -417,14 +417,34 @@
#size-cells = <0>;
status = "disabled";
 
-   mdio: mdio {
+   mdio0: mdio {
#address-cells = <1>;
#size-cells = <0>;
-   int_mii_phy: ethernet-phy@1 {
-   compatible = 
"ethernet-phy-ieee802.3-c22";
+   compatible = "snps,dwmac-mdio";
+   };
+
+   mdio-mux {
+   compatible = "mdio-mux";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   /* Only one MDIO is usable at the time */
+   internal_mdio: mdio@1 {
+   reg = <0>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   int_mii_phy: ethernet-phy@1 {
+   compatible = 
"ethernet-phy-ieee802.3-c22";
+   reg = <1>;
+   clocks = < CLK_BUS_EPHY>;
+   resets = < RST_BUS_EPHY>;
+   phy-is-integrated;
+   };
+   };
+   mdio: mdio@0 {
reg = <1>;
-   clocks = < CLK_BUS_EPHY>;
-   resets = < RST_BUS_EPHY>;
+   #address-cells = <1>;
+   #size-cells = <0>;
};
};
};
-- 
2.13.5

[PATCH v5 08/10] net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated

[Corentin Labbe]

The current way to find if the phy is internal is to compare DT phy-mode
and emac_variant/internal_phy.
But it will negate a possible future SoC where an external PHY use the
same phy mode than the internal one.

This patch adds a new way to find if the PHY is internal, via
the phy-is-integrated property.

Since the internal_phy variable does not need anymore to contain the xMII mode
used by the internal PHY, it is still used for knowing the presence of an
internal PHY, so it is modified to a boolean soc_has_internal_phy.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Chen-Yu Tsai <w...@csie.org>
Reviewed-by: Florian Fainelli <f.faine...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index fffd6d5fc907..672553b652bd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -41,14 +41,14 @@
  * This value is used for disabling properly EMAC
  * and used as a good starting value in case of the
  * boot process(uboot) leave some stuff.
- * @internal_phy:  Does the MAC embed an internal PHY
+ * @soc_has_internal_phy:  Does the MAC embed an internal PHY
  * @support_mii:   Does the MAC handle MII
  * @support_rmii:  Does the MAC handle RMII
  * @support_rgmii: Does the MAC handle RGMII
  */
 struct emac_variant {
u32 default_syscon_value;
-   int internal_phy;
+   bool soc_has_internal_phy;
bool support_mii;
bool support_rmii;
bool support_rgmii;
@@ -75,7 +75,7 @@ struct sunxi_priv_data {
 
 static const struct emac_variant emac_variant_h3 = {
.default_syscon_value = 0x58000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -83,20 +83,20 @@ static const struct emac_variant emac_variant_h3 = {
 
 static const struct emac_variant emac_variant_v3s = {
.default_syscon_value = 0x38000,
-   .internal_phy = PHY_INTERFACE_MODE_MII,
+   .soc_has_internal_phy = true,
.support_mii = true
 };
 
 static const struct emac_variant emac_variant_a83t = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rgmii = true
 };
 
 static const struct emac_variant emac_variant_a64 = {
.default_syscon_value = 0,
-   .internal_phy = 0,
+   .soc_has_internal_phy = false,
.support_mii = true,
.support_rmii = true,
.support_rgmii = true
@@ -648,7 +648,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv)
 "Current syscon value is not the default %x (expect 
%x)\n",
 val, reg);
 
-   if (gmac->variant->internal_phy) {
+   if (gmac->variant->soc_has_internal_phy) {
if (!gmac->use_internal_phy) {
/* switch to external PHY interface */
reg &= ~H3_EPHY_SELECT;
@@ -932,7 +932,7 @@ static int sun8i_dwmac_probe(struct platform_device *pdev)
}
 
plat_dat->interface = of_get_phy_mode(dev->of_node);
-   if (plat_dat->interface == gmac->variant->internal_phy) {
+   if (of_property_read_bool(plat_dat->phy_node, "phy-is-integrated")) {
dev_info(>dev, "Will use internal PHY\n");
gmac->use_internal_phy = true;
gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0);
-- 
2.13.5

[PATCH v5 09/10] net: stmmac: snps,dwmac-mdio MDIOs are automatically registered

[Corentin Labbe]

stmmac bindings docs said that its mdio node must have
compatible = "snps,dwmac-mdio";
Since dwmac-sun8i does not have any good reasons to not doing it, all
their MDIO node must have it.

Since these compatible is automatically registered, dwmac-sun8i compatible
does not need to be in need_mdio_ids.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index a366b3747eeb..3de5501e34fe 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -311,10 +311,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat,
bool mdio = true;
static const struct of_device_id need_mdio_ids[] = {
{ .compatible = "snps,dwc-qos-ethernet-4.10" },
-   { .compatible = "allwinner,sun8i-a83t-emac" },
-   { .compatible = "allwinner,sun8i-h3-emac" },
-   { .compatible = "allwinner,sun8i-v3s-emac" },
-   { .compatible = "allwinner,sun50i-a64-emac" },
};
 
/* If phy-handle property is passed from DT, use it as the PHY */
-- 
2.13.5

[PATCH v5 10/10] net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs

[Corentin Labbe]

The Allwinner H3 SoC have two distinct MDIO bus, only one could be
active at the same time.
The selection of the active MDIO bus are done via some bits in the EMAC
register of the system controller.

This patch implement this MDIO switch via a custom MDIO-mux.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/ethernet/stmicro/stmmac/Kconfig   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 116 +++---
 2 files changed, 104 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 97035766c291..e28c0d2c58e9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -159,6 +159,7 @@ config DWMAC_SUN8I
tristate "Allwinner sun8i GMAC support"
default ARCH_SUNXI
depends on OF && (ARCH_SUNXI || COMPILE_TEST)
+   select MDIO_BUS_MUX
---help---
  Support for Allwinner H3 A83T A64 EMAC ethernet controllers.
 
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
index 672553b652bd..ddd5695886ac 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
@@ -17,6 +17,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -71,6 +72,7 @@ struct sunxi_priv_data {
const struct emac_variant *variant;
struct regmap *regmap;
bool use_internal_phy;
+   void *mux_handle;
 };
 
 static const struct emac_variant emac_variant_h3 = {
@@ -195,6 +197,9 @@ static const struct emac_variant emac_variant_a64 = {
 #define H3_EPHY_LED_POLBIT(17) /* 1: active low, 0: active 
high */
 #define H3_EPHY_SHUTDOWN   BIT(16) /* 1: shutdown, 0: power up */
 #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
+#define H3_EPHY_MUX_MASK   (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT)
+#define DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID   0
+#define DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID   1
 
 /* H3/A64 specific bits */
 #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */
@@ -634,6 +639,76 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv)
return 0;
 }
 
+/* MDIO multiplexing switch function
+ * This function is called by the mdio-mux layer when it thinks the mdio bus
+ * multiplexer needs to switch.
+ * 'current_child' is the current value of the mux register
+ * 'desired_child' is the value of the 'reg' property of the target child MDIO
+ * node.
+ * The first time this function is called, current_child == -1.
+ * If current_child == desired_child, then the mux is already set to the
+ * correct bus.
+ *
+ * Note that we do not use reg/mask like mdio-mux-mmioreg because we need to
+ * know easily which bus is used (reset must be done only for desired bus).
+ */
+static int mdio_mux_syscon_switch_fn(int current_child, int desired_child,
+void *data)
+{
+   struct stmmac_priv *priv = data;
+   struct sunxi_priv_data *gmac = priv->plat->bsp_priv;
+   u32 reg, val;
+   int ret = 0;
+   bool need_reset = false;
+
+   if (current_child ^ desired_child) {
+   regmap_read(gmac->regmap, SYSCON_EMAC_REG, );
+   switch (desired_child) {
+   case DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID:
+   dev_info(priv->device, "Switch mux to internal PHY");
+   val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT;
+   if (gmac->use_internal_phy)
+   need_reset = true;
+   break;
+   case DWMAC_sUN8I_MDIO_MUX_EXTERNAL_ID:
+   dev_info(priv->device, "Switch mux to external PHY");
+   val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN;
+   if (!gmac->use_internal_phy)
+   need_reset = true;
+   break;
+   default:
+   dev_err(priv->device, "Invalid child id %x\n", 
desired_child);
+   return -EINVAL;
+   }
+   regmap_write(gmac->regmap, SYSCON_EMAC_REG, val);
+   /* After changing syscon value, the MAC need reset or it will 
use
+* the last value (and so the last PHY set).
+* Reset is necessary only when we reach the needed MDIO,
+* it timeout in other case.
+*/
+   if (need_reset)
+   ret = sun8i_dwmac_reset(priv);
+   else
+   dev_dbg(priv->device, "skipped reset\n");
+   }
+   return ret;
+}
+
+static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv)
+{
+ 

[PATCH 1/1] net: mdio-mux: add mdio_mux parameter to mdio_mux_init()

[Corentin Labbe]

mdio_mux_init() use the parameter dev for two distinct thing:
1) Have a device for all devm_ functions
2) Get device_node from it

Since it is two distinct purpose, this patch add a parameter mdio_mux
that is linked to task 2.

This will also permit to register an of_node mdio-mux that lacks a direct
owning device.
For example a mdio-mux which is a subnode of a real device.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
 drivers/net/phy/mdio-mux-bcm-iproc.c | 2 +-
 drivers/net/phy/mdio-mux-gpio.c  | 2 +-
 drivers/net/phy/mdio-mux-mmioreg.c   | 3 ++-
 drivers/net/phy/mdio-mux.c   | 7 ---
 include/linux/mdio-mux.h | 9 +
 5 files changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/net/phy/mdio-mux-bcm-iproc.c 
b/drivers/net/phy/mdio-mux-bcm-iproc.c
index 0a5f62e0efcc..0831b7142df7 100644
--- a/drivers/net/phy/mdio-mux-bcm-iproc.c
+++ b/drivers/net/phy/mdio-mux-bcm-iproc.c
@@ -199,7 +199,7 @@ static int mdio_mux_iproc_probe(struct platform_device 
*pdev)
 
platform_set_drvdata(pdev, md);
 
-   rc = mdio_mux_init(md->dev, mdio_mux_iproc_switch_fn,
+   rc = mdio_mux_init(md->dev, md->dev->of_node, mdio_mux_iproc_switch_fn,
   >mux_handle, md, md->mii_bus);
if (rc) {
dev_info(md->dev, "mdiomux initialization failed\n");
diff --git a/drivers/net/phy/mdio-mux-gpio.c b/drivers/net/phy/mdio-mux-gpio.c
index 919949960a10..082ffef0dec4 100644
--- a/drivers/net/phy/mdio-mux-gpio.c
+++ b/drivers/net/phy/mdio-mux-gpio.c
@@ -54,7 +54,7 @@ static int mdio_mux_gpio_probe(struct platform_device *pdev)
if (IS_ERR(s->gpios))
return PTR_ERR(s->gpios);
 
-   r = mdio_mux_init(>dev,
+   r = mdio_mux_init(>dev, pdev->dev.of_node,
  mdio_mux_gpio_switch_fn, >mux_handle, s, NULL);
 
if (r != 0) {
diff --git a/drivers/net/phy/mdio-mux-mmioreg.c 
b/drivers/net/phy/mdio-mux-mmioreg.c
index c3825c7da038..2573ab012f16 100644
--- a/drivers/net/phy/mdio-mux-mmioreg.c
+++ b/drivers/net/phy/mdio-mux-mmioreg.c
@@ -159,7 +159,8 @@ static int mdio_mux_mmioreg_probe(struct platform_device 
*pdev)
}
}
 
-   ret = mdio_mux_init(>dev, mdio_mux_mmioreg_switch_fn,
+   ret = mdio_mux_init(>dev, pdev->dev.of_node,
+   mdio_mux_mmioreg_switch_fn,
>mux_handle, s, NULL);
if (ret) {
dev_err(>dev, "failed to register mdio-mux bus %pOF\n",
diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c
index 6f75e9f27fed..0a86f1e4c02f 100644
--- a/drivers/net/phy/mdio-mux.c
+++ b/drivers/net/phy/mdio-mux.c
@@ -86,6 +86,7 @@ static int mdio_mux_write(struct mii_bus *bus, int phy_id,
 static int parent_count;
 
 int mdio_mux_init(struct device *dev,
+ struct device_node *mux_node,
  int (*switch_fn)(int cur, int desired, void *data),
  void **mux_handle,
  void *data,
@@ -98,11 +99,11 @@ int mdio_mux_init(struct device *dev,
struct mdio_mux_parent_bus *pb;
struct mdio_mux_child_bus *cb;
 
-   if (!dev->of_node)
+   if (!mux_node)
return -ENODEV;
 
if (!mux_bus) {
-   parent_bus_node = of_parse_phandle(dev->of_node,
+   parent_bus_node = of_parse_phandle(mux_node,
   "mdio-parent-bus", 0);
 
if (!parent_bus_node)
@@ -132,7 +133,7 @@ int mdio_mux_init(struct device *dev,
pb->mii_bus = parent_bus;
 
ret_val = -ENODEV;
-   for_each_available_child_of_node(dev->of_node, child_bus_node) {
+   for_each_available_child_of_node(mux_node, child_bus_node) {
int v;
 
r = of_property_read_u32(child_bus_node, "reg", );
diff --git a/include/linux/mdio-mux.h b/include/linux/mdio-mux.h
index 61f5b21b31c7..a5d58f221939 100644
--- a/include/linux/mdio-mux.h
+++ b/include/linux/mdio-mux.h
@@ -12,7 +12,16 @@
 #include 
 #include 
 
+/* mdio_mux_init() - Initialize a MDIO mux
+ * @devThe device owning the MDIO mux
+ * @mux_node   The device node of the MDIO mux
+ * @switch_fn  The function called for switching target MDIO child
+ * mux_handle  A pointer to a (void *) used internaly by mdio-mux
+ * @data   Private data used by switch_fn()
+ * @mux_busAn optional parent bus (Other case are to use parent_bus 
property)
+ */
 int mdio_mux_init(struct device *dev,
+ struct device_node *mux_node,
  int (*switch_fn) (int cur, int desired, void *data),
  void **mux_handle,
  void *data,
-- 
2.13.5

[PATCH 0/1] net: mdio-mux: add mdio_mux parameter to mdio_mux_init()

[Corentin Labbe]

Hello

For dwmac-sun8i, we need to set a MDIO mux which is not itself a device
(it is part of a device but have its own DT node)

This patch permit to use a MDIO mux for such case.
See agreement at https://lkml.org/lkml/2017/8/29/407

Since all mdio_mux_init() users are within drivers/net/phy/ and the changes are
trivial, I have done all in one patch, instead of having a complex series of
patch converting one by one callers.

This patch is a dependency for restoring dwmac-sun8i so it is why I target 
"net:"
But I send it alone, for be sure that this conversion in one patch is 
acceptable.

Regards

Corentin Labbe (1):
  net: mdio-mux: add mdio_mux parameter to mdio_mux_init()

 drivers/net/phy/mdio-mux-bcm-iproc.c | 2 +-
 drivers/net/phy/mdio-mux-gpio.c  | 2 +-
 drivers/net/phy/mdio-mux-mmioreg.c   | 3 ++-
 drivers/net/phy/mdio-mux.c   | 7 ---
 include/linux/mdio-mux.h | 9 +
 5 files changed, 17 insertions(+), 6 deletions(-)

-- 
2.13.5

[PATCH v2 1/5] net: mdio-mux: Fix NULL Comparison style

[Corentin Labbe]

This patch fix checkpatch warning about NULL Comparison style.

Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
---
 drivers/net/phy/mdio-mux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/phy/mdio-mux.c b/drivers/net/phy/mdio-mux.c
index 942ceaf3fd3f..b18ad7082b88 100644
--- a/drivers/net/phy/mdio-mux.c
+++ b/drivers/net/phy/mdio-mux.c
@@ -120,7 +120,7 @@ int mdio_mux_init(struct device *dev,
}
 
pb = devm_kzalloc(dev, sizeof(*pb), GFP_KERNEL);
-   if (pb == NULL) {
+   if (!pb) {
ret_val = -ENOMEM;
goto err_pb_kz;
}
@@ -144,7 +144,7 @@ int mdio_mux_init(struct device *dev,
}
 
cb = devm_kzalloc(dev, sizeof(*cb), GFP_KERNEL);
-   if (cb == NULL) {
+   if (!cb) {
dev_err(dev,
"Error: Failed to allocate memory for child 
%pOF\n",
child_bus_node);
-- 
2.13.5