Re: [PATCH v5 03/14] dt-bindings: net: Document Intel pch_gbe binding

[Andrew Lunn]

> @@ -0,0 +1,25 @@
> +Intel Platform Controller Hub (PCH) GigaBit Ethernet (GBE)
> +
> +Required properties:
> +- compatible:Should be the PCI vendor & device ID, eg. 
> "pci8086,8802".
> +- reg:   Should be a PCI device number as specified by 
> the PCI bus
> + binding to IEEE Std 1275-1994.
> +- phy-reset-gpios:   Should be a GPIO list containing a single GPIO that
> + resets the attached PHY when active.
> +

Hi Paul

Please see Documentation/devicetree/bindings/net/phy.txt. In
particular:

reset-gpios: The GPIO phandle and specifier for the PHY reset signal.

You should be conforming to the existing binding.

   Andrew

[PATCH v5 03/14] dt-bindings: net: Document Intel pch_gbe binding

[Paul Burton]

Introduce documentation for a device tree binding for the Intel Platform
Controller Hub (PCH) GigaBit Ethernet (GBE) device. Although this is a
PCIe device & thus largely auto-detectable, this binding will be used to
provide the driver with the PHY reset GPIO.

Signed-off-by: Paul Burton 
Cc: David S. Miller 
Cc: Mark Rutland 
Cc: Rob Herring 
Cc: devicet...@vger.kernel.org
Cc: linux-m...@linux-mips.org
Cc: netdev@vger.kernel.org

---

Changes in v5:
- Use standard gpio & ethernet node names in example.
- Remove bus number from example unit addresses.

Changes in v4: None
Changes in v3:
- New patch.

Changes in v2: None

 Documentation/devicetree/bindings/net/pch_gbe.txt | 25 +++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/pch_gbe.txt

diff --git a/Documentation/devicetree/bindings/net/pch_gbe.txt 
b/Documentation/devicetree/bindings/net/pch_gbe.txt
new file mode 100644
index ..cff2687e6e75
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/pch_gbe.txt
@@ -0,0 +1,25 @@
+Intel Platform Controller Hub (PCH) GigaBit Ethernet (GBE)
+
+Required properties:
+- compatible:  Should be the PCI vendor & device ID, eg. 
"pci8086,8802".
+- reg: Should be a PCI device number as specified by the PCI 
bus
+   binding to IEEE Std 1275-1994.
+- phy-reset-gpios: Should be a GPIO list containing a single GPIO that
+   resets the attached PHY when active.
+
+Example:
+
+   ethernet@0,1 {
+   compatible = "pci8086,8802";
+   reg = <0x00020100 0 0 0 0>;
+   phy-reset-gpios = <_gpio 6
+  GPIO_ACTIVE_LOW>;
+   };
+
+   eg20t_gpio: gpio@0,2 {
+   compatible = "pci8086,8803";
+   reg = <0x00020200 0 0 0 0>;
+
+   gpio-controller;
+   #gpio-cells = <2>;
+   };
-- 
2.16.1