Re: [openstack-dev] FPGA as a dynamic nested resources
On Jul 21, 2016 5:12 AM, "Daniel P. Berrange" wrote: > > On Thu, Jul 21, 2016 at 07:54:48AM +0200, Roman Dobosz wrote: > > On Wed, 20 Jul 2016 10:07:12 +0100 > > "Daniel P. Berrange" wrote: > > > > Hey Daniel, thanks for the feedback. > > > > > > Thoughts? > > > > > > I'd suggest you'll increase your chances of success with nova design > > > approval if you focus on implementing a really simple usage scheme for > > > FPGA as the first step in Nova. > > > > This. Maybe I'm wrong, but for me the minimal use case for FPGA would > > be ability to schedule VM which need certain accelerator from multiple > > potential ones on available FPGA/fixed slot. How insane does it sound? > > > > Providing fixed, prepared earlier by DC administrator accelerator > > resource, doesn't bring much value, beyond what we already have in > > Nova, since PCI/SR-IOV passthrough might be used for accelerators, > > which expose their functionality via VF. > > IIUC, there's plenty of FPGAs which are not SRIOV based, so there's > still scope for Nova enhancement in this area. > > The fact that some FPGAs are SRIOV & some are not though, is is also > why I'm suggesting that any work related to FPGA should be based around > refactoring of the existing PCI device assignment model to form a more > generic "Hardware device assignment" model. If we end up having a > completely distinct data model for FPGAs that is a failure. We need to > have a generalized hardware assignment model that can be used for generic > PCI devices, NICs, FPGAs, TPMs, GPUs, etc regardless of whether they > are backed by SRIOV, or their own non-PCI virtual functions. Personally > I'll reject any spec proposal that ignores existing PCI framework and > introduces a separate model for FPGA. > > > > All the threads I've see go well off into the weeds about trying to > > > solve everybody's niche/edge cases perfectly and as a result get > > > very complicated. > > > > The topic is complicated :) > > Which is why i'm advising to not try to solve the perfect case and instead > focus on getting something simple & good enough for common case. > I think the simple use cases can be covered today for PCIe SR-IOV config easily and some number of VFs are applied to regions of a pre-initialized board. I know of successful deployments that do the initialization with ironic and use nova to allocate the PCIe SR-IOV access using existing extension points. Once allocated the actual function bitstream gets pushed in by the owning VM. The application owners manage concurrency. This level of support could be made mainstream rather than custom extension as a first step and then add support for alternatives to PCIe based connections. That said there are many use cases in play today outside of openstack unfortunately that manage the loading of the bitstream that implements a specific function. The desire is to load those bitstreams and manage a life cycle just like we manage a VM and image today. In effect the static region of the FPGA has the role of a very simple hypervisor. FPGA boards are getting denser and more common, and they are getting their own peripherals like on board NICs, serial ports, storage etc. I don't believe we need to expose complicated physical structure to management, but a device with the ability to be virtualized and dynamically programmed and has connection to the other infrastructure in the environment needs to be managed withe things it connects to. I suggest the following : First standardize how to describe and allocate a real or virtualized FPGA. Specify the meta data and related filter rules. Second, mirror the glance/nova process of image loading on hypervisor for bitstream loading of a reProgramable Region. Third keep the functions of the actual bit stream separate from the above management just like we do with VM or container functional capabilities. When the lifecycle of the PR is tied to a VM, just like ephemeral storage, driving allocation from nova seems to make the most sense. Am I way out of line? > Regards, > Daniel > -- > |: http://berrange.com -o-http://www.flickr.com/photos/dberrange/ :| > |: http://libvirt.org -o- http://virt-manager.org :| > |: http://autobuild.org -o- http://search.cpan.org/~danberr/ :| > |: http://entangle-photo.org -o- http://live.gnome.org/gtk-vnc :| > > __ > OpenStack Development Mailing List (not for usage questions) > Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe > http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [cyborg]Nominate Rushil Chugh and Justin Kilpatrick as new core reviewers
+1 I haven't had time to actively participate these past months but have monitored and agree :) Thanks for your time Harm Sluiman harm.slui...@gmail.com > On May 25, 2017, at 10:24 AM, Zhipeng Huang wrote: > > Hi Team, > > This is an email for nomination of rushil and justin to the core team. They > have been very active in our development and the specs they helped draft have > been merged after several rounds of review. The statistics could be found at > http://stackalytics.com/?project_type=all&module=cyborg&metric=person-day . > > Since we are not an official project and i'm the only core reviewer at the > moment, I think we should have a simple procedure for the first additional > core reviewers to be added. Therefore if there are no outstanding oppositions > by the end of the day of next Wed, I will suppose there is a consensus and > add these guys to the core team to help accelerating our development. > > Please voice your support or concerns if there are any within the next 7 days > :) > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Product Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > __ > OpenStack Development Mailing List (not for usage questions) > Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe > http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration]Team Bi-weekly Meeting 2017.01.18 Agenda
I am afraid I am stuck in an alternate reality meeting this week. my apologies I will work to get the other meeting moved in the future On Tue, Jan 17, 2017 at 10:26 PM, Zhipeng Huang wrote: > Hi Team, > > Please find the agenda at https://wiki.openstack.org/ > wiki/Meetings/CyborgTeamMeeting#Agenda_for_next_meeting > > our IRC channel is #openstack-cyborg > > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > -- 宋慢 Harm Sluiman __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration] No team meeting today, resume next Wed
Thanks for the update. Unfortunately I could not attend and can't seem to find a summary or anything about what took place. A pointer would be appreciated please ;-) Thanks for your time Harm Sluiman harm.slui...@gmail.com > On Mar 8, 2017, at 7:22 AM, Zhipeng Huang wrote: > > Hi team, > > As agreed per our PTG/VTG session, we will have the team meeting two weeks > after to give people enough time to prepare the BPs we discussed. > > Therefore there will be no team meeting today, and the next meeting is on > next Wed. > __ > OpenStack Development Mailing List (not for usage questions) > Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe > http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] FPGA as a dynamic nested resources
> On Jul 28, 2016, at 7:57 AM, Jay Pipes wrote: > > On 07/19/2016 06:51 PM, Ed Leafe wrote: >> On Jul 19, 2016, at 2:58 PM, Chris Friesen >> wrote: Why would a VM program the slot? Wouldn’t it usually be at the host level? >>> >>> Are there no cases where a VM might want to download a proprietary >>> program into an FPGA? >> >> That doesn’t sound right to me, but maybe I’m just not that familiar >> with FPGA specifics. In general, VMs don’t control their hosts. > > Oh, but in NFV-land they most certainly do. :/ > > It's commonplace now to see NFV use cases where VMs are provided passthrough > access to an SR-IOV physical function on the host and the VMs application > code then controls and allocates at will virtual functions from that physical > function. Once that happens, yes, it's true that Nova no longer has any clue > about the resource usage of VFs on that host device -- it's essentially at > that point totally up to the VNF software to properly manage and maintain > access to those VFs and allocate/free resources as needed on the host device. > Agreed as a statement of today. Once the “VM” application has what looks like dedicated FPGA resources to it, it typically does both management and optionally the actual application workload. That typically includes loading the bitstream on the device as well and then executing API calls to the service it then provides. This can all be done now with PCIe/SR-IOV , which is great…. But the generic boards are getting bigger and we often want greater utilization of them and to virtualize and manage them separately from the VM based application code that may utilize them. In other words these “funky” devices are becoming hosts for dynamically loaded services. While a key first step to enable allocating the virtual region of the device to a VM when it is provisioned, we may want to enable separating management from data plane (aka workload) and support dynamic service consumption through more than network connections. VNFs are a use case for sure and a dominant one, but now that we have NICs on these large boards and also want to support service chaining, we have the opportunity to do that without consuming many CPU cycles. When I can push firewall, or ipsec or compression to the “NIC” and not use CPU cycles, why not ;-), and why not share it to other nearby VMs. Then take it past VNFs to other workloads that can exploit FPGA... > Same goes for FPGAs. VNF vendors want access to the physical host device and > want to be able to do with that host device whatever they please. > > As I wrote on Twitter recently, NFV is changing software-defined > infrastructure to instead be hardware-defined software. > > It's a funky new* world we live in, Ed :) > > -jay > > * new == old == new again. > > __ > OpenStack Development Mailing List (not for usage questions) > Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe > http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [Cyborg]Queens PTL candidacy
Howard, I guess you will need some +1 votes and I certainly support you based on our joint early work on these projects. I regret not having time to participate actively this year. However your contribution has been great for the project and the OpenStack community On Thu, Aug 3, 2017 at 3:55 AM, Zhipeng Huang wrote: > Yes tony I was intended to refer to the official procedure for the > self-nomination period, which would be 5 buiz days. > > Thx for the offer to help with the civs poll :) > > On Thu, Aug 3, 2017 at 3:11 PM, Tony Breeds > wrote: > >> On Thu, Aug 03, 2017 at 11:59:55AM +0800, Zhipeng Huang wrote: >> > Hi Team, >> > >> > Even though Cyborg is not an official project yet, however with an >> ultimate >> > goal of becoming one it is necessary to conduct our project governance >> with >> > compliance of OpenStack community general requirements/culture. >> >> You didn't specify how long the self-nomination period is. I assume >> you're going for 5 business days? >> >> So any self nominations need to be in within a week from now >> >> Yours Tony. >> >> >> __ >> OpenStack Development Mailing List (not for usage questions) >> Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscrib >> e >> http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev >> >> > > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Product Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > > ______ > OpenStack Development Mailing List (not for usage questions) > Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe > http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev > > -- 宋慢 Harm Sluiman __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration]Team Biweekly Meeting 2016.11.10 minutes
Hi Howard. Can you send out the IRC in advance if you have it for Wednesday meeting? On Thu, Nov 10, 2016 at 10:55 AM, Zhipeng Huang wrote: > Hi Team, > > Thanks for attending today's meeting and again sorry for not be able to > host it on yesterday. > > Since we don't have a meetbot now associated with a fix channel, I > recorded the irc chat in a doc file and you could find it in the attachment. > > Key Takeaways: > 1. Nomad project will be renamed to Cyborg (what a cool name) based upon > our final tally on the etherpad > <https://etherpad.openstack.org/p/nomad-ocata-design-session> > 2. Moshe introduced Nacsa project proposal, and an initial design doc has > been shared among the team. We will make the doc public after a few rounds > of review and discussion > 3. Reminder for the team to take a look at the Scientific Working Group > etherpad <https://etherpad.openstack.org/p/scientific-wg-barcelona-agenda> for > use cases > > Our next meeting will be on Nov 23th, 10:00am on irc > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > -- 宋慢 Harm Sluiman __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration]Team Biweekly Meeting 2016.11.23 agenda
Team I promised to comment on NASCA and provide some thoughts and ppt on flows for cyborg Sorry for the delay. I added a few words to the NASCA etherpad, I waited for cyborg git to drop ppt but no luck yet so I put it here on google drive. I hope you can reach it. follow it in show mode for a “rich” experience ;-) I captured some FPGA run time flows as background, and then some sequences of lifecycle management. I have shared this with a few of you before. https://drive.google.com/open?id=0B_Dc7PdTARsxc2cwTlJnelctWHM <https://drive.google.com/open?id=0B_Dc7PdTARsxc2cwTlJnelctWHM> I am creating etherpad to discuss https://etherpad.openstack.org/p/cyborg-initial-flow-discussion <https://etherpad.openstack.org/p/cyborg-initial-flow-discussion> I am also creating an etherpad to discuss the in POC we have talked about for February to help define the scope of Cyborg https://etherpad.openstack.org/p/cyborg-initial-design-poc <https://etherpad.openstack.org/p/cyborg-initial-design-poc> I would also like to intro/welcome a couple more people to the Cyborg topic Chen, Fei (aka Fei) from IBM research and the SuperVessel project among other things Jack Ng and Li Liu, my colleagues from Huawei that will be participating in Cyborg and helping get our initial POC underway Thanks for your time. 宋哲 Harm Sluiman > On Nov 23, 2016, at 11:49 PM, Zhipeng Huang wrote: > > Hi team, > > Thanks for the discussion and please find the minutes here > https://wiki.openstack.org/wiki/Cyborg/MeetingLogs > <https://wiki.openstack.org/wiki/Cyborg/MeetingLogs> > > On Wed, Nov 23, 2016 at 8:38 PM, Zhipeng Huang <mailto:zhipengh...@gmail.com>> wrote: > Forward here again in case you have not registered to openstack-dev > mailinglist > > -- Forwarded message -- > From: Zhipeng Huang mailto:zhipengh...@gmail.com>> > Date: Wed, Nov 23, 2016 at 8:34 PM > Subject: [acceleration]Team Biweekly Meeting 2016.11.23 agenda > To: "OpenStack Development Mailing List (not for usage questions)" > mailto:openstack-dev@lists.openstack.org>> > > > Hi Team, > > Please find the meeting logistics and agendas at > https://wiki.openstack.org/wiki/Meetings/CyborgTeamMeeting > <https://wiki.openstack.org/wiki/Meetings/CyborgTeamMeeting> > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com <mailto:huangzhip...@huawei.com> > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu <mailto:zhipe...@uci.edu> > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > > > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com <mailto:huangzhip...@huawei.com> > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu <mailto:zhipe...@uci.edu> > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > > > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com <mailto:huangzhip...@huawei.com> > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu <mailto:zhipe...@uci.edu> > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration]Team Biweekly Meeting 2016.11.23 agenda
yup agree We have spent more time thinking through FPGA and GPU but certainly all devices are possible. Miroslav, you may recall in the isn examples I sent a while back I called them “programmable devices” ;-) We may need to think about defining a crips line however between these managed devices versus anything attached by PCI, but maybe not. Up for discussion I think… > On Dec 7, 2016, at 10:11 AM, Zhipeng Huang wrote: > > Hi Miroslav, > > GPU and NVMe devices are definitely in my understanding within the scope of > Cyborg, however we need a road map for each type of accelerator devices :) > > > On Wed, Dec 7, 2016 at 4:04 AM, Miroslav Halas <mailto:mha...@lenovo.com>> wrote: > Hello Harm, > > > > Thank you for sharing. I was wondering if you have given any thoughts how > other type of devices other than FPGAs would fit into this framework. For > example, GPUs or block devices (such as NVMe drives) for exclusive access by > the VMs. Could these type of devices be also managed by cyborg? > > > > Thanks, > > > > Miro Halas > > > > From: Harm Sluiman [mailto:harm.slui...@gmail.com > <mailto:harm.slui...@gmail.com>] > Sent: Saturday, December 03, 2016 4:54 AM > To: Zhipeng Huang > Cc: OpenStack Development Mailing List (not for usage questions); > rodolfo.alonso.hernan...@intel.com > <mailto:rodolfo.alonso.hernan...@intel.com>; Michele Paolino; Scott Kelso; > Roman Dobosz; Jim Golden; Miroslav Halas; pradeep.jagade...@huawei.com > <mailto:pradeep.jagade...@huawei.com>; michael.ro...@nokia.com > <mailto:michael.ro...@nokia.com>; jian-feng.d...@intel.com > <mailto:jian-feng.d...@intel.com>; martial.mic...@nist.gov > <mailto:martial.mic...@nist.gov>; Moshe Levi; Edan David; Francois Ozog; Fei > K Chen; jack...@huawei.com <mailto:jack...@huawei.com>; lil...@huawei.com > <mailto:lil...@huawei.com> > Subject: Re: [acceleration]Team Biweekly Meeting 2016.11.23 agenda > > > > Team I promised to comment on NASCA and provide some thoughts and ppt on > flows for cyborg > > > > Sorry for the delay. > > > > I added a few words to the NASCA etherpad, > > > > I waited for cyborg git to drop ppt but no luck yet so I put it here on > google drive. I hope you can reach it. follow it in show mode for a “rich” > experience ;-) > > I captured some FPGA run time flows as background, and then some sequences of > lifecycle management. I have shared this with a few of you before. > > https://drive.google.com/open?id=0B_Dc7PdTARsxc2cwTlJnelctWHM > <https://drive.google.com/open?id=0B_Dc7PdTARsxc2cwTlJnelctWHM> > I am creating etherpad to discuss > > https://etherpad.openstack.org/p/cyborg-initial-flow-discussion > <https://etherpad.openstack.org/p/cyborg-initial-flow-discussion> > I am also creating an etherpad to discuss the in POC we have talked about for > February to help define the scope of Cyborg > > https://etherpad.openstack.org/p/cyborg-initial-design-poc > <https://etherpad.openstack.org/p/cyborg-initial-design-poc> > > > > > I would also like to intro/welcome a couple more people to the Cyborg topic > > > > Chen, Fei (aka Fei) from IBM research and the SuperVessel project among > other things > > Jack Ng and Li Liu, my colleagues from Huawei that will be participating in > Cyborg and helping get our initial POC underway > > > > > > > > > > > > > > Thanks for your time. > 宋哲 > Harm Sluiman > > > > > > > > On Nov 23, 2016, at 11:49 PM, Zhipeng Huang <mailto:zhipengh...@gmail.com>> wrote: > > > > Hi team, > > > > Thanks for the discussion and please find the minutes here > https://wiki.openstack.org/wiki/Cyborg/MeetingLogs > <https://wiki.openstack.org/wiki/Cyborg/MeetingLogs> > > > On Wed, Nov 23, 2016 at 8:38 PM, Zhipeng Huang <mailto:zhipengh...@gmail.com>> wrote: > > Forward here again in case you have not registered to openstack-dev > mailinglist > > > > -- Forwarded message -- > From: Zhipeng Huang mailto:zhipengh...@gmail.com>> > Date: Wed, Nov 23, 2016 at 8:34 PM > Subject: [acceleration]Team Biweekly Meeting 2016.11.23 agenda > To: "OpenStack Development Mailing List (not for usage questions)" > mailto:openstack-dev@lists.openstack.org>> > > > Hi Team, > > > > Please find the meeting logistics and agendas at > https://wiki.openstack.org/wiki/Meetings/CyborgTeamMeeting > <https://wiki.openstack
Re: [openstack-dev] [acceleration]Team Bi-weekly Meeting 2016.12.21 Agenda
Assuming we have a room/place and objectives, I can attend. On Wed, Dec 21, 2016 at 11:15 AM, Zhipeng Huang wrote: > Hi all, > > Thanks for attending the last team meeting in year 2016 :) Please find the > meeting notes at https://wiki.openstack.org/wiki/Cyborg/MeetingLogs#2016- > 12-21 . > > Our next meeting will be held at Jan 4th, 2017. > > At the meantime, could you indicate whether you would attend Atlanta PTG > by replying to this email ? Many thanks :) > > On Wed, Dec 21, 2016 at 3:14 PM, Zhipeng Huang > wrote: > >> Hi Team, >> >> Please find the agenda at https://wiki.openstack.org/ >> wiki/Meetings/CyborgTeamMeeting#Next_meeting_:_UTC_1500.2C_Dec_21th >> >> Remember that our IRC channel is #openstack-cyborg >> >> -- >> Zhipeng (Howard) Huang >> >> Standard Engineer >> IT Standard & Patent/IT Prooduct Line >> Huawei Technologies Co,. Ltd >> Email: huangzhip...@huawei.com >> Office: Huawei Industrial Base, Longgang, Shenzhen >> >> (Previous) >> Research Assistant >> Mobile Ad-Hoc Network Lab, Calit2 >> University of California, Irvine >> Email: zhipe...@uci.edu >> Office: Calit2 Building Room 2402 >> >> OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado >> > > > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > -- 宋慢 Harm Sluiman __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration]Team Bi-weekly Meeting 2017.1.4 Agenda
Happy New Year everyone. I won't be able participate in the IRC today due to a conflict, but I will try to connect and monitor. I will also put more comments in the etherpads that are linked On Wed, Jan 4, 2017 at 6:28 AM, Zhipeng Huang wrote: > Hi Team, > > Please find the agenda at https://wiki.openstack.org/wiki/Meetings/ > CyborgTeamMeeting#Agenda_for_next_meeting > > our IRC channel is #openstack-cyborg > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > -- 宋慢 Harm Sluiman __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
Re: [openstack-dev] [acceleration]Team Bi-weekly Meeting 2017.1.4 Agenda
One question regarding PTG, Since we don't get a specific room allocated, and the intent is for people to not float around meetings... What day(s) are you expecting to have Cyborg specific discussion? It seem hotel booking will be a premium soon On Wed, Jan 4, 2017 at 11:13 AM, Zhipeng Huang wrote: > Hi Team, > > Thanks for a great discussion at today's meeting, please find the minutes > at https://wiki.openstack.org/wiki/Cyborg/MeetingLogs#2017-01-04 > > On Wed, Jan 4, 2017 at 10:40 PM, Miroslav Halas wrote: > >> Howard and team, >> >> >> >> I have usually conflict at this time, but I am trying to keep up with >> meeting logs and etherpads J. Either Scott or I will be at PTG >> representing Lenovo so we would be happy to participate. >> >> >> >> From last meeting I have added TODO to Nasca etherpard to link the design >> document and the code being discussed. I cannot seem to locate the original >> files Mellanox team shared with us. Would somebody who know where these are >> shared be able to insert the links to the etherpad >> https://etherpad.openstack.org/p/cyborg-nasca-design >> >> >> >> Thank you, >> >> >> >> Miro Halas >> >> >> >> *From:* Harm Sluiman [mailto:harm.slui...@gmail.com] >> *Sent:* Wednesday, January 04, 2017 9:22 AM >> *To:* Zhipeng Huang >> *Cc:* OpenStack Development Mailing List (not for usage questions); >> Miroslav Halas; rodolfo.alonso.hernan...@intel.com; Michele Paolino; >> Scott Kelso; Roman Dobosz; Jim Golden; pradeep.jagade...@huawei.com; >> michael.ro...@nokia.com; jian-feng.d...@intel.com; >> martial.mic...@nist.gov; Moshe Levi; Edan David; Francois Ozog; Fei K >> Chen; jack...@huawei.com; li.l...@huawei.com >> *Subject:* Re: [acceleration]Team Bi-weekly Meeting 2017.1.4 Agenda >> >> >> >> Happy New Year everyone. >> >> I won't be able participate in the IRC today due to a conflict, but I >> will try to connect and monitor. >> >> I will also put more comments in the etherpads that are linked >> >> >> >> >> >> On Wed, Jan 4, 2017 at 6:28 AM, Zhipeng Huang >> wrote: >> >> Hi Team, >> >> >> >> Please find the agenda at https://wiki.openstack.org/ >> wiki/Meetings/CyborgTeamMeeting#Agenda_for_next_meeting >> >> >> >> our IRC channel is #openstack-cyborg >> >> >> >> -- >> >> Zhipeng (Howard) Huang >> >> >> >> Standard Engineer >> >> IT Standard & Patent/IT Prooduct Line >> >> Huawei Technologies Co,. Ltd >> >> Email: huangzhip...@huawei.com >> >> Office: Huawei Industrial Base, Longgang, Shenzhen >> >> >> >> (Previous) >> >> Research Assistant >> >> Mobile Ad-Hoc Network Lab, Calit2 >> >> University of California, Irvine >> >> Email: zhipe...@uci.edu >> >> Office: Calit2 Building Room 2402 >> >> >> >> OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado >> >> >> >> >> >> -- >> >> 宋慢 >> Harm Sluiman >> >> >> >> > > > -- > Zhipeng (Howard) Huang > > Standard Engineer > IT Standard & Patent/IT Prooduct Line > Huawei Technologies Co,. Ltd > Email: huangzhip...@huawei.com > Office: Huawei Industrial Base, Longgang, Shenzhen > > (Previous) > Research Assistant > Mobile Ad-Hoc Network Lab, Calit2 > University of California, Irvine > Email: zhipe...@uci.edu > Office: Calit2 Building Room 2402 > > OpenStack, OPNFV, OpenDaylight, OpenCompute Aficionado > -- 宋慢 Harm Sluiman __ OpenStack Development Mailing List (not for usage questions) Unsubscribe: openstack-dev-requ...@lists.openstack.org?subject:unsubscribe http://lists.openstack.org/cgi-bin/mailman/listinfo/openstack-dev
