[OpenWrt-Devel] [PATCH 1/2] Add package django-sslserver

2015-10-10 Thread philby john 
>From 023d680abc55699e439a643111c733088d07a55b Mon Sep 17 00:00:00 2001
From: Philby John 
Date: Sat, 10 Oct 2015 18:53:46 +0530
Subject: [PATCH 1/2] Add package django-sslserver

Add django-sslserver ver 0.15 which is an SSL-enabled
development server for Django.

Signed-off-by: Philby John 
Tested-by: Ashok 
---
 lang/django-sslserver/Makefile | 50 ++
 1 file changed, 50 insertions(+)
 create mode 100644 lang/django-sslserver/Makefile

diff --git a/lang/django-sslserver/Makefile b/lang/django-sslserver/Makefile
new file mode 100644
index 000..7aaf2a0
--- /dev/null
+++ b/lang/django-sslserver/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=django-sslserver
+PKG_VERSION:=0.15
+PKG_RELEASE:=1
+
+PKG_SOURCE:=django-sslserver-$(PKG_VERSION).tar.gz
+PKG_SOURCE_URL:=https://pypi.python.org/packages/source/d/django-sslserver/
+PKG_MD5SUM:=dd83049f0c50f94a1cf3acb6bc7dd6bd
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/django-sslserver-$(PKG_VERSION)
+PKG_BUILD_DEPENDS:=python python-setuptools
+
+include $(INCLUDE_DIR)/package.mk
+$(call include_mk, python-package.mk)
+
+define Package/django-sslserver
+  SECTION:=language-python
+  CATEGORY:=Languages
+  SUBMENU:=Python
+  TITLE:=An SSL-enabled development server for Django
+  URL:=https://www.djangoproject.com/
+  DEPENDS:=+python +python-setuptools
+endef
+
+define Package/django-sslserver/description
+ Django SSL Server ships "batteries included" with a self-signed
server certificate.
+endef
+
+define Build/Compile
+$(call Build/Compile/PyMod,., \
+install --prefix="/usr" --root="$(PKG_INSTALL_DIR)" \
+)
+endef
+
+define Package/django-sslserver/install
+$(INSTALL_DIR) $(1)$(PYTHON_PKG_DIR)
+$(CP) \
+$(PKG_INSTALL_DIR)$(PYTHON_PKG_DIR)/* \
+$(1)$(PYTHON_PKG_DIR)/
+endef
+
+$(eval $(call BuildPackage,django-sslserver))
-- 
1.8.1.4
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Re: [OpenWrt-Devel] [PATCH v2 1/3] ramips: Add DTS files for HiWiFi HC5x61 models

2015-10-10 Thread 康 

At 2015-09-29 10:10:41, "Yousong Zhou"  wrote:
>Hi,
>
>Previously this year, there were 2 attempts to add support for HC5661
>and HC5761 to OpenWrt trunk [1,2].  I only had a HC5661 and it was
>quite a while ago but the issues then should still remain.
>
>The first is about how MAC address is to be read.  The
>"mtd-mac-address" DTS directives apparently won't work.  And if I
>remember correctly simply reading and setting it for lan and wan also
>has flaws that the WiFi interface still get the default hardcoded MAC
>address by the driver.  The best way I can think of to workaround this
>is to add a directive similar to what "mtd-mac-address" does for
>binary-encoded MACs.
>"target/linux/generic/patches-4.1/681-NET-add-of_get_mac_address_mtd.patch"
>can work as a reference.



Today I implemented the "mtd-mac-address-ascii" function, ethernet address 
works fine, but WiFi mac address remains the hardcoded one. It seems the driver 
read mac  from factory partition, and unfortunately all HiWiFi devices has the 
same mac in factory data...




>
>The second is about how the generated the firmwares is to be flashed
>to the those devices.  Are there plans to create wiki pages to clarify
>the details?  Again if I remember correctly, the U-Boot of HC5661 at
>least utilised pubkey firmware verification (though ...).  How regular
>users are supposed to workaround this?
>
> [1] HiWiFi HC5661 Support for Openwrt,
>https://lists.openwrt.org/pipermail/openwrt-devel/2015-April/032640.html
> [2] ramips:Add support for HiWiFi HC5761,
>https://lists.openwrt.org/pipermail/openwrt-devel/2015-April/032643.html
>
>Regard,
>
>yousong
>
>On 28 September 2015 at 22:42, Comman Kang  wrote:
>> HiWiFi HC5661/5761/5861 models are manufactured by http://www.hiwifi.com. 
>> These models have similar hardware specs(MT7620A + 128M DDR2 + 16M flash). 
>> This patch adds support for them.
>>
>> The original author is Justin Liu (rss...@gmail.com). I ported the patch to 
>> trunk and submitted it here with his approval.
>>
>> v2 fix
>>   1: Renamed files to remove manufacturer’s name.
>>   2: styling work
>>
>> Signed-off-by: Xiaoning Kang 
>>
>>
>> diff --git a/target/linux/ramips/dts/HC5661.dts 
>> b/target/linux/ramips/dts/HC5661.dts
>> new file mode 100644
>> index 000..b5b9d1a
>> --- /dev/null
>> +++ b/target/linux/ramips/dts/HC5661.dts
>> @@ -0,0 +1,172 @@
>> +/dts-v1/;
>> +
>> +/include/ "mt7620a.dtsi"
>> +
>> +/ {
>> +   compatible = "HC5661", "ralink,mt7620a-soc";
>> +   model = "HiWiFi HC5661";
>> +
>> +   chosen {
>> +   bootargs = "console=ttyS0,115200";
>> +   };
>> +
>> +   palmbus@1000 {
>> +   sysc@0 {
>> +   ralink,gpiomux = "i2c", "jtag";
>> +   ralink,uartmux = "gpio";
>> +   ralink,wdtmux = <1>;
>> +   };
>> +
>> +   gpio0: gpio@600 {
>> +   status = "okay";
>> +   };
>> +
>> +   gpio2: gpio@660 {
>> +   status = "okay";
>> +   };
>> +
>> +   gpio3: gpio@688 {
>> +   status = "okay";
>> +   };
>> +
>> +   spi@b00 {
>> +   status = "okay";
>> +
>> +   m25p80@0 {
>> +   #address-cells = <1>;
>> +   #size-cells = <1>;
>> +   compatible = "w25q128";
>> +   reg = <0 0>;
>> +   linux,modalias = "m25p80", "w25q128";
>> +   spi-max-frequency = <1000>;
>> +
>> +   partition@0 {
>> +   label = "u-boot";
>> +   reg = <0x0 0x3>;
>> +   };
>> +
>> +   partition@3 {
>> +   label = "u-boot-env";
>> +   reg = <0x3 0x1>;
>> +   read-only;
>> +   };
>> +
>> +   factory: partition@4 {
>> +   label = "factory";
>> +   reg = <0x4 0x1>;
>> +   };
>> +
>> +   partition@5 {
>> +   label = "firmware";
>> +   reg = <0x5 0xf8>;
>> +   };
>> +
>> +   partition@fd {
>> +   label = "hwf_config";
>> +   reg = <0xfd 0x1>;
>> +   };
>> +
>> +   bdinfo: partition@fe {

Re: [OpenWrt-Devel] [PATCH] comgt-ncm: Add possibility to choose PDP context type

2015-10-10 Thread Matti Laakso 
>> Date: Sun, 20 Sep 2015 23:52:32 +0300
>> Subject: Re: [OpenWrt-Devel] [PATCH] comgt-ncm: Add possibility to
>> choose PDP context type
>> From: sami at olmari.fi
>> To: malaakso at elisanet.fi
>> CC: openwrt-devel at lists.openwrt.org
>>
>> This is not working with Huawei E3276, only "option pdptype 'IP' works,
>> IPV6 and IPV4V6... I do not have IPv6 offered from ISP currently,
>> should it matter. At attachment there is clips from the log using each
>> option type, most important clip here, same for IPV4V6 (aka no option
>> set):
>>
>> Sun Sep 20 20:32:10 2015 daemon.notice netifd: wan (2935): sending ->
>> AT+CGDCONT=1,"IPV6","opengate"
>> Sun Sep 20 20:32:11 2015 daemon.notice netifd: wan (2935): Error
>> running AT-command
>> Sun Sep 20 20:32:11 2015 daemon.notice netifd: wan (2935): Failed to
>> initialize modem
>>
>> There is also some random other errors seen on log on _working_
>> connection, I don't know do they bear any importance, as system works.
>> Anything I could do to make it work so that it wouldn't at least fail?
>>
>>   Sami Olmari
>>
>> P.S. I've updated wiki with this new option information :)
>>
>
> Hi,
>
> If you don't have IPv6 from your ISP, then that is expected. That doesn't
change
> the fact that my patch does introduce a regression for those without
IPv6, them
> having to manually disable it (setting ipv6 to 0 selects "IP" by
default). I'll have to
> think the defaults through again, most likely changing PDP type "IP" to
be the
> default unless IPv6 is explicitely _enabled_.
>
> Thanks for reporting!
>
> Matti
>
> Hi there!
>
> I noticed this regression today after upgrading to trunk. I don't think
> this is the complete answer though.
>
> I have the same E3276 dongle and I *do* have IPv6 from my ISP (Tele2,
> Sweden). The same SIM-card in a B593s-22 router gets me a native IPv6
> connection.
>
> I see the exact same error in the logs and I've verified that E3276
doesn't
> accept IPV6 (or IPV4V6, or ... ) as the second parameter by manually echo
> -e 'AT+CGDCONT=1,"IPV6","internet.tele2.se",""\r' > /dev/cdc-wdm0. Only
> "IP" works.
>
> Is the AT+CGDCONT command the correct way to select the PDP type on Huawei
> NCM dongles? What info is that based on?
>
> If there's something you want me to try, just shout.
>
> /Andreas

Hi Andreas,

You could try to change the PDP context number from 1 to something else,
e.g., 2, 3 or even higher. It is the first number in the AT+CGDCONT and
AT^NDISDUP commands. Change it in all of them in ncm.json. Command
AT+CGDCONT? should show all the profiles from the SIM, and they may be
locked. AT+CGDCONT is standardized by 3GPP, and should work in all dongles
accepting AT-commands.

Maybe your B593 also shows the existing profiles and their types in the web
UI?

Matti
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[OpenWrt-Devel] [PATCH 2/2] Add package django-secure

2015-10-10 Thread philby john 
From 411e7549b3e6dd24a5730a9c6d272708b51a06bc Mon Sep 17 00:00:00 2001
From: Philby John 
Date: Sat, 10 Oct 2015 19:01:13 +0530
Subject: [PATCH 2/2] Add package django-secure

Add django-secure 1.0.1 which is utilities and a
'linter' to help in making Django site more secure.

Signed-off-by: Philby John 
Tested-by: Ashok 
---
 lang/django-secure/Makefile | 54 +
 1 file changed, 54 insertions(+)
 create mode 100644 lang/django-secure/Makefile

diff --git a/lang/django-secure/Makefile b/lang/django-secure/Makefile
new file mode 100644
index 000..607d25c
--- /dev/null
+++ b/lang/django-secure/Makefile
@@ -0,0 +1,54 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=django-secure
+PKG_VERSION:=1.0.1
+PKG_RELEASE:=1
+
+PKG_SOURCE:=django-secure-$(PKG_VERSION).tar.gz
+PKG_SOURCE_URL:=https://pypi.python.org/packages/source/d/django-secure/
+PKG_MD5SUM:=7fa6bc01cfc3d9443102ef1e5739a3a8
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/django-secure-$(PKG_VERSION)
+PKG_BUILD_DEPENDS:=python python-setuptools
+
+include $(INCLUDE_DIR)/package.mk
+$(call include_mk, python-package.mk)
+
+define Package/django-secure
+  SECTION:=language-python
+  CATEGORY:=Languages
+  SUBMENU:=Python
+  TITLE:=Utilities and a linter to secure your Django site.
+  URL:=https://www.djangoproject.com/
+  DEPENDS:=+python +python-setuptools
+endef
+
+define Package/django-secure/description
+ Helping you remember to do the stupid little things to improve your
+ Django site’s security. Inspired by Mozilla’s Secure Coding Guidelines,
+ and intended for sites that are entirely or mostly served over SSL
+ (which should include anything with user logins).development and
+ clean, pragmatic design.
+endef
+
+define Build/Compile
+$(call Build/Compile/PyMod,., \
+install --prefix="/usr" --root="$(PKG_INSTALL_DIR)" \
+)
+endef
+
+define Package/django-secure/install
+$(INSTALL_DIR) $(1)$(PYTHON_PKG_DIR)
+$(CP) \
+$(PKG_INSTALL_DIR)$(PYTHON_PKG_DIR)/* \
+$(1)$(PYTHON_PKG_DIR)/
+endef
+
+$(eval $(call BuildPackage,django-secure))
-- 
1.8.1.4
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[OpenWrt-Devel] [PATCH v2] Add package django-sslserver

2015-10-10 Thread philby john 
>From 0933d431d05aeaff3ad79bd7d46a8832fa337736 Mon Sep 17 00:00:00 2001
From: Philby John 
Date: Sat, 10 Oct 2015 18:53:46 +0530
Subject: [PATCH] Add package django-sslserver

Add django-sslserver ver 0.15 which is an SSL-enabled
development server for Django.

Signed-off-by: Philby John 
Tested-by: Ashok 
---
 lang/django-sslserver/Makefile | 51 ++
 1 file changed, 51 insertions(+)
 create mode 100644 lang/django-sslserver/Makefile

diff --git a/lang/django-sslserver/Makefile b/lang/django-sslserver/Makefile
new file mode 100644
index 000..e9b5dbc
--- /dev/null
+++ b/lang/django-sslserver/Makefile
@@ -0,0 +1,51 @@
+#
+# Copyright (C) 2015 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=django-sslserver
+PKG_VERSION:=0.15
+PKG_RELEASE:=1
+
+PKG_SOURCE:=django-sslserver-$(PKG_VERSION).tar.gz
+PKG_SOURCE_URL:=https://pypi.python.org/packages/source/d/django-sslserver/
+PKG_MD5SUM:=dd83049f0c50f94a1cf3acb6bc7dd6bd
+
+PKG_BUILD_DIR:=$(BUILD_DIR)/django-sslserver-$(PKG_VERSION)
+PKG_BUILD_DEPENDS:=python python-setuptools
+
+include $(INCLUDE_DIR)/package.mk
+$(call include_mk, python-package.mk)
+
+define Package/django-sslserver
+  SECTION:=language-python
+  CATEGORY:=Languages
+  SUBMENU:=Python
+  TITLE:=An SSL-enabled development server for Django
+  URL:=https://www.djangoproject.com/
+  DEPENDS:=+python +python-setuptools
+endef
+
+define Package/django-sslserver/description
+ Django SSL Server ships "batteries included"
+ with a self-signed server certificate.
+endef
+
+define Build/Compile
+$(call Build/Compile/PyMod,., \
+install --prefix="/usr" --root="$(PKG_INSTALL_DIR)" \
+)
+endef
+
+define Package/django-sslserver/install
+$(INSTALL_DIR) $(1)$(PYTHON_PKG_DIR)
+$(CP) \
+$(PKG_INSTALL_DIR)$(PYTHON_PKG_DIR)/* \
+$(1)$(PYTHON_PKG_DIR)/
+endef
+
+$(eval $(call BuildPackage,django-sslserver))
-- 
1.8.1.4
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[OpenWrt-Devel] [PATCH] omap/Beagleboard: remove FEATURES override

2015-10-10 Thread Alexander Couzens 
It overrides the feature list of the whole target.

Signed-off-by: Alexander Couzens 
---
 target/linux/omap/profiles/beagleboard.mk | 1 -
 1 file changed, 1 deletion(-)

diff --git a/target/linux/omap/profiles/beagleboard.mk 
b/target/linux/omap/profiles/beagleboard.mk
index 4658287..3cf51d4 100644
--- a/target/linux/omap/profiles/beagleboard.mk
+++ b/target/linux/omap/profiles/beagleboard.mk
@@ -7,7 +7,6 @@
 
 define Profile/BEAGLEBOARD
NAME:=EBV BeagleBoard
-   FEATURES:= usb ext4 targz
DEFAULT_PACKAGES += kmod-usb2 kmod-usb2-omap \
kmod-usb-net kmod-usb-net-asix \
kmod-usb-net-asix-ax88179 kmod-usb-net-hso \
-- 
2.5.3
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Re: [OpenWrt-Devel] SVN to GIT transition

2015-10-10 Thread nemesis 
On Sat, 10 Oct 2015 00:41:24 +0300, Roman Yeryomin 
 wrote:

On 9 October 2015 at 21:22, Jo-Philipp Wich  wrote:

Hi.

Moving to Git seemed to have lots of traction at the summit, and 
I'll
add my voice that this sounds like a step in the right direction 
for

OpenWrt.  I'm assuming that we would want to do a proper SVN to Git
conversion, and Eric's help on this would be great, I think.  My
discussion with Eric is over on Google+ and marked public:
https://plus.google.com/+JonathanBennett87/posts/bMPMjn7ZcJS


Why does the core system need to migrate from svn to git?



I thought everybody is using git anyway already. Are there people
still using svn?


doing something because everybody is doing so is not the best argument 
IMHO.


I would say that using git would improve quite a few things:

* it would be easier to send upstream patches
* having a good git web interface like gitlab or github would allow 
newcomers to participate more easily
* it would make life easier to the core contributors that prefer to 
work with git because git allows a very powerful development workflow 
compared to SVN


Federico
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Re: [OpenWrt-Devel] SVN to GIT transition

2015-10-10 Thread Florian Fainelli 
2015-10-10 10:45 GMT-07:00 nemesis :
> On Sat, 10 Oct 2015 00:41:24 +0300, Roman Yeryomin 
> wrote:
>>
>> On 9 October 2015 at 21:22, Jo-Philipp Wich  wrote:
>>>
>>> Hi.
>>>
 Moving to Git seemed to have lots of traction at the summit, and I'll
 add my voice that this sounds like a step in the right direction for
 OpenWrt.  I'm assuming that we would want to do a proper SVN to Git
 conversion, and Eric's help on this would be great, I think.  My
 discussion with Eric is over on Google+ and marked public:
 https://plus.google.com/+JonathanBennett87/posts/bMPMjn7ZcJS
>>>
>>>
>>> Why does the core system need to migrate from svn to git?
>>>
>>
>> I thought everybody is using git anyway already. Are there people
>> still using svn?
>
>
> doing something because everybody is doing so is not the best argument IMHO.
>
> I would say that using git would improve quite a few things:
>
> * it would be easier to send upstream patches

I do not think it would make anything easier on that front, unless we
start putting existing git-managed projects as submodules of the
top-level openwrt.git repository, this could become fairly cumbersome
to maintain.

> * having a good git web interface like gitlab or github would allow
> newcomers to participate more easily

Fair enough, but then again, considering OpenWrt's development model,
the mailing-list should be good enough to get a grasp at what changes
are submitted/reviewed/commented on, no?

> * it would make life easier to the core contributors that prefer to work
> with git because git allows a very powerful development workflow compared to
> SVN

git-svn is kind of the best of both worlds right now.

There is a big problem with git, which is identifying what OpenWrt
release your image is based off. With subversion, it is fairly easy,
you have a revision number that keeps incrementing. With git, asking
people to give you their git-describe output might be a little harder.
On the plus side, we would know if someone had tampered with the
sources (-dirty), but we would not be able to track down changes
easily if someone just created branches and added patches there, since
these would be objects and references that are not accessible.
--
Florian
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Re: [OpenWrt-Devel] SVN to GIT transition

2015-10-10 Thread Attila Lendvai 
> There is a big problem with git, which is identifying what OpenWrt
> release your image is based off. With subversion, it is fairly easy,
> you have a revision number that keeps incrementing. With git, asking
> people to give you their git-describe output might be a little harder.
> On the plus side, we would know if someone had tampered with the
> sources (-dirty), but we would not be able to track down changes
> easily if someone just created branches and added patches there, since
> these would be objects and references that are not accessible.

not sure if it solves everything, but there's this:

https://github.com/sbcl/sbcl/blob/master/generate-version.sh

given a disciplined tagging strategy, it extracts a version, which
branch, and how many extra patches it has, and the end of the hash.

an example: 1.2.15.6.branch-name.5-995ba66

-- 
• attila lendvai
• PGP: 963F 5D5F 45C7 DFCD 0A39
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and gather to itself such explosive power that the day it bursts
through it will knock down everything that stands in its way.”
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[OpenWrt-Devel] [PATCH 7/8] ramips: use transfer_one instead of transfer_one_message on mt7621 spi

2015-10-10 Thread Michael Lee 
use kernel buildin transfer_one_message. we only need to implement
transfer_one
the hardware support max 5 bytes for opcode and address. max 32 bytes
for tx/rx data. when first transfer fill data to op/addr register then
wait second transfer and fill data to data register. finally start
hardware transfer

Signed-off-by: Michael Lee 
---
 ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 265 -
 1 file changed, 103 insertions(+), 162 deletions(-)

diff --git 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 1b2476c..57ab71d 100644
--- 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++ 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
  obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
 --- /dev/null
 +++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,623 @@
+@@ -0,0 +1,564 @@
 +/*
 + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
 + *
@@ -141,7 +141,26 @@
 +#define MT7621_SPI_MODE_BITS  (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \
 +  SPI_CS_HIGH)
 +
-+struct mt7621_spi;
++struct mt7621_mb_reg {
++  u32 mosi_bit:12,
++  miso_bit:12,
++  cmd_bit:8;
++};
++
++struct mt7621_spi_data {
++  struct spi_message *msg;
++  union {
++  u32 mb_reg;
++  struct mt7621_mb_reg mb;
++  };
++};
++
++struct mt7621_spi_buf {
++  union {
++  u32 data[8];
++  u8 buf[32];
++  };
++};
 +
 +struct mt7621_spi {
 +  struct spi_master   *master;
@@ -150,6 +169,8 @@
 +  u16 wait_loops;
 +  u16 mode;
 +  struct clk  *clk;
++
++  struct mt7621_spi_data  data;
 +};
 +
 +static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi)
@@ -273,190 +294,109 @@
 +  mt7621_spi_read(rs, MT7621_SPI_SPACE));
 +}
 +
-+/* copy from spi.c */
-+static void spi_set_cs(struct spi_device *spi, bool enable)
++static void mt7621_fill_cmd(struct mt7621_spi *rs,
++  const u8 *data, unsigned len)
 +{
-+  if (spi->mode & SPI_CS_HIGH)
-+  enable = !enable;
++  struct mt7621_spi_buf tmp;
 +
-+  if (spi->cs_gpio >= 0)
-+  gpio_set_value(spi->cs_gpio, !enable);
-+  else if (spi->master->set_cs)
-+  spi->master->set_cs(spi, !enable);
-+}
-+
-+static int mt7621_spi_transfer_half_duplex(struct spi_master *master,
-+ struct spi_message *m)
-+{
-+  struct mt7621_spi *rs = spi_master_get_devdata(master);
-+  struct spi_device *spi = m->spi;
-+  struct spi_transfer *t = NULL;
-+  int status = 0;
-+  int i, len = 0;
-+  int rx_len = 0;
-+  u32 data[9] = { 0 };
-+  u32 val;
++  rs->data.mb.cmd_bit = len << 3;
 +
-+  mt7621_spi_wait_ready(rs, 1);
-+
-+  list_for_each_entry(t, >transfers, transfer_list) {
-+  const u8 *buf = t->tx_buf;
-+
-+  if (t->rx_buf)
-+  rx_len += t->len;
-+
-+  if (!buf)
-+  continue;
-+
-+  if (WARN_ON(len + t->len > 36)) {
-+  status = -EIO;
-+  goto msg_done;
-+  }
-+
-+  for (i = 0; i < t->len; i++, len++)
-+  data[len / 4] |= buf[i] << (8 * (len & 3));
-+  }
-+
-+  if (WARN_ON(rx_len > 32)) {
-+  status = -EIO;
-+  goto msg_done;
++  if (len == 5) {
++  tmp.data[0] = mt7621_spi_read(rs, MT7621_SPI_TRANS);
++  tmp.data[0] &= ~(SPITRANS_ADDREXT_MASK << 
SPITRANS_ADDREXT_OFFSET);
++  tmp.data[0] |= (data[0] << SPITRANS_ADDREXT_OFFSET);
++  mt7621_spi_write(rs, MT7621_SPI_TRANS, tmp.data[0]);
++  data++;
++  len--;
 +  }
 +
-+  data[0] = swab32(data[0]);
++  tmp.data[0] = 0;
++  memcpy(tmp.buf, data, len);
++  tmp.data[0] = cpu_to_be32(tmp.data[0]);
 +  if (len < 4)
-+  data[0] >>= (4 - len) * 8;
-+
-+  for (i = 0; i < len; i += 4)
-+  mt7621_spi_write(rs, MT7621_SPI_OPCODE + i, data[i / 4]);
-+
-+  val = (min_t(int, len, 4) * 8) << 24;
-+  if (len > 4)
-+  val |= (len - 4) * 8;
-+  val |= (rx_len * 8) << 12;
-+  mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
-+
-+  spi_set_cs(spi, true);
-+
-+  val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
-+  val |= SPITRANS_START;
-+  mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
-+
-+  mt7621_spi_wait_ready(rs, 36);
-+
-+  spi_set_cs(spi, false);
-+
-+  for (i = 0; i < rx_len; i += 4)
-+  data[i / 4] = mt7621_spi_read(rs, MT7621_SPI_DATA0 + i);
-+
-+  m->actual_length = len + rx_len;
++  tmp.data[0]

[OpenWrt-Devel] [PATCH 6/8] ramips: improve mt7621 spi chip select

2015-10-10 Thread Michael Lee 
* use chip select register to control chip select function instead of
  use chip select polarity
* should support use gpio as cs pin
* deselected the spi device when setup and add debug info

Signed-off-by: Michael Lee 
---
 ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 95 --
 1 file changed, 68 insertions(+), 27 deletions(-)

diff --git 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index d1067ea..1b2476c 100644
--- 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++ 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
  obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
 --- /dev/null
 +++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,582 @@
+@@ -0,0 +1,623 @@
 +/*
 + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
 + *
@@ -53,6 +53,7 @@
 +#include 
 +#include 
 +#include 
++#include 
 +
 +#include 
 +
@@ -208,30 +209,26 @@
 +  return (prescale << SPIMASTER_CLKSEL_OFFSET);
 +}
 +
-+static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)
++static void mt7621_spi_set_cs(struct spi_device *spi, bool enable)
 +{
-+  u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
-+
-+  master |= 7 << 29;
-+  master |= 1 << 2;
-+  if (duplex)
-+  master |= 1 << 10;
-+  else
-+  master &= ~(1 << 10);
++  struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
++  u32 reg;
 +
-+  mt7621_spi_write(rs, MT7621_SPI_MASTER, master);
-+}
++  if (spi->mode & SPI_CS_HIGH)
++  enable = !enable;
++  enable = !enable;
 +
-+static void mt7621_spi_set_cs(struct spi_device *spi, int enable)
-+{
-+  struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+  int cs = spi->chip_select;
-+  u32 polar = 0;
++  reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
++  reg &= ~(SPIMASTER_CS_MASK << SPIMASTER_CS_OFFSET);
 +
-+mt7621_spi_reset(rs, cs);
 +  if (enable)
-+  polar = BIT(cs);
-+  mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
++  reg |= (spi->chip_select << SPIMASTER_CS_OFFSET);
++  else {
++  /* when disable just enable cs 8 instead */
++  reg |= (SPIMASTER_CS_MASK << SPIMASTER_CS_OFFSET);
++  }
++
++  mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
 +}
 +
 +static inline int mt7621_spi_wait_ready(struct mt7621_spi *rs, int len)
@@ -247,6 +244,47 @@
 +  return -ETIMEDOUT;
 +}
 +
++static void mt7621_dump_reg(struct spi_master *master, const char *func)
++{
++  struct mt7621_spi *rs = spi_master_get_devdata(master);
++
++  dev_dbg(>dev, "%s trans: %08x, opcode: %08x, data0: %08x, "
++  "data1: %08x, data2: %08x, data3: %08x, " \
++  "data4: %08x, data5: %08x, data6: %08x, " \
++  "data7: %08x, master: %08x, morebuf: %08x, " \
++  "qctl: %08x, status: %08x, polar: %08x, " \
++  "space: %08x\n",
++  func,
++  mt7621_spi_read(rs, MT7621_SPI_TRANS),
++  mt7621_spi_read(rs, MT7621_SPI_OPCODE),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 4),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 8),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 12),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 16),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 20),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 24),
++  mt7621_spi_read(rs, MT7621_SPI_DATA0 + 28),
++  mt7621_spi_read(rs, MT7621_SPI_MASTER),
++  mt7621_spi_read(rs, MT7621_SPI_MOREBUF),
++  mt7621_spi_read(rs, MT7621_SPI_QUEUE_CTL),
++  mt7621_spi_read(rs, MT7621_SPI_STATUS),
++  mt7621_spi_read(rs, MT7621_SPI_POLAR),
++  mt7621_spi_read(rs, MT7621_SPI_SPACE));
++}
++
++/* copy from spi.c */
++static void spi_set_cs(struct spi_device *spi, bool enable)
++{
++  if (spi->mode & SPI_CS_HIGH)
++  enable = !enable;
++
++  if (spi->cs_gpio >= 0)
++  gpio_set_value(spi->cs_gpio, !enable);
++  else if (spi->master->set_cs)
++  spi->master->set_cs(spi, !enable);
++}
++
 +static int mt7621_spi_transfer_half_duplex(struct spi_master *master,
 + struct spi_message *m)
 +{
@@ -297,7 +335,7 @@
 +  val |= (rx_len * 8) << 12;
 +  mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
 +
-+  mt7621_spi_set_cs(spi, 1);
++  spi_set_cs(spi, true);
 +
 +  val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
 +  val |= SPITRANS_START;
@@

[OpenWrt-Devel] [PATCH 5/8] ramips: move mt7621 spi clock set to spi_prepare_message

2015-10-10 Thread Michael Lee 
before spi transfer. use spi_prepare_message to setup spi hardware. it
will setup MSB, spi mode and speed

Signed-off-by: Michael Lee 
---
 ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 133 -
 1 file changed, 75 insertions(+), 58 deletions(-)

diff --git 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 0ea0508..d1067ea 100644
--- 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++ 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
  obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
 --- /dev/null
 +++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,565 @@
+@@ -0,0 +1,582 @@
 +/*
 + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
 + *
@@ -57,8 +57,6 @@
 +#include 
 +
 +#define DRIVER_NAME   "spi-mt7621"
-+/* in usec */
-+#define RALINK_SPI_WAIT_MAX_LOOP  2000
 +
 +#define MT7621_SPI_TRANS  0x00
 +#define MT7621_SPI_OPCODE 0x04
@@ -147,8 +145,9 @@
 +struct mt7621_spi {
 +  struct spi_master   *master;
 +  void __iomem*base;
-+  unsigned intspeed;
++  u32 speed;
 +  u16 wait_loops;
++  u16 mode;
 +  struct clk  *clk;
 +};
 +
@@ -181,6 +180,34 @@
 +  iowrite32((ioread32(addr) & ~mask), addr);
 +}
 +
++static u32 mt7621_spi_baudrate_get(struct spi_device *spi, unsigned int speed)
++{
++  struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
++  u32 rate;
++  u32 prescale;
++
++  /*
++   * the supported rates are: 2, 3, 4, ... 4096
++   * round up as we look for equal or less speed
++   */
++  rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
++
++  /* Convert the rate to SPI clock divisor value. */
++  prescale = rate - 2;
++
++  /* some tolerance. double and add 100 */
++  rs->wait_loops = (8 * HZ * loops_per_jiffy) /
++  (clk_get_rate(rs->clk) / rate);
++  rs->wait_loops = (rs->wait_loops << 1) + 100;
++  rs->speed = speed;
++
++  dev_dbg(>dev, "speed: %lu/%u, rate: %u, prescal: %u, loops: %hu\n",
++  clk_get_rate(rs->clk) / rate, speed, rate, prescale,
++  rs->wait_loops);
++
++  return (prescale << SPIMASTER_CLKSEL_OFFSET);
++}
++
 +static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)
 +{
 +  u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
@@ -207,50 +234,6 @@
 +  mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
 +}
 +
-+static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed)
-+{
-+  struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+  u32 rate;
-+  u32 reg;
-+
-+  dev_dbg(>dev, "speed:%u\n", speed);
-+
-+  rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
-+  dev_dbg(>dev, "rate-1:%u\n", rate);
-+
-+  reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
-+  reg &= ~(0xfff << 16);
-+  reg |= (rate - 2) << 16;
-+
-+  /* some tolerance. double and add 100 */
-+  rs->wait_loops = (8 * HZ * loops_per_jiffy) /
-+  (clk_get_rate(rs->clk) / rate);
-+  rs->wait_loops = (rs->wait_loops << 1) + 100;
-+  rs->speed = speed;
-+
-+  reg &= ~SPIMASTER_LSB;
-+  if (spi->mode & SPI_LSB_FIRST)
-+  reg |= SPIMASTER_LSB;
-+
-+  reg &= ~(SPIMASTER_CPHA | SPIMASTER_CPOL);
-+  switch(spi->mode & (SPI_CPOL | SPI_CPHA)) {
-+  case SPI_MODE_0:
-+  break;
-+  case SPI_MODE_1:
-+  reg |= SPIMASTER_CPHA;
-+  break;
-+  case SPI_MODE_2:
-+  reg |= SPIMASTER_CPOL;
-+  break;
-+  case SPI_MODE_3:
-+  reg |= SPIMASTER_CPOL | SPIMASTER_CPHA;
-+  break;
-+  }
-+  mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
-+
-+  return 0;
-+}
-+
 +static inline int mt7621_spi_wait_ready(struct mt7621_spi *rs, int len)
 +{
 +  int loop = rs->wait_loops * len;
@@ -269,7 +252,6 @@
 +{
 +  struct mt7621_spi *rs = spi_master_get_devdata(master);
 +  struct spi_device *spi = m->spi;
-+  unsigned int speed = spi->max_speed_hz;
 +  struct spi_transfer *t = NULL;
 +  int status = 0;
 +  int i, len = 0;
@@ -302,10 +284,6 @@
 +  goto msg_done;
 +  }
 +
-+  if (mt7621_spi_prepare(spi, speed)) {
-+  status = -EIO;
-+  goto msg_done;
-+  }
 +  data[0] = swab32(data[0]);
 +  if (len < 4)
 +  data[0] >>= (4 - len) * 8;
@@ -392,11 +370,6 @@
 +  goto msg_done;
 +  }
 +
-+  if (mt7621_spi_prepare(spi, speed)) {
-+  status = -EIO;
-+  goto msg_done;
-+  }
-+
 +  for (i = 0; i <

[OpenWrt-Devel] [PATCH 1/8] ramips: complete mt7621 spi register define

2015-10-10 Thread Michael Lee 
Signed-off-by: Michael Lee 
---
 ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 113 -
 1 file changed, 85 insertions(+), 28 deletions(-)

diff --git 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 589c67e..a412cf4 100644
--- 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++ 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -1,6 +1,6 @@
 --- a/drivers/spi/Kconfig
 +++ b/drivers/spi/Kconfig
-@@ -439,6 +439,12 @@
+@@ -439,6 +439,12 @@ config SPI_RT2880
help
  This selects a driver for the Ralink RT288x/RT305x SPI Controller.
  
@@ -15,7 +15,7 @@
depends on ARCH_S3C24XX
 --- a/drivers/spi/Makefile
 +++ b/drivers/spi/Makefile
-@@ -46,6 +46,7 @@
+@@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_LM70_LLP)   += spi-lm70l
  obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o
  obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o
  obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o
@@ -25,7 +25,7 @@
  obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
 --- /dev/null
 +++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,480 @@
+@@ -0,0 +1,537 @@
 +/*
 + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
 + *
@@ -56,34 +56,91 @@
 +
 +#include 
 +
-+#define SPI_BPW_MASK(bits) BIT((bits) - 1)
-+
 +#define DRIVER_NAME   "spi-mt7621"
 +/* in usec */
 +#define RALINK_SPI_WAIT_MAX_LOOP  2000
 +
-+/* SPISTAT register bit field */
-+#define SPISTAT_BUSY  BIT(0)
-+
 +#define MT7621_SPI_TRANS  0x00
-+#define SPITRANS_BUSY BIT(16)
-+
 +#define MT7621_SPI_OPCODE 0x04
 +#define MT7621_SPI_DATA0  0x08
 +#define MT7621_SPI_DATA4  0x18
-+#define SPI_CTL_TX_RX_CNT_MASK0xff
-+#define SPI_CTL_START BIT(8)
-+
-+#define MT7621_SPI_POLAR  0x38
 +#define MT7621_SPI_MASTER 0x28
 +#define MT7621_SPI_MOREBUF0x2c
++#define MT7621_SPI_QUEUE_CTL  0x30
++#define MT7621_SPI_STATUS 0x34
++#define MT7621_SPI_POLAR  0x38
 +#define MT7621_SPI_SPACE  0x3c
 +
-+#define MT7621_CPHA   BIT(5)
-+#define MT7621_CPOL   BIT(4)
-+#define MT7621_LSB_FIRST  BIT(3)
-+
-+#define RT2880_SPI_MODE_BITS  (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | 
SPI_CS_HIGH)
++/* MT7621_SPI_TRANS */
++#define SPITRANS_ADDREXT_MASK 0xff
++#define SPITRANS_ADDREXT_OFFSET   24
++#define SPITRANS_ADDRSIZE_MASK0x3
++#define SPITRANS_ADDRSIZE_OFFSET  19
++#define SPITRANS_BUSY BIT(16)
++#define SPITRANS_STARTBIT(8)
++#define SPITRANS_BYTECNT_MASK 0xf
++#define SPITRANS_MISO_OFFSET  4
++#define SPITRANS_MOSI_OFFSET  0
++
++/* MT7621_SPI_OPCODE */
++#define SPIOP_MB_OPCODE_OFFSET24
++#define SPIOP_MB_ADDR_MASK0xff
++
++/* MT7621_SPI_MASTER */
++#define SPIMASTER_CS_MASK 0x7
++#define SPIMASTER_CS_OFFSET   29
++#define SPIMASTER_CLK_HIGHBIT(28)
++#define SPIMASTER_CLKSEL_MASK 0xfff
++#define SPIMASTER_CLKSEL_OFFSET   16
++#define SPIMASTER_CSDSEL_MASK 0x1f
++#define SPIMASTER_CSDSEL_OFFSET   11
++#define SPIMASTER_FULL_DUPLEX BIT(10)
++#define SPIMASTER_INTR_ENABLE BIT(9)
++#define SPIMASTER_START_6CLK  BIT(8)
++#define SPIMASTER_PREFETCH_ENABLE BIT(7)
++#define SPIMASTER_BIDIR_MODE  BIT(6)
++#define SPIMASTER_CPHABIT(5)
++#define SPIMASTER_CPOLBIT(4)
++#define SPIMASTER_LSB BIT(3)
++#define SPIMASTER_MB_MODE BIT(2)
++#define SPIMASTER_SERIAL_MASK 0x3
++
++/* MT7621_SPI_MOREBUF */
++#define SPIMB_CMD_MASK0x3f
++#define SPIMB_CMD_OFFSET  24
++#define SPIMB_MISO_MASK   0x1ff
++#define SPIMB_MISO_OFFSET 12
++#define SPIMB_MOSI_MASK   0x1ff
++#define SPIMB_MOSI_OFFSET 0
++
++/* MT7621_SPI_QUEUE_CTL */
++#define SPIQCTL_PAGE_MASK 0x3f
++#define SPIQCTL_PAGE_OFFSET   26
++#define SPIQCTL_BUSY  BIT(12)
++#define SPIQCTL_ADDRSIZE_MASK 0x3
++#define SPIQCTL_ADDRSIZER_OFFSET  10
++#define SPIQCTL_ADDRSIZE_OFFSET   8
++#define SPIQCTL_MOSI_MASK 0xf
++#define SPIQCTL_FASTSEL_MASK  0x7
++
++/* MT7621_SPI_STATUS */
++#define SPISTA_MODE_MASK  0x3
++#define SPISTA_MODE_OFFSET4
++#define SPISTA_OK BIT(0)
++
++/* MT7621_SPI_POLAR */
++#define SPIPOL_CSPOL_MASK 0xff
++#define SPIPOL_CSPOL_OFFSET   0
++#define SPIPOL_CSPOL_HIGH 1
++
++/* define MT7621_SPI_SPACE */
++#define SPISPA_CS_MASK0x7
++#define SPISPA_CS_OFFSET

[OpenWrt-Devel] [PATCH 8/8] ramips: update dtsi files to set mt7621 spi bus number

2015-10-10 Thread Michael Lee 
Signed-off-by: Michael Lee 
---
 target/linux/ramips/dts/mt7621.dtsi   | 6 +-
 target/linux/ramips/dts/mt7628an.dtsi | 6 +-
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/target/linux/ramips/dts/mt7621.dtsi 
b/target/linux/ramips/dts/mt7621.dtsi
index fd2e100..a4d4614 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -20,6 +20,10 @@
compatible = "mti,cpu-interrupt-controller";
};
 
+   aliases {
+   spi0 = 
+   };
+
palmbus@1E00 {
compatible = "palmbus";
reg = <0x1E00 0x10>;
@@ -84,7 +88,7 @@
no-loopback-test;
};
 
-   spi@b00 {
+   spi0: spi@b00 {
status = "okay";
 
compatible = "ralink,mt7621-spi";
diff --git a/target/linux/ramips/dts/mt7628an.dtsi 
b/target/linux/ramips/dts/mt7628an.dtsi
index 0f59cb7..629157d 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -20,6 +20,10 @@
compatible = "mti,cpu-interrupt-controller";
};
 
+   aliases {
+   spi0 = 
+   };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -105,7 +109,7 @@
};
};
 
-   spi@b00 {
+   spi0: spi@b00 {
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
 
-- 
2.3.6
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[OpenWrt-Devel] [PATCH 3/8] ramips: clean up mt7621 spi probe/remove

2015-10-10 Thread Michael Lee 
* fill struct according to the member order
* add error clean up
* set min/max spi speed. so we don't need to check again

Signed-off-by: Michael Lee 
---
 ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 79 ++
 1 file changed, 37 insertions(+), 42 deletions(-)

diff --git 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 3304ac5..71eba30 100644
--- 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++ 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
  obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
 --- /dev/null
 +++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,537 @@
+@@ -0,0 +1,532 @@
 +/*
 + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
 + *
@@ -147,13 +147,9 @@
 +struct mt7621_spi {
 +  struct spi_master   *master;
 +  void __iomem*base;
-+  unsigned intsys_freq;
 +  unsigned intspeed;
 +  u16 wait_loops;
 +  struct clk  *clk;
-+  spinlock_t  lock;
-+
-+  struct mt7621_spi_ops   *ops;
 +};
 +
 +static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi)
@@ -205,15 +201,9 @@
 +
 +  dev_dbg(>dev, "speed:%u\n", speed);
 +
-+  rate = DIV_ROUND_UP(rs->sys_freq, speed);
++  rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
 +  dev_dbg(>dev, "rate-1:%u\n", rate);
 +
-+  if (rate > 4097)
-+  return -EINVAL;
-+
-+  if (rate < 2)
-+  rate = 2;
-+
 +  reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
 +  reg &= ~(0xfff << 16);
 +  reg |= (rate - 2) << 16;
@@ -446,15 +436,12 @@
 +
 +static int mt7621_spi_setup(struct spi_device *spi)
 +{
-+  struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
++  struct spi_master *master = spi->master;
 +
-+  if ((spi->max_speed_hz == 0) ||
-+  (spi->max_speed_hz > (rs->sys_freq / 2)))
-+  spi->max_speed_hz = (rs->sys_freq / 2);
-+
-+  if (spi->max_speed_hz < (rs->sys_freq / 4097)) {
-+  dev_err(>dev, "setup: requested speed is too low %d Hz\n",
-+  spi->max_speed_hz);
++  if ((spi->max_speed_hz > master->max_speed_hz) ||
++  (spi->max_speed_hz < master->min_speed_hz)) {
++  dev_err(>dev, "invalide requested speed %d Hz\n",
++  spi->max_speed_hz);
 +  return -EINVAL;
 +  }
 +
@@ -472,17 +459,14 @@
 +  const struct of_device_id *match;
 +  struct spi_master *master;
 +  struct mt7621_spi *rs;
-+  unsigned long flags;
 +  void __iomem *base;
 +  struct resource *r;
-+  int status = 0;
 +  struct clk *clk;
-+  struct mt7621_spi_ops *ops;
++  int ret;
 +
 +  match = of_match_device(mt7621_spi_match, >dev);
 +  if (!match)
 +  return -EINVAL;
-+  ops = (struct mt7621_spi_ops *)match->data;
 +
 +  r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 +  base = devm_ioremap_resource(>dev, r);
@@ -491,45 +475,57 @@
 +
 +  clk = devm_clk_get(>dev, NULL);
 +  if (IS_ERR(clk)) {
-+  dev_err(>dev, "unable to get SYS clock, err=%d\n",
-+  status);
++  dev_err(>dev, "unable to get SYS clock\n");
 +  return PTR_ERR(clk);
 +  }
 +
-+  status = clk_prepare_enable(clk);
-+  if (status)
-+  return status;
++  ret = clk_prepare_enable(clk);
++  if (ret)
++  goto err_clk;
 +
 +  master = spi_alloc_master(>dev, sizeof(*rs));
 +  if (master == NULL) {
-+  dev_info(>dev, "master allocation failed\n");
-+  return -ENOMEM;
++  dev_err(>dev, "master allocation failed\n");
++  ret = -ENOMEM;
++  goto err_clk;
 +  }
 +
++  master->dev.of_node = pdev->dev.of_node;
 +  master->mode_bits = MT7621_SPI_MODE_BITS;
-+
++  master->bits_per_word_mask = SPI_BPW_MASK(8);
++  master->min_speed_hz = clk_get_rate(clk) / 4097;
++  master->max_speed_hz = clk_get_rate(clk) / 2;
++  master->flags = SPI_MASTER_HALF_DUPLEX;
 +  master->setup = mt7621_spi_setup;
 +  master->transfer_one_message = mt7621_spi_transfer_one_message;
-+  master->bits_per_word_mask = SPI_BPW_MASK(8);
-+  master->dev.of_node = pdev->dev.of_node;
 +  master->num_chipselect = 2;
 +
 +  dev_set_drvdata(>dev, master);
 +
 +  rs = spi_master_get_devdata(master);
++  rs->master = master;
 +  rs->base = base;
 +  rs->clk = clk;
-+  rs->master = master;
-+  rs->sys_freq = clk_get_rate(rs->clk);
-+  rs->ops = ops;
-+  dev_info(>dev, "sys_freq: %u\n", rs->sys_freq);
-+  spin_lock_irqsave(>lock, flags);
 +
 +  device_reset(>dev);
 +

[OpenWrt-Devel] [PATCH 4/8] ramips: improve mt7621 spi setup

2015-10-10 Thread Michael Lee 
check word sizes, set spi polarity and enable more buffer mode

Signed-off-by: Michael Lee 
---
 ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 35 +-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 71eba30..0ea0508 100644
--- 
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++ 
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
  obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
 --- /dev/null
 +++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,532 @@
+@@ -0,0 +1,565 @@
 +/*
 + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
 + *
@@ -167,6 +167,20 @@
 +  iowrite32(val, rs->base + reg);
 +}
 +
++static inline void mt7621_spi_setbits(struct mt7621_spi *rs, u32 reg, u32 
mask)
++{
++  void __iomem *addr = rs->base + reg;
++
++  iowrite32((ioread32(addr) | mask), addr);
++}
++
++static inline void mt7621_spi_clrbits(struct mt7621_spi *rs, u32 reg, u32 
mask)
++{
++  void __iomem *addr = rs->base + reg;
++
++  iowrite32((ioread32(addr) & ~mask), addr);
++}
++
 +static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)
 +{
 +  u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
@@ -437,6 +451,7 @@
 +static int mt7621_spi_setup(struct spi_device *spi)
 +{
 +  struct spi_master *master = spi->master;
++  struct mt7621_spi *rs = spi_master_get_devdata(master);
 +
 +  if ((spi->max_speed_hz > master->max_speed_hz) ||
 +  (spi->max_speed_hz < master->min_speed_hz)) {
@@ -445,6 +460,24 @@
 +  return -EINVAL;
 +  }
 +
++  if (!(master->bits_per_word_mask &
++  BIT(spi->bits_per_word - 1))) {
++  dev_err(>dev, "invalide bits_per_word %d\n",
++  spi->bits_per_word);
++  return -EINVAL;
++  }
++
++  /* chip polarity */
++  if (spi->mode & SPI_CS_HIGH)
++  mt7621_spi_setbits(rs, MT7621_SPI_POLAR,
++  (SPIPOL_CSPOL_HIGH << spi->chip_select));
++  else
++  mt7621_spi_clrbits(rs, MT7621_SPI_POLAR,
++  (SPIPOL_CSPOL_HIGH << spi->chip_select));
++
++  /* enable more buffer mode */
++  mt7621_spi_setbits(rs, MT7621_SPI_MASTER, SPIMASTER_MB_MODE);
++
 +  return 0;
 +}
 +
-- 
2.3.6
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[OpenWrt-Devel] [PATCH] lantiq: bugfix wrong non pre-emptive crc errors output

2015-10-10 Thread Luca Debernardi 
This patch fixes a wrong non pre-emptive crc errors output of
dsl_control.sh status.
---
 target/linux/lantiq/base-files/lib/functions/lantiq_dsl.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/linux/lantiq/base-files/lib/functions/lantiq_dsl.sh 
b/target/linux/lantiq/base-files/lib/functions/lantiq_dsl.sh
index 46f3a17..dbeb344 100755
--- a/target/linux/lantiq/base-files/lib/functions/lantiq_dsl.sh
+++ b/target/linux/lantiq/base-files/lib/functions/lantiq_dsl.sh
@@ -437,7 +437,7 @@ errors() {
echo "Loss of Signal Seconds (LOSS):Near: ${lossn} 
/ Far: ${lossf}"
echo "Unavailable Seconds (UAS):Near: ${uasn} / 
Far: ${uasf}"
echo "Header Error Code Errors (HEC):   Near: ${hecn} / 
Far: ${hecf}"
-   echo "Non Pre-emtive CRC errors (CRC_P):Near: 
${crcp_pn} / Far: ${crcp_pf}"
+   echo "Non Pre-emtive CRC errors (CRC_P):Near: ${crc_pn} 
/ Far: ${crc_pf}"
echo "Pre-emtive CRC errors (CRCP_P):   Near: 
${crcp_pn} / Far: ${crcp_pf}"
fi
 }
-- 
1.8.4
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[OpenWrt-Devel] [PATCH 2/2] brcm2708: use mmd for overlays subdirectory

2015-10-10 Thread Álvaro Fernández Rojas 
Fixes https://dev.openwrt.org/ticket/20704

Signed-off-by: Álvaro Fernández Rojas 
---
 target/linux/brcm2708/image/Makefile | 9 ++---
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/target/linux/brcm2708/image/Makefile 
b/target/linux/brcm2708/image/Makefile
index 3744cac..cc0bfb0 100644
--- a/target/linux/brcm2708/image/Makefile
+++ b/target/linux/brcm2708/image/Makefile
@@ -21,12 +21,6 @@ else
   endef
 endif
 
-define Image/Prepare
-   rm -rf $(KDIR)/overlays
-   mkdir -p $(KDIR)/overlays
-   $(CP) $(DTS_DIR)/overlays/*.dtb $(KDIR)/overlays/
-endef
-
 ### Image scripts ###
 define Build/gen-cfg
cat config.txt > $@.config
@@ -47,7 +41,8 @@ define Build/boot-img
mcopy -i $@.boot $@.config ::config.txt
mcopy -i $@.boot $(word 1,$^) ::kernel.img
mcopy -i $@.boot $(DTS_DIR)/$(DEVICE_DTS).dtb ::$(DEVICE_DTS).dtb
-   mcopy -s -i $@.boot $(KDIR)/overlays ::
+   mmd -i $@.boot ::/overlays
+   mcopy -i $@.boot $(DTS_DIR)/overlays/*.dtb ::/overlays/
 endef
 
 define Build/sdcard-img
-- 
1.9.1
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[OpenWrt-Devel] [PATCH 1/2] mtools: build and install mmd

2015-10-10 Thread Álvaro Fernández Rojas 
useful for making MS-DOS subdirectories

Signed-off-by: Álvaro Fernández Rojas 
---
 tools/mtools/Makefile | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/tools/mtools/Makefile b/tools/mtools/Makefile
index 674c8dd..13de447 100644
--- a/tools/mtools/Makefile
+++ b/tools/mtools/Makefile
@@ -22,15 +22,17 @@ HOST_CONFIGURE_VARS += \
ac_cv_header_iconv_h=no
 
 define Host/Compile
-   $(MAKE) -C $(HOST_BUILD_DIR) mcopy
+   $(MAKE) -C $(HOST_BUILD_DIR) mcopy mmd
 endef
 
 define Host/Install
$(INSTALL_BIN) $(HOST_BUILD_DIR)/mcopy $(STAGING_DIR_HOST)/bin/
+   $(INSTALL_BIN) $(HOST_BUILD_DIR)/mmd $(STAGING_DIR_HOST)/bin/
 endef
 
 define Host/Clean
rm -f $(STAGING_DIR_HOST)/bin/mcopy
+   rm -f $(STAGING_DIR_HOST)/bin/mmd
 endef
 
 $(eval $(call HostBuild))
-- 
1.9.1
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Re: [OpenWrt-Devel] SVN to GIT transition

2015-10-10 Thread Steven Barth 
One important point was IIRC, migrating from one stable branch to another is 
awkward
since the history is different, so rebasing custom changes on top is painful.

All in all there was relatively overwhelming feedback of most of the people at 
the
summit that there lifes would be very much easier if the main repo was based on 
git
and there was noone who really felt the opposite.
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