[OpenWrt-Devel] [PATCH 1/1] ramips: add second spi master sysclk
for mt7620, rt3883 and rt5350
Signed-off-by: Michael Lee <igv...@gmail.com>
---
.../patches-3.18/0305-second_spi_sysclk.patch | 30 ++
1 file changed, 30 insertions(+)
create mode 100644
target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch
diff --git a/target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch
b/target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch
new file mode 100644
index 000..dffec5e
--- /dev/null
+++ b/target/linux/ramips/patches-3.18/0305-second_spi_sysclk.patch
@@ -0,0 +1,30 @@
+--- a/arch/mips/ralink/mt7620.c
b/arch/mips/ralink/mt7620.c
+@@ -434,6 +434,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("1100.timer", periph_rate);
+ ralink_clk_add("1120.watchdog", periph_rate);
+ ralink_clk_add("1b00.spi", sys_rate);
++ ralink_clk_add("1b40.spi", sys_rate);
+ ralink_clk_add("1c00.uartlite", periph_rate);
+ ralink_clk_add("1d00.uart1", periph_rate);
+ ralink_clk_add("1e00.uart2", periph_rate);
+--- a/arch/mips/ralink/rt305x.c
b/arch/mips/ralink/rt305x.c
+@@ -199,6 +199,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("cpu", cpu_rate);
+ ralink_clk_add("sys", sys_rate);
+ ralink_clk_add("1b00.spi", sys_rate);
++ ralink_clk_add("1b40.spi", sys_rate);
+ ralink_clk_add("1100.timer", wdt_rate);
+ ralink_clk_add("1120.watchdog", wdt_rate);
+ ralink_clk_add("1500.uart", uart_rate);
+--- a/arch/mips/ralink/rt3883.c
b/arch/mips/ralink/rt3883.c
+@@ -109,6 +109,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("1120.watchdog", sys_rate);
+ ralink_clk_add("1500.uart", 4000);
+ ralink_clk_add("1b00.spi", sys_rate);
++ ralink_clk_add("1b40.spi", sys_rate);
+ ralink_clk_add("1c00.uartlite", 4000);
+ ralink_clk_add("1010.ethernet", sys_rate);
+ ralink_clk_add("1018.wmac", 4000);
--
2.3.6
___
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[OpenWrt-Devel] [PATCH 7/8] ramips: use transfer_one instead of transfer_one_message on mt7621 spi
use kernel buildin transfer_one_message. we only need to implement
transfer_one
the hardware support max 5 bytes for opcode and address. max 32 bytes
for tx/rx data. when first transfer fill data to op/addr register then
wait second transfer and fill data to data register. finally start
hardware transfer
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 265 -
1 file changed, 103 insertions(+), 162 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 1b2476c..57ab71d 100644
---
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
--- /dev/null
+++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,623 @@
+@@ -0,0 +1,564 @@
+/*
+ * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
+ *
@@ -141,7 +141,26 @@
+#define MT7621_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \
+ SPI_CS_HIGH)
+
-+struct mt7621_spi;
++struct mt7621_mb_reg {
++ u32 mosi_bit:12,
++ miso_bit:12,
++ cmd_bit:8;
++};
++
++struct mt7621_spi_data {
++ struct spi_message *msg;
++ union {
++ u32 mb_reg;
++ struct mt7621_mb_reg mb;
++ };
++};
++
++struct mt7621_spi_buf {
++ union {
++ u32 data[8];
++ u8 buf[32];
++ };
++};
+
+struct mt7621_spi {
+ struct spi_master *master;
@@ -150,6 +169,8 @@
+ u16 wait_loops;
+ u16 mode;
+ struct clk *clk;
++
++ struct mt7621_spi_data data;
+};
+
+static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi)
@@ -273,190 +294,109 @@
+ mt7621_spi_read(rs, MT7621_SPI_SPACE));
+}
+
-+/* copy from spi.c */
-+static void spi_set_cs(struct spi_device *spi, bool enable)
++static void mt7621_fill_cmd(struct mt7621_spi *rs,
++ const u8 *data, unsigned len)
+{
-+ if (spi->mode & SPI_CS_HIGH)
-+ enable = !enable;
++ struct mt7621_spi_buf tmp;
+
-+ if (spi->cs_gpio >= 0)
-+ gpio_set_value(spi->cs_gpio, !enable);
-+ else if (spi->master->set_cs)
-+ spi->master->set_cs(spi, !enable);
-+}
-+
-+static int mt7621_spi_transfer_half_duplex(struct spi_master *master,
-+ struct spi_message *m)
-+{
-+ struct mt7621_spi *rs = spi_master_get_devdata(master);
-+ struct spi_device *spi = m->spi;
-+ struct spi_transfer *t = NULL;
-+ int status = 0;
-+ int i, len = 0;
-+ int rx_len = 0;
-+ u32 data[9] = { 0 };
-+ u32 val;
++ rs->data.mb.cmd_bit = len << 3;
+
-+ mt7621_spi_wait_ready(rs, 1);
-+
-+ list_for_each_entry(t, >transfers, transfer_list) {
-+ const u8 *buf = t->tx_buf;
-+
-+ if (t->rx_buf)
-+ rx_len += t->len;
-+
-+ if (!buf)
-+ continue;
-+
-+ if (WARN_ON(len + t->len > 36)) {
-+ status = -EIO;
-+ goto msg_done;
-+ }
-+
-+ for (i = 0; i < t->len; i++, len++)
-+ data[len / 4] |= buf[i] << (8 * (len & 3));
-+ }
-+
-+ if (WARN_ON(rx_len > 32)) {
-+ status = -EIO;
-+ goto msg_done;
++ if (len == 5) {
++ tmp.data[0] = mt7621_spi_read(rs, MT7621_SPI_TRANS);
++ tmp.data[0] &= ~(SPITRANS_ADDREXT_MASK <<
SPITRANS_ADDREXT_OFFSET);
++ tmp.data[0] |= (data[0] << SPITRANS_ADDREXT_OFFSET);
++ mt7621_spi_write(rs, MT7621_SPI_TRANS, tmp.data[0]);
++ data++;
++ len--;
+ }
+
-+ data[0] = swab32(data[0]);
++ tmp.data[0] = 0;
++ memcpy(tmp.buf, data, len);
++ tmp.data[0] = cpu_to_be32(tmp.data[0]);
+ if (len < 4)
-+ data[0] >>= (4 - len) * 8;
-+
-+ for (i = 0; i < len; i += 4)
-+ mt7621_spi_write(rs, MT7621_SPI_OPCODE + i, data[i / 4]);
-+
-+ val = (min_t(int, len, 4) * 8) << 24;
-+ if (len > 4)
-+ val |= (len - 4) * 8;
-+ val |= (rx_len * 8) << 12;
-+ mt7621_spi_write(rs, MT7621_SPI_MOREBUF, val);
-+
-+ spi_set_cs(spi, true);
-+
-+ val = mt7621_spi_read(rs, MT7621_SPI_TRANS);
-+ val |= SPITRANS_START;
-+ mt7621_spi_write(rs, MT7621_SPI_TRANS, val);
-+
-+ mt7621_spi_wait_ready(rs, 36);
-+
-+ spi_set_cs(spi, false);
-+
-+ for (i = 0; i < rx_len; i += 4)
-+
[OpenWrt-Devel] [PATCH 6/8] ramips: improve mt7621 spi chip select
* use chip select register to control chip select function instead of
use chip select polarity
* should support use gpio as cs pin
* deselected the spi device when setup and add debug info
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 95 --
1 file changed, 68 insertions(+), 27 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index d1067ea..1b2476c 100644
---
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
--- /dev/null
+++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,582 @@
+@@ -0,0 +1,623 @@
+/*
+ * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
+ *
@@ -53,6 +53,7 @@
+#include
+#include
+#include
++#include
+
+#include
+
@@ -208,30 +209,26 @@
+ return (prescale << SPIMASTER_CLKSEL_OFFSET);
+}
+
-+static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)
++static void mt7621_spi_set_cs(struct spi_device *spi, bool enable)
+{
-+ u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
-+
-+ master |= 7 << 29;
-+ master |= 1 << 2;
-+ if (duplex)
-+ master |= 1 << 10;
-+ else
-+ master &= ~(1 << 10);
++ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
++ u32 reg;
+
-+ mt7621_spi_write(rs, MT7621_SPI_MASTER, master);
-+}
++ if (spi->mode & SPI_CS_HIGH)
++ enable = !enable;
++ enable = !enable;
+
-+static void mt7621_spi_set_cs(struct spi_device *spi, int enable)
-+{
-+ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+ int cs = spi->chip_select;
-+ u32 polar = 0;
++ reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
++ reg &= ~(SPIMASTER_CS_MASK << SPIMASTER_CS_OFFSET);
+
-+mt7621_spi_reset(rs, cs);
+ if (enable)
-+ polar = BIT(cs);
-+ mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
++ reg |= (spi->chip_select << SPIMASTER_CS_OFFSET);
++ else {
++ /* when disable just enable cs 8 instead */
++ reg |= (SPIMASTER_CS_MASK << SPIMASTER_CS_OFFSET);
++ }
++
++ mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
+}
+
+static inline int mt7621_spi_wait_ready(struct mt7621_spi *rs, int len)
@@ -247,6 +244,47 @@
+ return -ETIMEDOUT;
+}
+
++static void mt7621_dump_reg(struct spi_master *master, const char *func)
++{
++ struct mt7621_spi *rs = spi_master_get_devdata(master);
++
++ dev_dbg(>dev, "%s trans: %08x, opcode: %08x, data0: %08x, "
++ "data1: %08x, data2: %08x, data3: %08x, " \
++ "data4: %08x, data5: %08x, data6: %08x, " \
++ "data7: %08x, master: %08x, morebuf: %08x, " \
++ "qctl: %08x, status: %08x, polar: %08x, " \
++ "space: %08x\n",
++ func,
++ mt7621_spi_read(rs, MT7621_SPI_TRANS),
++ mt7621_spi_read(rs, MT7621_SPI_OPCODE),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 4),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 8),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 12),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 16),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 20),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 24),
++ mt7621_spi_read(rs, MT7621_SPI_DATA0 + 28),
++ mt7621_spi_read(rs, MT7621_SPI_MASTER),
++ mt7621_spi_read(rs, MT7621_SPI_MOREBUF),
++ mt7621_spi_read(rs, MT7621_SPI_QUEUE_CTL),
++ mt7621_spi_read(rs, MT7621_SPI_STATUS),
++ mt7621_spi_read(rs, MT7621_SPI_POLAR),
++ mt7621_spi_read(rs, MT7621_SPI_SPACE));
++}
++
++/* copy from spi.c */
++static void spi_set_cs(struct spi_device *spi, bool enable)
++{
++ if (spi->mode & SPI_CS_HIGH)
++ enable = !enable;
++
++ if (spi->cs_gpio >= 0)
++ gpio_set_value(spi->cs_gpio, !enable);
++ else if (spi->master->set_cs)
++ spi->master->set_cs(spi, !enable);
++}
++
+static int mt7621_spi_transfer_half_duplex(struct spi_master *master,
+ struct spi_message *m)
+{
@@ -297,7 +335,7 @@
+ val |= (rx_len * 8) << 12;
+ mt7621_spi_write(rs, MT7621_S
[OpenWrt-Devel] [PATCH 5/8] ramips: move mt7621 spi clock set to spi_prepare_message
before spi transfer. use spi_prepare_message to setup spi hardware. it
will setup MSB, spi mode and speed
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 133 -
1 file changed, 75 insertions(+), 58 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 0ea0508..d1067ea 100644
---
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
--- /dev/null
+++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,565 @@
+@@ -0,0 +1,582 @@
+/*
+ * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
+ *
@@ -57,8 +57,6 @@
+#include
+
+#define DRIVER_NAME "spi-mt7621"
-+/* in usec */
-+#define RALINK_SPI_WAIT_MAX_LOOP 2000
+
+#define MT7621_SPI_TRANS 0x00
+#define MT7621_SPI_OPCODE 0x04
@@ -147,8 +145,9 @@
+struct mt7621_spi {
+ struct spi_master *master;
+ void __iomem*base;
-+ unsigned intspeed;
++ u32 speed;
+ u16 wait_loops;
++ u16 mode;
+ struct clk *clk;
+};
+
@@ -181,6 +180,34 @@
+ iowrite32((ioread32(addr) & ~mask), addr);
+}
+
++static u32 mt7621_spi_baudrate_get(struct spi_device *spi, unsigned int speed)
++{
++ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
++ u32 rate;
++ u32 prescale;
++
++ /*
++ * the supported rates are: 2, 3, 4, ... 4096
++ * round up as we look for equal or less speed
++ */
++ rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
++
++ /* Convert the rate to SPI clock divisor value. */
++ prescale = rate - 2;
++
++ /* some tolerance. double and add 100 */
++ rs->wait_loops = (8 * HZ * loops_per_jiffy) /
++ (clk_get_rate(rs->clk) / rate);
++ rs->wait_loops = (rs->wait_loops << 1) + 100;
++ rs->speed = speed;
++
++ dev_dbg(>dev, "speed: %lu/%u, rate: %u, prescal: %u, loops: %hu\n",
++ clk_get_rate(rs->clk) / rate, speed, rate, prescale,
++ rs->wait_loops);
++
++ return (prescale << SPIMASTER_CLKSEL_OFFSET);
++}
++
+static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)
+{
+ u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
@@ -207,50 +234,6 @@
+ mt7621_spi_write(rs, MT7621_SPI_POLAR, polar);
+}
+
-+static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed)
-+{
-+ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
-+ u32 rate;
-+ u32 reg;
-+
-+ dev_dbg(>dev, "speed:%u\n", speed);
-+
-+ rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
-+ dev_dbg(>dev, "rate-1:%u\n", rate);
-+
-+ reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
-+ reg &= ~(0xfff << 16);
-+ reg |= (rate - 2) << 16;
-+
-+ /* some tolerance. double and add 100 */
-+ rs->wait_loops = (8 * HZ * loops_per_jiffy) /
-+ (clk_get_rate(rs->clk) / rate);
-+ rs->wait_loops = (rs->wait_loops << 1) + 100;
-+ rs->speed = speed;
-+
-+ reg &= ~SPIMASTER_LSB;
-+ if (spi->mode & SPI_LSB_FIRST)
-+ reg |= SPIMASTER_LSB;
-+
-+ reg &= ~(SPIMASTER_CPHA | SPIMASTER_CPOL);
-+ switch(spi->mode & (SPI_CPOL | SPI_CPHA)) {
-+ case SPI_MODE_0:
-+ break;
-+ case SPI_MODE_1:
-+ reg |= SPIMASTER_CPHA;
-+ break;
-+ case SPI_MODE_2:
-+ reg |= SPIMASTER_CPOL;
-+ break;
-+ case SPI_MODE_3:
-+ reg |= SPIMASTER_CPOL | SPIMASTER_CPHA;
-+ break;
-+ }
-+ mt7621_spi_write(rs, MT7621_SPI_MASTER, reg);
-+
-+ return 0;
-+}
-+
+static inline int mt7621_spi_wait_ready(struct mt7621_spi *rs, int len)
+{
+ int loop = rs->wait_loops * len;
@@ -269,7 +252,6 @@
+{
+ struct mt7621_spi *rs = spi_master_get_devdata(master);
+ struct spi_device *spi = m->spi;
-+ unsigned int speed = spi->max_speed_hz;
+ struct spi_transfer *t = NULL;
+ int status = 0;
+ int i, len = 0;
@@ -302,10 +284,6 @@
+ goto msg_done;
+ }
+
-+ if (mt7621_spi_prepare(spi, speed)) {
-+ status = -EIO;
-+ goto msg_done;
-+ }
+ data[0] = swab32(data[0]);
+ if (len < 4)
+ data[0] >>= (4 - len) * 8;
@@ -392,11 +370,6 @@
+ g
[OpenWrt-Devel] [PATCH 1/8] ramips: complete mt7621 spi register define
Signed-off-by: Michael Lee <igv...@gmail.com> --- ...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 113 - 1 file changed, 85 insertions(+), 28 deletions(-) diff --git a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch index 589c67e..a412cf4 100644 --- a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch +++ b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch @@ -1,6 +1,6 @@ --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig -@@ -439,6 +439,12 @@ +@@ -439,6 +439,12 @@ config SPI_RT2880 help This selects a driver for the Ralink RT288x/RT305x SPI Controller. @@ -15,7 +15,7 @@ depends on ARCH_S3C24XX --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile -@@ -46,6 +46,7 @@ +@@ -46,6 +46,7 @@ obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70l obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o obj-$(CONFIG_SPI_MPC52xx_PSC) += spi-mpc52xx-psc.o obj-$(CONFIG_SPI_MPC52xx) += spi-mpc52xx.o @@ -25,7 +25,7 @@ obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o --- /dev/null +++ b/drivers/spi/spi-mt7621.c -@@ -0,0 +1,480 @@ +@@ -0,0 +1,537 @@ +/* + * spi-mt7621.c -- MediaTek MT7621 SPI controller driver + * @@ -56,34 +56,91 @@ + +#include + -+#define SPI_BPW_MASK(bits) BIT((bits) - 1) -+ +#define DRIVER_NAME "spi-mt7621" +/* in usec */ +#define RALINK_SPI_WAIT_MAX_LOOP 2000 + -+/* SPISTAT register bit field */ -+#define SPISTAT_BUSY BIT(0) -+ +#define MT7621_SPI_TRANS 0x00 -+#define SPITRANS_BUSY BIT(16) -+ +#define MT7621_SPI_OPCODE 0x04 +#define MT7621_SPI_DATA0 0x08 +#define MT7621_SPI_DATA4 0x18 -+#define SPI_CTL_TX_RX_CNT_MASK0xff -+#define SPI_CTL_START BIT(8) -+ -+#define MT7621_SPI_POLAR 0x38 +#define MT7621_SPI_MASTER 0x28 +#define MT7621_SPI_MOREBUF0x2c ++#define MT7621_SPI_QUEUE_CTL 0x30 ++#define MT7621_SPI_STATUS 0x34 ++#define MT7621_SPI_POLAR 0x38 +#define MT7621_SPI_SPACE 0x3c + -+#define MT7621_CPHA BIT(5) -+#define MT7621_CPOL BIT(4) -+#define MT7621_LSB_FIRST BIT(3) -+ -+#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH) ++/* MT7621_SPI_TRANS */ ++#define SPITRANS_ADDREXT_MASK 0xff ++#define SPITRANS_ADDREXT_OFFSET 24 ++#define SPITRANS_ADDRSIZE_MASK0x3 ++#define SPITRANS_ADDRSIZE_OFFSET 19 ++#define SPITRANS_BUSY BIT(16) ++#define SPITRANS_STARTBIT(8) ++#define SPITRANS_BYTECNT_MASK 0xf ++#define SPITRANS_MISO_OFFSET 4 ++#define SPITRANS_MOSI_OFFSET 0 ++ ++/* MT7621_SPI_OPCODE */ ++#define SPIOP_MB_OPCODE_OFFSET24 ++#define SPIOP_MB_ADDR_MASK0xff ++ ++/* MT7621_SPI_MASTER */ ++#define SPIMASTER_CS_MASK 0x7 ++#define SPIMASTER_CS_OFFSET 29 ++#define SPIMASTER_CLK_HIGHBIT(28) ++#define SPIMASTER_CLKSEL_MASK 0xfff ++#define SPIMASTER_CLKSEL_OFFSET 16 ++#define SPIMASTER_CSDSEL_MASK 0x1f ++#define SPIMASTER_CSDSEL_OFFSET 11 ++#define SPIMASTER_FULL_DUPLEX BIT(10) ++#define SPIMASTER_INTR_ENABLE BIT(9) ++#define SPIMASTER_START_6CLK BIT(8) ++#define SPIMASTER_PREFETCH_ENABLE BIT(7) ++#define SPIMASTER_BIDIR_MODE BIT(6) ++#define SPIMASTER_CPHABIT(5) ++#define SPIMASTER_CPOLBIT(4) ++#define SPIMASTER_LSB BIT(3) ++#define SPIMASTER_MB_MODE BIT(2) ++#define SPIMASTER_SERIAL_MASK 0x3 ++ ++/* MT7621_SPI_MOREBUF */ ++#define SPIMB_CMD_MASK0x3f ++#define SPIMB_CMD_OFFSET 24 ++#define SPIMB_MISO_MASK 0x1ff ++#define SPIMB_MISO_OFFSET 12 ++#define SPIMB_MOSI_MASK 0x1ff ++#define SPIMB_MOSI_OFFSET 0 ++ ++/* MT7621_SPI_QUEUE_CTL */ ++#define SPIQCTL_PAGE_MASK 0x3f ++#define SPIQCTL_PAGE_OFFSET 26 ++#define SPIQCTL_BUSY BIT(12) ++#define SPIQCTL_ADDRSIZE_MASK 0x3 ++#define SPIQCTL_ADDRSIZER_OFFSET 10 ++#define SPIQCTL_ADDRSIZE_OFFSET 8 ++#define SPIQCTL_MOSI_MASK 0xf ++#define SPIQCTL_FASTSEL_MASK 0x7 ++ ++/* MT7621_SPI_STATUS */ ++#define SPISTA_MODE_MASK 0x3 ++#define SPISTA_MODE_OFFSET4 ++#define SPISTA_OK BIT(0) ++ ++/* MT7621_SPI_POLAR */ ++#define SPIPOL_CSPOL_MASK 0xff ++#define SPIPOL_CSPOL_OFFSET 0 ++#define SPIPOL_CSPOL_HIGH 1 ++ ++/* define MT7621_SPI_SPACE */ ++#define SPISPA_CS_MASK0x7 ++#define
[OpenWrt-Devel] [PATCH 8/8] ramips: update dtsi files to set mt7621 spi bus number
Signed-off-by: Michael Lee <igv...@gmail.com>
---
target/linux/ramips/dts/mt7621.dtsi | 6 +-
target/linux/ramips/dts/mt7628an.dtsi | 6 +-
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/linux/ramips/dts/mt7621.dtsi
b/target/linux/ramips/dts/mt7621.dtsi
index fd2e100..a4d4614 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -20,6 +20,10 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ };
+
palmbus@1E00 {
compatible = "palmbus";
reg = <0x1E00 0x10>;
@@ -84,7 +88,7 @@
no-loopback-test;
};
- spi@b00 {
+ spi0: spi@b00 {
status = "okay";
compatible = "ralink,mt7621-spi";
diff --git a/target/linux/ramips/dts/mt7628an.dtsi
b/target/linux/ramips/dts/mt7628an.dtsi
index 0f59cb7..629157d 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -20,6 +20,10 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -105,7 +109,7 @@
};
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
--
2.3.6
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[OpenWrt-Devel] [PATCH 3/8] ramips: clean up mt7621 spi probe/remove
* fill struct according to the member order
* add error clean up
* set min/max spi speed. so we don't need to check again
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 79 ++
1 file changed, 37 insertions(+), 42 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 3304ac5..71eba30 100644
---
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
--- /dev/null
+++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,537 @@
+@@ -0,0 +1,532 @@
+/*
+ * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
+ *
@@ -147,13 +147,9 @@
+struct mt7621_spi {
+ struct spi_master *master;
+ void __iomem*base;
-+ unsigned intsys_freq;
+ unsigned intspeed;
+ u16 wait_loops;
+ struct clk *clk;
-+ spinlock_t lock;
-+
-+ struct mt7621_spi_ops *ops;
+};
+
+static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi)
@@ -205,15 +201,9 @@
+
+ dev_dbg(>dev, "speed:%u\n", speed);
+
-+ rate = DIV_ROUND_UP(rs->sys_freq, speed);
++ rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
+ dev_dbg(>dev, "rate-1:%u\n", rate);
+
-+ if (rate > 4097)
-+ return -EINVAL;
-+
-+ if (rate < 2)
-+ rate = 2;
-+
+ reg = mt7621_spi_read(rs, MT7621_SPI_MASTER);
+ reg &= ~(0xfff << 16);
+ reg |= (rate - 2) << 16;
@@ -446,15 +436,12 @@
+
+static int mt7621_spi_setup(struct spi_device *spi)
+{
-+ struct mt7621_spi *rs = spidev_to_mt7621_spi(spi);
++ struct spi_master *master = spi->master;
+
-+ if ((spi->max_speed_hz == 0) ||
-+ (spi->max_speed_hz > (rs->sys_freq / 2)))
-+ spi->max_speed_hz = (rs->sys_freq / 2);
-+
-+ if (spi->max_speed_hz < (rs->sys_freq / 4097)) {
-+ dev_err(>dev, "setup: requested speed is too low %d Hz\n",
-+ spi->max_speed_hz);
++ if ((spi->max_speed_hz > master->max_speed_hz) ||
++ (spi->max_speed_hz < master->min_speed_hz)) {
++ dev_err(>dev, "invalide requested speed %d Hz\n",
++ spi->max_speed_hz);
+ return -EINVAL;
+ }
+
@@ -472,17 +459,14 @@
+ const struct of_device_id *match;
+ struct spi_master *master;
+ struct mt7621_spi *rs;
-+ unsigned long flags;
+ void __iomem *base;
+ struct resource *r;
-+ int status = 0;
+ struct clk *clk;
-+ struct mt7621_spi_ops *ops;
++ int ret;
+
+ match = of_match_device(mt7621_spi_match, >dev);
+ if (!match)
+ return -EINVAL;
-+ ops = (struct mt7621_spi_ops *)match->data;
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(>dev, r);
@@ -491,45 +475,57 @@
+
+ clk = devm_clk_get(>dev, NULL);
+ if (IS_ERR(clk)) {
-+ dev_err(>dev, "unable to get SYS clock, err=%d\n",
-+ status);
++ dev_err(>dev, "unable to get SYS clock\n");
+ return PTR_ERR(clk);
+ }
+
-+ status = clk_prepare_enable(clk);
-+ if (status)
-+ return status;
++ ret = clk_prepare_enable(clk);
++ if (ret)
++ goto err_clk;
+
+ master = spi_alloc_master(>dev, sizeof(*rs));
+ if (master == NULL) {
-+ dev_info(>dev, "master allocation failed\n");
-+ return -ENOMEM;
++ dev_err(>dev, "master allocation failed\n");
++ ret = -ENOMEM;
++ goto err_clk;
+ }
+
++ master->dev.of_node = pdev->dev.of_node;
+ master->mode_bits = MT7621_SPI_MODE_BITS;
-+
++ master->bits_per_word_mask = SPI_BPW_MASK(8);
++ master->min_speed_hz = clk_get_rate(clk) / 4097;
++ master->max_speed_hz = clk_get_rate(clk) / 2;
++ master->flags = SPI_MASTER_HALF_DUPLEX;
+ master->setup = mt7621_spi_setup;
+ master->transfer_one_message = mt7621_spi_transfer_one_message;
-+ master->bits_per_word_mask = SPI_BPW_MASK(8);
-+ master->dev.of_node = pdev->dev.of_node;
+ master->num_chipselect = 2;
+
+ dev_set_drvdata(>dev, master);
+
+ rs = spi_master_get_devdata(master);
++ rs->master = master;
+ rs->base
[OpenWrt-Devel] [PATCH 4/8] ramips: improve mt7621 spi setup
check word sizes, set spi polarity and enable more buffer mode
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 35 +-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
index 71eba30..0ea0508 100644
---
a/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch
@@ -25,7 +25,7 @@
obj-$(CONFIG_SPI_OC_TINY) += spi-oc-tiny.o
--- /dev/null
+++ b/drivers/spi/spi-mt7621.c
-@@ -0,0 +1,532 @@
+@@ -0,0 +1,565 @@
+/*
+ * spi-mt7621.c -- MediaTek MT7621 SPI controller driver
+ *
@@ -167,6 +167,20 @@
+ iowrite32(val, rs->base + reg);
+}
+
++static inline void mt7621_spi_setbits(struct mt7621_spi *rs, u32 reg, u32
mask)
++{
++ void __iomem *addr = rs->base + reg;
++
++ iowrite32((ioread32(addr) | mask), addr);
++}
++
++static inline void mt7621_spi_clrbits(struct mt7621_spi *rs, u32 reg, u32
mask)
++{
++ void __iomem *addr = rs->base + reg;
++
++ iowrite32((ioread32(addr) & ~mask), addr);
++}
++
+static void mt7621_spi_reset(struct mt7621_spi *rs, int duplex)
+{
+ u32 master = mt7621_spi_read(rs, MT7621_SPI_MASTER);
@@ -437,6 +451,7 @@
+static int mt7621_spi_setup(struct spi_device *spi)
+{
+ struct spi_master *master = spi->master;
++ struct mt7621_spi *rs = spi_master_get_devdata(master);
+
+ if ((spi->max_speed_hz > master->max_speed_hz) ||
+ (spi->max_speed_hz < master->min_speed_hz)) {
@@ -445,6 +460,24 @@
+ return -EINVAL;
+ }
+
++ if (!(master->bits_per_word_mask &
++ BIT(spi->bits_per_word - 1))) {
++ dev_err(>dev, "invalide bits_per_word %d\n",
++ spi->bits_per_word);
++ return -EINVAL;
++ }
++
++ /* chip polarity */
++ if (spi->mode & SPI_CS_HIGH)
++ mt7621_spi_setbits(rs, MT7621_SPI_POLAR,
++ (SPIPOL_CSPOL_HIGH << spi->chip_select));
++ else
++ mt7621_spi_clrbits(rs, MT7621_SPI_POLAR,
++ (SPIPOL_CSPOL_HIGH << spi->chip_select));
++
++ /* enable more buffer mode */
++ mt7621_spi_setbits(rs, MT7621_SPI_MASTER, SPIMASTER_MB_MODE);
++
+ return 0;
+}
+
--
2.3.6
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[OpenWrt-Devel] [PATCH 5/8] ramips: improve rt2880 spi setup
* check clock rate, SPI mode, and word sizes
* setup spi polarity
* enable spi1 hw if need
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 73 ++
1 file changed, 62 insertions(+), 11 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index 605bda9..418a094 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,488 @@
+@@ -0,0 +1,539 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -175,6 +175,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ unsigned intsys_freq;
+ unsigned intspeed;
+ u16 wait_loops;
++ u16 mode;
+ struct clk *clk;
+};
+
@@ -265,6 +266,17 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ return 0;
+}
+
++static u32 get_arbiter_offset(struct spi_master *master)
++{
++ u32 offset;
++
++ offset = RAMIPS_SPI_ARBITER;
++ if (master->bus_num == 1)
++ offset -= RAMIPS_SPI_DEV_OFFSET;
++
++ return offset;
++}
++
+static void rt2880_spi_set_cs(struct rt2880_spi *rs, int enable)
+{
+ if (enable)
@@ -396,21 +408,60 @@ Acked-by: John Crispin <blo...@openwrt.org>
+
+static int rt2880_spi_setup(struct spi_device *spi)
+{
-+ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
++ struct spi_master *master = spi->master;
++ struct rt2880_spi *rs = spi_master_get_devdata(master);
++ u32 reg, old_reg, arbit_off;
+
-+ if ((spi->max_speed_hz == 0) ||
-+ (spi->max_speed_hz > (rs->sys_freq / 2)))
-+ spi->max_speed_hz = (rs->sys_freq / 2);
++ if ((spi->max_speed_hz > master->max_speed_hz) ||
++ (spi->max_speed_hz < master->min_speed_hz)) {
++ dev_err(>dev, "invalide requested speed %d Hz\n",
++ spi->max_speed_hz);
++ return -EINVAL;
++ }
+
-+ if (spi->max_speed_hz < (rs->sys_freq / 128)) {
-+ dev_err(>dev, "setup: requested speed is too low %d Hz\n",
-+ spi->max_speed_hz);
++ if (!(master->bits_per_word_mask &
++ BIT(spi->bits_per_word - 1))) {
++ dev_err(>dev, "invalide bits_per_word %d\n",
++ spi->bits_per_word);
+ return -EINVAL;
+ }
+
-+ /*
-+ * baudrate & width will be set rt2880_spi_setup_transfer
-+ */
++ /* the hardware seems can't work on mode0 force it to mode3 */
++ if ((spi->mode & (SPI_CPOL | SPI_CPHA)) == SPI_MODE_0) {
++ dev_warn(>dev, "force spi mode3\n");
++ spi->mode |= SPI_MODE_3;
++ }
++
++ /* chip polarity */
++ arbit_off = get_arbiter_offset(master);
++ reg = old_reg = rt2880_spi_read(rs, arbit_off);
++ if (spi->mode & SPI_CS_HIGH) {
++ switch (master->bus_num) {
++ case 1:
++ reg |= SPI1_POR;
++ break;
++ default:
++ reg |= SPI0_POR;
++ break;
++ }
++ } else {
++ switch (master->bus_num) {
++ case 1:
++ reg &= ~SPI1_POR;
++ break;
++ default:
++ reg &= ~SPI0_POR;
++ break;
++ }
++ }
++
++ /* enable spi1 */
++ if (master->bus_num == 1)
++ reg |= SPICTL_ARB_EN;
++
++ if (reg != old_reg)
++ rt2880_spi_write(rs, arbit_off, reg);
++
+ return 0;
+}
+
--
2.3.6
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[OpenWrt-Devel] [PATCH 6/8] ramips: move rt2880 spi clock and reset init code to spi_prepare_message
before spi transfer. use spi_prepare_message to setup spi hardware. it
will setup MSB, spi mode and speed
remove sys_freq member and speed check code
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 130 ++---
1 file changed, 62 insertions(+), 68 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index 418a094..862e24c 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,539 @@
+@@ -0,0 +1,533 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -172,8 +172,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
+struct rt2880_spi {
+ struct spi_master *master;
+ void __iomem*base;
-+ unsigned intsys_freq;
-+ unsigned intspeed;
++ u32 speed;
+ u16 wait_loops;
+ u16 mode;
+ struct clk *clk;
@@ -209,61 +208,33 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ iowrite32((ioread32(addr) & ~mask), addr);
+}
+
-+static int rt2880_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
++static u32 rt2880_spi_baudrate_get(struct spi_device *spi, unsigned int speed)
+{
+ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
+ u32 rate;
+ u32 prescale;
-+ u32 reg;
-+
-+ dev_dbg(>dev, "speed:%u\n", speed);
+
+ /*
+ * the supported rates are: 2, 4, 8, ... 128
+ * round up as we look for equal or less speed
+ */
-+ rate = DIV_ROUND_UP(rs->sys_freq, speed);
-+ dev_dbg(>dev, "rate-1:%u\n", rate);
++ rate = DIV_ROUND_UP(clk_get_rate(rs->clk), speed);
+ rate = roundup_pow_of_two(rate);
-+ dev_dbg(>dev, "rate-2:%u\n", rate);
+
+ /* Convert the rate to SPI clock divisor value. */
+ prescale = ilog2(rate / 2);
-+ dev_dbg(>dev, "prescale:%u\n", prescale);
-+
-+ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG);
-+ reg = ((reg & ~SPICFG_SPICLK_PRESCALE_MASK) | prescale);
-+ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg);
+
+ /* some tolerance. double and add 100 */
+ rs->wait_loops = (8 * HZ * loops_per_jiffy) /
+ (clk_get_rate(rs->clk) / rate);
+ rs->wait_loops = (rs->wait_loops << 1) + 100;
+ rs->speed = speed;
-+ return 0;
-+}
+
-+/*
-+ * called only when no transfer is active on the bus
-+ */
-+static int
-+rt2880_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
-+{
-+ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
-+ unsigned int speed = spi->max_speed_hz;
-+ int rc;
-+
-+ if ((t != NULL) && t->speed_hz)
-+ speed = t->speed_hz;
++ dev_dbg(>dev, "speed: %lu/%u, rate: %u, prescal: %u, loops: %hu\n",
++ clk_get_rate(rs->clk) / rate, speed, rate, prescale,
++ rs->wait_loops);
+
-+ if (rs->speed != speed) {
-+ dev_dbg(>dev, "speed_hz:%u\n", speed);
-+ rc = rt2880_spi_baudrate_set(spi, speed);
-+ if (rc)
-+ return rc;
-+ }
-+
-+ return 0;
++ return prescale;
+}
+
+static u32 get_arbiter_offset(struct spi_master *master)
@@ -345,15 +316,9 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ struct rt2880_spi *rs = spi_master_get_devdata(master);
+ struct spi_device *spi = m->spi;
+ struct spi_transfer *t = NULL;
-+ int par_override = 0;
+ int status = 0;
+ int cs_active = 0;
+
-+ /* Load defaults */
-+ status = rt2880_spi_setup_transfer(spi, NULL);
-+ if (status < 0)
-+ goto msg_done;
-+
+ list_for_each_entry(t, >transfers, transfer_list) {
+ if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) {
+ dev_err(>dev,
@@ -362,23 +327,6 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ goto msg_done;
+ }
+
-+ if (t->speed_hz && t->speed_hz < (rs->sys_freq / 128)) {
-+ dev_err(>dev,
-+ "message rejected: device min speed (%d Hz)
exceeds required transfer speed (%d Hz)\n",
-+ (rs->sys_freq / 128), t->sp
[OpenWrt-Devel] [PATCH 7/8] ramips: use transfer_one instead of transfer_one_message on rt2880 spi
* use kernel buildin transfer_one_message. we only need to implement
transfer_one and set_cs function
* should support use gpio as cs pin
* deselected the spi device when setup and add debug info
* only reset device when first driver probe
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 127 ++---
1 file changed, 62 insertions(+), 65 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index 862e24c..57986d3 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,533 @@
+@@ -0,0 +1,530 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -66,10 +66,9 @@ Acked-by: John Crispin <blo...@openwrt.org>
+#include
+#include
+#include
++#include
+
+#define DRIVER_NAME "spi-rt2880"
-+/* only one slave is supported*/
-+#define RALINK_NUM_CHIPSELECTS1
+
+#define RAMIPS_SPI_STAT 0x00
+#define RAMIPS_SPI_CFG0x10
@@ -169,6 +168,8 @@ Acked-by: John Crispin <blo...@openwrt.org>
+#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \
+ SPI_CS_HIGH)
+
++static atomic_t hw_reset_count = ATOMIC_INIT(0);
++
+struct rt2880_spi {
+ struct spi_master *master;
+ void __iomem*base;
@@ -248,12 +249,14 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ return offset;
+}
+
-+static void rt2880_spi_set_cs(struct rt2880_spi *rs, int enable)
++static void rt2880_spi_set_cs(struct spi_device *spi, bool enable)
+{
++ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
++
+ if (enable)
-+ rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
-+ else
+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
++ else
++ rt2880_spi_clrbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
+}
+
+static int rt2880_spi_wait_ready(struct rt2880_spi *rs, int len)
@@ -269,22 +272,41 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ return -ETIMEDOUT;
+}
+
-+static unsigned int
-+rt2880_spi_write_read(struct spi_device *spi, struct spi_transfer *xfer)
++static void rt2880_dump_reg(struct spi_master *master)
+{
-+ struct rt2880_spi *rs = spidev_to_rt2880_spi(spi);
-+ unsigned count = 0;
-+ u8 *rx = xfer->rx_buf;
-+ const u8 *tx = xfer->tx_buf;
-+ int err;
++ struct rt2880_spi *rs = spi_master_get_devdata(master);
+
-+ dev_dbg(>dev, "read (%d): %s %s\n", xfer->len,
-+(tx != NULL) ? "tx" : " ",
-+(rx != NULL) ? "rx" : " ");
++ dev_dbg(>dev, "stat: %08x, cfg: %08x, ctl: %08x, " \
++ "data: %08x, arb: %08x\n",
++ rt2880_spi_read(rs, RAMIPS_SPI_STAT),
++ rt2880_spi_read(rs, RAMIPS_SPI_CFG),
++ rt2880_spi_read(rs, RAMIPS_SPI_CTL),
++ rt2880_spi_read(rs, RAMIPS_SPI_DATA),
++ rt2880_spi_read(rs, get_arbiter_offset(master)));
++}
++
++static int rt2880_spi_transfer_one(struct spi_master *master,
++ struct spi_device *spi, struct spi_transfer *xfer)
++{
++ struct rt2880_spi *rs = spi_master_get_devdata(master);
++ unsigned len;
++ const u8 *tx = xfer->tx_buf;
++ u8 *rx = xfer->rx_buf;
++ int err = 0;
++
++ /* change clock speed */
++ if (unlikely(rs->speed != xfer->speed_hz)) {
++ u32 reg;
++ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG);
++ reg &= ~SPICFG_SPICLK_PRESCALE_MASK;
++ reg |= rt2880_spi_baudrate_get(spi, xfer->speed_hz);
++ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg);
++ }
+
+ if (tx) {
-+ for (count = 0; count < xfer->len; count++) {
-+ rt2880_spi_write(rs, RAMIPS_SPI_DATA, tx[count]);
++ len = xfer->len;
++ while (len-- > 0) {
++ rt2880_spi_write(rs, RAMIPS_SPI_DATA, *tx++);
+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR);
+ err = rt2880_spi_wait_ready(rs, 1);
+ if (err) {
@@ -295,63 +317,32 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ }
+
+ if (rx) {
-+ for (count = 0; count < xfer->len; count++) {
++
[OpenWrt-Devel] [PATCH 1/8] ramips: add rt2880/mt7620 spi register defines
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 65 +-
1 file changed, 63 insertions(+), 2 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index cb691f3..ca04a17 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,432 @@
+@@ -0,0 +1,493 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -77,17 +77,31 @@ Acked-by: John Crispin <blo...@openwrt.org>
+#define RAMIPS_SPI_CFG0x10
+#define RAMIPS_SPI_CTL0x14
+#define RAMIPS_SPI_DATA 0x20
++#define RAMIPS_SPI_ADDR 0x24
++#define RAMIPS_SPI_BS 0x28
++#define RAMIPS_SPI_USER 0x2C
++#define RAMIPS_SPI_TXFIFO 0x30
++#define RAMIPS_SPI_RXFIFO 0x34
+#define RAMIPS_SPI_FIFO_STAT 0x38
++#define RAMIPS_SPI_MODE 0x3C
++#define RAMIPS_SPI_DEV_OFFSET 0x40
++#define RAMIPS_SPI_DMA0x80
++#define RAMIPS_SPI_DMASTAT0x84
++#define RAMIPS_SPI_ARBITER0xF0
+
+/* SPISTAT register bit field */
+#define SPISTAT_BUSY BIT(0)
+
+/* SPICFG register bit field */
-+#define SPICFG_LSBFIRST 0
++#define SPICFG_ADDRMODE BIT(12)
++#define SPICFG_RXENVDIS BIT(11)
++#define SPICFG_RXCAP BIT(10)
++#define SPICFG_SPIENMODE BIT(9)
+#define SPICFG_MSBFIRST BIT(8)
+#define SPICFG_SPICLKPOL BIT(6)
+#define SPICFG_RXCLKEDGE_FALLING BIT(5)
+#define SPICFG_TXCLKEDGE_FALLING BIT(4)
++#define SPICFG_HIZSPI BIT(3)
+#define SPICFG_SPICLK_PRESCALE_MASK 0x7
+#define SPICFG_SPICLK_DIV20
+#define SPICFG_SPICLK_DIV41
@@ -99,13 +113,60 @@ Acked-by: John Crispin <blo...@openwrt.org>
+#define SPICFG_SPICLK_DISABLE 7
+
+/* SPICTL register bit field */
++#define SPICTL_START BIT(4)
+#define SPICTL_HIZSDO BIT(3)
+#define SPICTL_STARTWRBIT(2)
+#define SPICTL_STARTRDBIT(1)
+#define SPICTL_SPIENA BIT(0)
+
++/* SPIUSER register bit field */
++#define SPIUSER_USERMODE BIT(21)
++#define SPIUSER_INSTR_PHASE BIT(20)
++#define SPIUSER_ADDR_PHASE_MASK 0x7
++#define SPIUSER_ADDR_PHASE_OFFSET 17
++#define SPIUSER_MODE_PHASEBIT(16)
++#define SPIUSER_DUMMY_PHASE_MASK 0x3
++#define SPIUSER_DUMMY_PHASE_OFFSET14
++#define SPIUSER_DATA_PHASE_MASK 0x3
++#define SPIUSER_DATA_PHASE_OFFSET 12
++#define SPIUSER_DATA_READ (BIT(0) << SPIUSER_DATA_PHASE_OFFSET)
++#define SPIUSER_DATA_WRITE(BIT(1) << SPIUSER_DATA_PHASE_OFFSET)
++#define SPIUSER_ADDR_TYPE_OFFSET 9
++#define SPIUSER_MODE_TYPE_OFFSET 6
++#define SPIUSER_DUMMY_TYPE_OFFSET 3
++#define SPIUSER_DATA_TYPE_OFFSET 0
++#define SPIUSER_TRANSFER_MASK 0x7
++#define SPIUSER_TRANSFER_SINGLE BIT(0)
++#define SPIUSER_TRANSFER_DUAL BIT(1)
++#define SPIUSER_TRANSFER_QUAD BIT(2)
++
++#define SPIUSER_TRANSFER_TYPE(type) ( \
++ (type << SPIUSER_ADDR_TYPE_OFFSET) | \
++ (type << SPIUSER_MODE_TYPE_OFFSET) | \
++ (type << SPIUSER_DUMMY_TYPE_OFFSET) | \
++ (type << SPIUSER_DATA_TYPE_OFFSET) \
++)
++
+/* SPIFIFOSTAT register bit field */
++#define SPIFIFOSTAT_TXEMPTY BIT(19)
++#define SPIFIFOSTAT_RXEMPTY BIT(18)
+#define SPIFIFOSTAT_TXFULLBIT(17)
++#define SPIFIFOSTAT_RXFULLBIT(16)
++#define SPIFIFOSTAT_FIFO_MASK 0xff
++#define SPIFIFOSTAT_TX_OFFSET 8
++#define SPIFIFOSTAT_RX_OFFSET 0
++
++#define SPI_FIFO_DEPTH16
++
++/* SPIMODE register bit field */
++#define SPIMODE_MODE_OFFSET 24
++#define SPIMODE_DUMMY_OFFSET 0
++
++/* SPIARB register bit field */
++#define SPICTL_ARB_EN BIT(31)
++#define SPICTL_CSCTL1 BIT(16)
++#define SPI1_POR BIT(1)
++#define SPI0_POR BIT(0)
+
+struct rt2880_spi {
+ struct spi_master *master;
--
2.3.6
___
openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 4/8] ramips: clean up rt2880 spi probe/remove
* fill struct according to the member order
* add error clean up
* set min/max spi speed. so we don't need to check again
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 59 +-
1 file changed, 34 insertions(+), 25 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index 00fdeed..605bda9 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,479 @@
+@@ -0,0 +1,488 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -166,6 +166,9 @@ Acked-by: John Crispin <blo...@openwrt.org>
+#define SPI1_POR BIT(1)
+#define SPI0_POR BIT(0)
+
++#define RT2880_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | \
++ SPI_CS_HIGH)
++
+struct rt2880_spi {
+ struct spi_master *master;
+ void __iomem*base;
@@ -223,13 +226,6 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ rate = roundup_pow_of_two(rate);
+ dev_dbg(>dev, "rate-2:%u\n", rate);
+
-+ /* check if requested speed is too small */
-+ if (rate > 128)
-+ return -EINVAL;
-+
-+ if (rate < 2)
-+ rate = 2;
-+
+ /* Convert the rate to SPI clock divisor value. */
+ prescale = ilog2(rate / 2);
+ dev_dbg(>dev, "prescale:%u\n", prescale);
@@ -430,11 +426,10 @@ Acked-by: John Crispin <blo...@openwrt.org>
+{
+ struct spi_master *master;
+ struct rt2880_spi *rs;
-+ unsigned long flags;
+ void __iomem *base;
+ struct resource *r;
-+ int status = 0;
+ struct clk *clk;
++ int ret;
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(>dev, r);
@@ -443,36 +438,37 @@ Acked-by: John Crispin <blo...@openwrt.org>
+
+ clk = devm_clk_get(>dev, NULL);
+ if (IS_ERR(clk)) {
-+ dev_err(>dev, "unable to get SYS clock, err=%d\n",
-+ status);
++ dev_err(>dev, "unable to get SYS clock\n");
+ return PTR_ERR(clk);
+ }
+
-+ status = clk_prepare_enable(clk);
-+ if (status)
-+ return status;
++ ret = clk_prepare_enable(clk);
++ if (ret)
++ goto err_clk;
+
+ master = spi_alloc_master(>dev, sizeof(*rs));
+ if (master == NULL) {
+ dev_dbg(>dev, "master allocation failed\n");
-+ return -ENOMEM;
++ ret = -ENOMEM;
++ goto err_clk;
+ }
+
-+ /* we support only mode 0, and no options */
-+ master->mode_bits = 0;
-+
++ master->dev.of_node = pdev->dev.of_node;
++ master->mode_bits = RT2880_SPI_MODE_BITS;
++ master->bits_per_word_mask = SPI_BPW_MASK(8);
++ master->min_speed_hz = clk_get_rate(clk) / 128;
++ master->max_speed_hz = clk_get_rate(clk) / 2;
++ master->flags = SPI_MASTER_HALF_DUPLEX;
+ master->setup = rt2880_spi_setup;
+ master->transfer_one_message = rt2880_spi_transfer_one_message;
+ master->num_chipselect = RALINK_NUM_CHIPSELECTS;
-+ master->bits_per_word_mask = SPI_BPW_MASK(8);
-+ master->dev.of_node = pdev->dev.of_node;
+
+ dev_set_drvdata(>dev, master);
+
+ rs = spi_master_get_devdata(master);
++ rs->master = master;
+ rs->base = base;
+ rs->clk = clk;
-+ rs->master = master;
+ rs->sys_freq = clk_get_rate(rs->clk);
+ dev_dbg(>dev, "sys_freq: %u\n", rs->sys_freq);
+
@@ -480,7 +476,21 @@ Acked-by: John Crispin <blo...@openwrt.org>
+
+ rt2880_spi_reset(rs);
+
-+ return spi_register_master(master);
++ ret = devm_spi_register_master(>dev, master);
++ if (ret < 0) {
++ dev_err(>dev, "devm_spi_register_master error.\n");
++ goto err_master;
++ }
++
++ return ret;
++
++err_master:
++ spi_master_put(master);
++ kfree(master);
++err_clk:
++ clk_disable_unprepare(clk);
++
++ return ret;
+}
+
+static int rt2880_spi_remove(struct platform_device *pdev)
@@ -491,8 +501,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ master = dev_get_drvdata(>dev);
+ rs = spi_master_get_devdata(master);
+
-+ clk_disable(rs->clk);
-+ spi_unregister_master(master);
++ clk_disable_unprepare(rs->clk);
+
+ return 0;
+}
--
2.3.6
___
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[OpenWrt-Devel] [PATCH 3/8] ramips: improve rt2880 spi wait ready function
use loops_per_jiffy, spi clock speed and write bytes to get the
spi loop count. if loop to 0 than spi operation timeout.
remove usleep. we only write 1 byte to spi device. use busy loop
would be better.
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 31 +++---
1 file changed, 15 insertions(+), 16 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index d6a462c..00fdeed 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,480 @@
+@@ -0,0 +1,479 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -70,8 +70,6 @@ Acked-by: John Crispin <blo...@openwrt.org>
+#define DRIVER_NAME "spi-rt2880"
+/* only one slave is supported*/
+#define RALINK_NUM_CHIPSELECTS1
-+/* in usec */
-+#define RALINK_SPI_WAIT_MAX_LOOP 2000
+
+#define RAMIPS_SPI_STAT 0x00
+#define RAMIPS_SPI_CFG0x10
@@ -173,6 +171,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ void __iomem*base;
+ unsigned intsys_freq;
+ unsigned intspeed;
++ u16 wait_loops;
+ struct clk *clk;
+};
+
@@ -238,6 +237,11 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ reg = rt2880_spi_read(rs, RAMIPS_SPI_CFG);
+ reg = ((reg & ~SPICFG_SPICLK_PRESCALE_MASK) | prescale);
+ rt2880_spi_write(rs, RAMIPS_SPI_CFG, reg);
++
++ /* some tolerance. double and add 100 */
++ rs->wait_loops = (8 * HZ * loops_per_jiffy) /
++ (clk_get_rate(rs->clk) / rate);
++ rs->wait_loops = (rs->wait_loops << 1) + 100;
+ rs->speed = speed;
+ return 0;
+}
@@ -273,20 +277,15 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_SPIENA);
+}
+
-+static inline int rt2880_spi_wait_till_ready(struct rt2880_spi *rs)
++static int rt2880_spi_wait_ready(struct rt2880_spi *rs, int len)
+{
-+ int i;
-+
-+ for (i = 0; i < RALINK_SPI_WAIT_MAX_LOOP; i++) {
-+ u32 status;
-+
-+ status = rt2880_spi_read(rs, RAMIPS_SPI_STAT);
-+ if ((status & SPISTAT_BUSY) == 0)
-+ return 0;
++ int loop = rs->wait_loops * len;
+
++ while ((rt2880_spi_read(rs, RAMIPS_SPI_STAT) & SPISTAT_BUSY) && --loop)
+ cpu_relax();
-+ udelay(1);
-+ }
++
++ if (loop)
++ return 0;
+
+ return -ETIMEDOUT;
+}
@@ -308,7 +307,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ for (count = 0; count < xfer->len; count++) {
+ rt2880_spi_write(rs, RAMIPS_SPI_DATA, tx[count]);
+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTWR);
-+ err = rt2880_spi_wait_till_ready(rs);
++ err = rt2880_spi_wait_ready(rs, 1);
+ if (err) {
+ dev_err(>dev, "TX failed, err=%d\n", err);
+ goto out;
@@ -319,7 +318,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ if (rx) {
+ for (count = 0; count < xfer->len; count++) {
+ rt2880_spi_setbits(rs, RAMIPS_SPI_CTL, SPICTL_STARTRD);
-+ err = rt2880_spi_wait_till_ready(rs);
++ err = rt2880_spi_wait_ready(rs, 1);
+ if (err) {
+ dev_err(>dev, "RX failed, err=%d\n", err);
+ goto out;
--
2.3.6
___
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[OpenWrt-Devel] [PATCH 2/8] ramips: remove rt2880 spi lock and clean bit operation
Signed-off-by: Michael Lee <igv...@gmail.com>
---
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 23 +-
1 file changed, 5 insertions(+), 18 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
index ca04a17..d6a462c 100644
---
a/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
+++
b/target/linux/ramips/patches-3.18/0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch
@@ -41,7 +41,7 @@ Acked-by: John Crispin <blo...@openwrt.org>
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
--- /dev/null
+++ b/drivers/spi/spi-rt2880.c
-@@ -0,0 +1,493 @@
+@@ -0,0 +1,480 @@
+/*
+ * spi-rt2880.c -- Ralink RT288x/RT305x SPI controller driver
+ *
@@ -174,7 +174,6 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ unsigned intsys_freq;
+ unsigned intspeed;
+ struct clk *clk;
-+ spinlock_t lock;
+};
+
+static inline struct rt2880_spi *spidev_to_rt2880_spi(struct spi_device *spi)
@@ -187,7 +186,8 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ return ioread32(rs->base + reg);
+}
+
-+static inline void rt2880_spi_write(struct rt2880_spi *rs, u32 reg, u32 val)
++static inline void rt2880_spi_write(struct rt2880_spi *rs, u32 reg,
++ const u32 val)
+{
+ iowrite32(val, rs->base + reg);
+}
@@ -195,27 +195,15 @@ Acked-by: John Crispin <blo...@openwrt.org>
+static inline void rt2880_spi_setbits(struct rt2880_spi *rs, u32 reg, u32
mask)
+{
+ void __iomem *addr = rs->base + reg;
-+ unsigned long flags;
-+ u32 val;
+
-+ spin_lock_irqsave(>lock, flags);
-+ val = ioread32(addr);
-+ val |= mask;
-+ iowrite32(val, addr);
-+ spin_unlock_irqrestore(>lock, flags);
++ iowrite32((ioread32(addr) | mask), addr);
+}
+
+static inline void rt2880_spi_clrbits(struct rt2880_spi *rs, u32 reg, u32
mask)
+{
+ void __iomem *addr = rs->base + reg;
-+ unsigned long flags;
-+ u32 val;
+
-+ spin_lock_irqsave(>lock, flags);
-+ val = ioread32(addr);
-+ val &= ~mask;
-+ iowrite32(val, addr);
-+ spin_unlock_irqrestore(>lock, flags);
++ iowrite32((ioread32(addr) & ~mask), addr);
+}
+
+static int rt2880_spi_baudrate_set(struct spi_device *spi, unsigned int speed)
@@ -488,7 +476,6 @@ Acked-by: John Crispin <blo...@openwrt.org>
+ rs->master = master;
+ rs->sys_freq = clk_get_rate(rs->clk);
+ dev_dbg(>dev, "sys_freq: %u\n", rs->sys_freq);
-+ spin_lock_irqsave(>lock, flags);
+
+ device_reset(>dev);
+
--
2.3.6
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[OpenWrt-Devel] [PATCH 8/8] ramips: update dtsi files to support second spi device
Signed-off-by: Michael Lee <igv...@gmail.com>
---
target/linux/ramips/dts/mt7620a.dtsi | 32 +-
target/linux/ramips/dts/mt7620n.dtsi | 32 +-
target/linux/ramips/dts/rt3050.dtsi| 6 +-
target/linux/ramips/dts/rt3352.dtsi| 31 +-
target/linux/ramips/dts/rt3883.dtsi| 25 +-
target/linux/ramips/dts/rt5350.dtsi| 29 +-
.../0051-rt5350-spi-second-device.patch| 368 -
7 files changed, 143 insertions(+), 380 deletions(-)
delete mode 100644
target/linux/ramips/patches-3.18/0051-rt5350-spi-second-device.patch
diff --git a/target/linux/ramips/dts/mt7620a.dtsi
b/target/linux/ramips/dts/mt7620a.dtsi
index 026e745..448df75 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -20,6 +20,11 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ spi1 =
+ };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -202,9 +207,9 @@
status = "disabled";
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
- reg = <0xb00 0x100>;
+ reg = <0xb00 0x40>;
resets = < 18>;
reset-names = "spi";
@@ -218,6 +223,22 @@
pinctrl-0 = <_pins>;
};
+ spi1: spi@b40 {
+ compatible = "ralink,rt2880-spi";
+ reg = <0xb40 0x60>;
+
+ resets = < 18>;
+ reset-names = "spi";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_cs1>;
+ };
+
uartlite@c00 {
compatible = "ralink,mt7620a-uart",
"ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
@@ -305,6 +326,13 @@
};
};
+ spi_cs1: spi1 {
+ spi1 {
+ ralink,group = "spi_cs1";
+ ralink,function = "spi_cs1";
+ };
+ };
+
i2c_pins: i2c {
i2c {
ralink,group = "i2c";
diff --git a/target/linux/ramips/dts/mt7620n.dtsi
b/target/linux/ramips/dts/mt7620n.dtsi
index b1586ec..a3132b8 100644
--- a/target/linux/ramips/dts/mt7620n.dtsi
+++ b/target/linux/ramips/dts/mt7620n.dtsi
@@ -20,6 +20,11 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ spi1 =
+ };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -154,9 +159,9 @@
status = "disabled";
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
- reg = <0xb00 0x100>;
+ reg = <0xb00 0x40>;
resets = < 18>;
reset-names = "spi";
@@ -170,6 +175,22 @@
pinctrl-0 = <_pins>;
};
+ spi1: spi@b40 {
+ compatible = "ralink,rt2880-spi";
+ reg = <0xb40 0x60>;
+
+ resets = < 18>;
+ reset-names = "spi";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_cs1>;
+ };
+
uartlite@c00 {
compatible = "ralink,mt7620a-uart",
"ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
@@ -213,6 +234,13 @@
};
};
+ spi_cs1: spi1 {
+ spi1 {
+ ralink,group = "spi_cs1";
+ ralink,function = "spi
[OpenWrt-Devel] [PATCH 2/7] ramips: improve systick timer
From: michael lee <igv...@gmail.com>
when sleep mode is disable use MIPS as clocksource and clockevent instead of
systick.
because MIPS timer has higher resolution 5ns less than systick 20us and
larger counter bits 32 > 16.
clean interrupt by write compare register at isr.
fix typo cause sleep mode not enable.
Signed-off-by: Michael Lee <igv...@gmail.com>
---
target/linux/ramips/patches-3.18/0066-cevt.patch | 151 ++-
1 file changed, 145 insertions(+), 6 deletions(-)
diff --git a/target/linux/ramips/patches-3.18/0066-cevt.patch
b/target/linux/ramips/patches-3.18/0066-cevt.patch
index 192afe4..01cb588 100644
--- a/target/linux/ramips/patches-3.18/0066-cevt.patch
+++ b/target/linux/ramips/patches-3.18/0066-cevt.patch
@@ -1,12 +1,151 @@
--- a/arch/mips/ralink/cevt-rt3352.c
+++ b/arch/mips/ralink/cevt-rt3352.c
-@@ -53,8 +53,7 @@ static int systick_next_event(unsigned l
-
+@@ -45,18 +45,33 @@ static void (*systick_freq_scaling)(stru
+ static void systick_set_clock_mode(enum clock_event_mode mode,
+ struct clock_event_device *evt);
+
++static inline unsigned int read_count(struct systick_device *sdev)
++{
++ return ioread32(sdev->membase + SYSTICK_COUNT);
++}
++
++static inline unsigned int read_compare(struct systick_device *sdev)
++{
++ return ioread32(sdev->membase + SYSTICK_COMPARE);
++}
++
++static inline void write_compare(struct systick_device *sdev, unsigned int
val)
++{
++ iowrite32(val, sdev->membase + SYSTICK_COMPARE);
++}
++
+ static int systick_next_event(unsigned long delta,
+ struct clock_event_device *evt)
+ {
+ struct systick_device *sdev;
+- u32 count;
++ int res;
+
sdev = container_of(evt, struct systick_device, dev);
- count = ioread32(sdev->membase + SYSTICK_COUNT);
+- count = ioread32(sdev->membase + SYSTICK_COUNT);
- count = (count + delta) % SYSTICK_FREQ;
- iowrite32(count, sdev->membase + SYSTICK_COMPARE);
-+ iowrite32(count + delta, sdev->membase + SYSTICK_COMPARE);
-
- return 0;
++ delta += read_count(sdev);
++ write_compare(sdev, delta);
++ res = ((int)(read_count(sdev) - delta) >= 0) ? -ETIME : 0;
+
+- return 0;
++ return res;
+ }
+
+ static void systick_event_handler(struct clock_event_device *dev)
+@@ -66,20 +81,25 @@ static void systick_event_handler(struct
+
+ static irqreturn_t systick_interrupt(int irq, void *dev_id)
+ {
+- struct clock_event_device *dev = (struct clock_event_device *) dev_id;
++ int ret = 0;
++ struct clock_event_device *cdev;
++ struct systick_device *sdev;
+
+- dev->event_handler(dev);
++ if (read_c0_cause() & STATUSF_IP7) {
++ cdev = (struct clock_event_device *) dev_id;
++ sdev = container_of(cdev, struct systick_device, dev);
++
++ /* Clear Count/Compare Interrupt */
++ write_compare(sdev, read_compare(sdev));
++ cdev->event_handler(cdev);
++ ret = 1;
++ }
+
+- return IRQ_HANDLED;
++ return IRQ_RETVAL(ret);
+ }
+
+ static struct systick_device systick = {
+ .dev = {
+- /*
+- * cevt-r4k uses 300, make sure systick
+- * gets used if available
+- */
+- .rating = 310,
+ .features = CLOCK_EVT_FEAT_ONESHOT,
+ .set_next_event = systick_next_event,
+ .set_mode = systick_set_clock_mode,
+@@ -126,13 +146,14 @@ static void systick_set_clock_mode(enum
+ systick_freq_scaling(sdev, 1);
+ break;
+
++ case CLOCK_EVT_MODE_UNUSED:
+ case CLOCK_EVT_MODE_SHUTDOWN:
+ if (systick_freq_scaling)
+ systick_freq_scaling(sdev, 0);
+ if (sdev->irq_requested)
+- free_irq(systick.dev.irq, _irqaction);
++ remove_irq(systick.dev.irq, _irqaction);
+ sdev->irq_requested = 0;
+- iowrite32(0, systick.membase + SYSTICK_CONFIG);
++ iowrite32(CFG_CNT_EN, systick.membase + SYSTICK_CONFIG);
+ break;
+
+ default:
+@@ -142,38 +163,45 @@ static void systick_set_clock_mode(enum
+ }
+
+ static const struct of_device_id systick_match[] = {
+- { .compatible = "ralink,mt7620-systick", .data = mt7620_freq_scaling},
++ { .compatible = "ralink,mt7620a-systick", .data = mt7620_freq_scaling},
+ {},
+ };
+
+ static void __init ralink_systick_init(struct device_node *np)
+ {
+ const struct of_device_id *match;
++ int rating = 200;
+
+ systick.membase = of_iomap(np, 0);
+ if (!systick.membase)
+ return;
+
+ match = of_match_node(systick_match, np);
+- if (match)
++ if (match) {
+ systick_freq_scaling = match->da
[OpenWrt-Devel] [PATCH 1/7] ramips: fix use remove_irq to release irqaction resource
From: michael lee <igv...@gmail.com> Signed-off-by: Michael Lee <igv...@gmail.com> --- .../0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch b/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch index 310d362..6bf0401 100644 --- a/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch +++ b/target/linux/ramips/patches-3.18/0017-MIPS-use-set_mode-to-enable-disable-the-cevt-r4k-irq.patch @@ -47,7 +47,7 @@ Signed-off-by: John Crispin <blo...@openwrt.org> + break; + + cp0_timer_irq_installed = 0; -+ free_irq(evt->irq, _compare_irqaction); ++ remove_irq(evt->irq, _compare_irqaction); + break; + + default: -- 2.3.6 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH 4/7] ramips: improve rt2880/mt7620 spi flash read speed
From: michael lee <igv...@gmail.com>
support for all
* 2 spi master
* use device tree to set spi bus number for driver use
* fast read
new features for mt7620
* hardware spi flash command/user mode support
* fast read dual out. (make sure SPI_NOR_DUAL_READ flag is
enabled at spi-nor.c, device tree also need to modify
spi-rx-bus-width = <2>, m25p,fast-read and adjuest
spi-max-frequency according to flash datasheet)
need verify
* gpio pin as chip select
* second spi master
* fast read quad out
test results on mt7620. use dd read bs=512 with 15744 records
old driver : 20.88s
new driver : 11.30s
new driver + fast read + clock from 10MHz to 80MHz : 1.83s
new driver + fast read dual out + 80MHz clock : 1.18s
Signed-off-by: Michael Lee <igv...@gmail.com>
---
target/linux/ramips/dts/mt7620a.dtsi | 32 +-
target/linux/ramips/dts/mt7620n.dtsi | 32 +-
target/linux/ramips/dts/rt3050.dtsi| 6 +-
target/linux/ramips/dts/rt3352.dtsi| 31 +-
target/linux/ramips/dts/rt3883.dtsi| 25 +-
target/linux/ramips/dts/rt5350.dtsi| 29 +-
...0050-SPI-ralink-add-Ralink-SoC-spi-driver.patch | 837 -
.../0051-rt5350-spi-second-device.patch| 368 -
8 files changed, 796 insertions(+), 564 deletions(-)
delete mode 100644
target/linux/ramips/patches-3.18/0051-rt5350-spi-second-device.patch
diff --git a/target/linux/ramips/dts/mt7620a.dtsi
b/target/linux/ramips/dts/mt7620a.dtsi
index 80e8977..5b39c84 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -20,6 +20,11 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ spi1 =
+ };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -202,9 +207,9 @@
status = "disabled";
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
- reg = <0xb00 0x100>;
+ reg = <0xb00 0x40>;
resets = < 18>;
reset-names = "spi";
@@ -218,6 +223,22 @@
pinctrl-0 = <_pins>;
};
+ spi1: spi@b40 {
+ compatible = "ralink,rt2880-spi";
+ reg = <0xb40 0x60>;
+
+ resets = < 18>;
+ reset-names = "spi";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <_cs1>;
+ };
+
uartlite@c00 {
compatible = "ralink,mt7620a-uart",
"ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
@@ -305,6 +326,13 @@
};
};
+ spi_cs1: spi1 {
+ spi1 {
+ ralink,group = "spi_cs1";
+ ralink,function = "spi_cs1";
+ };
+ };
+
i2c_pins: i2c {
i2c {
ralink,group = "i2c";
diff --git a/target/linux/ramips/dts/mt7620n.dtsi
b/target/linux/ramips/dts/mt7620n.dtsi
index e886c6f..61fff00 100644
--- a/target/linux/ramips/dts/mt7620n.dtsi
+++ b/target/linux/ramips/dts/mt7620n.dtsi
@@ -20,6 +20,11 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ spi1 =
+ };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -154,9 +159,9 @@
status = "disabled";
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7620a-spi", "ralink,rt2880-spi";
- reg = <0xb00 0x100>;
+ reg = <0xb00 0x40>;
resets = < 18>;
reset-names = "spi";
@@ -170,6 +175,22 @@
pinctrl-0 = <_pins>;
};
+ spi1: spi@b40 {
+ compatible = "ralink,rt2880-spi";
+ reg = <0xb40 0x60>;
+
+ resets = < 18>;
+
[OpenWrt-Devel] [PATCH 5/7] ramips: fix mt7621 cpu clock speed. set spi clock to system clock
From: michael lee <igv...@gmail.com>
spi clock is the same as system clock measured by logic analyzer.
Signed-off-by: Michael Lee <igv...@gmail.com>
---
.../0012-MIPS-ralink-add-MT7621-support.patch | 29 +-
1 file changed, 23 insertions(+), 6 deletions(-)
diff --git
a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
index 23d3268..bb4a8e1 100644
--- a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
+++ b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch
@@ -520,7 +520,7 @@ Signed-off-by: John Crispin <blo...@openwrt.org>
+}
--- /dev/null
+++ b/arch/mips/ralink/mt7621.c
-@@ -0,0 +1,209 @@
+@@ -0,0 +1,226 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
@@ -553,6 +553,8 @@ Signed-off-by: John Crispin <blo...@openwrt.org>
+#define SYSC_REG_CUR_CLK_STS 0x44
+#define CPU_CLK_SEL (BIT(30) | BIT(31))
+
++#define MEMC_REG_BASE 0x5000
++
+#define MT7621_GPIO_MODE_UART11
+#define MT7621_GPIO_MODE_I2C 2
+#define MT7621_GPIO_MODE_UART3_MASK 0x3
@@ -645,7 +647,7 @@ Signed-off-by: John Crispin <blo...@openwrt.org>
+ int fbdiv = 0;
+ u32 clk_sts, syscfg;
+ u8 clk_sel = 0, xtal_mode;
-+ u32 cpu_clk;
++ u32 cpu_clk, sys_clk;
+
+ if ((rt_sysc_r32(SYSC_REG_CPLL_CLKCFG0) & CPU_CLK_SEL) != 0)
+ clk_sel = 1;
@@ -656,24 +658,39 @@ Signed-off-by: John Crispin <blo...@openwrt.org>
+ cpu_fdiv = ((clk_sts >> 8) & 0x1F);
+ cpu_ffrac = (clk_sts & 0x1F);
+ cpu_clk = (500 * cpu_ffrac / cpu_fdiv) * 1000 * 1000;
++ if (((clk_sts >> 16) & 0x7) == 3)
++ sys_clk = cpu_clk / 3;
++ else
++ sys_clk = cpu_clk / 4;
+ break;
+
+ case 1:
-+ fbdiv = ((rt_sysc_r32(0x648) >> 4) & 0x7F) + 1;
++ fbdiv = ((rt_sysc_r32(MEMC_REG_BASE + 0x648) >> 4) & 0x7F) + 1;
+ syscfg = rt_sysc_r32(SYSC_REG_SYSCFG);
+ xtal_mode = (syscfg >> 6) & 0x7;
+ if(xtal_mode >= 6) { //25Mhz Xtal
+ cpu_clk = 25 * fbdiv * 1000 * 1000;
+ } else if(xtal_mode >=3) { //40Mhz Xtal
-+ cpu_clk = 40 * fbdiv * 1000 * 1000;
++ cpu_clk = 20 * fbdiv * 1000 * 1000;
+ } else { // 20Mhz Xtal
+ cpu_clk = 20 * fbdiv * 1000 * 1000;
+ }
++ if (syscfg & BIT(5))
++ sys_clk = cpu_clk / 4;
++ else
++ sys_clk = cpu_clk / 3;
+ break;
+ }
-+ cpu_clk = 88000;
++
++#define RFMT(label) label ":%u.%03uMHz "
++#define RINT(x) ((x) / 100)
++#define RFRAC(x) (((x) / 1000) % 1000)
++ pr_debug(RFMT("CPU") RFMT("SYS"),
++ RINT(cpu_clk), RFRAC(cpu_clk),
++ RINT(sys_clk), RFRAC(sys_clk));
++
+ ralink_clk_add("cpu", cpu_clk);
-+ ralink_clk_add("1e000b00.spi", 5000);
++ ralink_clk_add("1e000b00.spi", sys_clk);
+ ralink_clk_add("1e000c00.uartlite", 5000);
+ ralink_clk_add("1e000d00.uart", 5000);
+}
--
2.3.6
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[OpenWrt-Devel] [PATCH 6/7] ramips: improve mt7621 spi flash read speed
From: michael lee <igv...@gmail.com>
only support spi flash command (half duplex).
no need chunk io patch. done by driver.
test results on mt7621. use dd read bs=512 with 32128 records
old driver : 30.52s
new driver : 34.31s
new driver + no chunk io : 16.65s
new driver + no chunk io + fast read clock from 10Mhz to 50Mhz : 5.00s
Signed-off-by: Michael Lee <igv...@gmail.com>
---
target/linux/ramips/dts/MT7628.dts | 1 -
target/linux/ramips/dts/mt7621.dtsi| 7 +-
target/linux/ramips/dts/mt7628an.dtsi | 6 +-
.../0044-mtd-add-chunked-read-io-to-m25p80.patch | 103 ---
...0061-SPI-ralink-add-mt7621-SoC-spi-driver.patch | 794 ++---
5 files changed, 553 insertions(+), 358 deletions(-)
delete mode 100644
target/linux/ramips/patches-3.18/0044-mtd-add-chunked-read-io-to-m25p80.patch
diff --git a/target/linux/ramips/dts/MT7628.dts
b/target/linux/ramips/dts/MT7628.dts
index dd6647f..87d12d2 100644
--- a/target/linux/ramips/dts/MT7628.dts
+++ b/target/linux/ramips/dts/MT7628.dts
@@ -31,7 +31,6 @@
reg = <0 0>;
linux,modalias = "m25p80", "en25q64";
spi-max-frequency = <1000>;
- m25p,chunked-io = <32>;
partition@0 {
label = "u-boot";
diff --git a/target/linux/ramips/dts/mt7621.dtsi
b/target/linux/ramips/dts/mt7621.dtsi
index bc79d39..cd115b1 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -20,6 +20,10 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ };
+
palmbus@1E00 {
compatible = "palmbus";
reg = <0x1E00 0x10>;
@@ -84,7 +88,7 @@
no-loopback-test;
};
- spi@b00 {
+ spi0: spi@b00 {
status = "okay";
compatible = "ralink,mt7621-spi";
@@ -104,7 +108,6 @@
#size-cells = <1>;
reg = <0 0>;
spi-max-frequency = <1000>;
- m25p,chunked-io = <32>;
};
};
};
diff --git a/target/linux/ramips/dts/mt7628an.dtsi
b/target/linux/ramips/dts/mt7628an.dtsi
index 02f9df3..eb8a6ee 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -20,6 +20,10 @@
compatible = "mti,cpu-interrupt-controller";
};
+ aliases {
+ spi0 =
+ };
+
palmbus@1000 {
compatible = "palmbus";
reg = <0x1000 0x20>;
@@ -102,7 +106,7 @@
};
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
diff --git
a/target/linux/ramips/patches-3.18/0044-mtd-add-chunked-read-io-to-m25p80.patch
b/target/linux/ramips/patches-3.18/0044-mtd-add-chunked-read-io-to-m25p80.patch
deleted file mode 100644
index 1716e1c..000
---
a/target/linux/ramips/patches-3.18/0044-mtd-add-chunked-read-io-to-m25p80.patch
+++ /dev/null
@@ -1,103 +0,0 @@
a/drivers/mtd/devices/m25p80.c
-+++ b/drivers/mtd/devices/m25p80.c
-@@ -19,6 +19,7 @@
- #include
- #include
- #include
-+#include
-
- #include
- #include
-@@ -32,6 +33,7 @@ struct m25p {
- struct spi_device *spi;
- struct spi_nor spi_nor;
- struct mtd_info mtd;
-+ u16 chunk_size;
- u8 command[MAX_CMD_SIZE];
- };
-
-@@ -157,6 +159,61 @@ static int m25p80_read(struct spi_nor *n
- return 0;
- }
-
-+static void m25p80_chunked_write(struct spi_nor *nor, loff_t _from, size_t
_len,
-+ size_t *_retlen, const u_char *_buf)
-+{
-+ struct m25p *flash = nor->priv;
-+ int chunk_size;
-+ int retlen = 0;
-+
-+ chunk_size = flash->chunk_size;
-+ if (!chunk_size)
-+ chunk_size = _len;
-+
-+ if (nor->addr_width > 3)
-+ chunk_size -= nor->addr_width - 3;
-+
-+ while (retlen < _len) {
-+ size_t len = min_t(int, chunk_size, _len - retlen);
-+ const u_char *buf = _buf + retlen;
-+ loff_t from = _from + retlen;
-+
-+ nor->wait_till_ready(nor);
-+ nor->write_reg(nor, SPINOR_OP_WREN, NULL, 0, 0);
-+
-+ m25p80_write(nor, from, len, , buf);
-+ }
-+ *_retlen += retlen;
-+
[OpenWrt-Devel] [PATCH 7/7] ramips: fix for kernel 4.0 napi repoll need return budgets number
From: michael lee <igv...@gmail.com>
Signed-off-by: Michael Lee <igv...@gmail.com>
---
.../linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index 4b31b56..608b16a 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -984,8 +984,11 @@ static int fe_poll(struct napi_struct *napi, int budget)
if (!tx_again && (rx_done < budget)) {
status = fe_reg_r32(FE_REG_FE_INT_STATUS);
- if (status & (tx_intr | rx_intr ))
+ if (status & (tx_intr | rx_intr)) {
+ /* let napi poll again */
+ rx_done = budget;
goto poll_again;
+ }
napi_complete(napi);
fe_int_enable(tx_intr | rx_intr);
--
2.3.6
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[OpenWrt-Devel] [PATCH 3/7] ramips: fix rx buffer length
From: michael lee <igv...@gmail.com>
Signed-off-by: Michael Lee <igv...@gmail.com>
---
.../ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c | 7 ---
.../ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h | 3 ++-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index db6b197..4b31b56 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -266,7 +266,8 @@ static int fe_alloc_rx(struct fe_priv *priv)
ring->rx_dma[i].rxd1 = (unsigned int) dma_addr;
if (priv->flags & FE_FLAG_RX_SG_DMA)
- ring->rx_dma[i].rxd2 = RX_DMA_PLEN0(ring->rx_buf_size);
+ ring->rx_dma[i].rxd2 =
+ RX_DMA_PLEN0_SET(ring->rx_buf_size);
else
ring->rx_dma[i].rxd2 = RX_DMA_LSO;
}
@@ -849,7 +850,7 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
dma_unmap_single(>dev, trxd.rxd1,
ring->rx_buf_size, DMA_FROM_DEVICE);
- pktlen = RX_DMA_PLEN0(trxd.rxd2);
+ pktlen = RX_DMA_PLEN0_GET(trxd.rxd2);
skb->dev = netdev;
skb_put(skb, pktlen);
if (trxd.rxd4 & checksum_bit) {
@@ -871,7 +872,7 @@ static int fe_poll_rx(struct napi_struct *napi, int budget,
release_desc:
if (priv->flags & FE_FLAG_RX_SG_DMA)
- rxd->rxd2 = RX_DMA_PLEN0(ring->rx_buf_size);
+ rxd->rxd2 = RX_DMA_PLEN0_SET(ring->rx_buf_size);
else
rxd->rxd2 = RX_DMA_LSO;
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
index 78e04b0..8861762 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.h
@@ -310,7 +310,8 @@ enum fe_work_flag {
/* rxd2 */
#define RX_DMA_DONEBIT(31)
#define RX_DMA_LSO BIT(30)
-#define RX_DMA_PLEN0(_x) (((_x) >> 16) & 0x3fff)
+#define RX_DMA_PLEN0_GET(_x) (((_x) >> 16) & 0x3fff)
+#define RX_DMA_PLEN0_SET(_x) (((_x) & 0x3fff) << 16)
#define RX_DMA_TAG BIT(15)
/* rxd3 */
#define RX_DMA_TPID(_x)(((_x) >> 16) & 0x)
--
2.3.6
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[OpenWrt-Devel] [PATCH] [ 4/5] ramips: add xmit_more support
use pktgen to verify on rt3662. can improve transmit rate.
pkt_size 1500
burst 1 : 807Mb/sec
burst 8 : 984Mb/sec
pkt_size 60
burst 1 : 57Mb/sec
burst 8 : 236Mb/sec
Signed-off-by: michael lee igv...@gmail.com
---
.../drivers/net/ethernet/ralink/ralink_soc_eth.c | 51 +-
.../drivers/net/ethernet/ralink/ralink_soc_eth.h | 2 +
2 files changed, 33 insertions(+), 20 deletions(-)
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index b2304bb..4b39825 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -337,6 +337,8 @@ static int fe_alloc_tx(struct fe_priv *priv)
struct fe_tx_ring *ring = priv-tx_ring;
ring-tx_free_idx = 0;
+ ring-tx_next_idx = 0;
+ ring-tx_thresh = max((unsigned long)ring-tx_ring_size 2,
MAX_SKB_FRAGS);
ring-tx_buf = kcalloc(ring-tx_ring_size, sizeof(*ring-tx_buf),
GFP_KERNEL);
@@ -525,8 +527,16 @@ static int fe_vlan_rx_kill_vid(struct net_device *dev,
return 0;
}
+static inline u32 fe_empty_txd(struct fe_tx_ring *ring)
+{
+ barrier();
+ return (u32)(ring-tx_ring_size -
+ ((ring-tx_next_idx - ring-tx_free_idx)
+(ring-tx_ring_size - 1)));
+}
+
static int fe_tx_map_dma(struct sk_buff *skb, struct net_device *dev,
- int idx, int tx_num, struct fe_tx_ring *ring)
+ int tx_num, struct fe_tx_ring *ring)
{
struct fe_priv *priv = netdev_priv(dev);
struct skb_frag_struct *frag;
@@ -537,7 +547,7 @@ static int fe_tx_map_dma(struct sk_buff *skb, struct
net_device *dev,
u32 def_txd4;
int i, j, k, frag_size, frag_map_size, offset;
- tx_buf = ring-tx_buf[idx];
+ tx_buf = ring-tx_buf[ring-tx_next_idx];
memset(tx_buf, 0, sizeof(*tx_buf));
memset(txd, 0, sizeof(txd));
nr_frags = skb_shinfo(skb)-nr_frags;
@@ -589,7 +599,7 @@ static int fe_tx_map_dma(struct sk_buff *skb, struct
net_device *dev,
dma_unmap_len_set(tx_buf, dma_len0, skb_headlen(skb));
/* TX SG offload */
- j = idx;
+ j = ring-tx_next_idx;
k = 0;
for (i = 0; i nr_frags; i++) {
offset = 0;
@@ -649,14 +659,22 @@ static int fe_tx_map_dma(struct sk_buff *skb, struct
net_device *dev,
netdev_sent_queue(dev, skb-len);
skb_tx_timestamp(skb);
- j = NEXT_TX_DESP_IDX(j);
+ ring-tx_next_idx = NEXT_TX_DESP_IDX(j);
wmb();
- fe_reg_w32(j, FE_REG_TX_CTX_IDX0);
+ if (unlikely(fe_empty_txd(ring) = ring-tx_thresh)) {
+ netif_stop_queue(dev);
+ smp_mb();
+ if (unlikely(fe_empty_txd(ring) ring-tx_thresh))
+ netif_wake_queue(dev);
+ }
+
+ if (netif_xmit_stopped(netdev_get_tx_queue(dev, 0)) || !skb-xmit_more)
+ fe_reg_w32(ring-tx_next_idx, FE_REG_TX_CTX_IDX0);
return 0;
err_dma:
- j = idx;
+ j = ring-tx_next_idx;
for (i = 0; i tx_num; i++) {
ptxd = ring-tx_dma[j];
tx_buf = ring-tx_buf[j];
@@ -703,12 +721,6 @@ static inline int fe_skb_padto(struct sk_buff *skb, struct
fe_priv *priv) {
return ret;
}
-static inline u32 fe_empty_txd(struct fe_tx_ring *ring, u32 tx_fill_idx)
-{
- return (u32)(ring-tx_ring_size - ((tx_fill_idx - ring-tx_free_idx)
- (ring-tx_ring_size - 1)));
-}
-
static inline int fe_cal_txd_req(struct sk_buff *skb)
{
int i, nfrags;
@@ -732,7 +744,6 @@ static int fe_start_xmit(struct sk_buff *skb, struct
net_device *dev)
struct fe_priv *priv = netdev_priv(dev);
struct fe_tx_ring *ring = priv-tx_ring;
struct net_device_stats *stats = dev-stats;
- u32 tx;
int tx_num;
int len = skb-len;
@@ -742,8 +753,7 @@ static int fe_start_xmit(struct sk_buff *skb, struct
net_device *dev)
}
tx_num = fe_cal_txd_req(skb);
- tx = fe_reg_r32(FE_REG_TX_CTX_IDX0);
- if (unlikely(fe_empty_txd(ring, tx) = tx_num))
+ if (unlikely(fe_empty_txd(ring) = tx_num))
{
netif_stop_queue(dev);
netif_err(priv, tx_queued,dev,
@@ -751,7 +761,7 @@ static int fe_start_xmit(struct sk_buff *skb, struct
net_device *dev)
return NETDEV_TX_BUSY;
}
- if (fe_tx_map_dma(skb, dev, tx, tx_num, ring) 0) {
+ if (fe_tx_map_dma(skb, dev, tx_num, ring) 0) {
stats-tx_dropped++;
} else {
stats-tx_packets++;
@@ -916,10 +926,10 @@ static int fe_poll_tx(struct fe_priv *priv, int budget,
u32 tx_intr,
if (done) {
netdev_completed_queue(netdev, done, bytes_compl);
+ smp_mb
[OpenWrt-Devel] [PATCH] [ 2/5] ramips: change ethernet napi interrupt sequence
when open device. first ready napi software rx. then enable hardware interrupt. final start software tx queue to send data. Signed-off-by: michael lee igv...@gmail.com --- .../ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c| 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c index 60c3c91..bef715b 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c @@ -1153,7 +1153,6 @@ static int fe_open(struct net_device *dev) goto err_out; spin_lock_irqsave(priv-page_lock, flags); - napi_enable(priv-rx_napi); val = FE_TX_WB_DDONE | FE_RX_DMA_EN | FE_TX_DMA_EN; if (priv-flags FE_FLAG_RX_2B_OFFSET) @@ -1169,8 +1168,9 @@ static int fe_open(struct net_device *dev) if (priv-soc-has_carrier priv-soc-has_carrier(priv)) netif_carrier_on(dev); - netif_start_queue(dev); + napi_enable(priv-rx_napi); fe_int_enable(priv-soc-tx_int | priv-soc-rx_int); + netif_start_queue(dev); return 0; @@ -1185,15 +1185,14 @@ static int fe_stop(struct net_device *dev) unsigned long flags; int i; - fe_int_disable(priv-soc-tx_int | priv-soc-rx_int); - netif_tx_disable(dev); + fe_int_disable(priv-soc-tx_int | priv-soc-rx_int); + napi_disable(priv-rx_napi); if (priv-phy) priv-phy-stop(priv); spin_lock_irqsave(priv-page_lock, flags); - napi_disable(priv-rx_napi); fe_reg_w32(fe_reg_r32(FE_REG_PDMA_GLO_CFG) ~(FE_TX_WB_DDONE | FE_RX_DMA_EN | FE_TX_DMA_EN), -- 2.0.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [ 1/5] ramips: fix ethernet vlan tx offload support check when delete
Signed-off-by: michael lee igv...@gmail.com --- target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c index 1822fea..60c3c91 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c @@ -514,7 +514,7 @@ static int fe_vlan_rx_kill_vid(struct net_device *dev, u32 idx = (vid 0xf); if (!((fe_reg_table[FE_REG_FE_DMA_VID_BASE]) - (dev-features | NETIF_F_HW_VLAN_CTAG_TX))) + (dev-features NETIF_F_HW_VLAN_CTAG_TX))) return 0; clear_bit(idx, priv-vlan_map); -- 2.0.5 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [ 5/5] ramips: collect rx related members to fe_rx_ring struct
Signed-off-by: michael lee igv...@gmail.com
---
.../drivers/net/ethernet/ralink/ralink_ethtool.c | 4 +-
.../drivers/net/ethernet/ralink/ralink_soc_eth.c | 105 +++--
.../drivers/net/ethernet/ralink/ralink_soc_eth.h | 18 ++--
3 files changed, 69 insertions(+), 58 deletions(-)
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
index 93cbcb9..e95a173 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
@@ -145,7 +145,7 @@ static int fe_set_ringparam(struct net_device *dev,
dev-netdev_ops-ndo_stop(dev);
priv-tx_ring.tx_ring_size = BIT(fls(ring-tx_pending) - 1);
- priv-rx_ring_size = BIT(fls(ring-rx_pending) - 1);
+ priv-rx_ring.rx_ring_size = BIT(fls(ring-rx_pending) - 1);
dev-netdev_ops-ndo_open(dev);
@@ -159,7 +159,7 @@ static void fe_get_ringparam(struct net_device *dev,
ring-rx_max_pending = MAX_DMA_DESC;
ring-tx_max_pending = MAX_DMA_DESC;
- ring-rx_pending = priv-rx_ring_size;
+ ring-rx_pending = priv-rx_ring.rx_ring_size;
ring-tx_pending = priv-tx_ring.tx_ring_size;
}
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index 4b39825..db6b197 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -57,7 +57,7 @@
#define TX_DMA_DESP2_DEF (TX_DMA_LS0 | TX_DMA_DONE)
#define TX_DMA_DESP4_DEF (TX_DMA_QN(3) | TX_DMA_PN(1))
#define NEXT_TX_DESP_IDX(X)(((X) + 1) (ring-tx_ring_size - 1))
-#define NEXT_RX_DESP_IDX(X)(((X) + 1) (priv-rx_ring_size - 1))
+#define NEXT_RX_DESP_IDX(X)(((X) + 1) (ring-rx_ring_size - 1))
#define SYSC_REG_RSTCTRL 0x34
@@ -202,77 +202,80 @@ static inline void fe_set_txd(struct fe_tx_dma *txd,
struct fe_tx_dma *dma_txd)
static void fe_clean_rx(struct fe_priv *priv)
{
int i;
+ struct fe_rx_ring *ring = priv-rx_ring;
- if (priv-rx_data) {
- for (i = 0; i priv-rx_ring_size; i++)
- if (priv-rx_data[i]) {
- if (priv-rx_dma priv-rx_dma[i].rxd1)
+ if (ring-rx_data) {
+ for (i = 0; i ring-rx_ring_size; i++)
+ if (ring-rx_data[i]) {
+ if (ring-rx_dma ring-rx_dma[i].rxd1)
dma_unmap_single(priv-netdev-dev,
- priv-rx_dma[i].rxd1,
- priv-rx_buf_size,
+ ring-rx_dma[i].rxd1,
+ ring-rx_buf_size,
DMA_FROM_DEVICE);
- put_page(virt_to_head_page(priv-rx_data[i]));
+ put_page(virt_to_head_page(ring-rx_data[i]));
}
- kfree(priv-rx_data);
- priv-rx_data = NULL;
+ kfree(ring-rx_data);
+ ring-rx_data = NULL;
}
- if (priv-rx_dma) {
+ if (ring-rx_dma) {
dma_free_coherent(priv-netdev-dev,
- priv-rx_ring_size * sizeof(*priv-rx_dma),
- priv-rx_dma,
- priv-rx_phys);
- priv-rx_dma = NULL;
+ ring-rx_ring_size * sizeof(*ring-rx_dma),
+ ring-rx_dma,
+ ring-rx_phys);
+ ring-rx_dma = NULL;
}
}
static int fe_alloc_rx(struct fe_priv *priv)
{
struct net_device *netdev = priv-netdev;
+ struct fe_rx_ring *ring = priv-rx_ring;
int i, pad;
- priv-rx_data = kcalloc(priv-rx_ring_size, sizeof(*priv-rx_data),
+ ring-rx_data = kcalloc(ring-rx_ring_size, sizeof(*ring-rx_data),
GFP_KERNEL);
- if (!priv-rx_data)
+ if (!ring-rx_data)
goto no_rx_mem;
- for (i = 0; i priv-rx_ring_size; i++) {
- priv-rx_data[i] = netdev_alloc_frag(priv-frag_size);
- if (!priv-rx_data[i])
+ for (i = 0; i ring-rx_ring_size; i++) {
+ ring-rx_data[i] = netdev_alloc_frag(ring-frag_size);
+ if (!ring-rx_data[i])
goto no_rx_mem;
}
- priv-rx_dma = dma_alloc_coherent(netdev-dev,
- priv-rx_ring_size * sizeof(*priv-rx_dma),
- priv-rx_phys,
+ ring-rx_dma = dma_alloc_coherent(netdev-dev
[OpenWrt-Devel] [PATCH] [ 3/5] ramips: improve tx clean up and add fe_tx_ring struct
if there is any new tx need to clean up. do it in next napi poll.
collect tx related members to fe_tx_ring struct. for better
cache usage and more readable.
Signed-off-by: michael lee igv...@gmail.com
---
.../drivers/net/ethernet/ralink/ralink_ethtool.c | 4 +-
.../drivers/net/ethernet/ralink/ralink_soc_eth.c | 134 +++--
.../drivers/net/ethernet/ralink/ralink_soc_eth.h | 15 ++-
3 files changed, 83 insertions(+), 70 deletions(-)
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
index 63356b1..93cbcb9 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_ethtool.c
@@ -144,7 +144,7 @@ static int fe_set_ringparam(struct net_device *dev,
dev-netdev_ops-ndo_stop(dev);
- priv-tx_ring_size = BIT(fls(ring-tx_pending) - 1);
+ priv-tx_ring.tx_ring_size = BIT(fls(ring-tx_pending) - 1);
priv-rx_ring_size = BIT(fls(ring-rx_pending) - 1);
dev-netdev_ops-ndo_open(dev);
@@ -160,7 +160,7 @@ static void fe_get_ringparam(struct net_device *dev,
ring-rx_max_pending = MAX_DMA_DESC;
ring-tx_max_pending = MAX_DMA_DESC;
ring-rx_pending = priv-rx_ring_size;
- ring-tx_pending = priv-tx_ring_size;
+ ring-tx_pending = priv-tx_ring.tx_ring_size;
}
static void fe_get_strings(struct net_device *dev, u32 stringset, u8 *data)
diff --git
a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
index bef715b..b2304bb 100644
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/ralink_soc_eth.c
@@ -56,7 +56,7 @@
#define TX_DMA_DESP2_DEF (TX_DMA_LS0 | TX_DMA_DONE)
#define TX_DMA_DESP4_DEF (TX_DMA_QN(3) | TX_DMA_PN(1))
-#define NEXT_TX_DESP_IDX(X)(((X) + 1) (priv-tx_ring_size - 1))
+#define NEXT_TX_DESP_IDX(X)(((X) + 1) (ring-tx_ring_size - 1))
#define NEXT_RX_DESP_IDX(X)(((X) + 1) (priv-rx_ring_size - 1))
#define SYSC_REG_RSTCTRL 0x34
@@ -310,51 +310,56 @@ static void fe_txd_unmap(struct device *dev, struct
fe_tx_buf *tx_buf)
static void fe_clean_tx(struct fe_priv *priv)
{
int i;
-
- if (priv-tx_buf) {
- for (i = 0; i priv-tx_ring_size; i++)
- fe_txd_unmap(priv-netdev-dev, priv-tx_buf[i]);
- kfree(priv-tx_buf);
- priv-tx_buf = NULL;
+ struct device *dev = priv-netdev-dev;
+ struct fe_tx_ring *ring = priv-tx_ring;
+
+ if (ring-tx_buf) {
+ for (i = 0; i ring-tx_ring_size; i++)
+ fe_txd_unmap(dev, ring-tx_buf[i]);
+ kfree(ring-tx_buf);
+ ring-tx_buf = NULL;
}
- if (priv-tx_dma) {
- dma_free_coherent(priv-netdev-dev,
- priv-tx_ring_size * sizeof(*priv-tx_dma),
- priv-tx_dma,
- priv-tx_phys);
- priv-tx_dma = NULL;
+ if (ring-tx_dma) {
+ dma_free_coherent(dev,
+ ring-tx_ring_size * sizeof(*ring-tx_dma),
+ ring-tx_dma,
+ ring-tx_phys);
+ ring-tx_dma = NULL;
}
+
+ netdev_reset_queue(priv-netdev);
}
static int fe_alloc_tx(struct fe_priv *priv)
{
int i;
+ struct fe_tx_ring *ring = priv-tx_ring;
- priv-tx_free_idx = 0;
+ ring-tx_free_idx = 0;
- priv-tx_buf = kcalloc(priv-tx_ring_size, sizeof(*priv-tx_buf),
+ ring-tx_buf = kcalloc(ring-tx_ring_size, sizeof(*ring-tx_buf),
GFP_KERNEL);
- if (!priv-tx_buf)
+ if (!ring-tx_buf)
goto no_tx_mem;
- priv-tx_dma = dma_alloc_coherent(priv-netdev-dev,
- priv-tx_ring_size * sizeof(*priv-tx_dma),
- priv-tx_phys,
+ ring-tx_dma = dma_alloc_coherent(priv-netdev-dev,
+ ring-tx_ring_size * sizeof(*ring-tx_dma),
+ ring-tx_phys,
GFP_ATOMIC | __GFP_ZERO);
- if (!priv-tx_dma)
+ if (!ring-tx_dma)
goto no_tx_mem;
- for (i = 0; i priv-tx_ring_size; i++) {
+ for (i = 0; i ring-tx_ring_size; i++) {
if (priv-soc-tx_dma) {
- priv-soc-tx_dma(priv-tx_dma[i]);
+ priv-soc-tx_dma(ring-tx_dma[i]);
}
- priv-tx_dma[i].txd2 = TX_DMA_DESP2_DEF;
+ ring-tx_dma[i].txd2 = TX_DMA_DESP2_DEF;
}
wmb();
- fe_reg_w32(priv-tx_phys, FE_REG_TX_BASE_PTR0);
- fe_reg_w32(priv-tx_ring_size, FE_REG_TX_MAX_CNT0
[OpenWrt-Devel] [PATCH] ramips: add missing rt3352 usb profile
From: michael igv...@gmail.com
Signed-off-by: michael igv...@gmail.com
---
target/linux/ramips/dts/rt3352.dtsi | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target/linux/ramips/dts/rt3352.dtsi
b/target/linux/ramips/dts/rt3352.dtsi
index 6b1f11d..47e30a3 100644
--- a/target/linux/ramips/dts/rt3352.dtsi
+++ b/target/linux/ramips/dts/rt3352.dtsi
@@ -216,6 +216,13 @@
interrupts = 17;
};
+ usbphy {
+ compatible = ralink,rt3xxx-usbphy;
+
+ resets = rstctrl 22 rstctrl 25;
+ reset-names = host, device;
+ };
+
wmac@1018 {
compatible = ralink,rt3352-wmac, ralink,rt2880-wmac;
reg = 0x1018 4;
@@ -227,7 +234,7 @@
};
ehci@101c {
- compatible = ralink,rt3352-ehci, ehci-platform;
+ compatible = ralink,rt3xxx-ehci, ehci-platform;
reg = 0x101c 0x1000;
interrupt-parent = intc;
@@ -237,7 +244,7 @@
};
ohci@101c1000 {
- compatible = ralink,rt3352-ohci, ohci-platform;
+ compatible = ralink,rt3xxx-ohci, ohci-platform;
reg = 0x101c1000 0x1000;
interrupt-parent = intc;
--
1.8.5.5
___
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[OpenWrt-Devel] [PATCH] ramips: fix target rt5350 only have 28 gpios
From: michael igv...@gmail.com
Signed-off-by: michael igv...@gmail.com
---
target/linux/ramips/dts/rt5350.dtsi | 27 ---
1 file changed, 4 insertions(+), 23 deletions(-)
diff --git a/target/linux/ramips/dts/rt5350.dtsi
b/target/linux/ramips/dts/rt5350.dtsi
index 7353c82..6abb271 100644
--- a/target/linux/ramips/dts/rt5350.dtsi
+++ b/target/linux/ramips/dts/rt5350.dtsi
@@ -109,32 +109,13 @@
#gpio-cells = 2;
ralink,gpio-base = 0;
- ralink,num-gpios = 24;
+ ralink,num-gpios = 22;
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
};
- gpio1: gpio@638 {
- compatible = ralink,rt5350-gpio, ralink,rt2880-gpio;
- reg = 0x638 0x24;
-
- interrupt-parent = intc;
- interrupts = 6;
-
- gpio-controller;
- #gpio-cells = 2;
-
- ralink,gpio-base = 24;
- ralink,num-gpios = 16;
- ralink,register-map = [ 00 04 08 0c
- 10 14 18 1c
- 20 24 ];
-
- status = disabled;
- };
-
- gpio2: gpio@660 {
+ gpio1: gpio@660 {
compatible = ralink,rt5350-gpio, ralink,rt2880-gpio;
reg = 0x660 0x24;
@@ -144,8 +125,8 @@
gpio-controller;
#gpio-cells = 2;
- ralink,gpio-base = 40;
- ralink,num-gpios = 12;
+ ralink,gpio-base = 22;
+ ralink,num-gpios = 6;
ralink,register-map = [ 00 04 08 0c
10 14 18 1c
20 24 ];
--
1.8.5.5
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[OpenWrt-Devel] [PATCH] [ramips] Add support for samsung cy-swr1100 wireless router
It is base on rt3662 soc with dual band 802.11n
wireless router. Use rtl8367R switch chip.
This patch adds a profile for this board.
It use seama image header. so i also enable it
on kernel config.
Signed-off-by: michael lee igv...@gmail.com
---
target/linux/ramips/base-files/etc/diag.sh | 3 +
.../etc/hotplug.d/firmware/10-rt2x00-eeprom| 4 +
.../ramips/base-files/etc/uci-defaults/01_leds | 4 +
.../ramips/base-files/etc/uci-defaults/02_network | 8 ++
.../etc/uci-defaults/09_fix-seama-header | 1 +
.../ramips/base-files/lib/preinit/06_set_iface_mac | 1 +
target/linux/ramips/base-files/lib/ramips.sh | 3 +
.../ramips/base-files/lib/upgrade/platform.sh | 1 +
target/linux/ramips/dts/CY-SWR1100.dts | 135 +
target/linux/ramips/image/Makefile | 3 +
target/linux/ramips/rt3883/config-3.10 | 1 +
target/linux/ramips/rt3883/profiles/samsung.mk | 16 +++
12 files changed, 180 insertions(+)
create mode 100644 target/linux/ramips/dts/CY-SWR1100.dts
create mode 100644 target/linux/ramips/rt3883/profiles/samsung.mk
diff --git a/target/linux/ramips/base-files/etc/diag.sh
b/target/linux/ramips/base-files/etc/diag.sh
index 075562a..d4d484c 100755
--- a/target/linux/ramips/base-files/etc/diag.sh
+++ b/target/linux/ramips/base-files/etc/diag.sh
@@ -27,6 +27,9 @@ get_status_led() {
br6425 | br-6475nd)
status_led=edimax:green:power
;;
+ cy-swr1100)
+ status_led=samsung:blue:wps
+ ;;
d105)
status_led=d105:red:power
;;
diff --git
a/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
b/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
index 341fd5f..f9db677 100644
--- a/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
+++ b/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
@@ -70,6 +70,7 @@ case $FIRMWARE in
broadway | \
br6524n | \
carambola | \
+ cy-swr1100 | \
d105 | \
dcs-930 | \
dir-300-b7 | \
@@ -135,6 +136,9 @@ case $FIRMWARE in
rt2x00pci_1_0.eeprom)
case $board in
+ cy-swr1100)
+ rt2x00_eeprom_extract factory 8192 512
+ ;;
rt-n56u | whr-600d)
rt2x00_eeprom_extract factory 32768 512
;;
diff --git a/target/linux/ramips/base-files/etc/uci-defaults/01_leds
b/target/linux/ramips/base-files/etc/uci-defaults/01_leds
index 74ba0ba..23c2451 100755
--- a/target/linux/ramips/base-files/etc/uci-defaults/01_leds
+++ b/target/linux/ramips/base-files/etc/uci-defaults/01_leds
@@ -60,6 +60,10 @@ case $board in
br6524n)
set_wifi_led edimax:blue:wlan
;;
+ cy-swr1100)
+ ucidef_set_led_default wps WPS samsung:blue:wps 0
+ set_usb_led samsung:blue:usb
+ ;;
d105)
ucidef_set_led_default power POWER d105:red:power 1
set_usb_led d105:green:usb
diff --git a/target/linux/ramips/base-files/etc/uci-defaults/02_network
b/target/linux/ramips/base-files/etc/uci-defaults/02_network
index b66d176..b9524f6 100755
--- a/target/linux/ramips/base-files/etc/uci-defaults/02_network
+++ b/target/linux/ramips/base-files/etc/uci-defaults/02_network
@@ -78,6 +78,13 @@ ramips_setup_interfaces()
ucidef_add_switch_vlan switch0 1 1 2 3 4 6t
;;
+ cy-swr1100)
+ ucidef_set_interfaces_lan_wan eth0.1 eth0.2
+ ucidef_add_switch switch0 1 1
+ ucidef_add_switch_vlan switch0 1 0 1 2 3 9t
+ ucidef_add_switch_vlan switch0 2 4 9t
+ ;;
+
dir-610-a1 | \
dir-300-b7 | \
dir-320-b1 | \
@@ -205,6 +212,7 @@ ramips_setup_macs()
wan_mac=$(macaddr_add $lan_mac 1)
;;
+ cy-swr1100 | \
dir-645)
lan_mac=$(mtd_get_mac_ascii nvram lanmac)
wan_mac=$(mtd_get_mac_ascii nvram wanmac)
diff --git
a/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
b/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
index d8bed79..a6c392c 100755
--- a/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
+++ b/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
@@ -14,6 +14,7 @@ fix_seama_header() {
board=$(ramips_board_name)
case $board in
+cy-swr1100 | \
dir-645)
fix_seama_header kernel
;;
diff --git a/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
b/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
index 7ff6e3d..8538c13 100644
--- a/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
+++ b/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
@@ -51,6 +51,7 @@ preinit_set_mac_address
[OpenWrt-Devel] [PATCH] [ramips] Add support for samsung cy-swr1100 wireless router
It is base on rt3662 soc with dual band 802.11n
wireless router. Use rtl8367R switch chip.
This patch adds a profile for this board.
It use seama image header. so i also enable it
on kernel config.
Signed-off-by: michael lee igv...@gmail.com
---
target/linux/ramips/base-files/etc/diag.sh | 3 +
.../etc/hotplug.d/firmware/10-rt2x00-eeprom| 4 +
.../ramips/base-files/etc/uci-defaults/01_leds | 4 +
.../ramips/base-files/etc/uci-defaults/02_network | 8 ++
.../etc/uci-defaults/09_fix-seama-header | 1 +
.../ramips/base-files/lib/preinit/06_set_iface_mac | 1 +
target/linux/ramips/base-files/lib/ramips.sh | 3 +
.../ramips/base-files/lib/upgrade/platform.sh | 1 +
target/linux/ramips/dts/CY-SWR1100.dts | 135 +
target/linux/ramips/image/Makefile | 3 +
target/linux/ramips/rt3883/config-3.10 | 1 +
target/linux/ramips/rt3883/profiles/samsung.mk | 16 +++
12 files changed, 180 insertions(+)
create mode 100644 target/linux/ramips/dts/CY-SWR1100.dts
create mode 100644 target/linux/ramips/rt3883/profiles/samsung.mk
diff --git a/target/linux/ramips/base-files/etc/diag.sh
b/target/linux/ramips/base-files/etc/diag.sh
index 075562a..e120d42 100755
--- a/target/linux/ramips/base-files/etc/diag.sh
+++ b/target/linux/ramips/base-files/etc/diag.sh
@@ -36,6 +36,9 @@ get_status_led() {
dir-645)
status_led=d-link:green:wps
;;
+ cy-swr1100)
+ status_led=samsung:blue:wps
+ ;;
dap-1350)
status_led=d-link:blue:power
;;
diff --git
a/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
b/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
index 341fd5f..5bda7a9 100644
--- a/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
+++ b/target/linux/ramips/base-files/etc/hotplug.d/firmware/10-rt2x00-eeprom
@@ -78,6 +78,7 @@ case $FIRMWARE in
dir-620-a1 | \
dir-620-d1 | \
dir-645 | \
+ cy-swr1100 | \
esr-9753 | \
f7c027 | \
fonera20n | \
@@ -135,6 +136,9 @@ case $FIRMWARE in
rt2x00pci_1_0.eeprom)
case $board in
+ cy-swr1100)
+ rt2x00_eeprom_extract factory 8192 512
+ ;;
rt-n56u | whr-600d)
rt2x00_eeprom_extract factory 32768 512
;;
diff --git a/target/linux/ramips/base-files/etc/uci-defaults/01_leds
b/target/linux/ramips/base-files/etc/uci-defaults/01_leds
index 74ba0ba..1e2683f 100755
--- a/target/linux/ramips/base-files/etc/uci-defaults/01_leds
+++ b/target/linux/ramips/base-files/etc/uci-defaults/01_leds
@@ -173,6 +173,10 @@ case $board in
ucidef_set_led_default power power buffalo:green:power 1
ucidef_set_led_default router router buffalo:green:router
1
;;
+ cy-swr1100)
+ ucidef_set_led_default wps WPS samsung:blue:wps 0
+ set_usb_led samsung:blue:usb
+ ;;
esac
ucidef_commit_leds
diff --git a/target/linux/ramips/base-files/etc/uci-defaults/02_network
b/target/linux/ramips/base-files/etc/uci-defaults/02_network
index b66d176..b9524f6 100755
--- a/target/linux/ramips/base-files/etc/uci-defaults/02_network
+++ b/target/linux/ramips/base-files/etc/uci-defaults/02_network
@@ -78,6 +78,13 @@ ramips_setup_interfaces()
ucidef_add_switch_vlan switch0 1 1 2 3 4 6t
;;
+ cy-swr1100)
+ ucidef_set_interfaces_lan_wan eth0.1 eth0.2
+ ucidef_add_switch switch0 1 1
+ ucidef_add_switch_vlan switch0 1 0 1 2 3 9t
+ ucidef_add_switch_vlan switch0 2 4 9t
+ ;;
+
dir-610-a1 | \
dir-300-b7 | \
dir-320-b1 | \
@@ -205,6 +212,7 @@ ramips_setup_macs()
wan_mac=$(macaddr_add $lan_mac 1)
;;
+ cy-swr1100 | \
dir-645)
lan_mac=$(mtd_get_mac_ascii nvram lanmac)
wan_mac=$(mtd_get_mac_ascii nvram wanmac)
diff --git
a/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
b/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
index d8bed79..a6c392c 100755
--- a/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
+++ b/target/linux/ramips/base-files/etc/uci-defaults/09_fix-seama-header
@@ -14,6 +14,7 @@ fix_seama_header() {
board=$(ramips_board_name)
case $board in
+cy-swr1100 | \
dir-645)
fix_seama_header kernel
;;
diff --git a/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
b/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
index 7ff6e3d..8538c13 100644
--- a/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
+++ b/target/linux/ramips/base-files/lib/preinit/06_set_iface_mac
@@ -51,6 +51,7 @@ preinit_set_mac_address
[OpenWrt-Devel] [PATCH] [ramips] fix not set lan/wan mac address
The first switch case is default case. Then it will only match default case. cause not update the lan/wan mac address. And in the default switch case the param lan_mac is empty. it will case error message 'arithmetic syntax error' when call macaddr_add function. Signed-off-by: michael lee igv...@gmail.com --- target/linux/ramips/base-files/etc/uci-defaults/02_network | 4 1 file changed, 4 deletions(-) diff --git a/target/linux/ramips/base-files/etc/uci-defaults/02_network b/target/linux/ramips/base-files/etc/uci-defaults/02_network index b66d176..550e81f 100755 --- a/target/linux/ramips/base-files/etc/uci-defaults/02_network +++ b/target/linux/ramips/base-files/etc/uci-defaults/02_network @@ -172,10 +172,6 @@ ramips_setup_macs() local wan_mac= case $board in - *) - wan_mac=$(macaddr_add $lan_mac 1) - ;; - br-6475nd) lan_mac=$(mtd_get_mac_binary devdata 13) wan_mac=$(mtd_get_mac_binary devdata 7) -- 1.8.3.2 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [ramips] add seama image can be upgrade by sysupgrade
generate sysupgrade image by combine two images. one is kernel image with seama header. another is root fs image. Signed-off-by: michael lee igv...@gmail.com --- target/linux/ramips/image/Makefile | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/target/linux/ramips/image/Makefile b/target/linux/ramips/image/Makefile index 19932f6..f64b7fa 100644 --- a/target/linux/ramips/image/Makefile +++ b/target/linux/ramips/image/Makefile @@ -162,7 +162,8 @@ BuildFirmware/Edimax/initramfs=$(call BuildFirmware/OF/initramfs,$(1),$(2),$(3)) # build Seama header images define BuildFirmware/Seama/squashfs - $(call BuildFirmware/OF,$(1),$(2),$(3),$(5)) + $(call MkImageLzmaDtb,$(2),$(3),$(5)) + $(eval output_name=$(IMG_PREFIX)-$(2)-$(1)-sysupgrade.bin) cat $(KDIR)/vmlinux-$(2).bin.lzma $(KDIR)/root.$(1) $(KDIR)/img_$(2).$(1).tmp if [ `stat -c%s $(KDIR)/img_$(2).$(1).tmp` -gt (($(5) - 64)) ]; then \ echo Warning: $(KDIR)/img_$(2).$(1).tmp is too big 2; \ @@ -179,6 +180,14 @@ define BuildFirmware/Seama/squashfs -s $(call imgname,$(1),$(2))-factory.bin \ -m signature=$(4) \ -i $(KDIR)/vmlinux-$(2).tmp.seama; \ + dd if=$(KDIR)/vmlinux-$(2).bin.lzma.padded bs=1 count=`expr \`stat -c%s $(KDIR)/vmlinux-$(2).bin.lzma.padded\` - 64` of=$(KDIR)/vmlinux-$(2)-sysupgrade.tmp; \ + $(STAGING_DIR_HOST)/bin/seama \ + -i $(KDIR)/vmlinux-$(2)-sysupgrade.tmp \ + -m dev=/dev/mtdblock/2 -m type=firmware; \ + ( \ + dd if=$(KDIR)/vmlinux-$(2)-sysupgrade.tmp.seama; \ + dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \ + ) $(BIN_DIR)/$(output_name); \ fi endef BuildFirmware/Seama/initramfs=$(call BuildFirmware/OF/initramfs,$(1),$(2),$(3)) -- 1.8.3.2 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [ramips] fix not set lan/wan mac address
The first switch case is default case. Then it will only match default case. cause not update the lan/wan mac address. And in the default switch case the param lan_mac is empty. it will case error message 'arithmetic syntax error' when call macaddr_add function. Signed-off-by: michael lee igv...@gmail.com --- target/linux/ramips/base-files/etc/uci-defaults/02_network | 4 1 file changed, 4 deletions(-) diff --git a/target/linux/ramips/base-files/etc/uci-defaults/02_network b/target/linux/ramips/base-files/etc/uci-defaults/02_network index b66d176..550e81f 100755 --- a/target/linux/ramips/base-files/etc/uci-defaults/02_network +++ b/target/linux/ramips/base-files/etc/uci-defaults/02_network @@ -172,10 +172,6 @@ ramips_setup_macs() local wan_mac= case $board in - *) - wan_mac=$(macaddr_add $lan_mac 1) - ;; - br-6475nd) lan_mac=$(mtd_get_mac_binary devdata 13) wan_mac=$(mtd_get_mac_binary devdata 7) -- 1.8.3.2 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
[OpenWrt-Devel] [PATCH] [ramips] add seama image can be upgrade by sysupgrade
generate sysupgrade image by combine two images. one is kernel image with seama header. another is root fs image. Signed-off-by: michael lee igv...@gmail.com --- target/linux/ramips/image/Makefile | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/target/linux/ramips/image/Makefile b/target/linux/ramips/image/Makefile index 19932f6..f64b7fa 100644 --- a/target/linux/ramips/image/Makefile +++ b/target/linux/ramips/image/Makefile @@ -162,7 +162,8 @@ BuildFirmware/Edimax/initramfs=$(call BuildFirmware/OF/initramfs,$(1),$(2),$(3)) # build Seama header images define BuildFirmware/Seama/squashfs - $(call BuildFirmware/OF,$(1),$(2),$(3),$(5)) + $(call MkImageLzmaDtb,$(2),$(3),$(5)) + $(eval output_name=$(IMG_PREFIX)-$(2)-$(1)-sysupgrade.bin) cat $(KDIR)/vmlinux-$(2).bin.lzma $(KDIR)/root.$(1) $(KDIR)/img_$(2).$(1).tmp if [ `stat -c%s $(KDIR)/img_$(2).$(1).tmp` -gt (($(5) - 64)) ]; then \ echo Warning: $(KDIR)/img_$(2).$(1).tmp is too big 2; \ @@ -179,6 +180,14 @@ define BuildFirmware/Seama/squashfs -s $(call imgname,$(1),$(2))-factory.bin \ -m signature=$(4) \ -i $(KDIR)/vmlinux-$(2).tmp.seama; \ + dd if=$(KDIR)/vmlinux-$(2).bin.lzma.padded bs=1 count=`expr \`stat -c%s $(KDIR)/vmlinux-$(2).bin.lzma.padded\` - 64` of=$(KDIR)/vmlinux-$(2)-sysupgrade.tmp; \ + $(STAGING_DIR_HOST)/bin/seama \ + -i $(KDIR)/vmlinux-$(2)-sysupgrade.tmp \ + -m dev=/dev/mtdblock/2 -m type=firmware; \ + ( \ + dd if=$(KDIR)/vmlinux-$(2)-sysupgrade.tmp.seama; \ + dd if=$(KDIR)/root.$(1) bs=64k conv=sync; \ + ) $(BIN_DIR)/$(output_name); \ fi endef BuildFirmware/Seama/initramfs=$(call BuildFirmware/OF/initramfs,$(1),$(2),$(3)) -- 1.8.3.2 ___ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
