MyHDL project!
From: Dan Fabrizio [mailto:[EMAIL PROTECTED]
Sent: Friday, February 08, 2008 2:56 PM
To: Blubaugh, David A.
Subject: Re: MyHDL project !
David,
No problem with the mailing list, others might have some experience that
could be useful. Let me know how you make out this weekend, I will be
doing the same on my end. FYI, I'm workin on an iMac.
Dan
On Feb 8, 2008 2:25 PM, Blubaugh, David A. <[EMAIL PROTECTED]> wrote:
Hi Dan,
I think that is a great idea. However, I have done additional
reading and it appears that SAGE is really nothing more than python wrap
with scipy and laplack. Therefore, I think we can start on the same
thing together, since there is little reason to start a divergence
already in this project. I will try to integrate python with scipy and
MyHDL this weekend and I be giving you updates during the weekend. I
will try and see what I can get at this time. Also, do you have any
objections to me forwarding this message to the python community mailing
list?? thanks for being a friend.
Thanks,
David Blubaugh
Also, before I forget to mention. I am currently residing in
Springboro, Ohio, which is not far from Wright-Patterson Air Force Base.
From: Dan Fabrizio [mailto:[EMAIL PROTECTED]
Sent: Friday, February 08, 2008 1:16 PM
To: Blubaugh, David A.
Subject: Re: MyHDL project !
Hi David,
No need to apologize. Reply when you get a chance, I realize
we all have other things we need to do like work and errands and family
and home projects, etc... I don't know at this point which one would
be better but let's evaluate both and try to select the best for our
needs. How about if you look at Sage and I look at SciPy, maybe we do a
simple DSP algorithm ( FIR filter ) in both if needed? What do you
think?We could do a floating point version, then follow up with a
fixed point version and then compare notes. Just some of my thoughts,
what are yours?
I live in USA on the east coast very close to Philadelphia, Pa.
How about you, where do you live?
I have strong interest in the development EDA CAD tools like
MyHDL. Most of my work recently has been in ASIC and FPGA design for
distributed digital audio and wireless communications products. I have
been working
on a Timing Analyzer program for a few years. It is about 75%
complete but is taking longer than expected being a part time effort. I
used Java and didn't know about Python when I started. Tcl/Tk is very
popular in a lot of CAD tools I use but it looks like Python is starting
to become popular as well. I have thought about converting the
application to Python but haven't decided for sure yet.
Regards,
Dan
On Feb 8, 2008 12:33 PM, Blubaugh, David A.
<[EMAIL PROTECTED]> wrote:
Dan,
Let first apologize for not answering your message
sooner. I was currently experiencing car problems and was extremely
late to work. I arrived at work almost at 12:00. My reason for
selecting the SAGE environment, is that the SAGE environment appears to
be a far more mature environment than SciPy/NumPy/Matplotlib
combination. I thought that using SAGE could be able to develop better
results sooner than the other combination. However, the most important
thing to keep in mind for any endeavor is that we MUST keep everything
involved as simple as possible. Which do you believe would be easier to
develop and use SAGE or a SciPy/NumPy/Matplotlib combination??? Thanks
for all of your sincere help and consideration.
David
From: Dan Fabrizio [mailto:[EMAIL PROTECTED]
Sent: Thursday, February 07, 2008 7:59 PM
To: Blubaugh, David A.
Subject: Re: MyHDL project !
Hi David,
Your welcome. I am glad to have found a new friend as
well and yes, I am interested in helping you on
this project.
I have a question, why have you decided to use sage and
not SciPy/NumPy/Matplotlib combination?
Dan
On Feb 7, 2008 5:51 PM, Blubaugh, David A.
<[EMAIL PROTECTED]> wrote:
Hello Dan,
Re: Dear David (was: MyHDL project)
On 2008-02-08, Dan Upton <[EMAIL PROTECTED]> wrote: > I don't know, I'm inclined to agree with him. Repeatedly > replying to bash his use of grammar or punctuation is > unnecessary. Replying to the list to mock repeatedly is > doubly unnecessary. While c.l.p is exceptionally polite and tolerant, it's still Usenet. In a lot of other groups he wouldn't have been able to see his keyboard through the smoke. -- Grant Edwards grante Yow! ! The land of the at rising SONY!! visi.com -- http://mail.python.org/mailman/listinfo/python-list
Re: Dear David (was: MyHDL project)
On Feb 7, 2008 8:59 PM, ajaksu <[EMAIL PROTECTED]> wrote: > On Feb 7, 10:05 pm, "Blubaugh, David A." <[EMAIL PROTECTED]> wrote: > > I do not understand why people such as yourself cannot construct > > anything but insults and complaints. > > I can help with that. People asked politely a few days ago. Didn't you > see it? It happens because you're not following basic etiquette and > common practice for online communication. That makes your messages > annoying and unpleasant, so people complain and insult in return. > Things like USING CAPS AND LOTS OF PUNCTUATION SUCkS! > IT MAKES READING HARDER!!! LIKE HELL!1!1!!1! > one! > SEE?? > ?? > ?? > ??? > ??? YOU DO, > RIGHT > ? > ??? > > ?NO?? I don't know, I'm inclined to agree with him. Repeatedly replying to bash his use of grammar or punctuation is unnecessary. Replying to the list to mock repeatedly is doubly unnecessary. If nothing else, there comes a point where you should say "look, we tried to help him with his mailing list ethics, but it's just not working" and LEAVE IT ALONE. And speaking of annoyances, changing the subject again and again is kind of annoying, too. At least this one was changing the subject line to legitimately a different topic, unlike Steve's "I changed the topic because it 'hurt my eyes' to look at that many consecutive question marks." > > You don't actually engage in conversation. That also sucks. > > So... I don't understand why people such as yourself cannot construct > queries in a readable fashion, improving them based on polite > feedback, then get angry when nobody cares to answer them. > > > Please e-mail me something that is > > of reasonable technological value regarding Python development > > No. I've already done that, just after you were throwing fits, without > a word from you. But congratulations on getting your first grown-up- > ish post and request, anyway. > > > not just > > informing me that that my messages are difficult to read under > > circumstances that are ridiculous at best. thanks. > > Sorry, not everyone is an EE with lots of experience on environments > that make jerk-grammar easier to parse, SIR. > > I live in a 3rd World country and my screen is actually based on > highly trained fire ants carrying leaf litter. Do you know how > exhausted the poor things get trying to fetch all those curvy twigs > for your question marks? Mine, above, were typed in veeery slowly, > just to avoid that. Speaking of being a jerk... -- http://mail.python.org/mailman/listinfo/python-list
Re: Dear David (was: MyHDL project)
On Feb 7, 10:05 pm, "Blubaugh, David A." <[EMAIL PROTECTED]> wrote: > I do not understand why people such as yourself cannot construct > anything but insults and complaints. I can help with that. People asked politely a few days ago. Didn't you see it? It happens because you're not following basic etiquette and common practice for online communication. That makes your messages annoying and unpleasant, so people complain and insult in return. Things like USING CAPS AND LOTS OF PUNCTUATION SUCkS! IT MAKES READING HARDER!!! LIKE HELL!1!1!!1! one! SEE?? ?? ?? ??? ??? YOU DO, RIGHT ? ??? ?NO?? You don't actually engage in conversation. That also sucks. So... I don't understand why people such as yourself cannot construct queries in a readable fashion, improving them based on polite feedback, then get angry when nobody cares to answer them. > Please e-mail me something that is > of reasonable technological value regarding Python development No. I've already done that, just after you were throwing fits, without a word from you. But congratulations on getting your first grown-up- ish post and request, anyway. > not just > informing me that that my messages are difficult to read under > circumstances that are ridiculous at best. thanks. Sorry, not everyone is an EE with lots of experience on environments that make jerk-grammar easier to parse, SIR. I live in a 3rd World country and my screen is actually based on highly trained fire ants carrying leaf litter. Do you know how exhausted the poor things get trying to fetch all those curvy twigs for your question marks? Mine, above, were typed in veeery slowly, just to avoid that. Wishing you luck with your thesis, Daniel -- http://mail.python.org/mailman/listinfo/python-list
RE: Dear David (was: MyHDL project)
I do not understand why people such as yourself cannot construct anything but insults and complaints. Please e-mail me something that is of reasonable technological value regarding Python development, not just informing me that that my messages are difficult to read under circumstances that are ridiculous at best. thanks. David -Original Message- From: ajaksu [mailto:[EMAIL PROTECTED] Sent: Thursday, February 07, 2008 5:49 PM To: python-list@python.org Subject: Re: Dear David (was: MyHDL project) On Feb 7, 4:48 pm, "Blubaugh, David A." <[EMAIL PROTECTED]> wrote: > sir, > > Is there still a possibility to collaborate??? > > David Blubaugh Dear David A. Blubaugh, Could you please make it a little less painful to read your messages? You're giving a bad name to Belcan, too. Daniel This e-mail transmission contains information that is confidential and may be privileged. It is intended only for the addressee(s) named above. If you receive this e-mail in error, please do not read, copy or disseminate it in any manner. If you are not the intended recipient, any disclosure, copying, distribution or use of the contents of this information is prohibited. Please reply to the message immediately by informing the sender that the message was misdirected. After replying, please erase it from your computer system. Your assistance in correcting this error is appreciated. -- http://mail.python.org/mailman/listinfo/python-list
Re: Dear David (was: MyHDL project)
On Feb 7, 4:48 pm, "Blubaugh, David A." <[EMAIL PROTECTED]> wrote: > sir, > > Is there still a possibility to collaborate??? > > David Blubaugh Dear David A. Blubaugh, Could you please make it a little less painful to read your messages? You're giving a bad name to Belcan, too. Daniel -- http://mail.python.org/mailman/listinfo/python-list
MyHDL project!!
sir, Is there still a possibility to collaborate??? David Blubaugh -Original Message- From: Blubaugh, David A. Sent: Friday, February 01, 2008 10:44 AM To: 'chewie54' Cc: 'python-list@python.org' Subject: MyHDL project ! Dan, I would be honored to start a project such as that in mind. How do we begin ?? David Blubaugh -Original Message- From: chewie54 [mailto:[EMAIL PROTECTED] Sent: Thursday, January 31, 2008 9:34 PM To: python-list@python.org Subject: Re: Will Python on day replaceMATLAB? > I have been evaluating the python environment ever more closer. I > believe I can interface python with a development environment known as > the ImpulseC environment. The ImpulseC environment develops C to VHDL > for FPGA development. I would especially love to interface Python > with ImpulseC and the graphing capabilities of GNU Plot and SciPy in > order to recreate a VHDL development environment that will be just as > capable as a $50,000 dollar Matlab to VHDL toolbox. This is also a > part of my Masters thesis. Is anyone willing to help in this endeavor? > > David Blubaugh > Why not use MyHDL which is written in Python and translates to Verilog. I assume ImpulseC is a commercial product and costs a log. MyHDL is free. If you have any interests in combining MyHDL with SciPy and NumPy I would be interested in getting involved. Dan Fabrizio This e-mail transmission contains information that is confidential and may be privileged. It is intended only for the addressee(s) named above. If you receive this e-mail in error, please do not read, copy or disseminate it in any manner. If you are not the intended recipient, any disclosure, copying, distribution or use of the contents of this information is prohibited. Please reply to the message immediately by informing the sender that the message was misdirected. After replying, please erase it from your computer system. Your assistance in correcting this error is appreciated. -- http://mail.python.org/mailman/listinfo/python-list
MyHDL project for FPGA development!
Dan, Thank you very much for your reply. My Master's thesis is for Wright State University and is of the following nature: I am currently engaged with a Masters project, that utilizes a linear array of isotropic sensors, or in my case electromagnetic antennas. I am trying to develop a specialized Multidimensional FFT processor, that can determine the angle of arrival and frequency content of a perceived target with respect to the position of the linear array. I should further state that this Multidimensional FFT processor is currently of only two dimensions. Therefore, the MDFFT will only have a result of frequency value versus angle of arrival of the target with respect to the position of the linear array. There is a great deal of mathematics that are involved (SciPy), especially considering that in order to model the two-dimensional signal of the linear sensor array, I have to utilize concepts borrowed from differential geometry. This is why I will need to utilize a toolset like SciPy with python. I would still like to include the ImpulseC environment, since the environment does provide an interesting connection between FPGA hardware and software running on embedded processors ,such as the Power PC on Xilinx FPGAS. I believe that a marriage between Python, ImpulseC, MyHDL, SciPy, Gene Expression Programming, and GNU Plot will develop into a very interesting and powerful algorithm development environment for FPGAS. I will also need a way to develop floating-point hardware, since I will need to have the dynamic range of floating-point in order to determine the angle of arrival of targets placed many miles away from the linear sensor array. This is why Impulse C should still be considered, since they provide the ability of generating efficient floating-point hardware. I have to go now, since I have to report for my employment duties. In conclusion, I would very much to continue development for a Python, Scipy, MyHDL combined. If there are any more questions, Dan, please contact me as soon as possible. Respectfully, David From: Dan Fabrizio [mailto:[EMAIL PROTECTED] Sent: Friday, February 01, 2008 11:14 AM To: Blubaugh, David A. Subject: Re: MyHDL project ! David, Let's start by discussing your masters thesis subject in more detail. We can take a project from conception to hardware using MyHDL, NumPy and SciPy. Maybe you could use this project as a proof for your thesis showing this methodology warrants consideration compared other ASIC/FPGA flows. Let's discuss some of your ideas and decide how to proceed. Dan On Feb 1, 2008 10:43 AM, Blubaugh, David A. <[EMAIL PROTECTED]> wrote: Dan, I would be honored to start a project such as that in mind. How do we begin ?? David Blubaugh -Original Message- From: chewie54 [mailto:[EMAIL PROTECTED] Sent: Thursday, January 31, 2008 9:34 PM To: python-list@python.org Subject: Re: Will Python on day replaceMATLAB? > I have been evaluating the python environment ever more closer. I > believe I can interface python with a development environment known as > the ImpulseC environment. The ImpulseC environment develops C to VHDL > for FPGA development. I would especially love to interface Python > with ImpulseC and the graphing capabilities of GNU Plot and SciPy in > order to recreate a VHDL development environment that will be just as > capable as a $50,000 dollar Matlab to VHDL toolbox. This is also a > part of my Masters thesis. Is anyone willing to help in this endeavor? > > David Blubaugh > Why not use MyHDL which is written in Python and translates to Verilog. I assume ImpulseC is a commercial product and costs a log. MyHDL is free. If you have any interests in combining MyHDL with SciPy and NumPy I would be interested in getting involved. Dan Fabrizio This e-mail transmission contains information that is confidential and may be privileged. It is intended only for the addressee(s) named above. If you receive this e-mail in error, please do not read, copy or disseminate it in any manner. If you are not the intended recipient, any disclosure, copying, distribution or use of the contents of this information is prohibited. Please reply to the message immediately by informing the sender that the message was misdirected. After replying, please erase it from your computer system. Your assistance in correcting this error is appreciated. -- http://mail.python.org/mailman/listinfo/python-list
Re: MyHDL project !!!!!
On 2008-02-01, Blubaugh, David A. <[EMAIL PROTECTED]> wrote: > I would be honored to start a project such as that in mind. > How do we begin ?? You need to get the punctuation keys on your keyboard fixed. They're sticking, and it's making your posts look like they come from a hyperactive 4th grader. > Subject: Re: Will Python on day > replaceMATLAB? >> part of my Masters thesis. Is anyone willing to help in this >> endeavor? -- Grant Edwards grante Yow! HUMAN REPLICAS are at inserted into VATS of visi.comNUTRITIONAL YEAST ... -- http://mail.python.org/mailman/listinfo/python-list
Re: MyHDL project
chewie54 wrote: >> Dan, >> >> I would be honored to start a project such as that in mind. How do we >> begin ?? >> >> David Blubaugh >> >> >> Why not use MyHDL which is written in Python and translates to Verilog. >> I assume ImpulseC is a commercial product and costs a log. MyHDL is >> free. >> If you have any interests in combining MyHDL with SciPy and NumPy I >> would be interested in getting involved. >> >> Dan Fabrizio >> > > David, > > Let's start by discussing your masters thesis subject in more detail. > We can take a project from conception to hardware using MyHDL, NumPy > and SciPy. Maybe you could use this project as a proof for your > thesis showing this methodology warrants consideration compared other > ASIC/FPGA flows. > > Let's discuss some of your ideas and decide how to proceed. > And let's lose those exclamation marks in the subject line. regards Steve -- Steve Holden+1 571 484 6266 +1 800 494 3119 Holden Web LLC http://www.holdenweb.com/ -- http://mail.python.org/mailman/listinfo/python-list
Re: MyHDL project !!!!!
> Dan, > > I would be honored to start a project such as that in mind. How do we > begin ?? > > David Blubaugh > > > Why not use MyHDL which is written in Python and translates to Verilog. > I assume ImpulseC is a commercial product and costs a log. MyHDL is > free. > If you have any interests in combining MyHDL with SciPy and NumPy I > would be interested in getting involved. > > Dan Fabrizio > David, Let's start by discussing your masters thesis subject in more detail. We can take a project from conception to hardware using MyHDL, NumPy and SciPy. Maybe you could use this project as a proof for your thesis showing this methodology warrants consideration compared other ASIC/FPGA flows. Let's discuss some of your ideas and decide how to proceed. Dan -- http://mail.python.org/mailman/listinfo/python-list
MyHDL project !!!!!
Dan, I would be honored to start a project such as that in mind. How do we begin ?? David Blubaugh -Original Message- From: chewie54 [mailto:[EMAIL PROTECTED] Sent: Thursday, January 31, 2008 9:34 PM To: python-list@python.org Subject: Re: Will Python on day replaceMATLAB? > I have been evaluating the python environment ever more closer. I > believe I can interface python with a development environment known as > the ImpulseC environment. The ImpulseC environment develops C to VHDL > for FPGA development. I would especially love to interface Python > with ImpulseC and the graphing capabilities of GNU Plot and SciPy in > order to recreate a VHDL development environment that will be just as > capable as a $50,000 dollar Matlab to VHDL toolbox. This is also a > part of my Masters thesis. Is anyone willing to help in this endeavor? > > David Blubaugh > Why not use MyHDL which is written in Python and translates to Verilog. I assume ImpulseC is a commercial product and costs a log. MyHDL is free. If you have any interests in combining MyHDL with SciPy and NumPy I would be interested in getting involved. Dan Fabrizio This e-mail transmission contains information that is confidential and may be privileged. It is intended only for the addressee(s) named above. If you receive this e-mail in error, please do not read, copy or disseminate it in any manner. If you are not the intended recipient, any disclosure, copying, distribution or use of the contents of this information is prohibited. Please reply to the message immediately by informing the sender that the message was misdirected. After replying, please erase it from your computer system. Your assistance in correcting this error is appreciated. -- http://mail.python.org/mailman/listinfo/python-list
